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-rw-r--r--drivers/rtc/Kconfig2
-rw-r--r--drivers/rtc/rtc-sh.c24
2 files changed, 14 insertions, 12 deletions
diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
index 1e6715e..45e4b96 100644
--- a/drivers/rtc/Kconfig
+++ b/drivers/rtc/Kconfig
@@ -404,7 +404,7 @@ config RTC_DRV_SA1100
config RTC_DRV_SH
tristate "SuperH On-Chip RTC"
- depends on RTC_CLASS && (CPU_SH3 || CPU_SH4)
+ depends on RTC_CLASS && SUPERH
help
Say Y here to enable support for the on-chip RTC found in
most SuperH processors.
diff --git a/drivers/rtc/rtc-sh.c b/drivers/rtc/rtc-sh.c
index 8e8c8b8..c1d6a18 100644
--- a/drivers/rtc/rtc-sh.c
+++ b/drivers/rtc/rtc-sh.c
@@ -26,17 +26,7 @@
#include <asm/rtc.h>
#define DRV_NAME "sh-rtc"
-#define DRV_VERSION "0.1.3"
-
-#ifdef CONFIG_CPU_SH3
-#define rtc_reg_size sizeof(u16)
-#define RTC_BIT_INVERTED 0 /* No bug on SH7708, SH7709A */
-#define RTC_DEF_CAPABILITIES 0UL
-#elif defined(CONFIG_CPU_SH4)
-#define rtc_reg_size sizeof(u32)
-#define RTC_BIT_INVERTED 0x40 /* bug on SH7750, SH7750S */
-#define RTC_DEF_CAPABILITIES RTC_CAP_4_DIGIT_YEAR
-#endif
+#define DRV_VERSION "0.1.6"
#define RTC_REG(r) ((r) * rtc_reg_size)
@@ -58,6 +48,18 @@
#define RCR1 RTC_REG(14) /* Control */
#define RCR2 RTC_REG(15) /* Control */
+/*
+ * Note on RYRAR and RCR3: Up until this point most of the register
+ * definitions are consistent across all of the available parts. However,
+ * the placement of the optional RYRAR and RCR3 (the RYRAR control
+ * register used to control RYRCNT/RYRAR compare) varies considerably
+ * across various parts, occasionally being mapped in to a completely
+ * unrelated address space. For proper RYRAR support a separate resource
+ * would have to be handed off, but as this is purely optional in
+ * practice, we simply opt not to support it, thereby keeping the code
+ * quite a bit more simplified.
+ */
+
/* ALARM Bits - or with BCD encoded value */
#define AR_ENB 0x80 /* Enable for alarm cmp */
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