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path: root/drivers/pci/hotplug/pciehp_hpc.c
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Diffstat (limited to 'drivers/pci/hotplug/pciehp_hpc.c')
-rw-r--r--drivers/pci/hotplug/pciehp_hpc.c318
1 files changed, 137 insertions, 181 deletions
diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c
index 79f1049..1323a43 100644
--- a/drivers/pci/hotplug/pciehp_hpc.c
+++ b/drivers/pci/hotplug/pciehp_hpc.c
@@ -247,30 +247,32 @@ static inline void pciehp_free_irq(struct controller *ctrl)
free_irq(ctrl->pci_dev->irq, ctrl);
}
-static inline int pcie_poll_cmd(struct controller *ctrl)
+static int pcie_poll_cmd(struct controller *ctrl)
{
u16 slot_status;
int timeout = 1000;
- if (!pciehp_readw(ctrl, SLOTSTATUS, &slot_status))
- if (slot_status & CMD_COMPLETED)
- goto completed;
- for (timeout = 1000; timeout > 0; timeout -= 100) {
- msleep(100);
- if (!pciehp_readw(ctrl, SLOTSTATUS, &slot_status))
- if (slot_status & CMD_COMPLETED)
- goto completed;
+ if (!pciehp_readw(ctrl, SLOTSTATUS, &slot_status)) {
+ if (slot_status & CMD_COMPLETED) {
+ pciehp_writew(ctrl, SLOTSTATUS, CMD_COMPLETED);
+ return 1;
+ }
+ }
+ while (timeout > 1000) {
+ msleep(10);
+ timeout -= 10;
+ if (!pciehp_readw(ctrl, SLOTSTATUS, &slot_status)) {
+ if (slot_status & CMD_COMPLETED) {
+ pciehp_writew(ctrl, SLOTSTATUS, CMD_COMPLETED);
+ return 1;
+ }
+ }
}
return 0; /* timeout */
-
-completed:
- pciehp_writew(ctrl, SLOTSTATUS, CMD_COMPLETED);
- return timeout;
}
-static inline int pcie_wait_cmd(struct controller *ctrl, int poll)
+static void pcie_wait_cmd(struct controller *ctrl, int poll)
{
- int retval = 0;
unsigned int msecs = pciehp_poll_mode ? 2500 : 1000;
unsigned long timeout = msecs_to_jiffies(msecs);
int rc;
@@ -278,16 +280,9 @@ static inline int pcie_wait_cmd(struct controller *ctrl, int poll)
if (poll)
rc = pcie_poll_cmd(ctrl);
else
- rc = wait_event_interruptible_timeout(ctrl->queue,
- !ctrl->cmd_busy, timeout);
+ rc = wait_event_timeout(ctrl->queue, !ctrl->cmd_busy, timeout);
if (!rc)
dbg("Command not completed in 1000 msec\n");
- else if (rc < 0) {
- retval = -EINTR;
- info("Command was interrupted by a signal\n");
- }
-
- return retval;
}
/**
@@ -342,10 +337,6 @@ static int pcie_write_cmd(struct controller *ctrl, u16 cmd, u16 mask)
slot_ctrl &= ~mask;
slot_ctrl |= (cmd & mask);
- /* Don't enable command completed if caller is changing it. */
- if (!(mask & CMD_CMPL_INTR_ENABLE))
- slot_ctrl |= CMD_CMPL_INTR_ENABLE;
-
ctrl->cmd_busy = 1;
smp_mb();
retval = pciehp_writew(ctrl, SLOTCTRL, slot_ctrl);
@@ -365,7 +356,7 @@ static int pcie_write_cmd(struct controller *ctrl, u16 cmd, u16 mask)
if (!(slot_ctrl & HP_INTR_ENABLE) ||
!(slot_ctrl & CMD_CMPL_INTR_ENABLE))
poll = 1;
- retval = pcie_wait_cmd(ctrl, poll);
+ pcie_wait_cmd(ctrl, poll);
}
out:
mutex_unlock(&ctrl->ctrl_lock);
@@ -614,23 +605,6 @@ static void hpc_set_green_led_blink(struct slot *slot)
__func__, ctrl->cap_base + SLOTCTRL, slot_cmd);
}
-static void hpc_release_ctlr(struct controller *ctrl)
-{
- /* Mask Hot-plug Interrupt Enable */
- if (pcie_write_cmd(ctrl, 0, HP_INTR_ENABLE | CMD_CMPL_INTR_ENABLE))
- err("%s: Cannot mask hotplut interrupt enable\n", __func__);
-
- /* Free interrupt handler or interrupt polling timer */
- pciehp_free_irq(ctrl);
-
- /*
- * If this is the last controller to be released, destroy the
- * pciehp work queue
- */
- if (atomic_dec_and_test(&pciehp_num_controllers))
- destroy_workqueue(pciehp_wq);
-}
-
static int hpc_power_on_slot(struct slot * slot)
{
struct controller *ctrl = slot->ctrl;
@@ -785,7 +759,7 @@ static irqreturn_t pcie_isr(int irq, void *dev_id)
intr_loc |= detected;
if (!intr_loc)
return IRQ_NONE;
- if (pciehp_writew(ctrl, SLOTSTATUS, detected)) {
+ if (detected && pciehp_writew(ctrl, SLOTSTATUS, detected)) {
err("%s: Cannot write to SLOTSTATUS\n", __func__);
return IRQ_NONE;
}
@@ -797,25 +771,13 @@ static irqreturn_t pcie_isr(int irq, void *dev_id)
if (intr_loc & CMD_COMPLETED) {
ctrl->cmd_busy = 0;
smp_mb();
- wake_up_interruptible(&ctrl->queue);
+ wake_up(&ctrl->queue);
}
if (!(intr_loc & ~CMD_COMPLETED))
return IRQ_HANDLED;
- /*
- * Return without handling events if this handler routine is
- * called before controller initialization is done. This may
- * happen if hotplug event or another interrupt that shares
- * the IRQ with pciehp arrives before slot initialization is
- * done after interrupt handler is registered.
- *
- * FIXME - Need more structural fixes. We need to be ready to
- * handle the event before installing interrupt handler.
- */
p_slot = pciehp_find_slot(ctrl, ctrl->slot_device_offset);
- if (!p_slot || !p_slot->hpc_ops)
- return IRQ_HANDLED;
/* Check MRL Sensor Changed */
if (intr_loc & MRL_SENS_CHANGED)
@@ -992,6 +954,7 @@ static int hpc_get_cur_lnk_width(struct slot *slot,
return retval;
}
+static void pcie_release_ctrl(struct controller *ctrl);
static struct hpc_ops pciehp_hpc_ops = {
.power_on_slot = hpc_power_on_slot,
.power_off_slot = hpc_power_off_slot,
@@ -1013,97 +976,11 @@ static struct hpc_ops pciehp_hpc_ops = {
.green_led_off = hpc_set_green_led_off,
.green_led_blink = hpc_set_green_led_blink,
- .release_ctlr = hpc_release_ctlr,
+ .release_ctlr = pcie_release_ctrl,
.check_lnk_status = hpc_check_lnk_status,
};
-#ifdef CONFIG_ACPI
-static int pciehp_acpi_get_hp_hw_control_from_firmware(struct pci_dev *dev)
-{
- acpi_status status;
- acpi_handle chandle, handle = DEVICE_ACPI_HANDLE(&(dev->dev));
- struct pci_dev *pdev = dev;
- struct pci_bus *parent;
- struct acpi_buffer string = { ACPI_ALLOCATE_BUFFER, NULL };
-
- /*
- * Per PCI firmware specification, we should run the ACPI _OSC
- * method to get control of hotplug hardware before using it.
- * If an _OSC is missing, we look for an OSHP to do the same thing.
- * To handle different BIOS behavior, we look for _OSC and OSHP
- * within the scope of the hotplug controller and its parents, upto
- * the host bridge under which this controller exists.
- */
- while (!handle) {
- /*
- * This hotplug controller was not listed in the ACPI name
- * space at all. Try to get acpi handle of parent pci bus.
- */
- if (!pdev || !pdev->bus->parent)
- break;
- parent = pdev->bus->parent;
- dbg("Could not find %s in acpi namespace, trying parent\n",
- pci_name(pdev));
- if (!parent->self)
- /* Parent must be a host bridge */
- handle = acpi_get_pci_rootbridge_handle(
- pci_domain_nr(parent),
- parent->number);
- else
- handle = DEVICE_ACPI_HANDLE(
- &(parent->self->dev));
- pdev = parent->self;
- }
-
- while (handle) {
- acpi_get_name(handle, ACPI_FULL_PATHNAME, &string);
- dbg("Trying to get hotplug control for %s \n",
- (char *)string.pointer);
- status = pci_osc_control_set(handle,
- OSC_PCI_EXPRESS_CAP_STRUCTURE_CONTROL |
- OSC_PCI_EXPRESS_NATIVE_HP_CONTROL);
- if (status == AE_NOT_FOUND)
- status = acpi_run_oshp(handle);
- if (ACPI_SUCCESS(status)) {
- dbg("Gained control for hotplug HW for pci %s (%s)\n",
- pci_name(dev), (char *)string.pointer);
- kfree(string.pointer);
- return 0;
- }
- if (acpi_root_bridge(handle))
- break;
- chandle = handle;
- status = acpi_get_parent(chandle, &handle);
- if (ACPI_FAILURE(status))
- break;
- }
-
- dbg("Cannot get control of hotplug hardware for pci %s\n",
- pci_name(dev));
-
- kfree(string.pointer);
- return -1;
-}
-#endif
-
-static int pcie_init_hardware_part1(struct controller *ctrl,
- struct pcie_device *dev)
-{
- /* Clear all remaining event bits in Slot Status register */
- if (pciehp_writew(ctrl, SLOTSTATUS, 0x1f)) {
- err("%s: Cannot write to SLOTSTATUS register\n", __func__);
- return -1;
- }
-
- /* Mask Hot-plug Interrupt Enable */
- if (pcie_write_cmd(ctrl, 0, HP_INTR_ENABLE | CMD_CMPL_INTR_ENABLE)) {
- err("%s: Cannot mask hotplug interrupt enable\n", __func__);
- return -1;
- }
- return 0;
-}
-
-int pcie_init_hardware_part2(struct controller *ctrl, struct pcie_device *dev)
+int pcie_enable_notification(struct controller *ctrl)
{
u16 cmd, mask;
@@ -1115,30 +992,83 @@ int pcie_init_hardware_part2(struct controller *ctrl, struct pcie_device *dev)
if (MRL_SENS(ctrl))
cmd |= MRL_DETECT_ENABLE;
if (!pciehp_poll_mode)
- cmd |= HP_INTR_ENABLE;
+ cmd |= HP_INTR_ENABLE | CMD_CMPL_INTR_ENABLE;
- mask = PRSN_DETECT_ENABLE | ATTN_BUTTN_ENABLE |
- PWR_FAULT_DETECT_ENABLE | MRL_DETECT_ENABLE | HP_INTR_ENABLE;
+ mask = PRSN_DETECT_ENABLE | ATTN_BUTTN_ENABLE | MRL_DETECT_ENABLE |
+ PWR_FAULT_DETECT_ENABLE | HP_INTR_ENABLE | CMD_CMPL_INTR_ENABLE;
if (pcie_write_cmd(ctrl, cmd, mask)) {
err("%s: Cannot enable software notification\n", __func__);
- goto abort;
+ return -1;
}
+ return 0;
+}
- if (pciehp_force)
- dbg("Bypassing BIOS check for pciehp use on %s\n",
- pci_name(ctrl->pci_dev));
- else if (pciehp_get_hp_hw_control_from_firmware(ctrl->pci_dev))
- goto abort_disable_intr;
+static void pcie_disable_notification(struct controller *ctrl)
+{
+ u16 mask;
+ mask = PRSN_DETECT_ENABLE | ATTN_BUTTN_ENABLE | MRL_DETECT_ENABLE |
+ PWR_FAULT_DETECT_ENABLE | HP_INTR_ENABLE | CMD_CMPL_INTR_ENABLE;
+ if (pcie_write_cmd(ctrl, 0, mask))
+ warn("%s: Cannot disable software notification\n", __func__);
+}
+static int pcie_init_notification(struct controller *ctrl)
+{
+ if (pciehp_request_irq(ctrl))
+ return -1;
+ if (pcie_enable_notification(ctrl)) {
+ pciehp_free_irq(ctrl);
+ return -1;
+ }
return 0;
+}
- /* We end up here for the many possible ways to fail this API. */
-abort_disable_intr:
- if (pcie_write_cmd(ctrl, 0, HP_INTR_ENABLE))
- err("%s : disabling interrupts failed\n", __func__);
-abort:
- return -1;
+static void pcie_shutdown_notification(struct controller *ctrl)
+{
+ pcie_disable_notification(ctrl);
+ pciehp_free_irq(ctrl);
+}
+
+static void make_slot_name(struct slot *slot)
+{
+ if (pciehp_slot_with_bus)
+ snprintf(slot->name, SLOT_NAME_SIZE, "%04d_%04d",
+ slot->bus, slot->number);
+ else
+ snprintf(slot->name, SLOT_NAME_SIZE, "%d", slot->number);
+}
+
+static int pcie_init_slot(struct controller *ctrl)
+{
+ struct slot *slot;
+
+ slot = kzalloc(sizeof(*slot), GFP_KERNEL);
+ if (!slot)
+ return -ENOMEM;
+
+ slot->hp_slot = 0;
+ slot->ctrl = ctrl;
+ slot->bus = ctrl->pci_dev->subordinate->number;
+ slot->device = ctrl->slot_device_offset + slot->hp_slot;
+ slot->hpc_ops = ctrl->hpc_ops;
+ slot->number = ctrl->first_slot;
+ make_slot_name(slot);
+ mutex_init(&slot->lock);
+ INIT_DELAYED_WORK(&slot->work, pciehp_queue_pushbutton_work);
+ list_add(&slot->slot_list, &ctrl->slot_list);
+ return 0;
+}
+
+static void pcie_cleanup_slot(struct controller *ctrl)
+{
+ struct slot *slot;
+ slot = list_first_entry(&ctrl->slot_list, struct slot, slot_list);
+ list_del(&slot->slot_list);
+ cancel_delayed_work(&slot->work);
+ flush_scheduled_work();
+ flush_workqueue(pciehp_wq);
+ kfree(slot);
}
static inline void dbg_ctrl(struct controller *ctrl)
@@ -1176,15 +1106,23 @@ static inline void dbg_ctrl(struct controller *ctrl)
dbg(" Comamnd Completed : %3s\n", NO_CMD_CMPL(ctrl)? "no" : "yes");
pciehp_readw(ctrl, SLOTSTATUS, &reg16);
dbg("Slot Status : 0x%04x\n", reg16);
- pciehp_readw(ctrl, SLOTSTATUS, &reg16);
+ pciehp_readw(ctrl, SLOTCTRL, &reg16);
dbg("Slot Control : 0x%04x\n", reg16);
}
-int pcie_init(struct controller *ctrl, struct pcie_device *dev)
+struct controller *pcie_init(struct pcie_device *dev)
{
+ struct controller *ctrl;
u32 slot_cap;
struct pci_dev *pdev = dev->port;
+ ctrl = kzalloc(sizeof(*ctrl), GFP_KERNEL);
+ if (!ctrl) {
+ err("%s : out of memory\n", __func__);
+ goto abort;
+ }
+ INIT_LIST_HEAD(&ctrl->slot_list);
+
ctrl->pci_dev = pdev;
ctrl->cap_base = pci_find_capability(pdev, PCI_CAP_ID_EXP);
if (!ctrl->cap_base) {
@@ -1215,15 +1153,12 @@ int pcie_init(struct controller *ctrl, struct pcie_device *dev)
!(POWER_CTRL(ctrl) | ATTN_LED(ctrl) | PWR_LED(ctrl) | EMI(ctrl)))
ctrl->no_cmd_complete = 1;
- info("HPC vendor_id %x device_id %x ss_vid %x ss_did %x\n",
- pdev->vendor, pdev->device,
- pdev->subsystem_vendor, pdev->subsystem_device);
+ /* Clear all remaining event bits in Slot Status register */
+ if (pciehp_writew(ctrl, SLOTSTATUS, 0x1f))
+ goto abort_ctrl;
- if (pcie_init_hardware_part1(ctrl, dev))
- goto abort;
-
- if (pciehp_request_irq(ctrl))
- goto abort;
+ /* Disable sotfware notification */
+ pcie_disable_notification(ctrl);
/*
* If this is the first controller to be initialized,
@@ -1231,18 +1166,39 @@ int pcie_init(struct controller *ctrl, struct pcie_device *dev)
*/
if (atomic_add_return(1, &pciehp_num_controllers) == 1) {
pciehp_wq = create_singlethread_workqueue("pciehpd");
- if (!pciehp_wq) {
- goto abort_free_irq;
- }
+ if (!pciehp_wq)
+ goto abort_ctrl;
}
- if (pcie_init_hardware_part2(ctrl, dev))
- goto abort_free_irq;
+ info("HPC vendor_id %x device_id %x ss_vid %x ss_did %x\n",
+ pdev->vendor, pdev->device,
+ pdev->subsystem_vendor, pdev->subsystem_device);
+
+ if (pcie_init_slot(ctrl))
+ goto abort_ctrl;
- return 0;
+ if (pcie_init_notification(ctrl))
+ goto abort_slot;
-abort_free_irq:
- pciehp_free_irq(ctrl);
+ return ctrl;
+
+abort_slot:
+ pcie_cleanup_slot(ctrl);
+abort_ctrl:
+ kfree(ctrl);
abort:
- return -1;
+ return NULL;
+}
+
+void pcie_release_ctrl(struct controller *ctrl)
+{
+ pcie_shutdown_notification(ctrl);
+ pcie_cleanup_slot(ctrl);
+ /*
+ * If this is the last controller to be released, destroy the
+ * pciehp work queue
+ */
+ if (atomic_dec_and_test(&pciehp_num_controllers))
+ destroy_workqueue(pciehp_wq);
+ kfree(ctrl);
}
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