diff options
Diffstat (limited to 'drivers/net/wireless/ath/ath9k/ar9003_hw.c')
-rw-r--r-- | drivers/net/wireless/ath/ath9k/ar9003_hw.c | 182 |
1 files changed, 91 insertions, 91 deletions
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_hw.c b/drivers/net/wireless/ath/ath9k/ar9003_hw.c index 6b2a4d0..fb937ba 100644 --- a/drivers/net/wireless/ath/ath9k/ar9003_hw.c +++ b/drivers/net/wireless/ath/ath9k/ar9003_hw.c @@ -35,13 +35,13 @@ static void ar9003_hw_init_mode_regs(struct ath_hw *ah) { #define PCIE_PLL_ON_CREQ_DIS_L1_2P0 \ - ar9480_pciephy_pll_on_clkreq_disable_L1_2p0 + ar9462_pciephy_pll_on_clkreq_disable_L1_2p0 -#define AR9480_BB_CTX_COEFJ(x) \ - ar9480_##x##_baseband_core_txfir_coeff_japan_2484 +#define AR9462_BB_CTX_COEFJ(x) \ + ar9462_##x##_baseband_core_txfir_coeff_japan_2484 -#define AR9480_BBC_TXIFR_COEFFJ \ - ar9480_2p0_baseband_core_txfir_coeff_japan_2484 +#define AR9462_BBC_TXIFR_COEFFJ \ + ar9462_2p0_baseband_core_txfir_coeff_japan_2484 if (AR_SREV_9330_11(ah)) { /* mac */ INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0); @@ -264,107 +264,107 @@ static void ar9003_hw_init_mode_regs(struct ath_hw *ah) ar9485_1_1_pcie_phy_clkreq_disable_L1, ARRAY_SIZE(ar9485_1_1_pcie_phy_clkreq_disable_L1), 2); - } else if (AR_SREV_9480_10(ah)) { + } else if (AR_SREV_9462_10(ah)) { INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0); - INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE], ar9480_1p0_mac_core, - ARRAY_SIZE(ar9480_1p0_mac_core), 2); + INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE], ar9462_1p0_mac_core, + ARRAY_SIZE(ar9462_1p0_mac_core), 2); INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST], - ar9480_1p0_mac_postamble, - ARRAY_SIZE(ar9480_1p0_mac_postamble), + ar9462_1p0_mac_postamble, + ARRAY_SIZE(ar9462_1p0_mac_postamble), 5); INIT_INI_ARRAY(&ah->iniBB[ATH_INI_PRE], NULL, 0, 0); INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE], - ar9480_1p0_baseband_core, - ARRAY_SIZE(ar9480_1p0_baseband_core), + ar9462_1p0_baseband_core, + ARRAY_SIZE(ar9462_1p0_baseband_core), 2); INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST], - ar9480_1p0_baseband_postamble, - ARRAY_SIZE(ar9480_1p0_baseband_postamble), 5); + ar9462_1p0_baseband_postamble, + ARRAY_SIZE(ar9462_1p0_baseband_postamble), 5); INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_PRE], NULL, 0, 0); INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE], - ar9480_1p0_radio_core, - ARRAY_SIZE(ar9480_1p0_radio_core), 2); + ar9462_1p0_radio_core, + ARRAY_SIZE(ar9462_1p0_radio_core), 2); INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_POST], - ar9480_1p0_radio_postamble, - ARRAY_SIZE(ar9480_1p0_radio_postamble), 5); + ar9462_1p0_radio_postamble, + ARRAY_SIZE(ar9462_1p0_radio_postamble), 5); INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE], - ar9480_1p0_soc_preamble, - ARRAY_SIZE(ar9480_1p0_soc_preamble), 2); + ar9462_1p0_soc_preamble, + ARRAY_SIZE(ar9462_1p0_soc_preamble), 2); INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_CORE], NULL, 0, 0); INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST], - ar9480_1p0_soc_postamble, - ARRAY_SIZE(ar9480_1p0_soc_postamble), 5); + ar9462_1p0_soc_postamble, + ARRAY_SIZE(ar9462_1p0_soc_postamble), 5); INIT_INI_ARRAY(&ah->iniModesRxGain, - ar9480_common_rx_gain_table_1p0, - ARRAY_SIZE(ar9480_common_rx_gain_table_1p0), 2); + ar9462_common_rx_gain_table_1p0, + ARRAY_SIZE(ar9462_common_rx_gain_table_1p0), 2); /* Awake -> Sleep Setting */ INIT_INI_ARRAY(&ah->iniPcieSerdes, - ar9480_pcie_phy_clkreq_disable_L1_1p0, - ARRAY_SIZE(ar9480_pcie_phy_clkreq_disable_L1_1p0), + ar9462_pcie_phy_clkreq_disable_L1_1p0, + ARRAY_SIZE(ar9462_pcie_phy_clkreq_disable_L1_1p0), 2); /* Sleep -> Awake Setting */ INIT_INI_ARRAY(&ah->iniPcieSerdesLowPower, - ar9480_pcie_phy_clkreq_disable_L1_1p0, - ARRAY_SIZE(ar9480_pcie_phy_clkreq_disable_L1_1p0), + ar9462_pcie_phy_clkreq_disable_L1_1p0, + ARRAY_SIZE(ar9462_pcie_phy_clkreq_disable_L1_1p0), 2); INIT_INI_ARRAY(&ah->iniModesAdditional, - ar9480_modes_fast_clock_1p0, - ARRAY_SIZE(ar9480_modes_fast_clock_1p0), 3); + ar9462_modes_fast_clock_1p0, + ARRAY_SIZE(ar9462_modes_fast_clock_1p0), 3); INIT_INI_ARRAY(&ah->iniCckfirJapan2484, - AR9480_BB_CTX_COEFJ(1p0), - ARRAY_SIZE(AR9480_BB_CTX_COEFJ(1p0)), 2); + AR9462_BB_CTX_COEFJ(1p0), + ARRAY_SIZE(AR9462_BB_CTX_COEFJ(1p0)), 2); - } else if (AR_SREV_9480_20(ah)) { + } else if (AR_SREV_9462_20(ah)) { INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0); - INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE], ar9480_2p0_mac_core, - ARRAY_SIZE(ar9480_2p0_mac_core), 2); + INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE], ar9462_2p0_mac_core, + ARRAY_SIZE(ar9462_2p0_mac_core), 2); INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST], - ar9480_2p0_mac_postamble, - ARRAY_SIZE(ar9480_2p0_mac_postamble), 5); + ar9462_2p0_mac_postamble, + ARRAY_SIZE(ar9462_2p0_mac_postamble), 5); INIT_INI_ARRAY(&ah->iniBB[ATH_INI_PRE], NULL, 0, 0); INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE], - ar9480_2p0_baseband_core, - ARRAY_SIZE(ar9480_2p0_baseband_core), 2); + ar9462_2p0_baseband_core, + ARRAY_SIZE(ar9462_2p0_baseband_core), 2); INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST], - ar9480_2p0_baseband_postamble, - ARRAY_SIZE(ar9480_2p0_baseband_postamble), 5); + ar9462_2p0_baseband_postamble, + ARRAY_SIZE(ar9462_2p0_baseband_postamble), 5); INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_PRE], NULL, 0, 0); INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE], - ar9480_2p0_radio_core, - ARRAY_SIZE(ar9480_2p0_radio_core), 2); + ar9462_2p0_radio_core, + ARRAY_SIZE(ar9462_2p0_radio_core), 2); INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_POST], - ar9480_2p0_radio_postamble, - ARRAY_SIZE(ar9480_2p0_radio_postamble), 5); + ar9462_2p0_radio_postamble, + ARRAY_SIZE(ar9462_2p0_radio_postamble), 5); INIT_INI_ARRAY(&ah->ini_radio_post_sys2ant, - ar9480_2p0_radio_postamble_sys2ant, - ARRAY_SIZE(ar9480_2p0_radio_postamble_sys2ant), + ar9462_2p0_radio_postamble_sys2ant, + ARRAY_SIZE(ar9462_2p0_radio_postamble_sys2ant), 5); INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE], - ar9480_2p0_soc_preamble, - ARRAY_SIZE(ar9480_2p0_soc_preamble), 2); + ar9462_2p0_soc_preamble, + ARRAY_SIZE(ar9462_2p0_soc_preamble), 2); INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_CORE], NULL, 0, 0); INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST], - ar9480_2p0_soc_postamble, - ARRAY_SIZE(ar9480_2p0_soc_postamble), 5); + ar9462_2p0_soc_postamble, + ARRAY_SIZE(ar9462_2p0_soc_postamble), 5); INIT_INI_ARRAY(&ah->iniModesRxGain, - ar9480_common_rx_gain_table_2p0, - ARRAY_SIZE(ar9480_common_rx_gain_table_2p0), 2); + ar9462_common_rx_gain_table_2p0, + ARRAY_SIZE(ar9462_common_rx_gain_table_2p0), 2); INIT_INI_ARRAY(&ah->ini_BTCOEX_MAX_TXPWR, - ar9480_2p0_BTCOEX_MAX_TXPWR_table, - ARRAY_SIZE(ar9480_2p0_BTCOEX_MAX_TXPWR_table), + ar9462_2p0_BTCOEX_MAX_TXPWR_table, + ARRAY_SIZE(ar9462_2p0_BTCOEX_MAX_TXPWR_table), 2); /* Awake -> Sleep Setting */ @@ -380,15 +380,15 @@ static void ar9003_hw_init_mode_regs(struct ath_hw *ah) /* Fast clock modal settings */ INIT_INI_ARRAY(&ah->iniModesAdditional, - ar9480_modes_fast_clock_2p0, - ARRAY_SIZE(ar9480_modes_fast_clock_2p0), 3); + ar9462_modes_fast_clock_2p0, + ARRAY_SIZE(ar9462_modes_fast_clock_2p0), 3); INIT_INI_ARRAY(&ah->iniCckfirJapan2484, - AR9480_BB_CTX_COEFJ(2p0), - ARRAY_SIZE(AR9480_BB_CTX_COEFJ(2p0)), 2); + AR9462_BB_CTX_COEFJ(2p0), + ARRAY_SIZE(AR9462_BB_CTX_COEFJ(2p0)), 2); - INIT_INI_ARRAY(&ah->ini_japan2484, AR9480_BBC_TXIFR_COEFFJ, - ARRAY_SIZE(AR9480_BBC_TXIFR_COEFFJ), 2); + INIT_INI_ARRAY(&ah->ini_japan2484, AR9462_BBC_TXIFR_COEFFJ, + ARRAY_SIZE(AR9462_BBC_TXIFR_COEFFJ), 2); } else if (AR_SREV_9580(ah)) { /* mac */ @@ -537,15 +537,15 @@ static void ar9003_tx_gain_table_mode0(struct ath_hw *ah) ar9580_1p0_lowest_ob_db_tx_gain_table, ARRAY_SIZE(ar9580_1p0_lowest_ob_db_tx_gain_table), 5); - else if (AR_SREV_9480_10(ah)) + else if (AR_SREV_9462_10(ah)) INIT_INI_ARRAY(&ah->iniModesTxGain, - ar9480_modes_low_ob_db_tx_gain_table_1p0, - ARRAY_SIZE(ar9480_modes_low_ob_db_tx_gain_table_1p0), + ar9462_modes_low_ob_db_tx_gain_table_1p0, + ARRAY_SIZE(ar9462_modes_low_ob_db_tx_gain_table_1p0), 5); - else if (AR_SREV_9480_20(ah)) + else if (AR_SREV_9462_20(ah)) INIT_INI_ARRAY(&ah->iniModesTxGain, - ar9480_modes_low_ob_db_tx_gain_table_2p0, - ARRAY_SIZE(ar9480_modes_low_ob_db_tx_gain_table_2p0), + ar9462_modes_low_ob_db_tx_gain_table_2p0, + ARRAY_SIZE(ar9462_modes_low_ob_db_tx_gain_table_2p0), 5); else INIT_INI_ARRAY(&ah->iniModesTxGain, @@ -581,15 +581,15 @@ static void ar9003_tx_gain_table_mode1(struct ath_hw *ah) ar9580_1p0_high_ob_db_tx_gain_table, ARRAY_SIZE(ar9580_1p0_high_ob_db_tx_gain_table), 5); - else if (AR_SREV_9480_10(ah)) + else if (AR_SREV_9462_10(ah)) INIT_INI_ARRAY(&ah->iniModesTxGain, - ar9480_modes_high_ob_db_tx_gain_table_1p0, - ARRAY_SIZE(ar9480_modes_high_ob_db_tx_gain_table_1p0), + ar9462_modes_high_ob_db_tx_gain_table_1p0, + ARRAY_SIZE(ar9462_modes_high_ob_db_tx_gain_table_1p0), 5); - else if (AR_SREV_9480_20(ah)) + else if (AR_SREV_9462_20(ah)) INIT_INI_ARRAY(&ah->iniModesTxGain, - ar9480_modes_high_ob_db_tx_gain_table_2p0, - ARRAY_SIZE(ar9480_modes_high_ob_db_tx_gain_table_2p0), + ar9462_modes_high_ob_db_tx_gain_table_2p0, + ARRAY_SIZE(ar9462_modes_high_ob_db_tx_gain_table_2p0), 5); else INIT_INI_ARRAY(&ah->iniModesTxGain, @@ -712,15 +712,15 @@ static void ar9003_rx_gain_table_mode0(struct ath_hw *ah) ar9580_1p0_rx_gain_table, ARRAY_SIZE(ar9580_1p0_rx_gain_table), 2); - else if (AR_SREV_9480_10(ah)) + else if (AR_SREV_9462_10(ah)) INIT_INI_ARRAY(&ah->iniModesRxGain, - ar9480_common_rx_gain_table_1p0, - ARRAY_SIZE(ar9480_common_rx_gain_table_1p0), + ar9462_common_rx_gain_table_1p0, + ARRAY_SIZE(ar9462_common_rx_gain_table_1p0), 2); - else if (AR_SREV_9480_20(ah)) + else if (AR_SREV_9462_20(ah)) INIT_INI_ARRAY(&ah->iniModesRxGain, - ar9480_common_rx_gain_table_2p0, - ARRAY_SIZE(ar9480_common_rx_gain_table_2p0), + ar9462_common_rx_gain_table_2p0, + ARRAY_SIZE(ar9462_common_rx_gain_table_2p0), 2); else INIT_INI_ARRAY(&ah->iniModesRxGain, @@ -751,15 +751,15 @@ static void ar9003_rx_gain_table_mode1(struct ath_hw *ah) ar9485Common_wo_xlna_rx_gain_1_1, ARRAY_SIZE(ar9485Common_wo_xlna_rx_gain_1_1), 2); - else if (AR_SREV_9480_10(ah)) + else if (AR_SREV_9462_10(ah)) INIT_INI_ARRAY(&ah->iniModesRxGain, - ar9480_common_wo_xlna_rx_gain_table_1p0, - ARRAY_SIZE(ar9480_common_wo_xlna_rx_gain_table_1p0), + ar9462_common_wo_xlna_rx_gain_table_1p0, + ARRAY_SIZE(ar9462_common_wo_xlna_rx_gain_table_1p0), 2); - else if (AR_SREV_9480_20(ah)) + else if (AR_SREV_9462_20(ah)) INIT_INI_ARRAY(&ah->iniModesRxGain, - ar9480_common_wo_xlna_rx_gain_table_2p0, - ARRAY_SIZE(ar9480_common_wo_xlna_rx_gain_table_2p0), + ar9462_common_wo_xlna_rx_gain_table_2p0, + ARRAY_SIZE(ar9462_common_wo_xlna_rx_gain_table_2p0), 2); else if (AR_SREV_9580(ah)) INIT_INI_ARRAY(&ah->iniModesRxGain, @@ -775,14 +775,14 @@ static void ar9003_rx_gain_table_mode1(struct ath_hw *ah) static void ar9003_rx_gain_table_mode2(struct ath_hw *ah) { - if (AR_SREV_9480_10(ah)) + if (AR_SREV_9462_10(ah)) INIT_INI_ARRAY(&ah->iniModesRxGain, - ar9480_common_mixed_rx_gain_table_1p0, - ARRAY_SIZE(ar9480_common_mixed_rx_gain_table_1p0), 2); - else if (AR_SREV_9480_20(ah)) + ar9462_common_mixed_rx_gain_table_1p0, + ARRAY_SIZE(ar9462_common_mixed_rx_gain_table_1p0), 2); + else if (AR_SREV_9462_20(ah)) INIT_INI_ARRAY(&ah->iniModesRxGain, - ar9480_common_mixed_rx_gain_table_2p0, - ARRAY_SIZE(ar9480_common_mixed_rx_gain_table_2p0), 2); + ar9462_common_mixed_rx_gain_table_2p0, + ARRAY_SIZE(ar9462_common_mixed_rx_gain_table_2p0), 2); } static void ar9003_rx_gain_table_apply(struct ath_hw *ah) |