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path: root/drivers/gpu/drm/nouveau/nvkm/engine/device
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Diffstat (limited to 'drivers/gpu/drm/nouveau/nvkm/engine/device')
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/engine/device/base.c216
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/engine/device/gf100.c40
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/engine/device/gk104.c21
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c9
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/engine/device/nv50.c28
5 files changed, 108 insertions, 206 deletions
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
index 7f858ef..0556316 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
@@ -1056,10 +1056,10 @@ nv98_chipset = {
// .fifo = g84_fifo_new,
// .sw = nv50_sw_new,
// .gr = nv50_gr_new,
-// .mspdec = g98_mspdec_new,
-// .sec = g98_sec_new,
-// .msvld = g98_msvld_new,
-// .msppp = g98_msppp_new,
+ .mspdec = g98_mspdec_new,
+ .sec = g98_sec_new,
+ .msvld = g98_msvld_new,
+ .msppp = g98_msppp_new,
// .disp = g94_disp_new,
// .pm = g84_pm_new,
};
@@ -1115,15 +1115,15 @@ nva3_chipset = {
.therm = gt215_therm_new,
.timer = nv41_timer_new,
.volt = nv40_volt_new,
-// .ce[0] = gt215_ce_new,
+ .ce[0] = gt215_ce_new,
// .disp = gt215_disp_new,
// .dma = nv50_dma_new,
// .fifo = g84_fifo_new,
// .gr = nv50_gr_new,
// .mpeg = g84_mpeg_new,
-// .mspdec = g98_mspdec_new,
-// .msppp = g98_msppp_new,
-// .msvld = g98_msvld_new,
+ .mspdec = gt215_mspdec_new,
+ .msppp = gt215_msppp_new,
+ .msvld = gt215_msvld_new,
// .pm = gt215_pm_new,
// .sw = nv50_sw_new,
};
@@ -1148,14 +1148,14 @@ nva5_chipset = {
.therm = gt215_therm_new,
.timer = nv41_timer_new,
.volt = nv40_volt_new,
-// .ce[0] = gt215_ce_new,
+ .ce[0] = gt215_ce_new,
// .disp = gt215_disp_new,
// .dma = nv50_dma_new,
// .fifo = g84_fifo_new,
// .gr = nv50_gr_new,
-// .mspdec = g98_mspdec_new,
-// .msppp = g98_msppp_new,
-// .msvld = g98_msvld_new,
+ .mspdec = gt215_mspdec_new,
+ .msppp = gt215_msppp_new,
+ .msvld = gt215_msvld_new,
// .pm = gt215_pm_new,
// .sw = nv50_sw_new,
};
@@ -1180,14 +1180,14 @@ nva8_chipset = {
.therm = gt215_therm_new,
.timer = nv41_timer_new,
.volt = nv40_volt_new,
-// .ce[0] = gt215_ce_new,
+ .ce[0] = gt215_ce_new,
// .disp = gt215_disp_new,
// .dma = nv50_dma_new,
// .fifo = g84_fifo_new,
// .gr = nv50_gr_new,
-// .mspdec = g98_mspdec_new,
-// .msppp = g98_msppp_new,
-// .msvld = g98_msvld_new,
+ .mspdec = gt215_mspdec_new,
+ .msppp = gt215_msppp_new,
+ .msvld = gt215_msvld_new,
// .pm = gt215_pm_new,
// .sw = nv50_sw_new,
};
@@ -1215,11 +1215,11 @@ nvaa_chipset = {
// .dma = nv50_dma_new,
// .fifo = g84_fifo_new,
// .gr = nv50_gr_new,
-// .mspdec = g98_mspdec_new,
-// .msppp = g98_msppp_new,
-// .msvld = g98_msvld_new,
+ .mspdec = g98_mspdec_new,
+ .msppp = g98_msppp_new,
+ .msvld = g98_msvld_new,
// .pm = g84_pm_new,
-// .sec = g98_sec_new,
+ .sec = g98_sec_new,
// .sw = nv50_sw_new,
};
@@ -1246,11 +1246,11 @@ nvac_chipset = {
// .dma = nv50_dma_new,
// .fifo = g84_fifo_new,
// .gr = nv50_gr_new,
-// .mspdec = g98_mspdec_new,
-// .msppp = g98_msppp_new,
-// .msvld = g98_msvld_new,
+ .mspdec = g98_mspdec_new,
+ .msppp = g98_msppp_new,
+ .msvld = g98_msvld_new,
// .pm = g84_pm_new,
-// .sec = g98_sec_new,
+ .sec = g98_sec_new,
// .sw = nv50_sw_new,
};
@@ -1274,14 +1274,14 @@ nvaf_chipset = {
.therm = gt215_therm_new,
.timer = nv41_timer_new,
.volt = nv40_volt_new,
-// .ce[0] = gt215_ce_new,
+ .ce[0] = gt215_ce_new,
// .disp = gt215_disp_new,
// .dma = nv50_dma_new,
// .fifo = g84_fifo_new,
// .gr = nv50_gr_new,
-// .mspdec = g98_mspdec_new,
-// .msppp = g98_msppp_new,
-// .msvld = g98_msvld_new,
+ .mspdec = gt215_mspdec_new,
+ .msppp = gt215_msppp_new,
+ .msvld = mcp89_msvld_new,
// .pm = gt215_pm_new,
// .sw = nv50_sw_new,
};
@@ -1308,15 +1308,15 @@ nvc0_chipset = {
.therm = gt215_therm_new,
.timer = nv41_timer_new,
.volt = nv40_volt_new,
-// .ce[0] = gf100_ce0_new,
-// .ce[1] = gf100_ce1_new,
+ .ce[0] = gf100_ce_new,
+ .ce[1] = gf100_ce_new,
// .disp = gt215_disp_new,
// .dma = gf100_dma_new,
// .fifo = gf100_fifo_new,
// .gr = gf100_gr_new,
-// .mspdec = gf100_mspdec_new,
-// .msppp = gf100_msppp_new,
-// .msvld = gf100_msvld_new,
+ .mspdec = gf100_mspdec_new,
+ .msppp = gf100_msppp_new,
+ .msvld = gf100_msvld_new,
// .pm = gf100_pm_new,
// .sw = gf100_sw_new,
};
@@ -1343,14 +1343,14 @@ nvc1_chipset = {
.therm = gt215_therm_new,
.timer = nv41_timer_new,
.volt = nv40_volt_new,
-// .ce[0] = gf100_ce0_new,
+ .ce[0] = gf100_ce_new,
// .disp = gt215_disp_new,
// .dma = gf100_dma_new,
// .fifo = gf100_fifo_new,
// .gr = gf108_gr_new,
-// .mspdec = gf100_mspdec_new,
-// .msppp = gf100_msppp_new,
-// .msvld = gf100_msvld_new,
+ .mspdec = gf100_mspdec_new,
+ .msppp = gf100_msppp_new,
+ .msvld = gf100_msvld_new,
// .pm = gf108_pm_new,
// .sw = gf100_sw_new,
};
@@ -1377,14 +1377,14 @@ nvc3_chipset = {
.therm = gt215_therm_new,
.timer = nv41_timer_new,
.volt = nv40_volt_new,
-// .ce[0] = gf100_ce0_new,
+ .ce[0] = gf100_ce_new,
// .disp = gt215_disp_new,
// .dma = gf100_dma_new,
// .fifo = gf100_fifo_new,
// .gr = gf104_gr_new,
-// .mspdec = gf100_mspdec_new,
-// .msppp = gf100_msppp_new,
-// .msvld = gf100_msvld_new,
+ .mspdec = gf100_mspdec_new,
+ .msppp = gf100_msppp_new,
+ .msvld = gf100_msvld_new,
// .pm = gf100_pm_new,
// .sw = gf100_sw_new,
};
@@ -1411,15 +1411,15 @@ nvc4_chipset = {
.therm = gt215_therm_new,
.timer = nv41_timer_new,
.volt = nv40_volt_new,
-// .ce[0] = gf100_ce0_new,
-// .ce[1] = gf100_ce1_new,
+ .ce[0] = gf100_ce_new,
+ .ce[1] = gf100_ce_new,
// .disp = gt215_disp_new,
// .dma = gf100_dma_new,
// .fifo = gf100_fifo_new,
// .gr = gf104_gr_new,
-// .mspdec = gf100_mspdec_new,
-// .msppp = gf100_msppp_new,
-// .msvld = gf100_msvld_new,
+ .mspdec = gf100_mspdec_new,
+ .msppp = gf100_msppp_new,
+ .msvld = gf100_msvld_new,
// .pm = gf100_pm_new,
// .sw = gf100_sw_new,
};
@@ -1446,15 +1446,15 @@ nvc8_chipset = {
.therm = gt215_therm_new,
.timer = nv41_timer_new,
.volt = nv40_volt_new,
-// .ce[0] = gf100_ce0_new,
-// .ce[1] = gf100_ce1_new,
+ .ce[0] = gf100_ce_new,
+ .ce[1] = gf100_ce_new,
// .disp = gt215_disp_new,
// .dma = gf100_dma_new,
// .fifo = gf100_fifo_new,
// .gr = gf110_gr_new,
-// .mspdec = gf100_mspdec_new,
-// .msppp = gf100_msppp_new,
-// .msvld = gf100_msvld_new,
+ .mspdec = gf100_mspdec_new,
+ .msppp = gf100_msppp_new,
+ .msvld = gf100_msvld_new,
// .pm = gf100_pm_new,
// .sw = gf100_sw_new,
};
@@ -1481,15 +1481,15 @@ nvce_chipset = {
.therm = gt215_therm_new,
.timer = nv41_timer_new,
.volt = nv40_volt_new,
-// .ce[0] = gf100_ce0_new,
-// .ce[1] = gf100_ce1_new,
+ .ce[0] = gf100_ce_new,
+ .ce[1] = gf100_ce_new,
// .disp = gt215_disp_new,
// .dma = gf100_dma_new,
// .fifo = gf100_fifo_new,
// .gr = gf104_gr_new,
-// .mspdec = gf100_mspdec_new,
-// .msppp = gf100_msppp_new,
-// .msvld = gf100_msvld_new,
+ .mspdec = gf100_mspdec_new,
+ .msppp = gf100_msppp_new,
+ .msvld = gf100_msvld_new,
// .pm = gf100_pm_new,
// .sw = gf100_sw_new,
};
@@ -1516,14 +1516,14 @@ nvcf_chipset = {
.therm = gt215_therm_new,
.timer = nv41_timer_new,
.volt = nv40_volt_new,
-// .ce[0] = gf100_ce0_new,
+ .ce[0] = gf100_ce_new,
// .disp = gt215_disp_new,
// .dma = gf100_dma_new,
// .fifo = gf100_fifo_new,
// .gr = gf104_gr_new,
-// .mspdec = gf100_mspdec_new,
-// .msppp = gf100_msppp_new,
-// .msvld = gf100_msvld_new,
+ .mspdec = gf100_mspdec_new,
+ .msppp = gf100_msppp_new,
+ .msvld = gf100_msvld_new,
// .pm = gf100_pm_new,
// .sw = gf100_sw_new,
};
@@ -1548,14 +1548,14 @@ nvd7_chipset = {
.mxm = nv50_mxm_new,
.therm = gf119_therm_new,
.timer = nv41_timer_new,
-// .ce[0] = gf100_ce0_new,
+ .ce[0] = gf100_ce_new,
// .disp = gf119_disp_new,
// .dma = gf119_dma_new,
// .fifo = gf100_fifo_new,
// .gr = gf117_gr_new,
-// .mspdec = gf100_mspdec_new,
-// .msppp = gf100_msppp_new,
-// .msvld = gf100_msvld_new,
+ .mspdec = gf100_mspdec_new,
+ .msppp = gf100_msppp_new,
+ .msvld = gf100_msvld_new,
// .pm = gf117_pm_new,
// .sw = gf100_sw_new,
};
@@ -1582,14 +1582,14 @@ nvd9_chipset = {
.therm = gf119_therm_new,
.timer = nv41_timer_new,
.volt = nv40_volt_new,
-// .ce[0] = gf100_ce0_new,
+ .ce[0] = gf100_ce_new,
// .disp = gf119_disp_new,
// .dma = gf119_dma_new,
// .fifo = gf100_fifo_new,
// .gr = gf119_gr_new,
-// .mspdec = gf100_mspdec_new,
-// .msppp = gf100_msppp_new,
-// .msvld = gf100_msvld_new,
+ .mspdec = gf100_mspdec_new,
+ .msppp = gf100_msppp_new,
+ .msvld = gf100_msvld_new,
// .pm = gf117_pm_new,
// .sw = gf100_sw_new,
};
@@ -1616,16 +1616,16 @@ nve4_chipset = {
.therm = gf119_therm_new,
.timer = nv41_timer_new,
.volt = nv40_volt_new,
-// .ce[0] = gk104_ce0_new,
-// .ce[1] = gk104_ce1_new,
+// .ce[0] = gk104_ce_new,
+// .ce[1] = gk104_ce_new,
// .ce[2] = gk104_ce2_new,
// .disp = gk104_disp_new,
// .dma = gf119_dma_new,
// .fifo = gk104_fifo_new,
// .gr = gk104_gr_new,
-// .mspdec = gk104_mspdec_new,
-// .msppp = gf100_msppp_new,
-// .msvld = gk104_msvld_new,
+ .mspdec = gk104_mspdec_new,
+ .msppp = gf100_msppp_new,
+ .msvld = gk104_msvld_new,
// .pm = gk104_pm_new,
// .sw = gf100_sw_new,
};
@@ -1652,16 +1652,16 @@ nve6_chipset = {
.therm = gf119_therm_new,
.timer = nv41_timer_new,
.volt = nv40_volt_new,
-// .ce[0] = gk104_ce0_new,
-// .ce[1] = gk104_ce1_new,
+// .ce[0] = gk104_ce_new,
+// .ce[1] = gk104_ce_new,
// .ce[2] = gk104_ce2_new,
// .disp = gk104_disp_new,
// .dma = gf119_dma_new,
// .fifo = gk104_fifo_new,
// .gr = gk104_gr_new,
-// .mspdec = gk104_mspdec_new,
-// .msppp = gf100_msppp_new,
-// .msvld = gk104_msvld_new,
+ .mspdec = gk104_mspdec_new,
+ .msppp = gf100_msppp_new,
+ .msvld = gk104_msvld_new,
// .pm = gk104_pm_new,
// .sw = gf100_sw_new,
};
@@ -1688,16 +1688,16 @@ nve7_chipset = {
.therm = gf119_therm_new,
.timer = nv41_timer_new,
.volt = nv40_volt_new,
-// .ce[0] = gk104_ce0_new,
-// .ce[1] = gk104_ce1_new,
+// .ce[0] = gk104_ce_new,
+// .ce[1] = gk104_ce_new,
// .ce[2] = gk104_ce2_new,
// .disp = gk104_disp_new,
// .dma = gf119_dma_new,
// .fifo = gk104_fifo_new,
// .gr = gk104_gr_new,
-// .mspdec = gk104_mspdec_new,
-// .msppp = gf100_msppp_new,
-// .msvld = gk104_msvld_new,
+ .mspdec = gk104_mspdec_new,
+ .msppp = gf100_msppp_new,
+ .msvld = gk104_msvld_new,
// .pm = gk104_pm_new,
// .sw = gf100_sw_new,
};
@@ -1748,16 +1748,16 @@ nvf0_chipset = {
.therm = gf119_therm_new,
.timer = nv41_timer_new,
.volt = nv40_volt_new,
-// .ce[0] = gk104_ce0_new,
-// .ce[1] = gk104_ce1_new,
+// .ce[0] = gk104_ce_new,
+// .ce[1] = gk104_ce_new,
// .ce[2] = gk104_ce2_new,
// .disp = gk110_disp_new,
// .dma = gf119_dma_new,
// .fifo = gk104_fifo_new,
// .gr = gk110_gr_new,
-// .mspdec = gk104_mspdec_new,
-// .msppp = gf100_msppp_new,
-// .msvld = gk104_msvld_new,
+ .mspdec = gk104_mspdec_new,
+ .msppp = gf100_msppp_new,
+ .msvld = gk104_msvld_new,
// .pm = gk110_pm_new,
// .sw = gf100_sw_new,
};
@@ -1784,16 +1784,16 @@ nvf1_chipset = {
.therm = gf119_therm_new,
.timer = nv41_timer_new,
.volt = nv40_volt_new,
-// .ce[0] = gk104_ce0_new,
-// .ce[1] = gk104_ce1_new,
+// .ce[0] = gk104_ce_new,
+// .ce[1] = gk104_ce_new,
// .ce[2] = gk104_ce2_new,
// .disp = gk110_disp_new,
// .dma = gf119_dma_new,
// .fifo = gk104_fifo_new,
// .gr = gk110b_gr_new,
-// .mspdec = gk104_mspdec_new,
-// .msppp = gf100_msppp_new,
-// .msvld = gk104_msvld_new,
+ .mspdec = gk104_mspdec_new,
+ .msppp = gf100_msppp_new,
+ .msvld = gk104_msvld_new,
// .pm = gk110_pm_new,
// .sw = gf100_sw_new,
};
@@ -1820,16 +1820,16 @@ nv106_chipset = {
.therm = gf119_therm_new,
.timer = nv41_timer_new,
.volt = nv40_volt_new,
-// .ce[0] = gk104_ce0_new,
-// .ce[1] = gk104_ce1_new,
+// .ce[0] = gk104_ce_new,
+// .ce[1] = gk104_ce_new,
// .ce[2] = gk104_ce2_new,
// .disp = gk110_disp_new,
// .dma = gf119_dma_new,
// .fifo = gk208_fifo_new,
// .gr = gk208_gr_new,
-// .mspdec = gk104_mspdec_new,
-// .msppp = gf100_msppp_new,
-// .msvld = gk104_msvld_new,
+ .mspdec = gk104_mspdec_new,
+ .msppp = gf100_msppp_new,
+ .msvld = gk104_msvld_new,
// .sw = gf100_sw_new,
};
@@ -1855,16 +1855,16 @@ nv108_chipset = {
.therm = gf119_therm_new,
.timer = nv41_timer_new,
.volt = nv40_volt_new,
-// .ce[0] = gk104_ce0_new,
-// .ce[1] = gk104_ce1_new,
+// .ce[0] = gk104_ce_new,
+// .ce[1] = gk104_ce_new,
// .ce[2] = gk104_ce2_new,
// .disp = gk110_disp_new,
// .dma = gf119_dma_new,
// .fifo = gk208_fifo_new,
// .gr = gk208_gr_new,
-// .mspdec = gk104_mspdec_new,
-// .msppp = gf100_msppp_new,
-// .msvld = gk104_msvld_new,
+ .mspdec = gk104_mspdec_new,
+ .msppp = gf100_msppp_new,
+ .msvld = gk104_msvld_new,
// .sw = gf100_sw_new,
};
@@ -1889,7 +1889,7 @@ nv117_chipset = {
.pmu = gm107_pmu_new,
.therm = gm107_therm_new,
.timer = gk20a_timer_new,
-// .ce[0] = gk104_ce0_new,
+// .ce[0] = gk104_ce_new,
// .ce[2] = gk104_ce2_new,
// .disp = gm107_disp_new,
// .dma = gf119_dma_new,
@@ -1917,8 +1917,8 @@ nv124_chipset = {
.mxm = nv50_mxm_new,
.pmu = gm107_pmu_new,
.timer = gk20a_timer_new,
-// .ce[0] = gm204_ce0_new,
-// .ce[1] = gm204_ce1_new,
+// .ce[0] = gm204_ce_new,
+// .ce[1] = gm204_ce_new,
// .ce[2] = gm204_ce2_new,
// .disp = gm204_disp_new,
// .dma = gf119_dma_new,
@@ -1946,8 +1946,8 @@ nv126_chipset = {
.mxm = nv50_mxm_new,
.pmu = gm107_pmu_new,
.timer = gk20a_timer_new,
-// .ce[0] = gm204_ce0_new,
-// .ce[1] = gm204_ce1_new,
+// .ce[0] = gm204_ce_new,
+// .ce[1] = gm204_ce_new,
// .ce[2] = gm204_ce2_new,
// .disp = gm204_disp_new,
// .dma = gf119_dma_new,
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/gf100.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/gf100.c
index 1f273e1..336964a 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/device/gf100.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/gf100.c
@@ -32,11 +32,6 @@ gf100_identify(struct nvkm_device *device)
device->oclass[NVDEV_ENGINE_FIFO ] = gf100_fifo_oclass;
device->oclass[NVDEV_ENGINE_SW ] = gf100_sw_oclass;
device->oclass[NVDEV_ENGINE_GR ] = gf100_gr_oclass;
- device->oclass[NVDEV_ENGINE_MSPDEC ] = &gf100_mspdec_oclass;
- device->oclass[NVDEV_ENGINE_MSVLD ] = &gf100_msvld_oclass;
- device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass;
- device->oclass[NVDEV_ENGINE_CE0 ] = &gf100_ce0_oclass;
- device->oclass[NVDEV_ENGINE_CE1 ] = &gf100_ce1_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = gt215_disp_oclass;
device->oclass[NVDEV_ENGINE_PM ] = gf100_pm_oclass;
break;
@@ -45,11 +40,6 @@ gf100_identify(struct nvkm_device *device)
device->oclass[NVDEV_ENGINE_FIFO ] = gf100_fifo_oclass;
device->oclass[NVDEV_ENGINE_SW ] = gf100_sw_oclass;
device->oclass[NVDEV_ENGINE_GR ] = gf104_gr_oclass;
- device->oclass[NVDEV_ENGINE_MSPDEC ] = &gf100_mspdec_oclass;
- device->oclass[NVDEV_ENGINE_MSVLD ] = &gf100_msvld_oclass;
- device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass;
- device->oclass[NVDEV_ENGINE_CE0 ] = &gf100_ce0_oclass;
- device->oclass[NVDEV_ENGINE_CE1 ] = &gf100_ce1_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = gt215_disp_oclass;
device->oclass[NVDEV_ENGINE_PM ] = gf100_pm_oclass;
break;
@@ -58,10 +48,6 @@ gf100_identify(struct nvkm_device *device)
device->oclass[NVDEV_ENGINE_FIFO ] = gf100_fifo_oclass;
device->oclass[NVDEV_ENGINE_SW ] = gf100_sw_oclass;
device->oclass[NVDEV_ENGINE_GR ] = gf104_gr_oclass;
- device->oclass[NVDEV_ENGINE_MSPDEC ] = &gf100_mspdec_oclass;
- device->oclass[NVDEV_ENGINE_MSVLD ] = &gf100_msvld_oclass;
- device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass;
- device->oclass[NVDEV_ENGINE_CE0 ] = &gf100_ce0_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = gt215_disp_oclass;
device->oclass[NVDEV_ENGINE_PM ] = gf100_pm_oclass;
break;
@@ -70,11 +56,6 @@ gf100_identify(struct nvkm_device *device)
device->oclass[NVDEV_ENGINE_FIFO ] = gf100_fifo_oclass;
device->oclass[NVDEV_ENGINE_SW ] = gf100_sw_oclass;
device->oclass[NVDEV_ENGINE_GR ] = gf104_gr_oclass;
- device->oclass[NVDEV_ENGINE_MSPDEC ] = &gf100_mspdec_oclass;
- device->oclass[NVDEV_ENGINE_MSVLD ] = &gf100_msvld_oclass;
- device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass;
- device->oclass[NVDEV_ENGINE_CE0 ] = &gf100_ce0_oclass;
- device->oclass[NVDEV_ENGINE_CE1 ] = &gf100_ce1_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = gt215_disp_oclass;
device->oclass[NVDEV_ENGINE_PM ] = gf100_pm_oclass;
break;
@@ -83,10 +64,6 @@ gf100_identify(struct nvkm_device *device)
device->oclass[NVDEV_ENGINE_FIFO ] = gf100_fifo_oclass;
device->oclass[NVDEV_ENGINE_SW ] = gf100_sw_oclass;
device->oclass[NVDEV_ENGINE_GR ] = gf104_gr_oclass;
- device->oclass[NVDEV_ENGINE_MSPDEC ] = &gf100_mspdec_oclass;
- device->oclass[NVDEV_ENGINE_MSVLD ] = &gf100_msvld_oclass;
- device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass;
- device->oclass[NVDEV_ENGINE_CE0 ] = &gf100_ce0_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = gt215_disp_oclass;
device->oclass[NVDEV_ENGINE_PM ] = gf100_pm_oclass;
break;
@@ -95,10 +72,6 @@ gf100_identify(struct nvkm_device *device)
device->oclass[NVDEV_ENGINE_FIFO ] = gf100_fifo_oclass;
device->oclass[NVDEV_ENGINE_SW ] = gf100_sw_oclass;
device->oclass[NVDEV_ENGINE_GR ] = gf108_gr_oclass;
- device->oclass[NVDEV_ENGINE_MSPDEC ] = &gf100_mspdec_oclass;
- device->oclass[NVDEV_ENGINE_MSVLD ] = &gf100_msvld_oclass;
- device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass;
- device->oclass[NVDEV_ENGINE_CE0 ] = &gf100_ce0_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = gt215_disp_oclass;
device->oclass[NVDEV_ENGINE_PM ] = gf108_pm_oclass;
break;
@@ -107,11 +80,6 @@ gf100_identify(struct nvkm_device *device)
device->oclass[NVDEV_ENGINE_FIFO ] = gf100_fifo_oclass;
device->oclass[NVDEV_ENGINE_SW ] = gf100_sw_oclass;
device->oclass[NVDEV_ENGINE_GR ] = gf110_gr_oclass;
- device->oclass[NVDEV_ENGINE_MSPDEC ] = &gf100_mspdec_oclass;
- device->oclass[NVDEV_ENGINE_MSVLD ] = &gf100_msvld_oclass;
- device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass;
- device->oclass[NVDEV_ENGINE_CE0 ] = &gf100_ce0_oclass;
- device->oclass[NVDEV_ENGINE_CE1 ] = &gf100_ce1_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = gt215_disp_oclass;
device->oclass[NVDEV_ENGINE_PM ] = gf100_pm_oclass;
break;
@@ -120,10 +88,6 @@ gf100_identify(struct nvkm_device *device)
device->oclass[NVDEV_ENGINE_FIFO ] = gf100_fifo_oclass;
device->oclass[NVDEV_ENGINE_SW ] = gf100_sw_oclass;
device->oclass[NVDEV_ENGINE_GR ] = gf119_gr_oclass;
- device->oclass[NVDEV_ENGINE_MSPDEC ] = &gf100_mspdec_oclass;
- device->oclass[NVDEV_ENGINE_MSVLD ] = &gf100_msvld_oclass;
- device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass;
- device->oclass[NVDEV_ENGINE_CE0 ] = &gf100_ce0_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = gf110_disp_oclass;
device->oclass[NVDEV_ENGINE_PM ] = gf117_pm_oclass;
break;
@@ -132,10 +96,6 @@ gf100_identify(struct nvkm_device *device)
device->oclass[NVDEV_ENGINE_FIFO ] = gf100_fifo_oclass;
device->oclass[NVDEV_ENGINE_SW ] = gf100_sw_oclass;
device->oclass[NVDEV_ENGINE_GR ] = gf117_gr_oclass;
- device->oclass[NVDEV_ENGINE_MSPDEC ] = &gf100_mspdec_oclass;
- device->oclass[NVDEV_ENGINE_MSVLD ] = &gf100_msvld_oclass;
- device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass;
- device->oclass[NVDEV_ENGINE_CE0 ] = &gf100_ce0_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = gf110_disp_oclass;
device->oclass[NVDEV_ENGINE_PM ] = gf117_pm_oclass;
break;
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/gk104.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/gk104.c
index 414ff61..1162c03 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/device/gk104.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/gk104.c
@@ -36,9 +36,6 @@ gk104_identify(struct nvkm_device *device)
device->oclass[NVDEV_ENGINE_CE0 ] = &gk104_ce0_oclass;
device->oclass[NVDEV_ENGINE_CE1 ] = &gk104_ce1_oclass;
device->oclass[NVDEV_ENGINE_CE2 ] = &gk104_ce2_oclass;
- device->oclass[NVDEV_ENGINE_MSVLD ] = &gk104_msvld_oclass;
- device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass;
- device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass;
device->oclass[NVDEV_ENGINE_PM ] = gk104_pm_oclass;
break;
case 0xe7:
@@ -50,9 +47,6 @@ gk104_identify(struct nvkm_device *device)
device->oclass[NVDEV_ENGINE_CE0 ] = &gk104_ce0_oclass;
device->oclass[NVDEV_ENGINE_CE1 ] = &gk104_ce1_oclass;
device->oclass[NVDEV_ENGINE_CE2 ] = &gk104_ce2_oclass;
- device->oclass[NVDEV_ENGINE_MSVLD ] = &gk104_msvld_oclass;
- device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass;
- device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass;
device->oclass[NVDEV_ENGINE_PM ] = gk104_pm_oclass;
break;
case 0xe6:
@@ -64,9 +58,6 @@ gk104_identify(struct nvkm_device *device)
device->oclass[NVDEV_ENGINE_CE0 ] = &gk104_ce0_oclass;
device->oclass[NVDEV_ENGINE_CE1 ] = &gk104_ce1_oclass;
device->oclass[NVDEV_ENGINE_CE2 ] = &gk104_ce2_oclass;
- device->oclass[NVDEV_ENGINE_MSVLD ] = &gk104_msvld_oclass;
- device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass;
- device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass;
device->oclass[NVDEV_ENGINE_PM ] = gk104_pm_oclass;
break;
case 0xea:
@@ -86,9 +77,6 @@ gk104_identify(struct nvkm_device *device)
device->oclass[NVDEV_ENGINE_CE0 ] = &gk104_ce0_oclass;
device->oclass[NVDEV_ENGINE_CE1 ] = &gk104_ce1_oclass;
device->oclass[NVDEV_ENGINE_CE2 ] = &gk104_ce2_oclass;
- device->oclass[NVDEV_ENGINE_MSVLD ] = &gk104_msvld_oclass;
- device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass;
- device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass;
device->oclass[NVDEV_ENGINE_PM ] = &gk110_pm_oclass;
break;
case 0xf1:
@@ -100,9 +88,6 @@ gk104_identify(struct nvkm_device *device)
device->oclass[NVDEV_ENGINE_CE0 ] = &gk104_ce0_oclass;
device->oclass[NVDEV_ENGINE_CE1 ] = &gk104_ce1_oclass;
device->oclass[NVDEV_ENGINE_CE2 ] = &gk104_ce2_oclass;
- device->oclass[NVDEV_ENGINE_MSVLD ] = &gk104_msvld_oclass;
- device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass;
- device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass;
device->oclass[NVDEV_ENGINE_PM ] = &gk110_pm_oclass;
break;
case 0x106:
@@ -114,9 +99,6 @@ gk104_identify(struct nvkm_device *device)
device->oclass[NVDEV_ENGINE_CE0 ] = &gk104_ce0_oclass;
device->oclass[NVDEV_ENGINE_CE1 ] = &gk104_ce1_oclass;
device->oclass[NVDEV_ENGINE_CE2 ] = &gk104_ce2_oclass;
- device->oclass[NVDEV_ENGINE_MSVLD ] = &gk104_msvld_oclass;
- device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass;
- device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass;
break;
case 0x108:
device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass;
@@ -127,9 +109,6 @@ gk104_identify(struct nvkm_device *device)
device->oclass[NVDEV_ENGINE_CE0 ] = &gk104_ce0_oclass;
device->oclass[NVDEV_ENGINE_CE1 ] = &gk104_ce1_oclass;
device->oclass[NVDEV_ENGINE_CE2 ] = &gk104_ce2_oclass;
- device->oclass[NVDEV_ENGINE_MSVLD ] = &gk104_msvld_oclass;
- device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass;
- device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass;
break;
default:
return -EINVAL;
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c
index c16d958..b7b10ca4 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c
@@ -42,9 +42,6 @@ gm100_identify(struct nvkm_device *device)
#endif
device->oclass[NVDEV_ENGINE_CE2 ] = &gk104_ce2_oclass;
#if 0
- device->oclass[NVDEV_ENGINE_MSVLD ] = &gk104_msvld_oclass;
- device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass;
- device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass;
#endif
break;
case 0x124:
@@ -63,9 +60,6 @@ gm100_identify(struct nvkm_device *device)
device->oclass[NVDEV_ENGINE_CE1 ] = &gm204_ce1_oclass;
device->oclass[NVDEV_ENGINE_CE2 ] = &gm204_ce2_oclass;
#if 0
- device->oclass[NVDEV_ENGINE_MSVLD ] = &gk104_msvld_oclass;
- device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass;
- device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass;
#endif
break;
case 0x126:
@@ -84,9 +78,6 @@ gm100_identify(struct nvkm_device *device)
device->oclass[NVDEV_ENGINE_CE1 ] = &gm204_ce1_oclass;
device->oclass[NVDEV_ENGINE_CE2 ] = &gm204_ce2_oclass;
#if 0
- device->oclass[NVDEV_ENGINE_MSVLD ] = &gk104_msvld_oclass;
- device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass;
- device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass;
#endif
break;
case 0x12b:
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/nv50.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/nv50.c
index 7e2a4a9..bcbf2d8 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/device/nv50.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/nv50.c
@@ -101,10 +101,6 @@ nv50_identify(struct nvkm_device *device)
device->oclass[NVDEV_ENGINE_FIFO ] = g84_fifo_oclass;
device->oclass[NVDEV_ENGINE_SW ] = nv50_sw_oclass;
device->oclass[NVDEV_ENGINE_GR ] = &nv50_gr_oclass;
- device->oclass[NVDEV_ENGINE_MSPDEC ] = &g98_mspdec_oclass;
- device->oclass[NVDEV_ENGINE_SEC ] = &g98_sec_oclass;
- device->oclass[NVDEV_ENGINE_MSVLD ] = &g98_msvld_oclass;
- device->oclass[NVDEV_ENGINE_MSPPP ] = &g98_msppp_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = g94_disp_oclass;
device->oclass[NVDEV_ENGINE_PM ] = g84_pm_oclass;
break;
@@ -125,10 +121,6 @@ nv50_identify(struct nvkm_device *device)
device->oclass[NVDEV_ENGINE_FIFO ] = g84_fifo_oclass;
device->oclass[NVDEV_ENGINE_SW ] = nv50_sw_oclass;
device->oclass[NVDEV_ENGINE_GR ] = &nv50_gr_oclass;
- device->oclass[NVDEV_ENGINE_MSPDEC ] = &g98_mspdec_oclass;
- device->oclass[NVDEV_ENGINE_SEC ] = &g98_sec_oclass;
- device->oclass[NVDEV_ENGINE_MSVLD ] = &g98_msvld_oclass;
- device->oclass[NVDEV_ENGINE_MSPPP ] = &g98_msppp_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = g94_disp_oclass;
device->oclass[NVDEV_ENGINE_PM ] = g84_pm_oclass;
break;
@@ -137,10 +129,6 @@ nv50_identify(struct nvkm_device *device)
device->oclass[NVDEV_ENGINE_FIFO ] = g84_fifo_oclass;
device->oclass[NVDEV_ENGINE_SW ] = nv50_sw_oclass;
device->oclass[NVDEV_ENGINE_GR ] = &nv50_gr_oclass;
- device->oclass[NVDEV_ENGINE_MSPDEC ] = &g98_mspdec_oclass;
- device->oclass[NVDEV_ENGINE_SEC ] = &g98_sec_oclass;
- device->oclass[NVDEV_ENGINE_MSVLD ] = &g98_msvld_oclass;
- device->oclass[NVDEV_ENGINE_MSPPP ] = &g98_msppp_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = g94_disp_oclass;
device->oclass[NVDEV_ENGINE_PM ] = g84_pm_oclass;
break;
@@ -150,10 +138,6 @@ nv50_identify(struct nvkm_device *device)
device->oclass[NVDEV_ENGINE_SW ] = nv50_sw_oclass;
device->oclass[NVDEV_ENGINE_GR ] = &nv50_gr_oclass;
device->oclass[NVDEV_ENGINE_MPEG ] = &g84_mpeg_oclass;
- device->oclass[NVDEV_ENGINE_MSPDEC ] = &g98_mspdec_oclass;
- device->oclass[NVDEV_ENGINE_MSVLD ] = &g98_msvld_oclass;
- device->oclass[NVDEV_ENGINE_MSPPP ] = &g98_msppp_oclass;
- device->oclass[NVDEV_ENGINE_CE0 ] = &gt215_ce_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = gt215_disp_oclass;
device->oclass[NVDEV_ENGINE_PM ] = gt215_pm_oclass;
break;
@@ -162,10 +146,6 @@ nv50_identify(struct nvkm_device *device)
device->oclass[NVDEV_ENGINE_FIFO ] = g84_fifo_oclass;
device->oclass[NVDEV_ENGINE_SW ] = nv50_sw_oclass;
device->oclass[NVDEV_ENGINE_GR ] = &nv50_gr_oclass;
- device->oclass[NVDEV_ENGINE_MSPDEC ] = &g98_mspdec_oclass;
- device->oclass[NVDEV_ENGINE_MSVLD ] = &g98_msvld_oclass;
- device->oclass[NVDEV_ENGINE_MSPPP ] = &g98_msppp_oclass;
- device->oclass[NVDEV_ENGINE_CE0 ] = &gt215_ce_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = gt215_disp_oclass;
device->oclass[NVDEV_ENGINE_PM ] = gt215_pm_oclass;
break;
@@ -174,10 +154,6 @@ nv50_identify(struct nvkm_device *device)
device->oclass[NVDEV_ENGINE_FIFO ] = g84_fifo_oclass;
device->oclass[NVDEV_ENGINE_SW ] = nv50_sw_oclass;
device->oclass[NVDEV_ENGINE_GR ] = &nv50_gr_oclass;
- device->oclass[NVDEV_ENGINE_MSPDEC ] = &g98_mspdec_oclass;
- device->oclass[NVDEV_ENGINE_MSVLD ] = &g98_msvld_oclass;
- device->oclass[NVDEV_ENGINE_MSPPP ] = &g98_msppp_oclass;
- device->oclass[NVDEV_ENGINE_CE0 ] = &gt215_ce_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = gt215_disp_oclass;
device->oclass[NVDEV_ENGINE_PM ] = gt215_pm_oclass;
break;
@@ -186,10 +162,6 @@ nv50_identify(struct nvkm_device *device)
device->oclass[NVDEV_ENGINE_FIFO ] = g84_fifo_oclass;
device->oclass[NVDEV_ENGINE_SW ] = nv50_sw_oclass;
device->oclass[NVDEV_ENGINE_GR ] = &nv50_gr_oclass;
- device->oclass[NVDEV_ENGINE_MSPDEC ] = &g98_mspdec_oclass;
- device->oclass[NVDEV_ENGINE_MSVLD ] = &g98_msvld_oclass;
- device->oclass[NVDEV_ENGINE_MSPPP ] = &g98_msppp_oclass;
- device->oclass[NVDEV_ENGINE_CE0 ] = &gt215_ce_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = gt215_disp_oclass;
device->oclass[NVDEV_ENGINE_PM ] = gt215_pm_oclass;
break;
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