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-rw-r--r--drivers/clocksource/sh_cmt.c31
-rw-r--r--drivers/clocksource/sh_tmu.c31
2 files changed, 35 insertions, 27 deletions
diff --git a/drivers/clocksource/sh_cmt.c b/drivers/clocksource/sh_cmt.c
index f975d24..036e586 100644
--- a/drivers/clocksource/sh_cmt.c
+++ b/drivers/clocksource/sh_cmt.c
@@ -24,6 +24,7 @@
#include <linux/ioport.h>
#include <linux/io.h>
#include <linux/clk.h>
+#include <linux/pm_runtime.h>
#include <linux/irq.h>
#include <linux/err.h>
#include <linux/clocksource.h>
@@ -152,10 +153,12 @@ static int sh_cmt_enable(struct sh_cmt_priv *p, unsigned long *rate)
{
int ret;
- /* enable clock */
+ /* wake up device and enable clock */
+ pm_runtime_get_sync(&p->pdev->dev);
ret = clk_enable(p->clk);
if (ret) {
dev_err(&p->pdev->dev, "cannot enable clock\n");
+ pm_runtime_put_sync(&p->pdev->dev);
return ret;
}
@@ -187,8 +190,9 @@ static void sh_cmt_disable(struct sh_cmt_priv *p)
/* disable interrupts in CMT block */
sh_cmt_write(p, CMCSR, 0);
- /* stop clock */
+ /* stop clock and mark device as idle */
clk_disable(p->clk);
+ pm_runtime_put_sync(&p->pdev->dev);
}
/* private flags */
@@ -416,11 +420,15 @@ static cycle_t sh_cmt_clocksource_read(struct clocksource *cs)
static int sh_cmt_clocksource_enable(struct clocksource *cs)
{
+ int ret;
struct sh_cmt_priv *p = cs_to_sh_cmt(cs);
p->total_cycles = 0;
- return sh_cmt_start(p, FLAG_CLOCKSOURCE);
+ ret = sh_cmt_start(p, FLAG_CLOCKSOURCE);
+ if (!ret)
+ __clocksource_updatefreq_hz(cs, p->rate);
+ return ret;
}
static void sh_cmt_clocksource_disable(struct clocksource *cs)
@@ -448,19 +456,10 @@ static int sh_cmt_register_clocksource(struct sh_cmt_priv *p,
cs->mask = CLOCKSOURCE_MASK(sizeof(unsigned long) * 8);
cs->flags = CLOCK_SOURCE_IS_CONTINUOUS;
- /* clk_get_rate() needs an enabled clock */
- clk_enable(p->clk);
- p->rate = clk_get_rate(p->clk) / ((p->width == 16) ? 512 : 8);
- clk_disable(p->clk);
-
- /* TODO: calculate good shift from rate and counter bit width */
- cs->shift = 0;
- cs->mult = clocksource_hz2mult(p->rate, cs->shift);
-
dev_info(&p->pdev->dev, "used as clock source\n");
- clocksource_register(cs);
-
+ /* Register with dummy 1 Hz value, gets updated in ->enable() */
+ clocksource_register_hz(cs, 1);
return 0;
}
@@ -665,6 +664,7 @@ static int __devinit sh_cmt_probe(struct platform_device *pdev)
if (p) {
dev_info(&pdev->dev, "kept as earlytimer\n");
+ pm_runtime_enable(&pdev->dev);
return 0;
}
@@ -679,6 +679,9 @@ static int __devinit sh_cmt_probe(struct platform_device *pdev)
kfree(p);
platform_set_drvdata(pdev, NULL);
}
+
+ if (!is_early_platform_device(pdev))
+ pm_runtime_enable(&pdev->dev);
return ret;
}
diff --git a/drivers/clocksource/sh_tmu.c b/drivers/clocksource/sh_tmu.c
index 36aba99..1729628 100644
--- a/drivers/clocksource/sh_tmu.c
+++ b/drivers/clocksource/sh_tmu.c
@@ -25,6 +25,7 @@
#include <linux/delay.h>
#include <linux/io.h>
#include <linux/clk.h>
+#include <linux/pm_runtime.h>
#include <linux/irq.h>
#include <linux/err.h>
#include <linux/clocksource.h>
@@ -109,10 +110,12 @@ static int sh_tmu_enable(struct sh_tmu_priv *p)
{
int ret;
- /* enable clock */
+ /* wake up device and enable clock */
+ pm_runtime_get_sync(&p->pdev->dev);
ret = clk_enable(p->clk);
if (ret) {
dev_err(&p->pdev->dev, "cannot enable clock\n");
+ pm_runtime_put_sync(&p->pdev->dev);
return ret;
}
@@ -141,8 +144,9 @@ static void sh_tmu_disable(struct sh_tmu_priv *p)
/* disable interrupts in TMU block */
sh_tmu_write(p, TCR, 0x0000);
- /* stop clock */
+ /* stop clock and mark device as idle */
clk_disable(p->clk);
+ pm_runtime_put_sync(&p->pdev->dev);
}
static void sh_tmu_set_next(struct sh_tmu_priv *p, unsigned long delta,
@@ -199,8 +203,12 @@ static cycle_t sh_tmu_clocksource_read(struct clocksource *cs)
static int sh_tmu_clocksource_enable(struct clocksource *cs)
{
struct sh_tmu_priv *p = cs_to_sh_tmu(cs);
+ int ret;
- return sh_tmu_enable(p);
+ ret = sh_tmu_enable(p);
+ if (!ret)
+ __clocksource_updatefreq_hz(cs, p->rate);
+ return ret;
}
static void sh_tmu_clocksource_disable(struct clocksource *cs)
@@ -221,17 +229,10 @@ static int sh_tmu_register_clocksource(struct sh_tmu_priv *p,
cs->mask = CLOCKSOURCE_MASK(32);
cs->flags = CLOCK_SOURCE_IS_CONTINUOUS;
- /* clk_get_rate() needs an enabled clock */
- clk_enable(p->clk);
- /* channel will be configured at parent clock / 4 */
- p->rate = clk_get_rate(p->clk) / 4;
- clk_disable(p->clk);
- /* TODO: calculate good shift from rate and counter bit width */
- cs->shift = 10;
- cs->mult = clocksource_hz2mult(p->rate, cs->shift);
-
dev_info(&p->pdev->dev, "used as clock source\n");
- clocksource_register(cs);
+
+ /* Register with dummy 1 Hz value, gets updated in ->enable() */
+ clocksource_register_hz(cs, 1);
return 0;
}
@@ -414,6 +415,7 @@ static int __devinit sh_tmu_probe(struct platform_device *pdev)
if (p) {
dev_info(&pdev->dev, "kept as earlytimer\n");
+ pm_runtime_enable(&pdev->dev);
return 0;
}
@@ -428,6 +430,9 @@ static int __devinit sh_tmu_probe(struct platform_device *pdev)
kfree(p);
platform_set_drvdata(pdev, NULL);
}
+
+ if (!is_early_platform_device(pdev))
+ pm_runtime_enable(&pdev->dev);
return ret;
}
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