diff options
Diffstat (limited to 'drivers/clk/rockchip/clk-mmc-phase.c')
| -rw-r--r-- | drivers/clk/rockchip/clk-mmc-phase.c | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/drivers/clk/rockchip/clk-mmc-phase.c b/drivers/clk/rockchip/clk-mmc-phase.c index bc24e5a..2685644 100644 --- a/drivers/clk/rockchip/clk-mmc-phase.c +++ b/drivers/clk/rockchip/clk-mmc-phase.c @@ -41,6 +41,8 @@ static unsigned long rockchip_mmc_recalc(struct clk_hw *hw, #define ROCKCHIP_MMC_DEGREE_MASK 0x3 #define ROCKCHIP_MMC_DELAYNUM_OFFSET 2 #define ROCKCHIP_MMC_DELAYNUM_MASK (0xff << ROCKCHIP_MMC_DELAYNUM_OFFSET) +#define ROCKCHIP_MMC_INIT_STATE_RESET 0x1 +#define ROCKCHIP_MMC_INIT_STATE_SHIFT 1 #define PSECS_PER_SEC 1000000000000LL @@ -159,6 +161,15 @@ struct clk *rockchip_clk_register_mmc(const char *name, mmc_clock->reg = reg; mmc_clock->shift = shift; + /* + * Assert init_state to soft reset the CLKGEN + * for mmc tuning phase and degree + */ + if (mmc_clock->shift == ROCKCHIP_MMC_INIT_STATE_SHIFT) + writel(HIWORD_UPDATE(ROCKCHIP_MMC_INIT_STATE_RESET, + ROCKCHIP_MMC_INIT_STATE_RESET, + mmc_clock->shift), mmc_clock->reg); + clk = clk_register(NULL, &mmc_clock->hw); if (IS_ERR(clk)) goto err_free; |
