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-rw-r--r--drivers/atm/ambassador.c2
-rw-r--r--drivers/atm/firestream.c2
-rw-r--r--drivers/atm/fore200e.h4
-rw-r--r--drivers/atm/horizon.c10
-rw-r--r--drivers/atm/idt77252.c2
-rw-r--r--drivers/atm/idt77252.h2
-rw-r--r--drivers/atm/iphase.c6
-rw-r--r--drivers/atm/lanai.c4
8 files changed, 16 insertions, 16 deletions
diff --git a/drivers/atm/ambassador.c b/drivers/atm/ambassador.c
index 9f47e86..a5fcb1e 100644
--- a/drivers/atm/ambassador.c
+++ b/drivers/atm/ambassador.c
@@ -497,7 +497,7 @@ static void rx_complete (amb_dev * dev, rx_out * rx) {
// VC layer stats
atomic_inc(&atm_vcc->stats->rx);
__net_timestamp(skb);
- // end of our responsability
+ // end of our responsibility
atm_vcc->push (atm_vcc, skb);
return;
diff --git a/drivers/atm/firestream.c b/drivers/atm/firestream.c
index 049650d..ef7a658 100644
--- a/drivers/atm/firestream.c
+++ b/drivers/atm/firestream.c
@@ -1782,7 +1782,7 @@ static int __devinit fs_init (struct fs_dev *dev)
write_fs (dev, RAS0, RAS0_DCD_XHLT
| (((1 << FS155_VPI_BITS) - 1) * RAS0_VPSEL)
| (((1 << FS155_VCI_BITS) - 1) * RAS0_VCSEL));
- /* We can chose the split arbitarily. We might be able to
+ /* We can chose the split arbitrarily. We might be able to
support more. Whatever. This should do for now. */
dev->atm_dev->ci_range.vpi_bits = FS155_VPI_BITS;
dev->atm_dev->ci_range.vci_bits = FS155_VCI_BITS;
diff --git a/drivers/atm/fore200e.h b/drivers/atm/fore200e.h
index 7f97c09..ba34a02 100644
--- a/drivers/atm/fore200e.h
+++ b/drivers/atm/fore200e.h
@@ -263,7 +263,7 @@ typedef enum opcode {
} opcode_t;
-/* virtual path / virtual channel identifers */
+/* virtual path / virtual channel identifiers */
typedef struct vpvc {
BITFIELD3(
@@ -926,7 +926,7 @@ typedef struct fore200e_vcc {
#define PCA200E_PCI_LATENCY 0x40 /* maximum slave latenty */
#define PCA200E_PCI_MASTER_CTRL 0x41 /* master control */
-#define PCA200E_PCI_THRESHOLD 0x42 /* burst / continous req threshold */
+#define PCA200E_PCI_THRESHOLD 0x42 /* burst / continuous req threshold */
/* PBI master control register */
diff --git a/drivers/atm/horizon.c b/drivers/atm/horizon.c
index 24761e1..d58e3fc 100644
--- a/drivers/atm/horizon.c
+++ b/drivers/atm/horizon.c
@@ -169,13 +169,13 @@ static inline void __init show_version (void) {
Real Time (cdv and max CDT given)
CBR(pcr) pcr bandwidth always available
- rtVBR(pcr,scr,mbs) scr bandwidth always available, upto pcr at mbs too
+ rtVBR(pcr,scr,mbs) scr bandwidth always available, up to pcr at mbs too
Non Real Time
- nrtVBR(pcr,scr,mbs) scr bandwidth always available, upto pcr at mbs too
+ nrtVBR(pcr,scr,mbs) scr bandwidth always available, up to pcr at mbs too
UBR()
- ABR(mcr,pcr) mcr bandwidth always available, upto pcr (depending) too
+ ABR(mcr,pcr) mcr bandwidth always available, up to pcr (depending) too
mbs is max burst size (bucket)
pcr and scr have associated cdvt values
@@ -944,7 +944,7 @@ static void hrz_close_rx (hrz_dev * dev, u16 vc) {
// to be fixed soon, so do not define TAILRECUSRIONWORKS unless you
// are sure it does as you may otherwise overflow the kernel stack.
-// giving this fn a return value would help GCC, alledgedly
+// giving this fn a return value would help GCC, allegedly
static void rx_schedule (hrz_dev * dev, int irq) {
unsigned int rx_bytes;
@@ -1036,7 +1036,7 @@ static void rx_schedule (hrz_dev * dev, int irq) {
// VC layer stats
atomic_inc(&vcc->stats->rx);
__net_timestamp(skb);
- // end of our responsability
+ // end of our responsibility
vcc->push (vcc, skb);
}
}
diff --git a/drivers/atm/idt77252.c b/drivers/atm/idt77252.c
index bfb7fee..048f99f 100644
--- a/drivers/atm/idt77252.c
+++ b/drivers/atm/idt77252.c
@@ -3495,7 +3495,7 @@ init_card(struct atm_dev *dev)
return -1;
}
if (dev->phy->ioctl == NULL) {
- printk("%s: LT had no IOCTL funtion defined.\n", card->name);
+ printk("%s: LT had no IOCTL function defined.\n", card->name);
deinit_card(card);
return -1;
}
diff --git a/drivers/atm/idt77252.h b/drivers/atm/idt77252.h
index f53a43a..3a82cc2 100644
--- a/drivers/atm/idt77252.h
+++ b/drivers/atm/idt77252.h
@@ -766,7 +766,7 @@ struct idt77252_dev
#define SAR_RCTE_BUFFSTAT_MASK 0x00003000 /* buffer status */
#define SAR_RCTE_EFCI 0x00000800 /* EFCI Congestion flag */
#define SAR_RCTE_CLP 0x00000400 /* Cell Loss Priority flag */
-#define SAR_RCTE_CRC 0x00000200 /* Recieved CRC Error */
+#define SAR_RCTE_CRC 0x00000200 /* Received CRC Error */
#define SAR_RCTE_CELLCNT_MASK 0x000001FF /* cell Count */
#define SAR_RCTE_AAL0 0x00000000 /* AAL types for ALL field */
diff --git a/drivers/atm/iphase.c b/drivers/atm/iphase.c
index d80d51b..1c674a9 100644
--- a/drivers/atm/iphase.c
+++ b/drivers/atm/iphase.c
@@ -1025,7 +1025,7 @@ static void desc_dbg(IADEV *iadev) {
}
-/*----------------------------- Recieving side stuff --------------------------*/
+/*----------------------------- Receiving side stuff --------------------------*/
static void rx_excp_rcvd(struct atm_dev *dev)
{
@@ -1195,7 +1195,7 @@ static void rx_intr(struct atm_dev *dev)
if (status & RX_PKT_RCVD)
{
/* do something */
- /* Basically recvd an interrupt for receving a packet.
+ /* Basically recvd an interrupt for receiving a packet.
A descriptor would have been written to the packet complete
queue. Get all the descriptors and set up dma to move the
packets till the packet complete queue is empty..
@@ -1855,7 +1855,7 @@ static int open_tx(struct atm_vcc *vcc)
return -EINVAL;
}
if (vcc->qos.txtp.max_pcr > iadev->LineRate) {
- IF_CBR(printk("PCR is not availble\n");)
+ IF_CBR(printk("PCR is not available\n");)
return -1;
}
vc->type = CBR;
diff --git a/drivers/atm/lanai.c b/drivers/atm/lanai.c
index 52880c8..4e8ba56 100644
--- a/drivers/atm/lanai.c
+++ b/drivers/atm/lanai.c
@@ -1255,7 +1255,7 @@ static inline void lanai_endtx(struct lanai_dev *lanai,
/*
* Since the "butt register" is a shared resounce on the card we
* serialize all accesses to it through this spinlock. This is
- * mostly just paranoia sicne the register is rarely "busy" anyway
+ * mostly just paranoia since the register is rarely "busy" anyway
* but is needed for correctness.
*/
spin_lock(&lanai->endtxlock);
@@ -1990,7 +1990,7 @@ static int __devinit lanai_pci_start(struct lanai_dev *lanai)
/*
* We _can_ use VCI==0 for normal traffic, but only for UBR (or we'll
- * get a CBRZERO interrupt), and we can use it only if noone is receiving
+ * get a CBRZERO interrupt), and we can use it only if no one is receiving
* AAL0 traffic (since they will use the same queue) - according to the
* docs we shouldn't even use it for AAL0 traffic
*/
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