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-rw-r--r--arch/arm/mach-msm/include/mach/entry-macro-qgic.S2
-rw-r--r--arch/m68k/mac/psc.c2
2 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/mach-msm/include/mach/entry-macro-qgic.S b/arch/arm/mach-msm/include/mach/entry-macro-qgic.S
index 4dc99aa..1246715 100644
--- a/arch/arm/mach-msm/include/mach/entry-macro-qgic.S
+++ b/arch/arm/mach-msm/include/mach/entry-macro-qgic.S
@@ -26,7 +26,7 @@
* The interrupt numbering scheme is defined in the
* interrupt controller spec. To wit:
*
- * Migrated the code from ARM MP port to be more consistant
+ * Migrated the code from ARM MP port to be more consistent
* with interrupt processing , the following still holds true
* however, all interrupts are treated the same regardless of
* if they are local IPI or PPI
diff --git a/arch/m68k/mac/psc.c b/arch/m68k/mac/psc.c
index ba6ccab..a4c3eb6 100644
--- a/arch/m68k/mac/psc.c
+++ b/arch/m68k/mac/psc.c
@@ -88,7 +88,7 @@ void __init psc_init(void)
/*
* The PSC is always at the same spot, but using psc
- * keeps things consisant with the psc_xxxx functions.
+ * keeps things consistent with the psc_xxxx functions.
*/
psc = (void *) PSC_BASE;
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