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-rw-r--r--arch/arm/boot/dts/sunxi.dtsi16
1 files changed, 8 insertions, 8 deletions
diff --git a/arch/arm/boot/dts/sunxi.dtsi b/arch/arm/boot/dts/sunxi.dtsi
index acf7777..dfbb98b 100644
--- a/arch/arm/boot/dts/sunxi.dtsi
+++ b/arch/arm/boot/dts/sunxi.dtsi
@@ -47,7 +47,7 @@
osc24M: osc24M@01c20050 {
#clock-cells = <0>;
- compatible = "allwinner,sunxi-osc-clk";
+ compatible = "allwinner,sun4i-osc-clk";
reg = <0x01c20050 0x4>;
clocks = <&osc24M_fixed>;
};
@@ -60,7 +60,7 @@
pll1: pll1@01c20000 {
#clock-cells = <0>;
- compatible = "allwinner,sunxi-pll1-clk";
+ compatible = "allwinner,sun4i-pll1-clk";
reg = <0x01c20000 0x4>;
clocks = <&osc24M>;
};
@@ -68,28 +68,28 @@
/* dummy is 200M */
cpu: cpu@01c20054 {
#clock-cells = <0>;
- compatible = "allwinner,sunxi-cpu-clk";
+ compatible = "allwinner,sun4i-cpu-clk";
reg = <0x01c20054 0x4>;
clocks = <&osc32k>, <&osc24M>, <&pll1>, <&dummy>;
};
axi: axi@01c20054 {
#clock-cells = <0>;
- compatible = "allwinner,sunxi-axi-clk";
+ compatible = "allwinner,sun4i-axi-clk";
reg = <0x01c20054 0x4>;
clocks = <&cpu>;
};
ahb: ahb@01c20054 {
#clock-cells = <0>;
- compatible = "allwinner,sunxi-ahb-clk";
+ compatible = "allwinner,sun4i-ahb-clk";
reg = <0x01c20054 0x4>;
clocks = <&axi>;
};
apb0: apb0@01c20054 {
#clock-cells = <0>;
- compatible = "allwinner,sunxi-apb0-clk";
+ compatible = "allwinner,sun4i-apb0-clk";
reg = <0x01c20054 0x4>;
clocks = <&ahb>;
};
@@ -97,14 +97,14 @@
/* dummy is pll62 */
apb1_mux: apb1_mux@01c20058 {
#clock-cells = <0>;
- compatible = "allwinner,sunxi-apb1-mux-clk";
+ compatible = "allwinner,sun4i-apb1-mux-clk";
reg = <0x01c20058 0x4>;
clocks = <&osc24M>, <&dummy>, <&osc32k>;
};
apb1: apb1@01c20058 {
#clock-cells = <0>;
- compatible = "allwinner,sunxi-apb1-clk";
+ compatible = "allwinner,sun4i-apb1-clk";
reg = <0x01c20058 0x4>;
clocks = <&apb1_mux>;
};
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