diff options
Diffstat (limited to 'arch')
201 files changed, 1536 insertions, 12295 deletions
diff --git a/arch/arc/include/asm/processor.h b/arch/arc/include/asm/processor.h index 4e54729..52312cb 100644 --- a/arch/arc/include/asm/processor.h +++ b/arch/arc/include/asm/processor.h @@ -47,9 +47,6 @@ struct thread_struct { /* Forward declaration, a strange C thing */ struct task_struct; -/* Return saved PC of a blocked thread */ -unsigned long thread_saved_pc(struct task_struct *t); - #define task_pt_regs(p) \ ((struct pt_regs *)(THREAD_SIZE + (void *)task_stack_page(p)) - 1) @@ -72,18 +69,21 @@ unsigned long thread_saved_pc(struct task_struct *t); #define release_segments(mm) do { } while (0) #define KSTK_EIP(tsk) (task_pt_regs(tsk)->ret) +#define KSTK_ESP(tsk) (task_pt_regs(tsk)->sp) /* * Where abouts of Task's sp, fp, blink when it was last seen in kernel mode. * Look in process.c for details of kernel stack layout */ -#define KSTK_ESP(tsk) (tsk->thread.ksp) +#define TSK_K_ESP(tsk) (tsk->thread.ksp) -#define KSTK_REG(tsk, off) (*((unsigned int *)(KSTK_ESP(tsk) + \ +#define TSK_K_REG(tsk, off) (*((unsigned int *)(TSK_K_ESP(tsk) + \ sizeof(struct callee_regs) + off))) -#define KSTK_BLINK(tsk) KSTK_REG(tsk, 4) -#define KSTK_FP(tsk) KSTK_REG(tsk, 0) +#define TSK_K_BLINK(tsk) TSK_K_REG(tsk, 4) +#define TSK_K_FP(tsk) TSK_K_REG(tsk, 0) + +#define thread_saved_pc(tsk) TSK_K_BLINK(tsk) extern void start_thread(struct pt_regs * regs, unsigned long pc, unsigned long usp); diff --git a/arch/arc/include/asm/stacktrace.h b/arch/arc/include/asm/stacktrace.h new file mode 100644 index 0000000..b29b606 --- /dev/null +++ b/arch/arc/include/asm/stacktrace.h @@ -0,0 +1,37 @@ +/* + * Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com) + * Copyright (C) 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com) + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ASM_STACKTRACE_H +#define __ASM_STACKTRACE_H + +#include <linux/sched.h> + +/** + * arc_unwind_core - Unwind the kernel mode stack for an execution context + * @tsk: NULL for current task, specific task otherwise + * @regs: pt_regs used to seed the unwinder {SP, FP, BLINK, PC} + * If NULL, use pt_regs of @tsk (if !NULL) otherwise + * use the current values of {SP, FP, BLINK, PC} + * @consumer_fn: Callback invoked for each frame unwound + * Returns 0 to continue unwinding, -1 to stop + * @arg: Arg to callback + * + * Returns the address of first function in stack + * + * Semantics: + * - synchronous unwinding (e.g. dump_stack): @tsk NULL, @regs NULL + * - Asynchronous unwinding of sleeping task: @tsk !NULL, @regs NULL + * - Asynchronous unwinding of intr/excp etc: @tsk !NULL, @regs !NULL + */ +notrace noinline unsigned int arc_unwind_core( + struct task_struct *tsk, struct pt_regs *regs, + int (*consumer_fn) (unsigned int, void *), + void *arg); + +#endif /* __ASM_STACKTRACE_H */ diff --git a/arch/arc/kernel/process.c b/arch/arc/kernel/process.c index fdd8971..98c00a2 100644 --- a/arch/arc/kernel/process.c +++ b/arch/arc/kernel/process.c @@ -192,29 +192,6 @@ int dump_fpu(struct pt_regs *regs, elf_fpregset_t *fpu) return 0; } -/* - * API: expected by schedular Code: If thread is sleeping where is that. - * What is this good for? it will be always the scheduler or ret_from_fork. - * So we hard code that anyways. - */ -unsigned long thread_saved_pc(struct task_struct *t) -{ - struct pt_regs *regs = task_pt_regs(t); - unsigned long blink = 0; - - /* - * If the thread being queried for in not itself calling this, then it - * implies it is not executing, which in turn implies it is sleeping, - * which in turn implies it got switched OUT by the schedular. - * In that case, it's kernel mode blink can reliably retrieved as per - * the picture above (right above pt_regs). - */ - if (t != current && t->state != TASK_RUNNING) - blink = *((unsigned int *)regs - 1); - - return blink; -} - int elf_check_arch(const struct elf32_hdr *x) { unsigned int eflags; diff --git a/arch/arc/kernel/stacktrace.c b/arch/arc/kernel/stacktrace.c index 9ce47cf..92320d6 100644 --- a/arch/arc/kernel/stacktrace.c +++ b/arch/arc/kernel/stacktrace.c @@ -43,6 +43,10 @@ static void seed_unwind_frame_info(struct task_struct *tsk, struct pt_regs *regs, struct unwind_frame_info *frame_info) { + /* + * synchronous unwinding (e.g. dump_stack) + * - uses current values of SP and friends + */ if (tsk == NULL && regs == NULL) { unsigned long fp, sp, blink, ret; frame_info->task = current; @@ -61,12 +65,17 @@ static void seed_unwind_frame_info(struct task_struct *tsk, frame_info->regs.r63 = ret; frame_info->call_frame = 0; } else if (regs == NULL) { + /* + * Asynchronous unwinding of sleeping task + * - Gets SP etc from task's pt_regs (saved bottom of kernel + * mode stack of task) + */ frame_info->task = tsk; - frame_info->regs.r27 = KSTK_FP(tsk); - frame_info->regs.r28 = KSTK_ESP(tsk); - frame_info->regs.r31 = KSTK_BLINK(tsk); + frame_info->regs.r27 = TSK_K_FP(tsk); + frame_info->regs.r28 = TSK_K_ESP(tsk); + frame_info->regs.r31 = TSK_K_BLINK(tsk); frame_info->regs.r63 = (unsigned int)__switch_to; /* In the prologue of __switch_to, first FP is saved on stack @@ -83,6 +92,10 @@ static void seed_unwind_frame_info(struct task_struct *tsk, frame_info->call_frame = 0; } else { + /* + * Asynchronous unwinding of intr/exception + * - Just uses the pt_regs passed + */ frame_info->task = tsk; frame_info->regs.r27 = regs->fp; @@ -95,7 +108,7 @@ static void seed_unwind_frame_info(struct task_struct *tsk, #endif -static noinline unsigned int +notrace noinline unsigned int arc_unwind_core(struct task_struct *tsk, struct pt_regs *regs, int (*consumer_fn) (unsigned int, void *), void *arg) { diff --git a/arch/arc/kernel/unaligned.c b/arch/arc/kernel/unaligned.c index 7ff5b5c..74db59b 100644 --- a/arch/arc/kernel/unaligned.c +++ b/arch/arc/kernel/unaligned.c @@ -12,6 +12,7 @@ */ #include <linux/types.h> +#include <linux/perf_event.h> #include <linux/ptrace.h> #include <linux/uaccess.h> #include <asm/disasm.h> @@ -253,6 +254,7 @@ int misaligned_fixup(unsigned long address, struct pt_regs *regs, } } + perf_sw_event(PERF_COUNT_SW_ALIGNMENT_FAULTS, 1, regs, address); return 0; fault: diff --git a/arch/arc/mm/fault.c b/arch/arc/mm/fault.c index 563cb27..6a2e006 100644 --- a/arch/arc/mm/fault.c +++ b/arch/arc/mm/fault.c @@ -14,6 +14,7 @@ #include <linux/ptrace.h> #include <linux/uaccess.h> #include <linux/kdebug.h> +#include <linux/perf_event.h> #include <asm/pgalloc.h> #include <asm/mmu.h> @@ -139,13 +140,20 @@ good_area: return; } + perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, regs, address); + if (likely(!(fault & VM_FAULT_ERROR))) { if (flags & FAULT_FLAG_ALLOW_RETRY) { /* To avoid updating stats twice for retry case */ - if (fault & VM_FAULT_MAJOR) + if (fault & VM_FAULT_MAJOR) { tsk->maj_flt++; - else + perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1, + regs, address); + } else { tsk->min_flt++; + perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MIN, 1, + regs, address); + } if (fault & VM_FAULT_RETRY) { flags &= ~FAULT_FLAG_ALLOW_RETRY; diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 9f1f09a..3b11aac 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -361,9 +361,9 @@ config ARCH_AT91 select ARCH_REQUIRE_GPIOLIB select CLKDEV_LOOKUP select IRQ_DOMAIN - select NEED_MACH_IO_H if PCCARD select PINCTRL select PINCTRL_AT91 + select SOC_BUS select USE_OF help This enables support for systems based on Atmel @@ -625,18 +625,6 @@ config ARCH_PXA help Support for Intel/Marvell's PXA2xx/PXA3xx processor line. -config ARCH_MSM - bool "Qualcomm MSM (non-multiplatform)" - select ARCH_REQUIRE_GPIOLIB - select COMMON_CLK - select GENERIC_CLOCKEVENTS - help - Support for Qualcomm MSM/QSD based systems. This runs on the - apps processor of the MSM/QSD and depends on a shared memory - interface to the modem processor which runs the baseband - stack and controls some vital subsystems - (clock and power control, etc). - config ARCH_SHMOBILE_LEGACY bool "Renesas ARM SoCs (non-multiplatform)" select ARCH_SHMOBILE @@ -890,8 +878,6 @@ source "arch/arm/mach-ks8695/Kconfig" source "arch/arm/mach-meson/Kconfig" -source "arch/arm/mach-msm/Kconfig" - source "arch/arm/mach-moxart/Kconfig" source "arch/arm/mach-mv78xx0/Kconfig" diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index 970de75..750ccde 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -448,25 +448,6 @@ choice Say Y here if you want kernel low-level debugging support on MMP UART3. - config DEBUG_MSM_UART - bool "Kernel low-level debugging messages via MSM UART" - depends on ARCH_MSM - help - Say Y here if you want the debug print routines to direct - their output to the serial port on MSM devices. - - ARCH DEBUG_UART_PHYS DEBUG_UART_VIRT # - MSM7X00A, QSD8X50 0xa9a00000 0xe1000000 UART1 - MSM7X00A, QSD8X50 0xa9b00000 0xe1000000 UART2 - MSM7X00A, QSD8X50 0xa9c00000 0xe1000000 UART3 - - MSM7X30 0xaca00000 0xe1000000 UART1 - MSM7X30 0xacb00000 0xe1000000 UART2 - MSM7X30 0xacc00000 0xe1000000 UART3 - - Please adjust DEBUG_UART_PHYS and DEBUG_UART_BASE configuration - options based on your needs. - config DEBUG_QCOM_UARTDM bool "Kernel low-level debugging messages via QCOM UARTDM" depends on ARCH_QCOM @@ -806,7 +787,7 @@ choice via SCIF2 on Renesas R-Car H1 (R8A7779). config DEBUG_RCAR_GEN2_SCIF0 - bool "Kernel low-level debugging messages via SCIF0 on R8A7790/R8A7791/R8A7793)" + bool "Kernel low-level debugging messages via SCIF0 on R8A7790/R8A7791/R8A7793" depends on ARCH_R8A7790 || ARCH_R8A7791 || ARCH_R8A7793 help Say Y here if you want kernel low-level debugging support @@ -1295,7 +1276,7 @@ config DEBUG_LL_INCLUDE DEBUG_IMX6SL_UART || \ DEBUG_IMX6SX_UART default "debug/ks8695.S" if DEBUG_KS8695_UART - default "debug/msm.S" if DEBUG_MSM_UART || DEBUG_QCOM_UARTDM + default "debug/msm.S" if DEBUG_QCOM_UARTDM default "debug/netx.S" if DEBUG_NETX_UART default "debug/omap2plus.S" if DEBUG_OMAP2PLUS_UART default "debug/renesas-scif.S" if DEBUG_R7S72100_SCIF2 @@ -1388,7 +1369,6 @@ config DEBUG_UART_PHYS default 0x80230000 if DEBUG_PICOXCELL_UART default 0x808c0000 if ARCH_EP93XX default 0x90020000 if DEBUG_NSPIRE_CLASSIC_UART || DEBUG_NSPIRE_CX_UART - default 0xa9a00000 if DEBUG_MSM_UART default 0xb0060000 if DEBUG_SIRFPRIMA2_UART1 default 0xb0090000 if DEBUG_VEXPRESS_UART0_CRX default 0xc0013000 if DEBUG_U300_UART @@ -1433,7 +1413,7 @@ config DEBUG_UART_PHYS DEBUG_LL_UART_8250 || DEBUG_LL_UART_PL01X || \ DEBUG_LL_UART_EFM32 || \ DEBUG_UART_8250 || DEBUG_UART_PL01X || DEBUG_MESON_UARTAO || \ - DEBUG_MSM_UART || DEBUG_NETX_UART || \ + DEBUG_NETX_UART || \ DEBUG_QCOM_UARTDM || DEBUG_R7S72100_SCIF2 || \ DEBUG_RCAR_GEN1_SCIF0 || DEBUG_RCAR_GEN1_SCIF2 || \ DEBUG_RCAR_GEN2_SCIF0 || DEBUG_RCAR_GEN2_SCIF2 || \ @@ -1446,7 +1426,6 @@ config DEBUG_UART_VIRT hex "Virtual base address of debug UART" default 0xe0000a00 if DEBUG_NETX_UART default 0xe0010fe0 if ARCH_RPC - default 0xe1000000 if DEBUG_MSM_UART default 0xf0000be0 if ARCH_EBSA110 default 0xf0010000 if DEBUG_ASM9260_UART default 0xf01fb000 if DEBUG_NOMADIK_UART @@ -1526,7 +1505,7 @@ config DEBUG_UART_VIRT default DEBUG_UART_PHYS if !MMU depends on DEBUG_LL_UART_8250 || DEBUG_LL_UART_PL01X || \ DEBUG_UART_8250 || DEBUG_UART_PL01X || DEBUG_MESON_UARTAO || \ - DEBUG_MSM_UART || DEBUG_NETX_UART || \ + DEBUG_NETX_UART || \ DEBUG_QCOM_UARTDM || DEBUG_S3C24XX_UART || \ DEBUG_UART_BCM63XX || DEBUG_ASM9260_UART || \ DEBUG_SIRFSOC_UART || DEBUG_DIGICOLOR_UA0 @@ -1556,7 +1535,7 @@ config DEBUG_UART_8250_FLOW_CONTROL config DEBUG_UNCOMPRESS bool - depends on ARCH_MULTIPLATFORM || ARCH_MSM || PLAT_SAMSUNG + depends on ARCH_MULTIPLATFORM || PLAT_SAMSUNG default y if DEBUG_LL && !DEBUG_OMAP2PLUS_UART && \ (!DEBUG_TEGRA_UART || !ZBOOT_ROM) help diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 7f99cd6..fa03c13 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -136,7 +136,6 @@ textofs-$(CONFIG_PM_H1940) := 0x00108000 ifeq ($(CONFIG_ARCH_SA1100),y) textofs-$(CONFIG_SA1111) := 0x00208000 endif -textofs-$(CONFIG_ARCH_MSM7X30) := 0x00208000 textofs-$(CONFIG_ARCH_MSM8X60) := 0x00208000 textofs-$(CONFIG_ARCH_MSM8960) := 0x00208000 textofs-$(CONFIG_ARCH_AXXIA) := 0x00308000 @@ -170,7 +169,6 @@ machine-$(CONFIG_ARCH_LPC32XX) += lpc32xx machine-$(CONFIG_ARCH_MESON) += meson machine-$(CONFIG_ARCH_MMP) += mmp machine-$(CONFIG_ARCH_MOXART) += moxart -machine-$(CONFIG_ARCH_MSM) += msm machine-$(CONFIG_ARCH_MV78XX0) += mv78xx0 machine-$(CONFIG_ARCH_MVEBU) += mvebu machine-$(CONFIG_ARCH_MXC) += imx diff --git a/arch/arm/boot/dts/am335x-bone-common.dtsi b/arch/arm/boot/dts/am335x-bone-common.dtsi index 6cc25ed..2c6248d 100644 --- a/arch/arm/boot/dts/am335x-bone-common.dtsi +++ b/arch/arm/boot/dts/am335x-bone-common.dtsi @@ -195,6 +195,7 @@ &usb0 { status = "okay"; + dr_mode = "peripheral"; }; &usb1 { diff --git a/arch/arm/boot/dts/am437x-idk-evm.dts b/arch/arm/boot/dts/am437x-idk-evm.dts index f9a17e2..0198f5a 100644 --- a/arch/arm/boot/dts/am437x-idk-evm.dts +++ b/arch/arm/boot/dts/am437x-idk-evm.dts @@ -133,20 +133,6 @@ >; }; - i2c1_pins_default: i2c1_pins_default { - pinctrl-single,pins = < - 0x15c (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE2) /* spi0_cs0.i2c1_scl */ - 0x158 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE2) /* spi0_d1.i2c1_sda */ - >; - }; - - i2c1_pins_sleep: i2c1_pins_sleep { - pinctrl-single,pins = < - 0x15c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* spi0_cs0.i2c1_scl */ - 0x158 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* spi0_d1.i2c1_sda */ - >; - }; - mmc1_pins_default: pinmux_mmc1_pins_default { pinctrl-single,pins = < 0x100 (PIN_INPUT | MUX_MODE0) /* mmc0_clk.mmc0_clk */ @@ -254,7 +240,7 @@ status = "okay"; pinctrl-names = "default", "sleep"; pinctrl-0 = <&i2c0_pins_default>; - pinctrl-1 = <&i2c0_pins_default>; + pinctrl-1 = <&i2c0_pins_sleep>; clock-frequency = <400000>; at24@50 { @@ -262,17 +248,10 @@ pagesize = <64>; reg = <0x50>; }; -}; - -&i2c1 { - status = "okay"; - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&i2c1_pins_default>; - pinctrl-1 = <&i2c1_pins_default>; - clock-frequency = <400000>; tps: tps62362@60 { compatible = "ti,tps62362"; + reg = <0x60>; regulator-name = "VDD_MPU"; regulator-min-microvolt = <950000>; regulator-max-microvolt = <1330000>; diff --git a/arch/arm/boot/dts/am57xx-beagle-x15.dts b/arch/arm/boot/dts/am57xx-beagle-x15.dts index 03750af..6463f9e 100644 --- a/arch/arm/boot/dts/am57xx-beagle-x15.dts +++ b/arch/arm/boot/dts/am57xx-beagle-x15.dts @@ -549,14 +549,6 @@ pinctrl-0 = <&usb1_pins>; }; -&omap_dwc3_1 { - extcon = <&extcon_usb1>; -}; - -&omap_dwc3_2 { - extcon = <&extcon_usb2>; -}; - &usb2 { dr_mode = "peripheral"; }; diff --git a/arch/arm/boot/dts/at91rm9200.dtsi b/arch/arm/boot/dts/at91rm9200.dtsi index 21c2b50..c515e4b 100644 --- a/arch/arm/boot/dts/at91rm9200.dtsi +++ b/arch/arm/boot/dts/at91rm9200.dtsi @@ -830,7 +830,7 @@ }; dbgu: serial@fffff200 { - compatible = "atmel,at91rm9200-usart"; + compatible = "atmel,at91rm9200-dbgu", "atmel,at91rm9200-usart"; reg = <0xfffff200 0x200>; interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; pinctrl-names = "default"; diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi index fff0ee6..7d989a8 100644 --- a/arch/arm/boot/dts/at91sam9260.dtsi +++ b/arch/arm/boot/dts/at91sam9260.dtsi @@ -494,12 +494,12 @@ pinctrl_usart3_rts: usart3_rts-0 { atmel,pins = - <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC8 periph B */ + <AT91_PIOC 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; }; pinctrl_usart3_cts: usart3_cts-0 { atmel,pins = - <AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC10 periph B */ + <AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_NONE>; }; }; @@ -753,7 +753,7 @@ }; dbgu: serial@fffff200 { - compatible = "atmel,at91sam9260-usart"; + compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart"; reg = <0xfffff200 0x200>; interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; pinctrl-names = "default"; @@ -853,7 +853,7 @@ }; usb1: gadget@fffa4000 { - compatible = "atmel,at91rm9200-udc"; + compatible = "atmel,at91sam9260-udc"; reg = <0xfffa4000 0x4000>; interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>; clocks = <&udc_clk>, <&udpck>; @@ -976,7 +976,6 @@ atmel,watchdog-type = "hardware"; atmel,reset-type = "all"; atmel,dbg-halt; - atmel,idle-halt; status = "disabled"; }; diff --git a/arch/arm/boot/dts/at91sam9261.dtsi b/arch/arm/boot/dts/at91sam9261.dtsi index e247b0b..bf8d185 100644 --- a/arch/arm/boot/dts/at91sam9261.dtsi +++ b/arch/arm/boot/dts/at91sam9261.dtsi @@ -124,11 +124,12 @@ }; usb1: gadget@fffa4000 { - compatible = "atmel,at91rm9200-udc"; + compatible = "atmel,at91sam9261-udc"; reg = <0xfffa4000 0x4000>; interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>; - clocks = <&usb>, <&udc_clk>, <&udpck>; - clock-names = "usb_clk", "udc_clk", "udpck"; + clocks = <&udc_clk>, <&udpck>; + clock-names = "pclk", "hclk"; + atmel,matrix = <&matrix>; status = "disabled"; }; @@ -262,7 +263,7 @@ }; matrix: matrix@ffffee00 { - compatible = "atmel,at91sam9260-bus-matrix"; + compatible = "atmel,at91sam9260-bus-matrix", "syscon"; reg = <0xffffee00 0x200>; }; @@ -275,7 +276,7 @@ }; dbgu: serial@fffff200 { - compatible = "atmel,at91sam9260-usart"; + compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart"; reg = <0xfffff200 0x200>; interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; pinctrl-names = "default"; diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi index 1f67bb4..e07dae7 100644 --- a/arch/arm/boot/dts/at91sam9263.dtsi +++ b/arch/arm/boot/dts/at91sam9263.dtsi @@ -69,7 +69,7 @@ sram1: sram@00500000 { compatible = "mmio-sram"; - reg = <0x00300000 0x4000>; + reg = <0x00500000 0x4000>; }; ahb { @@ -762,7 +762,7 @@ }; dbgu: serial@ffffee00 { - compatible = "atmel,at91sam9260-usart"; + compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart"; reg = <0xffffee00 0x200>; interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; pinctrl-names = "default"; @@ -856,7 +856,7 @@ }; usb1: gadget@fff78000 { - compatible = "atmel,at91rm9200-udc"; + compatible = "atmel,at91sam9263-udc"; reg = <0xfff78000 0x4000>; interrupts = <24 IRQ_TYPE_LEVEL_HIGH 2>; clocks = <&udc_clk>, <&udpck>; @@ -905,7 +905,6 @@ atmel,watchdog-type = "hardware"; atmel,reset-type = "all"; atmel,dbg-halt; - atmel,idle-halt; status = "disabled"; }; diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi index ee80aa9..56b66a7 100644 --- a/arch/arm/boot/dts/at91sam9g45.dtsi +++ b/arch/arm/boot/dts/at91sam9g45.dtsi @@ -893,7 +893,7 @@ }; dbgu: serial@ffffee00 { - compatible = "atmel,at91sam9260-usart"; + compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart"; reg = <0xffffee00 0x200>; interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; pinctrl-names = "default"; @@ -1116,7 +1116,6 @@ atmel,watchdog-type = "hardware"; atmel,reset-type = "all"; atmel,dbg-halt; - atmel,idle-halt; status = "disabled"; }; @@ -1301,7 +1300,7 @@ compatible = "atmel,at91sam9g45-ehci", "usb-ehci"; reg = <0x00800000 0x100000>; interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>; - clocks = <&usb>, <&uhphs_clk>, <&uhphs_clk>, <&uhpck>; + clocks = <&utmi>, <&uhphs_clk>, <&uhphs_clk>, <&uhpck>; clock-names = "usb_clk", "ehci_clk", "hclk", "uhpck"; status = "disabled"; }; diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi index c2666a7..ea0af0f 100644 --- a/arch/arm/boot/dts/at91sam9n12.dtsi +++ b/arch/arm/boot/dts/at91sam9n12.dtsi @@ -757,7 +757,7 @@ }; dbgu: serial@fffff200 { - compatible = "atmel,at91sam9260-usart"; + compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart"; reg = <0xfffff200 0x200>; interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; pinctrl-names = "default"; @@ -894,7 +894,6 @@ atmel,watchdog-type = "hardware"; atmel,reset-type = "all"; atmel,dbg-halt; - atmel,idle-halt; status = "disabled"; }; diff --git a/arch/arm/boot/dts/at91sam9rl.dtsi b/arch/arm/boot/dts/at91sam9rl.dtsi index 40f645b..ebfd5ce 100644 --- a/arch/arm/boot/dts/at91sam9rl.dtsi +++ b/arch/arm/boot/dts/at91sam9rl.dtsi @@ -377,7 +377,7 @@ }; dbgu: serial@fffff200 { - compatible = "atmel,at91sam9260-usart"; + compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart"; reg = <0xfffff200 0x200>; interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; pinctrl-names = "default"; diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi index 818dabd..3aa56ae 100644 --- a/arch/arm/boot/dts/at91sam9x5.dtsi +++ b/arch/arm/boot/dts/at91sam9x5.dtsi @@ -860,7 +860,7 @@ }; dbgu: serial@fffff200 { - compatible = "atmel,at91sam9260-usart"; + compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart"; reg = <0xfffff200 0x200>; interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; pinctrl-names = "default"; @@ -1066,7 +1066,7 @@ reg = <0x00500000 0x80000 0xf803c000 0x400>; interrupts = <23 IRQ_TYPE_LEVEL_HIGH 0>; - clocks = <&usb>, <&udphs_clk>; + clocks = <&utmi>, <&udphs_clk>; clock-names = "hclk", "pclk"; status = "disabled"; @@ -1130,7 +1130,6 @@ atmel,watchdog-type = "hardware"; atmel,reset-type = "all"; atmel,dbg-halt; - atmel,idle-halt; status = "disabled"; }; @@ -1186,7 +1185,7 @@ compatible = "atmel,at91sam9g45-ehci", "usb-ehci"; reg = <0x00700000 0x100000>; interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>; - clocks = <&usb>, <&uhphs_clk>, <&uhpck>; + clocks = <&utmi>, <&uhphs_clk>, <&uhpck>; clock-names = "usb_clk", "ehci_clk", "uhpck"; status = "disabled"; }; diff --git a/arch/arm/boot/dts/dm8168-evm.dts b/arch/arm/boot/dts/dm8168-evm.dts index 857d028..d3a29c1 100644 --- a/arch/arm/boot/dts/dm8168-evm.dts +++ b/arch/arm/boot/dts/dm8168-evm.dts @@ -35,6 +35,18 @@ DM816X_IOPAD(0x0aac, PIN_INPUT | MUX_MODE0) /* SPI_D1 */ >; }; + + usb0_pins: pinmux_usb0_pins { + pinctrl-single,pins = < + DM816X_IOPAD(0x0d00, MUX_MODE0) /* USB0_DRVVBUS */ + >; + }; + + usb1_pins: pinmux_usb0_pins { + pinctrl-single,pins = < + DM816X_IOPAD(0x0d04, MUX_MODE0) /* USB1_DRVVBUS */ + >; + }; }; &i2c1 { @@ -127,3 +139,16 @@ &mmc1 { vmmc-supply = <&vmmcsd_fixed>; }; + +/* At least dm8168-evm rev c won't support multipoint, later may */ +&usb0 { + pinctrl-names = "default"; + pinctrl-0 = <&usb0_pins>; + mentor,multipoint = <0>; +}; + +&usb1 { + pinctrl-names = "default"; + pinctrl-0 = <&usb1_pins>; + mentor,multipoint = <0>; +}; diff --git a/arch/arm/boot/dts/dm816x.dtsi b/arch/arm/boot/dts/dm816x.dtsi index d98d0f7..3c97b5f 100644 --- a/arch/arm/boot/dts/dm816x.dtsi +++ b/arch/arm/boot/dts/dm816x.dtsi @@ -97,10 +97,31 @@ /* Device Configuration Registers */ scm_conf: syscon@600 { - compatible = "syscon"; + compatible = "syscon", "simple-bus"; reg = <0x600 0x110>; #address-cells = <1>; #size-cells = <1>; + ranges = <0 0x600 0x110>; + + usb_phy0: usb-phy@20 { + compatible = "ti,dm8168-usb-phy"; + reg = <0x20 0x8>; + reg-names = "phy"; + clocks = <&main_fapll 6>; + clock-names = "refclk"; + #phy-cells = <0>; + syscon = <&scm_conf>; + }; + + usb_phy1: usb-phy@28 { + compatible = "ti,dm8168-usb-phy"; + reg = <0x28 0x8>; + reg-names = "phy"; + clocks = <&main_fapll 6>; + clock-names = "refclk"; + #phy-cells = <0>; + syscon = <&scm_conf>; + }; }; scrm_clocks: clocks { @@ -357,7 +378,10 @@ reg-names = "mc", "control"; interrupts = <18>; interrupt-names = "mc"; - dr_mode = "otg"; + dr_mode = "host"; + interface-type = <0>; + phys = <&usb_phy0>; + phy-names = "usb2-phy"; mentor,multipoint = <1>; mentor,num-eps = <16>; mentor,ram-bits = <12>; @@ -366,13 +390,15 @@ usb1: usb@47401800 { compatible = "ti,musb-am33xx"; - status = "disabled"; reg = <0x47401c00 0x400 0x47401800 0x200>; reg-names = "mc", "control"; interrupts = <19>; interrupt-names = "mc"; - dr_mode = "otg"; + dr_mode = "host"; + interface-type = <0>; + phys = <&usb_phy1>; + phy-names = "usb2-phy"; mentor,multipoint = <1>; mentor,num-eps = <16>; mentor,ram-bits = <12>; diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts index 746cddb..3290a96 100644 --- a/arch/arm/boot/dts/dra7-evm.dts +++ b/arch/arm/boot/dts/dra7-evm.dts @@ -543,14 +543,6 @@ }; }; -&omap_dwc3_1 { - extcon = <&extcon_usb1>; -}; - -&omap_dwc3_2 { - extcon = <&extcon_usb2>; -}; - &usb1 { dr_mode = "peripheral"; pinctrl-names = "default"; diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi index 5827fed..127608d 100644 --- a/arch/arm/boot/dts/dra7.dtsi +++ b/arch/arm/boot/dts/dra7.dtsi @@ -249,8 +249,8 @@ <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; #dma-cells = <1>; - #dma-channels = <32>; - #dma-requests = <127>; + dma-channels = <32>; + dma-requests = <127>; }; gpio1: gpio@4ae10000 { @@ -1090,8 +1090,8 @@ <0x4A096800 0x40>; /* pll_ctrl */ reg-names = "phy_rx", "phy_tx", "pll_ctrl"; ctrl-module = <&omap_control_sata>; - clocks = <&sys_clkin1>; - clock-names = "sysclk"; + clocks = <&sys_clkin1>, <&sata_ref_clk>; + clock-names = "sysclk", "refclk"; #phy-cells = <0>; }; diff --git a/arch/arm/boot/dts/dra72-evm.dts b/arch/arm/boot/dts/dra72-evm.dts index 4d87117..e0264d0 100644 --- a/arch/arm/boot/dts/dra72-evm.dts +++ b/arch/arm/boot/dts/dra72-evm.dts @@ -380,14 +380,6 @@ phy-supply = <&ldo4_reg>; }; -&omap_dwc3_1 { - extcon = <&extcon_usb1>; -}; - -&omap_dwc3_2 { - extcon = <&extcon_usb2>; -}; - &usb1 { dr_mode = "peripheral"; pinctrl-names = "default"; diff --git a/arch/arm/boot/dts/omap2.dtsi b/arch/arm/boot/dts/omap2.dtsi index 59d1c29..578fa2a 100644 --- a/arch/arm/boot/dts/omap2.dtsi +++ b/arch/arm/boot/dts/omap2.dtsi @@ -87,8 +87,8 @@ <14>, <15>; #dma-cells = <1>; - #dma-channels = <32>; - #dma-requests = <64>; + dma-channels = <32>; + dma-requests = <64>; }; i2c1: i2c@48070000 { diff --git a/arch/arm/boot/dts/omap3-n900.dts b/arch/arm/boot/dts/omap3-n900.dts index 6040327..db80f9d 100644 --- a/arch/arm/boot/dts/omap3-n900.dts +++ b/arch/arm/boot/dts/omap3-n900.dts @@ -16,6 +16,13 @@ model = "Nokia N900"; compatible = "nokia,omap3-n900", "ti,omap3430", "ti,omap3"; + aliases { + i2c0; + i2c1 = &i2c1; + i2c2 = &i2c2; + i2c3 = &i2c3; + }; + cpus { cpu@0 { cpu0-supply = <&vcc>; @@ -704,7 +711,7 @@ compatible = "smsc,lan91c94"; interrupt-parent = <&gpio2>; interrupts = <22 IRQ_TYPE_LEVEL_HIGH>; /* gpio54 */ - reg = <1 0x300 0xf>; /* 16 byte IO range at offset 0x300 */ + reg = <1 0 0xf>; /* 16 byte IO range */ bank-width = <2>; pinctrl-names = "default"; pinctrl-0 = <ðernet_pins>; diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi index 01b7111..f4f78c4 100644 --- a/arch/arm/boot/dts/omap3.dtsi +++ b/arch/arm/boot/dts/omap3.dtsi @@ -155,8 +155,8 @@ <14>, <15>; #dma-cells = <1>; - #dma-channels = <32>; - #dma-requests = <96>; + dma-channels = <32>; + dma-requests = <96>; }; omap3_pmx_core: pinmux@48002030 { diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi index 074147c..87401d9 100644 --- a/arch/arm/boot/dts/omap4.dtsi +++ b/arch/arm/boot/dts/omap4.dtsi @@ -223,8 +223,8 @@ <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; #dma-cells = <1>; - #dma-channels = <32>; - #dma-requests = <127>; + dma-channels = <32>; + dma-requests = <127>; }; gpio1: gpio@4a310000 { diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi index b321fdf..ddff674 100644 --- a/arch/arm/boot/dts/omap5.dtsi +++ b/arch/arm/boot/dts/omap5.dtsi @@ -238,8 +238,8 @@ <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; #dma-cells = <1>; - #dma-channels = <32>; - #dma-requests = <127>; + dma-channels = <32>; + dma-requests = <127>; }; gpio1: gpio@4ae10000 { @@ -929,8 +929,8 @@ <0x4A096800 0x40>; /* pll_ctrl */ reg-names = "phy_rx", "phy_tx", "pll_ctrl"; ctrl-module = <&omap_control_sata>; - clocks = <&sys_clkin>; - clock-names = "sysclk"; + clocks = <&sys_clkin>, <&sata_ref_clk>; + clock-names = "sysclk", "refclk"; #phy-cells = <0>; }; }; diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi index 261311b..c0a8dfc 100644 --- a/arch/arm/boot/dts/sama5d3.dtsi +++ b/arch/arm/boot/dts/sama5d3.dtsi @@ -439,7 +439,7 @@ }; dbgu: serial@ffffee00 { - compatible = "atmel,at91sam9260-usart"; + compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart"; reg = <0xffffee00 0x200>; interrupts = <2 IRQ_TYPE_LEVEL_HIGH 7>; dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(13)>, @@ -1248,7 +1248,6 @@ atmel,watchdog-type = "hardware"; atmel,reset-type = "all"; atmel,dbg-halt; - atmel,idle-halt; status = "disabled"; }; @@ -1416,7 +1415,7 @@ compatible = "atmel,at91sam9g45-ehci", "usb-ehci"; reg = <0x00700000 0x100000>; interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>; - clocks = <&usb>, <&uhphs_clk>, <&uhpck>; + clocks = <&utmi>, <&uhphs_clk>, <&uhpck>; clock-names = "usb_clk", "ehci_clk", "uhpck"; status = "disabled"; }; diff --git a/arch/arm/boot/dts/sama5d4.dtsi b/arch/arm/boot/dts/sama5d4.dtsi index d986b41..782587d 100644 --- a/arch/arm/boot/dts/sama5d4.dtsi +++ b/arch/arm/boot/dts/sama5d4.dtsi @@ -66,6 +66,7 @@ gpio4 = &pioE; tcb0 = &tcb0; tcb1 = &tcb1; + i2c0 = &i2c0; i2c2 = &i2c2; }; cpus { @@ -259,7 +260,7 @@ compatible = "atmel,at91sam9g45-ehci", "usb-ehci"; reg = <0x00600000 0x100000>; interrupts = <46 IRQ_TYPE_LEVEL_HIGH 2>; - clocks = <&usb>, <&uhphs_clk>, <&uhpck>; + clocks = <&utmi>, <&uhphs_clk>, <&uhpck>; clock-names = "usb_clk", "ehci_clk", "uhpck"; status = "disabled"; }; @@ -461,8 +462,8 @@ lcdck: lcdck { #clock-cells = <0>; - reg = <4>; - clocks = <&smd>; + reg = <3>; + clocks = <&mck>; }; smdck: smdck { @@ -770,7 +771,7 @@ reg = <50>; }; - lcd_clk: lcd_clk { + lcdc_clk: lcdc_clk { #clock-cells = <0>; reg = <51>; }; @@ -1063,7 +1064,7 @@ }; dbgu: serial@fc069000 { - compatible = "atmel,at91sam9260-usart"; + compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart"; reg = <0xfc069000 0x200>; interrupts = <2 IRQ_TYPE_LEVEL_HIGH 7>; pinctrl-names = "default"; diff --git a/arch/arm/configs/at91_dt_defconfig b/arch/arm/configs/at91_dt_defconfig index f2670f6..811e72b 100644 --- a/arch/arm/configs/at91_dt_defconfig +++ b/arch/arm/configs/at91_dt_defconfig @@ -70,6 +70,7 @@ CONFIG_SCSI=y CONFIG_BLK_DEV_SD=y # CONFIG_SCSI_LOWLEVEL is not set CONFIG_NETDEVICES=y +CONFIG_ARM_AT91_ETHER=y CONFIG_MACB=y # CONFIG_NET_VENDOR_BROADCOM is not set CONFIG_DM9000=y diff --git a/arch/arm/configs/msm_defconfig b/arch/arm/configs/msm_defconfig deleted file mode 100644 index dd18c9e..0000000 --- a/arch/arm/configs/msm_defconfig +++ /dev/null @@ -1,121 +0,0 @@ -CONFIG_SYSVIPC=y -CONFIG_NO_HZ=y -CONFIG_HIGH_RES_TIMERS=y -CONFIG_IKCONFIG=y -CONFIG_IKCONFIG_PROC=y -CONFIG_BLK_DEV_INITRD=y -CONFIG_SYSCTL_SYSCALL=y -CONFIG_KALLSYMS_ALL=y -CONFIG_EMBEDDED=y -# CONFIG_SLUB_DEBUG is not set -# CONFIG_COMPAT_BRK is not set -CONFIG_PROFILING=y -CONFIG_OPROFILE=y -CONFIG_KPROBES=y -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -CONFIG_MODULE_FORCE_UNLOAD=y -CONFIG_MODVERSIONS=y -CONFIG_PARTITION_ADVANCED=y -CONFIG_ARCH_MSM=y -CONFIG_PREEMPT=y -CONFIG_AEABI=y -CONFIG_HIGHMEM=y -CONFIG_HIGHPTE=y -CONFIG_CLEANCACHE=y -CONFIG_AUTO_ZRELADDR=y -CONFIG_VFP=y -# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set -CONFIG_NET=y -CONFIG_PACKET=y -CONFIG_UNIX=y -CONFIG_INET=y -CONFIG_IP_ADVANCED_ROUTER=y -CONFIG_IP_MULTIPLE_TABLES=y -CONFIG_IP_ROUTE_VERBOSE=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -# CONFIG_INET_XFRM_MODE_TRANSPORT is not set -# CONFIG_INET_XFRM_MODE_TUNNEL is not set -# CONFIG_INET_XFRM_MODE_BEET is not set -# CONFIG_INET_LRO is not set -# CONFIG_IPV6 is not set -CONFIG_CFG80211=y -CONFIG_RFKILL=y -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_RAM=y -CONFIG_SCSI=y -CONFIG_BLK_DEV_SD=y -CONFIG_CHR_DEV_SG=y -CONFIG_CHR_DEV_SCH=y -CONFIG_SCSI_MULTI_LUN=y -CONFIG_SCSI_CONSTANTS=y -CONFIG_SCSI_LOGGING=y -CONFIG_SCSI_SCAN_ASYNC=y -CONFIG_NETDEVICES=y -CONFIG_DUMMY=y -CONFIG_SLIP=y -CONFIG_SLIP_COMPRESSED=y -CONFIG_SLIP_MODE_SLIP6=y -CONFIG_USB_USBNET=y -# CONFIG_USB_NET_AX8817X is not set -# CONFIG_USB_NET_ZAURUS is not set -CONFIG_INPUT_EVDEV=y -# CONFIG_KEYBOARD_ATKBD is not set -# CONFIG_MOUSE_PS2 is not set -CONFIG_INPUT_JOYSTICK=y -CONFIG_INPUT_TOUCHSCREEN=y -CONFIG_INPUT_MISC=y -CONFIG_INPUT_UINPUT=y -CONFIG_SERIO_LIBPS2=y -# CONFIG_LEGACY_PTYS is not set -CONFIG_SERIAL_MSM=y -CONFIG_SERIAL_MSM_CONSOLE=y -# CONFIG_HW_RANDOM is not set -CONFIG_I2C=y -CONFIG_I2C_CHARDEV=y -CONFIG_SPI=y -CONFIG_DEBUG_GPIO=y -CONFIG_GPIO_SYSFS=y -CONFIG_THERMAL=y -CONFIG_REGULATOR=y -CONFIG_MEDIA_SUPPORT=y -CONFIG_FB=y -CONFIG_SOUND=y -CONFIG_SND=y -CONFIG_SND_DYNAMIC_MINORS=y -# CONFIG_SND_ARM is not set -# CONFIG_SND_SPI is not set -# CONFIG_SND_USB is not set -CONFIG_SND_SOC=y -CONFIG_USB=y -CONFIG_USB_ANNOUNCE_NEW_DEVICES=y -CONFIG_USB_MON=y -CONFIG_USB_EHCI_HCD=y -CONFIG_USB_ACM=y -CONFIG_USB_SERIAL=y -CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_DEBUG_FILES=y -CONFIG_USB_GADGET_VBUS_DRAW=500 -CONFIG_RTC_CLASS=y -CONFIG_STAGING=y -CONFIG_EXT2_FS=y -CONFIG_EXT2_FS_XATTR=y -CONFIG_EXT3_FS=y -# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set -CONFIG_EXT4_FS=y -CONFIG_FUSE_FS=y -CONFIG_VFAT_FS=y -CONFIG_TMPFS=y -CONFIG_NFS_FS=y -CONFIG_NFS_V3_ACL=y -CONFIG_NFS_V4=y -CONFIG_CIFS=y -CONFIG_PRINTK_TIME=y -CONFIG_DYNAMIC_DEBUG=y -CONFIG_DEBUG_INFO=y -CONFIG_MAGIC_SYSRQ=y -CONFIG_LOCKUP_DETECTOR=y -# CONFIG_DETECT_HUNG_TASK is not set -# CONFIG_SCHED_DEBUG is not set -CONFIG_TIMER_STATS=y diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig index e8a4c95..b7e6b6fb 100644 --- a/arch/arm/configs/multi_v7_defconfig +++ b/arch/arm/configs/multi_v7_defconfig @@ -62,6 +62,17 @@ CONFIG_MACH_SPEAR1340=y CONFIG_ARCH_STI=y CONFIG_ARCH_EXYNOS=y CONFIG_EXYNOS5420_MCPM=y +CONFIG_ARCH_SHMOBILE_MULTI=y +CONFIG_ARCH_EMEV2=y +CONFIG_ARCH_R7S72100=y +CONFIG_ARCH_R8A73A4=y +CONFIG_ARCH_R8A7740=y +CONFIG_ARCH_R8A7779=y +CONFIG_ARCH_R8A7790=y +CONFIG_ARCH_R8A7791=y +CONFIG_ARCH_R8A7794=y +CONFIG_ARCH_SH73A0=y +CONFIG_MACH_MARZEN=y CONFIG_ARCH_SUNXI=y CONFIG_ARCH_SIRF=y CONFIG_ARCH_TEGRA=y @@ -84,6 +95,8 @@ CONFIG_PCI_KEYSTONE=y CONFIG_PCI_MSI=y CONFIG_PCI_MVEBU=y CONFIG_PCI_TEGRA=y +CONFIG_PCI_RCAR_GEN2=y +CONFIG_PCI_RCAR_GEN2_PCIE=y CONFIG_PCIEPORTBUS=y CONFIG_SMP=y CONFIG_NR_CPUS=8 @@ -130,6 +143,7 @@ CONFIG_DEVTMPFS_MOUNT=y CONFIG_DMA_CMA=y CONFIG_CMA_SIZE_MBYTES=64 CONFIG_OMAP_OCP2SCP=y +CONFIG_SIMPLE_PM_BUS=y CONFIG_MTD=y CONFIG_MTD_CMDLINE_PARTS=y CONFIG_MTD_BLOCK=y @@ -157,6 +171,7 @@ CONFIG_AHCI_SUNXI=y CONFIG_AHCI_TEGRA=y CONFIG_SATA_HIGHBANK=y CONFIG_SATA_MV=y +CONFIG_SATA_RCAR=y CONFIG_NETDEVICES=y CONFIG_HIX5HD2_GMAC=y CONFIG_SUN4I_EMAC=y @@ -167,14 +182,17 @@ CONFIG_MV643XX_ETH=y CONFIG_MVNETA=y CONFIG_KS8851=y CONFIG_R8169=y +CONFIG_SH_ETH=y CONFIG_SMSC911X=y CONFIG_STMMAC_ETH=y CONFIG_TI_CPSW=y CONFIG_XILINX_EMACLITE=y CONFIG_AT803X_PHY=y CONFIG_MARVELL_PHY=y +CONFIG_SMSC_PHY=y CONFIG_BROADCOM_PHY=y CONFIG_ICPLUS_PHY=y +CONFIG_MICREL_PHY=y CONFIG_USB_PEGASUS=y CONFIG_USB_USBNET=y CONFIG_USB_NET_SMSC75XX=y @@ -192,15 +210,18 @@ CONFIG_KEYBOARD_CROS_EC=y CONFIG_MOUSE_PS2_ELANTECH=y CONFIG_INPUT_TOUCHSCREEN=y CONFIG_TOUCHSCREEN_ATMEL_MXT=y +CONFIG_TOUCHSCREEN_ST1232=m CONFIG_TOUCHSCREEN_STMPE=y CONFIG_TOUCHSCREEN_SUN4I=y CONFIG_INPUT_MISC=y CONFIG_INPUT_MPU3050=y CONFIG_INPUT_AXP20X_PEK=y +CONFIG_INPUT_ADXL34X=m CONFIG_SERIO_AMBAKMI=y CONFIG_SERIAL_8250=y CONFIG_SERIAL_8250_CONSOLE=y CONFIG_SERIAL_8250_DW=y +CONFIG_SERIAL_8250_EM=y CONFIG_SERIAL_8250_MT6577=y CONFIG_SERIAL_AMBA_PL011=y CONFIG_SERIAL_AMBA_PL011_CONSOLE=y @@ -213,6 +234,9 @@ CONFIG_SERIAL_SIRFSOC_CONSOLE=y CONFIG_SERIAL_TEGRA=y CONFIG_SERIAL_IMX=y CONFIG_SERIAL_IMX_CONSOLE=y +CONFIG_SERIAL_SH_SCI=y +CONFIG_SERIAL_SH_SCI_NR_UARTS=20 +CONFIG_SERIAL_SH_SCI_CONSOLE=y CONFIG_SERIAL_MSM=y CONFIG_SERIAL_MSM_CONSOLE=y CONFIG_SERIAL_VT8500=y @@ -233,19 +257,26 @@ CONFIG_I2C_MUX_PCA954x=y CONFIG_I2C_MUX_PINCTRL=y CONFIG_I2C_CADENCE=y CONFIG_I2C_DESIGNWARE_PLATFORM=y +CONFIG_I2C_GPIO=m CONFIG_I2C_EXYNOS5=y CONFIG_I2C_MV64XXX=y +CONFIG_I2C_RIIC=y CONFIG_I2C_S3C2410=y +CONFIG_I2C_SH_MOBILE=y CONFIG_I2C_SIRF=y -CONFIG_I2C_TEGRA=y CONFIG_I2C_ST=y -CONFIG_SPI=y +CONFIG_I2C_TEGRA=y CONFIG_I2C_XILINX=y -CONFIG_SPI_DAVINCI=y +CONFIG_I2C_RCAR=y +CONFIG_SPI=y CONFIG_SPI_CADENCE=y +CONFIG_SPI_DAVINCI=y CONFIG_SPI_OMAP24XX=y CONFIG_SPI_ORION=y CONFIG_SPI_PL022=y +CONFIG_SPI_RSPI=y +CONFIG_SPI_SH_MSIOF=m +CONFIG_SPI_SH_HSPI=y CONFIG_SPI_SIRF=y CONFIG_SPI_SUN4I=y CONFIG_SPI_SUN6I=y @@ -259,12 +290,15 @@ CONFIG_PINCTRL_PALMAS=y CONFIG_PINCTRL_APQ8084=y CONFIG_GPIO_SYSFS=y CONFIG_GPIO_GENERIC_PLATFORM=y -CONFIG_GPIO_DWAPB=y CONFIG_GPIO_DAVINCI=y +CONFIG_GPIO_DWAPB=y +CONFIG_GPIO_EM=y +CONFIG_GPIO_RCAR=y CONFIG_GPIO_XILINX=y CONFIG_GPIO_ZYNQ=y CONFIG_GPIO_PCA953X=y CONFIG_GPIO_PCA953X_IRQ=y +CONFIG_GPIO_PCF857X=y CONFIG_GPIO_TWL4030=y CONFIG_GPIO_PALMAS=y CONFIG_GPIO_SYSCON=y @@ -276,10 +310,12 @@ CONFIG_POWER_RESET_AS3722=y CONFIG_POWER_RESET_GPIO=y CONFIG_POWER_RESET_KEYSTONE=y CONFIG_POWER_RESET_SUN6I=y +CONFIG_POWER_RESET_RMOBILE=y CONFIG_SENSORS_LM90=y CONFIG_SENSORS_LM95245=y CONFIG_THERMAL=y CONFIG_CPU_THERMAL=y +CONFIG_RCAR_THERMAL=y CONFIG_ARMADA_THERMAL=y CONFIG_DAVINCI_WATCHDOG CONFIG_ST_THERMAL_SYSCFG=y @@ -290,6 +326,7 @@ CONFIG_ARM_SP805_WATCHDOG=y CONFIG_ORION_WATCHDOG=y CONFIG_SUNXI_WATCHDOG=y CONFIG_MESON_WATCHDOG=y +CONFIG_MFD_AS3711=y CONFIG_MFD_AS3722=y CONFIG_MFD_BCM590XX=y CONFIG_MFD_AXP20X=y @@ -304,13 +341,16 @@ CONFIG_MFD_TPS65090=y CONFIG_MFD_TPS6586X=y CONFIG_MFD_TPS65910=y CONFIG_REGULATOR_AB8500=y +CONFIG_REGULATOR_AS3711=y CONFIG_REGULATOR_AS3722=y CONFIG_REGULATOR_AXP20X=y CONFIG_REGULATOR_BCM590XX=y +CONFIG_REGULATOR_DA9210=y CONFIG_REGULATOR_GPIO=y CONFIG_MFD_SYSCON=y CONFIG_POWER_RESET_SYSCON=y CONFIG_REGULATOR_MAX8907=y +CONFIG_REGULATOR_MAX8973=y CONFIG_REGULATOR_MAX77686=y CONFIG_REGULATOR_PALMAS=y CONFIG_REGULATOR_S2MPS11=y @@ -324,18 +364,32 @@ CONFIG_REGULATOR_TWL4030=y CONFIG_REGULATOR_VEXPRESS=y CONFIG_MEDIA_SUPPORT=y CONFIG_MEDIA_CAMERA_SUPPORT=y +CONFIG_MEDIA_CONTROLLER=y +CONFIG_VIDEO_V4L2_SUBDEV_API=y CONFIG_MEDIA_USB_SUPPORT=y CONFIG_USB_VIDEO_CLASS=y CONFIG_USB_GSPCA=y +CONFIG_V4L_PLATFORM_DRIVERS=y +CONFIG_SOC_CAMERA=m +CONFIG_SOC_CAMERA_PLATFORM=m +CONFIG_VIDEO_RCAR_VIN=m +CONFIG_V4L_MEM2MEM_DRIVERS=y +CONFIG_VIDEO_RENESAS_VSP1=m +# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set +CONFIG_VIDEO_ADV7180=m CONFIG_DRM=y +CONFIG_DRM_RCAR_DU=m CONFIG_DRM_TEGRA=y CONFIG_DRM_PANEL_SIMPLE=y CONFIG_FB_ARMCLCD=y CONFIG_FB_WM8505=y +CONFIG_FB_SH_MOBILE_LCDC=y CONFIG_FB_SIMPLE=y +CONFIG_FB_SH_MOBILE_MERAM=y CONFIG_BACKLIGHT_LCD_SUPPORT=y CONFIG_BACKLIGHT_CLASS_DEVICE=y CONFIG_BACKLIGHT_PWM=y +CONFIG_BACKLIGHT_AS3711=y CONFIG_FRAMEBUFFER_CONSOLE=y CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y CONFIG_SOUND=y @@ -343,6 +397,8 @@ CONFIG_SND=y CONFIG_SND_DYNAMIC_MINORS=y CONFIG_SND_USB_AUDIO=y CONFIG_SND_SOC=y +CONFIG_SND_SOC_SH4_FSI=m +CONFIG_SND_SOC_RCAR=m CONFIG_SND_SOC_TEGRA=y CONFIG_SND_SOC_TEGRA_RT5640=y CONFIG_SND_SOC_TEGRA_WM8753=y @@ -350,6 +406,8 @@ CONFIG_SND_SOC_TEGRA_WM8903=y CONFIG_SND_SOC_TEGRA_TRIMSLICE=y CONFIG_SND_SOC_TEGRA_ALC5632=y CONFIG_SND_SOC_TEGRA_MAX98090=y +CONFIG_SND_SOC_AK4642=m +CONFIG_SND_SOC_WM8978=m CONFIG_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_MVEBU=y @@ -362,6 +420,8 @@ CONFIG_USB_ISP1760_HCD=y CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_HCD_STI=y CONFIG_USB_OHCI_HCD_PLATFORM=y +CONFIG_USB_R8A66597_HCD=m +CONFIG_USB_RENESAS_USBHS=m CONFIG_USB_STORAGE=y CONFIG_USB_DWC3=y CONFIG_USB_CHIPIDEA=y @@ -374,6 +434,10 @@ CONFIG_SAMSUNG_USB3PHY=y CONFIG_USB_GPIO_VBUS=y CONFIG_USB_ISP1301=y CONFIG_USB_MXS_PHY=y +CONFIG_USB_RCAR_PHY=m +CONFIG_USB_RCAR_GEN2_PHY=m +CONFIG_USB_GADGET=y +CONFIG_USB_RENESAS_USBHS_UDC=m CONFIG_MMC=y CONFIG_MMC_BLOCK_MINORS=16 CONFIG_MMC_ARMMMCI=y @@ -392,12 +456,14 @@ CONFIG_MMC_SDHCI_ST=y CONFIG_MMC_OMAP=y CONFIG_MMC_OMAP_HS=y CONFIG_MMC_MVSDIO=y -CONFIG_MMC_SUNXI=y +CONFIG_MMC_SDHI=y CONFIG_MMC_DW=y CONFIG_MMC_DW_IDMAC=y CONFIG_MMC_DW_PLTFM=y CONFIG_MMC_DW_EXYNOS=y CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_MMC_SH_MMCIF=y +CONFIG_MMC_SUNXI=y CONFIG_NEW_LEDS=y CONFIG_LEDS_CLASS=y CONFIG_LEDS_GPIO=y @@ -421,10 +487,12 @@ CONFIG_RTC_DRV_AS3722=y CONFIG_RTC_DRV_DS1307=y CONFIG_RTC_DRV_MAX8907=y CONFIG_RTC_DRV_MAX77686=y +CONFIG_RTC_DRV_RS5C372=m CONFIG_RTC_DRV_PALMAS=y CONFIG_RTC_DRV_TWL4030=y CONFIG_RTC_DRV_TPS6586X=y CONFIG_RTC_DRV_TPS65910=y +CONFIG_RTC_DRV_S35390A=m CONFIG_RTC_DRV_EM3027=y CONFIG_RTC_DRV_PL031=y CONFIG_RTC_DRV_VT8500=y @@ -436,6 +504,9 @@ CONFIG_DMADEVICES=y CONFIG_DW_DMAC=y CONFIG_MV_XOR=y CONFIG_TEGRA20_APB_DMA=y +CONFIG_SH_DMAE=y +CONFIG_RCAR_AUDMAC_PP=m +CONFIG_RCAR_DMAC=y CONFIG_STE_DMA40=y CONFIG_SIRF_DMA=y CONFIG_TI_EDMA=y @@ -468,6 +539,7 @@ CONFIG_IIO=y CONFIG_XILINX_XADC=y CONFIG_AK8975=y CONFIG_PWM=y +CONFIG_PWM_RENESAS_TPU=y CONFIG_PWM_TEGRA=y CONFIG_PWM_VT8500=y CONFIG_PHY_HIX5HD2_SATA=y diff --git a/arch/arm/configs/omap2plus_defconfig b/arch/arm/configs/omap2plus_defconfig index b738652..a097cff 100644 --- a/arch/arm/configs/omap2plus_defconfig +++ b/arch/arm/configs/omap2plus_defconfig @@ -114,6 +114,7 @@ CONFIG_MTD_PHYSMAP_OF=y CONFIG_MTD_NAND=y CONFIG_MTD_NAND_ECC_BCH=y CONFIG_MTD_NAND_OMAP2=y +CONFIG_MTD_NAND_OMAP_BCH=y CONFIG_MTD_ONENAND=y CONFIG_MTD_ONENAND_VERIFY_WRITE=y CONFIG_MTD_ONENAND_OMAP2=y @@ -248,6 +249,7 @@ CONFIG_TWL6040_CORE=y CONFIG_REGULATOR_PALMAS=y CONFIG_REGULATOR_PBIAS=y CONFIG_REGULATOR_TI_ABB=y +CONFIG_REGULATOR_TPS62360=m CONFIG_REGULATOR_TPS65023=y CONFIG_REGULATOR_TPS6507X=y CONFIG_REGULATOR_TPS65217=y @@ -374,7 +376,7 @@ CONFIG_PWM_TIEHRPWM=m CONFIG_PWM_TWL=m CONFIG_PWM_TWL_LED=m CONFIG_OMAP_USB2=m -CONFIG_TI_PIPE3=m +CONFIG_TI_PIPE3=y CONFIG_EXT2_FS=y CONFIG_EXT3_FS=y # CONFIG_EXT3_FS_XATTR is not set diff --git a/arch/arm/configs/sama5_defconfig b/arch/arm/configs/sama5_defconfig index 41d856e..510c747 100644 --- a/arch/arm/configs/sama5_defconfig +++ b/arch/arm/configs/sama5_defconfig @@ -3,8 +3,6 @@ CONFIG_SYSVIPC=y CONFIG_IRQ_DOMAIN_DEBUG=y CONFIG_LOG_BUF_SHIFT=14 -CONFIG_SYSFS_DEPRECATED=y -CONFIG_SYSFS_DEPRECATED_V2=y CONFIG_BLK_DEV_INITRD=y CONFIG_EMBEDDED=y CONFIG_SLAB=y diff --git a/arch/arm/include/asm/kvm_mmu.h b/arch/arm/include/asm/kvm_mmu.h index 37ca2a4..bf0fe99 100644 --- a/arch/arm/include/asm/kvm_mmu.h +++ b/arch/arm/include/asm/kvm_mmu.h @@ -207,7 +207,7 @@ static inline void __coherent_cache_guest_page(struct kvm_vcpu *vcpu, pfn_t pfn, bool need_flush = !vcpu_has_cache_enabled(vcpu) || ipa_uncached; - VM_BUG_ON(size & PAGE_MASK); + VM_BUG_ON(size & ~PAGE_MASK); if (!need_flush && !icache_is_pipt()) goto vipt_cache; diff --git a/arch/arm/include/debug/at91.S b/arch/arm/include/debug/at91.S index 80a6501..c3c45e6 100644 --- a/arch/arm/include/debug/at91.S +++ b/arch/arm/include/debug/at91.S @@ -18,8 +18,11 @@ #define AT91_DBGU 0xfc00c000 /* SAMA5D4_BASE_USART3 */ #endif -/* Keep in sync with mach-at91/include/mach/hardware.h */ +#ifdef CONFIG_MMU #define AT91_IO_P2V(x) ((x) - 0x01000000) +#else +#define AT91_IO_P2V(x) (x) +#endif #define AT91_DBGU_SR (0x14) /* Status Register */ #define AT91_DBGU_THR (0x1c) /* Transmitter Holding Register */ diff --git a/arch/arm/include/debug/msm.S b/arch/arm/include/debug/msm.S index e55a942..b03024f 100644 --- a/arch/arm/include/debug/msm.S +++ b/arch/arm/include/debug/msm.S @@ -16,24 +16,17 @@ */ .macro addruart, rp, rv, tmp -#ifdef CONFIG_DEBUG_UART_PHYS ldr \rp, =CONFIG_DEBUG_UART_PHYS ldr \rv, =CONFIG_DEBUG_UART_VIRT -#endif .endm .macro senduart, rd, rx ARM_BE8(rev \rd, \rd ) -#ifdef CONFIG_DEBUG_QCOM_UARTDM @ Write the 1 character to UARTDM_TF str \rd, [\rx, #0x70] -#else - str \rd, [\rx, #0x0C] -#endif .endm .macro waituart, rd, rx -#ifdef CONFIG_DEBUG_QCOM_UARTDM @ check for TX_EMT in UARTDM_SR ldr \rd, [\rx, #0x08] ARM_BE8(rev \rd, \rd ) @@ -55,13 +48,6 @@ ARM_BE8(rev \rd, \rd ) str \rd, [\rx, #0x40] @ UARTDM reg. Read to induce delay ldr \rd, [\rx, #0x08] -#else - @ wait for TX_READY -1001: ldr \rd, [\rx, #0x08] -ARM_BE8(rev \rd, \rd ) - tst \rd, #0x04 - beq 1001b -#endif .endm .macro busyuart, rd, rx diff --git a/arch/arm/kvm/arm.c b/arch/arm/kvm/arm.c index 07e7eb1..5560f74 100644 --- a/arch/arm/kvm/arm.c +++ b/arch/arm/kvm/arm.c @@ -540,7 +540,7 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *run) vcpu->mode = OUTSIDE_GUEST_MODE; kvm_guest_exit(); - trace_kvm_exit(*vcpu_pc(vcpu)); + trace_kvm_exit(kvm_vcpu_trap_get_class(vcpu), *vcpu_pc(vcpu)); /* * We may have taken a host interrupt in HYP mode (ie * while executing the guest). This interrupt is still diff --git a/arch/arm/kvm/trace.h b/arch/arm/kvm/trace.h index 881874b..6817664 100644 --- a/arch/arm/kvm/trace.h +++ b/arch/arm/kvm/trace.h @@ -25,18 +25,22 @@ TRACE_EVENT(kvm_entry, ); TRACE_EVENT(kvm_exit, - TP_PROTO(unsigned long vcpu_pc), - TP_ARGS(vcpu_pc), + TP_PROTO(unsigned int exit_reason, unsigned long vcpu_pc), + TP_ARGS(exit_reason, vcpu_pc), TP_STRUCT__entry( + __field( unsigned int, exit_reason ) __field( unsigned long, vcpu_pc ) ), TP_fast_assign( + __entry->exit_reason = exit_reason; __entry->vcpu_pc = vcpu_pc; ), - TP_printk("PC: 0x%08lx", __entry->vcpu_pc) + TP_printk("HSR_EC: 0x%04x, PC: 0x%08lx", + __entry->exit_reason, + __entry->vcpu_pc) ); TRACE_EVENT(kvm_guest_fault, diff --git a/arch/arm/mach-asm9260/Kconfig b/arch/arm/mach-asm9260/Kconfig index 8423be7..5224120 100644 --- a/arch/arm/mach-asm9260/Kconfig +++ b/arch/arm/mach-asm9260/Kconfig @@ -2,5 +2,7 @@ config MACH_ASM9260 bool "Alphascale ASM9260" depends on ARCH_MULTI_V5 select CPU_ARM926T + select ASM9260_TIMER + select GENERIC_CLOCKEVENTS help Support for Alphascale ASM9260 based platform. diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index c74a443..4da6bae 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig @@ -24,7 +24,7 @@ config SOC_SAMA5 select GENERIC_CLOCKEVENTS select MEMORY select ATMEL_SDRAMC - select PHYLIB if NETDEVICES + select SRAM if PM menu "Atmel AT91 System-on-Chip" @@ -81,6 +81,8 @@ config SOC_AT91RM9200 select CPU_ARM920T select GENERIC_CLOCKEVENTS select HAVE_AT91_USB_CLK + select MIGHT_HAVE_PCI + select SRAM if PM config SOC_AT91SAM9 bool "AT91SAM9" @@ -94,6 +96,7 @@ config SOC_AT91SAM9 select HAVE_AT91_UTMI select HAVE_FB_ATMEL select MEMORY + select SRAM if PM help Select this if you are using one of those Atmel SoC: AT91SAM9260 @@ -116,20 +119,6 @@ endif # SOC_SAM_V4_V5 comment "AT91 Feature Selections" -config AT91_SLOW_CLOCK - bool "Suspend-to-RAM disables main oscillator" - select SRAM - depends on SUSPEND - help - Select this if you want Suspend-to-RAM to save the most power - possible (without powering off the CPU) by disabling the PLLs - and main oscillator so that only the 32 KiHz clock is available. - - When only that slow-clock is available, some peripherals lose - functionality. Many can't issue wakeup events unless faster - clocks are available. Some lose their operating state and - need to be completely re-initialized. - config AT91_TIMER_HZ int "Kernel HZ (jiffies per second)" range 32 1024 diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile index 827fdbc..ea54c98 100644 --- a/arch/arm/mach-at91/Makefile +++ b/arch/arm/mach-at91/Makefile @@ -2,7 +2,7 @@ # Makefile for the linux kernel. # -obj-y := setup.o +obj-y := soc.o obj-$(CONFIG_SOC_AT91SAM9) += sam9_smc.o @@ -13,7 +13,7 @@ obj-$(CONFIG_SOC_SAMA5) += sama5.o # Power Management obj-$(CONFIG_PM) += pm.o -obj-$(CONFIG_AT91_SLOW_CLOCK) += pm_slowclock.o +obj-$(CONFIG_PM) += pm_suspend.o ifeq ($(CONFIG_PM_DEBUG),y) CFLAGS_pm.o += -DDEBUG diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c index 8fcfb70..bfc9aed 100644 --- a/arch/arm/mach-at91/at91rm9200.c +++ b/arch/arm/mach-at91/at91rm9200.c @@ -8,25 +8,22 @@ * Licensed under GPLv2 or later. */ -#include <linux/types.h> -#include <linux/init.h> -#include <linux/module.h> -#include <linux/gpio.h> +#include <linux/clk-provider.h> #include <linux/of.h> -#include <linux/of_irq.h> #include <linux/of_platform.h> -#include <linux/clk-provider.h> -#include <asm/setup.h> -#include <asm/irq.h> #include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/mach/irq.h> #include <asm/system_misc.h> #include <mach/at91_st.h> #include "generic.h" +#include "soc.h" + +static const struct at91_soc rm9200_socs[] = { + AT91_SOC(AT91RM9200_CIDR_MATCH, 0, "at91rm9200 BGA", "at91rm9200"), + { /* sentinel */ }, +}; static void at91rm9200_restart(enum reboot_mode reboot_mode, const char *cmd) { @@ -45,15 +42,20 @@ static void __init at91rm9200_dt_timer_init(void) static void __init at91rm9200_dt_device_init(void) { - of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); + struct soc_device *soc; + struct device *soc_dev = NULL; + + soc = at91_soc_init(rm9200_socs); + if (soc != NULL) + soc_dev = soc_device_to_device(soc); + + of_platform_populate(NULL, of_default_bus_match_table, NULL, soc_dev); arm_pm_idle = at91rm9200_idle; arm_pm_restart = at91rm9200_restart; at91rm9200_pm_init(); } - - static const char *at91rm9200_dt_board_compat[] __initconst = { "atmel,at91rm9200", NULL @@ -61,7 +63,6 @@ static const char *at91rm9200_dt_board_compat[] __initconst = { DT_MACHINE_START(at91rm9200_dt, "Atmel AT91RM9200") .init_time = at91rm9200_dt_timer_init, - .map_io = at91_map_io, .init_machine = at91rm9200_dt_device_init, .dt_compat = at91rm9200_dt_board_compat, MACHINE_END diff --git a/arch/arm/mach-at91/at91sam9.c b/arch/arm/mach-at91/at91sam9.c index 56e3ba7..e47a209 100644 --- a/arch/arm/mach-at91/at91sam9.c +++ b/arch/arm/mach-at91/at91sam9.c @@ -7,29 +7,68 @@ * Licensed under GPLv2 or later. */ -#include <linux/types.h> -#include <linux/init.h> -#include <linux/module.h> -#include <linux/gpio.h> #include <linux/of.h> -#include <linux/of_irq.h> #include <linux/of_platform.h> -#include <linux/clk-provider.h> -#include <asm/system_misc.h> -#include <asm/setup.h> -#include <asm/irq.h> #include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/mach/irq.h> +#include <asm/system_misc.h> #include "generic.h" +#include "soc.h" -static void __init at91sam9_dt_device_init(void) +static const struct at91_soc at91sam9_socs[] = { + AT91_SOC(AT91SAM9260_CIDR_MATCH, 0, "at91sam9260", NULL), + AT91_SOC(AT91SAM9261_CIDR_MATCH, 0, "at91sam9261", NULL), + AT91_SOC(AT91SAM9263_CIDR_MATCH, 0, "at91sam9263", NULL), + AT91_SOC(AT91SAM9G20_CIDR_MATCH, 0, "at91sam9g20", NULL), + AT91_SOC(AT91SAM9RL64_CIDR_MATCH, 0, "at91sam9rl64", NULL), + AT91_SOC(AT91SAM9G45_CIDR_MATCH, AT91SAM9M11_EXID_MATCH, + "at91sam9m11", "at91sam9g45"), + AT91_SOC(AT91SAM9G45_CIDR_MATCH, AT91SAM9M10_EXID_MATCH, + "at91sam9m10", "at91sam9g45"), + AT91_SOC(AT91SAM9G45_CIDR_MATCH, AT91SAM9G46_EXID_MATCH, + "at91sam9g46", "at91sam9g45"), + AT91_SOC(AT91SAM9G45_CIDR_MATCH, AT91SAM9G45_EXID_MATCH, + "at91sam9g45", "at91sam9g45"), + AT91_SOC(AT91SAM9X5_CIDR_MATCH, AT91SAM9G15_EXID_MATCH, + "at91sam9g15", "at91sam9x5"), + AT91_SOC(AT91SAM9X5_CIDR_MATCH, AT91SAM9G35_EXID_MATCH, + "at91sam9g35", "at91sam9x5"), + AT91_SOC(AT91SAM9X5_CIDR_MATCH, AT91SAM9X35_EXID_MATCH, + "at91sam9x35", "at91sam9x5"), + AT91_SOC(AT91SAM9X5_CIDR_MATCH, AT91SAM9G25_EXID_MATCH, + "at91sam9g25", "at91sam9x5"), + AT91_SOC(AT91SAM9X5_CIDR_MATCH, AT91SAM9X25_EXID_MATCH, + "at91sam9x25", "at91sam9x5"), + AT91_SOC(AT91SAM9N12_CIDR_MATCH, AT91SAM9CN12_EXID_MATCH, + "at91sam9cn12", "at91sam9n12"), + AT91_SOC(AT91SAM9N12_CIDR_MATCH, AT91SAM9N12_EXID_MATCH, + "at91sam9n12", "at91sam9n12"), + AT91_SOC(AT91SAM9N12_CIDR_MATCH, AT91SAM9CN11_EXID_MATCH, + "at91sam9cn11", "at91sam9n12"), + AT91_SOC(AT91SAM9XE128_CIDR_MATCH, 0, "at91sam9xe128", "at91sam9xe128"), + AT91_SOC(AT91SAM9XE256_CIDR_MATCH, 0, "at91sam9xe256", "at91sam9xe256"), + AT91_SOC(AT91SAM9XE512_CIDR_MATCH, 0, "at91sam9xe512", "at91sam9xe512"), + { /* sentinel */ }, +}; + +static void __init at91sam9_common_init(void) { - of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); + struct soc_device *soc; + struct device *soc_dev = NULL; + + soc = at91_soc_init(at91sam9_socs); + if (soc != NULL) + soc_dev = soc_device_to_device(soc); + + of_platform_populate(NULL, of_default_bus_match_table, NULL, soc_dev); arm_pm_idle = at91sam9_idle; +} + +static void __init at91sam9_dt_device_init(void) +{ + at91sam9_common_init(); at91sam9260_pm_init(); } @@ -40,16 +79,13 @@ static const char *at91_dt_board_compat[] __initconst = { DT_MACHINE_START(at91sam_dt, "Atmel AT91SAM9") /* Maintainer: Atmel */ - .map_io = at91_map_io, .init_machine = at91sam9_dt_device_init, .dt_compat = at91_dt_board_compat, MACHINE_END static void __init at91sam9g45_dt_device_init(void) { - of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); - - arm_pm_idle = at91sam9_idle; + at91sam9_common_init(); at91sam9g45_pm_init(); } @@ -60,16 +96,13 @@ static const char *at91sam9g45_board_compat[] __initconst = { DT_MACHINE_START(at91sam9g45_dt, "Atmel AT91SAM9G45") /* Maintainer: Atmel */ - .map_io = at91_map_io, .init_machine = at91sam9g45_dt_device_init, .dt_compat = at91sam9g45_board_compat, MACHINE_END static void __init at91sam9x5_dt_device_init(void) { - of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); - - arm_pm_idle = at91sam9_idle; + at91sam9_common_init(); at91sam9x5_pm_init(); } @@ -81,7 +114,6 @@ static const char *at91sam9x5_board_compat[] __initconst = { DT_MACHINE_START(at91sam9x5_dt, "Atmel AT91SAM9") /* Maintainer: Atmel */ - .map_io = at91_map_io, .init_machine = at91sam9x5_dt_device_init, .dt_compat = at91sam9x5_board_compat, MACHINE_END diff --git a/arch/arm/mach-at91/generic.h b/arch/arm/mach-at91/generic.h index 583369f..2b396c4 100644 --- a/arch/arm/mach-at91/generic.h +++ b/arch/arm/mach-at91/generic.h @@ -25,10 +25,6 @@ extern void at91rm9200_timer_init(void); extern void at91rm9200_idle(void); extern void at91sam9_idle(void); -/* Matrix */ -extern void at91_ioremap_matrix(u32 base_addr); - - #ifdef CONFIG_PM extern void __init at91rm9200_pm_init(void); extern void __init at91sam9260_pm_init(void); diff --git a/arch/arm/mach-at91/include/mach/at91_matrix.h b/arch/arm/mach-at91/include/mach/at91_matrix.h deleted file mode 100644 index f8996c9..0000000 --- a/arch/arm/mach-at91/include/mach/at91_matrix.h +++ /dev/null @@ -1,23 +0,0 @@ -/* - * Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> - * - * Under GPLv2 - */ - -#ifndef __MACH_AT91_MATRIX_H__ -#define __MACH_AT91_MATRIX_H__ - -#ifndef __ASSEMBLY__ -extern void __iomem *at91_matrix_base; - -#define at91_matrix_read(field) \ - __raw_readl(at91_matrix_base + field) - -#define at91_matrix_write(field, value) \ - __raw_writel(value, at91_matrix_base + field) - -#else -.extern at91_matrix_base -#endif - -#endif /* __MACH_AT91_MATRIX_H__ */ diff --git a/arch/arm/mach-at91/include/mach/at91sam9260_matrix.h b/arch/arm/mach-at91/include/mach/at91sam9260_matrix.h deleted file mode 100644 index f459df4..0000000 --- a/arch/arm/mach-at91/include/mach/at91sam9260_matrix.h +++ /dev/null @@ -1,80 +0,0 @@ -/* - * arch/arm/mach-at91/include/mach/at91sam9260_matrix.h - * - * Copyright (C) 2007 Atmel Corporation. - * - * Memory Controllers (MATRIX, EBI) - System peripherals registers. - * Based on AT91SAM9260 datasheet revision B. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91SAM9260_MATRIX_H -#define AT91SAM9260_MATRIX_H - -#define AT91_MATRIX_MCFG0 0x00 /* Master Configuration Register 0 */ -#define AT91_MATRIX_MCFG1 0x04 /* Master Configuration Register 1 */ -#define AT91_MATRIX_MCFG2 0x08 /* Master Configuration Register 2 */ -#define AT91_MATRIX_MCFG3 0x0C /* Master Configuration Register 3 */ -#define AT91_MATRIX_MCFG4 0x10 /* Master Configuration Register 4 */ -#define AT91_MATRIX_MCFG5 0x14 /* Master Configuration Register 5 */ -#define AT91_MATRIX_ULBT (7 << 0) /* Undefined Length Burst Type */ -#define AT91_MATRIX_ULBT_INFINITE (0 << 0) -#define AT91_MATRIX_ULBT_SINGLE (1 << 0) -#define AT91_MATRIX_ULBT_FOUR (2 << 0) -#define AT91_MATRIX_ULBT_EIGHT (3 << 0) -#define AT91_MATRIX_ULBT_SIXTEEN (4 << 0) - -#define AT91_MATRIX_SCFG0 0x40 /* Slave Configuration Register 0 */ -#define AT91_MATRIX_SCFG1 0x44 /* Slave Configuration Register 1 */ -#define AT91_MATRIX_SCFG2 0x48 /* Slave Configuration Register 2 */ -#define AT91_MATRIX_SCFG3 0x4C /* Slave Configuration Register 3 */ -#define AT91_MATRIX_SCFG4 0x50 /* Slave Configuration Register 4 */ -#define AT91_MATRIX_SLOT_CYCLE (0xff << 0) /* Maximum Number of Allowed Cycles for a Burst */ -#define AT91_MATRIX_DEFMSTR_TYPE (3 << 16) /* Default Master Type */ -#define AT91_MATRIX_DEFMSTR_TYPE_NONE (0 << 16) -#define AT91_MATRIX_DEFMSTR_TYPE_LAST (1 << 16) -#define AT91_MATRIX_DEFMSTR_TYPE_FIXED (2 << 16) -#define AT91_MATRIX_FIXED_DEFMSTR (7 << 18) /* Fixed Index of Default Master */ -#define AT91_MATRIX_ARBT (3 << 24) /* Arbitration Type */ -#define AT91_MATRIX_ARBT_ROUND_ROBIN (0 << 24) -#define AT91_MATRIX_ARBT_FIXED_PRIORITY (1 << 24) - -#define AT91_MATRIX_PRAS0 0x80 /* Priority Register A for Slave 0 */ -#define AT91_MATRIX_PRAS1 0x88 /* Priority Register A for Slave 1 */ -#define AT91_MATRIX_PRAS2 0x90 /* Priority Register A for Slave 2 */ -#define AT91_MATRIX_PRAS3 0x98 /* Priority Register A for Slave 3 */ -#define AT91_MATRIX_PRAS4 0xA0 /* Priority Register A for Slave 4 */ -#define AT91_MATRIX_M0PR (3 << 0) /* Master 0 Priority */ -#define AT91_MATRIX_M1PR (3 << 4) /* Master 1 Priority */ -#define AT91_MATRIX_M2PR (3 << 8) /* Master 2 Priority */ -#define AT91_MATRIX_M3PR (3 << 12) /* Master 3 Priority */ -#define AT91_MATRIX_M4PR (3 << 16) /* Master 4 Priority */ -#define AT91_MATRIX_M5PR (3 << 20) /* Master 5 Priority */ - -#define AT91_MATRIX_MRCR 0x100 /* Master Remap Control Register */ -#define AT91_MATRIX_RCB0 (1 << 0) /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */ -#define AT91_MATRIX_RCB1 (1 << 1) /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */ - -#define AT91_MATRIX_EBICSA 0x11C /* EBI Chip Select Assignment Register */ -#define AT91_MATRIX_CS1A (1 << 1) /* Chip Select 1 Assignment */ -#define AT91_MATRIX_CS1A_SMC (0 << 1) -#define AT91_MATRIX_CS1A_SDRAMC (1 << 1) -#define AT91_MATRIX_CS3A (1 << 3) /* Chip Select 3 Assignment */ -#define AT91_MATRIX_CS3A_SMC (0 << 3) -#define AT91_MATRIX_CS3A_SMC_SMARTMEDIA (1 << 3) -#define AT91_MATRIX_CS4A (1 << 4) /* Chip Select 4 Assignment */ -#define AT91_MATRIX_CS4A_SMC (0 << 4) -#define AT91_MATRIX_CS4A_SMC_CF1 (1 << 4) -#define AT91_MATRIX_CS5A (1 << 5) /* Chip Select 5 Assignment */ -#define AT91_MATRIX_CS5A_SMC (0 << 5) -#define AT91_MATRIX_CS5A_SMC_CF2 (1 << 5) -#define AT91_MATRIX_DBPUC (1 << 8) /* Data Bus Pull-up Configuration */ -#define AT91_MATRIX_VDDIOMSEL (1 << 16) /* Memory voltage selection */ -#define AT91_MATRIX_VDDIOMSEL_1_8V (0 << 16) -#define AT91_MATRIX_VDDIOMSEL_3_3V (1 << 16) - -#endif diff --git a/arch/arm/mach-at91/include/mach/at91sam9261_matrix.h b/arch/arm/mach-at91/include/mach/at91sam9261_matrix.h deleted file mode 100644 index a50cdf8..0000000 --- a/arch/arm/mach-at91/include/mach/at91sam9261_matrix.h +++ /dev/null @@ -1,64 +0,0 @@ -/* - * arch/arm/mach-at91/include/mach/at91sam9261_matrix.h - * - * Copyright (C) 2007 Atmel Corporation. - * - * Memory Controllers (MATRIX, EBI) - System peripherals registers. - * Based on AT91SAM9261 datasheet revision D. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91SAM9261_MATRIX_H -#define AT91SAM9261_MATRIX_H - -#define AT91_MATRIX_MCFG 0x00 /* Master Configuration Register */ -#define AT91_MATRIX_RCB0 (1 << 0) /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */ -#define AT91_MATRIX_RCB1 (1 << 1) /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */ - -#define AT91_MATRIX_SCFG0 0x04 /* Slave Configuration Register 0 */ -#define AT91_MATRIX_SCFG1 0x08 /* Slave Configuration Register 1 */ -#define AT91_MATRIX_SCFG2 0x0C /* Slave Configuration Register 2 */ -#define AT91_MATRIX_SCFG3 0x10 /* Slave Configuration Register 3 */ -#define AT91_MATRIX_SCFG4 0x14 /* Slave Configuration Register 4 */ -#define AT91_MATRIX_SLOT_CYCLE (0xff << 0) /* Maximum Number of Allowed Cycles for a Burst */ -#define AT91_MATRIX_DEFMSTR_TYPE (3 << 16) /* Default Master Type */ -#define AT91_MATRIX_DEFMSTR_TYPE_NONE (0 << 16) -#define AT91_MATRIX_DEFMSTR_TYPE_LAST (1 << 16) -#define AT91_MATRIX_DEFMSTR_TYPE_FIXED (2 << 16) -#define AT91_MATRIX_FIXED_DEFMSTR (7 << 18) /* Fixed Index of Default Master */ - -#define AT91_MATRIX_TCR 0x24 /* TCM Configuration Register */ -#define AT91_MATRIX_ITCM_SIZE (0xf << 0) /* Size of ITCM enabled memory block */ -#define AT91_MATRIX_ITCM_0 (0 << 0) -#define AT91_MATRIX_ITCM_16 (5 << 0) -#define AT91_MATRIX_ITCM_32 (6 << 0) -#define AT91_MATRIX_ITCM_64 (7 << 0) -#define AT91_MATRIX_DTCM_SIZE (0xf << 4) /* Size of DTCM enabled memory block */ -#define AT91_MATRIX_DTCM_0 (0 << 4) -#define AT91_MATRIX_DTCM_16 (5 << 4) -#define AT91_MATRIX_DTCM_32 (6 << 4) -#define AT91_MATRIX_DTCM_64 (7 << 4) - -#define AT91_MATRIX_EBICSA 0x30 /* EBI Chip Select Assignment Register */ -#define AT91_MATRIX_CS1A (1 << 1) /* Chip Select 1 Assignment */ -#define AT91_MATRIX_CS1A_SMC (0 << 1) -#define AT91_MATRIX_CS1A_SDRAMC (1 << 1) -#define AT91_MATRIX_CS3A (1 << 3) /* Chip Select 3 Assignment */ -#define AT91_MATRIX_CS3A_SMC (0 << 3) -#define AT91_MATRIX_CS3A_SMC_SMARTMEDIA (1 << 3) -#define AT91_MATRIX_CS4A (1 << 4) /* Chip Select 4 Assignment */ -#define AT91_MATRIX_CS4A_SMC (0 << 4) -#define AT91_MATRIX_CS4A_SMC_CF1 (1 << 4) -#define AT91_MATRIX_CS5A (1 << 5) /* Chip Select 5 Assignment */ -#define AT91_MATRIX_CS5A_SMC (0 << 5) -#define AT91_MATRIX_CS5A_SMC_CF2 (1 << 5) -#define AT91_MATRIX_DBPUC (1 << 8) /* Data Bus Pull-up Configuration */ - -#define AT91_MATRIX_USBPUCR 0x34 /* USB Pad Pull-Up Control Register */ -#define AT91_MATRIX_USBPUCR_PUON (1 << 30) /* USB Device PAD Pull-up Enable */ - -#endif diff --git a/arch/arm/mach-at91/include/mach/at91sam9263_matrix.h b/arch/arm/mach-at91/include/mach/at91sam9263_matrix.h deleted file mode 100644 index ebb5fdb..0000000 --- a/arch/arm/mach-at91/include/mach/at91sam9263_matrix.h +++ /dev/null @@ -1,129 +0,0 @@ -/* - * arch/arm/mach-at91/include/mach/at91sam9263_matrix.h - * - * Copyright (C) 2006 Atmel Corporation. - * - * Memory Controllers (MATRIX, EBI) - System peripherals registers. - * Based on AT91SAM9263 datasheet revision B (Preliminary). - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91SAM9263_MATRIX_H -#define AT91SAM9263_MATRIX_H - -#define AT91_MATRIX_MCFG0 0x00 /* Master Configuration Register 0 */ -#define AT91_MATRIX_MCFG1 0x04 /* Master Configuration Register 1 */ -#define AT91_MATRIX_MCFG2 0x08 /* Master Configuration Register 2 */ -#define AT91_MATRIX_MCFG3 0x0C /* Master Configuration Register 3 */ -#define AT91_MATRIX_MCFG4 0x10 /* Master Configuration Register 4 */ -#define AT91_MATRIX_MCFG5 0x14 /* Master Configuration Register 5 */ -#define AT91_MATRIX_MCFG6 0x18 /* Master Configuration Register 6 */ -#define AT91_MATRIX_MCFG7 0x1C /* Master Configuration Register 7 */ -#define AT91_MATRIX_MCFG8 0x20 /* Master Configuration Register 8 */ -#define AT91_MATRIX_ULBT (7 << 0) /* Undefined Length Burst Type */ -#define AT91_MATRIX_ULBT_INFINITE (0 << 0) -#define AT91_MATRIX_ULBT_SINGLE (1 << 0) -#define AT91_MATRIX_ULBT_FOUR (2 << 0) -#define AT91_MATRIX_ULBT_EIGHT (3 << 0) -#define AT91_MATRIX_ULBT_SIXTEEN (4 << 0) - -#define AT91_MATRIX_SCFG0 0x40 /* Slave Configuration Register 0 */ -#define AT91_MATRIX_SCFG1 0x44 /* Slave Configuration Register 1 */ -#define AT91_MATRIX_SCFG2 0x48 /* Slave Configuration Register 2 */ -#define AT91_MATRIX_SCFG3 0x4C /* Slave Configuration Register 3 */ -#define AT91_MATRIX_SCFG4 0x50 /* Slave Configuration Register 4 */ -#define AT91_MATRIX_SCFG5 0x54 /* Slave Configuration Register 5 */ -#define AT91_MATRIX_SCFG6 0x58 /* Slave Configuration Register 6 */ -#define AT91_MATRIX_SCFG7 0x5C /* Slave Configuration Register 7 */ -#define AT91_MATRIX_SLOT_CYCLE (0xff << 0) /* Maximum Number of Allowed Cycles for a Burst */ -#define AT91_MATRIX_DEFMSTR_TYPE (3 << 16) /* Default Master Type */ -#define AT91_MATRIX_DEFMSTR_TYPE_NONE (0 << 16) -#define AT91_MATRIX_DEFMSTR_TYPE_LAST (1 << 16) -#define AT91_MATRIX_DEFMSTR_TYPE_FIXED (2 << 16) -#define AT91_MATRIX_FIXED_DEFMSTR (0xf << 18) /* Fixed Index of Default Master */ -#define AT91_MATRIX_ARBT (3 << 24) /* Arbitration Type */ -#define AT91_MATRIX_ARBT_ROUND_ROBIN (0 << 24) -#define AT91_MATRIX_ARBT_FIXED_PRIORITY (1 << 24) - -#define AT91_MATRIX_PRAS0 0x80 /* Priority Register A for Slave 0 */ -#define AT91_MATRIX_PRBS0 0x84 /* Priority Register B for Slave 0 */ -#define AT91_MATRIX_PRAS1 0x88 /* Priority Register A for Slave 1 */ -#define AT91_MATRIX_PRBS1 0x8C /* Priority Register B for Slave 1 */ -#define AT91_MATRIX_PRAS2 0x90 /* Priority Register A for Slave 2 */ -#define AT91_MATRIX_PRBS2 0x94 /* Priority Register B for Slave 2 */ -#define AT91_MATRIX_PRAS3 0x98 /* Priority Register A for Slave 3 */ -#define AT91_MATRIX_PRBS3 0x9C /* Priority Register B for Slave 3 */ -#define AT91_MATRIX_PRAS4 0xA0 /* Priority Register A for Slave 4 */ -#define AT91_MATRIX_PRBS4 0xA4 /* Priority Register B for Slave 4 */ -#define AT91_MATRIX_PRAS5 0xA8 /* Priority Register A for Slave 5 */ -#define AT91_MATRIX_PRBS5 0xAC /* Priority Register B for Slave 5 */ -#define AT91_MATRIX_PRAS6 0xB0 /* Priority Register A for Slave 6 */ -#define AT91_MATRIX_PRBS6 0xB4 /* Priority Register B for Slave 6 */ -#define AT91_MATRIX_PRAS7 0xB8 /* Priority Register A for Slave 7 */ -#define AT91_MATRIX_PRBS7 0xBC /* Priority Register B for Slave 7 */ -#define AT91_MATRIX_M0PR (3 << 0) /* Master 0 Priority */ -#define AT91_MATRIX_M1PR (3 << 4) /* Master 1 Priority */ -#define AT91_MATRIX_M2PR (3 << 8) /* Master 2 Priority */ -#define AT91_MATRIX_M3PR (3 << 12) /* Master 3 Priority */ -#define AT91_MATRIX_M4PR (3 << 16) /* Master 4 Priority */ -#define AT91_MATRIX_M5PR (3 << 20) /* Master 5 Priority */ -#define AT91_MATRIX_M6PR (3 << 24) /* Master 6 Priority */ -#define AT91_MATRIX_M7PR (3 << 28) /* Master 7 Priority */ -#define AT91_MATRIX_M8PR (3 << 0) /* Master 8 Priority (in Register B) */ - -#define AT91_MATRIX_MRCR 0x100 /* Master Remap Control Register */ -#define AT91_MATRIX_RCB0 (1 << 0) /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */ -#define AT91_MATRIX_RCB1 (1 << 1) /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */ -#define AT91_MATRIX_RCB2 (1 << 2) -#define AT91_MATRIX_RCB3 (1 << 3) -#define AT91_MATRIX_RCB4 (1 << 4) -#define AT91_MATRIX_RCB5 (1 << 5) -#define AT91_MATRIX_RCB6 (1 << 6) -#define AT91_MATRIX_RCB7 (1 << 7) -#define AT91_MATRIX_RCB8 (1 << 8) - -#define AT91_MATRIX_TCMR 0x114 /* TCM Configuration Register */ -#define AT91_MATRIX_ITCM_SIZE (0xf << 0) /* Size of ITCM enabled memory block */ -#define AT91_MATRIX_ITCM_0 (0 << 0) -#define AT91_MATRIX_ITCM_16 (5 << 0) -#define AT91_MATRIX_ITCM_32 (6 << 0) -#define AT91_MATRIX_DTCM_SIZE (0xf << 4) /* Size of DTCM enabled memory block */ -#define AT91_MATRIX_DTCM_0 (0 << 4) -#define AT91_MATRIX_DTCM_16 (5 << 4) -#define AT91_MATRIX_DTCM_32 (6 << 4) - -#define AT91_MATRIX_EBI0CSA 0x120 /* EBI0 Chip Select Assignment Register */ -#define AT91_MATRIX_EBI0_CS1A (1 << 1) /* Chip Select 1 Assignment */ -#define AT91_MATRIX_EBI0_CS1A_SMC (0 << 1) -#define AT91_MATRIX_EBI0_CS1A_SDRAMC (1 << 1) -#define AT91_MATRIX_EBI0_CS3A (1 << 3) /* Chip Select 3 Assignment */ -#define AT91_MATRIX_EBI0_CS3A_SMC (0 << 3) -#define AT91_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA (1 << 3) -#define AT91_MATRIX_EBI0_CS4A (1 << 4) /* Chip Select 4 Assignment */ -#define AT91_MATRIX_EBI0_CS4A_SMC (0 << 4) -#define AT91_MATRIX_EBI0_CS4A_SMC_CF1 (1 << 4) -#define AT91_MATRIX_EBI0_CS5A (1 << 5) /* Chip Select 5 Assignment */ -#define AT91_MATRIX_EBI0_CS5A_SMC (0 << 5) -#define AT91_MATRIX_EBI0_CS5A_SMC_CF2 (1 << 5) -#define AT91_MATRIX_EBI0_DBPUC (1 << 8) /* Data Bus Pull-up Configuration */ -#define AT91_MATRIX_EBI0_VDDIOMSEL (1 << 16) /* Memory voltage selection */ -#define AT91_MATRIX_EBI0_VDDIOMSEL_1_8V (0 << 16) -#define AT91_MATRIX_EBI0_VDDIOMSEL_3_3V (1 << 16) - -#define AT91_MATRIX_EBI1CSA 0x124 /* EBI1 Chip Select Assignment Register */ -#define AT91_MATRIX_EBI1_CS1A (1 << 1) /* Chip Select 1 Assignment */ -#define AT91_MATRIX_EBI1_CS1A_SMC (0 << 1) -#define AT91_MATRIX_EBI1_CS1A_SDRAMC (1 << 1) -#define AT91_MATRIX_EBI1_CS2A (1 << 3) /* Chip Select 3 Assignment */ -#define AT91_MATRIX_EBI1_CS2A_SMC (0 << 3) -#define AT91_MATRIX_EBI1_CS2A_SMC_SMARTMEDIA (1 << 3) -#define AT91_MATRIX_EBI1_DBPUC (1 << 8) /* Data Bus Pull-up Configuration */ -#define AT91_MATRIX_EBI1_VDDIOMSEL (1 << 16) /* Memory voltage selection */ -#define AT91_MATRIX_EBI1_VDDIOMSEL_1_8V (0 << 16) -#define AT91_MATRIX_EBI1_VDDIOMSEL_3_3V (1 << 16) - -#endif diff --git a/arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h b/arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h deleted file mode 100644 index b76e2ed..0000000 --- a/arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h +++ /dev/null @@ -1,153 +0,0 @@ -/* - * Matrix-centric header file for the AT91SAM9G45 family - * - * Copyright (C) 2008-2009 Atmel Corporation. - * - * Memory Controllers (MATRIX, EBI) - System peripherals registers. - * Based on AT91SAM9G45 preliminary datasheet. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91SAM9G45_MATRIX_H -#define AT91SAM9G45_MATRIX_H - -#define AT91_MATRIX_MCFG0 0x00 /* Master Configuration Register 0 */ -#define AT91_MATRIX_MCFG1 0x04 /* Master Configuration Register 1 */ -#define AT91_MATRIX_MCFG2 0x08 /* Master Configuration Register 2 */ -#define AT91_MATRIX_MCFG3 0x0C /* Master Configuration Register 3 */ -#define AT91_MATRIX_MCFG4 0x10 /* Master Configuration Register 4 */ -#define AT91_MATRIX_MCFG5 0x14 /* Master Configuration Register 5 */ -#define AT91_MATRIX_MCFG6 0x18 /* Master Configuration Register 6 */ -#define AT91_MATRIX_MCFG7 0x1C /* Master Configuration Register 7 */ -#define AT91_MATRIX_MCFG8 0x20 /* Master Configuration Register 8 */ -#define AT91_MATRIX_MCFG9 0x24 /* Master Configuration Register 9 */ -#define AT91_MATRIX_MCFG10 0x28 /* Master Configuration Register 10 */ -#define AT91_MATRIX_MCFG11 0x2C /* Master Configuration Register 11 */ -#define AT91_MATRIX_ULBT (7 << 0) /* Undefined Length Burst Type */ -#define AT91_MATRIX_ULBT_INFINITE (0 << 0) -#define AT91_MATRIX_ULBT_SINGLE (1 << 0) -#define AT91_MATRIX_ULBT_FOUR (2 << 0) -#define AT91_MATRIX_ULBT_EIGHT (3 << 0) -#define AT91_MATRIX_ULBT_SIXTEEN (4 << 0) -#define AT91_MATRIX_ULBT_THIRTYTWO (5 << 0) -#define AT91_MATRIX_ULBT_SIXTYFOUR (6 << 0) -#define AT91_MATRIX_ULBT_128 (7 << 0) - -#define AT91_MATRIX_SCFG0 0x40 /* Slave Configuration Register 0 */ -#define AT91_MATRIX_SCFG1 0x44 /* Slave Configuration Register 1 */ -#define AT91_MATRIX_SCFG2 0x48 /* Slave Configuration Register 2 */ -#define AT91_MATRIX_SCFG3 0x4C /* Slave Configuration Register 3 */ -#define AT91_MATRIX_SCFG4 0x50 /* Slave Configuration Register 4 */ -#define AT91_MATRIX_SCFG5 0x54 /* Slave Configuration Register 5 */ -#define AT91_MATRIX_SCFG6 0x58 /* Slave Configuration Register 6 */ -#define AT91_MATRIX_SCFG7 0x5C /* Slave Configuration Register 7 */ -#define AT91_MATRIX_SLOT_CYCLE (0x1ff << 0) /* Maximum Number of Allowed Cycles for a Burst */ -#define AT91_MATRIX_DEFMSTR_TYPE (3 << 16) /* Default Master Type */ -#define AT91_MATRIX_DEFMSTR_TYPE_NONE (0 << 16) -#define AT91_MATRIX_DEFMSTR_TYPE_LAST (1 << 16) -#define AT91_MATRIX_DEFMSTR_TYPE_FIXED (2 << 16) -#define AT91_MATRIX_FIXED_DEFMSTR (0xf << 18) /* Fixed Index of Default Master */ - -#define AT91_MATRIX_PRAS0 0x80 /* Priority Register A for Slave 0 */ -#define AT91_MATRIX_PRBS0 0x84 /* Priority Register B for Slave 0 */ -#define AT91_MATRIX_PRAS1 0x88 /* Priority Register A for Slave 1 */ -#define AT91_MATRIX_PRBS1 0x8C /* Priority Register B for Slave 1 */ -#define AT91_MATRIX_PRAS2 0x90 /* Priority Register A for Slave 2 */ -#define AT91_MATRIX_PRBS2 0x94 /* Priority Register B for Slave 2 */ -#define AT91_MATRIX_PRAS3 0x98 /* Priority Register A for Slave 3 */ -#define AT91_MATRIX_PRBS3 0x9C /* Priority Register B for Slave 3 */ -#define AT91_MATRIX_PRAS4 0xA0 /* Priority Register A for Slave 4 */ -#define AT91_MATRIX_PRBS4 0xA4 /* Priority Register B for Slave 4 */ -#define AT91_MATRIX_PRAS5 0xA8 /* Priority Register A for Slave 5 */ -#define AT91_MATRIX_PRBS5 0xAC /* Priority Register B for Slave 5 */ -#define AT91_MATRIX_PRAS6 0xB0 /* Priority Register A for Slave 6 */ -#define AT91_MATRIX_PRBS6 0xB4 /* Priority Register B for Slave 6 */ -#define AT91_MATRIX_PRAS7 0xB8 /* Priority Register A for Slave 7 */ -#define AT91_MATRIX_PRBS7 0xBC /* Priority Register B for Slave 7 */ -#define AT91_MATRIX_M0PR (3 << 0) /* Master 0 Priority */ -#define AT91_MATRIX_M1PR (3 << 4) /* Master 1 Priority */ -#define AT91_MATRIX_M2PR (3 << 8) /* Master 2 Priority */ -#define AT91_MATRIX_M3PR (3 << 12) /* Master 3 Priority */ -#define AT91_MATRIX_M4PR (3 << 16) /* Master 4 Priority */ -#define AT91_MATRIX_M5PR (3 << 20) /* Master 5 Priority */ -#define AT91_MATRIX_M6PR (3 << 24) /* Master 6 Priority */ -#define AT91_MATRIX_M7PR (3 << 28) /* Master 7 Priority */ -#define AT91_MATRIX_M8PR (3 << 0) /* Master 8 Priority (in Register B) */ -#define AT91_MATRIX_M9PR (3 << 4) /* Master 9 Priority (in Register B) */ -#define AT91_MATRIX_M10PR (3 << 8) /* Master 10 Priority (in Register B) */ -#define AT91_MATRIX_M11PR (3 << 12) /* Master 11 Priority (in Register B) */ - -#define AT91_MATRIX_MRCR 0x100 /* Master Remap Control Register */ -#define AT91_MATRIX_RCB0 (1 << 0) /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */ -#define AT91_MATRIX_RCB1 (1 << 1) /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */ -#define AT91_MATRIX_RCB2 (1 << 2) -#define AT91_MATRIX_RCB3 (1 << 3) -#define AT91_MATRIX_RCB4 (1 << 4) -#define AT91_MATRIX_RCB5 (1 << 5) -#define AT91_MATRIX_RCB6 (1 << 6) -#define AT91_MATRIX_RCB7 (1 << 7) -#define AT91_MATRIX_RCB8 (1 << 8) -#define AT91_MATRIX_RCB9 (1 << 9) -#define AT91_MATRIX_RCB10 (1 << 10) -#define AT91_MATRIX_RCB11 (1 << 11) - -#define AT91_MATRIX_TCMR 0x110 /* TCM Configuration Register */ -#define AT91_MATRIX_ITCM_SIZE (0xf << 0) /* Size of ITCM enabled memory block */ -#define AT91_MATRIX_ITCM_0 (0 << 0) -#define AT91_MATRIX_ITCM_32 (6 << 0) -#define AT91_MATRIX_DTCM_SIZE (0xf << 4) /* Size of DTCM enabled memory block */ -#define AT91_MATRIX_DTCM_0 (0 << 4) -#define AT91_MATRIX_DTCM_32 (6 << 4) -#define AT91_MATRIX_DTCM_64 (7 << 4) -#define AT91_MATRIX_TCM_NWS (0x1 << 11) /* Wait state TCM register */ -#define AT91_MATRIX_TCM_NO_WS (0x0 << 11) -#define AT91_MATRIX_TCM_ONE_WS (0x1 << 11) - -#define AT91_MATRIX_VIDEO 0x118 /* Video Mode Configuration Register */ -#define AT91C_VDEC_SEL (0x1 << 0) /* Video Mode Selection */ -#define AT91C_VDEC_SEL_OFF (0 << 0) -#define AT91C_VDEC_SEL_ON (1 << 0) - -#define AT91_MATRIX_EBICSA 0x128 /* EBI Chip Select Assignment Register */ -#define AT91_MATRIX_EBI_CS1A (1 << 1) /* Chip Select 1 Assignment */ -#define AT91_MATRIX_EBI_CS1A_SMC (0 << 1) -#define AT91_MATRIX_EBI_CS1A_SDRAMC (1 << 1) -#define AT91_MATRIX_EBI_CS3A (1 << 3) /* Chip Select 3 Assignment */ -#define AT91_MATRIX_EBI_CS3A_SMC (0 << 3) -#define AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA (1 << 3) -#define AT91_MATRIX_EBI_CS4A (1 << 4) /* Chip Select 4 Assignment */ -#define AT91_MATRIX_EBI_CS4A_SMC (0 << 4) -#define AT91_MATRIX_EBI_CS4A_SMC_CF0 (1 << 4) -#define AT91_MATRIX_EBI_CS5A (1 << 5) /* Chip Select 5 Assignment */ -#define AT91_MATRIX_EBI_CS5A_SMC (0 << 5) -#define AT91_MATRIX_EBI_CS5A_SMC_CF1 (1 << 5) -#define AT91_MATRIX_EBI_DBPUC (1 << 8) /* Data Bus Pull-up Configuration */ -#define AT91_MATRIX_EBI_DBPU_ON (0 << 8) -#define AT91_MATRIX_EBI_DBPU_OFF (1 << 8) -#define AT91_MATRIX_EBI_VDDIOMSEL (1 << 16) /* Memory voltage selection */ -#define AT91_MATRIX_EBI_VDDIOMSEL_1_8V (0 << 16) -#define AT91_MATRIX_EBI_VDDIOMSEL_3_3V (1 << 16) -#define AT91_MATRIX_EBI_EBI_IOSR (1 << 17) /* EBI I/O slew rate selection */ -#define AT91_MATRIX_EBI_EBI_IOSR_REDUCED (0 << 17) -#define AT91_MATRIX_EBI_EBI_IOSR_NORMAL (1 << 17) -#define AT91_MATRIX_EBI_DDR_IOSR (1 << 18) /* DDR2 dedicated port I/O slew rate selection */ -#define AT91_MATRIX_EBI_DDR_IOSR_REDUCED (0 << 18) -#define AT91_MATRIX_EBI_DDR_IOSR_NORMAL (1 << 18) - -#define AT91_MATRIX_WPMR 0x1E4 /* Write Protect Mode Register */ -#define AT91_MATRIX_WPMR_WPEN (1 << 0) /* Write Protect ENable */ -#define AT91_MATRIX_WPMR_WP_WPDIS (0 << 0) -#define AT91_MATRIX_WPMR_WP_WPEN (1 << 0) -#define AT91_MATRIX_WPMR_WPKEY (0xFFFFFF << 8) /* Write Protect KEY */ - -#define AT91_MATRIX_WPSR 0x1E8 /* Write Protect Status Register */ -#define AT91_MATRIX_WPSR_WPVS (1 << 0) /* Write Protect Violation Status */ -#define AT91_MATRIX_WPSR_NO_WPV (0 << 0) -#define AT91_MATRIX_WPSR_WPV (1 << 0) -#define AT91_MATRIX_WPSR_WPVSRC (0xFFFF << 8) /* Write Protect Violation Source */ - -#endif diff --git a/arch/arm/mach-at91/include/mach/at91sam9n12_matrix.h b/arch/arm/mach-at91/include/mach/at91sam9n12_matrix.h deleted file mode 100644 index 40060cd..0000000 --- a/arch/arm/mach-at91/include/mach/at91sam9n12_matrix.h +++ /dev/null @@ -1,53 +0,0 @@ -/* - * Matrix-centric header file for the AT91SAM9N12 - * - * Copyright (C) 2012 Atmel Corporation. - * - * Only EBI related registers. - * Write Protect register definitions may be useful. - * - * Licensed under GPLv2 or later. - */ - -#ifndef _AT91SAM9N12_MATRIX_H_ -#define _AT91SAM9N12_MATRIX_H_ - -#define AT91_MATRIX_EBICSA (AT91_MATRIX + 0x118) /* EBI Chip Select Assignment Register */ -#define AT91_MATRIX_EBI_CS1A (1 << 1) /* Chip Select 1 Assignment */ -#define AT91_MATRIX_EBI_CS1A_SMC (0 << 1) -#define AT91_MATRIX_EBI_CS1A_SDRAMC (1 << 1) -#define AT91_MATRIX_EBI_CS3A (1 << 3) /* Chip Select 3 Assignment */ -#define AT91_MATRIX_EBI_CS3A_SMC (0 << 3) -#define AT91_MATRIX_EBI_CS3A_SMC_NANDFLASH (1 << 3) -#define AT91_MATRIX_EBI_DBPUC (1 << 8) /* Data Bus Pull-up Configuration */ -#define AT91_MATRIX_EBI_DBPU_ON (0 << 8) -#define AT91_MATRIX_EBI_DBPU_OFF (1 << 8) -#define AT91_MATRIX_EBI_VDDIOMSEL (1 << 16) /* Memory voltage selection */ -#define AT91_MATRIX_EBI_VDDIOMSEL_1_8V (0 << 16) -#define AT91_MATRIX_EBI_VDDIOMSEL_3_3V (1 << 16) -#define AT91_MATRIX_EBI_EBI_IOSR (1 << 17) /* EBI I/O slew rate selection */ -#define AT91_MATRIX_EBI_EBI_IOSR_REDUCED (0 << 17) -#define AT91_MATRIX_EBI_EBI_IOSR_NORMAL (1 << 17) -#define AT91_MATRIX_EBI_DDR_IOSR (1 << 18) /* DDR2 dedicated port I/O slew rate selection */ -#define AT91_MATRIX_EBI_DDR_IOSR_REDUCED (0 << 18) -#define AT91_MATRIX_EBI_DDR_IOSR_NORMAL (1 << 18) -#define AT91_MATRIX_NFD0_SELECT (1 << 24) /* NAND Flash Data Bus Selection */ -#define AT91_MATRIX_NFD0_ON_D0 (0 << 24) -#define AT91_MATRIX_NFD0_ON_D16 (1 << 24) -#define AT91_MATRIX_DDR_MP_EN (1 << 25) /* DDR Multi-port Enable */ -#define AT91_MATRIX_MP_OFF (0 << 25) -#define AT91_MATRIX_MP_ON (1 << 25) - -#define AT91_MATRIX_WPMR (AT91_MATRIX + 0x1E4) /* Write Protect Mode Register */ -#define AT91_MATRIX_WPMR_WPEN (1 << 0) /* Write Protect ENable */ -#define AT91_MATRIX_WPMR_WP_WPDIS (0 << 0) -#define AT91_MATRIX_WPMR_WP_WPEN (1 << 0) -#define AT91_MATRIX_WPMR_WPKEY (0xFFFFFF << 8) /* Write Protect KEY */ - -#define AT91_MATRIX_WPSR (AT91_MATRIX + 0x1E8) /* Write Protect Status Register */ -#define AT91_MATRIX_WPSR_WPVS (1 << 0) /* Write Protect Violation Status */ -#define AT91_MATRIX_WPSR_NO_WPV (0 << 0) -#define AT91_MATRIX_WPSR_WPV (1 << 0) -#define AT91_MATRIX_WPSR_WPVSRC (0xFFFF << 8) /* Write Protect Violation Source */ - -#endif diff --git a/arch/arm/mach-at91/include/mach/at91sam9rl_matrix.h b/arch/arm/mach-at91/include/mach/at91sam9rl_matrix.h deleted file mode 100644 index 6d160ada..0000000 --- a/arch/arm/mach-at91/include/mach/at91sam9rl_matrix.h +++ /dev/null @@ -1,96 +0,0 @@ -/* - * arch/arm/mach-at91/include/mach/at91sam9rl_matrix.h - * - * Copyright (C) 2007 Atmel Corporation - * - * Memory Controllers (MATRIX, EBI) - System peripherals registers. - * Based on AT91SAM9RL datasheet revision A. (Preliminary) - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file COPYING in the main directory of this archive for - * more details. - */ - -#ifndef AT91SAM9RL_MATRIX_H -#define AT91SAM9RL_MATRIX_H - -#define AT91_MATRIX_MCFG0 0x00 /* Master Configuration Register 0 */ -#define AT91_MATRIX_MCFG1 0x04 /* Master Configuration Register 1 */ -#define AT91_MATRIX_MCFG2 0x08 /* Master Configuration Register 2 */ -#define AT91_MATRIX_MCFG3 0x0C /* Master Configuration Register 3 */ -#define AT91_MATRIX_MCFG4 0x10 /* Master Configuration Register 4 */ -#define AT91_MATRIX_MCFG5 0x14 /* Master Configuration Register 5 */ -#define AT91_MATRIX_ULBT (7 << 0) /* Undefined Length Burst Type */ -#define AT91_MATRIX_ULBT_INFINITE (0 << 0) -#define AT91_MATRIX_ULBT_SINGLE (1 << 0) -#define AT91_MATRIX_ULBT_FOUR (2 << 0) -#define AT91_MATRIX_ULBT_EIGHT (3 << 0) -#define AT91_MATRIX_ULBT_SIXTEEN (4 << 0) - -#define AT91_MATRIX_SCFG0 0x40 /* Slave Configuration Register 0 */ -#define AT91_MATRIX_SCFG1 0x44 /* Slave Configuration Register 1 */ -#define AT91_MATRIX_SCFG2 0x48 /* Slave Configuration Register 2 */ -#define AT91_MATRIX_SCFG3 0x4C /* Slave Configuration Register 3 */ -#define AT91_MATRIX_SCFG4 0x50 /* Slave Configuration Register 4 */ -#define AT91_MATRIX_SCFG5 0x54 /* Slave Configuration Register 5 */ -#define AT91_MATRIX_SLOT_CYCLE (0xff << 0) /* Maximum Number of Allowed Cycles for a Burst */ -#define AT91_MATRIX_DEFMSTR_TYPE (3 << 16) /* Default Master Type */ -#define AT91_MATRIX_DEFMSTR_TYPE_NONE (0 << 16) -#define AT91_MATRIX_DEFMSTR_TYPE_LAST (1 << 16) -#define AT91_MATRIX_DEFMSTR_TYPE_FIXED (2 << 16) -#define AT91_MATRIX_FIXED_DEFMSTR (0xf << 18) /* Fixed Index of Default Master */ -#define AT91_MATRIX_ARBT (3 << 24) /* Arbitration Type */ -#define AT91_MATRIX_ARBT_ROUND_ROBIN (0 << 24) -#define AT91_MATRIX_ARBT_FIXED_PRIORITY (1 << 24) - -#define AT91_MATRIX_PRAS0 0x80 /* Priority Register A for Slave 0 */ -#define AT91_MATRIX_PRAS1 0x88 /* Priority Register A for Slave 1 */ -#define AT91_MATRIX_PRAS2 0x90 /* Priority Register A for Slave 2 */ -#define AT91_MATRIX_PRAS3 0x98 /* Priority Register A for Slave 3 */ -#define AT91_MATRIX_PRAS4 0xA0 /* Priority Register A for Slave 4 */ -#define AT91_MATRIX_PRAS5 0xA8 /* Priority Register A for Slave 5 */ -#define AT91_MATRIX_M0PR (3 << 0) /* Master 0 Priority */ -#define AT91_MATRIX_M1PR (3 << 4) /* Master 1 Priority */ -#define AT91_MATRIX_M2PR (3 << 8) /* Master 2 Priority */ -#define AT91_MATRIX_M3PR (3 << 12) /* Master 3 Priority */ -#define AT91_MATRIX_M4PR (3 << 16) /* Master 4 Priority */ -#define AT91_MATRIX_M5PR (3 << 20) /* Master 5 Priority */ - -#define AT91_MATRIX_MRCR 0x100 /* Master Remap Control Register */ -#define AT91_MATRIX_RCB0 (1 << 0) /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */ -#define AT91_MATRIX_RCB1 (1 << 1) /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */ -#define AT91_MATRIX_RCB2 (1 << 2) -#define AT91_MATRIX_RCB3 (1 << 3) -#define AT91_MATRIX_RCB4 (1 << 4) -#define AT91_MATRIX_RCB5 (1 << 5) - -#define AT91_MATRIX_TCMR 0x114 /* TCM Configuration Register */ -#define AT91_MATRIX_ITCM_SIZE (0xf << 0) /* Size of ITCM enabled memory block */ -#define AT91_MATRIX_ITCM_0 (0 << 0) -#define AT91_MATRIX_ITCM_16 (5 << 0) -#define AT91_MATRIX_ITCM_32 (6 << 0) -#define AT91_MATRIX_DTCM_SIZE (0xf << 4) /* Size of DTCM enabled memory block */ -#define AT91_MATRIX_DTCM_0 (0 << 4) -#define AT91_MATRIX_DTCM_16 (5 << 4) -#define AT91_MATRIX_DTCM_32 (6 << 4) - -#define AT91_MATRIX_EBICSA 0x120 /* EBI0 Chip Select Assignment Register */ -#define AT91_MATRIX_CS1A (1 << 1) /* Chip Select 1 Assignment */ -#define AT91_MATRIX_CS1A_SMC (0 << 1) -#define AT91_MATRIX_CS1A_SDRAMC (1 << 1) -#define AT91_MATRIX_CS3A (1 << 3) /* Chip Select 3 Assignment */ -#define AT91_MATRIX_CS3A_SMC (0 << 3) -#define AT91_MATRIX_CS3A_SMC_SMARTMEDIA (1 << 3) -#define AT91_MATRIX_CS4A (1 << 4) /* Chip Select 4 Assignment */ -#define AT91_MATRIX_CS4A_SMC (0 << 4) -#define AT91_MATRIX_CS4A_SMC_CF1 (1 << 4) -#define AT91_MATRIX_CS5A (1 << 5) /* Chip Select 5 Assignment */ -#define AT91_MATRIX_CS5A_SMC (0 << 5) -#define AT91_MATRIX_CS5A_SMC_CF2 (1 << 5) -#define AT91_MATRIX_DBPUC (1 << 8) /* Data Bus Pull-up Configuration */ -#define AT91_MATRIX_VDDIOMSEL (1 << 16) /* Memory voltage selection */ -#define AT91_MATRIX_VDDIOMSEL_1_8V (0 << 16) -#define AT91_MATRIX_VDDIOMSEL_3_3V (1 << 16) - - -#endif diff --git a/arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h b/arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h deleted file mode 100644 index a606d39..0000000 --- a/arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h +++ /dev/null @@ -1,53 +0,0 @@ -/* - * Matrix-centric header file for the AT91SAM9x5 family - * - * Copyright (C) 2009-2012 Atmel Corporation. - * - * Only EBI related registers. - * Write Protect register definitions may be useful. - * - * Licensed under GPLv2 or later. - */ - -#ifndef AT91SAM9X5_MATRIX_H -#define AT91SAM9X5_MATRIX_H - -#define AT91_MATRIX_EBICSA (AT91_MATRIX + 0x120) /* EBI Chip Select Assignment Register */ -#define AT91_MATRIX_EBI_CS1A (1 << 1) /* Chip Select 1 Assignment */ -#define AT91_MATRIX_EBI_CS1A_SMC (0 << 1) -#define AT91_MATRIX_EBI_CS1A_SDRAMC (1 << 1) -#define AT91_MATRIX_EBI_CS3A (1 << 3) /* Chip Select 3 Assignment */ -#define AT91_MATRIX_EBI_CS3A_SMC (0 << 3) -#define AT91_MATRIX_EBI_CS3A_SMC_NANDFLASH (1 << 3) -#define AT91_MATRIX_EBI_DBPUC (1 << 8) /* Data Bus Pull-up Configuration */ -#define AT91_MATRIX_EBI_DBPU_ON (0 << 8) -#define AT91_MATRIX_EBI_DBPU_OFF (1 << 8) -#define AT91_MATRIX_EBI_VDDIOMSEL (1 << 16) /* Memory voltage selection */ -#define AT91_MATRIX_EBI_VDDIOMSEL_1_8V (0 << 16) -#define AT91_MATRIX_EBI_VDDIOMSEL_3_3V (1 << 16) -#define AT91_MATRIX_EBI_EBI_IOSR (1 << 17) /* EBI I/O slew rate selection */ -#define AT91_MATRIX_EBI_EBI_IOSR_REDUCED (0 << 17) -#define AT91_MATRIX_EBI_EBI_IOSR_NORMAL (1 << 17) -#define AT91_MATRIX_EBI_DDR_IOSR (1 << 18) /* DDR2 dedicated port I/O slew rate selection */ -#define AT91_MATRIX_EBI_DDR_IOSR_REDUCED (0 << 18) -#define AT91_MATRIX_EBI_DDR_IOSR_NORMAL (1 << 18) -#define AT91_MATRIX_NFD0_SELECT (1 << 24) /* NAND Flash Data Bus Selection */ -#define AT91_MATRIX_NFD0_ON_D0 (0 << 24) -#define AT91_MATRIX_NFD0_ON_D16 (1 << 24) -#define AT91_MATRIX_DDR_MP_EN (1 << 25) /* DDR Multi-port Enable */ -#define AT91_MATRIX_MP_OFF (0 << 25) -#define AT91_MATRIX_MP_ON (1 << 25) - -#define AT91_MATRIX_WPMR (AT91_MATRIX + 0x1E4) /* Write Protect Mode Register */ -#define AT91_MATRIX_WPMR_WPEN (1 << 0) /* Write Protect ENable */ -#define AT91_MATRIX_WPMR_WP_WPDIS (0 << 0) -#define AT91_MATRIX_WPMR_WP_WPEN (1 << 0) -#define AT91_MATRIX_WPMR_WPKEY (0xFFFFFF << 8) /* Write Protect KEY */ - -#define AT91_MATRIX_WPSR (AT91_MATRIX + 0x1E8) /* Write Protect Status Register */ -#define AT91_MATRIX_WPSR_WPVS (1 << 0) /* Write Protect Violation Status */ -#define AT91_MATRIX_WPSR_NO_WPV (0 << 0) -#define AT91_MATRIX_WPSR_WPV (1 << 0) -#define AT91_MATRIX_WPSR_WPVSRC (0xFFFF << 8) /* Write Protect Violation Source */ - -#endif diff --git a/arch/arm/mach-at91/include/mach/io.h b/arch/arm/mach-at91/include/mach/io.h deleted file mode 100644 index 2d9ca04..0000000 --- a/arch/arm/mach-at91/include/mach/io.h +++ /dev/null @@ -1,27 +0,0 @@ -/* - * arch/arm/mach-at91/include/mach/io.h - * - * Copyright (C) 2003 SAN People - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#ifndef __ASM_ARCH_IO_H -#define __ASM_ARCH_IO_H - -#define IO_SPACE_LIMIT 0xFFFFFFFF -#define __io(a) __typesafe_io(a) - -#endif diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c index 5e34fb1..ac947cd 100644 --- a/arch/arm/mach-at91/pm.c +++ b/arch/arm/mach-at91/pm.c @@ -29,6 +29,8 @@ #include <linux/atomic.h> #include <asm/mach/time.h> #include <asm/mach/irq.h> +#include <asm/fncpy.h> +#include <asm/cacheflush.h> #include <mach/cpu.h> #include <mach/hardware.h> @@ -41,7 +43,6 @@ static struct { int memctrl; } at91_pm_data; -static void (*at91_pm_standby)(void); void __iomem *at91_ramc_base[2]; static int at91_pm_valid_state(suspend_state_t state) @@ -119,76 +120,67 @@ int at91_suspend_entering_slow_clock(void) } EXPORT_SYMBOL(at91_suspend_entering_slow_clock); - -static void (*slow_clock)(void __iomem *pmc, void __iomem *ramc0, +static void (*at91_suspend_sram_fn)(void __iomem *pmc, void __iomem *ramc0, void __iomem *ramc1, int memctrl); -#ifdef CONFIG_AT91_SLOW_CLOCK -extern void at91_slow_clock(void __iomem *pmc, void __iomem *ramc0, +extern void at91_pm_suspend_in_sram(void __iomem *pmc, void __iomem *ramc0, void __iomem *ramc1, int memctrl); -extern u32 at91_slow_clock_sz; -#endif +extern u32 at91_pm_suspend_in_sram_sz; + +static void at91_pm_suspend(suspend_state_t state) +{ + unsigned int pm_data = at91_pm_data.memctrl; + + pm_data |= (state == PM_SUSPEND_MEM) ? + AT91_PM_MODE(AT91_PM_SLOW_CLOCK) : 0; + + flush_cache_all(); + outer_disable(); + + at91_suspend_sram_fn(at91_pmc_base, at91_ramc_base[0], + at91_ramc_base[1], pm_data); + + outer_resume(); +} static int at91_pm_enter(suspend_state_t state) { at91_pinctrl_gpio_suspend(); switch (state) { + /* + * Suspend-to-RAM is like STANDBY plus slow clock mode, so + * drivers must suspend more deeply, the master clock switches + * to the clk32k and turns off the main oscillator + */ + case PM_SUSPEND_MEM: /* - * Suspend-to-RAM is like STANDBY plus slow clock mode, so - * drivers must suspend more deeply: only the master clock - * controller may be using the main oscillator. + * Ensure that clocks are in a valid state. */ - case PM_SUSPEND_MEM: - /* - * Ensure that clocks are in a valid state. - */ - if (!at91_pm_verify_clocks()) - goto error; - - /* - * Enter slow clock mode by switching over to clk32k and - * turning off the main oscillator; reverse on wakeup. - */ - if (slow_clock) { -#ifdef CONFIG_AT91_SLOW_CLOCK - /* copy slow_clock handler to SRAM, and call it */ - memcpy(slow_clock, at91_slow_clock, at91_slow_clock_sz); -#endif - slow_clock(at91_pmc_base, at91_ramc_base[0], - at91_ramc_base[1], - at91_pm_data.memctrl); - break; - } else { - pr_info("AT91: PM - no slow clock mode enabled ...\n"); - /* FALLTHROUGH leaving master clock alone */ - } + if (!at91_pm_verify_clocks()) + goto error; - /* - * STANDBY mode has *all* drivers suspended; ignores irqs not - * marked as 'wakeup' event sources; and reduces DRAM power. - * But otherwise it's identical to PM_SUSPEND_ON: cpu idle, and - * nothing fancy done with main or cpu clocks. - */ - case PM_SUSPEND_STANDBY: - /* - * NOTE: the Wait-for-Interrupt instruction needs to be - * in icache so no SDRAM accesses are needed until the - * wakeup IRQ occurs and self-refresh is terminated. - * For ARM 926 based chips, this requirement is weaker - * as at91sam9 can access a RAM in self-refresh mode. - */ - if (at91_pm_standby) - at91_pm_standby(); - break; + at91_pm_suspend(state); - case PM_SUSPEND_ON: - cpu_do_idle(); - break; + break; - default: - pr_debug("AT91: PM - bogus suspend state %d\n", state); - goto error; + /* + * STANDBY mode has *all* drivers suspended; ignores irqs not + * marked as 'wakeup' event sources; and reduces DRAM power. + * But otherwise it's identical to PM_SUSPEND_ON: cpu idle, and + * nothing fancy done with main or cpu clocks. + */ + case PM_SUSPEND_STANDBY: + at91_pm_suspend(state); + break; + + case PM_SUSPEND_ON: + cpu_do_idle(); + break; + + default: + pr_debug("AT91: PM - bogus suspend state %d\n", state); + goto error; } error: @@ -218,12 +210,10 @@ static struct platform_device at91_cpuidle_device = { .name = "cpuidle-at91", }; -void at91_pm_set_standby(void (*at91_standby)(void)) +static void at91_pm_set_standby(void (*at91_standby)(void)) { - if (at91_standby) { + if (at91_standby) at91_cpuidle_device.dev.platform_data = at91_standby; - at91_pm_standby = at91_standby; - } } static const struct of_device_id ramc_ids[] __initconst = { @@ -263,60 +253,63 @@ static __init void at91_dt_ramc(void) at91_pm_set_standby(standby); } -#ifdef CONFIG_AT91_SLOW_CLOCK static void __init at91_pm_sram_init(void) { struct gen_pool *sram_pool; phys_addr_t sram_pbase; unsigned long sram_base; struct device_node *node; - struct platform_device *pdev; + struct platform_device *pdev = NULL; - node = of_find_compatible_node(NULL, NULL, "mmio-sram"); - if (!node) { - pr_warn("%s: failed to find sram node!\n", __func__); - return; + for_each_compatible_node(node, NULL, "mmio-sram") { + pdev = of_find_device_by_node(node); + if (pdev) { + of_node_put(node); + break; + } } - pdev = of_find_device_by_node(node); if (!pdev) { pr_warn("%s: failed to find sram device!\n", __func__); - goto put_node; + return; } sram_pool = dev_get_gen_pool(&pdev->dev); if (!sram_pool) { pr_warn("%s: sram pool unavailable!\n", __func__); - goto put_node; + return; } - sram_base = gen_pool_alloc(sram_pool, at91_slow_clock_sz); + sram_base = gen_pool_alloc(sram_pool, at91_pm_suspend_in_sram_sz); if (!sram_base) { - pr_warn("%s: unable to alloc ocram!\n", __func__); - goto put_node; + pr_warn("%s: unable to alloc sram!\n", __func__); + return; } sram_pbase = gen_pool_virt_to_phys(sram_pool, sram_base); - slow_clock = __arm_ioremap_exec(sram_pbase, at91_slow_clock_sz, false); + at91_suspend_sram_fn = __arm_ioremap_exec(sram_pbase, + at91_pm_suspend_in_sram_sz, false); + if (!at91_suspend_sram_fn) { + pr_warn("SRAM: Could not map\n"); + return; + } -put_node: - of_node_put(node); + /* Copy the pm suspend handler to SRAM */ + at91_suspend_sram_fn = fncpy(at91_suspend_sram_fn, + &at91_pm_suspend_in_sram, at91_pm_suspend_in_sram_sz); } -#endif - static void __init at91_pm_init(void) { -#ifdef CONFIG_AT91_SLOW_CLOCK at91_pm_sram_init(); -#endif - - pr_info("AT91: Power Management%s\n", (slow_clock ? " (with slow clock mode)" : "")); if (at91_cpuidle_device.dev.platform_data) platform_device_register(&at91_cpuidle_device); - suspend_set_ops(&at91_pm_ops); + if (at91_suspend_sram_fn) + suspend_set_ops(&at91_pm_ops); + else + pr_info("AT91: PM not supported, due to no SRAM allocated\n"); } void __init at91rm9200_pm_init(void) diff --git a/arch/arm/mach-at91/pm.h b/arch/arm/mach-at91/pm.h index d2c8996..dcacfa1 100644 --- a/arch/arm/mach-at91/pm.h +++ b/arch/arm/mach-at91/pm.h @@ -15,11 +15,13 @@ #include <mach/at91_ramc.h> -#ifdef CONFIG_PM -extern void at91_pm_set_standby(void (*at91_standby)(void)); -#else -static inline void at91_pm_set_standby(void (*at91_standby)(void)) { } -#endif +#define AT91_PM_MEMTYPE_MASK 0x0f + +#define AT91_PM_MODE_OFFSET 4 +#define AT91_PM_MODE_MASK 0x01 +#define AT91_PM_MODE(x) (((x) & AT91_PM_MODE_MASK) << AT91_PM_MODE_OFFSET) + +#define AT91_PM_SLOW_CLOCK 0x01 /* * The AT91RM9200 goes into self-refresh mode with this command, and will @@ -31,6 +33,7 @@ static inline void at91_pm_set_standby(void (*at91_standby)(void)) { } * still in self-refresh is "not recommended", but seems to work. */ +#ifndef __ASSEMBLY__ static inline void at91rm9200_standby(void) { u32 lpr = at91_ramc_read(0, AT91RM9200_SDRAMC_LPR); @@ -44,7 +47,7 @@ static inline void at91rm9200_standby(void) " mcr p15, 0, %0, c7, c0, 4\n\t" " str %5, [%1, %2]" : - : "r" (0), "r" (AT91_BASE_SYS), "r" (AT91RM9200_SDRAMC_LPR), + : "r" (0), "r" (at91_ramc_base[0]), "r" (AT91RM9200_SDRAMC_LPR), "r" (1), "r" (AT91RM9200_SDRAMC_SRR), "r" (lpr)); } @@ -112,3 +115,4 @@ static inline void at91sam9_sdram_standby(void) } #endif +#endif diff --git a/arch/arm/mach-at91/pm_slowclock.S b/arch/arm/mach-at91/pm_slowclock.S deleted file mode 100644 index 556151e8..0000000 --- a/arch/arm/mach-at91/pm_slowclock.S +++ /dev/null @@ -1,323 +0,0 @@ -/* - * arch/arm/mach-at91/pm_slow_clock.S - * - * Copyright (C) 2006 Savin Zlobec - * - * AT91SAM9 support: - * Copyright (C) 2007 Anti Sullin <anti.sullin@artecdesign.ee - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - */ - -#include <linux/linkage.h> -#include <linux/clk/at91_pmc.h> -#include <mach/hardware.h> -#include <mach/at91_ramc.h> - -/* - * When SLOWDOWN_MASTER_CLOCK is defined we will also slow down the Master - * clock during suspend by adjusting its prescalar and divisor. - * NOTE: This hasn't been shown to be stable on SAM9s; and on the RM9200 there - * are errata regarding adjusting the prescalar and divisor. - */ -#undef SLOWDOWN_MASTER_CLOCK - -#define MCKRDY_TIMEOUT 1000 -#define MOSCRDY_TIMEOUT 1000 -#define PLLALOCK_TIMEOUT 1000 -#define PLLBLOCK_TIMEOUT 1000 - -pmc .req r0 -sdramc .req r1 -ramc1 .req r2 -memctrl .req r3 -tmp1 .req r4 -tmp2 .req r5 - -/* - * Wait until master clock is ready (after switching master clock source) - */ - .macro wait_mckrdy - mov tmp2, #MCKRDY_TIMEOUT -1: sub tmp2, tmp2, #1 - cmp tmp2, #0 - beq 2f - ldr tmp1, [pmc, #AT91_PMC_SR] - tst tmp1, #AT91_PMC_MCKRDY - beq 1b -2: - .endm - -/* - * Wait until master oscillator has stabilized. - */ - .macro wait_moscrdy - mov tmp2, #MOSCRDY_TIMEOUT -1: sub tmp2, tmp2, #1 - cmp tmp2, #0 - beq 2f - ldr tmp1, [pmc, #AT91_PMC_SR] - tst tmp1, #AT91_PMC_MOSCS - beq 1b -2: - .endm - -/* - * Wait until PLLA has locked. - */ - .macro wait_pllalock - mov tmp2, #PLLALOCK_TIMEOUT -1: sub tmp2, tmp2, #1 - cmp tmp2, #0 - beq 2f - ldr tmp1, [pmc, #AT91_PMC_SR] - tst tmp1, #AT91_PMC_LOCKA - beq 1b -2: - .endm - -/* - * Wait until PLLB has locked. - */ - .macro wait_pllblock - mov tmp2, #PLLBLOCK_TIMEOUT -1: sub tmp2, tmp2, #1 - cmp tmp2, #0 - beq 2f - ldr tmp1, [pmc, #AT91_PMC_SR] - tst tmp1, #AT91_PMC_LOCKB - beq 1b -2: - .endm - - .text - -/* void at91_slow_clock(void __iomem *pmc, void __iomem *sdramc, - * void __iomem *ramc1, int memctrl) - */ -ENTRY(at91_slow_clock) - /* Save registers on stack */ - stmfd sp!, {r4 - r12, lr} - - /* - * Register usage: - * R0 = Base address of AT91_PMC - * R1 = Base address of RAM Controller (SDRAM, DDRSDR, or AT91_SYS) - * R2 = Base address of second RAM Controller or 0 if not present - * R3 = Memory controller - * R4 = temporary register - * R5 = temporary register - */ - - /* Drain write buffer */ - mov tmp1, #0 - mcr p15, 0, tmp1, c7, c10, 4 - - cmp memctrl, #AT91_MEMCTRL_MC - bne ddr_sr_enable - - /* - * at91rm9200 Memory controller - */ - /* Put SDRAM in self-refresh mode */ - mov tmp1, #1 - str tmp1, [sdramc, #AT91RM9200_SDRAMC_SRR] - b sdr_sr_done - - /* - * DDRSDR Memory controller - */ -ddr_sr_enable: - cmp memctrl, #AT91_MEMCTRL_DDRSDR - bne sdr_sr_enable - - /* prepare for DDRAM self-refresh mode */ - ldr tmp1, [sdramc, #AT91_DDRSDRC_LPR] - str tmp1, .saved_sam9_lpr - bic tmp1, #AT91_DDRSDRC_LPCB - orr tmp1, #AT91_DDRSDRC_LPCB_SELF_REFRESH - - /* figure out if we use the second ram controller */ - cmp ramc1, #0 - ldrne tmp2, [ramc1, #AT91_DDRSDRC_LPR] - strne tmp2, .saved_sam9_lpr1 - bicne tmp2, #AT91_DDRSDRC_LPCB - orrne tmp2, #AT91_DDRSDRC_LPCB_SELF_REFRESH - - /* Enable DDRAM self-refresh mode */ - str tmp1, [sdramc, #AT91_DDRSDRC_LPR] - strne tmp2, [ramc1, #AT91_DDRSDRC_LPR] - - b sdr_sr_done - - /* - * SDRAMC Memory controller - */ -sdr_sr_enable: - /* Enable SDRAM self-refresh mode */ - ldr tmp1, [sdramc, #AT91_SDRAMC_LPR] - str tmp1, .saved_sam9_lpr - - bic tmp1, #AT91_SDRAMC_LPCB - orr tmp1, #AT91_SDRAMC_LPCB_SELF_REFRESH - str tmp1, [sdramc, #AT91_SDRAMC_LPR] - -sdr_sr_done: - /* Save Master clock setting */ - ldr tmp1, [pmc, #AT91_PMC_MCKR] - str tmp1, .saved_mckr - - /* - * Set the Master clock source to slow clock - */ - bic tmp1, tmp1, #AT91_PMC_CSS - str tmp1, [pmc, #AT91_PMC_MCKR] - - wait_mckrdy - -#ifdef SLOWDOWN_MASTER_CLOCK - /* - * Set the Master Clock PRES and MDIV fields. - * - * See AT91RM9200 errata #27 and #28 for details. - */ - mov tmp1, #0 - str tmp1, [pmc, #AT91_PMC_MCKR] - - wait_mckrdy -#endif - - /* Save PLLA setting and disable it */ - ldr tmp1, [pmc, #AT91_CKGR_PLLAR] - str tmp1, .saved_pllar - - mov tmp1, #AT91_PMC_PLLCOUNT - orr tmp1, tmp1, #(1 << 29) /* bit 29 always set */ - str tmp1, [pmc, #AT91_CKGR_PLLAR] - - /* Save PLLB setting and disable it */ - ldr tmp1, [pmc, #AT91_CKGR_PLLBR] - str tmp1, .saved_pllbr - - mov tmp1, #AT91_PMC_PLLCOUNT - str tmp1, [pmc, #AT91_CKGR_PLLBR] - - /* Turn off the main oscillator */ - ldr tmp1, [pmc, #AT91_CKGR_MOR] - bic tmp1, tmp1, #AT91_PMC_MOSCEN - str tmp1, [pmc, #AT91_CKGR_MOR] - - /* Wait for interrupt */ - mcr p15, 0, tmp1, c7, c0, 4 - - /* Turn on the main oscillator */ - ldr tmp1, [pmc, #AT91_CKGR_MOR] - orr tmp1, tmp1, #AT91_PMC_MOSCEN - str tmp1, [pmc, #AT91_CKGR_MOR] - - wait_moscrdy - - /* Restore PLLB setting */ - ldr tmp1, .saved_pllbr - str tmp1, [pmc, #AT91_CKGR_PLLBR] - - tst tmp1, #(AT91_PMC_MUL & 0xff0000) - bne 1f - tst tmp1, #(AT91_PMC_MUL & ~0xff0000) - beq 2f -1: - wait_pllblock -2: - - /* Restore PLLA setting */ - ldr tmp1, .saved_pllar - str tmp1, [pmc, #AT91_CKGR_PLLAR] - - tst tmp1, #(AT91_PMC_MUL & 0xff0000) - bne 3f - tst tmp1, #(AT91_PMC_MUL & ~0xff0000) - beq 4f -3: - wait_pllalock -4: - -#ifdef SLOWDOWN_MASTER_CLOCK - /* - * First set PRES if it was not 0, - * than set CSS and MDIV fields. - * - * See AT91RM9200 errata #27 and #28 for details. - */ - ldr tmp1, .saved_mckr - tst tmp1, #AT91_PMC_PRES - beq 2f - and tmp1, tmp1, #AT91_PMC_PRES - str tmp1, [pmc, #AT91_PMC_MCKR] - - wait_mckrdy -#endif - - /* - * Restore master clock setting - */ -2: ldr tmp1, .saved_mckr - str tmp1, [pmc, #AT91_PMC_MCKR] - - wait_mckrdy - - /* - * at91rm9200 Memory controller - * Do nothing - self-refresh is automatically disabled. - */ - cmp memctrl, #AT91_MEMCTRL_MC - beq ram_restored - - /* - * DDRSDR Memory controller - */ - cmp memctrl, #AT91_MEMCTRL_DDRSDR - bne sdr_en_restore - /* Restore LPR on AT91 with DDRAM */ - ldr tmp1, .saved_sam9_lpr - str tmp1, [sdramc, #AT91_DDRSDRC_LPR] - - /* if we use the second ram controller */ - cmp ramc1, #0 - ldrne tmp2, .saved_sam9_lpr1 - strne tmp2, [ramc1, #AT91_DDRSDRC_LPR] - - b ram_restored - - /* - * SDRAMC Memory controller - */ -sdr_en_restore: - /* Restore LPR on AT91 with SDRAM */ - ldr tmp1, .saved_sam9_lpr - str tmp1, [sdramc, #AT91_SDRAMC_LPR] - -ram_restored: - /* Restore registers, and return */ - ldmfd sp!, {r4 - r12, pc} - - -.saved_mckr: - .word 0 - -.saved_pllar: - .word 0 - -.saved_pllbr: - .word 0 - -.saved_sam9_lpr: - .word 0 - -.saved_sam9_lpr1: - .word 0 - -ENTRY(at91_slow_clock_sz) - .word .-at91_slow_clock diff --git a/arch/arm/mach-at91/pm_suspend.S b/arch/arm/mach-at91/pm_suspend.S new file mode 100644 index 0000000..7c444c2 --- /dev/null +++ b/arch/arm/mach-at91/pm_suspend.S @@ -0,0 +1,338 @@ +/* + * arch/arm/mach-at91/pm_slow_clock.S + * + * Copyright (C) 2006 Savin Zlobec + * + * AT91SAM9 support: + * Copyright (C) 2007 Anti Sullin <anti.sullin@artecdesign.ee + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ +#include <linux/linkage.h> +#include <linux/clk/at91_pmc.h> +#include <mach/hardware.h> +#include <mach/at91_ramc.h> +#include "pm.h" + +#define SRAMC_SELF_FRESH_ACTIVE 0x01 +#define SRAMC_SELF_FRESH_EXIT 0x00 + +pmc .req r0 +tmp1 .req r4 +tmp2 .req r5 + +/* + * Wait until master clock is ready (after switching master clock source) + */ + .macro wait_mckrdy +1: ldr tmp1, [pmc, #AT91_PMC_SR] + tst tmp1, #AT91_PMC_MCKRDY + beq 1b + .endm + +/* + * Wait until master oscillator has stabilized. + */ + .macro wait_moscrdy +1: ldr tmp1, [pmc, #AT91_PMC_SR] + tst tmp1, #AT91_PMC_MOSCS + beq 1b + .endm + +/* + * Wait until PLLA has locked. + */ + .macro wait_pllalock +1: ldr tmp1, [pmc, #AT91_PMC_SR] + tst tmp1, #AT91_PMC_LOCKA + beq 1b + .endm + +/* + * Put the processor to enter the idle state + */ + .macro at91_cpu_idle + +#if defined(CONFIG_CPU_V7) + mov tmp1, #AT91_PMC_PCK + str tmp1, [pmc, #AT91_PMC_SCDR] + + dsb + + wfi @ Wait For Interrupt +#else + mcr p15, 0, tmp1, c7, c0, 4 +#endif + + .endm + + .text + + .arm + +/* + * void at91_pm_suspend_in_sram(void __iomem *pmc, void __iomem *sdramc, + * void __iomem *ramc1, int memctrl) + * @input param: + * @r0: base address of AT91_PMC + * @r1: base address of SDRAM Controller (SDRAM, DDRSDR, or AT91_SYS) + * @r2: base address of second SDRAM Controller or 0 if not present + * @r3: pm information + */ +ENTRY(at91_pm_suspend_in_sram) + /* Save registers on stack */ + stmfd sp!, {r4 - r12, lr} + + /* Drain write buffer */ + mov tmp1, #0 + mcr p15, 0, tmp1, c7, c10, 4 + + str r0, .pmc_base + str r1, .sramc_base + str r2, .sramc1_base + + and r0, r3, #AT91_PM_MEMTYPE_MASK + str r0, .memtype + + lsr r0, r3, #AT91_PM_MODE_OFFSET + and r0, r0, #AT91_PM_MODE_MASK + str r0, .pm_mode + + /* Active the self-refresh mode */ + mov r0, #SRAMC_SELF_FRESH_ACTIVE + bl at91_sramc_self_refresh + + ldr r0, .pm_mode + tst r0, #AT91_PM_SLOW_CLOCK + beq skip_disable_main_clock + + ldr pmc, .pmc_base + + /* Save Master clock setting */ + ldr tmp1, [pmc, #AT91_PMC_MCKR] + str tmp1, .saved_mckr + + /* + * Set the Master clock source to slow clock + */ + bic tmp1, tmp1, #AT91_PMC_CSS + str tmp1, [pmc, #AT91_PMC_MCKR] + + wait_mckrdy + + /* Save PLLA setting and disable it */ + ldr tmp1, [pmc, #AT91_CKGR_PLLAR] + str tmp1, .saved_pllar + + mov tmp1, #AT91_PMC_PLLCOUNT + orr tmp1, tmp1, #(1 << 29) /* bit 29 always set */ + str tmp1, [pmc, #AT91_CKGR_PLLAR] + + /* Turn off the main oscillator */ + ldr tmp1, [pmc, #AT91_CKGR_MOR] + bic tmp1, tmp1, #AT91_PMC_MOSCEN + orr tmp1, tmp1, #AT91_PMC_KEY + str tmp1, [pmc, #AT91_CKGR_MOR] + +skip_disable_main_clock: + ldr pmc, .pmc_base + + /* Wait for interrupt */ + at91_cpu_idle + + ldr r0, .pm_mode + tst r0, #AT91_PM_SLOW_CLOCK + beq skip_enable_main_clock + + ldr pmc, .pmc_base + + /* Turn on the main oscillator */ + ldr tmp1, [pmc, #AT91_CKGR_MOR] + orr tmp1, tmp1, #AT91_PMC_MOSCEN + orr tmp1, tmp1, #AT91_PMC_KEY + str tmp1, [pmc, #AT91_CKGR_MOR] + + wait_moscrdy + + /* Restore PLLA setting */ + ldr tmp1, .saved_pllar + str tmp1, [pmc, #AT91_CKGR_PLLAR] + + tst tmp1, #(AT91_PMC_MUL & 0xff0000) + bne 3f + tst tmp1, #(AT91_PMC_MUL & ~0xff0000) + beq 4f +3: + wait_pllalock +4: + + /* + * Restore master clock setting + */ + ldr tmp1, .saved_mckr + str tmp1, [pmc, #AT91_PMC_MCKR] + + wait_mckrdy + +skip_enable_main_clock: + /* Exit the self-refresh mode */ + mov r0, #SRAMC_SELF_FRESH_EXIT + bl at91_sramc_self_refresh + + /* Restore registers, and return */ + ldmfd sp!, {r4 - r12, pc} +ENDPROC(at91_pm_suspend_in_sram) + +/* + * void at91_sramc_self_refresh(unsigned int is_active) + * + * @input param: + * @r0: 1 - active self-refresh mode + * 0 - exit self-refresh mode + * register usage: + * @r1: memory type + * @r2: base address of the sram controller + */ + +ENTRY(at91_sramc_self_refresh) + ldr r1, .memtype + ldr r2, .sramc_base + + cmp r1, #AT91_MEMCTRL_MC + bne ddrc_sf + + /* + * at91rm9200 Memory controller + */ + + /* + * For exiting the self-refresh mode, do nothing, + * automatically exit the self-refresh mode. + */ + tst r0, #SRAMC_SELF_FRESH_ACTIVE + beq exit_sramc_sf + + /* Active SDRAM self-refresh mode */ + mov r3, #1 + str r3, [r2, #AT91RM9200_SDRAMC_SRR] + b exit_sramc_sf + +ddrc_sf: + cmp r1, #AT91_MEMCTRL_DDRSDR + bne sdramc_sf + + /* + * DDR Memory controller + */ + tst r0, #SRAMC_SELF_FRESH_ACTIVE + beq ddrc_exit_sf + + /* LPDDR1 --> force DDR2 mode during self-refresh */ + ldr r3, [r2, #AT91_DDRSDRC_MDR] + str r3, .saved_sam9_mdr + bic r3, r3, #~AT91_DDRSDRC_MD + cmp r3, #AT91_DDRSDRC_MD_LOW_POWER_DDR + ldreq r3, [r2, #AT91_DDRSDRC_MDR] + biceq r3, r3, #AT91_DDRSDRC_MD + orreq r3, r3, #AT91_DDRSDRC_MD_DDR2 + streq r3, [r2, #AT91_DDRSDRC_MDR] + + /* Active DDRC self-refresh mode */ + ldr r3, [r2, #AT91_DDRSDRC_LPR] + str r3, .saved_sam9_lpr + bic r3, r3, #AT91_DDRSDRC_LPCB + orr r3, r3, #AT91_DDRSDRC_LPCB_SELF_REFRESH + str r3, [r2, #AT91_DDRSDRC_LPR] + + /* If using the 2nd ddr controller */ + ldr r2, .sramc1_base + cmp r2, #0 + beq no_2nd_ddrc + + ldr r3, [r2, #AT91_DDRSDRC_MDR] + str r3, .saved_sam9_mdr1 + bic r3, r3, #~AT91_DDRSDRC_MD + cmp r3, #AT91_DDRSDRC_MD_LOW_POWER_DDR + ldreq r3, [r2, #AT91_DDRSDRC_MDR] + biceq r3, r3, #AT91_DDRSDRC_MD + orreq r3, r3, #AT91_DDRSDRC_MD_DDR2 + streq r3, [r2, #AT91_DDRSDRC_MDR] + + /* Active DDRC self-refresh mode */ + ldr r3, [r2, #AT91_DDRSDRC_LPR] + str r3, .saved_sam9_lpr1 + bic r3, r3, #AT91_DDRSDRC_LPCB + orr r3, r3, #AT91_DDRSDRC_LPCB_SELF_REFRESH + str r3, [r2, #AT91_DDRSDRC_LPR] + +no_2nd_ddrc: + b exit_sramc_sf + +ddrc_exit_sf: + /* Restore MDR in case of LPDDR1 */ + ldr r3, .saved_sam9_mdr + str r3, [r2, #AT91_DDRSDRC_MDR] + /* Restore LPR on AT91 with DDRAM */ + ldr r3, .saved_sam9_lpr + str r3, [r2, #AT91_DDRSDRC_LPR] + + /* If using the 2nd ddr controller */ + ldr r2, .sramc1_base + cmp r2, #0 + ldrne r3, .saved_sam9_mdr1 + strne r3, [r2, #AT91_DDRSDRC_MDR] + ldrne r3, .saved_sam9_lpr1 + strne r3, [r2, #AT91_DDRSDRC_LPR] + + b exit_sramc_sf + + /* + * SDRAMC Memory controller + */ +sdramc_sf: + tst r0, #SRAMC_SELF_FRESH_ACTIVE + beq sdramc_exit_sf + + /* Active SDRAMC self-refresh mode */ + ldr r3, [r2, #AT91_SDRAMC_LPR] + str r3, .saved_sam9_lpr + bic r3, r3, #AT91_SDRAMC_LPCB + orr r3, r3, #AT91_SDRAMC_LPCB_SELF_REFRESH + str r3, [r2, #AT91_SDRAMC_LPR] + +sdramc_exit_sf: + ldr r3, .saved_sam9_lpr + str r3, [r2, #AT91_SDRAMC_LPR] + +exit_sramc_sf: + mov pc, lr +ENDPROC(at91_sramc_self_refresh) + +.pmc_base: + .word 0 +.sramc_base: + .word 0 +.sramc1_base: + .word 0 +.memtype: + .word 0 +.pm_mode: + .word 0 +.saved_mckr: + .word 0 +.saved_pllar: + .word 0 +.saved_sam9_lpr: + .word 0 +.saved_sam9_lpr1: + .word 0 +.saved_sam9_mdr: + .word 0 +.saved_sam9_mdr1: + .word 0 + +ENTRY(at91_pm_suspend_in_sram_sz) + .word .-at91_pm_suspend_in_sram diff --git a/arch/arm/mach-at91/sama5.c b/arch/arm/mach-at91/sama5.c index 03dcb44..ef5d207 100644 --- a/arch/arm/mach-at91/sama5.c +++ b/arch/arm/mach-at91/sama5.c @@ -7,48 +7,50 @@ * Licensed under GPLv2 or later. */ -#include <linux/types.h> -#include <linux/init.h> -#include <linux/module.h> -#include <linux/gpio.h> -#include <linux/micrel_phy.h> #include <linux/of.h> -#include <linux/of_irq.h> #include <linux/of_platform.h> -#include <linux/phy.h> -#include <linux/clk-provider.h> -#include <linux/phy.h> -#include <mach/hardware.h> - -#include <asm/setup.h> -#include <asm/irq.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> -#include <asm/mach/irq.h> - -#include "generic.h" +#include <asm/system_misc.h> -static int ksz8081_phy_fixup(struct phy_device *phy) -{ - int value; +#include <mach/hardware.h> - value = phy_read(phy, 0x16); - value &= ~0x20; - phy_write(phy, 0x16, value); +#include "generic.h" +#include "soc.h" - return 0; -} +static const struct at91_soc sama5_socs[] = { + AT91_SOC(SAMA5D3_CIDR_MATCH, SAMA5D31_EXID_MATCH, + "sama5d31", "sama5d3"), + AT91_SOC(SAMA5D3_CIDR_MATCH, SAMA5D33_EXID_MATCH, + "sama5d33", "sama5d3"), + AT91_SOC(SAMA5D3_CIDR_MATCH, SAMA5D34_EXID_MATCH, + "sama5d34", "sama5d3"), + AT91_SOC(SAMA5D3_CIDR_MATCH, SAMA5D35_EXID_MATCH, + "sama5d35", "sama5d3"), + AT91_SOC(SAMA5D3_CIDR_MATCH, SAMA5D36_EXID_MATCH, + "sama5d36", "sama5d3"), + AT91_SOC(SAMA5D4_CIDR_MATCH, SAMA5D41_EXID_MATCH, + "sama5d41", "sama5d4"), + AT91_SOC(SAMA5D4_CIDR_MATCH, SAMA5D42_EXID_MATCH, + "sama5d42", "sama5d4"), + AT91_SOC(SAMA5D4_CIDR_MATCH, SAMA5D43_EXID_MATCH, + "sama5d43", "sama5d4"), + AT91_SOC(SAMA5D4_CIDR_MATCH, SAMA5D44_EXID_MATCH, + "sama5d44", "sama5d4"), + { /* sentinel */ }, +}; static void __init sama5_dt_device_init(void) { - if (of_machine_is_compatible("atmel,sama5d4ek") && - IS_ENABLED(CONFIG_PHYLIB)) { - phy_register_fixup_for_id("fc028000.etherne:00", - ksz8081_phy_fixup); - } + struct soc_device *soc; + struct device *soc_dev = NULL; + + soc = at91_soc_init(sama5_socs); + if (soc != NULL) + soc_dev = soc_device_to_device(soc); - of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); + of_platform_populate(NULL, of_default_bus_match_table, NULL, soc_dev); at91sam9x5_pm_init(); } @@ -59,44 +61,10 @@ static const char *sama5_dt_board_compat[] __initconst = { DT_MACHINE_START(sama5_dt, "Atmel SAMA5") /* Maintainer: Atmel */ - .map_io = at91_map_io, .init_machine = sama5_dt_device_init, .dt_compat = sama5_dt_board_compat, MACHINE_END -static struct map_desc at91_io_desc[] __initdata = { - { - .virtual = (unsigned long)AT91_ALT_IO_P2V(SAMA5D4_BASE_MPDDRC), - .pfn = __phys_to_pfn(SAMA5D4_BASE_MPDDRC), - .length = SZ_512, - .type = MT_DEVICE, - }, - { - .virtual = (unsigned long)AT91_ALT_IO_P2V(SAMA5D4_BASE_PMC), - .pfn = __phys_to_pfn(SAMA5D4_BASE_PMC), - .length = SZ_512, - .type = MT_DEVICE, - }, - { /* On sama5d4, we use USART3 as serial console */ - .virtual = (unsigned long)AT91_ALT_IO_P2V(SAMA5D4_BASE_USART3), - .pfn = __phys_to_pfn(SAMA5D4_BASE_USART3), - .length = SZ_256, - .type = MT_DEVICE, - }, - { /* A bunch of peripheral with fine grained IO space */ - .virtual = (unsigned long)AT91_ALT_IO_P2V(SAMA5D4_BASE_SYS2), - .pfn = __phys_to_pfn(SAMA5D4_BASE_SYS2), - .length = SZ_2K, - .type = MT_DEVICE, - }, -}; - -static void __init sama5_alt_map_io(void) -{ - at91_alt_map_io(); - iotable_init(at91_io_desc, ARRAY_SIZE(at91_io_desc)); -} - static const char *sama5_alt_dt_board_compat[] __initconst = { "atmel,sama5d4", NULL @@ -104,7 +72,6 @@ static const char *sama5_alt_dt_board_compat[] __initconst = { DT_MACHINE_START(sama5_alt_dt, "Atmel SAMA5") /* Maintainer: Atmel */ - .map_io = sama5_alt_map_io, .init_machine = sama5_dt_device_init, .dt_compat = sama5_alt_dt_board_compat, .l2c_aux_mask = ~0UL, diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c deleted file mode 100644 index 4e58bc9..0000000 --- a/arch/arm/mach-at91/setup.c +++ /dev/null @@ -1,330 +0,0 @@ -/* - * Copyright (C) 2007 Atmel Corporation. - * Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> - * - * Under GPLv2 - */ - -#define pr_fmt(fmt) "AT91: " fmt - -#include <linux/module.h> -#include <linux/io.h> -#include <linux/mm.h> -#include <linux/pm.h> -#include <linux/of_address.h> -#include <linux/pinctrl/machine.h> -#include <linux/clk/at91_pmc.h> - -#include <asm/system_misc.h> -#include <asm/mach/map.h> - -#include <mach/hardware.h> -#include <mach/cpu.h> -#include <mach/at91_dbgu.h> - -#include "generic.h" -#include "pm.h" - -struct at91_socinfo at91_soc_initdata; -EXPORT_SYMBOL(at91_soc_initdata); - -static struct map_desc at91_io_desc __initdata __maybe_unused = { - .virtual = (unsigned long)AT91_VA_BASE_SYS, - .pfn = __phys_to_pfn(AT91_BASE_SYS), - .length = SZ_16K, - .type = MT_DEVICE, -}; - -static struct map_desc at91_alt_io_desc __initdata __maybe_unused = { - .virtual = (unsigned long)AT91_ALT_VA_BASE_SYS, - .pfn = __phys_to_pfn(AT91_ALT_BASE_SYS), - .length = 24 * SZ_1K, - .type = MT_DEVICE, -}; - -static void __init soc_detect(u32 dbgu_base) -{ - u32 cidr, socid; - - cidr = __raw_readl(AT91_IO_P2V(dbgu_base) + AT91_DBGU_CIDR); - socid = cidr & ~AT91_CIDR_VERSION; - - switch (socid) { - case ARCH_ID_AT91RM9200: - at91_soc_initdata.type = AT91_SOC_RM9200; - if (at91_soc_initdata.subtype == AT91_SOC_SUBTYPE_UNKNOWN) - at91_soc_initdata.subtype = AT91_SOC_RM9200_BGA; - break; - - case ARCH_ID_AT91SAM9260: - at91_soc_initdata.type = AT91_SOC_SAM9260; - at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE; - break; - - case ARCH_ID_AT91SAM9261: - at91_soc_initdata.type = AT91_SOC_SAM9261; - at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE; - break; - - case ARCH_ID_AT91SAM9263: - at91_soc_initdata.type = AT91_SOC_SAM9263; - at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE; - break; - - case ARCH_ID_AT91SAM9G20: - at91_soc_initdata.type = AT91_SOC_SAM9G20; - at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE; - break; - - case ARCH_ID_AT91SAM9G45: - at91_soc_initdata.type = AT91_SOC_SAM9G45; - if (cidr == ARCH_ID_AT91SAM9G45ES) - at91_soc_initdata.subtype = AT91_SOC_SAM9G45ES; - break; - - case ARCH_ID_AT91SAM9RL64: - at91_soc_initdata.type = AT91_SOC_SAM9RL; - at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE; - break; - - case ARCH_ID_AT91SAM9X5: - at91_soc_initdata.type = AT91_SOC_SAM9X5; - break; - - case ARCH_ID_AT91SAM9N12: - at91_soc_initdata.type = AT91_SOC_SAM9N12; - break; - - case ARCH_ID_SAMA5: - at91_soc_initdata.exid = __raw_readl(AT91_IO_P2V(dbgu_base) + AT91_DBGU_EXID); - if (at91_soc_initdata.exid & ARCH_EXID_SAMA5D3) { - at91_soc_initdata.type = AT91_SOC_SAMA5D3; - } - break; - } - - /* at91sam9g10 */ - if ((socid & ~AT91_CIDR_EXT) == ARCH_ID_AT91SAM9G10) { - at91_soc_initdata.type = AT91_SOC_SAM9G10; - at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE; - } - /* at91sam9xe */ - else if ((cidr & AT91_CIDR_ARCH) == ARCH_FAMILY_AT91SAM9XE) { - at91_soc_initdata.type = AT91_SOC_SAM9260; - at91_soc_initdata.subtype = AT91_SOC_SAM9XE; - } - - if (!at91_soc_is_detected()) - return; - - at91_soc_initdata.cidr = cidr; - - /* sub version of soc */ - if (!at91_soc_initdata.exid) - at91_soc_initdata.exid = __raw_readl(AT91_IO_P2V(dbgu_base) + AT91_DBGU_EXID); - - if (at91_soc_initdata.type == AT91_SOC_SAM9G45) { - switch (at91_soc_initdata.exid) { - case ARCH_EXID_AT91SAM9M10: - at91_soc_initdata.subtype = AT91_SOC_SAM9M10; - break; - case ARCH_EXID_AT91SAM9G46: - at91_soc_initdata.subtype = AT91_SOC_SAM9G46; - break; - case ARCH_EXID_AT91SAM9M11: - at91_soc_initdata.subtype = AT91_SOC_SAM9M11; - break; - } - } - - if (at91_soc_initdata.type == AT91_SOC_SAM9X5) { - switch (at91_soc_initdata.exid) { - case ARCH_EXID_AT91SAM9G15: - at91_soc_initdata.subtype = AT91_SOC_SAM9G15; - break; - case ARCH_EXID_AT91SAM9G35: - at91_soc_initdata.subtype = AT91_SOC_SAM9G35; - break; - case ARCH_EXID_AT91SAM9X35: - at91_soc_initdata.subtype = AT91_SOC_SAM9X35; - break; - case ARCH_EXID_AT91SAM9G25: - at91_soc_initdata.subtype = AT91_SOC_SAM9G25; - break; - case ARCH_EXID_AT91SAM9X25: - at91_soc_initdata.subtype = AT91_SOC_SAM9X25; - break; - } - } - - if (at91_soc_initdata.type == AT91_SOC_SAMA5D3) { - switch (at91_soc_initdata.exid) { - case ARCH_EXID_SAMA5D31: - at91_soc_initdata.subtype = AT91_SOC_SAMA5D31; - break; - case ARCH_EXID_SAMA5D33: - at91_soc_initdata.subtype = AT91_SOC_SAMA5D33; - break; - case ARCH_EXID_SAMA5D34: - at91_soc_initdata.subtype = AT91_SOC_SAMA5D34; - break; - case ARCH_EXID_SAMA5D35: - at91_soc_initdata.subtype = AT91_SOC_SAMA5D35; - break; - case ARCH_EXID_SAMA5D36: - at91_soc_initdata.subtype = AT91_SOC_SAMA5D36; - break; - } - } -} - -static void __init alt_soc_detect(u32 dbgu_base) -{ - u32 cidr, socid; - - /* SoC ID */ - cidr = __raw_readl(AT91_ALT_IO_P2V(dbgu_base) + AT91_DBGU_CIDR); - socid = cidr & ~AT91_CIDR_VERSION; - - switch (socid) { - case ARCH_ID_SAMA5: - at91_soc_initdata.exid = __raw_readl(AT91_ALT_IO_P2V(dbgu_base) + AT91_DBGU_EXID); - if (at91_soc_initdata.exid & ARCH_EXID_SAMA5D3) { - at91_soc_initdata.type = AT91_SOC_SAMA5D3; - } else if (at91_soc_initdata.exid & ARCH_EXID_SAMA5D4) { - at91_soc_initdata.type = AT91_SOC_SAMA5D4; - } - break; - } - - if (!at91_soc_is_detected()) - return; - - at91_soc_initdata.cidr = cidr; - - /* sub version of soc */ - if (!at91_soc_initdata.exid) - at91_soc_initdata.exid = __raw_readl(AT91_ALT_IO_P2V(dbgu_base) + AT91_DBGU_EXID); - - if (at91_soc_initdata.type == AT91_SOC_SAMA5D4) { - switch (at91_soc_initdata.exid) { - case ARCH_EXID_SAMA5D41: - at91_soc_initdata.subtype = AT91_SOC_SAMA5D41; - break; - case ARCH_EXID_SAMA5D42: - at91_soc_initdata.subtype = AT91_SOC_SAMA5D42; - break; - case ARCH_EXID_SAMA5D43: - at91_soc_initdata.subtype = AT91_SOC_SAMA5D43; - break; - case ARCH_EXID_SAMA5D44: - at91_soc_initdata.subtype = AT91_SOC_SAMA5D44; - break; - } - } -} - -static const char *soc_name[] = { - [AT91_SOC_RM9200] = "at91rm9200", - [AT91_SOC_SAM9260] = "at91sam9260", - [AT91_SOC_SAM9261] = "at91sam9261", - [AT91_SOC_SAM9263] = "at91sam9263", - [AT91_SOC_SAM9G10] = "at91sam9g10", - [AT91_SOC_SAM9G20] = "at91sam9g20", - [AT91_SOC_SAM9G45] = "at91sam9g45", - [AT91_SOC_SAM9RL] = "at91sam9rl", - [AT91_SOC_SAM9X5] = "at91sam9x5", - [AT91_SOC_SAM9N12] = "at91sam9n12", - [AT91_SOC_SAMA5D3] = "sama5d3", - [AT91_SOC_SAMA5D4] = "sama5d4", - [AT91_SOC_UNKNOWN] = "Unknown", -}; - -const char *at91_get_soc_type(struct at91_socinfo *c) -{ - return soc_name[c->type]; -} -EXPORT_SYMBOL(at91_get_soc_type); - -static const char *soc_subtype_name[] = { - [AT91_SOC_RM9200_BGA] = "at91rm9200 BGA", - [AT91_SOC_RM9200_PQFP] = "at91rm9200 PQFP", - [AT91_SOC_SAM9XE] = "at91sam9xe", - [AT91_SOC_SAM9G45ES] = "at91sam9g45es", - [AT91_SOC_SAM9M10] = "at91sam9m10", - [AT91_SOC_SAM9G46] = "at91sam9g46", - [AT91_SOC_SAM9M11] = "at91sam9m11", - [AT91_SOC_SAM9G15] = "at91sam9g15", - [AT91_SOC_SAM9G35] = "at91sam9g35", - [AT91_SOC_SAM9X35] = "at91sam9x35", - [AT91_SOC_SAM9G25] = "at91sam9g25", - [AT91_SOC_SAM9X25] = "at91sam9x25", - [AT91_SOC_SAMA5D31] = "sama5d31", - [AT91_SOC_SAMA5D33] = "sama5d33", - [AT91_SOC_SAMA5D34] = "sama5d34", - [AT91_SOC_SAMA5D35] = "sama5d35", - [AT91_SOC_SAMA5D36] = "sama5d36", - [AT91_SOC_SAMA5D41] = "sama5d41", - [AT91_SOC_SAMA5D42] = "sama5d42", - [AT91_SOC_SAMA5D43] = "sama5d43", - [AT91_SOC_SAMA5D44] = "sama5d44", - [AT91_SOC_SUBTYPE_NONE] = "None", - [AT91_SOC_SUBTYPE_UNKNOWN] = "Unknown", -}; - -const char *at91_get_soc_subtype(struct at91_socinfo *c) -{ - return soc_subtype_name[c->subtype]; -} -EXPORT_SYMBOL(at91_get_soc_subtype); - -void __init at91_map_io(void) -{ - /* Map peripherals */ - iotable_init(&at91_io_desc, 1); - - at91_soc_initdata.type = AT91_SOC_UNKNOWN; - at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_UNKNOWN; - - soc_detect(AT91_BASE_DBGU0); - if (!at91_soc_is_detected()) - soc_detect(AT91_BASE_DBGU1); - - if (!at91_soc_is_detected()) - panic(pr_fmt("Impossible to detect the SOC type")); - - pr_info("Detected soc type: %s\n", - at91_get_soc_type(&at91_soc_initdata)); - if (at91_soc_initdata.subtype != AT91_SOC_SUBTYPE_NONE) - pr_info("Detected soc subtype: %s\n", - at91_get_soc_subtype(&at91_soc_initdata)); -} - -void __init at91_alt_map_io(void) -{ - /* Map peripherals */ - iotable_init(&at91_alt_io_desc, 1); - - at91_soc_initdata.type = AT91_SOC_UNKNOWN; - at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_UNKNOWN; - - alt_soc_detect(AT91_BASE_DBGU2); - if (!at91_soc_is_detected()) - panic("AT91: Impossible to detect the SOC type"); - - pr_info("AT91: Detected soc type: %s\n", - at91_get_soc_type(&at91_soc_initdata)); - if (at91_soc_initdata.subtype != AT91_SOC_SUBTYPE_NONE) - pr_info("AT91: Detected soc subtype: %s\n", - at91_get_soc_subtype(&at91_soc_initdata)); -} - -void __iomem *at91_matrix_base; -EXPORT_SYMBOL_GPL(at91_matrix_base); - -void __init at91_ioremap_matrix(u32 base_addr) -{ - at91_matrix_base = ioremap(base_addr, 512); - if (!at91_matrix_base) - panic(pr_fmt("Impossible to ioremap at91_matrix_base\n")); -} diff --git a/arch/arm/mach-at91/soc.c b/arch/arm/mach-at91/soc.c new file mode 100644 index 0000000..54343ff --- /dev/null +++ b/arch/arm/mach-at91/soc.c @@ -0,0 +1,97 @@ +/* + * Copyright (C) 2015 Atmel + * + * Alexandre Belloni <alexandre.belloni@free-electrons.com + * Boris Brezillon <boris.brezillon@free-electrons.com + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + * + */ + +#define pr_fmt(fmt) "AT91: " fmt + +#include <linux/io.h> +#include <linux/of.h> +#include <linux/of_address.h> +#include <linux/of_platform.h> +#include <linux/slab.h> +#include <linux/sys_soc.h> + +#include "soc.h" + +#define AT91_DBGU_CIDR 0x40 +#define AT91_DBGU_CIDR_VERSION(x) ((x) & 0x1f) +#define AT91_DBGU_CIDR_EXT BIT(31) +#define AT91_DBGU_CIDR_MATCH_MASK 0x7fffffe0 +#define AT91_DBGU_EXID 0x44 + +struct soc_device * __init at91_soc_init(const struct at91_soc *socs) +{ + struct soc_device_attribute *soc_dev_attr; + const struct at91_soc *soc; + struct soc_device *soc_dev; + struct device_node *np; + void __iomem *regs; + u32 cidr, exid; + + np = of_find_compatible_node(NULL, NULL, "atmel,at91rm9200-dbgu"); + if (!np) + np = of_find_compatible_node(NULL, NULL, + "atmel,at91sam9260-dbgu"); + + if (!np) { + pr_warn("Could not find DBGU node"); + return NULL; + } + + regs = of_iomap(np, 0); + of_node_put(np); + + if (!regs) { + pr_warn("Could not map DBGU iomem range"); + return NULL; + } + + cidr = readl(regs + AT91_DBGU_CIDR); + exid = readl(regs + AT91_DBGU_EXID); + + iounmap(regs); + + for (soc = socs; soc->name; soc++) { + if (soc->cidr_match != (cidr & AT91_DBGU_CIDR_MATCH_MASK)) + continue; + + if (!(cidr & AT91_DBGU_CIDR_EXT) || soc->exid_match == exid) + break; + } + + if (!soc->name) { + pr_warn("Could not find matching SoC description\n"); + return NULL; + } + + soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL); + if (!soc_dev_attr) + return NULL; + + soc_dev_attr->family = soc->family; + soc_dev_attr->soc_id = soc->name; + soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%X", + AT91_DBGU_CIDR_VERSION(cidr)); + soc_dev = soc_device_register(soc_dev_attr); + if (IS_ERR(soc_dev)) { + kfree(soc_dev_attr->revision); + kfree(soc_dev_attr); + pr_warn("Could not register SoC device\n"); + return NULL; + } + + if (soc->family) + pr_info("Detected SoC family: %s\n", soc->family); + pr_info("Detected SoC: %s, revision %X\n", soc->name, + AT91_DBGU_CIDR_VERSION(cidr)); + + return soc_dev; +} diff --git a/arch/arm/mach-at91/soc.h b/arch/arm/mach-at91/soc.h new file mode 100644 index 0000000..be23c40 --- /dev/null +++ b/arch/arm/mach-at91/soc.h @@ -0,0 +1,78 @@ +/* + * Copyright (C) 2015 Atmel + * + * Boris Brezillon <boris.brezillon@free-electrons.com + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + * + */ + +#ifndef __AT91_SOC_H +#define __AT91_SOC_H + +#include <linux/sys_soc.h> + +struct at91_soc { + u32 cidr_match; + u32 exid_match; + const char *name; + const char *family; +}; + +#define AT91_SOC(__cidr, __exid, __name, __family) \ + { \ + .cidr_match = (__cidr), \ + .exid_match = (__exid), \ + .name = (__name), \ + .family = (__family), \ + } + +struct soc_device * __init +at91_soc_init(const struct at91_soc *socs); + +#define AT91RM9200_CIDR_MATCH 0x09290780 + +#define AT91SAM9260_CIDR_MATCH 0x019803a0 +#define AT91SAM9261_CIDR_MATCH 0x019703a0 +#define AT91SAM9263_CIDR_MATCH 0x019607a0 +#define AT91SAM9G20_CIDR_MATCH 0x019905a0 +#define AT91SAM9RL64_CIDR_MATCH 0x019b03a0 +#define AT91SAM9G45_CIDR_MATCH 0x019b05a0 +#define AT91SAM9X5_CIDR_MATCH 0x019a05a0 +#define AT91SAM9N12_CIDR_MATCH 0x019a07a0 + +#define AT91SAM9M11_EXID_MATCH 0x00000001 +#define AT91SAM9M10_EXID_MATCH 0x00000002 +#define AT91SAM9G46_EXID_MATCH 0x00000003 +#define AT91SAM9G45_EXID_MATCH 0x00000004 + +#define AT91SAM9G15_EXID_MATCH 0x00000000 +#define AT91SAM9G35_EXID_MATCH 0x00000001 +#define AT91SAM9X35_EXID_MATCH 0x00000002 +#define AT91SAM9G25_EXID_MATCH 0x00000003 +#define AT91SAM9X25_EXID_MATCH 0x00000004 + +#define AT91SAM9CN12_EXID_MATCH 0x00000005 +#define AT91SAM9N12_EXID_MATCH 0x00000006 +#define AT91SAM9CN11_EXID_MATCH 0x00000009 + +#define AT91SAM9XE128_CIDR_MATCH 0x329973a0 +#define AT91SAM9XE256_CIDR_MATCH 0x329a93a0 +#define AT91SAM9XE512_CIDR_MATCH 0x329aa3a0 + +#define SAMA5D3_CIDR_MATCH 0x0a5c07c0 +#define SAMA5D31_EXID_MATCH 0x00444300 +#define SAMA5D33_EXID_MATCH 0x00414300 +#define SAMA5D34_EXID_MATCH 0x00414301 +#define SAMA5D35_EXID_MATCH 0x00584300 +#define SAMA5D36_EXID_MATCH 0x00004301 + +#define SAMA5D4_CIDR_MATCH 0x0a5c07c0 +#define SAMA5D41_EXID_MATCH 0x00000001 +#define SAMA5D42_EXID_MATCH 0x00000002 +#define SAMA5D43_EXID_MATCH 0x00000003 +#define SAMA5D44_EXID_MATCH 0x00000004 + +#endif /* __AT91_SOC_H */ diff --git a/arch/arm/mach-davinci/asp.h b/arch/arm/mach-davinci/asp.h index d9b2acd..1128e1d 100644 --- a/arch/arm/mach-davinci/asp.h +++ b/arch/arm/mach-davinci/asp.h @@ -21,6 +21,9 @@ /* Bases of da830 McASP1 register banks */ #define DAVINCI_DA830_MCASP1_REG_BASE 0x01D04000 +/* Bases of da830 McASP2 register banks */ +#define DAVINCI_DA830_MCASP2_REG_BASE 0x01D08000 + /* EDMA channels of dm644x and dm355 */ #define DAVINCI_DMA_ASP0_TX 2 #define DAVINCI_DMA_ASP0_RX 3 @@ -40,6 +43,10 @@ #define DAVINCI_DA830_DMA_MCASP1_AREVT 2 #define DAVINCI_DA830_DMA_MCASP1_AXEVT 3 +/* EDMA channels of da830 McASP2 */ +#define DAVINCI_DA830_DMA_MCASP2_AREVT 4 +#define DAVINCI_DA830_DMA_MCASP2_AXEVT 5 + /* Interrupts */ #define DAVINCI_ASP0_RX_INT IRQ_MBRINT #define DAVINCI_ASP0_TX_INT IRQ_MBXINT diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c index b85b781..ddfdd82 100644 --- a/arch/arm/mach-davinci/devices-da8xx.c +++ b/arch/arm/mach-davinci/devices-da8xx.c @@ -463,16 +463,23 @@ static struct resource da830_mcasp1_resources[] = { }, /* TX event */ { + .name = "tx", .start = DAVINCI_DA830_DMA_MCASP1_AXEVT, .end = DAVINCI_DA830_DMA_MCASP1_AXEVT, .flags = IORESOURCE_DMA, }, /* RX event */ { + .name = "rx", .start = DAVINCI_DA830_DMA_MCASP1_AREVT, .end = DAVINCI_DA830_DMA_MCASP1_AREVT, .flags = IORESOURCE_DMA, }, + { + .name = "common", + .start = IRQ_DA8XX_MCASPINT, + .flags = IORESOURCE_IRQ, + }, }; static struct platform_device da830_mcasp1_device = { @@ -482,6 +489,41 @@ static struct platform_device da830_mcasp1_device = { .resource = da830_mcasp1_resources, }; +static struct resource da830_mcasp2_resources[] = { + { + .name = "mpu", + .start = DAVINCI_DA830_MCASP2_REG_BASE, + .end = DAVINCI_DA830_MCASP2_REG_BASE + (SZ_1K * 12) - 1, + .flags = IORESOURCE_MEM, + }, + /* TX event */ + { + .name = "tx", + .start = DAVINCI_DA830_DMA_MCASP2_AXEVT, + .end = DAVINCI_DA830_DMA_MCASP2_AXEVT, + .flags = IORESOURCE_DMA, + }, + /* RX event */ + { + .name = "rx", + .start = DAVINCI_DA830_DMA_MCASP2_AREVT, + .end = DAVINCI_DA830_DMA_MCASP2_AREVT, + .flags = IORESOURCE_DMA, + }, + { + .name = "common", + .start = IRQ_DA8XX_MCASPINT, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device da830_mcasp2_device = { + .name = "davinci-mcasp", + .id = 2, + .num_resources = ARRAY_SIZE(da830_mcasp2_resources), + .resource = da830_mcasp2_resources, +}; + static struct resource da850_mcasp_resources[] = { { .name = "mpu", @@ -491,16 +533,23 @@ static struct resource da850_mcasp_resources[] = { }, /* TX event */ { + .name = "tx", .start = DAVINCI_DA8XX_DMA_MCASP0_AXEVT, .end = DAVINCI_DA8XX_DMA_MCASP0_AXEVT, .flags = IORESOURCE_DMA, }, /* RX event */ { + .name = "rx", .start = DAVINCI_DA8XX_DMA_MCASP0_AREVT, .end = DAVINCI_DA8XX_DMA_MCASP0_AREVT, .flags = IORESOURCE_DMA, }, + { + .name = "common", + .start = IRQ_DA8XX_MCASPINT, + .flags = IORESOURCE_IRQ, + }, }; static struct platform_device da850_mcasp_device = { @@ -512,14 +561,31 @@ static struct platform_device da850_mcasp_device = { void __init da8xx_register_mcasp(int id, struct snd_platform_data *pdata) { - /* DA830/OMAP-L137 has 3 instances of McASP */ - if (cpu_is_davinci_da830() && id == 1) { - da830_mcasp1_device.dev.platform_data = pdata; - platform_device_register(&da830_mcasp1_device); - } else if (cpu_is_davinci_da850()) { - da850_mcasp_device.dev.platform_data = pdata; - platform_device_register(&da850_mcasp_device); + struct platform_device *pdev; + + switch (id) { + case 0: + /* Valid for DA830/OMAP-L137 or DA850/OMAP-L138 */ + pdev = &da850_mcasp_device; + break; + case 1: + /* Valid for DA830/OMAP-L137 only */ + if (!cpu_is_davinci_da830()) + return; + pdev = &da830_mcasp1_device; + break; + case 2: + /* Valid for DA830/OMAP-L137 only */ + if (!cpu_is_davinci_da830()) + return; + pdev = &da830_mcasp2_device; + break; + default: + return; } + + pdev->dev.platform_data = pdata; + platform_device_register(pdev); } static struct resource da8xx_pruss_resources[] = { diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c index 6c3bbea..3f842bb 100644 --- a/arch/arm/mach-davinci/dm646x.c +++ b/arch/arm/mach-davinci/dm646x.c @@ -493,7 +493,6 @@ static u8 dm646x_default_priorities[DAVINCI_N_AINTC_IRQ] = { [IRQ_DM646X_EMACMISCINT] = 7, [IRQ_DM646X_MCASP0TXINT] = 7, [IRQ_DM646X_MCASP0RXINT] = 7, - [IRQ_AEMIFINT] = 7, [IRQ_DM646X_RESERVED_3] = 7, [IRQ_DM646X_MCASP1TXINT] = 7, /* clockevent */ [IRQ_TINT0_TINT34] = 7, /* clocksource */ @@ -610,19 +609,31 @@ static struct resource dm646x_mcasp0_resources[] = { .end = DAVINCI_DM646X_MCASP0_REG_BASE + (SZ_1K << 1) - 1, .flags = IORESOURCE_MEM, }, - /* first TX, then RX */ { + .name = "tx", .start = DAVINCI_DM646X_DMA_MCASP0_AXEVT0, .end = DAVINCI_DM646X_DMA_MCASP0_AXEVT0, .flags = IORESOURCE_DMA, }, { + .name = "rx", .start = DAVINCI_DM646X_DMA_MCASP0_AREVT0, .end = DAVINCI_DM646X_DMA_MCASP0_AREVT0, .flags = IORESOURCE_DMA, }, + { + .name = "tx", + .start = IRQ_DM646X_MCASP0TXINT, + .flags = IORESOURCE_IRQ, + }, + { + .name = "rx", + .start = IRQ_DM646X_MCASP0RXINT, + .flags = IORESOURCE_IRQ, + }, }; +/* DIT mode only, rx is not supported */ static struct resource dm646x_mcasp1_resources[] = { { .name = "mpu", @@ -630,17 +641,16 @@ static struct resource dm646x_mcasp1_resources[] = { .end = DAVINCI_DM646X_MCASP1_REG_BASE + (SZ_1K << 1) - 1, .flags = IORESOURCE_MEM, }, - /* DIT mode, only TX event */ { + .name = "tx", .start = DAVINCI_DM646X_DMA_MCASP1_AXEVT1, .end = DAVINCI_DM646X_DMA_MCASP1_AXEVT1, .flags = IORESOURCE_DMA, }, - /* DIT mode, dummy entry */ { - .start = -1, - .end = -1, - .flags = IORESOURCE_DMA, + .name = "tx", + .start = IRQ_DM646X_MCASP1TXINT, + .flags = IORESOURCE_IRQ, }, }; diff --git a/arch/arm/mach-davinci/include/mach/irqs.h b/arch/arm/mach-davinci/include/mach/irqs.h index 354af71..edb2ca6 100644 --- a/arch/arm/mach-davinci/include/mach/irqs.h +++ b/arch/arm/mach-davinci/include/mach/irqs.h @@ -129,8 +129,8 @@ #define IRQ_DM646X_EMACMISCINT 27 #define IRQ_DM646X_MCASP0TXINT 28 #define IRQ_DM646X_MCASP0RXINT 29 +#define IRQ_DM646X_MCASP1TXINT 30 #define IRQ_DM646X_RESERVED_3 31 -#define IRQ_DM646X_MCASP1TXINT 32 #define IRQ_DM646X_VLQINT 38 #define IRQ_DM646X_UARTINT2 42 #define IRQ_DM646X_SPINT0 43 diff --git a/arch/arm/mach-msm/Kconfig b/arch/arm/mach-msm/Kconfig deleted file mode 100644 index a6b50e6..0000000 --- a/arch/arm/mach-msm/Kconfig +++ /dev/null @@ -1,109 +0,0 @@ -if ARCH_MSM - -choice - prompt "Qualcomm MSM SoC Type" - default ARCH_MSM7X00A - depends on ARCH_MSM - -config ARCH_MSM7X00A - bool "MSM7x00A / MSM7x01A" - select ARCH_MSM_ARM11 - select CPU_V6 - select GPIO_MSM_V1 - select MACH_TROUT if !MACH_HALIBUT - select MSM_PROC_COMM - select MSM_SMD - select CLKSRC_QCOM - select MSM_SMD_PKG3 - -config ARCH_MSM7X30 - bool "MSM7x30" - select ARCH_MSM_SCORPION - select CPU_V7 - select GPIO_MSM_V1 - select MACH_MSM7X30_SURF # if ! - select MSM_GPIOMUX - select MSM_PROC_COMM - select MSM_SMD - select CLKSRC_QCOM - select MSM_VIC - -config ARCH_QSD8X50 - bool "QSD8X50" - select ARCH_MSM_SCORPION - select CPU_V7 - select GPIO_MSM_V1 - select MACH_QSD8X50_SURF if !MACH_QSD8X50A_ST1_5 - select MSM_GPIOMUX - select MSM_PROC_COMM - select MSM_SMD - select CLKSRC_QCOM - select MSM_VIC - -endchoice - -config MSM_SOC_REV_A - bool - -config ARCH_MSM_ARM11 - bool - -config ARCH_MSM_SCORPION - bool - -config MSM_VIC - bool - -menu "Qualcomm MSM Board Type" - depends on ARCH_MSM - -config MACH_HALIBUT - depends on ARCH_MSM - depends on ARCH_MSM7X00A - bool "Halibut Board (QCT SURF7201A)" - help - Support for the Qualcomm SURF7201A eval board. - -config MACH_TROUT - depends on ARCH_MSM - depends on ARCH_MSM7X00A - bool "HTC Dream (aka trout)" - help - Support for the HTC Dream, T-Mobile G1, Android ADP1 devices. - -config MACH_MSM7X30_SURF - depends on ARCH_MSM7X30 - bool "MSM7x30 SURF" - help - Support for the Qualcomm MSM7x30 SURF eval board. - -config MACH_QSD8X50_SURF - depends on ARCH_QSD8X50 - bool "QSD8x50 SURF" - help - Support for the Qualcomm QSD8x50 SURF eval board. - -config MACH_QSD8X50A_ST1_5 - depends on ARCH_QSD8X50 - bool "QSD8x50A ST1.5" - select MSM_SOC_REV_A - help - Support for the Qualcomm ST1.5. - -endmenu - -config MSM_SMD_PKG3 - bool - -config MSM_PROC_COMM - bool - -config MSM_SMD - bool - -config MSM_GPIOMUX - bool - help - Support for MSM V1 TLMM GPIOMUX architecture. - -endif diff --git a/arch/arm/mach-msm/Makefile b/arch/arm/mach-msm/Makefile deleted file mode 100644 index 27c078a..0000000 --- a/arch/arm/mach-msm/Makefile +++ /dev/null @@ -1,23 +0,0 @@ -obj-$(CONFIG_MSM_PROC_COMM) += clock.o - -obj-$(CONFIG_MSM_VIC) += irq-vic.o - -obj-$(CONFIG_ARCH_MSM7X00A) += irq.o -obj-$(CONFIG_ARCH_QSD8X50) += sirc.o - -obj-$(CONFIG_MSM_PROC_COMM) += proc_comm.o clock-pcom.o vreg.o - -obj-$(CONFIG_ARCH_MSM7X00A) += dma.o io.o -obj-$(CONFIG_ARCH_MSM7X30) += dma.o io.o -obj-$(CONFIG_ARCH_QSD8X50) += dma.o io.o - -obj-$(CONFIG_MSM_SMD) += smd.o smd_debug.o -obj-$(CONFIG_MSM_SMD) += last_radio_log.o - -obj-$(CONFIG_MACH_TROUT) += board-trout.o board-trout-gpio.o board-trout-mmc.o devices-msm7x00.o -obj-$(CONFIG_MACH_TROUT) += board-trout.o board-trout-gpio.o board-trout-mmc.o board-trout-panel.o devices-msm7x00.o -obj-$(CONFIG_MACH_HALIBUT) += board-halibut.o devices-msm7x00.o -obj-$(CONFIG_ARCH_MSM7X30) += board-msm7x30.o devices-msm7x30.o -obj-$(CONFIG_ARCH_QSD8X50) += board-qsd8x50.o devices-qsd8x50.o -obj-$(CONFIG_MSM_GPIOMUX) += gpiomux.o -obj-$(CONFIG_ARCH_QSD8X50) += gpiomux-8x50.o diff --git a/arch/arm/mach-msm/Makefile.boot b/arch/arm/mach-msm/Makefile.boot deleted file mode 100644 index 9b803a5..0000000 --- a/arch/arm/mach-msm/Makefile.boot +++ /dev/null @@ -1,3 +0,0 @@ - zreladdr-y += 0x10008000 -params_phys-y := 0x10000100 -initrd_phys-y := 0x10800000 diff --git a/arch/arm/mach-msm/board-halibut.c b/arch/arm/mach-msm/board-halibut.c deleted file mode 100644 index 61bfe58..0000000 --- a/arch/arm/mach-msm/board-halibut.c +++ /dev/null @@ -1,104 +0,0 @@ -/* linux/arch/arm/mach-msm/board-halibut.c - * - * Copyright (C) 2007 Google, Inc. - * Author: Brian Swetland <swetland@google.com> - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/platform_device.h> -#include <linux/input.h> -#include <linux/io.h> -#include <linux/delay.h> - -#include <mach/hardware.h> -#include <asm/mach-types.h> -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/mach/flash.h> -#include <asm/setup.h> - -#include <mach/irqs.h> -#include <mach/msm_iomap.h> - -#include <linux/mtd/nand.h> -#include <linux/mtd/partitions.h> - -#include "devices.h" -#include "common.h" - -static struct resource smc91x_resources[] = { - [0] = { - .start = 0x9C004300, - .end = 0x9C004400, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = MSM_GPIO_TO_INT(49), - .end = MSM_GPIO_TO_INT(49), - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device smc91x_device = { - .name = "smc91x", - .id = 0, - .num_resources = ARRAY_SIZE(smc91x_resources), - .resource = smc91x_resources, -}; - -static struct platform_device *devices[] __initdata = { - &msm_clock_7x01a, - &msm_device_gpio_7201, - &msm_device_uart3, - &msm_device_smd, - &msm_device_nand, - &msm_device_hsusb, - &msm_device_i2c, - &smc91x_device, -}; - -static void __init halibut_init_early(void) -{ - arch_ioremap_caller = __msm_ioremap_caller; -} - -static void __init halibut_init_irq(void) -{ - msm_init_irq(); -} - -static void __init halibut_init(void) -{ - platform_add_devices(devices, ARRAY_SIZE(devices)); -} - -static void __init halibut_map_io(void) -{ - msm_map_common_io(); -} - -static void __init halibut_init_late(void) -{ - smd_debugfs_init(); -} - -MACHINE_START(HALIBUT, "Halibut Board (QCT SURF7200A)") - .atag_offset = 0x100, - .map_io = halibut_map_io, - .init_early = halibut_init_early, - .init_irq = halibut_init_irq, - .init_machine = halibut_init, - .init_late = halibut_init_late, - .init_time = msm7x01_timer_init, -MACHINE_END diff --git a/arch/arm/mach-msm/board-msm7x30.c b/arch/arm/mach-msm/board-msm7x30.c deleted file mode 100644 index 8f5ecdc..0000000 --- a/arch/arm/mach-msm/board-msm7x30.c +++ /dev/null @@ -1,191 +0,0 @@ -/* Copyright (c) 2009-2010, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA - * 02110-1301, USA. - */ -#include <linux/gpio.h> -#include <linux/kernel.h> -#include <linux/irq.h> -#include <linux/platform_device.h> -#include <linux/delay.h> -#include <linux/io.h> -#include <linux/smsc911x.h> -#include <linux/usb/msm_hsusb.h> -#include <linux/clkdev.h> -#include <linux/memblock.h> - -#include <asm/mach-types.h> -#include <asm/mach/arch.h> -#include <asm/memory.h> -#include <asm/setup.h> - -#include <mach/clk.h> -#include <mach/msm_iomap.h> -#include <mach/dma.h> - -#include <mach/vreg.h> -#include "devices.h" -#include "gpiomux.h" -#include "proc_comm.h" -#include "common.h" - -static void __init msm7x30_fixup(struct tag *tag, char **cmdline) -{ - for (; tag->hdr.size; tag = tag_next(tag)) - if (tag->hdr.tag == ATAG_MEM && tag->u.mem.start == 0x200000) { - tag->u.mem.start = 0; - tag->u.mem.size += SZ_2M; - } -} - -static void __init msm7x30_reserve(void) -{ - memblock_remove(0x0, SZ_2M); -} - -static int hsusb_phy_init_seq[] = { - 0x30, 0x32, /* Enable and set Pre-Emphasis Depth to 20% */ - 0x02, 0x36, /* Disable CDR Auto Reset feature */ - -1 -}; - -static int hsusb_link_clk_reset(struct clk *link_clk, bool assert) -{ - int ret; - - if (assert) { - ret = clk_reset(link_clk, CLK_RESET_ASSERT); - if (ret) - pr_err("usb hs_clk assert failed\n"); - } else { - ret = clk_reset(link_clk, CLK_RESET_DEASSERT); - if (ret) - pr_err("usb hs_clk deassert failed\n"); - } - return ret; -} - -static int hsusb_phy_clk_reset(struct clk *phy_clk) -{ - int ret; - - ret = clk_reset(phy_clk, CLK_RESET_ASSERT); - if (ret) { - pr_err("usb phy clk assert failed\n"); - return ret; - } - usleep_range(10000, 12000); - ret = clk_reset(phy_clk, CLK_RESET_DEASSERT); - if (ret) - pr_err("usb phy clk deassert failed\n"); - return ret; -} - -static struct msm_otg_platform_data msm_otg_pdata = { - .phy_init_seq = hsusb_phy_init_seq, - .mode = USB_DR_MODE_PERIPHERAL, - .otg_control = OTG_PHY_CONTROL, - .link_clk_reset = hsusb_link_clk_reset, - .phy_clk_reset = hsusb_phy_clk_reset, -}; - -struct msm_gpiomux_config msm_gpiomux_configs[GPIOMUX_NGPIOS] = { -#ifdef CONFIG_SERIAL_MSM_CONSOLE - [49] = { /* UART2 RFR */ - .suspended = GPIOMUX_DRV_2MA | GPIOMUX_PULL_DOWN | - GPIOMUX_FUNC_2 | GPIOMUX_VALID, - }, - [50] = { /* UART2 CTS */ - .suspended = GPIOMUX_DRV_2MA | GPIOMUX_PULL_DOWN | - GPIOMUX_FUNC_2 | GPIOMUX_VALID, - }, - [51] = { /* UART2 RX */ - .suspended = GPIOMUX_DRV_2MA | GPIOMUX_PULL_DOWN | - GPIOMUX_FUNC_2 | GPIOMUX_VALID, - }, - [52] = { /* UART2 TX */ - .suspended = GPIOMUX_DRV_2MA | GPIOMUX_PULL_DOWN | - GPIOMUX_FUNC_2 | GPIOMUX_VALID, - }, -#endif -}; - -static struct platform_device *devices[] __initdata = { - &msm_clock_7x30, - &msm_device_gpio_7x30, -#if defined(CONFIG_SERIAL_MSM) - &msm_device_uart2, -#endif - &msm_device_smd, - &msm_device_otg, - &msm_device_hsusb, - &msm_device_hsusb_host, -}; - -static void __init msm7x30_init_irq(void) -{ - msm_init_irq(); -} - -static void __init msm7x30_init(void) -{ - msm_device_otg.dev.platform_data = &msm_otg_pdata; - msm_device_hsusb.dev.parent = &msm_device_otg.dev; - msm_device_hsusb_host.dev.parent = &msm_device_otg.dev; - - platform_add_devices(devices, ARRAY_SIZE(devices)); -} - -static void __init msm7x30_map_io(void) -{ - msm_map_msm7x30_io(); -} - -static void __init msm7x30_init_late(void) -{ - smd_debugfs_init(); -} - -MACHINE_START(MSM7X30_SURF, "QCT MSM7X30 SURF") - .atag_offset = 0x100, - .fixup = msm7x30_fixup, - .reserve = msm7x30_reserve, - .map_io = msm7x30_map_io, - .init_irq = msm7x30_init_irq, - .init_machine = msm7x30_init, - .init_late = msm7x30_init_late, - .init_time = msm7x30_timer_init, -MACHINE_END - -MACHINE_START(MSM7X30_FFA, "QCT MSM7X30 FFA") - .atag_offset = 0x100, - .fixup = msm7x30_fixup, - .reserve = msm7x30_reserve, - .map_io = msm7x30_map_io, - .init_irq = msm7x30_init_irq, - .init_machine = msm7x30_init, - .init_late = msm7x30_init_late, - .init_time = msm7x30_timer_init, -MACHINE_END - -MACHINE_START(MSM7X30_FLUID, "QCT MSM7X30 FLUID") - .atag_offset = 0x100, - .fixup = msm7x30_fixup, - .reserve = msm7x30_reserve, - .map_io = msm7x30_map_io, - .init_irq = msm7x30_init_irq, - .init_machine = msm7x30_init, - .init_late = msm7x30_init_late, - .init_time = msm7x30_timer_init, -MACHINE_END diff --git a/arch/arm/mach-msm/board-qsd8x50.c b/arch/arm/mach-msm/board-qsd8x50.c deleted file mode 100644 index 4c74861..0000000 --- a/arch/arm/mach-msm/board-qsd8x50.c +++ /dev/null @@ -1,248 +0,0 @@ -/* Copyright (c) 2009-2011, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA - * 02110-1301, USA. - */ -#include <linux/gpio.h> -#include <linux/kernel.h> -#include <linux/irq.h> -#include <linux/platform_device.h> -#include <linux/delay.h> -#include <linux/usb/msm_hsusb.h> -#include <linux/err.h> -#include <linux/clkdev.h> - -#include <asm/mach-types.h> -#include <asm/mach/arch.h> -#include <asm/io.h> -#include <asm/setup.h> - -#include <mach/irqs.h> -#include <mach/sirc.h> -#include <mach/vreg.h> -#include <mach/clk.h> -#include <linux/platform_data/mmc-msm_sdcc.h> - -#include "devices.h" -#include "common.h" - -static const resource_size_t qsd8x50_surf_smc91x_base __initconst = 0x70000300; -static const unsigned qsd8x50_surf_smc91x_gpio __initconst = 156; - -/* Leave smc91x resources empty here, as we'll fill them in - * at run-time: they vary from board to board, and the true - * configuration won't be known until boot. - */ -static struct resource smc91x_resources[] = { - [0] = { - .flags = IORESOURCE_MEM, - }, - [1] = { - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device smc91x_device = { - .name = "smc91x", - .id = 0, - .num_resources = ARRAY_SIZE(smc91x_resources), - .resource = smc91x_resources, -}; - -static int __init msm_init_smc91x(void) -{ - if (machine_is_qsd8x50_surf()) { - smc91x_resources[0].start = qsd8x50_surf_smc91x_base; - smc91x_resources[0].end = qsd8x50_surf_smc91x_base + 0xff; - smc91x_resources[1].start = - gpio_to_irq(qsd8x50_surf_smc91x_gpio); - smc91x_resources[1].end = - gpio_to_irq(qsd8x50_surf_smc91x_gpio); - platform_device_register(&smc91x_device); - } - - return 0; -} -module_init(msm_init_smc91x); - -static int hsusb_phy_init_seq[] = { - 0x08, 0x31, /* Increase HS Driver Amplitude */ - 0x20, 0x32, /* Enable and set Pre-Emphasis Depth to 10% */ - -1 -}; - -static int hsusb_link_clk_reset(struct clk *link_clk, bool assert) -{ - int ret; - - if (assert) { - ret = clk_reset(link_clk, CLK_RESET_ASSERT); - if (ret) - pr_err("usb hs_clk assert failed\n"); - } else { - ret = clk_reset(link_clk, CLK_RESET_DEASSERT); - if (ret) - pr_err("usb hs_clk deassert failed\n"); - } - return ret; -} - -static int hsusb_phy_clk_reset(struct clk *phy_clk) -{ - int ret; - - ret = clk_reset(phy_clk, CLK_RESET_ASSERT); - if (ret) { - pr_err("usb phy clk assert failed\n"); - return ret; - } - usleep_range(10000, 12000); - ret = clk_reset(phy_clk, CLK_RESET_DEASSERT); - if (ret) - pr_err("usb phy clk deassert failed\n"); - return ret; -} - -static struct msm_otg_platform_data msm_otg_pdata = { - .phy_init_seq = hsusb_phy_init_seq, - .mode = USB_DR_MODE_PERIPHERAL, - .otg_control = OTG_PHY_CONTROL, - .link_clk_reset = hsusb_link_clk_reset, - .phy_clk_reset = hsusb_phy_clk_reset, -}; - -static struct platform_device *devices[] __initdata = { - &msm_clock_8x50, - &msm_device_gpio_8x50, - &msm_device_uart3, - &msm_device_smd, - &msm_device_otg, - &msm_device_hsusb, - &msm_device_hsusb_host, -}; - -static struct msm_mmc_gpio sdc1_gpio_cfg[] = { - {51, "sdc1_dat_3"}, - {52, "sdc1_dat_2"}, - {53, "sdc1_dat_1"}, - {54, "sdc1_dat_0"}, - {55, "sdc1_cmd"}, - {56, "sdc1_clk"} -}; - -static struct vreg *vreg_mmc; -static unsigned long vreg_sts; - -static uint32_t msm_sdcc_setup_power(struct device *dv, unsigned int vdd) -{ - int rc = 0; - struct platform_device *pdev; - - pdev = container_of(dv, struct platform_device, dev); - - if (vdd == 0) { - if (!vreg_sts) - return 0; - - clear_bit(pdev->id, &vreg_sts); - - if (!vreg_sts) { - rc = vreg_disable(vreg_mmc); - if (rc) - pr_err("vreg_mmc disable failed for slot " - "%d: %d\n", pdev->id, rc); - } - return 0; - } - - if (!vreg_sts) { - rc = vreg_set_level(vreg_mmc, 2900); - if (rc) - pr_err("vreg_mmc set level failed for slot %d: %d\n", - pdev->id, rc); - rc = vreg_enable(vreg_mmc); - if (rc) - pr_err("vreg_mmc enable failed for slot %d: %d\n", - pdev->id, rc); - } - set_bit(pdev->id, &vreg_sts); - return 0; -} - -static struct msm_mmc_gpio_data sdc1_gpio = { - .gpio = sdc1_gpio_cfg, - .size = ARRAY_SIZE(sdc1_gpio_cfg), -}; - -static struct msm_mmc_platform_data qsd8x50_sdc1_data = { - .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29, - .translate_vdd = msm_sdcc_setup_power, - .gpio_data = &sdc1_gpio, -}; - -static void __init qsd8x50_init_mmc(void) -{ - vreg_mmc = vreg_get(NULL, "gp5"); - - if (IS_ERR(vreg_mmc)) { - pr_err("vreg get for vreg_mmc failed (%ld)\n", - PTR_ERR(vreg_mmc)); - return; - } - - msm_add_sdcc(1, &qsd8x50_sdc1_data, 0, 0); -} - -static void __init qsd8x50_map_io(void) -{ - msm_map_qsd8x50_io(); -} - -static void __init qsd8x50_init_irq(void) -{ - msm_init_irq(); - msm_init_sirc(); -} - -static void __init qsd8x50_init(void) -{ - msm_device_otg.dev.platform_data = &msm_otg_pdata; - msm_device_hsusb.dev.parent = &msm_device_otg.dev; - msm_device_hsusb_host.dev.parent = &msm_device_otg.dev; - platform_add_devices(devices, ARRAY_SIZE(devices)); - qsd8x50_init_mmc(); -} - -static void __init qsd8x50_init_late(void) -{ - smd_debugfs_init(); -} - -MACHINE_START(QSD8X50_SURF, "QCT QSD8X50 SURF") - .atag_offset = 0x100, - .map_io = qsd8x50_map_io, - .init_irq = qsd8x50_init_irq, - .init_machine = qsd8x50_init, - .init_late = qsd8x50_init_late, - .init_time = qsd8x50_timer_init, -MACHINE_END - -MACHINE_START(QSD8X50A_ST1_5, "QCT QSD8X50A ST1.5") - .atag_offset = 0x100, - .map_io = qsd8x50_map_io, - .init_irq = qsd8x50_init_irq, - .init_machine = qsd8x50_init, - .init_late = qsd8x50_init_late, - .init_time = qsd8x50_timer_init, -MACHINE_END diff --git a/arch/arm/mach-msm/board-sapphire.c b/arch/arm/mach-msm/board-sapphire.c deleted file mode 100644 index e509679..0000000 --- a/arch/arm/mach-msm/board-sapphire.c +++ /dev/null @@ -1,114 +0,0 @@ -/* linux/arch/arm/mach-msm/board-sapphire.c - * Copyright (C) 2007-2009 HTC Corporation. - * Author: Thomas Tsai <thomas_tsai@htc.com> - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. -*/ -#include <linux/gpio.h> -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/platform_device.h> -#include <linux/input.h> -#include <linux/interrupt.h> -#include <linux/irq.h> -#include <linux/device.h> - -#include <linux/delay.h> - -#include <mach/hardware.h> -#include <asm/mach-types.h> -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/mach/flash.h> -#include <mach/vreg.h> - -#include <asm/io.h> -#include <asm/delay.h> -#include <asm/setup.h> - -#include <linux/mtd/nand.h> -#include <linux/mtd/partitions.h> -#include <linux/memblock.h> - -#include "gpio_chip.h" -#include "board-sapphire.h" -#include "proc_comm.h" -#include "devices.h" -#include "common.h" - -void msm_init_irq(void); -void msm_init_gpio(void); - -static struct platform_device *devices[] __initdata = { - &msm_device_smd, - &msm_device_dmov, - &msm_device_nand, - &msm_device_uart1, - &msm_device_uart3, -}; - -void msm_timer_init(void); - -static void __init sapphire_init_irq(void) -{ - msm_init_irq(); -} - -static void __init sapphire_init(void) -{ - platform_add_devices(devices, ARRAY_SIZE(devices)); -} - -static struct map_desc sapphire_io_desc[] __initdata = { - { - .virtual = SAPPHIRE_CPLD_BASE, - .pfn = __phys_to_pfn(SAPPHIRE_CPLD_START), - .length = SAPPHIRE_CPLD_SIZE, - .type = MT_DEVICE_NONSHARED - } -}; - -static void __init sapphire_fixup(struct tag *tags, char **cmdline) -{ - int smi_sz = parse_tag_smi((const struct tag *)tags); - - if (smi_sz == 32) { - memblock_add(PHYS_OFFSET, 84*SZ_1M); - } else if (smi_sz == 64) { - memblock_add(PHYS_OFFSET, 101*SZ_1M); - } else { - memblock_add(PHYS_OFFSET, 101*SZ_1M); - /* Give a default value when not get smi size */ - smi_sz = 64; - } -} - -static void __init sapphire_map_io(void) -{ - msm_map_common_io(); - iotable_init(sapphire_io_desc, ARRAY_SIZE(sapphire_io_desc)); - msm_clock_init(); -} - -static void __init sapphire_init_late(void) -{ - smd_debugfs_init(); -} - -MACHINE_START(SAPPHIRE, "sapphire") -/* Maintainer: Brian Swetland <swetland@google.com> */ - .atag_offset = 0x100, - .fixup = sapphire_fixup, - .map_io = sapphire_map_io, - .init_irq = sapphire_init_irq, - .init_machine = sapphire_init, - .init_late = sapphire_init_late, - .init_time = msm_timer_init, -MACHINE_END diff --git a/arch/arm/mach-msm/board-trout-gpio.c b/arch/arm/mach-msm/board-trout-gpio.c deleted file mode 100644 index 722ad63..0000000 --- a/arch/arm/mach-msm/board-trout-gpio.c +++ /dev/null @@ -1,233 +0,0 @@ -/* - * linux/arch/arm/mach-msm/gpio.c - * - * Copyright (C) 2005 HP Labs - * Copyright (C) 2008 Google, Inc. - * Copyright (C) 2009 Pavel Machek <pavel@ucw.cz> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#include <linux/kernel.h> -#include <linux/module.h> -#include <linux/io.h> -#include <linux/irq.h> -#include <linux/interrupt.h> -#include <linux/gpio.h> - -#include "board-trout.h" - -static uint8_t trout_int_mask[2] = { - [0] = 0xff, /* mask all interrupts */ - [1] = 0xff, -}; -static uint8_t trout_sleep_int_mask[] = { - [0] = 0xff, - [1] = 0xff, -}; - -struct msm_gpio_chip { - struct gpio_chip chip; - void __iomem *reg; /* Base of register bank */ - u8 shadow; -}; - -#define to_msm_gpio_chip(c) container_of(c, struct msm_gpio_chip, chip) - -static int msm_gpiolib_get(struct gpio_chip *chip, unsigned offset) -{ - struct msm_gpio_chip *msm_gpio = to_msm_gpio_chip(chip); - unsigned mask = 1 << offset; - - return !!(readb(msm_gpio->reg) & mask); -} - -static void msm_gpiolib_set(struct gpio_chip *chip, unsigned offset, int val) -{ - struct msm_gpio_chip *msm_gpio = to_msm_gpio_chip(chip); - unsigned mask = 1 << offset; - - if (val) - msm_gpio->shadow |= mask; - else - msm_gpio->shadow &= ~mask; - - writeb(msm_gpio->shadow, msm_gpio->reg); -} - -static int msm_gpiolib_direction_input(struct gpio_chip *chip, - unsigned offset) -{ - msm_gpiolib_set(chip, offset, 0); - return 0; -} - -static int msm_gpiolib_direction_output(struct gpio_chip *chip, - unsigned offset, int val) -{ - msm_gpiolib_set(chip, offset, val); - return 0; -} - -static int trout_gpio_to_irq(struct gpio_chip *chip, unsigned offset) -{ - return TROUT_GPIO_TO_INT(offset + chip->base); -} - -#define TROUT_GPIO_BANK(name, reg_num, base_gpio, shadow_val) \ - { \ - .chip = { \ - .label = name, \ - .direction_input = msm_gpiolib_direction_input,\ - .direction_output = msm_gpiolib_direction_output, \ - .get = msm_gpiolib_get, \ - .set = msm_gpiolib_set, \ - .to_irq = trout_gpio_to_irq, \ - .base = base_gpio, \ - .ngpio = 8, \ - }, \ - .reg = reg_num + TROUT_CPLD_BASE, \ - .shadow = shadow_val, \ - } - -static struct msm_gpio_chip msm_gpio_banks[] = { -#if defined(CONFIG_DEBUG_MSM_UART) && (CONFIG_DEBUG_UART_PHYS == 0xa9a00000) - /* H2W pins <-> UART1 */ - TROUT_GPIO_BANK("MISC2", 0x00, TROUT_GPIO_MISC2_BASE, 0x40), -#else - /* H2W pins <-> UART3, Bluetooth <-> UART1 */ - TROUT_GPIO_BANK("MISC2", 0x00, TROUT_GPIO_MISC2_BASE, 0x80), -#endif - /* I2C pull */ - TROUT_GPIO_BANK("MISC3", 0x02, TROUT_GPIO_MISC3_BASE, 0x04), - TROUT_GPIO_BANK("MISC4", 0x04, TROUT_GPIO_MISC4_BASE, 0), - /* mmdi 32k en */ - TROUT_GPIO_BANK("MISC5", 0x06, TROUT_GPIO_MISC5_BASE, 0x04), - TROUT_GPIO_BANK("INT2", 0x08, TROUT_GPIO_INT2_BASE, 0), - TROUT_GPIO_BANK("MISC1", 0x0a, TROUT_GPIO_MISC1_BASE, 0), - TROUT_GPIO_BANK("VIRTUAL", 0x12, TROUT_GPIO_VIRTUAL_BASE, 0), -}; - -static void trout_gpio_irq_ack(struct irq_data *d) -{ - int bank = TROUT_INT_TO_BANK(d->irq); - uint8_t mask = TROUT_INT_TO_MASK(d->irq); - int reg = TROUT_BANK_TO_STAT_REG(bank); - /*printk(KERN_INFO "trout_gpio_irq_ack irq %d\n", d->irq);*/ - writeb(mask, TROUT_CPLD_BASE + reg); -} - -static void trout_gpio_irq_mask(struct irq_data *d) -{ - unsigned long flags; - uint8_t reg_val; - int bank = TROUT_INT_TO_BANK(d->irq); - uint8_t mask = TROUT_INT_TO_MASK(d->irq); - int reg = TROUT_BANK_TO_MASK_REG(bank); - - local_irq_save(flags); - reg_val = trout_int_mask[bank] |= mask; - /*printk(KERN_INFO "trout_gpio_irq_mask irq %d => %d:%02x\n", - d->irq, bank, reg_val);*/ - writeb(reg_val, TROUT_CPLD_BASE + reg); - local_irq_restore(flags); -} - -static void trout_gpio_irq_unmask(struct irq_data *d) -{ - unsigned long flags; - uint8_t reg_val; - int bank = TROUT_INT_TO_BANK(d->irq); - uint8_t mask = TROUT_INT_TO_MASK(d->irq); - int reg = TROUT_BANK_TO_MASK_REG(bank); - - local_irq_save(flags); - reg_val = trout_int_mask[bank] &= ~mask; - /*printk(KERN_INFO "trout_gpio_irq_unmask irq %d => %d:%02x\n", - d->irq, bank, reg_val);*/ - writeb(reg_val, TROUT_CPLD_BASE + reg); - local_irq_restore(flags); -} - -int trout_gpio_irq_set_wake(struct irq_data *d, unsigned int on) -{ - unsigned long flags; - int bank = TROUT_INT_TO_BANK(d->irq); - uint8_t mask = TROUT_INT_TO_MASK(d->irq); - - local_irq_save(flags); - if(on) - trout_sleep_int_mask[bank] &= ~mask; - else - trout_sleep_int_mask[bank] |= mask; - local_irq_restore(flags); - return 0; -} - -static void trout_gpio_irq_handler(unsigned int irq, struct irq_desc *desc) -{ - int j, m; - unsigned v; - int bank; - int stat_reg; - int int_base = TROUT_INT_START; - uint8_t int_mask; - - for (bank = 0; bank < 2; bank++) { - stat_reg = TROUT_BANK_TO_STAT_REG(bank); - v = readb(TROUT_CPLD_BASE + stat_reg); - int_mask = trout_int_mask[bank]; - if (v & int_mask) { - writeb(v & int_mask, TROUT_CPLD_BASE + stat_reg); - printk(KERN_ERR "trout_gpio_irq_handler: got masked " - "interrupt: %d:%02x\n", bank, v & int_mask); - } - v &= ~int_mask; - while (v) { - m = v & -v; - j = fls(m) - 1; - /*printk(KERN_INFO "msm_gpio_irq_handler %d:%02x %02x b" - "it %d irq %d\n", bank, v, m, j, int_base + j);*/ - v &= ~m; - generic_handle_irq(int_base + j); - } - int_base += TROUT_INT_BANK0_COUNT; - } - desc->irq_data.chip->irq_ack(&desc->irq_data); -} - -static struct irq_chip trout_gpio_irq_chip = { - .name = "troutgpio", - .irq_ack = trout_gpio_irq_ack, - .irq_mask = trout_gpio_irq_mask, - .irq_unmask = trout_gpio_irq_unmask, - .irq_set_wake = trout_gpio_irq_set_wake, -}; - -/* - * Called from the processor-specific init to enable GPIO pin support. - */ -int __init trout_init_gpio(void) -{ - int i; - for(i = TROUT_INT_START; i <= TROUT_INT_END; i++) { - irq_set_chip_and_handler(i, &trout_gpio_irq_chip, - handle_edge_irq); - set_irq_flags(i, IRQF_VALID); - } - - for (i = 0; i < ARRAY_SIZE(msm_gpio_banks); i++) - gpiochip_add(&msm_gpio_banks[i].chip); - - irq_set_irq_type(MSM_GPIO_TO_INT(17), IRQF_TRIGGER_HIGH); - irq_set_chained_handler(MSM_GPIO_TO_INT(17), trout_gpio_irq_handler); - irq_set_irq_wake(MSM_GPIO_TO_INT(17), 1); - - return 0; -} - -postcore_initcall(trout_init_gpio); - diff --git a/arch/arm/mach-msm/board-trout-mmc.c b/arch/arm/mach-msm/board-trout-mmc.c deleted file mode 100644 index 3723e55..0000000 --- a/arch/arm/mach-msm/board-trout-mmc.c +++ /dev/null @@ -1,185 +0,0 @@ -/* linux/arch/arm/mach-msm/board-trout-mmc.c -** Author: Brian Swetland <swetland@google.com> -*/ -#include <linux/gpio.h> -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/platform_device.h> -#include <linux/delay.h> -#include <linux/mmc/host.h> -#include <linux/mmc/sdio_ids.h> -#include <linux/err.h> -#include <linux/debugfs.h> - -#include <asm/io.h> - -#include <mach/vreg.h> - -#include <linux/platform_data/mmc-msm_sdcc.h> - -#include "devices.h" - -#include "board-trout.h" - -#include "proc_comm.h" - -#define DEBUG_SDSLOT_VDD 1 - -/* ---- COMMON ---- */ -static void config_gpio_table(uint32_t *table, int len) -{ - int n; - unsigned id; - for(n = 0; n < len; n++) { - id = table[n]; - msm_proc_comm(PCOM_RPC_GPIO_TLMM_CONFIG_EX, &id, 0); - } -} - -/* ---- SDCARD ---- */ - -static uint32_t sdcard_on_gpio_table[] = { - PCOM_GPIO_CFG(62, 2, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_8MA), /* CLK */ - PCOM_GPIO_CFG(63, 2, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), /* CMD */ - PCOM_GPIO_CFG(64, 2, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), /* DAT3 */ - PCOM_GPIO_CFG(65, 2, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA), /* DAT2 */ - PCOM_GPIO_CFG(66, 2, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_4MA), /* DAT1 */ - PCOM_GPIO_CFG(67, 2, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_4MA), /* DAT0 */ -}; - -static uint32_t sdcard_off_gpio_table[] = { - PCOM_GPIO_CFG(62, 0, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_4MA), /* CLK */ - PCOM_GPIO_CFG(63, 0, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_4MA), /* CMD */ - PCOM_GPIO_CFG(64, 0, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_4MA), /* DAT3 */ - PCOM_GPIO_CFG(65, 0, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_4MA), /* DAT2 */ - PCOM_GPIO_CFG(66, 0, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_4MA), /* DAT1 */ - PCOM_GPIO_CFG(67, 0, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_4MA), /* DAT0 */ -}; - -static uint opt_disable_sdcard; - -static int __init trout_disablesdcard_setup(char *str) -{ - int cal = simple_strtol(str, NULL, 0); - - opt_disable_sdcard = cal; - return 1; -} - -__setup("board_trout.disable_sdcard=", trout_disablesdcard_setup); - -static struct vreg *vreg_sdslot; /* SD slot power */ - -struct mmc_vdd_xlat { - int mask; - int level; -}; - -static struct mmc_vdd_xlat mmc_vdd_table[] = { - { MMC_VDD_165_195, 1800 }, - { MMC_VDD_20_21, 2050 }, - { MMC_VDD_21_22, 2150 }, - { MMC_VDD_22_23, 2250 }, - { MMC_VDD_23_24, 2350 }, - { MMC_VDD_24_25, 2450 }, - { MMC_VDD_25_26, 2550 }, - { MMC_VDD_26_27, 2650 }, - { MMC_VDD_27_28, 2750 }, - { MMC_VDD_28_29, 2850 }, - { MMC_VDD_29_30, 2950 }, -}; - -static unsigned int sdslot_vdd = 0xffffffff; -static unsigned int sdslot_vreg_enabled; - -static uint32_t trout_sdslot_switchvdd(struct device *dev, unsigned int vdd) -{ - int i, rc; - - BUG_ON(!vreg_sdslot); - - if (vdd == sdslot_vdd) - return 0; - - sdslot_vdd = vdd; - - if (vdd == 0) { -#if DEBUG_SDSLOT_VDD - printk("%s: Disabling SD slot power\n", __func__); -#endif - config_gpio_table(sdcard_off_gpio_table, - ARRAY_SIZE(sdcard_off_gpio_table)); - vreg_disable(vreg_sdslot); - sdslot_vreg_enabled = 0; - return 0; - } - - if (!sdslot_vreg_enabled) { - rc = vreg_enable(vreg_sdslot); - if (rc) { - printk(KERN_ERR "%s: Error enabling vreg (%d)\n", - __func__, rc); - } - config_gpio_table(sdcard_on_gpio_table, - ARRAY_SIZE(sdcard_on_gpio_table)); - sdslot_vreg_enabled = 1; - } - - for (i = 0; i < ARRAY_SIZE(mmc_vdd_table); i++) { - if (mmc_vdd_table[i].mask == (1 << vdd)) { -#if DEBUG_SDSLOT_VDD - printk("%s: Setting level to %u\n", - __func__, mmc_vdd_table[i].level); -#endif - rc = vreg_set_level(vreg_sdslot, - mmc_vdd_table[i].level); - if (rc) { - printk(KERN_ERR - "%s: Error setting vreg level (%d)\n", - __func__, rc); - } - return 0; - } - } - - printk(KERN_ERR "%s: Invalid VDD %d specified\n", __func__, vdd); - return 0; -} - -static unsigned int trout_sdslot_status(struct device *dev) -{ - unsigned int status; - - status = (unsigned int) gpio_get_value(TROUT_GPIO_SDMC_CD_N); - return (!status); -} - -#define TROUT_MMC_VDD MMC_VDD_165_195 | MMC_VDD_20_21 | MMC_VDD_21_22 \ - | MMC_VDD_22_23 | MMC_VDD_23_24 | MMC_VDD_24_25 \ - | MMC_VDD_25_26 | MMC_VDD_26_27 | MMC_VDD_27_28 \ - | MMC_VDD_28_29 | MMC_VDD_29_30 - -static struct msm_mmc_platform_data trout_sdslot_data = { - .ocr_mask = TROUT_MMC_VDD, - .status = trout_sdslot_status, - .translate_vdd = trout_sdslot_switchvdd, -}; - -int __init trout_init_mmc(unsigned int sys_rev) -{ - sdslot_vreg_enabled = 0; - - vreg_sdslot = vreg_get(0, "gp6"); - if (IS_ERR(vreg_sdslot)) - return PTR_ERR(vreg_sdslot); - - irq_set_irq_wake(TROUT_GPIO_TO_INT(TROUT_GPIO_SDMC_CD_N), 1); - - if (!opt_disable_sdcard) - msm_add_sdcc(2, &trout_sdslot_data, - TROUT_GPIO_TO_INT(TROUT_GPIO_SDMC_CD_N), 0); - else - printk(KERN_INFO "trout: SD-Card interface disabled\n"); - return 0; -} - diff --git a/arch/arm/mach-msm/board-trout-panel.c b/arch/arm/mach-msm/board-trout-panel.c deleted file mode 100644 index 77b0a26..0000000 --- a/arch/arm/mach-msm/board-trout-panel.c +++ /dev/null @@ -1,292 +0,0 @@ -/* linux/arch/arm/mach-msm/board-trout-mddi.c -** Author: Brian Swetland <swetland@google.com> -*/ -#include <linux/gpio.h> -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/platform_device.h> -#include <linux/delay.h> -#include <linux/leds.h> -#include <linux/err.h> - -#include <asm/io.h> -#include <asm/mach-types.h> -#include <asm/system_info.h> - -#include <linux/platform_data/video-msm_fb.h> -#include <mach/vreg.h> - -#include "board-trout.h" -#include "proc_comm.h" -#include "clock-pcom.h" -#include "devices.h" - -#define TROUT_DEFAULT_BACKLIGHT_BRIGHTNESS 255 - -#define MDDI_CLIENT_CORE_BASE 0x108000 -#define LCD_CONTROL_BLOCK_BASE 0x110000 -#define SPI_BLOCK_BASE 0x120000 -#define I2C_BLOCK_BASE 0x130000 -#define PWM_BLOCK_BASE 0x140000 -#define GPIO_BLOCK_BASE 0x150000 -#define SYSTEM_BLOCK1_BASE 0x160000 -#define SYSTEM_BLOCK2_BASE 0x170000 - - -#define DPSUS (MDDI_CLIENT_CORE_BASE|0x24) -#define SYSCLKENA (MDDI_CLIENT_CORE_BASE|0x2C) -#define PWM0OFF (PWM_BLOCK_BASE|0x1C) - -#define V_VDDE2E_VDD2_GPIO 0 -#define MDDI_RST_N 82 - -#define MDDICAP0 (MDDI_CLIENT_CORE_BASE|0x00) -#define MDDICAP1 (MDDI_CLIENT_CORE_BASE|0x04) -#define MDDICAP2 (MDDI_CLIENT_CORE_BASE|0x08) -#define MDDICAP3 (MDDI_CLIENT_CORE_BASE|0x0C) -#define MDCAPCHG (MDDI_CLIENT_CORE_BASE|0x10) -#define MDCRCERC (MDDI_CLIENT_CORE_BASE|0x14) -#define TTBUSSEL (MDDI_CLIENT_CORE_BASE|0x18) -#define DPSET0 (MDDI_CLIENT_CORE_BASE|0x1C) -#define DPSET1 (MDDI_CLIENT_CORE_BASE|0x20) -#define DPSUS (MDDI_CLIENT_CORE_BASE|0x24) -#define DPRUN (MDDI_CLIENT_CORE_BASE|0x28) -#define SYSCKENA (MDDI_CLIENT_CORE_BASE|0x2C) -#define TESTMODE (MDDI_CLIENT_CORE_BASE|0x30) -#define FIFOMONI (MDDI_CLIENT_CORE_BASE|0x34) -#define INTMONI (MDDI_CLIENT_CORE_BASE|0x38) -#define MDIOBIST (MDDI_CLIENT_CORE_BASE|0x3C) -#define MDIOPSET (MDDI_CLIENT_CORE_BASE|0x40) -#define BITMAP0 (MDDI_CLIENT_CORE_BASE|0x44) -#define BITMAP1 (MDDI_CLIENT_CORE_BASE|0x48) -#define BITMAP2 (MDDI_CLIENT_CORE_BASE|0x4C) -#define BITMAP3 (MDDI_CLIENT_CORE_BASE|0x50) -#define BITMAP4 (MDDI_CLIENT_CORE_BASE|0x54) - -#define SRST (LCD_CONTROL_BLOCK_BASE|0x00) -#define PORT_ENB (LCD_CONTROL_BLOCK_BASE|0x04) -#define START (LCD_CONTROL_BLOCK_BASE|0x08) -#define PORT (LCD_CONTROL_BLOCK_BASE|0x0C) -#define CMN (LCD_CONTROL_BLOCK_BASE|0x10) -#define GAMMA (LCD_CONTROL_BLOCK_BASE|0x14) -#define INTFLG (LCD_CONTROL_BLOCK_BASE|0x18) -#define INTMSK (LCD_CONTROL_BLOCK_BASE|0x1C) -#define MPLFBUF (LCD_CONTROL_BLOCK_BASE|0x20) -#define HDE_LEFT (LCD_CONTROL_BLOCK_BASE|0x24) -#define VDE_TOP (LCD_CONTROL_BLOCK_BASE|0x28) -#define PXL (LCD_CONTROL_BLOCK_BASE|0x30) -#define HCYCLE (LCD_CONTROL_BLOCK_BASE|0x34) -#define HSW (LCD_CONTROL_BLOCK_BASE|0x38) -#define HDE_START (LCD_CONTROL_BLOCK_BASE|0x3C) -#define HDE_SIZE (LCD_CONTROL_BLOCK_BASE|0x40) -#define VCYCLE (LCD_CONTROL_BLOCK_BASE|0x44) -#define VSW (LCD_CONTROL_BLOCK_BASE|0x48) -#define VDE_START (LCD_CONTROL_BLOCK_BASE|0x4C) -#define VDE_SIZE (LCD_CONTROL_BLOCK_BASE|0x50) -#define WAKEUP (LCD_CONTROL_BLOCK_BASE|0x54) -#define WSYN_DLY (LCD_CONTROL_BLOCK_BASE|0x58) -#define REGENB (LCD_CONTROL_BLOCK_BASE|0x5C) -#define VSYNIF (LCD_CONTROL_BLOCK_BASE|0x60) -#define WRSTB (LCD_CONTROL_BLOCK_BASE|0x64) -#define RDSTB (LCD_CONTROL_BLOCK_BASE|0x68) -#define ASY_DATA (LCD_CONTROL_BLOCK_BASE|0x6C) -#define ASY_DATB (LCD_CONTROL_BLOCK_BASE|0x70) -#define ASY_DATC (LCD_CONTROL_BLOCK_BASE|0x74) -#define ASY_DATD (LCD_CONTROL_BLOCK_BASE|0x78) -#define ASY_DATE (LCD_CONTROL_BLOCK_BASE|0x7C) -#define ASY_DATF (LCD_CONTROL_BLOCK_BASE|0x80) -#define ASY_DATG (LCD_CONTROL_BLOCK_BASE|0x84) -#define ASY_DATH (LCD_CONTROL_BLOCK_BASE|0x88) -#define ASY_CMDSET (LCD_CONTROL_BLOCK_BASE|0x8C) - -#define SSICTL (SPI_BLOCK_BASE|0x00) -#define SSITIME (SPI_BLOCK_BASE|0x04) -#define SSITX (SPI_BLOCK_BASE|0x08) -#define SSIRX (SPI_BLOCK_BASE|0x0C) -#define SSIINTC (SPI_BLOCK_BASE|0x10) -#define SSIINTS (SPI_BLOCK_BASE|0x14) -#define SSIDBG1 (SPI_BLOCK_BASE|0x18) -#define SSIDBG2 (SPI_BLOCK_BASE|0x1C) -#define SSIID (SPI_BLOCK_BASE|0x20) - -#define WKREQ (SYSTEM_BLOCK1_BASE|0x00) -#define CLKENB (SYSTEM_BLOCK1_BASE|0x04) -#define DRAMPWR (SYSTEM_BLOCK1_BASE|0x08) -#define INTMASK (SYSTEM_BLOCK1_BASE|0x0C) -#define GPIOSEL (SYSTEM_BLOCK2_BASE|0x00) - -#define GPIODATA (GPIO_BLOCK_BASE|0x00) -#define GPIODIR (GPIO_BLOCK_BASE|0x04) -#define GPIOIS (GPIO_BLOCK_BASE|0x08) -#define GPIOIBE (GPIO_BLOCK_BASE|0x0C) -#define GPIOIEV (GPIO_BLOCK_BASE|0x10) -#define GPIOIE (GPIO_BLOCK_BASE|0x14) -#define GPIORIS (GPIO_BLOCK_BASE|0x18) -#define GPIOMIS (GPIO_BLOCK_BASE|0x1C) -#define GPIOIC (GPIO_BLOCK_BASE|0x20) -#define GPIOOMS (GPIO_BLOCK_BASE|0x24) -#define GPIOPC (GPIO_BLOCK_BASE|0x28) -#define GPIOID (GPIO_BLOCK_BASE|0x30) - -#define SPI_WRITE(reg, val) \ - { SSITX, 0x00010000 | (((reg) & 0xff) << 8) | ((val) & 0xff) }, \ - { 0, 5 }, - -#define SPI_WRITE1(reg) \ - { SSITX, (reg) & 0xff }, \ - { 0, 5 }, - -struct mddi_table { - uint32_t reg; - uint32_t value; -}; -static struct mddi_table mddi_toshiba_init_table[] = { - { DPSET0, 0x09e90046 }, - { DPSET1, 0x00000118 }, - { DPSUS, 0x00000000 }, - { DPRUN, 0x00000001 }, - { 1, 14 }, /* msleep 14 */ - { SYSCKENA, 0x00000001 }, - { CLKENB, 0x0000A1EF }, /* # SYS.CLKENB # Enable clocks for each module (without DCLK , i2cCLK) */ - - { GPIODATA, 0x02000200 }, /* # GPI .GPIODATA # GPIO2(RESET_LCD_N) set to 0 , GPIO3(eDRAM_Power) set to 0 */ - { GPIODIR, 0x000030D }, /* 24D # GPI .GPIODIR # Select direction of GPIO port (0,2,3,6,9 output) */ - { GPIOSEL, 0/*0x00000173*/}, /* # SYS.GPIOSEL # GPIO port multiplexing control */ - { GPIOPC, 0x03C300C0 }, /* # GPI .GPIOPC # GPIO2,3 PD cut */ - { WKREQ, 0x00000000 }, /* # SYS.WKREQ # Wake-up request event is VSYNC alignment */ - - { GPIOIBE, 0x000003FF }, - { GPIOIS, 0x00000000 }, - { GPIOIC, 0x000003FF }, - { GPIOIE, 0x00000000 }, - - { GPIODATA, 0x00040004 }, /* # GPI .GPIODATA # eDRAM VD supply */ - { 1, 1 }, /* msleep 1 */ - { GPIODATA, 0x02040004 }, /* # GPI .GPIODATA # eDRAM VD supply */ - { DRAMPWR, 0x00000001 }, /* eDRAM power */ -}; - -#define GPIOSEL_VWAKEINT (1U << 0) -#define INTMASK_VWAKEOUT (1U << 0) - - -static int trout_new_backlight = 1; -static struct vreg *vreg_mddi_1v5; -static struct vreg *vreg_lcm_2v85; - -static void trout_process_mddi_table(struct msm_mddi_client_data *client_data, - struct mddi_table *table, size_t count) -{ - int i; - for (i = 0; i < count; i++) { - uint32_t reg = table[i].reg; - uint32_t value = table[i].value; - - if (reg == 0) - udelay(value); - else if (reg == 1) - msleep(value); - else - client_data->remote_write(client_data, value, reg); - } -} - -static int trout_mddi_toshiba_client_init( - struct msm_mddi_bridge_platform_data *bridge_data, - struct msm_mddi_client_data *client_data) -{ - int panel_id; - - client_data->auto_hibernate(client_data, 0); - trout_process_mddi_table(client_data, mddi_toshiba_init_table, - ARRAY_SIZE(mddi_toshiba_init_table)); - client_data->auto_hibernate(client_data, 1); - panel_id = (client_data->remote_read(client_data, GPIODATA) >> 4) & 3; - if (panel_id > 1) { - printk(KERN_WARNING "unknown panel id at mddi_enable\n"); - return -1; - } - return 0; -} - -static int trout_mddi_toshiba_client_uninit( - struct msm_mddi_bridge_platform_data *bridge_data, - struct msm_mddi_client_data *client_data) -{ - return 0; -} - -static struct resource resources_msm_fb[] = { - { - .start = MSM_FB_BASE, - .end = MSM_FB_BASE + MSM_FB_SIZE, - .flags = IORESOURCE_MEM, - }, -}; - -struct msm_mddi_bridge_platform_data toshiba_client_data = { - .init = trout_mddi_toshiba_client_init, - .uninit = trout_mddi_toshiba_client_uninit, - .fb_data = { - .xres = 320, - .yres = 480, - .width = 45, - .height = 67, - .output_format = 0, - }, -}; - -static struct msm_mddi_platform_data mddi_pdata = { - .clk_rate = 122880000, - .fb_resource = resources_msm_fb, - .num_clients = 1, - .client_platform_data = { - { - .product_id = (0xd263 << 16 | 0), - .name = "mddi_c_d263_0000", - .id = 0, - .client_data = &toshiba_client_data, - .clk_rate = 0, - }, - }, -}; - -int __init trout_init_panel(void) -{ - int rc; - - if (!machine_is_trout()) - return 0; - vreg_mddi_1v5 = vreg_get(0, "gp2"); - if (IS_ERR(vreg_mddi_1v5)) - return PTR_ERR(vreg_mddi_1v5); - vreg_lcm_2v85 = vreg_get(0, "gp4"); - if (IS_ERR(vreg_lcm_2v85)) - return PTR_ERR(vreg_lcm_2v85); - - trout_new_backlight = system_rev >= 5; - if (trout_new_backlight) { - uint32_t config = PCOM_GPIO_CFG(27, 0, GPIO_OUTPUT, - GPIO_NO_PULL, GPIO_8MA); - msm_proc_comm(PCOM_RPC_GPIO_TLMM_CONFIG_EX, &config, 0); - } else { - uint32_t config = PCOM_GPIO_CFG(27, 1, GPIO_OUTPUT, - GPIO_NO_PULL, GPIO_8MA); - uint32_t id = P_GP_CLK; - uint32_t rate = 19200000; - - msm_proc_comm(PCOM_RPC_GPIO_TLMM_CONFIG_EX, &config, 0); - - msm_proc_comm(PCOM_CLKCTL_RPC_SET_RATE, &id, &rate); - if (id < 0) - pr_err("trout_init_panel: set clock rate failed\n"); - } - - rc = platform_device_register(&msm_device_mdp); - if (rc) - return rc; - msm_device_mddi0.dev.platform_data = &mddi_pdata; - return platform_device_register(&msm_device_mddi0); -} - -device_initcall(trout_init_panel); diff --git a/arch/arm/mach-msm/board-trout.c b/arch/arm/mach-msm/board-trout.c deleted file mode 100644 index ba3edd3..0000000 --- a/arch/arm/mach-msm/board-trout.c +++ /dev/null @@ -1,111 +0,0 @@ -/* linux/arch/arm/mach-msm/board-trout.c - * - * Copyright (C) 2009 Google, Inc. - * Author: Brian Swetland <swetland@google.com> - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ -#define pr_fmt(fmt) "%s: " fmt, __func__ - -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/platform_device.h> -#include <linux/clkdev.h> -#include <linux/memblock.h> - -#include <asm/system_info.h> -#include <asm/mach-types.h> -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/setup.h> - -#include <mach/hardware.h> -#include <mach/msm_iomap.h> - -#include "devices.h" -#include "board-trout.h" -#include "common.h" - -extern int trout_init_mmc(unsigned int); - -static struct platform_device *devices[] __initdata = { - &msm_clock_7x01a, - &msm_device_gpio_7201, - &msm_device_uart3, - &msm_device_smd, - &msm_device_nand, - &msm_device_hsusb, - &msm_device_i2c, -}; - -static void __init trout_init_early(void) -{ - arch_ioremap_caller = __msm_ioremap_caller; -} - -static void __init trout_init_irq(void) -{ - msm_init_irq(); -} - -static void __init trout_fixup(struct tag *tags, char **cmdline) -{ - memblock_add(PHYS_OFFSET, 101*SZ_1M); -} - -static void __init trout_init(void) -{ - int rc; - - platform_add_devices(devices, ARRAY_SIZE(devices)); - - if (IS_ENABLED(CONFIG_MMC)) { - rc = trout_init_mmc(system_rev); - if (rc) - pr_crit("MMC init failure (%d)\n", rc); - } -} - -static struct map_desc trout_io_desc[] __initdata = { - { - .virtual = (unsigned long)TROUT_CPLD_BASE, - .pfn = __phys_to_pfn(TROUT_CPLD_START), - .length = TROUT_CPLD_SIZE, - .type = MT_DEVICE_NONSHARED - } -}; - -static void __init trout_map_io(void) -{ - msm_map_common_io(); - iotable_init(trout_io_desc, ARRAY_SIZE(trout_io_desc)); - -#if defined(CONFIG_DEBUG_MSM_UART) && (CONFIG_DEBUG_UART_PHYS == 0xa9c00000) - /* route UART3 to the "H2W" extended usb connector */ - writeb(0x80, TROUT_CPLD_BASE + 0x00); -#endif -} - -static void __init trout_init_late(void) -{ - smd_debugfs_init(); -} - -MACHINE_START(TROUT, "HTC Dream") - .atag_offset = 0x100, - .fixup = trout_fixup, - .map_io = trout_map_io, - .init_early = trout_init_early, - .init_irq = trout_init_irq, - .init_machine = trout_init, - .init_late = trout_init_late, - .init_time = msm7x01_timer_init, -MACHINE_END diff --git a/arch/arm/mach-msm/board-trout.h b/arch/arm/mach-msm/board-trout.h deleted file mode 100644 index adb757a..0000000 --- a/arch/arm/mach-msm/board-trout.h +++ /dev/null @@ -1,162 +0,0 @@ -/* linux/arch/arm/mach-msm/board-trout.h -** Author: Brian Swetland <swetland@google.com> -*/ -#ifndef __ARCH_ARM_MACH_MSM_BOARD_TROUT_H -#define __ARCH_ARM_MACH_MSM_BOARD_TROUT_H - -#include "common.h" - -#define MSM_SMI_BASE 0x00000000 -#define MSM_SMI_SIZE 0x00800000 - -#define MSM_EBI_BASE 0x10000000 -#define MSM_EBI_SIZE 0x06e00000 - -#define MSM_PMEM_GPU0_BASE 0x00000000 -#define MSM_PMEM_GPU0_SIZE 0x00700000 - -#define MSM_PMEM_MDP_BASE 0x02000000 -#define MSM_PMEM_MDP_SIZE 0x00800000 - -#define MSM_PMEM_ADSP_BASE 0x02800000 -#define MSM_PMEM_ADSP_SIZE 0x00800000 - -#define MSM_PMEM_CAMERA_BASE 0x03000000 -#define MSM_PMEM_CAMERA_SIZE 0x00800000 - -#define MSM_FB_BASE 0x03800000 -#define MSM_FB_SIZE 0x00100000 - -#define MSM_LINUX_BASE MSM_EBI_BASE -#define MSM_LINUX_SIZE 0x06500000 - -#define MSM_PMEM_GPU1_SIZE 0x800000 -#define MSM_PMEM_GPU1_BASE (MSM_RAM_CONSOLE_BASE - MSM_PMEM_GPU1_SIZE) - -#define MSM_RAM_CONSOLE_BASE (MSM_EBI_BASE + 0x6d00000) -#define MSM_RAM_CONSOLE_SIZE (128 * SZ_1K) - -#if (MSM_FB_BASE + MSM_FB_SIZE) >= (MSM_PMEM_GPU1_BASE) -#error invalid memory map -#endif - -#define DECLARE_MSM_IOMAP -#include <mach/msm_iomap.h> - -#define TROUT_4_BALL_UP_0 1 -#define TROUT_4_BALL_LEFT_0 18 -#define TROUT_4_BALL_DOWN_0 57 -#define TROUT_4_BALL_RIGHT_0 91 - -#define TROUT_5_BALL_UP_0 94 -#define TROUT_5_BALL_LEFT_0 18 -#define TROUT_5_BALL_DOWN_0 90 -#define TROUT_5_BALL_RIGHT_0 19 - -#define TROUT_POWER_KEY 20 - -#define TROUT_4_TP_LS_EN 19 -#define TROUT_5_TP_LS_EN 1 - -#define TROUT_CPLD_BASE IOMEM(0xE8100000) -#define TROUT_CPLD_START 0x98000000 -#define TROUT_CPLD_SIZE SZ_4K - -#define TROUT_GPIO_CABLE_IN1 (83) -#define TROUT_GPIO_CABLE_IN2 (49) - -#define TROUT_GPIO_START (128) - -#define TROUT_GPIO_INT_MASK0_REG (0x0c) -#define TROUT_GPIO_INT_STAT0_REG (0x0e) -#define TROUT_GPIO_INT_MASK1_REG (0x14) -#define TROUT_GPIO_INT_STAT1_REG (0x10) - -#define TROUT_GPIO_HAPTIC_PWM (28) -#define TROUT_GPIO_PS_HOLD (25) - -#define TROUT_GPIO_MISC2_BASE (TROUT_GPIO_START + 0x00) -#define TROUT_GPIO_MISC3_BASE (TROUT_GPIO_START + 0x08) -#define TROUT_GPIO_MISC4_BASE (TROUT_GPIO_START + 0x10) -#define TROUT_GPIO_MISC5_BASE (TROUT_GPIO_START + 0x18) -#define TROUT_GPIO_INT2_BASE (TROUT_GPIO_START + 0x20) -#define TROUT_GPIO_MISC1_BASE (TROUT_GPIO_START + 0x28) -#define TROUT_GPIO_VIRTUAL_BASE (TROUT_GPIO_START + 0x30) -#define TROUT_GPIO_INT5_BASE (TROUT_GPIO_START + 0x48) - -#define TROUT_GPIO_CHARGER_EN (TROUT_GPIO_MISC2_BASE + 0) -#define TROUT_GPIO_ISET (TROUT_GPIO_MISC2_BASE + 1) -#define TROUT_GPIO_H2W_DAT_DIR (TROUT_GPIO_MISC2_BASE + 2) -#define TROUT_GPIO_H2W_CLK_DIR (TROUT_GPIO_MISC2_BASE + 3) -#define TROUT_GPIO_H2W_DAT_GPO (TROUT_GPIO_MISC2_BASE + 4) -#define TROUT_GPIO_H2W_CLK_GPO (TROUT_GPIO_MISC2_BASE + 5) -#define TROUT_GPIO_H2W_SEL0 (TROUT_GPIO_MISC2_BASE + 6) -#define TROUT_GPIO_H2W_SEL1 (TROUT_GPIO_MISC2_BASE + 7) - -#define TROUT_GPIO_SPOTLIGHT_EN (TROUT_GPIO_MISC3_BASE + 0) -#define TROUT_GPIO_FLASH_EN (TROUT_GPIO_MISC3_BASE + 1) -#define TROUT_GPIO_I2C_PULL (TROUT_GPIO_MISC3_BASE + 2) -#define TROUT_GPIO_TP_I2C_PULL (TROUT_GPIO_MISC3_BASE + 3) -#define TROUT_GPIO_TP_EN (TROUT_GPIO_MISC3_BASE + 4) -#define TROUT_GPIO_JOG_EN (TROUT_GPIO_MISC3_BASE + 5) -#define TROUT_GPIO_UI_LED_EN (TROUT_GPIO_MISC3_BASE + 6) -#define TROUT_GPIO_QTKEY_LED_EN (TROUT_GPIO_MISC3_BASE + 7) - -#define TROUT_GPIO_VCM_PWDN (TROUT_GPIO_MISC4_BASE + 0) -#define TROUT_GPIO_USB_H2W_SW (TROUT_GPIO_MISC4_BASE + 1) -#define TROUT_GPIO_COMPASS_RST_N (TROUT_GPIO_MISC4_BASE + 2) -#define TROUT_GPIO_HAPTIC_EN_UP (TROUT_GPIO_MISC4_BASE + 3) -#define TROUT_GPIO_HAPTIC_EN_MAIN (TROUT_GPIO_MISC4_BASE + 4) -#define TROUT_GPIO_USB_PHY_RST_N (TROUT_GPIO_MISC4_BASE + 5) -#define TROUT_GPIO_WIFI_PA_RESETX (TROUT_GPIO_MISC4_BASE + 6) -#define TROUT_GPIO_WIFI_EN (TROUT_GPIO_MISC4_BASE + 7) - -#define TROUT_GPIO_BT_32K_EN (TROUT_GPIO_MISC5_BASE + 0) -#define TROUT_GPIO_MAC_32K_EN (TROUT_GPIO_MISC5_BASE + 1) -#define TROUT_GPIO_MDDI_32K_EN (TROUT_GPIO_MISC5_BASE + 2) -#define TROUT_GPIO_COMPASS_32K_EN (TROUT_GPIO_MISC5_BASE + 3) - -#define TROUT_GPIO_NAVI_ACT_N (TROUT_GPIO_INT2_BASE + 0) -#define TROUT_GPIO_COMPASS_IRQ (TROUT_GPIO_INT2_BASE + 1) -#define TROUT_GPIO_SLIDING_DET (TROUT_GPIO_INT2_BASE + 2) -#define TROUT_GPIO_AUD_HSMIC_DET_N (TROUT_GPIO_INT2_BASE + 3) -#define TROUT_GPIO_SD_DOOR_N (TROUT_GPIO_INT2_BASE + 4) -#define TROUT_GPIO_CAM_BTN_STEP1_N (TROUT_GPIO_INT2_BASE + 5) -#define TROUT_GPIO_CAM_BTN_STEP2_N (TROUT_GPIO_INT2_BASE + 6) -#define TROUT_GPIO_TP_ATT_N (TROUT_GPIO_INT2_BASE + 7) -#define TROUT_GPIO_BANK0_FIRST_INT_SOURCE (TROUT_GPIO_NAVI_ACT_N) -#define TROUT_GPIO_BANK0_LAST_INT_SOURCE (TROUT_GPIO_TP_ATT_N) - -#define TROUT_GPIO_H2W_DAT_GPI (TROUT_GPIO_MISC1_BASE + 0) -#define TROUT_GPIO_H2W_CLK_GPI (TROUT_GPIO_MISC1_BASE + 1) -#define TROUT_GPIO_CPLD128_VER_0 (TROUT_GPIO_MISC1_BASE + 4) -#define TROUT_GPIO_CPLD128_VER_1 (TROUT_GPIO_MISC1_BASE + 5) -#define TROUT_GPIO_CPLD128_VER_2 (TROUT_GPIO_MISC1_BASE + 6) -#define TROUT_GPIO_CPLD128_VER_3 (TROUT_GPIO_MISC1_BASE + 7) - -#define TROUT_GPIO_SDMC_CD_N (TROUT_GPIO_VIRTUAL_BASE + 0) -#define TROUT_GPIO_END (TROUT_GPIO_SDMC_CD_N) -#define TROUT_GPIO_BANK1_FIRST_INT_SOURCE (TROUT_GPIO_SDMC_CD_N) -#define TROUT_GPIO_BANK1_LAST_INT_SOURCE (TROUT_GPIO_SDMC_CD_N) - -#define TROUT_GPIO_VIRTUAL_TO_REAL_OFFSET \ - (TROUT_GPIO_INT5_BASE - TROUT_GPIO_VIRTUAL_BASE) - -#define TROUT_INT_START (NR_MSM_IRQS + NR_GPIO_IRQS) -#define TROUT_INT_BANK0_COUNT (8) -#define TROUT_INT_BANK1_START (TROUT_INT_START + TROUT_INT_BANK0_COUNT) -#define TROUT_INT_BANK1_COUNT (1) -#define TROUT_INT_END (TROUT_INT_START + TROUT_INT_BANK0_COUNT + \ - TROUT_INT_BANK1_COUNT - 1) -#define TROUT_GPIO_TO_INT(n) (((n) <= TROUT_GPIO_BANK0_LAST_INT_SOURCE) ? \ - (TROUT_INT_START - TROUT_GPIO_BANK0_FIRST_INT_SOURCE + (n)) : \ - (TROUT_INT_BANK1_START - TROUT_GPIO_BANK1_FIRST_INT_SOURCE + (n))) - -#define TROUT_INT_TO_BANK(n) ((n - TROUT_INT_START) / TROUT_INT_BANK0_COUNT) -#define TROUT_INT_TO_MASK(n) (1U << ((n - TROUT_INT_START) & 7)) -#define TROUT_BANK_TO_MASK_REG(bank) \ - (bank ? TROUT_GPIO_INT_MASK1_REG : TROUT_GPIO_INT_MASK0_REG) -#define TROUT_BANK_TO_STAT_REG(bank) \ - (bank ? TROUT_GPIO_INT_STAT1_REG : TROUT_GPIO_INT_STAT0_REG) - -#endif /* GUARD */ diff --git a/arch/arm/mach-msm/clock-pcom.c b/arch/arm/mach-msm/clock-pcom.c deleted file mode 100644 index f5b69d7..0000000 --- a/arch/arm/mach-msm/clock-pcom.c +++ /dev/null @@ -1,176 +0,0 @@ -/* - * Copyright (C) 2007 Google, Inc. - * Copyright (c) 2007-2012, The Linux Foundation. All rights reserved. - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#include <linux/kernel.h> -#include <linux/err.h> -#include <linux/platform_device.h> -#include <linux/module.h> -#include <linux/clk-provider.h> -#include <linux/clkdev.h> - -#include <mach/clk.h> - -#include "proc_comm.h" -#include "clock.h" -#include "clock-pcom.h" - -struct clk_pcom { - unsigned id; - unsigned long flags; - struct msm_clk msm_clk; -}; - -static inline struct clk_pcom *to_clk_pcom(struct clk_hw *hw) -{ - return container_of(to_msm_clk(hw), struct clk_pcom, msm_clk); -} - -static int pc_clk_enable(struct clk_hw *hw) -{ - unsigned id = to_clk_pcom(hw)->id; - int rc = msm_proc_comm(PCOM_CLKCTL_RPC_ENABLE, &id, NULL); - if (rc < 0) - return rc; - else - return (int)id < 0 ? -EINVAL : 0; -} - -static void pc_clk_disable(struct clk_hw *hw) -{ - unsigned id = to_clk_pcom(hw)->id; - msm_proc_comm(PCOM_CLKCTL_RPC_DISABLE, &id, NULL); -} - -static int pc_clk_reset(struct clk_hw *hw, enum clk_reset_action action) -{ - int rc; - unsigned id = to_clk_pcom(hw)->id; - - if (action == CLK_RESET_ASSERT) - rc = msm_proc_comm(PCOM_CLKCTL_RPC_RESET_ASSERT, &id, NULL); - else - rc = msm_proc_comm(PCOM_CLKCTL_RPC_RESET_DEASSERT, &id, NULL); - - if (rc < 0) - return rc; - else - return (int)id < 0 ? -EINVAL : 0; -} - -static int pc_clk_set_rate(struct clk_hw *hw, unsigned long new_rate, - unsigned long p_rate) -{ - struct clk_pcom *p = to_clk_pcom(hw); - unsigned id = p->id, rate = new_rate; - int rc; - - /* - * The rate _might_ be rounded off to the nearest KHz value by the - * remote function. So a return value of 0 doesn't necessarily mean - * that the exact rate was set successfully. - */ - if (p->flags & CLKFLAG_MIN) - rc = msm_proc_comm(PCOM_CLKCTL_RPC_MIN_RATE, &id, &rate); - else - rc = msm_proc_comm(PCOM_CLKCTL_RPC_SET_RATE, &id, &rate); - if (rc < 0) - return rc; - else - return (int)id < 0 ? -EINVAL : 0; -} - -static unsigned long pc_clk_recalc_rate(struct clk_hw *hw, unsigned long p_rate) -{ - unsigned id = to_clk_pcom(hw)->id; - if (msm_proc_comm(PCOM_CLKCTL_RPC_RATE, &id, NULL)) - return 0; - else - return id; -} - -static int pc_clk_is_enabled(struct clk_hw *hw) -{ - unsigned id = to_clk_pcom(hw)->id; - if (msm_proc_comm(PCOM_CLKCTL_RPC_ENABLED, &id, NULL)) - return 0; - else - return id; -} - -static long pc_clk_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *p_rate) -{ - /* Not really supported; pc_clk_set_rate() does rounding on it's own. */ - return rate; -} - -static struct clk_ops clk_ops_pcom = { - .enable = pc_clk_enable, - .disable = pc_clk_disable, - .set_rate = pc_clk_set_rate, - .recalc_rate = pc_clk_recalc_rate, - .is_enabled = pc_clk_is_enabled, - .round_rate = pc_clk_round_rate, -}; - -static int msm_clock_pcom_probe(struct platform_device *pdev) -{ - const struct pcom_clk_pdata *pdata = pdev->dev.platform_data; - int i, ret; - - for (i = 0; i < pdata->num_lookups; i++) { - const struct clk_pcom_desc *desc = &pdata->lookup[i]; - struct clk *c; - struct clk_pcom *p; - struct clk_hw *hw; - struct clk_init_data init; - - p = devm_kzalloc(&pdev->dev, sizeof(*p), GFP_KERNEL); - if (!p) - return -ENOMEM; - - p->id = desc->id; - p->flags = desc->flags; - p->msm_clk.reset = pc_clk_reset; - - hw = &p->msm_clk.hw; - hw->init = &init; - - init.name = desc->name; - init.ops = &clk_ops_pcom; - init.num_parents = 0; - init.flags = CLK_IS_ROOT; - - if (!(p->flags & CLKFLAG_AUTO_OFF)) - init.flags |= CLK_IGNORE_UNUSED; - - c = devm_clk_register(&pdev->dev, hw); - ret = clk_register_clkdev(c, desc->con, desc->dev); - if (ret) - return ret; - } - - return 0; -} - -static struct platform_driver msm_clock_pcom_driver = { - .probe = msm_clock_pcom_probe, - .driver = { - .name = "msm-clock-pcom", - }, -}; -module_platform_driver(msm_clock_pcom_driver); - -MODULE_LICENSE("GPL v2"); diff --git a/arch/arm/mach-msm/clock-pcom.h b/arch/arm/mach-msm/clock-pcom.h deleted file mode 100644 index 5bb164f..0000000 --- a/arch/arm/mach-msm/clock-pcom.h +++ /dev/null @@ -1,145 +0,0 @@ -/* - * Copyright (c) 2009-2012, The Linux Foundation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef __ARCH_ARM_MACH_MSM_CLOCK_PCOM_H -#define __ARCH_ARM_MACH_MSM_CLOCK_PCOM_H - -/* clock IDs used by the modem processor */ - -#define P_ACPU_CLK 0 /* Applications processor clock */ -#define P_ADM_CLK 1 /* Applications data mover clock */ -#define P_ADSP_CLK 2 /* ADSP clock */ -#define P_EBI1_CLK 3 /* External bus interface 1 clock */ -#define P_EBI2_CLK 4 /* External bus interface 2 clock */ -#define P_ECODEC_CLK 5 /* External CODEC clock */ -#define P_EMDH_CLK 6 /* External MDDI host clock */ -#define P_GP_CLK 7 /* General purpose clock */ -#define P_GRP_3D_CLK 8 /* Graphics clock */ -#define P_I2C_CLK 9 /* I2C clock */ -#define P_ICODEC_RX_CLK 10 /* Internal CODEX RX clock */ -#define P_ICODEC_TX_CLK 11 /* Internal CODEX TX clock */ -#define P_IMEM_CLK 12 /* Internal graphics memory clock */ -#define P_MDC_CLK 13 /* MDDI client clock */ -#define P_MDP_CLK 14 /* Mobile display processor clock */ -#define P_PBUS_CLK 15 /* Peripheral bus clock */ -#define P_PCM_CLK 16 /* PCM clock */ -#define P_PMDH_CLK 17 /* Primary MDDI host clock */ -#define P_SDAC_CLK 18 /* Stereo DAC clock */ -#define P_SDC1_CLK 19 /* Secure Digital Card clocks */ -#define P_SDC1_P_CLK 20 -#define P_SDC2_CLK 21 -#define P_SDC2_P_CLK 22 -#define P_SDC3_CLK 23 -#define P_SDC3_P_CLK 24 -#define P_SDC4_CLK 25 -#define P_SDC4_P_CLK 26 -#define P_TSIF_CLK 27 /* Transport Stream Interface clocks */ -#define P_TSIF_REF_CLK 28 -#define P_TV_DAC_CLK 29 /* TV clocks */ -#define P_TV_ENC_CLK 30 -#define P_UART1_CLK 31 /* UART clocks */ -#define P_UART2_CLK 32 -#define P_UART3_CLK 33 -#define P_UART1DM_CLK 34 -#define P_UART2DM_CLK 35 -#define P_USB_HS_CLK 36 /* High speed USB core clock */ -#define P_USB_HS_P_CLK 37 /* High speed USB pbus clock */ -#define P_USB_OTG_CLK 38 /* Full speed USB clock */ -#define P_VDC_CLK 39 /* Video controller clock */ -#define P_VFE_MDC_CLK 40 /* Camera / Video Front End clock */ -#define P_VFE_CLK 41 /* VFE MDDI client clock */ -#define P_MDP_LCDC_PCLK_CLK 42 -#define P_MDP_LCDC_PAD_PCLK_CLK 43 -#define P_MDP_VSYNC_CLK 44 -#define P_SPI_CLK 45 -#define P_VFE_AXI_CLK 46 -#define P_USB_HS2_CLK 47 /* High speed USB 2 core clock */ -#define P_USB_HS2_P_CLK 48 /* High speed USB 2 pbus clock */ -#define P_USB_HS3_CLK 49 /* High speed USB 3 core clock */ -#define P_USB_HS3_P_CLK 50 /* High speed USB 3 pbus clock */ -#define P_GRP_3D_P_CLK 51 /* Graphics pbus clock */ -#define P_USB_PHY_CLK 52 /* USB PHY clock */ -#define P_USB_HS_CORE_CLK 53 /* High speed USB 1 core clock */ -#define P_USB_HS2_CORE_CLK 54 /* High speed USB 2 core clock */ -#define P_USB_HS3_CORE_CLK 55 /* High speed USB 3 core clock */ -#define P_CAM_M_CLK 56 -#define P_CAMIF_PAD_P_CLK 57 -#define P_GRP_2D_CLK 58 -#define P_GRP_2D_P_CLK 59 -#define P_I2S_CLK 60 -#define P_JPEG_CLK 61 -#define P_JPEG_P_CLK 62 -#define P_LPA_CODEC_CLK 63 -#define P_LPA_CORE_CLK 64 -#define P_LPA_P_CLK 65 -#define P_MDC_IO_CLK 66 -#define P_MDC_P_CLK 67 -#define P_MFC_CLK 68 -#define P_MFC_DIV2_CLK 69 -#define P_MFC_P_CLK 70 -#define P_QUP_I2C_CLK 71 -#define P_ROTATOR_IMEM_CLK 72 -#define P_ROTATOR_P_CLK 73 -#define P_VFE_CAMIF_CLK 74 -#define P_VFE_P_CLK 75 -#define P_VPE_CLK 76 -#define P_I2C_2_CLK 77 -#define P_MI2S_CODEC_RX_S_CLK 78 -#define P_MI2S_CODEC_RX_M_CLK 79 -#define P_MI2S_CODEC_TX_S_CLK 80 -#define P_MI2S_CODEC_TX_M_CLK 81 -#define P_PMDH_P_CLK 82 -#define P_EMDH_P_CLK 83 -#define P_SPI_P_CLK 84 -#define P_TSIF_P_CLK 85 -#define P_MDP_P_CLK 86 -#define P_SDAC_M_CLK 87 -#define P_MI2S_S_CLK 88 -#define P_MI2S_M_CLK 89 -#define P_AXI_ROTATOR_CLK 90 -#define P_HDMI_CLK 91 -#define P_CSI0_CLK 92 -#define P_CSI0_VFE_CLK 93 -#define P_CSI0_P_CLK 94 -#define P_CSI1_CLK 95 -#define P_CSI1_VFE_CLK 96 -#define P_CSI1_P_CLK 97 -#define P_GSBI_CLK 98 -#define P_GSBI_P_CLK 99 -#define P_CE_CLK 100 /* Crypto engine */ -#define P_CODEC_SSBI_CLK 101 - -#define P_NR_CLKS 102 - -struct clk_pcom_desc { - unsigned id; - const char *name; - const char *con; - const char *dev; - unsigned long flags; -}; - -struct pcom_clk_pdata { - struct clk_pcom_desc *lookup; - u32 num_lookups; -}; - -#define CLK_PCOM(clk_name, clk_id, clk_dev, clk_flags) { \ - .id = P_##clk_id, \ - .name = #clk_id, \ - .con = clk_name, \ - .dev = clk_dev, \ - .flags = clk_flags, \ - } - -#endif diff --git a/arch/arm/mach-msm/clock.c b/arch/arm/mach-msm/clock.c deleted file mode 100644 index 35ea02b5..0000000 --- a/arch/arm/mach-msm/clock.c +++ /dev/null @@ -1,28 +0,0 @@ -/* arch/arm/mach-msm/clock.c - * - * Copyright (C) 2007 Google, Inc. - * Copyright (c) 2007-2012, The Linux Foundation. All rights reserved. - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#include <linux/clk-provider.h> -#include <linux/module.h> - -#include "clock.h" - -int clk_reset(struct clk *clk, enum clk_reset_action action) -{ - struct clk_hw *hw = __clk_get_hw(clk); - struct msm_clk *m = to_msm_clk(hw); - return m->reset(hw, action); -} -EXPORT_SYMBOL(clk_reset); diff --git a/arch/arm/mach-msm/clock.h b/arch/arm/mach-msm/clock.h deleted file mode 100644 index 42d29dd..0000000 --- a/arch/arm/mach-msm/clock.h +++ /dev/null @@ -1,43 +0,0 @@ -/* arch/arm/mach-msm/clock.h - * - * Copyright (C) 2007 Google, Inc. - * Copyright (c) 2007-2012, The Linux Foundation. All rights reserved. - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#ifndef __ARCH_ARM_MACH_MSM_CLOCK_H -#define __ARCH_ARM_MACH_MSM_CLOCK_H - -#include <linux/clk-provider.h> -#include <mach/clk.h> - -#define CLK_FIRST_AVAILABLE_FLAG 0x00000100 -#define CLKFLAG_AUTO_OFF 0x00000200 -#define CLKFLAG_MIN 0x00000400 -#define CLKFLAG_MAX 0x00000800 - -#define OFF CLKFLAG_AUTO_OFF -#define CLK_MIN CLKFLAG_MIN -#define CLK_MAX CLKFLAG_MAX -#define CLK_MINMAX (CLK_MIN | CLK_MAX) - -struct msm_clk { - int (*reset)(struct clk_hw *hw, enum clk_reset_action action); - struct clk_hw hw; -}; - -static inline struct msm_clk *to_msm_clk(struct clk_hw *hw) -{ - return container_of(hw, struct msm_clk, hw); -} - -#endif diff --git a/arch/arm/mach-msm/common.h b/arch/arm/mach-msm/common.h deleted file mode 100644 index 572479a..0000000 --- a/arch/arm/mach-msm/common.h +++ /dev/null @@ -1,41 +0,0 @@ -/* Copyright (c) 2012, The Linux Foundation. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ -#ifndef __MACH_COMMON_H -#define __MACH_COMMON_H - -extern void msm7x01_timer_init(void); -extern void msm7x30_timer_init(void); -extern void qsd8x50_timer_init(void); - -extern void msm_map_common_io(void); -extern void msm_map_msm7x30_io(void); -extern void msm_map_qsd8x50_io(void); - -extern void __iomem *__msm_ioremap_caller(phys_addr_t phys_addr, size_t size, - unsigned int mtype, void *caller); - -struct msm_mmc_platform_data; - -extern void msm_add_devices(void); -extern void msm_init_irq(void); -extern void msm_init_gpio(void); -extern int msm_add_sdcc(unsigned int controller, - struct msm_mmc_platform_data *plat, - unsigned int stat_irq, unsigned long stat_irq_flags); - -#if defined(CONFIG_MSM_SMD) && defined(CONFIG_DEBUG_FS) -extern int smd_debugfs_init(void); -#else -static inline int smd_debugfs_init(void) { return 0; } -#endif - -#endif diff --git a/arch/arm/mach-msm/devices-msm7x00.c b/arch/arm/mach-msm/devices-msm7x00.c deleted file mode 100644 index d83404d..0000000 --- a/arch/arm/mach-msm/devices-msm7x00.c +++ /dev/null @@ -1,480 +0,0 @@ -/* linux/arch/arm/mach-msm/devices.c - * - * Copyright (C) 2008 Google, Inc. - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#include <linux/kernel.h> -#include <linux/platform_device.h> -#include <linux/clkdev.h> - -#include <mach/irqs.h> -#include <mach/msm_iomap.h> -#include "devices.h" - -#include <asm/mach/flash.h> -#include <linux/mtd/nand.h> -#include <linux/mtd/partitions.h> - -#include "clock.h" -#include "clock-pcom.h" -#include <linux/platform_data/mmc-msm_sdcc.h> - -static struct resource msm_gpio_resources[] = { - { - .start = 32 + 0, - .end = 32 + 0, - .flags = IORESOURCE_IRQ, - }, - { - .start = 32 + 1, - .end = 32 + 1, - .flags = IORESOURCE_IRQ, - }, - { - .start = 0xa9200800, - .end = 0xa9200800 + SZ_4K - 1, - .flags = IORESOURCE_MEM, - .name = "gpio1" - }, - { - .start = 0xa9300C00, - .end = 0xa9300C00 + SZ_4K - 1, - .flags = IORESOURCE_MEM, - .name = "gpio2" - }, -}; - -struct platform_device msm_device_gpio_7201 = { - .name = "gpio-msm-7201", - .num_resources = ARRAY_SIZE(msm_gpio_resources), - .resource = msm_gpio_resources, -}; - -static struct resource resources_uart1[] = { - { - .start = INT_UART1, - .end = INT_UART1, - .flags = IORESOURCE_IRQ, - }, - { - .start = MSM_UART1_PHYS, - .end = MSM_UART1_PHYS + MSM_UART1_SIZE - 1, - .flags = IORESOURCE_MEM, - .name = "uart_resource" - }, -}; - -static struct resource resources_uart2[] = { - { - .start = INT_UART2, - .end = INT_UART2, - .flags = IORESOURCE_IRQ, - }, - { - .start = MSM_UART2_PHYS, - .end = MSM_UART2_PHYS + MSM_UART2_SIZE - 1, - .flags = IORESOURCE_MEM, - .name = "uart_resource" - }, -}; - -static struct resource resources_uart3[] = { - { - .start = INT_UART3, - .end = INT_UART3, - .flags = IORESOURCE_IRQ, - }, - { - .start = MSM_UART3_PHYS, - .end = MSM_UART3_PHYS + MSM_UART3_SIZE - 1, - .flags = IORESOURCE_MEM, - .name = "uart_resource" - }, -}; - -struct platform_device msm_device_uart1 = { - .name = "msm_serial", - .id = 0, - .num_resources = ARRAY_SIZE(resources_uart1), - .resource = resources_uart1, -}; - -struct platform_device msm_device_uart2 = { - .name = "msm_serial", - .id = 1, - .num_resources = ARRAY_SIZE(resources_uart2), - .resource = resources_uart2, -}; - -struct platform_device msm_device_uart3 = { - .name = "msm_serial", - .id = 2, - .num_resources = ARRAY_SIZE(resources_uart3), - .resource = resources_uart3, -}; - -static struct resource resources_i2c[] = { - { - .start = MSM_I2C_PHYS, - .end = MSM_I2C_PHYS + MSM_I2C_SIZE - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = INT_PWB_I2C, - .end = INT_PWB_I2C, - .flags = IORESOURCE_IRQ, - }, -}; - -struct platform_device msm_device_i2c = { - .name = "msm_i2c", - .id = 0, - .num_resources = ARRAY_SIZE(resources_i2c), - .resource = resources_i2c, -}; - -static struct resource resources_hsusb[] = { - { - .start = MSM_HSUSB_PHYS, - .end = MSM_HSUSB_PHYS + MSM_HSUSB_SIZE, - .flags = IORESOURCE_MEM, - }, - { - .start = INT_USB_HS, - .end = INT_USB_HS, - .flags = IORESOURCE_IRQ, - }, -}; - -struct platform_device msm_device_hsusb = { - .name = "msm_hsusb", - .id = -1, - .num_resources = ARRAY_SIZE(resources_hsusb), - .resource = resources_hsusb, - .dev = { - .coherent_dma_mask = 0xffffffff, - }, -}; - -struct flash_platform_data msm_nand_data = { - .parts = NULL, - .nr_parts = 0, -}; - -static struct resource resources_nand[] = { - [0] = { - .start = 7, - .end = 7, - .flags = IORESOURCE_DMA, - }, -}; - -struct platform_device msm_device_nand = { - .name = "msm_nand", - .id = -1, - .num_resources = ARRAY_SIZE(resources_nand), - .resource = resources_nand, - .dev = { - .platform_data = &msm_nand_data, - }, -}; - -struct platform_device msm_device_smd = { - .name = "msm_smd", - .id = -1, -}; - -static struct resource resources_sdc1[] = { - { - .start = MSM_SDC1_PHYS, - .end = MSM_SDC1_PHYS + MSM_SDC1_SIZE - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = INT_SDC1_0, - .end = INT_SDC1_0, - .flags = IORESOURCE_IRQ, - .name = "cmd_irq", - }, - { - .flags = IORESOURCE_IRQ | IORESOURCE_DISABLED, - .name = "status_irq" - }, - { - .start = 8, - .end = 8, - .flags = IORESOURCE_DMA, - }, -}; - -static struct resource resources_sdc2[] = { - { - .start = MSM_SDC2_PHYS, - .end = MSM_SDC2_PHYS + MSM_SDC2_SIZE - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = INT_SDC2_0, - .end = INT_SDC2_0, - .flags = IORESOURCE_IRQ, - .name = "cmd_irq", - }, - { - .flags = IORESOURCE_IRQ | IORESOURCE_DISABLED, - .name = "status_irq" - }, - { - .start = 8, - .end = 8, - .flags = IORESOURCE_DMA, - }, -}; - -static struct resource resources_sdc3[] = { - { - .start = MSM_SDC3_PHYS, - .end = MSM_SDC3_PHYS + MSM_SDC3_SIZE - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = INT_SDC3_0, - .end = INT_SDC3_0, - .flags = IORESOURCE_IRQ, - .name = "cmd_irq", - }, - { - .flags = IORESOURCE_IRQ | IORESOURCE_DISABLED, - .name = "status_irq" - }, - { - .start = 8, - .end = 8, - .flags = IORESOURCE_DMA, - }, -}; - -static struct resource resources_sdc4[] = { - { - .start = MSM_SDC4_PHYS, - .end = MSM_SDC4_PHYS + MSM_SDC4_SIZE - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = INT_SDC4_0, - .end = INT_SDC4_0, - .flags = IORESOURCE_IRQ, - .name = "cmd_irq", - }, - { - .flags = IORESOURCE_IRQ | IORESOURCE_DISABLED, - .name = "status_irq" - }, - { - .start = 8, - .end = 8, - .flags = IORESOURCE_DMA, - }, -}; - -struct platform_device msm_device_sdc1 = { - .name = "msm_sdcc", - .id = 1, - .num_resources = ARRAY_SIZE(resources_sdc1), - .resource = resources_sdc1, - .dev = { - .coherent_dma_mask = 0xffffffff, - }, -}; - -struct platform_device msm_device_sdc2 = { - .name = "msm_sdcc", - .id = 2, - .num_resources = ARRAY_SIZE(resources_sdc2), - .resource = resources_sdc2, - .dev = { - .coherent_dma_mask = 0xffffffff, - }, -}; - -struct platform_device msm_device_sdc3 = { - .name = "msm_sdcc", - .id = 3, - .num_resources = ARRAY_SIZE(resources_sdc3), - .resource = resources_sdc3, - .dev = { - .coherent_dma_mask = 0xffffffff, - }, -}; - -struct platform_device msm_device_sdc4 = { - .name = "msm_sdcc", - .id = 4, - .num_resources = ARRAY_SIZE(resources_sdc4), - .resource = resources_sdc4, - .dev = { - .coherent_dma_mask = 0xffffffff, - }, -}; - -static struct platform_device *msm_sdcc_devices[] __initdata = { - &msm_device_sdc1, - &msm_device_sdc2, - &msm_device_sdc3, - &msm_device_sdc4, -}; - -int __init msm_add_sdcc(unsigned int controller, - struct msm_mmc_platform_data *plat, - unsigned int stat_irq, unsigned long stat_irq_flags) -{ - struct platform_device *pdev; - struct resource *res; - - if (controller < 1 || controller > 4) - return -EINVAL; - - pdev = msm_sdcc_devices[controller-1]; - pdev->dev.platform_data = plat; - - res = platform_get_resource_byname(pdev, IORESOURCE_IRQ, "status_irq"); - if (!res) - return -EINVAL; - else if (stat_irq) { - res->start = res->end = stat_irq; - res->flags &= ~IORESOURCE_DISABLED; - res->flags |= stat_irq_flags; - } - - return platform_device_register(pdev); -} - -static struct resource resources_mddi0[] = { - { - .start = MSM_PMDH_PHYS, - .end = MSM_PMDH_PHYS + MSM_PMDH_SIZE - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = INT_MDDI_PRI, - .end = INT_MDDI_PRI, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct resource resources_mddi1[] = { - { - .start = MSM_EMDH_PHYS, - .end = MSM_EMDH_PHYS + MSM_EMDH_SIZE - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = INT_MDDI_EXT, - .end = INT_MDDI_EXT, - .flags = IORESOURCE_IRQ, - }, -}; - -struct platform_device msm_device_mddi0 = { - .name = "msm_mddi", - .id = 0, - .num_resources = ARRAY_SIZE(resources_mddi0), - .resource = resources_mddi0, - .dev = { - .coherent_dma_mask = 0xffffffff, - }, -}; - -struct platform_device msm_device_mddi1 = { - .name = "msm_mddi", - .id = 1, - .num_resources = ARRAY_SIZE(resources_mddi1), - .resource = resources_mddi1, - .dev = { - .coherent_dma_mask = 0xffffffff, - }, -}; - -static struct resource resources_mdp[] = { - { - .start = MSM_MDP_PHYS, - .end = MSM_MDP_PHYS + MSM_MDP_SIZE - 1, - .name = "mdp", - .flags = IORESOURCE_MEM - }, - { - .start = INT_MDP, - .end = INT_MDP, - .flags = IORESOURCE_IRQ, - }, -}; - -struct platform_device msm_device_mdp = { - .name = "msm_mdp", - .id = 0, - .num_resources = ARRAY_SIZE(resources_mdp), - .resource = resources_mdp, -}; - -static struct clk_pcom_desc msm_clocks_7x01a[] = { - CLK_PCOM("adm_clk", ADM_CLK, NULL, 0), - CLK_PCOM("adsp_clk", ADSP_CLK, NULL, 0), - CLK_PCOM("ebi1_clk", EBI1_CLK, NULL, 0), - CLK_PCOM("ebi2_clk", EBI2_CLK, NULL, 0), - CLK_PCOM("ecodec_clk", ECODEC_CLK, NULL, 0), - CLK_PCOM("emdh_clk", EMDH_CLK, NULL, OFF), - CLK_PCOM("gp_clk", GP_CLK, NULL, 0), - CLK_PCOM("grp_clk", GRP_3D_CLK, NULL, OFF), - CLK_PCOM("i2c_clk", I2C_CLK, "msm_i2c.0", 0), - CLK_PCOM("icodec_rx_clk", ICODEC_RX_CLK, NULL, 0), - CLK_PCOM("icodec_tx_clk", ICODEC_TX_CLK, NULL, 0), - CLK_PCOM("imem_clk", IMEM_CLK, NULL, OFF), - CLK_PCOM("mdc_clk", MDC_CLK, NULL, 0), - CLK_PCOM("mdp_clk", MDP_CLK, NULL, OFF), - CLK_PCOM("pbus_clk", PBUS_CLK, NULL, 0), - CLK_PCOM("pcm_clk", PCM_CLK, NULL, 0), - CLK_PCOM("mddi_clk", PMDH_CLK, NULL, OFF | CLK_MINMAX), - CLK_PCOM("sdac_clk", SDAC_CLK, NULL, OFF), - CLK_PCOM("sdc_clk", SDC1_CLK, "msm_sdcc.1", OFF), - CLK_PCOM("sdc_pclk", SDC1_P_CLK, "msm_sdcc.1", OFF), - CLK_PCOM("sdc_clk", SDC2_CLK, "msm_sdcc.2", OFF), - CLK_PCOM("sdc_pclk", SDC2_P_CLK, "msm_sdcc.2", OFF), - CLK_PCOM("sdc_clk", SDC3_CLK, "msm_sdcc.3", OFF), - CLK_PCOM("sdc_pclk", SDC3_P_CLK, "msm_sdcc.3", OFF), - CLK_PCOM("sdc_clk", SDC4_CLK, "msm_sdcc.4", OFF), - CLK_PCOM("sdc_pclk", SDC4_P_CLK, "msm_sdcc.4", OFF), - CLK_PCOM("tsif_clk", TSIF_CLK, NULL, 0), - CLK_PCOM("tsif_ref_clk", TSIF_REF_CLK, NULL, 0), - CLK_PCOM("tv_dac_clk", TV_DAC_CLK, NULL, 0), - CLK_PCOM("tv_enc_clk", TV_ENC_CLK, NULL, 0), - CLK_PCOM("core", UART1_CLK, "msm_serial.0", OFF), - CLK_PCOM("core", UART2_CLK, "msm_serial.1", 0), - CLK_PCOM("core", UART3_CLK, "msm_serial.2", OFF), - CLK_PCOM("uart1dm_clk", UART1DM_CLK, NULL, OFF), - CLK_PCOM("uart2dm_clk", UART2DM_CLK, NULL, 0), - CLK_PCOM("usb_hs_clk", USB_HS_CLK, "msm_hsusb", OFF), - CLK_PCOM("usb_hs_pclk", USB_HS_P_CLK, "msm_hsusb", OFF), - CLK_PCOM("usb_otg_clk", USB_OTG_CLK, NULL, 0), - CLK_PCOM("vdc_clk", VDC_CLK, NULL, OFF ), - CLK_PCOM("vfe_clk", VFE_CLK, NULL, OFF), - CLK_PCOM("vfe_mdc_clk", VFE_MDC_CLK, NULL, OFF), -}; - -static struct pcom_clk_pdata msm_clock_7x01a_pdata = { - .lookup = msm_clocks_7x01a, - .num_lookups = ARRAY_SIZE(msm_clocks_7x01a), -}; - -struct platform_device msm_clock_7x01a = { - .name = "msm-clock-pcom", - .dev.platform_data = &msm_clock_7x01a_pdata, -}; diff --git a/arch/arm/mach-msm/devices-msm7x30.c b/arch/arm/mach-msm/devices-msm7x30.c deleted file mode 100644 index c15ea8a..0000000 --- a/arch/arm/mach-msm/devices-msm7x30.c +++ /dev/null @@ -1,246 +0,0 @@ -/* - * Copyright (C) 2008 Google, Inc. - * Copyright (c) 2008-2011, Code Aurora Forum. All rights reserved. - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#include <linux/kernel.h> -#include <linux/platform_device.h> - -#include <linux/dma-mapping.h> -#include <linux/clkdev.h> -#include <mach/irqs.h> -#include <mach/msm_iomap.h> -#include <mach/dma.h> - -#include "devices.h" -#include "smd_private.h" -#include "common.h" - -#include <asm/mach/flash.h> - -#include "clock.h" -#include "clock-pcom.h" - -#include <linux/platform_data/mmc-msm_sdcc.h> - -static struct resource msm_gpio_resources[] = { - { - .start = 32 + 18, - .end = 32 + 18, - .flags = IORESOURCE_IRQ, - }, - { - .start = 32 + 19, - .end = 32 + 19, - .flags = IORESOURCE_IRQ, - }, - { - .start = 0xac001000, - .end = 0xac001000 + SZ_4K - 1, - .flags = IORESOURCE_MEM, - .name = "gpio1" - }, - { - .start = 0xac101400, - .end = 0xac101400 + SZ_4K - 1, - .flags = IORESOURCE_MEM, - .name = "gpio2" - }, -}; - -struct platform_device msm_device_gpio_7x30 = { - .name = "gpio-msm-7x30", - .num_resources = ARRAY_SIZE(msm_gpio_resources), - .resource = msm_gpio_resources, -}; - -static struct resource resources_uart2[] = { - { - .start = INT_UART2, - .end = INT_UART2, - .flags = IORESOURCE_IRQ, - }, - { - .start = MSM_UART2_PHYS, - .end = MSM_UART2_PHYS + MSM_UART2_SIZE - 1, - .flags = IORESOURCE_MEM, - .name = "uart_resource" - }, -}; - -struct platform_device msm_device_uart2 = { - .name = "msm_serial", - .id = 1, - .num_resources = ARRAY_SIZE(resources_uart2), - .resource = resources_uart2, -}; - -struct platform_device msm_device_smd = { - .name = "msm_smd", - .id = -1, -}; - -static struct resource resources_otg[] = { - { - .start = MSM_HSUSB_PHYS, - .end = MSM_HSUSB_PHYS + MSM_HSUSB_SIZE, - .flags = IORESOURCE_MEM, - }, - { - .start = INT_USB_HS, - .end = INT_USB_HS, - .flags = IORESOURCE_IRQ, - }, -}; - -struct platform_device msm_device_otg = { - .name = "msm_otg", - .id = -1, - .num_resources = ARRAY_SIZE(resources_otg), - .resource = resources_otg, - .dev = { - .coherent_dma_mask = 0xffffffff, - }, -}; - -static struct resource resources_hsusb[] = { - { - .start = MSM_HSUSB_PHYS, - .end = MSM_HSUSB_PHYS + MSM_HSUSB_SIZE, - .flags = IORESOURCE_MEM, - }, - { - .start = INT_USB_HS, - .end = INT_USB_HS, - .flags = IORESOURCE_IRQ, - }, -}; - -struct platform_device msm_device_hsusb = { - .name = "msm_hsusb", - .id = -1, - .num_resources = ARRAY_SIZE(resources_hsusb), - .resource = resources_hsusb, - .dev = { - .coherent_dma_mask = 0xffffffff, - }, -}; - -static u64 dma_mask = 0xffffffffULL; -static struct resource resources_hsusb_host[] = { - { - .start = MSM_HSUSB_PHYS, - .end = MSM_HSUSB_PHYS + MSM_HSUSB_SIZE, - .flags = IORESOURCE_MEM, - }, - { - .start = INT_USB_HS, - .end = INT_USB_HS, - .flags = IORESOURCE_IRQ, - }, -}; - -struct platform_device msm_device_hsusb_host = { - .name = "msm_hsusb_host", - .id = -1, - .num_resources = ARRAY_SIZE(resources_hsusb_host), - .resource = resources_hsusb_host, - .dev = { - .dma_mask = &dma_mask, - .coherent_dma_mask = 0xffffffffULL, - }, -}; - -static struct clk_pcom_desc msm_clocks_7x30[] = { - CLK_PCOM("adm_clk", ADM_CLK, NULL, 0), - CLK_PCOM("adsp_clk", ADSP_CLK, NULL, 0), - CLK_PCOM("cam_m_clk", CAM_M_CLK, NULL, 0), - CLK_PCOM("camif_pad_pclk", CAMIF_PAD_P_CLK, NULL, OFF), - CLK_PCOM("ce_clk", CE_CLK, NULL, 0), - CLK_PCOM("codec_ssbi_clk", CODEC_SSBI_CLK, NULL, 0), - CLK_PCOM("ebi1_clk", EBI1_CLK, NULL, CLK_MIN), - CLK_PCOM("ecodec_clk", ECODEC_CLK, NULL, 0), - CLK_PCOM("emdh_clk", EMDH_CLK, NULL, OFF | CLK_MINMAX), - CLK_PCOM("emdh_pclk", EMDH_P_CLK, NULL, OFF), - CLK_PCOM("gp_clk", GP_CLK, NULL, 0), - CLK_PCOM("grp_2d_clk", GRP_2D_CLK, NULL, 0), - CLK_PCOM("grp_2d_pclk", GRP_2D_P_CLK, NULL, 0), - CLK_PCOM("grp_clk", GRP_3D_CLK, NULL, 0), - CLK_PCOM("grp_pclk", GRP_3D_P_CLK, NULL, 0), - CLK_PCOM("hdmi_clk", HDMI_CLK, NULL, 0), - CLK_PCOM("imem_clk", IMEM_CLK, NULL, OFF), - CLK_PCOM("jpeg_clk", JPEG_CLK, NULL, OFF), - CLK_PCOM("jpeg_pclk", JPEG_P_CLK, NULL, OFF), - CLK_PCOM("lpa_codec_clk", LPA_CODEC_CLK, NULL, 0), - CLK_PCOM("lpa_core_clk", LPA_CORE_CLK, NULL, 0), - CLK_PCOM("lpa_pclk", LPA_P_CLK, NULL, 0), - CLK_PCOM("mdc_clk", MDC_CLK, NULL, 0), - CLK_PCOM("mddi_clk", PMDH_CLK, NULL, OFF | CLK_MINMAX), - CLK_PCOM("mddi_pclk", PMDH_P_CLK, NULL, 0), - CLK_PCOM("mdp_clk", MDP_CLK, NULL, OFF), - CLK_PCOM("mdp_pclk", MDP_P_CLK, NULL, 0), - CLK_PCOM("mdp_lcdc_pclk_clk", MDP_LCDC_PCLK_CLK, NULL, 0), - CLK_PCOM("mdp_lcdc_pad_pclk_clk", MDP_LCDC_PAD_PCLK_CLK, NULL, 0), - CLK_PCOM("mdp_vsync_clk", MDP_VSYNC_CLK, NULL, 0), - CLK_PCOM("mfc_clk", MFC_CLK, NULL, 0), - CLK_PCOM("mfc_div2_clk", MFC_DIV2_CLK, NULL, 0), - CLK_PCOM("mfc_pclk", MFC_P_CLK, NULL, 0), - CLK_PCOM("mi2s_m_clk", MI2S_M_CLK, NULL, 0), - CLK_PCOM("mi2s_s_clk", MI2S_S_CLK, NULL, 0), - CLK_PCOM("mi2s_codec_rx_m_clk", MI2S_CODEC_RX_M_CLK, NULL, 0), - CLK_PCOM("mi2s_codec_rx_s_clk", MI2S_CODEC_RX_S_CLK, NULL, 0), - CLK_PCOM("mi2s_codec_tx_m_clk", MI2S_CODEC_TX_M_CLK, NULL, 0), - CLK_PCOM("mi2s_codec_tx_s_clk", MI2S_CODEC_TX_S_CLK, NULL, 0), - CLK_PCOM("pbus_clk", PBUS_CLK, NULL, CLK_MIN), - CLK_PCOM("pcm_clk", PCM_CLK, NULL, 0), - CLK_PCOM("rotator_clk", AXI_ROTATOR_CLK, NULL, 0), - CLK_PCOM("rotator_imem_clk", ROTATOR_IMEM_CLK, NULL, OFF), - CLK_PCOM("rotator_pclk", ROTATOR_P_CLK, NULL, OFF), - CLK_PCOM("sdac_clk", SDAC_CLK, NULL, OFF), - CLK_PCOM("spi_clk", SPI_CLK, NULL, 0), - CLK_PCOM("spi_pclk", SPI_P_CLK, NULL, 0), - CLK_PCOM("tv_dac_clk", TV_DAC_CLK, NULL, 0), - CLK_PCOM("tv_enc_clk", TV_ENC_CLK, NULL, 0), - CLK_PCOM("core", UART2_CLK, "msm_serial.1", 0), - CLK_PCOM("usb_phy_clk", USB_PHY_CLK, NULL, 0), - CLK_PCOM("usb_hs_clk", USB_HS_CLK, NULL, OFF), - CLK_PCOM("usb_hs_pclk", USB_HS_P_CLK, NULL, OFF), - CLK_PCOM("usb_hs_core_clk", USB_HS_CORE_CLK, NULL, OFF), - CLK_PCOM("usb_hs2_clk", USB_HS2_CLK, NULL, OFF), - CLK_PCOM("usb_hs2_pclk", USB_HS2_P_CLK, NULL, OFF), - CLK_PCOM("usb_hs2_core_clk", USB_HS2_CORE_CLK, NULL, OFF), - CLK_PCOM("usb_hs3_clk", USB_HS3_CLK, NULL, OFF), - CLK_PCOM("usb_hs3_pclk", USB_HS3_P_CLK, NULL, OFF), - CLK_PCOM("usb_hs3_core_clk", USB_HS3_CORE_CLK, NULL, OFF), - CLK_PCOM("vdc_clk", VDC_CLK, NULL, OFF | CLK_MIN), - CLK_PCOM("vfe_camif_clk", VFE_CAMIF_CLK, NULL, 0), - CLK_PCOM("vfe_clk", VFE_CLK, NULL, 0), - CLK_PCOM("vfe_mdc_clk", VFE_MDC_CLK, NULL, 0), - CLK_PCOM("vfe_pclk", VFE_P_CLK, NULL, OFF), - CLK_PCOM("vpe_clk", VPE_CLK, NULL, 0), - - /* 7x30 v2 hardware only. */ - CLK_PCOM("csi_clk", CSI0_CLK, NULL, 0), - CLK_PCOM("csi_pclk", CSI0_P_CLK, NULL, 0), - CLK_PCOM("csi_vfe_clk", CSI0_VFE_CLK, NULL, 0), -}; - -static struct pcom_clk_pdata msm_clock_7x30_pdata = { - .lookup = msm_clocks_7x30, - .num_lookups = ARRAY_SIZE(msm_clocks_7x30), -}; - -struct platform_device msm_clock_7x30 = { - .name = "msm-clock-pcom", - .dev.platform_data = &msm_clock_7x30_pdata, -}; diff --git a/arch/arm/mach-msm/devices-qsd8x50.c b/arch/arm/mach-msm/devices-qsd8x50.c deleted file mode 100644 index 9e1e9ce..0000000 --- a/arch/arm/mach-msm/devices-qsd8x50.c +++ /dev/null @@ -1,388 +0,0 @@ -/* - * Copyright (C) 2008 Google, Inc. - * Copyright (c) 2008-2011, Code Aurora Forum. All rights reserved. - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#include <linux/kernel.h> -#include <linux/platform_device.h> -#include <linux/clkdev.h> -#include <linux/dma-mapping.h> - -#include <mach/irqs.h> -#include <mach/msm_iomap.h> -#include <mach/dma.h> - -#include "devices.h" -#include "common.h" - -#include <asm/mach/flash.h> - -#include <linux/platform_data/mmc-msm_sdcc.h> -#include "clock.h" -#include "clock-pcom.h" - -static struct resource msm_gpio_resources[] = { - { - .start = 64 + 165 + 9, - .end = 64 + 165 + 9, - .flags = IORESOURCE_IRQ, - }, - { - .start = 64 + 165 + 10, - .end = 64 + 165 + 10, - .flags = IORESOURCE_IRQ, - }, - { - .start = 0xa9000800, - .end = 0xa9000800 + SZ_4K - 1, - .flags = IORESOURCE_MEM, - .name = "gpio1" - }, - { - .start = 0xa9100C00, - .end = 0xa9100C00 + SZ_4K - 1, - .flags = IORESOURCE_MEM, - .name = "gpio2" - }, -}; - -struct platform_device msm_device_gpio_8x50 = { - .name = "gpio-msm-8x50", - .num_resources = ARRAY_SIZE(msm_gpio_resources), - .resource = msm_gpio_resources, -}; - -static struct resource resources_uart3[] = { - { - .start = INT_UART3, - .end = INT_UART3, - .flags = IORESOURCE_IRQ, - }, - { - .start = MSM_UART3_PHYS, - .end = MSM_UART3_PHYS + MSM_UART3_SIZE - 1, - .flags = IORESOURCE_MEM, - .name = "uart_resource" - }, -}; - -struct platform_device msm_device_uart3 = { - .name = "msm_serial", - .id = 2, - .num_resources = ARRAY_SIZE(resources_uart3), - .resource = resources_uart3, -}; - -struct platform_device msm_device_smd = { - .name = "msm_smd", - .id = -1, -}; - -static struct resource resources_otg[] = { - { - .start = MSM_HSUSB_PHYS, - .end = MSM_HSUSB_PHYS + MSM_HSUSB_SIZE, - .flags = IORESOURCE_MEM, - }, - { - .start = INT_USB_HS, - .end = INT_USB_HS, - .flags = IORESOURCE_IRQ, - }, -}; - -struct platform_device msm_device_otg = { - .name = "msm_otg", - .id = -1, - .num_resources = ARRAY_SIZE(resources_otg), - .resource = resources_otg, - .dev = { - .coherent_dma_mask = 0xffffffff, - }, -}; - -static struct resource resources_hsusb[] = { - { - .start = MSM_HSUSB_PHYS, - .end = MSM_HSUSB_PHYS + MSM_HSUSB_SIZE, - .flags = IORESOURCE_MEM, - }, - { - .start = INT_USB_HS, - .end = INT_USB_HS, - .flags = IORESOURCE_IRQ, - }, -}; - -struct platform_device msm_device_hsusb = { - .name = "msm_hsusb", - .id = -1, - .num_resources = ARRAY_SIZE(resources_hsusb), - .resource = resources_hsusb, - .dev = { - .coherent_dma_mask = 0xffffffff, - }, -}; - -static u64 dma_mask = 0xffffffffULL; -static struct resource resources_hsusb_host[] = { - { - .start = MSM_HSUSB_PHYS, - .end = MSM_HSUSB_PHYS + MSM_HSUSB_SIZE, - .flags = IORESOURCE_MEM, - }, - { - .start = INT_USB_HS, - .end = INT_USB_HS, - .flags = IORESOURCE_IRQ, - }, -}; - -struct platform_device msm_device_hsusb_host = { - .name = "msm_hsusb_host", - .id = -1, - .num_resources = ARRAY_SIZE(resources_hsusb_host), - .resource = resources_hsusb_host, - .dev = { - .dma_mask = &dma_mask, - .coherent_dma_mask = 0xffffffffULL, - }, -}; - -static struct resource resources_sdc1[] = { - { - .start = MSM_SDC1_PHYS, - .end = MSM_SDC1_PHYS + MSM_SDC1_SIZE - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = INT_SDC1_0, - .end = INT_SDC1_0, - .flags = IORESOURCE_IRQ, - .name = "cmd_irq", - }, - { - .flags = IORESOURCE_IRQ | IORESOURCE_DISABLED, - .name = "status_irq" - }, - { - .start = 8, - .end = 8, - .flags = IORESOURCE_DMA, - }, -}; - -static struct resource resources_sdc2[] = { - { - .start = MSM_SDC2_PHYS, - .end = MSM_SDC2_PHYS + MSM_SDC2_SIZE - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = INT_SDC2_0, - .end = INT_SDC2_0, - .flags = IORESOURCE_IRQ, - .name = "cmd_irq", - }, - { - .flags = IORESOURCE_IRQ | IORESOURCE_DISABLED, - .name = "status_irq" - }, - { - .start = 8, - .end = 8, - .flags = IORESOURCE_DMA, - }, -}; - -static struct resource resources_sdc3[] = { - { - .start = MSM_SDC3_PHYS, - .end = MSM_SDC3_PHYS + MSM_SDC3_SIZE - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = INT_SDC3_0, - .end = INT_SDC3_0, - .flags = IORESOURCE_IRQ, - .name = "cmd_irq", - }, - { - .flags = IORESOURCE_IRQ | IORESOURCE_DISABLED, - .name = "status_irq" - }, - { - .start = 8, - .end = 8, - .flags = IORESOURCE_DMA, - }, -}; - -static struct resource resources_sdc4[] = { - { - .start = MSM_SDC4_PHYS, - .end = MSM_SDC4_PHYS + MSM_SDC4_SIZE - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = INT_SDC4_0, - .end = INT_SDC4_0, - .flags = IORESOURCE_IRQ, - .name = "cmd_irq", - }, - { - .flags = IORESOURCE_IRQ | IORESOURCE_DISABLED, - .name = "status_irq" - }, - { - .start = 8, - .end = 8, - .flags = IORESOURCE_DMA, - }, -}; - -struct platform_device msm_device_sdc1 = { - .name = "msm_sdcc", - .id = 1, - .num_resources = ARRAY_SIZE(resources_sdc1), - .resource = resources_sdc1, - .dev = { - .coherent_dma_mask = 0xffffffff, - }, -}; - -struct platform_device msm_device_sdc2 = { - .name = "msm_sdcc", - .id = 2, - .num_resources = ARRAY_SIZE(resources_sdc2), - .resource = resources_sdc2, - .dev = { - .coherent_dma_mask = 0xffffffff, - }, -}; - -struct platform_device msm_device_sdc3 = { - .name = "msm_sdcc", - .id = 3, - .num_resources = ARRAY_SIZE(resources_sdc3), - .resource = resources_sdc3, - .dev = { - .coherent_dma_mask = 0xffffffff, - }, -}; - -struct platform_device msm_device_sdc4 = { - .name = "msm_sdcc", - .id = 4, - .num_resources = ARRAY_SIZE(resources_sdc4), - .resource = resources_sdc4, - .dev = { - .coherent_dma_mask = 0xffffffff, - }, -}; - -static struct platform_device *msm_sdcc_devices[] __initdata = { - &msm_device_sdc1, - &msm_device_sdc2, - &msm_device_sdc3, - &msm_device_sdc4, -}; - -int __init msm_add_sdcc(unsigned int controller, - struct msm_mmc_platform_data *plat, - unsigned int stat_irq, unsigned long stat_irq_flags) -{ - struct platform_device *pdev; - struct resource *res; - - if (controller < 1 || controller > 4) - return -EINVAL; - - pdev = msm_sdcc_devices[controller-1]; - pdev->dev.platform_data = plat; - - res = platform_get_resource_byname(pdev, IORESOURCE_IRQ, "status_irq"); - if (!res) - return -EINVAL; - else if (stat_irq) { - res->start = res->end = stat_irq; - res->flags &= ~IORESOURCE_DISABLED; - res->flags |= stat_irq_flags; - } - - return platform_device_register(pdev); -} - -static struct clk_pcom_desc msm_clocks_8x50[] = { - CLK_PCOM("adm_clk", ADM_CLK, NULL, 0), - CLK_PCOM("ce_clk", CE_CLK, NULL, 0), - CLK_PCOM("ebi1_clk", EBI1_CLK, NULL, CLK_MIN), - CLK_PCOM("ebi2_clk", EBI2_CLK, NULL, 0), - CLK_PCOM("ecodec_clk", ECODEC_CLK, NULL, 0), - CLK_PCOM("emdh_clk", EMDH_CLK, NULL, OFF | CLK_MINMAX), - CLK_PCOM("gp_clk", GP_CLK, NULL, 0), - CLK_PCOM("grp_clk", GRP_3D_CLK, NULL, 0), - CLK_PCOM("i2c_clk", I2C_CLK, NULL, 0), - CLK_PCOM("icodec_rx_clk", ICODEC_RX_CLK, NULL, 0), - CLK_PCOM("icodec_tx_clk", ICODEC_TX_CLK, NULL, 0), - CLK_PCOM("imem_clk", IMEM_CLK, NULL, OFF), - CLK_PCOM("mdc_clk", MDC_CLK, NULL, 0), - CLK_PCOM("mddi_clk", PMDH_CLK, NULL, OFF | CLK_MINMAX), - CLK_PCOM("mdp_clk", MDP_CLK, NULL, OFF), - CLK_PCOM("mdp_lcdc_pclk_clk", MDP_LCDC_PCLK_CLK, NULL, 0), - CLK_PCOM("mdp_lcdc_pad_pclk_clk", MDP_LCDC_PAD_PCLK_CLK, NULL, 0), - CLK_PCOM("mdp_vsync_clk", MDP_VSYNC_CLK, NULL, 0), - CLK_PCOM("pbus_clk", PBUS_CLK, NULL, CLK_MIN), - CLK_PCOM("pcm_clk", PCM_CLK, NULL, 0), - CLK_PCOM("sdac_clk", SDAC_CLK, NULL, OFF), - CLK_PCOM("sdc_clk", SDC1_CLK, "msm_sdcc.1", OFF), - CLK_PCOM("sdc_pclk", SDC1_P_CLK, "msm_sdcc.1", OFF), - CLK_PCOM("sdc_clk", SDC2_CLK, "msm_sdcc.2", OFF), - CLK_PCOM("sdc_pclk", SDC2_P_CLK, "msm_sdcc.2", OFF), - CLK_PCOM("sdc_clk", SDC3_CLK, "msm_sdcc.3", OFF), - CLK_PCOM("sdc_pclk", SDC3_P_CLK, "msm_sdcc.3", OFF), - CLK_PCOM("sdc_clk", SDC4_CLK, "msm_sdcc.4", OFF), - CLK_PCOM("sdc_pclk", SDC4_P_CLK, "msm_sdcc.4", OFF), - CLK_PCOM("spi_clk", SPI_CLK, NULL, 0), - CLK_PCOM("tsif_clk", TSIF_CLK, NULL, 0), - CLK_PCOM("tsif_ref_clk", TSIF_REF_CLK, NULL, 0), - CLK_PCOM("tv_dac_clk", TV_DAC_CLK, NULL, 0), - CLK_PCOM("tv_enc_clk", TV_ENC_CLK, NULL, 0), - CLK_PCOM("core", UART1_CLK, NULL, OFF), - CLK_PCOM("core", UART2_CLK, NULL, 0), - CLK_PCOM("core", UART3_CLK, "msm_serial.2", OFF), - CLK_PCOM("uartdm_clk", UART1DM_CLK, NULL, OFF), - CLK_PCOM("uartdm_clk", UART2DM_CLK, NULL, 0), - CLK_PCOM("usb_hs_clk", USB_HS_CLK, NULL, OFF), - CLK_PCOM("usb_hs_pclk", USB_HS_P_CLK, NULL, OFF), - CLK_PCOM("usb_otg_clk", USB_OTG_CLK, NULL, 0), - CLK_PCOM("vdc_clk", VDC_CLK, NULL, OFF | CLK_MIN), - CLK_PCOM("vfe_clk", VFE_CLK, NULL, OFF), - CLK_PCOM("vfe_mdc_clk", VFE_MDC_CLK, NULL, OFF), - CLK_PCOM("vfe_axi_clk", VFE_AXI_CLK, NULL, OFF), - CLK_PCOM("usb_hs2_clk", USB_HS2_CLK, NULL, OFF), - CLK_PCOM("usb_hs2_pclk", USB_HS2_P_CLK, NULL, OFF), - CLK_PCOM("usb_hs3_clk", USB_HS3_CLK, NULL, OFF), - CLK_PCOM("usb_hs3_pclk", USB_HS3_P_CLK, NULL, OFF), - CLK_PCOM("usb_phy_clk", USB_PHY_CLK, NULL, 0), -}; - -static struct pcom_clk_pdata msm_clock_8x50_pdata = { - .lookup = msm_clocks_8x50, - .num_lookups = ARRAY_SIZE(msm_clocks_8x50), -}; - -struct platform_device msm_clock_8x50 = { - .name = "msm-clock-pcom", - .dev.platform_data = &msm_clock_8x50_pdata, -}; diff --git a/arch/arm/mach-msm/devices.h b/arch/arm/mach-msm/devices.h deleted file mode 100644 index dccefad..0000000 --- a/arch/arm/mach-msm/devices.h +++ /dev/null @@ -1,53 +0,0 @@ -/* linux/arch/arm/mach-msm/devices.h - * - * Copyright (C) 2008 Google, Inc. - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#ifndef __ARCH_ARM_MACH_MSM_DEVICES_H -#define __ARCH_ARM_MACH_MSM_DEVICES_H - -extern struct platform_device msm_device_gpio_7201; -extern struct platform_device msm_device_gpio_7x30; -extern struct platform_device msm_device_gpio_8x50; - -extern struct platform_device msm_device_uart1; -extern struct platform_device msm_device_uart2; -extern struct platform_device msm_device_uart3; - -extern struct platform_device msm8960_device_uart_gsbi2; -extern struct platform_device msm8960_device_uart_gsbi5; - -extern struct platform_device msm_device_sdc1; -extern struct platform_device msm_device_sdc2; -extern struct platform_device msm_device_sdc3; -extern struct platform_device msm_device_sdc4; - -extern struct platform_device msm_device_hsusb; -extern struct platform_device msm_device_otg; -extern struct platform_device msm_device_hsusb_host; - -extern struct platform_device msm_device_i2c; - -extern struct platform_device msm_device_smd; - -extern struct platform_device msm_device_nand; - -extern struct platform_device msm_device_mddi0; -extern struct platform_device msm_device_mddi1; -extern struct platform_device msm_device_mdp; - -extern struct platform_device msm_clock_7x01a; -extern struct platform_device msm_clock_7x30; -extern struct platform_device msm_clock_8x50; - -#endif diff --git a/arch/arm/mach-msm/dma.c b/arch/arm/mach-msm/dma.c deleted file mode 100644 index fb976246..0000000 --- a/arch/arm/mach-msm/dma.c +++ /dev/null @@ -1,298 +0,0 @@ -/* linux/arch/arm/mach-msm/dma.c - * - * Copyright (C) 2007 Google, Inc. - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#include <linux/clk.h> -#include <linux/err.h> -#include <linux/io.h> -#include <linux/interrupt.h> -#include <linux/completion.h> -#include <linux/module.h> -#include <mach/dma.h> -#include <mach/msm_iomap.h> - -#define MSM_DMOV_CHANNEL_COUNT 16 - -#define DMOV_SD0(off, ch) (MSM_DMOV_BASE + 0x0000 + (off) + ((ch) << 2)) -#define DMOV_SD1(off, ch) (MSM_DMOV_BASE + 0x0400 + (off) + ((ch) << 2)) -#define DMOV_SD2(off, ch) (MSM_DMOV_BASE + 0x0800 + (off) + ((ch) << 2)) -#define DMOV_SD3(off, ch) (MSM_DMOV_BASE + 0x0C00 + (off) + ((ch) << 2)) - -#if defined(CONFIG_ARCH_MSM7X30) -#define DMOV_SD_AARM DMOV_SD2 -#else -#define DMOV_SD_AARM DMOV_SD3 -#endif - -#define DMOV_CMD_PTR(ch) DMOV_SD_AARM(0x000, ch) -#define DMOV_RSLT(ch) DMOV_SD_AARM(0x040, ch) -#define DMOV_FLUSH0(ch) DMOV_SD_AARM(0x080, ch) -#define DMOV_FLUSH1(ch) DMOV_SD_AARM(0x0C0, ch) -#define DMOV_FLUSH2(ch) DMOV_SD_AARM(0x100, ch) -#define DMOV_FLUSH3(ch) DMOV_SD_AARM(0x140, ch) -#define DMOV_FLUSH4(ch) DMOV_SD_AARM(0x180, ch) -#define DMOV_FLUSH5(ch) DMOV_SD_AARM(0x1C0, ch) - -#define DMOV_STATUS(ch) DMOV_SD_AARM(0x200, ch) -#define DMOV_ISR DMOV_SD_AARM(0x380, 0) - -#define DMOV_CONFIG(ch) DMOV_SD_AARM(0x300, ch) - -enum { - MSM_DMOV_PRINT_ERRORS = 1, - MSM_DMOV_PRINT_IO = 2, - MSM_DMOV_PRINT_FLOW = 4 -}; - -static DEFINE_SPINLOCK(msm_dmov_lock); -static struct clk *msm_dmov_clk; -static unsigned int channel_active; -static struct list_head ready_commands[MSM_DMOV_CHANNEL_COUNT]; -static struct list_head active_commands[MSM_DMOV_CHANNEL_COUNT]; -unsigned int msm_dmov_print_mask = MSM_DMOV_PRINT_ERRORS; - -#define MSM_DMOV_DPRINTF(mask, format, args...) \ - do { \ - if ((mask) & msm_dmov_print_mask) \ - printk(KERN_ERR format, args); \ - } while (0) -#define PRINT_ERROR(format, args...) \ - MSM_DMOV_DPRINTF(MSM_DMOV_PRINT_ERRORS, format, args); -#define PRINT_IO(format, args...) \ - MSM_DMOV_DPRINTF(MSM_DMOV_PRINT_IO, format, args); -#define PRINT_FLOW(format, args...) \ - MSM_DMOV_DPRINTF(MSM_DMOV_PRINT_FLOW, format, args); - -void msm_dmov_stop_cmd(unsigned id, struct msm_dmov_cmd *cmd, int graceful) -{ - writel((graceful << 31), DMOV_FLUSH0(id)); -} -EXPORT_SYMBOL_GPL(msm_dmov_stop_cmd); - -void msm_dmov_enqueue_cmd(unsigned id, struct msm_dmov_cmd *cmd) -{ - unsigned long irq_flags; - unsigned int status; - - spin_lock_irqsave(&msm_dmov_lock, irq_flags); - if (!channel_active) - clk_enable(msm_dmov_clk); - dsb(); - status = readl(DMOV_STATUS(id)); - if (list_empty(&ready_commands[id]) && - (status & DMOV_STATUS_CMD_PTR_RDY)) { -#if 0 - if (list_empty(&active_commands[id])) { - PRINT_FLOW("msm_dmov_enqueue_cmd(%d), enable interrupt\n", id); - writel(DMOV_CONFIG_IRQ_EN, DMOV_CONFIG(id)); - } -#endif - if (cmd->execute_func) - cmd->execute_func(cmd); - PRINT_IO("msm_dmov_enqueue_cmd(%d), start command, status %x\n", id, status); - list_add_tail(&cmd->list, &active_commands[id]); - if (!channel_active) - enable_irq(INT_ADM_AARM); - channel_active |= 1U << id; - writel(cmd->cmdptr, DMOV_CMD_PTR(id)); - } else { - if (!channel_active) - clk_disable(msm_dmov_clk); - if (list_empty(&active_commands[id])) - PRINT_ERROR("msm_dmov_enqueue_cmd(%d), error datamover stalled, status %x\n", id, status); - - PRINT_IO("msm_dmov_enqueue_cmd(%d), enqueue command, status %x\n", id, status); - list_add_tail(&cmd->list, &ready_commands[id]); - } - spin_unlock_irqrestore(&msm_dmov_lock, irq_flags); -} -EXPORT_SYMBOL_GPL(msm_dmov_enqueue_cmd); - -struct msm_dmov_exec_cmdptr_cmd { - struct msm_dmov_cmd dmov_cmd; - struct completion complete; - unsigned id; - unsigned int result; - struct msm_dmov_errdata err; -}; - -static void -dmov_exec_cmdptr_complete_func(struct msm_dmov_cmd *_cmd, - unsigned int result, - struct msm_dmov_errdata *err) -{ - struct msm_dmov_exec_cmdptr_cmd *cmd = container_of(_cmd, struct msm_dmov_exec_cmdptr_cmd, dmov_cmd); - cmd->result = result; - if (result != 0x80000002 && err) - memcpy(&cmd->err, err, sizeof(struct msm_dmov_errdata)); - - complete(&cmd->complete); -} - -int msm_dmov_exec_cmd(unsigned id, unsigned int cmdptr) -{ - struct msm_dmov_exec_cmdptr_cmd cmd; - - PRINT_FLOW("dmov_exec_cmdptr(%d, %x)\n", id, cmdptr); - - cmd.dmov_cmd.cmdptr = cmdptr; - cmd.dmov_cmd.complete_func = dmov_exec_cmdptr_complete_func; - cmd.dmov_cmd.execute_func = NULL; - cmd.id = id; - init_completion(&cmd.complete); - - msm_dmov_enqueue_cmd(id, &cmd.dmov_cmd); - wait_for_completion(&cmd.complete); - - if (cmd.result != 0x80000002) { - PRINT_ERROR("dmov_exec_cmdptr(%d): ERROR, result: %x\n", id, cmd.result); - PRINT_ERROR("dmov_exec_cmdptr(%d): flush: %x %x %x %x\n", - id, cmd.err.flush[0], cmd.err.flush[1], cmd.err.flush[2], cmd.err.flush[3]); - return -EIO; - } - PRINT_FLOW("dmov_exec_cmdptr(%d, %x) done\n", id, cmdptr); - return 0; -} - - -static irqreturn_t msm_datamover_irq_handler(int irq, void *dev_id) -{ - unsigned int int_status, mask, id; - unsigned long irq_flags; - unsigned int ch_status; - unsigned int ch_result; - struct msm_dmov_cmd *cmd; - - spin_lock_irqsave(&msm_dmov_lock, irq_flags); - - int_status = readl(DMOV_ISR); /* read and clear interrupt */ - PRINT_FLOW("msm_datamover_irq_handler: DMOV_ISR %x\n", int_status); - - while (int_status) { - mask = int_status & -int_status; - id = fls(mask) - 1; - PRINT_FLOW("msm_datamover_irq_handler %08x %08x id %d\n", int_status, mask, id); - int_status &= ~mask; - ch_status = readl(DMOV_STATUS(id)); - if (!(ch_status & DMOV_STATUS_RSLT_VALID)) { - PRINT_FLOW("msm_datamover_irq_handler id %d, result not valid %x\n", id, ch_status); - continue; - } - do { - ch_result = readl(DMOV_RSLT(id)); - if (list_empty(&active_commands[id])) { - PRINT_ERROR("msm_datamover_irq_handler id %d, got result " - "with no active command, status %x, result %x\n", - id, ch_status, ch_result); - cmd = NULL; - } else - cmd = list_entry(active_commands[id].next, typeof(*cmd), list); - PRINT_FLOW("msm_datamover_irq_handler id %d, status %x, result %x\n", id, ch_status, ch_result); - if (ch_result & DMOV_RSLT_DONE) { - PRINT_FLOW("msm_datamover_irq_handler id %d, status %x\n", - id, ch_status); - PRINT_IO("msm_datamover_irq_handler id %d, got result " - "for %p, result %x\n", id, cmd, ch_result); - if (cmd) { - list_del(&cmd->list); - dsb(); - cmd->complete_func(cmd, ch_result, NULL); - } - } - if (ch_result & DMOV_RSLT_FLUSH) { - struct msm_dmov_errdata errdata; - - errdata.flush[0] = readl(DMOV_FLUSH0(id)); - errdata.flush[1] = readl(DMOV_FLUSH1(id)); - errdata.flush[2] = readl(DMOV_FLUSH2(id)); - errdata.flush[3] = readl(DMOV_FLUSH3(id)); - errdata.flush[4] = readl(DMOV_FLUSH4(id)); - errdata.flush[5] = readl(DMOV_FLUSH5(id)); - PRINT_FLOW("msm_datamover_irq_handler id %d, status %x\n", id, ch_status); - PRINT_FLOW("msm_datamover_irq_handler id %d, flush, result %x, flush0 %x\n", id, ch_result, errdata.flush[0]); - if (cmd) { - list_del(&cmd->list); - dsb(); - cmd->complete_func(cmd, ch_result, &errdata); - } - } - if (ch_result & DMOV_RSLT_ERROR) { - struct msm_dmov_errdata errdata; - - errdata.flush[0] = readl(DMOV_FLUSH0(id)); - errdata.flush[1] = readl(DMOV_FLUSH1(id)); - errdata.flush[2] = readl(DMOV_FLUSH2(id)); - errdata.flush[3] = readl(DMOV_FLUSH3(id)); - errdata.flush[4] = readl(DMOV_FLUSH4(id)); - errdata.flush[5] = readl(DMOV_FLUSH5(id)); - - PRINT_ERROR("msm_datamover_irq_handler id %d, status %x\n", id, ch_status); - PRINT_ERROR("msm_datamover_irq_handler id %d, error, result %x, flush0 %x\n", id, ch_result, errdata.flush[0]); - if (cmd) { - list_del(&cmd->list); - dsb(); - cmd->complete_func(cmd, ch_result, &errdata); - } - /* this does not seem to work, once we get an error */ - /* the datamover will no longer accept commands */ - writel(0, DMOV_FLUSH0(id)); - } - ch_status = readl(DMOV_STATUS(id)); - PRINT_FLOW("msm_datamover_irq_handler id %d, status %x\n", id, ch_status); - if ((ch_status & DMOV_STATUS_CMD_PTR_RDY) && !list_empty(&ready_commands[id])) { - cmd = list_entry(ready_commands[id].next, typeof(*cmd), list); - list_move_tail(&cmd->list, &active_commands[id]); - if (cmd->execute_func) - cmd->execute_func(cmd); - PRINT_FLOW("msm_datamover_irq_handler id %d, start command\n", id); - writel(cmd->cmdptr, DMOV_CMD_PTR(id)); - } - } while (ch_status & DMOV_STATUS_RSLT_VALID); - if (list_empty(&active_commands[id]) && list_empty(&ready_commands[id])) - channel_active &= ~(1U << id); - PRINT_FLOW("msm_datamover_irq_handler id %d, status %x\n", id, ch_status); - } - - if (!channel_active) { - disable_irq_nosync(INT_ADM_AARM); - clk_disable(msm_dmov_clk); - } - - spin_unlock_irqrestore(&msm_dmov_lock, irq_flags); - return IRQ_HANDLED; -} - -static int __init msm_init_datamover(void) -{ - int i; - int ret; - struct clk *clk; - - for (i = 0; i < MSM_DMOV_CHANNEL_COUNT; i++) { - INIT_LIST_HEAD(&ready_commands[i]); - INIT_LIST_HEAD(&active_commands[i]); - writel(DMOV_CONFIG_IRQ_EN | DMOV_CONFIG_FORCE_TOP_PTR_RSLT | DMOV_CONFIG_FORCE_FLUSH_RSLT, DMOV_CONFIG(i)); - } - clk = clk_get(NULL, "adm_clk"); - if (IS_ERR(clk)) - return PTR_ERR(clk); - clk_prepare(clk); - msm_dmov_clk = clk; - ret = request_irq(INT_ADM_AARM, msm_datamover_irq_handler, 0, "msmdatamover", NULL); - if (ret) - return ret; - disable_irq(INT_ADM_AARM); - return 0; -} -module_init(msm_init_datamover); diff --git a/arch/arm/mach-msm/gpiomux-8x50.c b/arch/arm/mach-msm/gpiomux-8x50.c deleted file mode 100644 index f7a4ea5..0000000 --- a/arch/arm/mach-msm/gpiomux-8x50.c +++ /dev/null @@ -1,51 +0,0 @@ -/* Copyright (c) 2010, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA - * 02110-1301, USA. - */ -#include "gpiomux.h" - -#if defined(CONFIG_MMC_MSM) || defined(CONFIG_MMC_MSM_MODULE) - #define SDCC_DAT_0_3_CMD_ACTV_CFG (GPIOMUX_VALID | GPIOMUX_PULL_UP\ - | GPIOMUX_FUNC_1 | GPIOMUX_DRV_8MA) - #define SDCC_CLK_ACTV_CFG (GPIOMUX_VALID | GPIOMUX_PULL_NONE\ - | GPIOMUX_FUNC_1 | GPIOMUX_DRV_8MA) -#else - #define SDCC_DAT_0_3_CMD_ACTV_CFG 0 - #define SDCC_CLK_ACTV_CFG 0 -#endif - -#define SDC1_SUSPEND_CONFIG (GPIOMUX_VALID | GPIOMUX_PULL_DOWN\ - | GPIOMUX_FUNC_GPIO | GPIOMUX_DRV_2MA) - -struct msm_gpiomux_config msm_gpiomux_configs[GPIOMUX_NGPIOS] = { - [86] = { /* UART3 RX */ - .suspended = GPIOMUX_DRV_2MA | GPIOMUX_PULL_DOWN | - GPIOMUX_FUNC_1 | GPIOMUX_VALID, - }, - [87] = { /* UART3 TX */ - .suspended = GPIOMUX_DRV_2MA | GPIOMUX_PULL_DOWN | - GPIOMUX_FUNC_1 | GPIOMUX_VALID, - }, - /* SDC1 data[3:0] & CMD */ - [51 ... 55] = { - .active = SDCC_DAT_0_3_CMD_ACTV_CFG, - .suspended = SDC1_SUSPEND_CONFIG - }, - /* SDC1 CLK */ - [56] = { - .active = SDCC_CLK_ACTV_CFG, - .suspended = SDC1_SUSPEND_CONFIG - }, -}; diff --git a/arch/arm/mach-msm/gpiomux-v1.h b/arch/arm/mach-msm/gpiomux-v1.h deleted file mode 100644 index 71d86fe..0000000 --- a/arch/arm/mach-msm/gpiomux-v1.h +++ /dev/null @@ -1,67 +0,0 @@ -/* Copyright (c) 2010, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA - * 02110-1301, USA. - */ -#ifndef __ARCH_ARM_MACH_MSM_GPIOMUX_V1_H -#define __ARCH_ARM_MACH_MSM_GPIOMUX_V1_H - -#if defined(CONFIG_ARCH_MSM7X30) -#define GPIOMUX_NGPIOS 182 -#elif defined(CONFIG_ARCH_QSD8X50) -#define GPIOMUX_NGPIOS 165 -#else -#define GPIOMUX_NGPIOS 133 -#endif - -typedef u32 gpiomux_config_t; - -enum { - GPIOMUX_DRV_2MA = 0UL << 17, - GPIOMUX_DRV_4MA = 1UL << 17, - GPIOMUX_DRV_6MA = 2UL << 17, - GPIOMUX_DRV_8MA = 3UL << 17, - GPIOMUX_DRV_10MA = 4UL << 17, - GPIOMUX_DRV_12MA = 5UL << 17, - GPIOMUX_DRV_14MA = 6UL << 17, - GPIOMUX_DRV_16MA = 7UL << 17, -}; - -enum { - GPIOMUX_FUNC_GPIO = 0UL, - GPIOMUX_FUNC_1 = 1UL, - GPIOMUX_FUNC_2 = 2UL, - GPIOMUX_FUNC_3 = 3UL, - GPIOMUX_FUNC_4 = 4UL, - GPIOMUX_FUNC_5 = 5UL, - GPIOMUX_FUNC_6 = 6UL, - GPIOMUX_FUNC_7 = 7UL, - GPIOMUX_FUNC_8 = 8UL, - GPIOMUX_FUNC_9 = 9UL, - GPIOMUX_FUNC_A = 10UL, - GPIOMUX_FUNC_B = 11UL, - GPIOMUX_FUNC_C = 12UL, - GPIOMUX_FUNC_D = 13UL, - GPIOMUX_FUNC_E = 14UL, - GPIOMUX_FUNC_F = 15UL, -}; - -enum { - GPIOMUX_PULL_NONE = 0UL << 15, - GPIOMUX_PULL_DOWN = 1UL << 15, - GPIOMUX_PULL_KEEPER = 2UL << 15, - GPIOMUX_PULL_UP = 3UL << 15, -}; - -#endif diff --git a/arch/arm/mach-msm/gpiomux.c b/arch/arm/mach-msm/gpiomux.c deleted file mode 100644 index 2b8e2d2..0000000 --- a/arch/arm/mach-msm/gpiomux.c +++ /dev/null @@ -1,111 +0,0 @@ -/* Copyright (c) 2010, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA - * 02110-1301, USA. - */ -#include <linux/module.h> -#include <linux/spinlock.h> -#include "gpiomux.h" -#include "proc_comm.h" - -static DEFINE_SPINLOCK(gpiomux_lock); - -static void __msm_gpiomux_write(unsigned gpio, gpiomux_config_t val) -{ - unsigned tlmm_config = (val & ~GPIOMUX_CTL_MASK) | - ((gpio & 0x3ff) << 4); - unsigned tlmm_disable = 0; - int rc; - - rc = msm_proc_comm(PCOM_RPC_GPIO_TLMM_CONFIG_EX, - &tlmm_config, &tlmm_disable); - if (rc) - pr_err("%s: unexpected proc_comm failure %d: %08x %08x\n", - __func__, rc, tlmm_config, tlmm_disable); -} - -int msm_gpiomux_write(unsigned gpio, - gpiomux_config_t active, - gpiomux_config_t suspended) -{ - struct msm_gpiomux_config *cfg = msm_gpiomux_configs + gpio; - unsigned long irq_flags; - gpiomux_config_t setting; - - if (gpio >= GPIOMUX_NGPIOS) - return -EINVAL; - - spin_lock_irqsave(&gpiomux_lock, irq_flags); - - if (active & GPIOMUX_VALID) - cfg->active = active; - - if (suspended & GPIOMUX_VALID) - cfg->suspended = suspended; - - setting = cfg->ref ? active : suspended; - if (setting & GPIOMUX_VALID) - __msm_gpiomux_write(gpio, setting); - - spin_unlock_irqrestore(&gpiomux_lock, irq_flags); - return 0; -} -EXPORT_SYMBOL(msm_gpiomux_write); - -int msm_gpiomux_get(unsigned gpio) -{ - struct msm_gpiomux_config *cfg = msm_gpiomux_configs + gpio; - unsigned long irq_flags; - - if (gpio >= GPIOMUX_NGPIOS) - return -EINVAL; - - spin_lock_irqsave(&gpiomux_lock, irq_flags); - if (cfg->ref++ == 0 && cfg->active & GPIOMUX_VALID) - __msm_gpiomux_write(gpio, cfg->active); - spin_unlock_irqrestore(&gpiomux_lock, irq_flags); - return 0; -} -EXPORT_SYMBOL(msm_gpiomux_get); - -int msm_gpiomux_put(unsigned gpio) -{ - struct msm_gpiomux_config *cfg = msm_gpiomux_configs + gpio; - unsigned long irq_flags; - - if (gpio >= GPIOMUX_NGPIOS) - return -EINVAL; - - spin_lock_irqsave(&gpiomux_lock, irq_flags); - BUG_ON(cfg->ref == 0); - if (--cfg->ref == 0 && cfg->suspended & GPIOMUX_VALID) - __msm_gpiomux_write(gpio, cfg->suspended); - spin_unlock_irqrestore(&gpiomux_lock, irq_flags); - return 0; -} -EXPORT_SYMBOL(msm_gpiomux_put); - -static int __init gpiomux_init(void) -{ - unsigned n; - - for (n = 0; n < GPIOMUX_NGPIOS; ++n) { - msm_gpiomux_configs[n].ref = 0; - if (!(msm_gpiomux_configs[n].suspended & GPIOMUX_VALID)) - continue; - __msm_gpiomux_write(n, msm_gpiomux_configs[n].suspended); - } - return 0; -} -postcore_initcall(gpiomux_init); diff --git a/arch/arm/mach-msm/gpiomux.h b/arch/arm/mach-msm/gpiomux.h deleted file mode 100644 index 4410d77..0000000 --- a/arch/arm/mach-msm/gpiomux.h +++ /dev/null @@ -1,84 +0,0 @@ -/* Copyright (c) 2010, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA - * 02110-1301, USA. - */ -#ifndef __ARCH_ARM_MACH_MSM_GPIOMUX_H -#define __ARCH_ARM_MACH_MSM_GPIOMUX_H - -#include <linux/bitops.h> -#include <linux/errno.h> -#include <mach/msm_gpiomux.h> -#include "gpiomux-v1.h" - -/** - * struct msm_gpiomux_config: gpiomux settings for one gpio line. - * - * A complete gpiomux config is the bitwise-or of a drive-strength, - * function, and pull. For functions other than GPIO, the OE - * is hard-wired according to the function. For GPIO mode, - * OE is controlled by gpiolib. - * - * Available settings differ by target; see the gpiomux header - * specific to your target arch for available configurations. - * - * @active: The configuration to be installed when the line is - * active, or its reference count is > 0. - * @suspended: The configuration to be installed when the line - * is suspended, or its reference count is 0. - * @ref: The reference count of the line. For internal use of - * the gpiomux framework only. - */ -struct msm_gpiomux_config { - gpiomux_config_t active; - gpiomux_config_t suspended; - unsigned ref; -}; - -/** - * @GPIOMUX_VALID: If set, the config field contains 'good data'. - * The absence of this bit will prevent the gpiomux - * system from applying the configuration under all - * circumstances. - */ -enum { - GPIOMUX_VALID = BIT(sizeof(gpiomux_config_t) * BITS_PER_BYTE - 1), - GPIOMUX_CTL_MASK = GPIOMUX_VALID, -}; - -#ifdef CONFIG_MSM_GPIOMUX - -/* Each architecture must provide its own instance of this table. - * To avoid having gpiomux manage any given gpio, one or both of - * the entries can avoid setting GPIOMUX_VALID - the absence - * of that flag will prevent the configuration from being applied - * during state transitions. - */ -extern struct msm_gpiomux_config msm_gpiomux_configs[GPIOMUX_NGPIOS]; - -/* Install a new configuration to the gpio line. To avoid overwriting - * a configuration, leave the VALID bit out. - */ -int msm_gpiomux_write(unsigned gpio, - gpiomux_config_t active, - gpiomux_config_t suspended); -#else -static inline int msm_gpiomux_write(unsigned gpio, - gpiomux_config_t active, - gpiomux_config_t suspended) -{ - return -ENOSYS; -} -#endif -#endif diff --git a/arch/arm/mach-msm/include/mach/clk.h b/arch/arm/mach-msm/include/mach/clk.h deleted file mode 100644 index fd4f4a7..0000000 --- a/arch/arm/mach-msm/include/mach/clk.h +++ /dev/null @@ -1,31 +0,0 @@ -/* Copyright (c) 2009, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ -#ifndef __MACH_CLK_H -#define __MACH_CLK_H - -/* Magic rate value for use with PM QOS to request the board's maximum - * supported AXI rate. PM QOS will only pass positive s32 rate values - * through to the clock driver, so INT_MAX is used. - */ -#define MSM_AXI_MAX_FREQ LONG_MAX - -enum clk_reset_action { - CLK_RESET_DEASSERT = 0, - CLK_RESET_ASSERT = 1 -}; - -struct clk; - -/* Assert/Deassert reset to a hardware block associated with a clock */ -int clk_reset(struct clk *clk, enum clk_reset_action action); - -#endif diff --git a/arch/arm/mach-msm/include/mach/dma.h b/arch/arm/mach-msm/include/mach/dma.h deleted file mode 100644 index a72d48d..0000000 --- a/arch/arm/mach-msm/include/mach/dma.h +++ /dev/null @@ -1,151 +0,0 @@ -/* linux/include/asm-arm/arch-msm/dma.h - * - * Copyright (C) 2007 Google, Inc. - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#ifndef __ASM_ARCH_MSM_DMA_H - -#include <linux/list.h> - -struct msm_dmov_errdata { - uint32_t flush[6]; -}; - -struct msm_dmov_cmd { - struct list_head list; - unsigned int cmdptr; - void (*complete_func)(struct msm_dmov_cmd *cmd, - unsigned int result, - struct msm_dmov_errdata *err); - void (*execute_func)(struct msm_dmov_cmd *cmd); - void *data; -}; - -#ifndef CONFIG_ARCH_MSM8X60 -void msm_dmov_enqueue_cmd(unsigned id, struct msm_dmov_cmd *cmd); -void msm_dmov_stop_cmd(unsigned id, struct msm_dmov_cmd *cmd, int graceful); -int msm_dmov_exec_cmd(unsigned id, unsigned int cmdptr); -#else -static inline -void msm_dmov_enqueue_cmd(unsigned id, struct msm_dmov_cmd *cmd) { } -static inline -void msm_dmov_stop_cmd(unsigned id, struct msm_dmov_cmd *cmd, int graceful) { } -static inline -int msm_dmov_exec_cmd(unsigned id, unsigned int cmdptr) { return -EIO; } -#endif - -#define DMOV_CMD_LIST (0 << 29) /* does not work */ -#define DMOV_CMD_PTR_LIST (1 << 29) /* works */ -#define DMOV_CMD_INPUT_CFG (2 << 29) /* untested */ -#define DMOV_CMD_OUTPUT_CFG (3 << 29) /* untested */ -#define DMOV_CMD_ADDR(addr) ((addr) >> 3) - -#define DMOV_RSLT_VALID (1 << 31) /* 0 == host has empties result fifo */ -#define DMOV_RSLT_ERROR (1 << 3) -#define DMOV_RSLT_FLUSH (1 << 2) -#define DMOV_RSLT_DONE (1 << 1) /* top pointer done */ -#define DMOV_RSLT_USER (1 << 0) /* command with FR force result */ - -#define DMOV_STATUS_RSLT_COUNT(n) (((n) >> 29)) -#define DMOV_STATUS_CMD_COUNT(n) (((n) >> 27) & 3) -#define DMOV_STATUS_RSLT_VALID (1 << 1) -#define DMOV_STATUS_CMD_PTR_RDY (1 << 0) - -#define DMOV_CONFIG_FORCE_TOP_PTR_RSLT (1 << 2) -#define DMOV_CONFIG_FORCE_FLUSH_RSLT (1 << 1) -#define DMOV_CONFIG_IRQ_EN (1 << 0) - -/* channel assignments */ - -#define DMOV_NAND_CHAN 7 -#define DMOV_NAND_CRCI_CMD 5 -#define DMOV_NAND_CRCI_DATA 4 - -#define DMOV_SDC1_CHAN 8 -#define DMOV_SDC1_CRCI 6 - -#define DMOV_SDC2_CHAN 8 -#define DMOV_SDC2_CRCI 7 - -#define DMOV_TSIF_CHAN 10 -#define DMOV_TSIF_CRCI 10 - -#define DMOV_USB_CHAN 11 - -/* no client rate control ifc (eg, ram) */ -#define DMOV_NONE_CRCI 0 - - -/* If the CMD_PTR register has CMD_PTR_LIST selected, the data mover - * is going to walk a list of 32bit pointers as described below. Each - * pointer points to a *array* of dmov_s, etc structs. The last pointer - * in the list is marked with CMD_PTR_LP. The last struct in each array - * is marked with CMD_LC (see below). - */ -#define CMD_PTR_ADDR(addr) ((addr) >> 3) -#define CMD_PTR_LP (1 << 31) /* last pointer */ -#define CMD_PTR_PT (3 << 29) /* ? */ - -/* Single Item Mode */ -typedef struct { - unsigned cmd; - unsigned src; - unsigned dst; - unsigned len; -} dmov_s; - -/* Scatter/Gather Mode */ -typedef struct { - unsigned cmd; - unsigned src_dscr; - unsigned dst_dscr; - unsigned _reserved; -} dmov_sg; - -/* Box mode */ -typedef struct { - uint32_t cmd; - uint32_t src_row_addr; - uint32_t dst_row_addr; - uint32_t src_dst_len; - uint32_t num_rows; - uint32_t row_offset; -} dmov_box; - -/* bits for the cmd field of the above structures */ - -#define CMD_LC (1 << 31) /* last command */ -#define CMD_FR (1 << 22) /* force result -- does not work? */ -#define CMD_OCU (1 << 21) /* other channel unblock */ -#define CMD_OCB (1 << 20) /* other channel block */ -#define CMD_TCB (1 << 19) /* ? */ -#define CMD_DAH (1 << 18) /* destination address hold -- does not work?*/ -#define CMD_SAH (1 << 17) /* source address hold -- does not work? */ - -#define CMD_MODE_SINGLE (0 << 0) /* dmov_s structure used */ -#define CMD_MODE_SG (1 << 0) /* untested */ -#define CMD_MODE_IND_SG (2 << 0) /* untested */ -#define CMD_MODE_BOX (3 << 0) /* untested */ - -#define CMD_DST_SWAP_BYTES (1 << 14) /* exchange each byte n with byte n+1 */ -#define CMD_DST_SWAP_SHORTS (1 << 15) /* exchange each short n with short n+1 */ -#define CMD_DST_SWAP_WORDS (1 << 16) /* exchange each word n with word n+1 */ - -#define CMD_SRC_SWAP_BYTES (1 << 11) /* exchange each byte n with byte n+1 */ -#define CMD_SRC_SWAP_SHORTS (1 << 12) /* exchange each short n with short n+1 */ -#define CMD_SRC_SWAP_WORDS (1 << 13) /* exchange each word n with word n+1 */ - -#define CMD_DST_CRCI(n) (((n) & 15) << 7) -#define CMD_SRC_CRCI(n) (((n) & 15) << 3) - -#endif diff --git a/arch/arm/mach-msm/include/mach/entry-macro.S b/arch/arm/mach-msm/include/mach/entry-macro.S deleted file mode 100644 index f2ae9087..0000000 --- a/arch/arm/mach-msm/include/mach/entry-macro.S +++ /dev/null @@ -1,36 +0,0 @@ -/* Copyright (c) 2010, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA - * 02110-1301, USA. - * - */ - -#if !defined(CONFIG_ARM_GIC) -#include <mach/msm_iomap.h> - - .macro get_irqnr_preamble, base, tmp - @ enable imprecise aborts - cpsie a - mov \base, #MSM_VIC_BASE - .endm - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - @ 0xD0 has irq# or old irq# if the irq has been handled - @ 0xD4 has irq# or -1 if none pending *but* if you just - @ read 0xD4 you never get the first irq for some reason - ldr \irqnr, [\base, #0xD0] - ldr \irqnr, [\base, #0xD4] - cmp \irqnr, #0xffffffff - .endm -#endif diff --git a/arch/arm/mach-msm/include/mach/hardware.h b/arch/arm/mach-msm/include/mach/hardware.h deleted file mode 100644 index 2d12609..0000000 --- a/arch/arm/mach-msm/include/mach/hardware.h +++ /dev/null @@ -1,18 +0,0 @@ -/* arch/arm/mach-msm/include/mach/hardware.h - * - * Copyright (C) 2007 Google, Inc. - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#ifndef __ASM_ARCH_MSM_HARDWARE_H - -#endif diff --git a/arch/arm/mach-msm/include/mach/irqs-7x00.h b/arch/arm/mach-msm/include/mach/irqs-7x00.h deleted file mode 100644 index f1fe706..0000000 --- a/arch/arm/mach-msm/include/mach/irqs-7x00.h +++ /dev/null @@ -1,75 +0,0 @@ -/* - * Copyright (C) 2007 Google, Inc. - * Copyright (c) 2009, Code Aurora Forum. All rights reserved. - * Author: Brian Swetland <swetland@google.com> - */ - -#ifndef __ASM_ARCH_MSM_IRQS_7X00_H -#define __ASM_ARCH_MSM_IRQS_7X00_H - -/* MSM ARM11 Interrupt Numbers */ -/* See 80-VE113-1 A, pp219-221 */ - -#define INT_A9_M2A_0 0 -#define INT_A9_M2A_1 1 -#define INT_A9_M2A_2 2 -#define INT_A9_M2A_3 3 -#define INT_A9_M2A_4 4 -#define INT_A9_M2A_5 5 -#define INT_A9_M2A_6 6 -#define INT_GP_TIMER_EXP 7 -#define INT_DEBUG_TIMER_EXP 8 -#define INT_UART1 9 -#define INT_UART2 10 -#define INT_UART3 11 -#define INT_UART1_RX 12 -#define INT_UART2_RX 13 -#define INT_UART3_RX 14 -#define INT_USB_OTG 15 -#define INT_MDDI_PRI 16 -#define INT_MDDI_EXT 17 -#define INT_MDDI_CLIENT 18 -#define INT_MDP 19 -#define INT_GRAPHICS 20 -#define INT_ADM_AARM 21 -#define INT_ADSP_A11 22 -#define INT_ADSP_A9_A11 23 -#define INT_SDC1_0 24 -#define INT_SDC1_1 25 -#define INT_SDC2_0 26 -#define INT_SDC2_1 27 -#define INT_KEYSENSE 28 -#define INT_TCHSCRN_SSBI 29 -#define INT_TCHSCRN1 30 -#define INT_TCHSCRN2 31 - -#define INT_GPIO_GROUP1 (32 + 0) -#define INT_GPIO_GROUP2 (32 + 1) -#define INT_PWB_I2C (32 + 2) -#define INT_SOFTRESET (32 + 3) -#define INT_NAND_WR_ER_DONE (32 + 4) -#define INT_NAND_OP_DONE (32 + 5) -#define INT_PBUS_ARM11 (32 + 6) -#define INT_AXI_MPU_SMI (32 + 7) -#define INT_AXI_MPU_EBI1 (32 + 8) -#define INT_AD_HSSD (32 + 9) -#define INT_ARM11_PMU (32 + 10) -#define INT_ARM11_DMA (32 + 11) -#define INT_TSIF_IRQ (32 + 12) -#define INT_UART1DM_IRQ (32 + 13) -#define INT_UART1DM_RX (32 + 14) -#define INT_USB_HS (32 + 15) -#define INT_SDC3_0 (32 + 16) -#define INT_SDC3_1 (32 + 17) -#define INT_SDC4_0 (32 + 18) -#define INT_SDC4_1 (32 + 19) -#define INT_UART2DM_RX (32 + 20) -#define INT_UART2DM_IRQ (32 + 21) - -/* 22-31 are reserved */ - -#define NR_MSM_IRQS 64 -#define NR_GPIO_IRQS 122 -#define NR_BOARD_IRQS 64 - -#endif diff --git a/arch/arm/mach-msm/include/mach/irqs-7x30.h b/arch/arm/mach-msm/include/mach/irqs-7x30.h deleted file mode 100644 index 1f15902..0000000 --- a/arch/arm/mach-msm/include/mach/irqs-7x30.h +++ /dev/null @@ -1,153 +0,0 @@ -/* Copyright (c) 2009, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef __ASM_ARCH_MSM_IRQS_7X30_H -#define __ASM_ARCH_MSM_IRQS_7X30_H - -/* MSM ACPU Interrupt Numbers */ - -#define INT_DEBUG_TIMER_EXP 0 -#define INT_GPT0_TIMER_EXP 1 -#define INT_GPT1_TIMER_EXP 2 -#define INT_WDT0_ACCSCSSBARK 3 -#define INT_WDT1_ACCSCSSBARK 4 -#define INT_AVS_SVIC 5 -#define INT_AVS_SVIC_SW_DONE 6 -#define INT_SC_DBG_RX_FULL 7 -#define INT_SC_DBG_TX_EMPTY 8 -#define INT_ARM11_PM 9 -#define INT_AVS_REQ_DOWN 10 -#define INT_AVS_REQ_UP 11 -#define INT_SC_ACG 12 -/* SCSS_VICFIQSTS0[13:15] are RESERVED */ -#define INT_L2_SVICCPUIRPTREQ 16 -#define INT_L2_SVICDMANSIRPTREQ 17 -#define INT_L2_SVICDMASIRPTREQ 18 -#define INT_L2_SVICSLVIRPTREQ 19 -#define INT_AD5A_MPROC_APPS_0 20 -#define INT_AD5A_MPROC_APPS_1 21 -#define INT_A9_M2A_0 22 -#define INT_A9_M2A_1 23 -#define INT_A9_M2A_2 24 -#define INT_A9_M2A_3 25 -#define INT_A9_M2A_4 26 -#define INT_A9_M2A_5 27 -#define INT_A9_M2A_6 28 -#define INT_A9_M2A_7 29 -#define INT_A9_M2A_8 30 -#define INT_A9_M2A_9 31 - -#define INT_AXI_EBI1_SC (32 + 0) -#define INT_IMEM_ERR (32 + 1) -#define INT_AXI_EBI0_SC (32 + 2) -#define INT_PBUS_SC_IRQC (32 + 3) -#define INT_PERPH_BUS_BPM (32 + 4) -#define INT_CC_TEMP_SENSE (32 + 5) -#define INT_UXMC_EBI0 (32 + 6) -#define INT_UXMC_EBI1 (32 + 7) -#define INT_EBI2_OP_DONE (32 + 8) -#define INT_EBI2_WR_ER_DONE (32 + 9) -#define INT_TCSR_SPSS_CE (32 + 10) -#define INT_EMDH (32 + 11) -#define INT_PMDH (32 + 12) -#define INT_MDC (32 + 13) -#define INT_MIDI_TO_SUPSS (32 + 14) -#define INT_LPA_2 (32 + 15) -#define INT_GPIO_GROUP1_SECURE (32 + 16) -#define INT_GPIO_GROUP2_SECURE (32 + 17) -#define INT_GPIO_GROUP1 (32 + 18) -#define INT_GPIO_GROUP2 (32 + 19) -#define INT_MPRPH_SOFTRESET (32 + 20) -#define INT_PWB_I2C (32 + 21) -#define INT_PWB_I2C_2 (32 + 22) -#define INT_TSSC_SAMPLE (32 + 23) -#define INT_TSSC_PENUP (32 + 24) -#define INT_TCHSCRN_SSBI (32 + 25) -#define INT_FM_RDS (32 + 26) -#define INT_KEYSENSE (32 + 27) -#define INT_USB_OTG_HS (32 + 28) -#define INT_USB_OTG_HS2 (32 + 29) -#define INT_USB_OTG_HS3 (32 + 30) -#define INT_CSI (32 + 31) - -#define INT_SPI_OUTPUT (64 + 0) -#define INT_SPI_INPUT (64 + 1) -#define INT_SPI_ERROR (64 + 2) -#define INT_UART1 (64 + 3) -#define INT_UART1_RX (64 + 4) -#define INT_UART2 (64 + 5) -#define INT_UART2_RX (64 + 6) -#define INT_UART3 (64 + 7) -#define INT_UART3_RX (64 + 8) -#define INT_UART1DM_IRQ (64 + 9) -#define INT_UART1DM_RX (64 + 10) -#define INT_UART2DM_IRQ (64 + 11) -#define INT_UART2DM_RX (64 + 12) -#define INT_TSIF (64 + 13) -#define INT_ADM_SC1 (64 + 14) -#define INT_ADM_SC2 (64 + 15) -#define INT_MDP (64 + 16) -#define INT_VPE (64 + 17) -#define INT_GRP_2D (64 + 18) -#define INT_GRP_3D (64 + 19) -#define INT_ROTATOR (64 + 20) -#define INT_MFC720 (64 + 21) -#define INT_JPEG (64 + 22) -#define INT_VFE (64 + 23) -#define INT_TV_ENC (64 + 24) -#define INT_PMIC_SSBI (64 + 25) -#define INT_MPM_1 (64 + 26) -#define INT_TCSR_SPSS_SAMPLE (64 + 27) -#define INT_TCSR_SPSS_PENUP (64 + 28) -#define INT_MPM_2 (64 + 29) -#define INT_SDC1_0 (64 + 30) -#define INT_SDC1_1 (64 + 31) - -#define INT_SDC3_0 (96 + 0) -#define INT_SDC3_1 (96 + 1) -#define INT_SDC2_0 (96 + 2) -#define INT_SDC2_1 (96 + 3) -#define INT_SDC4_0 (96 + 4) -#define INT_SDC4_1 (96 + 5) -#define INT_PWB_QUP_IN (96 + 6) -#define INT_PWB_QUP_OUT (96 + 7) -#define INT_PWB_QUP_ERR (96 + 8) -#define INT_SCSS_WDT0_BITE (96 + 9) -/* SCSS_VICFIQSTS3[10:31] are RESERVED */ - -/* Retrofit universal macro names */ -#define INT_ADM_AARM INT_ADM_SC2 -#define INT_USB_HS INT_USB_OTG_HS -#define INT_USB_OTG INT_USB_OTG_HS -#define INT_TCHSCRN1 INT_TSSC_SAMPLE -#define INT_TCHSCRN2 INT_TSSC_PENUP -#define INT_GP_TIMER_EXP INT_GPT0_TIMER_EXP -#define INT_ADSP_A11 INT_AD5A_MPROC_APPS_0 -#define INT_ADSP_A9_A11 INT_AD5A_MPROC_APPS_1 -#define INT_MDDI_EXT INT_EMDH -#define INT_MDDI_PRI INT_PMDH -#define INT_MDDI_CLIENT INT_MDC -#define INT_NAND_WR_ER_DONE INT_EBI2_WR_ER_DONE -#define INT_NAND_OP_DONE INT_EBI2_OP_DONE - -#define NR_MSM_IRQS 128 -#define NR_GPIO_IRQS 182 -#define PMIC8058_IRQ_BASE (NR_MSM_IRQS + NR_GPIO_IRQS) -#define NR_PMIC8058_GPIO_IRQS 40 -#define NR_PMIC8058_MPP_IRQS 12 -#define NR_PMIC8058_MISC_IRQS 8 -#define NR_PMIC8058_IRQS (NR_PMIC8058_GPIO_IRQS +\ - NR_PMIC8058_MPP_IRQS +\ - NR_PMIC8058_MISC_IRQS) -#define NR_BOARD_IRQS NR_PMIC8058_IRQS - -#endif /* __ASM_ARCH_MSM_IRQS_7X30_H */ diff --git a/arch/arm/mach-msm/include/mach/irqs-8x50.h b/arch/arm/mach-msm/include/mach/irqs-8x50.h deleted file mode 100644 index 26adbe0..0000000 --- a/arch/arm/mach-msm/include/mach/irqs-8x50.h +++ /dev/null @@ -1,88 +0,0 @@ -/* Copyright (c) 2008-2009, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef __ASM_ARCH_MSM_IRQS_8XXX_H -#define __ASM_ARCH_MSM_IRQS_8XXX_H - -/* MSM ACPU Interrupt Numbers */ - -#define INT_A9_M2A_0 0 -#define INT_A9_M2A_1 1 -#define INT_A9_M2A_2 2 -#define INT_A9_M2A_3 3 -#define INT_A9_M2A_4 4 -#define INT_A9_M2A_5 5 -#define INT_A9_M2A_6 6 -#define INT_GP_TIMER_EXP 7 -#define INT_DEBUG_TIMER_EXP 8 -#define INT_SIRC_0 9 -#define INT_SDC3_0 10 -#define INT_SDC3_1 11 -#define INT_SDC4_0 12 -#define INT_SDC4_1 13 -#define INT_AD6_EXT_VFR 14 -#define INT_USB_OTG 15 -#define INT_MDDI_PRI 16 -#define INT_MDDI_EXT 17 -#define INT_MDDI_CLIENT 18 -#define INT_MDP 19 -#define INT_GRAPHICS 20 -#define INT_ADM_AARM 21 -#define INT_ADSP_A11 22 -#define INT_ADSP_A9_A11 23 -#define INT_SDC1_0 24 -#define INT_SDC1_1 25 -#define INT_SDC2_0 26 -#define INT_SDC2_1 27 -#define INT_KEYSENSE 28 -#define INT_TCHSCRN_SSBI 29 -#define INT_TCHSCRN1 30 -#define INT_TCHSCRN2 31 - -#define INT_TCSR_MPRPH_SC1 (32 + 0) -#define INT_USB_FS2 (32 + 1) -#define INT_PWB_I2C (32 + 2) -#define INT_SOFTRESET (32 + 3) -#define INT_NAND_WR_ER_DONE (32 + 4) -#define INT_NAND_OP_DONE (32 + 5) -#define INT_TCSR_MPRPH_SC2 (32 + 6) -#define INT_OP_PEN (32 + 7) -#define INT_AD_HSSD (32 + 8) -#define INT_ARM11_PM (32 + 9) -#define INT_SDMA_NON_SECURE (32 + 10) -#define INT_TSIF_IRQ (32 + 11) -#define INT_UART1DM_IRQ (32 + 12) -#define INT_UART1DM_RX (32 + 13) -#define INT_SDMA_SECURE (32 + 14) -#define INT_SI2S_SLAVE (32 + 15) -#define INT_SC_I2CPU (32 + 16) -#define INT_SC_DBG_RDTRFULL (32 + 17) -#define INT_SC_DBG_WDTRFULL (32 + 18) -#define INT_SCPLL_CTL_DONE (32 + 19) -#define INT_UART2DM_IRQ (32 + 20) -#define INT_UART2DM_RX (32 + 21) -#define INT_VDC_MEC (32 + 22) -#define INT_VDC_DB (32 + 23) -#define INT_VDC_AXI (32 + 24) -#define INT_VFE (32 + 25) -#define INT_USB_HS (32 + 26) -#define INT_AUDIO_OUT0 (32 + 27) -#define INT_AUDIO_OUT1 (32 + 28) -#define INT_CRYPTO (32 + 29) -#define INT_AD6M_IDLE (32 + 30) -#define INT_SIRC_1 (32 + 31) - -#define NR_GPIO_IRQS 165 -#define NR_MSM_IRQS 64 -#define NR_BOARD_IRQS 64 - -#endif diff --git a/arch/arm/mach-msm/include/mach/irqs.h b/arch/arm/mach-msm/include/mach/irqs.h deleted file mode 100644 index 164d355..0000000 --- a/arch/arm/mach-msm/include/mach/irqs.h +++ /dev/null @@ -1,37 +0,0 @@ -/* - * Copyright (C) 2007 Google, Inc. - * Copyright (c) 2008-2010, Code Aurora Forum. All rights reserved. - * Author: Brian Swetland <swetland@google.com> - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#ifndef __ASM_ARCH_MSM_IRQS_H -#define __ASM_ARCH_MSM_IRQS_H - -#define MSM_IRQ_BIT(irq) (1 << ((irq) & 31)) - -#if defined(CONFIG_ARCH_MSM7X30) -#include "irqs-7x30.h" -#elif defined(CONFIG_ARCH_QSD8X50) -#include "irqs-8x50.h" -#include "sirc.h" -#elif defined(CONFIG_ARCH_MSM_ARM11) -#include "irqs-7x00.h" -#else -#error "Unknown architecture specification" -#endif - -#define NR_IRQS (NR_MSM_IRQS + NR_GPIO_IRQS + NR_BOARD_IRQS) -#define MSM_GPIO_TO_INT(n) (NR_MSM_IRQS + (n)) -#define MSM_INT_TO_REG(base, irq) (base + irq / 32) - -#endif diff --git a/arch/arm/mach-msm/include/mach/msm_gpiomux.h b/arch/arm/mach-msm/include/mach/msm_gpiomux.h deleted file mode 100644 index 0c7d393..0000000 --- a/arch/arm/mach-msm/include/mach/msm_gpiomux.h +++ /dev/null @@ -1,38 +0,0 @@ -/* Copyright (c) 2011, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef _LINUX_MSM_GPIOMUX_H -#define _LINUX_MSM_GPIOMUX_H - -#ifdef CONFIG_MSM_GPIOMUX - -/* Increment a gpio's reference count, possibly activating the line. */ -int __must_check msm_gpiomux_get(unsigned gpio); - -/* Decrement a gpio's reference count, possibly suspending the line. */ -int msm_gpiomux_put(unsigned gpio); - -#else - -static inline int __must_check msm_gpiomux_get(unsigned gpio) -{ - return -ENOSYS; -} - -static inline int msm_gpiomux_put(unsigned gpio) -{ - return -ENOSYS; -} - -#endif - -#endif /* _LINUX_MSM_GPIOMUX_H */ diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h b/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h deleted file mode 100644 index 67dc0e9..0000000 --- a/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h +++ /dev/null @@ -1,108 +0,0 @@ -/* arch/arm/mach-msm/include/mach/msm_iomap.h - * - * Copyright (C) 2007 Google, Inc. - * Copyright (c) 2011, Code Aurora Forum. All rights reserved. - * Author: Brian Swetland <swetland@google.com> - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * - * The MSM peripherals are spread all over across 768MB of physical - * space, which makes just having a simple IO_ADDRESS macro to slide - * them into the right virtual location rough. Instead, we will - * provide a master phys->virt mapping for peripherals here. - * - */ - -#ifndef __ASM_ARCH_MSM_IOMAP_7X00_H -#define __ASM_ARCH_MSM_IOMAP_7X00_H - -#include <asm/sizes.h> - -/* Physical base address and size of peripherals. - * Ordered by the virtual base addresses they will be mapped at. - * - * MSM_VIC_BASE must be an value that can be loaded via a "mov" - * instruction, otherwise entry-macro.S will not compile. - * - * If you add or remove entries here, you'll want to edit the - * msm_io_desc array in arch/arm/mach-msm/io.c to reflect your - * changes. - * - */ - -#define MSM_VIC_BASE IOMEM(0xE0000000) -#define MSM_VIC_PHYS 0xC0000000 -#define MSM_VIC_SIZE SZ_4K - -#define MSM7X00_CSR_PHYS 0xC0100000 -#define MSM7X00_CSR_SIZE SZ_4K - -#define MSM_DMOV_BASE IOMEM(0xE0002000) -#define MSM_DMOV_PHYS 0xA9700000 -#define MSM_DMOV_SIZE SZ_4K - -#define MSM7X00_GPIO1_PHYS 0xA9200000 -#define MSM7X00_GPIO1_SIZE SZ_4K - -#define MSM7X00_GPIO2_PHYS 0xA9300000 -#define MSM7X00_GPIO2_SIZE SZ_4K - -#define MSM_CLK_CTL_BASE IOMEM(0xE0005000) -#define MSM_CLK_CTL_PHYS 0xA8600000 -#define MSM_CLK_CTL_SIZE SZ_4K - -#define MSM_SHARED_RAM_BASE IOMEM(0xE0100000) -#define MSM_SHARED_RAM_PHYS 0x01F00000 -#define MSM_SHARED_RAM_SIZE SZ_1M - -#define MSM_UART1_PHYS 0xA9A00000 -#define MSM_UART1_SIZE SZ_4K - -#define MSM_UART2_PHYS 0xA9B00000 -#define MSM_UART2_SIZE SZ_4K - -#define MSM_UART3_PHYS 0xA9C00000 -#define MSM_UART3_SIZE SZ_4K - -#define MSM_SDC1_PHYS 0xA0400000 -#define MSM_SDC1_SIZE SZ_4K - -#define MSM_SDC2_PHYS 0xA0500000 -#define MSM_SDC2_SIZE SZ_4K - -#define MSM_SDC3_PHYS 0xA0600000 -#define MSM_SDC3_SIZE SZ_4K - -#define MSM_SDC4_PHYS 0xA0700000 -#define MSM_SDC4_SIZE SZ_4K - -#define MSM_I2C_PHYS 0xA9900000 -#define MSM_I2C_SIZE SZ_4K - -#define MSM_HSUSB_PHYS 0xA0800000 -#define MSM_HSUSB_SIZE SZ_4K - -#define MSM_PMDH_PHYS 0xAA600000 -#define MSM_PMDH_SIZE SZ_4K - -#define MSM_EMDH_PHYS 0xAA700000 -#define MSM_EMDH_SIZE SZ_4K - -#define MSM_MDP_PHYS 0xAA200000 -#define MSM_MDP_SIZE 0x000F0000 - -#define MSM_MDC_PHYS 0xAA500000 -#define MSM_MDC_SIZE SZ_1M - -#define MSM_AD5_PHYS 0xAC000000 -#define MSM_AD5_SIZE (SZ_1M*13) - -#endif diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h b/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h deleted file mode 100644 index 198202c..0000000 --- a/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h +++ /dev/null @@ -1,103 +0,0 @@ -/* - * Copyright (C) 2007 Google, Inc. - * Copyright (c) 2008-2011 Code Aurora Forum. All rights reserved. - * Author: Brian Swetland <swetland@google.com> - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * - * The MSM peripherals are spread all over across 768MB of physical - * space, which makes just having a simple IO_ADDRESS macro to slide - * them into the right virtual location rough. Instead, we will - * provide a master phys->virt mapping for peripherals here. - * - */ - -#ifndef __ASM_ARCH_MSM_IOMAP_7X30_H -#define __ASM_ARCH_MSM_IOMAP_7X30_H - -/* Physical base address and size of peripherals. - * Ordered by the virtual base addresses they will be mapped at. - * - * MSM_VIC_BASE must be an value that can be loaded via a "mov" - * instruction, otherwise entry-macro.S will not compile. - * - * If you add or remove entries here, you'll want to edit the - * msm_io_desc array in arch/arm/mach-msm/io.c to reflect your - * changes. - * - */ - -#define MSM_VIC_BASE IOMEM(0xE0000000) -#define MSM_VIC_PHYS 0xC0080000 -#define MSM_VIC_SIZE SZ_4K - -#define MSM7X30_CSR_PHYS 0xC0100000 -#define MSM7X30_CSR_SIZE SZ_4K - -#define MSM_DMOV_BASE IOMEM(0xE0002000) -#define MSM_DMOV_PHYS 0xAC400000 -#define MSM_DMOV_SIZE SZ_4K - -#define MSM7X30_GPIO1_PHYS 0xAC001000 -#define MSM7X30_GPIO1_SIZE SZ_4K - -#define MSM7X30_GPIO2_PHYS 0xAC101000 -#define MSM7X30_GPIO2_SIZE SZ_4K - -#define MSM_CLK_CTL_BASE IOMEM(0xE0005000) -#define MSM_CLK_CTL_PHYS 0xAB800000 -#define MSM_CLK_CTL_SIZE SZ_4K - -#define MSM_CLK_CTL_SH2_BASE IOMEM(0xE0006000) -#define MSM_CLK_CTL_SH2_PHYS 0xABA01000 -#define MSM_CLK_CTL_SH2_SIZE SZ_4K - -#define MSM_ACC_BASE IOMEM(0xE0007000) -#define MSM_ACC_PHYS 0xC0101000 -#define MSM_ACC_SIZE SZ_4K - -#define MSM_SAW_BASE IOMEM(0xE0008000) -#define MSM_SAW_PHYS 0xC0102000 -#define MSM_SAW_SIZE SZ_4K - -#define MSM_GCC_BASE IOMEM(0xE0009000) -#define MSM_GCC_PHYS 0xC0182000 -#define MSM_GCC_SIZE SZ_4K - -#define MSM_TCSR_BASE IOMEM(0xE000A000) -#define MSM_TCSR_PHYS 0xAB600000 -#define MSM_TCSR_SIZE SZ_4K - -#define MSM_SHARED_RAM_BASE IOMEM(0xE0100000) -#define MSM_SHARED_RAM_PHYS 0x00100000 -#define MSM_SHARED_RAM_SIZE SZ_1M - -#define MSM_UART1_PHYS 0xACA00000 -#define MSM_UART1_SIZE SZ_4K - -#define MSM_UART2_PHYS 0xACB00000 -#define MSM_UART2_SIZE SZ_4K - -#define MSM_UART3_PHYS 0xACC00000 -#define MSM_UART3_SIZE SZ_4K - -#define MSM_MDC_BASE IOMEM(0xE0200000) -#define MSM_MDC_PHYS 0xAA500000 -#define MSM_MDC_SIZE SZ_1M - -#define MSM_AD5_BASE IOMEM(0xE0300000) -#define MSM_AD5_PHYS 0xA7000000 -#define MSM_AD5_SIZE (SZ_1M*13) - -#define MSM_HSUSB_PHYS 0xA3600000 -#define MSM_HSUSB_SIZE SZ_1K - -#endif diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h b/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h deleted file mode 100644 index 0faa894..0000000 --- a/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h +++ /dev/null @@ -1,125 +0,0 @@ -/* - * Copyright (C) 2007 Google, Inc. - * Copyright (c) 2008-2011 Code Aurora Forum. All rights reserved. - * Author: Brian Swetland <swetland@google.com> - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * - * The MSM peripherals are spread all over across 768MB of physical - * space, which makes just having a simple IO_ADDRESS macro to slide - * them into the right virtual location rough. Instead, we will - * provide a master phys->virt mapping for peripherals here. - * - */ - -#ifndef __ASM_ARCH_MSM_IOMAP_8X50_H -#define __ASM_ARCH_MSM_IOMAP_8X50_H - -/* Physical base address and size of peripherals. - * Ordered by the virtual base addresses they will be mapped at. - * - * MSM_VIC_BASE must be an value that can be loaded via a "mov" - * instruction, otherwise entry-macro.S will not compile. - * - * If you add or remove entries here, you'll want to edit the - * msm_io_desc array in arch/arm/mach-msm/io.c to reflect your - * changes. - * - */ - -#define MSM_VIC_BASE IOMEM(0xE0000000) -#define MSM_VIC_PHYS 0xAC000000 -#define MSM_VIC_SIZE SZ_4K - -#define QSD8X50_CSR_PHYS 0xAC100000 -#define QSD8X50_CSR_SIZE SZ_4K - -#define MSM_DMOV_BASE IOMEM(0xE0002000) -#define MSM_DMOV_PHYS 0xA9700000 -#define MSM_DMOV_SIZE SZ_4K - -#define QSD8X50_GPIO1_PHYS 0xA9000000 -#define QSD8X50_GPIO1_SIZE SZ_4K - -#define QSD8X50_GPIO2_PHYS 0xA9100000 -#define QSD8X50_GPIO2_SIZE SZ_4K - -#define MSM_CLK_CTL_BASE IOMEM(0xE0005000) -#define MSM_CLK_CTL_PHYS 0xA8600000 -#define MSM_CLK_CTL_SIZE SZ_4K - -#define MSM_SIRC_BASE IOMEM(0xE1006000) -#define MSM_SIRC_PHYS 0xAC200000 -#define MSM_SIRC_SIZE SZ_4K - -#define MSM_SCPLL_BASE IOMEM(0xE1007000) -#define MSM_SCPLL_PHYS 0xA8800000 -#define MSM_SCPLL_SIZE SZ_4K - -#ifdef CONFIG_MSM_SOC_REV_A -#define MSM_SMI_BASE 0xE0000000 -#else -#define MSM_SMI_BASE 0x00000000 -#endif - -#define MSM_SHARED_RAM_BASE IOMEM(0xE0100000) -#define MSM_SHARED_RAM_PHYS (MSM_SMI_BASE + 0x00100000) -#define MSM_SHARED_RAM_SIZE SZ_1M - -#define MSM_UART1_PHYS 0xA9A00000 -#define MSM_UART1_SIZE SZ_4K - -#define MSM_UART2_PHYS 0xA9B00000 -#define MSM_UART2_SIZE SZ_4K - -#define MSM_UART3_PHYS 0xA9C00000 -#define MSM_UART3_SIZE SZ_4K - -#define MSM_MDC_BASE IOMEM(0xE0200000) -#define MSM_MDC_PHYS 0xAA500000 -#define MSM_MDC_SIZE SZ_1M - -#define MSM_AD5_BASE IOMEM(0xE0300000) -#define MSM_AD5_PHYS 0xAC000000 -#define MSM_AD5_SIZE (SZ_1M*13) - - -#define MSM_I2C_SIZE SZ_4K -#define MSM_I2C_PHYS 0xA9900000 - -#define MSM_HSUSB_PHYS 0xA0800000 -#define MSM_HSUSB_SIZE SZ_1K - -#define MSM_NAND_PHYS 0xA0A00000 - - -#define MSM_TSIF_PHYS (0xa0100000) -#define MSM_TSIF_SIZE (0x200) - -#define MSM_TSSC_PHYS 0xAA300000 - -#define MSM_UART1DM_PHYS 0xA0200000 -#define MSM_UART2DM_PHYS 0xA0900000 - - -#define MSM_SDC1_PHYS 0xA0300000 -#define MSM_SDC1_SIZE SZ_4K - -#define MSM_SDC2_PHYS 0xA0400000 -#define MSM_SDC2_SIZE SZ_4K - -#define MSM_SDC3_PHYS 0xA0500000 -#define MSM_SDC3_SIZE SZ_4K - -#define MSM_SDC4_PHYS 0xA0600000 -#define MSM_SDC4_SIZE SZ_4K - -#endif diff --git a/arch/arm/mach-msm/include/mach/msm_iomap.h b/arch/arm/mach-msm/include/mach/msm_iomap.h deleted file mode 100644 index 0e4f491..0000000 --- a/arch/arm/mach-msm/include/mach/msm_iomap.h +++ /dev/null @@ -1,53 +0,0 @@ -/* - * Copyright (C) 2007 Google, Inc. - * Copyright (c) 2008-2011, Code Aurora Forum. All rights reserved. - * Author: Brian Swetland <swetland@google.com> - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * - * The MSM peripherals are spread all over across 768MB of physical - * space, which makes just having a simple IO_ADDRESS macro to slide - * them into the right virtual location rough. Instead, we will - * provide a master phys->virt mapping for peripherals here. - * - */ - -#ifndef __ASM_ARCH_MSM_IOMAP_H -#define __ASM_ARCH_MSM_IOMAP_H - -#include <asm/sizes.h> - -/* Physical base address and size of peripherals. - * Ordered by the virtual base addresses they will be mapped at. - * - * MSM_VIC_BASE must be an value that can be loaded via a "mov" - * instruction, otherwise entry-macro.S will not compile. - * - * If you add or remove entries here, you'll want to edit the - * msm_io_desc array in arch/arm/mach-msm/io.c to reflect your - * changes. - * - */ - -#if defined(CONFIG_ARCH_MSM7X30) -#include "msm_iomap-7x30.h" -#elif defined(CONFIG_ARCH_QSD8X50) -#include "msm_iomap-8x50.h" -#else -#include "msm_iomap-7x00.h" -#endif - -/* Virtual addresses shared across all MSM targets. */ -#define MSM_CSR_BASE IOMEM(0xE0001000) -#define MSM_GPIO1_BASE IOMEM(0xE0003000) -#define MSM_GPIO2_BASE IOMEM(0xE0004000) - -#endif diff --git a/arch/arm/mach-msm/include/mach/msm_smd.h b/arch/arm/mach-msm/include/mach/msm_smd.h deleted file mode 100644 index 029463e..0000000 --- a/arch/arm/mach-msm/include/mach/msm_smd.h +++ /dev/null @@ -1,109 +0,0 @@ -/* linux/include/asm-arm/arch-msm/msm_smd.h - * - * Copyright (C) 2007 Google, Inc. - * Author: Brian Swetland <swetland@google.com> - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#ifndef __ASM_ARCH_MSM_SMD_H -#define __ASM_ARCH_MSM_SMD_H - -typedef struct smd_channel smd_channel_t; - -extern int (*msm_check_for_modem_crash)(void); - -/* warning: notify() may be called before open returns */ -int smd_open(const char *name, smd_channel_t **ch, void *priv, - void (*notify)(void *priv, unsigned event)); - -#define SMD_EVENT_DATA 1 -#define SMD_EVENT_OPEN 2 -#define SMD_EVENT_CLOSE 3 - -int smd_close(smd_channel_t *ch); - -/* passing a null pointer for data reads and discards */ -int smd_read(smd_channel_t *ch, void *data, int len); - -/* Write to stream channels may do a partial write and return -** the length actually written. -** Write to packet channels will never do a partial write -- -** it will return the requested length written or an error. -*/ -int smd_write(smd_channel_t *ch, const void *data, int len); -int smd_write_atomic(smd_channel_t *ch, const void *data, int len); - -int smd_write_avail(smd_channel_t *ch); -int smd_read_avail(smd_channel_t *ch); - -/* Returns the total size of the current packet being read. -** Returns 0 if no packets available or a stream channel. -*/ -int smd_cur_packet_size(smd_channel_t *ch); - -/* used for tty unthrottling and the like -- causes the notify() -** callback to be called from the same lock context as is used -** when it is called from channel updates -*/ -void smd_kick(smd_channel_t *ch); - - -#if 0 -/* these are interruptable waits which will block you until the specified -** number of bytes are readable or writable. -*/ -int smd_wait_until_readable(smd_channel_t *ch, int bytes); -int smd_wait_until_writable(smd_channel_t *ch, int bytes); -#endif - -typedef enum { - SMD_PORT_DS = 0, - SMD_PORT_DIAG, - SMD_PORT_RPC_CALL, - SMD_PORT_RPC_REPLY, - SMD_PORT_BT, - SMD_PORT_CONTROL, - SMD_PORT_MEMCPY_SPARE1, - SMD_PORT_DATA1, - SMD_PORT_DATA2, - SMD_PORT_DATA3, - SMD_PORT_DATA4, - SMD_PORT_DATA5, - SMD_PORT_DATA6, - SMD_PORT_DATA7, - SMD_PORT_DATA8, - SMD_PORT_DATA9, - SMD_PORT_DATA10, - SMD_PORT_DATA11, - SMD_PORT_DATA12, - SMD_PORT_DATA13, - SMD_PORT_DATA14, - SMD_PORT_DATA15, - SMD_PORT_DATA16, - SMD_PORT_DATA17, - SMD_PORT_DATA18, - SMD_PORT_DATA19, - SMD_PORT_DATA20, - SMD_PORT_GPS_NMEA, - SMD_PORT_BRIDGE_1, - SMD_PORT_BRIDGE_2, - SMD_PORT_BRIDGE_3, - SMD_PORT_BRIDGE_4, - SMD_PORT_BRIDGE_5, - SMD_PORT_LOOPBACK, - SMD_PORT_CS_APPS_MODEM, - SMD_PORT_CS_APPS_DSP, - SMD_PORT_CS_MODEM_DSP, - SMD_NUM_PORTS, -} smd_port_id_type; - -#endif diff --git a/arch/arm/mach-msm/include/mach/sirc.h b/arch/arm/mach-msm/include/mach/sirc.h deleted file mode 100644 index ef55868..0000000 --- a/arch/arm/mach-msm/include/mach/sirc.h +++ /dev/null @@ -1,98 +0,0 @@ -/* Copyright (c) 2008-2009, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef __ASM_ARCH_MSM_SIRC_H -#define __ASM_ARCH_MSM_SIRC_H - -struct sirc_regs_t { - void *int_enable; - void *int_enable_clear; - void *int_enable_set; - void *int_type; - void *int_polarity; - void *int_clear; -}; - -struct sirc_cascade_regs { - void *int_status; - unsigned int cascade_irq; -}; - -void msm_init_sirc(void); -void msm_sirc_enter_sleep(void); -void msm_sirc_exit_sleep(void); - -#if defined(CONFIG_ARCH_MSM_SCORPION) - -#include <mach/msm_iomap.h> - -/* - * Secondary interrupt controller interrupts - */ - -#define FIRST_SIRC_IRQ (NR_MSM_IRQS + NR_GPIO_IRQS) - -#define INT_UART1 (FIRST_SIRC_IRQ + 0) -#define INT_UART2 (FIRST_SIRC_IRQ + 1) -#define INT_UART3 (FIRST_SIRC_IRQ + 2) -#define INT_UART1_RX (FIRST_SIRC_IRQ + 3) -#define INT_UART2_RX (FIRST_SIRC_IRQ + 4) -#define INT_UART3_RX (FIRST_SIRC_IRQ + 5) -#define INT_SPI_INPUT (FIRST_SIRC_IRQ + 6) -#define INT_SPI_OUTPUT (FIRST_SIRC_IRQ + 7) -#define INT_SPI_ERROR (FIRST_SIRC_IRQ + 8) -#define INT_GPIO_GROUP1 (FIRST_SIRC_IRQ + 9) -#define INT_GPIO_GROUP2 (FIRST_SIRC_IRQ + 10) -#define INT_GPIO_GROUP1_SECURE (FIRST_SIRC_IRQ + 11) -#define INT_GPIO_GROUP2_SECURE (FIRST_SIRC_IRQ + 12) -#define INT_AVS_SVIC (FIRST_SIRC_IRQ + 13) -#define INT_AVS_REQ_UP (FIRST_SIRC_IRQ + 14) -#define INT_AVS_REQ_DOWN (FIRST_SIRC_IRQ + 15) -#define INT_PBUS_ERR (FIRST_SIRC_IRQ + 16) -#define INT_AXI_ERR (FIRST_SIRC_IRQ + 17) -#define INT_SMI_ERR (FIRST_SIRC_IRQ + 18) -#define INT_EBI1_ERR (FIRST_SIRC_IRQ + 19) -#define INT_IMEM_ERR (FIRST_SIRC_IRQ + 20) -#define INT_TEMP_SENSOR (FIRST_SIRC_IRQ + 21) -#define INT_TV_ENC (FIRST_SIRC_IRQ + 22) -#define INT_GRP2D (FIRST_SIRC_IRQ + 23) -#define INT_GSBI_QUP (FIRST_SIRC_IRQ + 24) -#define INT_SC_ACG (FIRST_SIRC_IRQ + 25) -#define INT_WDT0 (FIRST_SIRC_IRQ + 26) -#define INT_WDT1 (FIRST_SIRC_IRQ + 27) - -#if defined(CONFIG_MSM_SOC_REV_A) -#define NR_SIRC_IRQS 28 -#define SIRC_MASK 0x0FFFFFFF -#else -#define NR_SIRC_IRQS 23 -#define SIRC_MASK 0x007FFFFF -#endif - -#define LAST_SIRC_IRQ (FIRST_SIRC_IRQ + NR_SIRC_IRQS - 1) - -#define SPSS_SIRC_INT_SELECT (MSM_SIRC_BASE + 0x00) -#define SPSS_SIRC_INT_ENABLE (MSM_SIRC_BASE + 0x04) -#define SPSS_SIRC_INT_ENABLE_CLEAR (MSM_SIRC_BASE + 0x08) -#define SPSS_SIRC_INT_ENABLE_SET (MSM_SIRC_BASE + 0x0C) -#define SPSS_SIRC_INT_TYPE (MSM_SIRC_BASE + 0x10) -#define SPSS_SIRC_INT_POLARITY (MSM_SIRC_BASE + 0x14) -#define SPSS_SIRC_SECURITY (MSM_SIRC_BASE + 0x18) -#define SPSS_SIRC_IRQ_STATUS (MSM_SIRC_BASE + 0x1C) -#define SPSS_SIRC_IRQ1_STATUS (MSM_SIRC_BASE + 0x20) -#define SPSS_SIRC_RAW_STATUS (MSM_SIRC_BASE + 0x24) -#define SPSS_SIRC_INT_CLEAR (MSM_SIRC_BASE + 0x28) -#define SPSS_SIRC_SOFT_INT (MSM_SIRC_BASE + 0x2C) - -#endif - -#endif diff --git a/arch/arm/mach-msm/include/mach/vreg.h b/arch/arm/mach-msm/include/mach/vreg.h deleted file mode 100644 index 6626e78..0000000 --- a/arch/arm/mach-msm/include/mach/vreg.h +++ /dev/null @@ -1,29 +0,0 @@ -/* linux/include/asm-arm/arch-msm/vreg.h - * - * Copyright (C) 2008 Google, Inc. - * Author: Brian Swetland <swetland@google.com> - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#ifndef __ARCH_ARM_MACH_MSM_VREG_H -#define __ARCH_ARM_MACH_MSM_VREG_H - -struct vreg; - -struct vreg *vreg_get(struct device *dev, const char *id); -void vreg_put(struct vreg *vreg); - -int vreg_enable(struct vreg *vreg); -int vreg_disable(struct vreg *vreg); -int vreg_set_level(struct vreg *vreg, unsigned mv); - -#endif diff --git a/arch/arm/mach-msm/io.c b/arch/arm/mach-msm/io.c deleted file mode 100644 index b042dca..0000000 --- a/arch/arm/mach-msm/io.c +++ /dev/null @@ -1,161 +0,0 @@ -/* arch/arm/mach-msm/io.c - * - * MSM7K, QSD io support - * - * Copyright (C) 2007 Google, Inc. - * Copyright (c) 2008-2011, Code Aurora Forum. All rights reserved. - * Author: Brian Swetland <swetland@google.com> - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#include <linux/kernel.h> -#include <linux/bug.h> -#include <linux/init.h> -#include <linux/io.h> -#include <linux/export.h> - -#include <mach/hardware.h> -#include <asm/page.h> -#include <mach/msm_iomap.h> -#include <asm/mach/map.h> - -#include "common.h" - -#define MSM_CHIP_DEVICE_TYPE(name, chip, mem_type) { \ - .virtual = (unsigned long) MSM_##name##_BASE, \ - .pfn = __phys_to_pfn(chip##_##name##_PHYS), \ - .length = chip##_##name##_SIZE, \ - .type = mem_type, \ - } - -#define MSM_DEVICE_TYPE(name, mem_type) \ - MSM_CHIP_DEVICE_TYPE(name, MSM, mem_type) -#define MSM_CHIP_DEVICE(name, chip) \ - MSM_CHIP_DEVICE_TYPE(name, chip, MT_DEVICE) -#define MSM_DEVICE(name) MSM_CHIP_DEVICE(name, MSM) - -#if defined(CONFIG_ARCH_MSM7X00A) -static struct map_desc msm_io_desc[] __initdata = { - MSM_DEVICE_TYPE(VIC, MT_DEVICE_NONSHARED), - MSM_CHIP_DEVICE_TYPE(CSR, MSM7X00, MT_DEVICE_NONSHARED), - MSM_DEVICE_TYPE(DMOV, MT_DEVICE_NONSHARED), - MSM_CHIP_DEVICE_TYPE(GPIO1, MSM7X00, MT_DEVICE_NONSHARED), - MSM_CHIP_DEVICE_TYPE(GPIO2, MSM7X00, MT_DEVICE_NONSHARED), - MSM_DEVICE_TYPE(CLK_CTL, MT_DEVICE_NONSHARED), - { - .virtual = (unsigned long) MSM_SHARED_RAM_BASE, - .pfn = __phys_to_pfn(MSM_SHARED_RAM_PHYS), - .length = MSM_SHARED_RAM_SIZE, - .type = MT_DEVICE, - }, -#if defined(CONFIG_DEBUG_MSM_UART) - { - /* Must be last: virtual and pfn filled in by debug_ll_addr() */ - .length = SZ_4K, - .type = MT_DEVICE_NONSHARED, - } -#endif -}; - -void __init msm_map_common_io(void) -{ - size_t size = ARRAY_SIZE(msm_io_desc); - - /* Make sure the peripheral register window is closed, since - * we will use PTE flags (TEX[1]=1,B=0,C=1) to determine which - * pages are peripheral interface or not. - */ - asm("mcr p15, 0, %0, c15, c2, 4" : : "r" (0)); -#if defined(CONFIG_DEBUG_MSM_UART) -#ifdef CONFIG_MMU - debug_ll_addr(&msm_io_desc[size - 1].pfn, - &msm_io_desc[size - 1].virtual); -#endif - msm_io_desc[size - 1].pfn = __phys_to_pfn(msm_io_desc[size - 1].pfn); -#endif - iotable_init(msm_io_desc, size); -} -#endif - -#ifdef CONFIG_ARCH_QSD8X50 -static struct map_desc qsd8x50_io_desc[] __initdata = { - MSM_DEVICE(VIC), - MSM_CHIP_DEVICE(CSR, QSD8X50), - MSM_DEVICE(DMOV), - MSM_CHIP_DEVICE(GPIO1, QSD8X50), - MSM_CHIP_DEVICE(GPIO2, QSD8X50), - MSM_DEVICE(CLK_CTL), - MSM_DEVICE(SIRC), - MSM_DEVICE(SCPLL), - MSM_DEVICE(AD5), - MSM_DEVICE(MDC), - { - .virtual = (unsigned long) MSM_SHARED_RAM_BASE, - .pfn = __phys_to_pfn(MSM_SHARED_RAM_PHYS), - .length = MSM_SHARED_RAM_SIZE, - .type = MT_DEVICE, - }, -}; - -void __init msm_map_qsd8x50_io(void) -{ - debug_ll_io_init(); - iotable_init(qsd8x50_io_desc, ARRAY_SIZE(qsd8x50_io_desc)); -} -#endif /* CONFIG_ARCH_QSD8X50 */ - -#ifdef CONFIG_ARCH_MSM7X30 -static struct map_desc msm7x30_io_desc[] __initdata = { - MSM_DEVICE(VIC), - MSM_CHIP_DEVICE(CSR, MSM7X30), - MSM_DEVICE(DMOV), - MSM_CHIP_DEVICE(GPIO1, MSM7X30), - MSM_CHIP_DEVICE(GPIO2, MSM7X30), - MSM_DEVICE(CLK_CTL), - MSM_DEVICE(CLK_CTL_SH2), - MSM_DEVICE(AD5), - MSM_DEVICE(MDC), - MSM_DEVICE(ACC), - MSM_DEVICE(SAW), - MSM_DEVICE(GCC), - MSM_DEVICE(TCSR), - { - .virtual = (unsigned long) MSM_SHARED_RAM_BASE, - .pfn = __phys_to_pfn(MSM_SHARED_RAM_PHYS), - .length = MSM_SHARED_RAM_SIZE, - .type = MT_DEVICE, - }, -}; - -void __init msm_map_msm7x30_io(void) -{ - debug_ll_io_init(); - iotable_init(msm7x30_io_desc, ARRAY_SIZE(msm7x30_io_desc)); -} -#endif /* CONFIG_ARCH_MSM7X30 */ - -#ifdef CONFIG_ARCH_MSM7X00A -void __iomem *__msm_ioremap_caller(phys_addr_t phys_addr, size_t size, - unsigned int mtype, void *caller) -{ - if (mtype == MT_DEVICE) { - /* The peripherals in the 88000000 - D0000000 range - * are only accessible by type MT_DEVICE_NONSHARED. - * Adjust mtype as necessary to make this "just work." - */ - if ((phys_addr >= 0x88000000) && (phys_addr < 0xD0000000)) - mtype = MT_DEVICE_NONSHARED; - } - - return __arm_ioremap_caller(phys_addr, size, mtype, caller); -} -#endif diff --git a/arch/arm/mach-msm/irq-vic.c b/arch/arm/mach-msm/irq-vic.c deleted file mode 100644 index 1b54f80..0000000 --- a/arch/arm/mach-msm/irq-vic.c +++ /dev/null @@ -1,363 +0,0 @@ -/* - * Copyright (C) 2007 Google, Inc. - * Copyright (c) 2009, Code Aurora Forum. All rights reserved. - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#include <linux/init.h> -#include <linux/module.h> -#include <linux/sched.h> -#include <linux/interrupt.h> -#include <linux/ptrace.h> -#include <linux/timer.h> -#include <linux/irq.h> -#include <linux/io.h> - -#include <asm/cacheflush.h> - -#include <mach/hardware.h> - -#include <mach/msm_iomap.h> - -#include "smd_private.h" - -enum { - IRQ_DEBUG_SLEEP_INT_TRIGGER = 1U << 0, - IRQ_DEBUG_SLEEP_INT = 1U << 1, - IRQ_DEBUG_SLEEP_ABORT = 1U << 2, - IRQ_DEBUG_SLEEP = 1U << 3, - IRQ_DEBUG_SLEEP_REQUEST = 1U << 4, -}; -static int msm_irq_debug_mask; -module_param_named(debug_mask, msm_irq_debug_mask, int, - S_IRUGO | S_IWUSR | S_IWGRP); - -#define VIC_REG(off) (MSM_VIC_BASE + (off)) -#define VIC_INT_TO_REG_ADDR(base, irq) (base + (irq / 32) * 4) -#define VIC_INT_TO_REG_INDEX(irq) ((irq >> 5) & 3) - -#define VIC_INT_SELECT0 VIC_REG(0x0000) /* 1: FIQ, 0: IRQ */ -#define VIC_INT_SELECT1 VIC_REG(0x0004) /* 1: FIQ, 0: IRQ */ -#define VIC_INT_SELECT2 VIC_REG(0x0008) /* 1: FIQ, 0: IRQ */ -#define VIC_INT_SELECT3 VIC_REG(0x000C) /* 1: FIQ, 0: IRQ */ -#define VIC_INT_EN0 VIC_REG(0x0010) -#define VIC_INT_EN1 VIC_REG(0x0014) -#define VIC_INT_EN2 VIC_REG(0x0018) -#define VIC_INT_EN3 VIC_REG(0x001C) -#define VIC_INT_ENCLEAR0 VIC_REG(0x0020) -#define VIC_INT_ENCLEAR1 VIC_REG(0x0024) -#define VIC_INT_ENCLEAR2 VIC_REG(0x0028) -#define VIC_INT_ENCLEAR3 VIC_REG(0x002C) -#define VIC_INT_ENSET0 VIC_REG(0x0030) -#define VIC_INT_ENSET1 VIC_REG(0x0034) -#define VIC_INT_ENSET2 VIC_REG(0x0038) -#define VIC_INT_ENSET3 VIC_REG(0x003C) -#define VIC_INT_TYPE0 VIC_REG(0x0040) /* 1: EDGE, 0: LEVEL */ -#define VIC_INT_TYPE1 VIC_REG(0x0044) /* 1: EDGE, 0: LEVEL */ -#define VIC_INT_TYPE2 VIC_REG(0x0048) /* 1: EDGE, 0: LEVEL */ -#define VIC_INT_TYPE3 VIC_REG(0x004C) /* 1: EDGE, 0: LEVEL */ -#define VIC_INT_POLARITY0 VIC_REG(0x0050) /* 1: NEG, 0: POS */ -#define VIC_INT_POLARITY1 VIC_REG(0x0054) /* 1: NEG, 0: POS */ -#define VIC_INT_POLARITY2 VIC_REG(0x0058) /* 1: NEG, 0: POS */ -#define VIC_INT_POLARITY3 VIC_REG(0x005C) /* 1: NEG, 0: POS */ -#define VIC_NO_PEND_VAL VIC_REG(0x0060) - -#if defined(CONFIG_ARCH_MSM_SCORPION) -#define VIC_NO_PEND_VAL_FIQ VIC_REG(0x0064) -#define VIC_INT_MASTEREN VIC_REG(0x0068) /* 1: IRQ, 2: FIQ */ -#define VIC_CONFIG VIC_REG(0x006C) /* 1: USE SC VIC */ -#else -#define VIC_INT_MASTEREN VIC_REG(0x0064) /* 1: IRQ, 2: FIQ */ -#define VIC_PROTECTION VIC_REG(0x006C) /* 1: ENABLE */ -#define VIC_CONFIG VIC_REG(0x0068) /* 1: USE ARM1136 VIC */ -#endif - -#define VIC_IRQ_STATUS0 VIC_REG(0x0080) -#define VIC_IRQ_STATUS1 VIC_REG(0x0084) -#define VIC_IRQ_STATUS2 VIC_REG(0x0088) -#define VIC_IRQ_STATUS3 VIC_REG(0x008C) -#define VIC_FIQ_STATUS0 VIC_REG(0x0090) -#define VIC_FIQ_STATUS1 VIC_REG(0x0094) -#define VIC_FIQ_STATUS2 VIC_REG(0x0098) -#define VIC_FIQ_STATUS3 VIC_REG(0x009C) -#define VIC_RAW_STATUS0 VIC_REG(0x00A0) -#define VIC_RAW_STATUS1 VIC_REG(0x00A4) -#define VIC_RAW_STATUS2 VIC_REG(0x00A8) -#define VIC_RAW_STATUS3 VIC_REG(0x00AC) -#define VIC_INT_CLEAR0 VIC_REG(0x00B0) -#define VIC_INT_CLEAR1 VIC_REG(0x00B4) -#define VIC_INT_CLEAR2 VIC_REG(0x00B8) -#define VIC_INT_CLEAR3 VIC_REG(0x00BC) -#define VIC_SOFTINT0 VIC_REG(0x00C0) -#define VIC_SOFTINT1 VIC_REG(0x00C4) -#define VIC_SOFTINT2 VIC_REG(0x00C8) -#define VIC_SOFTINT3 VIC_REG(0x00CC) -#define VIC_IRQ_VEC_RD VIC_REG(0x00D0) /* pending int # */ -#define VIC_IRQ_VEC_PEND_RD VIC_REG(0x00D4) /* pending vector addr */ -#define VIC_IRQ_VEC_WR VIC_REG(0x00D8) - -#if defined(CONFIG_ARCH_MSM_SCORPION) -#define VIC_FIQ_VEC_RD VIC_REG(0x00DC) -#define VIC_FIQ_VEC_PEND_RD VIC_REG(0x00E0) -#define VIC_FIQ_VEC_WR VIC_REG(0x00E4) -#define VIC_IRQ_IN_SERVICE VIC_REG(0x00E8) -#define VIC_IRQ_IN_STACK VIC_REG(0x00EC) -#define VIC_FIQ_IN_SERVICE VIC_REG(0x00F0) -#define VIC_FIQ_IN_STACK VIC_REG(0x00F4) -#define VIC_TEST_BUS_SEL VIC_REG(0x00F8) -#define VIC_IRQ_CTRL_CONFIG VIC_REG(0x00FC) -#else -#define VIC_IRQ_IN_SERVICE VIC_REG(0x00E0) -#define VIC_IRQ_IN_STACK VIC_REG(0x00E4) -#define VIC_TEST_BUS_SEL VIC_REG(0x00E8) -#endif - -#define VIC_VECTPRIORITY(n) VIC_REG(0x0200+((n) * 4)) -#define VIC_VECTADDR(n) VIC_REG(0x0400+((n) * 4)) - -#if defined(CONFIG_ARCH_MSM7X30) -#define VIC_NUM_REGS 4 -#else -#define VIC_NUM_REGS 2 -#endif - -#if VIC_NUM_REGS == 2 -#define DPRINT_REGS(base_reg, format, ...) \ - printk(KERN_INFO format " %x %x\n", ##__VA_ARGS__, \ - readl(base_reg ## 0), readl(base_reg ## 1)) -#define DPRINT_ARRAY(array, format, ...) \ - printk(KERN_INFO format " %x %x\n", ##__VA_ARGS__, \ - array[0], array[1]) -#elif VIC_NUM_REGS == 4 -#define DPRINT_REGS(base_reg, format, ...) \ - printk(KERN_INFO format " %x %x %x %x\n", ##__VA_ARGS__, \ - readl(base_reg ## 0), readl(base_reg ## 1), \ - readl(base_reg ## 2), readl(base_reg ## 3)) -#define DPRINT_ARRAY(array, format, ...) \ - printk(KERN_INFO format " %x %x %x %x\n", ##__VA_ARGS__, \ - array[0], array[1], \ - array[2], array[3]) -#else -#error "VIC_NUM_REGS set to illegal value" -#endif - -static uint32_t msm_irq_smsm_wake_enable[2]; -static struct { - uint32_t int_en[2]; - uint32_t int_type; - uint32_t int_polarity; - uint32_t int_select; -} msm_irq_shadow_reg[VIC_NUM_REGS]; -static uint32_t msm_irq_idle_disable[VIC_NUM_REGS]; - -#define SMSM_FAKE_IRQ (0xff) -static uint8_t msm_irq_to_smsm[NR_IRQS] = { - [INT_MDDI_EXT] = 1, - [INT_MDDI_PRI] = 2, - [INT_MDDI_CLIENT] = 3, - [INT_USB_OTG] = 4, - - [INT_PWB_I2C] = 5, - [INT_SDC1_0] = 6, - [INT_SDC1_1] = 7, - [INT_SDC2_0] = 8, - - [INT_SDC2_1] = 9, - [INT_ADSP_A9_A11] = 10, - [INT_UART1] = 11, - [INT_UART2] = 12, - - [INT_UART3] = 13, - [INT_UART1_RX] = 14, - [INT_UART2_RX] = 15, - [INT_UART3_RX] = 16, - - [INT_UART1DM_IRQ] = 17, - [INT_UART1DM_RX] = 18, - [INT_KEYSENSE] = 19, -#if !defined(CONFIG_ARCH_MSM7X30) - [INT_AD_HSSD] = 20, -#endif - - [INT_NAND_WR_ER_DONE] = 21, - [INT_NAND_OP_DONE] = 22, - [INT_TCHSCRN1] = 23, - [INT_TCHSCRN2] = 24, - - [INT_TCHSCRN_SSBI] = 25, - [INT_USB_HS] = 26, - [INT_UART2DM_RX] = 27, - [INT_UART2DM_IRQ] = 28, - - [INT_SDC4_1] = 29, - [INT_SDC4_0] = 30, - [INT_SDC3_1] = 31, - [INT_SDC3_0] = 32, - - /* fake wakeup interrupts */ - [INT_GPIO_GROUP1] = SMSM_FAKE_IRQ, - [INT_GPIO_GROUP2] = SMSM_FAKE_IRQ, - [INT_A9_M2A_0] = SMSM_FAKE_IRQ, - [INT_A9_M2A_1] = SMSM_FAKE_IRQ, - [INT_A9_M2A_5] = SMSM_FAKE_IRQ, - [INT_GP_TIMER_EXP] = SMSM_FAKE_IRQ, - [INT_DEBUG_TIMER_EXP] = SMSM_FAKE_IRQ, - [INT_ADSP_A11] = SMSM_FAKE_IRQ, -#ifdef CONFIG_ARCH_QSD8X50 - [INT_SIRC_0] = SMSM_FAKE_IRQ, - [INT_SIRC_1] = SMSM_FAKE_IRQ, -#endif -}; - -static inline void msm_irq_write_all_regs(void __iomem *base, unsigned int val) -{ - int i; - - for (i = 0; i < VIC_NUM_REGS; i++) - writel(val, base + (i * 4)); -} - -static void msm_irq_ack(struct irq_data *d) -{ - void __iomem *reg = VIC_INT_TO_REG_ADDR(VIC_INT_CLEAR0, d->irq); - writel(1 << (d->irq & 31), reg); -} - -static void msm_irq_mask(struct irq_data *d) -{ - void __iomem *reg = VIC_INT_TO_REG_ADDR(VIC_INT_ENCLEAR0, d->irq); - unsigned index = VIC_INT_TO_REG_INDEX(d->irq); - uint32_t mask = 1UL << (d->irq & 31); - int smsm_irq = msm_irq_to_smsm[d->irq]; - - msm_irq_shadow_reg[index].int_en[0] &= ~mask; - writel(mask, reg); - if (smsm_irq == 0) - msm_irq_idle_disable[index] &= ~mask; - else { - mask = 1UL << (smsm_irq - 1); - msm_irq_smsm_wake_enable[0] &= ~mask; - } -} - -static void msm_irq_unmask(struct irq_data *d) -{ - void __iomem *reg = VIC_INT_TO_REG_ADDR(VIC_INT_ENSET0, d->irq); - unsigned index = VIC_INT_TO_REG_INDEX(d->irq); - uint32_t mask = 1UL << (d->irq & 31); - int smsm_irq = msm_irq_to_smsm[d->irq]; - - msm_irq_shadow_reg[index].int_en[0] |= mask; - writel(mask, reg); - - if (smsm_irq == 0) - msm_irq_idle_disable[index] |= mask; - else { - mask = 1UL << (smsm_irq - 1); - msm_irq_smsm_wake_enable[0] |= mask; - } -} - -static int msm_irq_set_wake(struct irq_data *d, unsigned int on) -{ - unsigned index = VIC_INT_TO_REG_INDEX(d->irq); - uint32_t mask = 1UL << (d->irq & 31); - int smsm_irq = msm_irq_to_smsm[d->irq]; - - if (smsm_irq == 0) { - printk(KERN_ERR "msm_irq_set_wake: bad wakeup irq %d\n", d->irq); - return -EINVAL; - } - if (on) - msm_irq_shadow_reg[index].int_en[1] |= mask; - else - msm_irq_shadow_reg[index].int_en[1] &= ~mask; - - if (smsm_irq == SMSM_FAKE_IRQ) - return 0; - - mask = 1UL << (smsm_irq - 1); - if (on) - msm_irq_smsm_wake_enable[1] |= mask; - else - msm_irq_smsm_wake_enable[1] &= ~mask; - return 0; -} - -static int msm_irq_set_type(struct irq_data *d, unsigned int flow_type) -{ - void __iomem *treg = VIC_INT_TO_REG_ADDR(VIC_INT_TYPE0, d->irq); - void __iomem *preg = VIC_INT_TO_REG_ADDR(VIC_INT_POLARITY0, d->irq); - unsigned index = VIC_INT_TO_REG_INDEX(d->irq); - int b = 1 << (d->irq & 31); - uint32_t polarity; - uint32_t type; - - polarity = msm_irq_shadow_reg[index].int_polarity; - if (flow_type & (IRQF_TRIGGER_FALLING | IRQF_TRIGGER_LOW)) - polarity |= b; - if (flow_type & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_HIGH)) - polarity &= ~b; - writel(polarity, preg); - msm_irq_shadow_reg[index].int_polarity = polarity; - - type = msm_irq_shadow_reg[index].int_type; - if (flow_type & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING)) { - type |= b; - __irq_set_handler_locked(d->irq, handle_edge_irq); - } - if (flow_type & (IRQF_TRIGGER_HIGH | IRQF_TRIGGER_LOW)) { - type &= ~b; - __irq_set_handler_locked(d->irq, handle_level_irq); - } - writel(type, treg); - msm_irq_shadow_reg[index].int_type = type; - return 0; -} - -static struct irq_chip msm_irq_chip = { - .name = "msm", - .irq_disable = msm_irq_mask, - .irq_ack = msm_irq_ack, - .irq_mask = msm_irq_mask, - .irq_unmask = msm_irq_unmask, - .irq_set_wake = msm_irq_set_wake, - .irq_set_type = msm_irq_set_type, -}; - -void __init msm_init_irq(void) -{ - unsigned n; - - /* select level interrupts */ - msm_irq_write_all_regs(VIC_INT_TYPE0, 0); - - /* select highlevel interrupts */ - msm_irq_write_all_regs(VIC_INT_POLARITY0, 0); - - /* select IRQ for all INTs */ - msm_irq_write_all_regs(VIC_INT_SELECT0, 0); - - /* disable all INTs */ - msm_irq_write_all_regs(VIC_INT_EN0, 0); - - /* don't use vic */ - writel(0, VIC_CONFIG); - - /* enable interrupt controller */ - writel(3, VIC_INT_MASTEREN); - - for (n = 0; n < NR_MSM_IRQS; n++) { - irq_set_chip_and_handler(n, &msm_irq_chip, handle_level_irq); - set_irq_flags(n, IRQF_VALID); - } -} diff --git a/arch/arm/mach-msm/irq.c b/arch/arm/mach-msm/irq.c deleted file mode 100644 index ea514be..0000000 --- a/arch/arm/mach-msm/irq.c +++ /dev/null @@ -1,151 +0,0 @@ -/* linux/arch/arm/mach-msm/irq.c - * - * Copyright (C) 2007 Google, Inc. - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#include <linux/init.h> -#include <linux/module.h> -#include <linux/sched.h> -#include <linux/interrupt.h> -#include <linux/ptrace.h> -#include <linux/timer.h> -#include <linux/irq.h> -#include <linux/io.h> - -#include <mach/hardware.h> - -#include <mach/msm_iomap.h> - -#define VIC_REG(off) (MSM_VIC_BASE + (off)) - -#define VIC_INT_SELECT0 VIC_REG(0x0000) /* 1: FIQ, 0: IRQ */ -#define VIC_INT_SELECT1 VIC_REG(0x0004) /* 1: FIQ, 0: IRQ */ -#define VIC_INT_EN0 VIC_REG(0x0010) -#define VIC_INT_EN1 VIC_REG(0x0014) -#define VIC_INT_ENCLEAR0 VIC_REG(0x0020) -#define VIC_INT_ENCLEAR1 VIC_REG(0x0024) -#define VIC_INT_ENSET0 VIC_REG(0x0030) -#define VIC_INT_ENSET1 VIC_REG(0x0034) -#define VIC_INT_TYPE0 VIC_REG(0x0040) /* 1: EDGE, 0: LEVEL */ -#define VIC_INT_TYPE1 VIC_REG(0x0044) /* 1: EDGE, 0: LEVEL */ -#define VIC_INT_POLARITY0 VIC_REG(0x0050) /* 1: NEG, 0: POS */ -#define VIC_INT_POLARITY1 VIC_REG(0x0054) /* 1: NEG, 0: POS */ -#define VIC_NO_PEND_VAL VIC_REG(0x0060) -#define VIC_INT_MASTEREN VIC_REG(0x0064) /* 1: IRQ, 2: FIQ */ -#define VIC_PROTECTION VIC_REG(0x006C) /* 1: ENABLE */ -#define VIC_CONFIG VIC_REG(0x0068) /* 1: USE ARM1136 VIC */ -#define VIC_IRQ_STATUS0 VIC_REG(0x0080) -#define VIC_IRQ_STATUS1 VIC_REG(0x0084) -#define VIC_FIQ_STATUS0 VIC_REG(0x0090) -#define VIC_FIQ_STATUS1 VIC_REG(0x0094) -#define VIC_RAW_STATUS0 VIC_REG(0x00A0) -#define VIC_RAW_STATUS1 VIC_REG(0x00A4) -#define VIC_INT_CLEAR0 VIC_REG(0x00B0) -#define VIC_INT_CLEAR1 VIC_REG(0x00B4) -#define VIC_SOFTINT0 VIC_REG(0x00C0) -#define VIC_SOFTINT1 VIC_REG(0x00C4) -#define VIC_IRQ_VEC_RD VIC_REG(0x00D0) /* pending int # */ -#define VIC_IRQ_VEC_PEND_RD VIC_REG(0x00D4) /* pending vector addr */ -#define VIC_IRQ_VEC_WR VIC_REG(0x00D8) -#define VIC_IRQ_IN_SERVICE VIC_REG(0x00E0) -#define VIC_IRQ_IN_STACK VIC_REG(0x00E4) -#define VIC_TEST_BUS_SEL VIC_REG(0x00E8) - -#define VIC_VECTPRIORITY(n) VIC_REG(0x0200+((n) * 4)) -#define VIC_VECTADDR(n) VIC_REG(0x0400+((n) * 4)) - -static void msm_irq_ack(struct irq_data *d) -{ - void __iomem *reg = VIC_INT_CLEAR0 + ((d->irq & 32) ? 4 : 0); - writel(1 << (d->irq & 31), reg); -} - -static void msm_irq_mask(struct irq_data *d) -{ - void __iomem *reg = VIC_INT_ENCLEAR0 + ((d->irq & 32) ? 4 : 0); - writel(1 << (d->irq & 31), reg); -} - -static void msm_irq_unmask(struct irq_data *d) -{ - void __iomem *reg = VIC_INT_ENSET0 + ((d->irq & 32) ? 4 : 0); - writel(1 << (d->irq & 31), reg); -} - -static int msm_irq_set_wake(struct irq_data *d, unsigned int on) -{ - return -EINVAL; -} - -static int msm_irq_set_type(struct irq_data *d, unsigned int flow_type) -{ - void __iomem *treg = VIC_INT_TYPE0 + ((d->irq & 32) ? 4 : 0); - void __iomem *preg = VIC_INT_POLARITY0 + ((d->irq & 32) ? 4 : 0); - int b = 1 << (d->irq & 31); - - if (flow_type & (IRQF_TRIGGER_FALLING | IRQF_TRIGGER_LOW)) - writel(readl(preg) | b, preg); - if (flow_type & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_HIGH)) - writel(readl(preg) & (~b), preg); - - if (flow_type & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING)) { - writel(readl(treg) | b, treg); - __irq_set_handler_locked(d->irq, handle_edge_irq); - } - if (flow_type & (IRQF_TRIGGER_HIGH | IRQF_TRIGGER_LOW)) { - writel(readl(treg) & (~b), treg); - __irq_set_handler_locked(d->irq, handle_level_irq); - } - return 0; -} - -static struct irq_chip msm_irq_chip = { - .name = "msm", - .irq_ack = msm_irq_ack, - .irq_mask = msm_irq_mask, - .irq_unmask = msm_irq_unmask, - .irq_set_wake = msm_irq_set_wake, - .irq_set_type = msm_irq_set_type, -}; - -void __init msm_init_irq(void) -{ - unsigned n; - - /* select level interrupts */ - writel(0, VIC_INT_TYPE0); - writel(0, VIC_INT_TYPE1); - - /* select highlevel interrupts */ - writel(0, VIC_INT_POLARITY0); - writel(0, VIC_INT_POLARITY1); - - /* select IRQ for all INTs */ - writel(0, VIC_INT_SELECT0); - writel(0, VIC_INT_SELECT1); - - /* disable all INTs */ - writel(0, VIC_INT_EN0); - writel(0, VIC_INT_EN1); - - /* don't use 1136 vic */ - writel(0, VIC_CONFIG); - - /* enable interrupt controller */ - writel(1, VIC_INT_MASTEREN); - - for (n = 0; n < NR_MSM_IRQS; n++) { - irq_set_chip_and_handler(n, &msm_irq_chip, handle_level_irq); - set_irq_flags(n, IRQF_VALID); - } -} diff --git a/arch/arm/mach-msm/last_radio_log.c b/arch/arm/mach-msm/last_radio_log.c deleted file mode 100644 index 9c392a2..0000000 --- a/arch/arm/mach-msm/last_radio_log.c +++ /dev/null @@ -1,71 +0,0 @@ -/* arch/arm/mach-msm/last_radio_log.c - * - * Extract the log from a modem crash though SMEM - * - * Copyright (C) 2007 Google, Inc. - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#include <linux/kernel.h> -#include <linux/module.h> -#include <linux/fs.h> -#include <linux/proc_fs.h> -#include <linux/uaccess.h> - -#include "smd_private.h" - -static void *radio_log_base; -static size_t radio_log_size; - -extern void *smem_item(unsigned id, unsigned *size); - -static ssize_t last_radio_log_read(struct file *file, char __user *buf, - size_t len, loff_t *offset) -{ - return simple_read_from_buffer(buf, len, offset, - radio_log_base, radio_log_size); -} - -static struct file_operations last_radio_log_fops = { - .read = last_radio_log_read, - .llseek = default_llseek, -}; - -void msm_init_last_radio_log(struct module *owner) -{ - struct proc_dir_entry *entry; - - if (last_radio_log_fops.owner) { - pr_err("%s: already claimed\n", __func__); - return; - } - - radio_log_base = smem_item(SMEM_CLKREGIM_BSP, &radio_log_size); - if (!radio_log_base) { - pr_err("%s: could not retrieve SMEM_CLKREGIM_BSP\n", __func__); - return; - } - - entry = proc_create("last_radio_log", S_IRUGO, NULL, - &last_radio_log_fops); - if (!entry) { - pr_err("%s: could not create proc entry for radio log\n", - __func__); - return; - } - - pr_err("%s: last radio log is %d bytes long\n", __func__, - radio_log_size); - last_radio_log_fops.owner = owner; - proc_set_size(entry, radio_log_size); -} -EXPORT_SYMBOL(msm_init_last_radio_log); diff --git a/arch/arm/mach-msm/proc_comm.c b/arch/arm/mach-msm/proc_comm.c deleted file mode 100644 index 507f5ca..0000000 --- a/arch/arm/mach-msm/proc_comm.c +++ /dev/null @@ -1,129 +0,0 @@ -/* arch/arm/mach-msm/proc_comm.c - * - * Copyright (C) 2007-2008 Google, Inc. - * Author: Brian Swetland <swetland@google.com> - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#include <linux/delay.h> -#include <linux/errno.h> -#include <linux/io.h> -#include <linux/spinlock.h> -#include <mach/msm_iomap.h> - -#include "proc_comm.h" - -static inline void msm_a2m_int(uint32_t irq) -{ -#if defined(CONFIG_ARCH_MSM7X30) - writel(1 << irq, MSM_GCC_BASE + 0x8); -#else - writel(1, MSM_CSR_BASE + 0x400 + (irq * 4)); -#endif -} - -static inline void notify_other_proc_comm(void) -{ - msm_a2m_int(6); -} - -#define APP_COMMAND 0x00 -#define APP_STATUS 0x04 -#define APP_DATA1 0x08 -#define APP_DATA2 0x0C - -#define MDM_COMMAND 0x10 -#define MDM_STATUS 0x14 -#define MDM_DATA1 0x18 -#define MDM_DATA2 0x1C - -static DEFINE_SPINLOCK(proc_comm_lock); - -/* The higher level SMD support will install this to - * provide a way to check for and handle modem restart. - */ -int (*msm_check_for_modem_crash)(void); - -/* Poll for a state change, checking for possible - * modem crashes along the way (so we don't wait - * forever while the ARM9 is blowing up). - * - * Return an error in the event of a modem crash and - * restart so the msm_proc_comm() routine can restart - * the operation from the beginning. - */ -static int proc_comm_wait_for(void __iomem *addr, unsigned value) -{ - for (;;) { - if (readl(addr) == value) - return 0; - - if (msm_check_for_modem_crash) - if (msm_check_for_modem_crash()) - return -EAGAIN; - } -} - -int msm_proc_comm(unsigned cmd, unsigned *data1, unsigned *data2) -{ - void __iomem *base = MSM_SHARED_RAM_BASE; - unsigned long flags; - int ret; - - spin_lock_irqsave(&proc_comm_lock, flags); - - for (;;) { - if (proc_comm_wait_for(base + MDM_STATUS, PCOM_READY)) - continue; - - writel(cmd, base + APP_COMMAND); - writel(data1 ? *data1 : 0, base + APP_DATA1); - writel(data2 ? *data2 : 0, base + APP_DATA2); - - notify_other_proc_comm(); - - if (proc_comm_wait_for(base + APP_COMMAND, PCOM_CMD_DONE)) - continue; - - if (readl(base + APP_STATUS) != PCOM_CMD_FAIL) { - if (data1) - *data1 = readl(base + APP_DATA1); - if (data2) - *data2 = readl(base + APP_DATA2); - ret = 0; - } else { - ret = -EIO; - } - break; - } - - writel(PCOM_CMD_IDLE, base + APP_COMMAND); - - spin_unlock_irqrestore(&proc_comm_lock, flags); - - return ret; -} - -/* - * We need to wait for the ARM9 to at least partially boot - * up before we can continue. Since the ARM9 does resource - * allocation, if we dont' wait we could end up crashing or in - * and unknown state. This function should be called early to - * wait on the ARM9. - */ -void proc_comm_boot_wait(void) -{ - void __iomem *base = MSM_SHARED_RAM_BASE; - - proc_comm_wait_for(base + MDM_STATUS, PCOM_READY); - -} diff --git a/arch/arm/mach-msm/proc_comm.h b/arch/arm/mach-msm/proc_comm.h deleted file mode 100644 index e8d043a..0000000 --- a/arch/arm/mach-msm/proc_comm.h +++ /dev/null @@ -1,258 +0,0 @@ -/* arch/arm/mach-msm/proc_comm.h - * - * Copyright (c) 2007 QUALCOMM Incorporated - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#ifndef _ARCH_ARM_MACH_MSM_PROC_COMM_H_ -#define _ARCH_ARM_MACH_MSM_PROC_COMM_H_ - -#include <linux/init.h> - -enum { - PCOM_CMD_IDLE = 0x0, - PCOM_CMD_DONE, - PCOM_RESET_APPS, - PCOM_RESET_CHIP, - PCOM_CONFIG_NAND_MPU, - PCOM_CONFIG_USB_CLKS, - PCOM_GET_POWER_ON_STATUS, - PCOM_GET_WAKE_UP_STATUS, - PCOM_GET_BATT_LEVEL, - PCOM_CHG_IS_CHARGING, - PCOM_POWER_DOWN, - PCOM_USB_PIN_CONFIG, - PCOM_USB_PIN_SEL, - PCOM_SET_RTC_ALARM, - PCOM_NV_READ, - PCOM_NV_WRITE, - PCOM_GET_UUID_HIGH, - PCOM_GET_UUID_LOW, - PCOM_GET_HW_ENTROPY, - PCOM_RPC_GPIO_TLMM_CONFIG_REMOTE, - PCOM_CLKCTL_RPC_ENABLE, - PCOM_CLKCTL_RPC_DISABLE, - PCOM_CLKCTL_RPC_RESET, - PCOM_CLKCTL_RPC_SET_FLAGS, - PCOM_CLKCTL_RPC_SET_RATE, - PCOM_CLKCTL_RPC_MIN_RATE, - PCOM_CLKCTL_RPC_MAX_RATE, - PCOM_CLKCTL_RPC_RATE, - PCOM_CLKCTL_RPC_PLL_REQUEST, - PCOM_CLKCTL_RPC_ENABLED, - PCOM_VREG_SWITCH, - PCOM_VREG_SET_LEVEL, - PCOM_GPIO_TLMM_CONFIG_GROUP, - PCOM_GPIO_TLMM_UNCONFIG_GROUP, - PCOM_NV_WRITE_BYTES_4_7, - PCOM_CONFIG_DISP, - PCOM_GET_FTM_BOOT_COUNT, - PCOM_RPC_GPIO_TLMM_CONFIG_EX, - PCOM_PM_MPP_CONFIG, - PCOM_GPIO_IN, - PCOM_GPIO_OUT, - PCOM_RESET_MODEM, - PCOM_RESET_CHIP_IMM, - PCOM_PM_VID_EN, - PCOM_VREG_PULLDOWN, - PCOM_GET_MODEM_VERSION, - PCOM_CLK_REGIME_SEC_RESET, - PCOM_CLK_REGIME_SEC_RESET_ASSERT, - PCOM_CLK_REGIME_SEC_RESET_DEASSERT, - PCOM_CLK_REGIME_SEC_PLL_REQUEST_WRP, - PCOM_CLK_REGIME_SEC_ENABLE, - PCOM_CLK_REGIME_SEC_DISABLE, - PCOM_CLK_REGIME_SEC_IS_ON, - PCOM_CLK_REGIME_SEC_SEL_CLK_INV, - PCOM_CLK_REGIME_SEC_SEL_CLK_SRC, - PCOM_CLK_REGIME_SEC_SEL_CLK_DIV, - PCOM_CLK_REGIME_SEC_ICODEC_CLK_ENABLE, - PCOM_CLK_REGIME_SEC_ICODEC_CLK_DISABLE, - PCOM_CLK_REGIME_SEC_SEL_SPEED, - PCOM_CLK_REGIME_SEC_CONFIG_GP_CLK_WRP, - PCOM_CLK_REGIME_SEC_CONFIG_MDH_CLK_WRP, - PCOM_CLK_REGIME_SEC_USB_XTAL_ON, - PCOM_CLK_REGIME_SEC_USB_XTAL_OFF, - PCOM_CLK_REGIME_SEC_SET_QDSP_DME_MODE, - PCOM_CLK_REGIME_SEC_SWITCH_ADSP_CLK, - PCOM_CLK_REGIME_SEC_GET_MAX_ADSP_CLK_KHZ, - PCOM_CLK_REGIME_SEC_GET_I2C_CLK_KHZ, - PCOM_CLK_REGIME_SEC_MSM_GET_CLK_FREQ_KHZ, - PCOM_CLK_REGIME_SEC_SEL_VFE_SRC, - PCOM_CLK_REGIME_SEC_MSM_SEL_CAMCLK, - PCOM_CLK_REGIME_SEC_MSM_SEL_LCDCLK, - PCOM_CLK_REGIME_SEC_VFE_RAIL_OFF, - PCOM_CLK_REGIME_SEC_VFE_RAIL_ON, - PCOM_CLK_REGIME_SEC_GRP_RAIL_OFF, - PCOM_CLK_REGIME_SEC_GRP_RAIL_ON, - PCOM_CLK_REGIME_SEC_VDC_RAIL_OFF, - PCOM_CLK_REGIME_SEC_VDC_RAIL_ON, - PCOM_CLK_REGIME_SEC_LCD_CTRL, - PCOM_CLK_REGIME_SEC_REGISTER_FOR_CPU_RESOURCE, - PCOM_CLK_REGIME_SEC_DEREGISTER_FOR_CPU_RESOURCE, - PCOM_CLK_REGIME_SEC_RESOURCE_REQUEST_WRP, - PCOM_CLK_REGIME_MSM_SEC_SEL_CLK_OWNER, - PCOM_CLK_REGIME_SEC_DEVMAN_REQUEST_WRP, - PCOM_GPIO_CONFIG, - PCOM_GPIO_CONFIGURE_GROUP, - PCOM_GPIO_TLMM_SET_PORT, - PCOM_GPIO_TLMM_CONFIG_EX, - PCOM_SET_FTM_BOOT_COUNT, - PCOM_RESERVED0, - PCOM_RESERVED1, - PCOM_CUSTOMER_CMD1, - PCOM_CUSTOMER_CMD2, - PCOM_CUSTOMER_CMD3, - PCOM_CLK_REGIME_ENTER_APPSBL_CHG_MODE, - PCOM_CLK_REGIME_EXIT_APPSBL_CHG_MODE, - PCOM_CLK_REGIME_SEC_RAIL_DISABLE, - PCOM_CLK_REGIME_SEC_RAIL_ENABLE, - PCOM_CLK_REGIME_SEC_RAIL_CONTROL, - PCOM_SET_SW_WATCHDOG_STATE, - PCOM_PM_MPP_CONFIG_DIGITAL_INPUT, - PCOM_PM_MPP_CONFIG_I_SINK, - PCOM_RESERVED_101, - PCOM_MSM_HSUSB_PHY_RESET, - PCOM_GET_BATT_MV_LEVEL, - PCOM_CHG_USB_IS_PC_CONNECTED, - PCOM_CHG_USB_IS_CHARGER_CONNECTED, - PCOM_CHG_USB_IS_DISCONNECTED, - PCOM_CHG_USB_IS_AVAILABLE, - PCOM_CLK_REGIME_SEC_MSM_SEL_FREQ, - PCOM_CLK_REGIME_SEC_SET_PCLK_AXI_POLICY, - PCOM_CLKCTL_RPC_RESET_ASSERT, - PCOM_CLKCTL_RPC_RESET_DEASSERT, - PCOM_CLKCTL_RPC_RAIL_ON, - PCOM_CLKCTL_RPC_RAIL_OFF, - PCOM_CLKCTL_RPC_RAIL_ENABLE, - PCOM_CLKCTL_RPC_RAIL_DISABLE, - PCOM_CLKCTL_RPC_RAIL_CONTROL, - PCOM_CLKCTL_RPC_MIN_MSMC1, - PCOM_NUM_CMDS, -}; - -enum { - PCOM_INVALID_STATUS = 0x0, - PCOM_READY, - PCOM_CMD_RUNNING, - PCOM_CMD_SUCCESS, - PCOM_CMD_FAIL, - PCOM_CMD_FAIL_FALSE_RETURNED, - PCOM_CMD_FAIL_CMD_OUT_OF_BOUNDS_SERVER, - PCOM_CMD_FAIL_CMD_OUT_OF_BOUNDS_CLIENT, - PCOM_CMD_FAIL_CMD_UNREGISTERED, - PCOM_CMD_FAIL_CMD_LOCKED, - PCOM_CMD_FAIL_SERVER_NOT_YET_READY, - PCOM_CMD_FAIL_BAD_DESTINATION, - PCOM_CMD_FAIL_SERVER_RESET, - PCOM_CMD_FAIL_SMSM_NOT_INIT, - PCOM_CMD_FAIL_PROC_COMM_BUSY, - PCOM_CMD_FAIL_PROC_COMM_NOT_INIT, - -}; - -/* List of VREGs that support the Pull Down Resistor setting. */ -enum vreg_pdown_id { - PM_VREG_PDOWN_MSMA_ID, - PM_VREG_PDOWN_MSMP_ID, - PM_VREG_PDOWN_MSME1_ID, /* Not supported in Panoramix */ - PM_VREG_PDOWN_MSMC1_ID, /* Not supported in PM6620 */ - PM_VREG_PDOWN_MSMC2_ID, /* Supported in PM7500 only */ - PM_VREG_PDOWN_GP3_ID, /* Supported in PM7500 only */ - PM_VREG_PDOWN_MSME2_ID, /* Supported in PM7500 and Panoramix only */ - PM_VREG_PDOWN_GP4_ID, /* Supported in PM7500 only */ - PM_VREG_PDOWN_GP1_ID, /* Supported in PM7500 only */ - PM_VREG_PDOWN_TCXO_ID, - PM_VREG_PDOWN_PA_ID, - PM_VREG_PDOWN_RFTX_ID, - PM_VREG_PDOWN_RFRX1_ID, - PM_VREG_PDOWN_RFRX2_ID, - PM_VREG_PDOWN_SYNT_ID, - PM_VREG_PDOWN_WLAN_ID, - PM_VREG_PDOWN_USB_ID, - PM_VREG_PDOWN_MMC_ID, - PM_VREG_PDOWN_RUIM_ID, - PM_VREG_PDOWN_MSMC0_ID, /* Supported in PM6610 only */ - PM_VREG_PDOWN_GP2_ID, /* Supported in PM7500 only */ - PM_VREG_PDOWN_GP5_ID, /* Supported in PM7500 only */ - PM_VREG_PDOWN_GP6_ID, /* Supported in PM7500 only */ - PM_VREG_PDOWN_RF_ID, - PM_VREG_PDOWN_RF_VCO_ID, - PM_VREG_PDOWN_MPLL_ID, - PM_VREG_PDOWN_S2_ID, - PM_VREG_PDOWN_S3_ID, - PM_VREG_PDOWN_RFUBM_ID, - - /* new for HAN */ - PM_VREG_PDOWN_RF1_ID, - PM_VREG_PDOWN_RF2_ID, - PM_VREG_PDOWN_RFA_ID, - PM_VREG_PDOWN_CDC2_ID, - PM_VREG_PDOWN_RFTX2_ID, - PM_VREG_PDOWN_USIM_ID, - PM_VREG_PDOWN_USB2P6_ID, - PM_VREG_PDOWN_USB3P3_ID, - PM_VREG_PDOWN_INVALID_ID, - - /* backward compatible enums only */ - PM_VREG_PDOWN_CAM_ID = PM_VREG_PDOWN_GP1_ID, - PM_VREG_PDOWN_MDDI_ID = PM_VREG_PDOWN_GP2_ID, - PM_VREG_PDOWN_RUIM2_ID = PM_VREG_PDOWN_GP3_ID, - PM_VREG_PDOWN_AUX_ID = PM_VREG_PDOWN_GP4_ID, - PM_VREG_PDOWN_AUX2_ID = PM_VREG_PDOWN_GP5_ID, - PM_VREG_PDOWN_BT_ID = PM_VREG_PDOWN_GP6_ID, - - PM_VREG_PDOWN_MSME_ID = PM_VREG_PDOWN_MSME1_ID, - PM_VREG_PDOWN_MSMC_ID = PM_VREG_PDOWN_MSMC1_ID, - PM_VREG_PDOWN_RFA1_ID = PM_VREG_PDOWN_RFRX2_ID, - PM_VREG_PDOWN_RFA2_ID = PM_VREG_PDOWN_RFTX2_ID, - PM_VREG_PDOWN_XO_ID = PM_VREG_PDOWN_TCXO_ID -}; - -enum { - PCOM_CLKRGM_APPS_RESET_USB_PHY = 34, - PCOM_CLKRGM_APPS_RESET_USBH = 37, -}; - -/* gpio info for PCOM_RPC_GPIO_TLMM_CONFIG_EX */ - -#define GPIO_ENABLE 0 -#define GPIO_DISABLE 1 - -#define GPIO_INPUT 0 -#define GPIO_OUTPUT 1 - -#define GPIO_NO_PULL 0 -#define GPIO_PULL_DOWN 1 -#define GPIO_KEEPER 2 -#define GPIO_PULL_UP 3 - -#define GPIO_2MA 0 -#define GPIO_4MA 1 -#define GPIO_6MA 2 -#define GPIO_8MA 3 -#define GPIO_10MA 4 -#define GPIO_12MA 5 -#define GPIO_14MA 6 -#define GPIO_16MA 7 - -#define PCOM_GPIO_CFG(gpio, func, dir, pull, drvstr) \ - ((((gpio) & 0x3FF) << 4) | \ - ((func) & 0xf) | \ - (((dir) & 0x1) << 14) | \ - (((pull) & 0x3) << 15) | \ - (((drvstr) & 0xF) << 17)) - -int msm_proc_comm(unsigned cmd, unsigned *data1, unsigned *data2); -void proc_comm_boot_wait(void); - -#endif diff --git a/arch/arm/mach-msm/sirc.c b/arch/arm/mach-msm/sirc.c deleted file mode 100644 index 689e78c..0000000 --- a/arch/arm/mach-msm/sirc.c +++ /dev/null @@ -1,172 +0,0 @@ -/* Copyright (c) 2008-2009, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA - * 02110-1301, USA. - * - */ - -#include <linux/io.h> -#include <linux/irq.h> -#include <linux/interrupt.h> -#include <asm/irq.h> - -static unsigned int int_enable; -static unsigned int wake_enable; - -static struct sirc_regs_t sirc_regs = { - .int_enable = SPSS_SIRC_INT_ENABLE, - .int_enable_clear = SPSS_SIRC_INT_ENABLE_CLEAR, - .int_enable_set = SPSS_SIRC_INT_ENABLE_SET, - .int_type = SPSS_SIRC_INT_TYPE, - .int_polarity = SPSS_SIRC_INT_POLARITY, - .int_clear = SPSS_SIRC_INT_CLEAR, -}; - -static struct sirc_cascade_regs sirc_reg_table[] = { - { - .int_status = SPSS_SIRC_IRQ_STATUS, - .cascade_irq = INT_SIRC_0, - } -}; - -/* Mask off the given interrupt. Keep the int_enable mask in sync with - the enable reg, so it can be restored after power collapse. */ -static void sirc_irq_mask(struct irq_data *d) -{ - unsigned int mask; - - mask = 1 << (d->irq - FIRST_SIRC_IRQ); - writel(mask, sirc_regs.int_enable_clear); - int_enable &= ~mask; - return; -} - -/* Unmask the given interrupt. Keep the int_enable mask in sync with - the enable reg, so it can be restored after power collapse. */ -static void sirc_irq_unmask(struct irq_data *d) -{ - unsigned int mask; - - mask = 1 << (d->irq - FIRST_SIRC_IRQ); - writel(mask, sirc_regs.int_enable_set); - int_enable |= mask; - return; -} - -static void sirc_irq_ack(struct irq_data *d) -{ - unsigned int mask; - - mask = 1 << (d->irq - FIRST_SIRC_IRQ); - writel(mask, sirc_regs.int_clear); - return; -} - -static int sirc_irq_set_wake(struct irq_data *d, unsigned int on) -{ - unsigned int mask; - - /* Used to set the interrupt enable mask during power collapse. */ - mask = 1 << (d->irq - FIRST_SIRC_IRQ); - if (on) - wake_enable |= mask; - else - wake_enable &= ~mask; - - return 0; -} - -static int sirc_irq_set_type(struct irq_data *d, unsigned int flow_type) -{ - unsigned int mask; - unsigned int val; - - mask = 1 << (d->irq - FIRST_SIRC_IRQ); - val = readl(sirc_regs.int_polarity); - - if (flow_type & (IRQF_TRIGGER_LOW | IRQF_TRIGGER_FALLING)) - val |= mask; - else - val &= ~mask; - - writel(val, sirc_regs.int_polarity); - - val = readl(sirc_regs.int_type); - if (flow_type & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING)) { - val |= mask; - __irq_set_handler_locked(d->irq, handle_edge_irq); - } else { - val &= ~mask; - __irq_set_handler_locked(d->irq, handle_level_irq); - } - - writel(val, sirc_regs.int_type); - - return 0; -} - -/* Finds the pending interrupt on the passed cascade irq and redrives it */ -static void sirc_irq_handler(unsigned int irq, struct irq_desc *desc) -{ - unsigned int reg = 0; - unsigned int sirq; - unsigned int status; - - while ((reg < ARRAY_SIZE(sirc_reg_table)) && - (sirc_reg_table[reg].cascade_irq != irq)) - reg++; - - status = readl(sirc_reg_table[reg].int_status); - status &= SIRC_MASK; - if (status == 0) - return; - - for (sirq = 0; - (sirq < NR_SIRC_IRQS) && ((status & (1U << sirq)) == 0); - sirq++) - ; - generic_handle_irq(sirq+FIRST_SIRC_IRQ); - - desc->irq_data.chip->irq_ack(&desc->irq_data); -} - -static struct irq_chip sirc_irq_chip = { - .name = "sirc", - .irq_ack = sirc_irq_ack, - .irq_mask = sirc_irq_mask, - .irq_unmask = sirc_irq_unmask, - .irq_set_wake = sirc_irq_set_wake, - .irq_set_type = sirc_irq_set_type, -}; - -void __init msm_init_sirc(void) -{ - int i; - - int_enable = 0; - wake_enable = 0; - - for (i = FIRST_SIRC_IRQ; i < LAST_SIRC_IRQ; i++) { - irq_set_chip_and_handler(i, &sirc_irq_chip, handle_edge_irq); - set_irq_flags(i, IRQF_VALID); - } - - for (i = 0; i < ARRAY_SIZE(sirc_reg_table); i++) { - irq_set_chained_handler(sirc_reg_table[i].cascade_irq, - sirc_irq_handler); - irq_set_irq_wake(sirc_reg_table[i].cascade_irq, 1); - } - return; -} - diff --git a/arch/arm/mach-msm/smd.c b/arch/arm/mach-msm/smd.c deleted file mode 100644 index 7550f5a..0000000 --- a/arch/arm/mach-msm/smd.c +++ /dev/null @@ -1,1034 +0,0 @@ -/* arch/arm/mach-msm/smd.c - * - * Copyright (C) 2007 Google, Inc. - * Author: Brian Swetland <swetland@google.com> - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt - -#include <linux/platform_device.h> -#include <linux/module.h> -#include <linux/fs.h> -#include <linux/cdev.h> -#include <linux/device.h> -#include <linux/wait.h> -#include <linux/interrupt.h> -#include <linux/irq.h> -#include <linux/list.h> -#include <linux/slab.h> -#include <linux/debugfs.h> -#include <linux/delay.h> - -#include <mach/msm_smd.h> - -#include "smd_private.h" -#include "proc_comm.h" - -#if defined(CONFIG_ARCH_QSD8X50) -#define CONFIG_QDSP6 1 -#endif - -#define MODULE_NAME "msm_smd" - -enum { - MSM_SMD_DEBUG = 1U << 0, - MSM_SMSM_DEBUG = 1U << 0, -}; - -static int msm_smd_debug_mask; - -struct shared_info { - int ready; - void __iomem *state; -}; - -static unsigned dummy_state[SMSM_STATE_COUNT]; - -static struct shared_info smd_info = { - /* FIXME: not a real __iomem pointer */ - .state = &dummy_state, -}; - -module_param_named(debug_mask, msm_smd_debug_mask, - int, S_IRUGO | S_IWUSR | S_IWGRP); - -static unsigned last_heap_free = 0xffffffff; - -static inline void notify_other_smsm(void) -{ - msm_a2m_int(5); -#ifdef CONFIG_QDSP6 - msm_a2m_int(8); -#endif -} - -static inline void notify_modem_smd(void) -{ - msm_a2m_int(0); -} - -static inline void notify_dsp_smd(void) -{ - msm_a2m_int(8); -} - -static void smd_diag(void) -{ - char *x; - - x = smem_find(ID_DIAG_ERR_MSG, SZ_DIAG_ERR_MSG); - if (x != 0) { - x[SZ_DIAG_ERR_MSG - 1] = 0; - pr_debug("DIAG '%s'\n", x); - } -} - -/* call when SMSM_RESET flag is set in the A9's smsm_state */ -static void handle_modem_crash(void) -{ - pr_err("ARM9 has CRASHED\n"); - smd_diag(); - - /* in this case the modem or watchdog should reboot us */ - for (;;) - ; -} - -uint32_t raw_smsm_get_state(enum smsm_state_item item) -{ - return readl(smd_info.state + item * 4); -} - -static int check_for_modem_crash(void) -{ - if (raw_smsm_get_state(SMSM_STATE_MODEM) & SMSM_RESET) { - handle_modem_crash(); - return -1; - } - return 0; -} - -/* the spinlock is used to synchronize between the - * irq handler and code that mutates the channel - * list or fiddles with channel state - */ -DEFINE_SPINLOCK(smd_lock); -DEFINE_SPINLOCK(smem_lock); - -/* the mutex is used during open() and close() - * operations to avoid races while creating or - * destroying smd_channel structures - */ -static DEFINE_MUTEX(smd_creation_mutex); - -static int smd_initialized; - -LIST_HEAD(smd_ch_closed_list); -LIST_HEAD(smd_ch_list_modem); -LIST_HEAD(smd_ch_list_dsp); - -static unsigned char smd_ch_allocated[64]; -static struct work_struct probe_work; - -/* how many bytes are available for reading */ -static int smd_stream_read_avail(struct smd_channel *ch) -{ - return (ch->recv->head - ch->recv->tail) & ch->fifo_mask; -} - -/* how many bytes we are free to write */ -static int smd_stream_write_avail(struct smd_channel *ch) -{ - return ch->fifo_mask - - ((ch->send->head - ch->send->tail) & ch->fifo_mask); -} - -static int smd_packet_read_avail(struct smd_channel *ch) -{ - if (ch->current_packet) { - int n = smd_stream_read_avail(ch); - if (n > ch->current_packet) - n = ch->current_packet; - return n; - } else { - return 0; - } -} - -static int smd_packet_write_avail(struct smd_channel *ch) -{ - int n = smd_stream_write_avail(ch); - return n > SMD_HEADER_SIZE ? n - SMD_HEADER_SIZE : 0; -} - -static int ch_is_open(struct smd_channel *ch) -{ - return (ch->recv->state == SMD_SS_OPENED) && - (ch->send->state == SMD_SS_OPENED); -} - -/* provide a pointer and length to readable data in the fifo */ -static unsigned ch_read_buffer(struct smd_channel *ch, void **ptr) -{ - unsigned head = ch->recv->head; - unsigned tail = ch->recv->tail; - *ptr = (void *) (ch->recv_data + tail); - - if (tail <= head) - return head - tail; - else - return ch->fifo_size - tail; -} - -/* advance the fifo read pointer after data from ch_read_buffer is consumed */ -static void ch_read_done(struct smd_channel *ch, unsigned count) -{ - BUG_ON(count > smd_stream_read_avail(ch)); - ch->recv->tail = (ch->recv->tail + count) & ch->fifo_mask; - ch->send->fTAIL = 1; -} - -/* basic read interface to ch_read_{buffer,done} used - * by smd_*_read() and update_packet_state() - * will read-and-discard if the _data pointer is null - */ -static int ch_read(struct smd_channel *ch, void *_data, int len) -{ - void *ptr; - unsigned n; - unsigned char *data = _data; - int orig_len = len; - - while (len > 0) { - n = ch_read_buffer(ch, &ptr); - if (n == 0) - break; - - if (n > len) - n = len; - if (_data) - memcpy(data, ptr, n); - - data += n; - len -= n; - ch_read_done(ch, n); - } - - return orig_len - len; -} - -static void update_stream_state(struct smd_channel *ch) -{ - /* streams have no special state requiring updating */ -} - -static void update_packet_state(struct smd_channel *ch) -{ - unsigned hdr[5]; - int r; - - /* can't do anything if we're in the middle of a packet */ - if (ch->current_packet != 0) - return; - - /* don't bother unless we can get the full header */ - if (smd_stream_read_avail(ch) < SMD_HEADER_SIZE) - return; - - r = ch_read(ch, hdr, SMD_HEADER_SIZE); - BUG_ON(r != SMD_HEADER_SIZE); - - ch->current_packet = hdr[0]; -} - -/* provide a pointer and length to next free space in the fifo */ -static unsigned ch_write_buffer(struct smd_channel *ch, void **ptr) -{ - unsigned head = ch->send->head; - unsigned tail = ch->send->tail; - *ptr = (void *) (ch->send_data + head); - - if (head < tail) { - return tail - head - 1; - } else { - if (tail == 0) - return ch->fifo_size - head - 1; - else - return ch->fifo_size - head; - } -} - -/* advace the fifo write pointer after freespace - * from ch_write_buffer is filled - */ -static void ch_write_done(struct smd_channel *ch, unsigned count) -{ - BUG_ON(count > smd_stream_write_avail(ch)); - ch->send->head = (ch->send->head + count) & ch->fifo_mask; - ch->send->fHEAD = 1; -} - -static void ch_set_state(struct smd_channel *ch, unsigned n) -{ - if (n == SMD_SS_OPENED) { - ch->send->fDSR = 1; - ch->send->fCTS = 1; - ch->send->fCD = 1; - } else { - ch->send->fDSR = 0; - ch->send->fCTS = 0; - ch->send->fCD = 0; - } - ch->send->state = n; - ch->send->fSTATE = 1; - ch->notify_other_cpu(); -} - -static void do_smd_probe(void) -{ - struct smem_shared *shared = (void *) MSM_SHARED_RAM_BASE; - if (shared->heap_info.free_offset != last_heap_free) { - last_heap_free = shared->heap_info.free_offset; - schedule_work(&probe_work); - } -} - -static void smd_state_change(struct smd_channel *ch, - unsigned last, unsigned next) -{ - ch->last_state = next; - - pr_debug("ch %d %d -> %d\n", ch->n, last, next); - - switch (next) { - case SMD_SS_OPENING: - ch->recv->tail = 0; - case SMD_SS_OPENED: - if (ch->send->state != SMD_SS_OPENED) - ch_set_state(ch, SMD_SS_OPENED); - ch->notify(ch->priv, SMD_EVENT_OPEN); - break; - case SMD_SS_FLUSHING: - case SMD_SS_RESET: - /* we should force them to close? */ - default: - ch->notify(ch->priv, SMD_EVENT_CLOSE); - } -} - -static void handle_smd_irq(struct list_head *list, void (*notify)(void)) -{ - unsigned long flags; - struct smd_channel *ch; - int do_notify = 0; - unsigned ch_flags; - unsigned tmp; - - spin_lock_irqsave(&smd_lock, flags); - list_for_each_entry(ch, list, ch_list) { - ch_flags = 0; - if (ch_is_open(ch)) { - if (ch->recv->fHEAD) { - ch->recv->fHEAD = 0; - ch_flags |= 1; - do_notify |= 1; - } - if (ch->recv->fTAIL) { - ch->recv->fTAIL = 0; - ch_flags |= 2; - do_notify |= 1; - } - if (ch->recv->fSTATE) { - ch->recv->fSTATE = 0; - ch_flags |= 4; - do_notify |= 1; - } - } - tmp = ch->recv->state; - if (tmp != ch->last_state) - smd_state_change(ch, ch->last_state, tmp); - if (ch_flags) { - ch->update_state(ch); - ch->notify(ch->priv, SMD_EVENT_DATA); - } - } - if (do_notify) - notify(); - spin_unlock_irqrestore(&smd_lock, flags); - do_smd_probe(); -} - -static irqreturn_t smd_modem_irq_handler(int irq, void *data) -{ - handle_smd_irq(&smd_ch_list_modem, notify_modem_smd); - return IRQ_HANDLED; -} - -#if defined(CONFIG_QDSP6) -static irqreturn_t smd_dsp_irq_handler(int irq, void *data) -{ - handle_smd_irq(&smd_ch_list_dsp, notify_dsp_smd); - return IRQ_HANDLED; -} -#endif - -static void smd_fake_irq_handler(unsigned long arg) -{ - handle_smd_irq(&smd_ch_list_modem, notify_modem_smd); - handle_smd_irq(&smd_ch_list_dsp, notify_dsp_smd); -} - -static DECLARE_TASKLET(smd_fake_irq_tasklet, smd_fake_irq_handler, 0); - -static inline int smd_need_int(struct smd_channel *ch) -{ - if (ch_is_open(ch)) { - if (ch->recv->fHEAD || ch->recv->fTAIL || ch->recv->fSTATE) - return 1; - if (ch->recv->state != ch->last_state) - return 1; - } - return 0; -} - -void smd_sleep_exit(void) -{ - unsigned long flags; - struct smd_channel *ch; - int need_int = 0; - - spin_lock_irqsave(&smd_lock, flags); - list_for_each_entry(ch, &smd_ch_list_modem, ch_list) { - if (smd_need_int(ch)) { - need_int = 1; - break; - } - } - list_for_each_entry(ch, &smd_ch_list_dsp, ch_list) { - if (smd_need_int(ch)) { - need_int = 1; - break; - } - } - spin_unlock_irqrestore(&smd_lock, flags); - do_smd_probe(); - - if (need_int) { - if (msm_smd_debug_mask & MSM_SMD_DEBUG) - pr_info("smd_sleep_exit need interrupt\n"); - tasklet_schedule(&smd_fake_irq_tasklet); - } -} - - -void smd_kick(smd_channel_t *ch) -{ - unsigned long flags; - unsigned tmp; - - spin_lock_irqsave(&smd_lock, flags); - ch->update_state(ch); - tmp = ch->recv->state; - if (tmp != ch->last_state) { - ch->last_state = tmp; - if (tmp == SMD_SS_OPENED) - ch->notify(ch->priv, SMD_EVENT_OPEN); - else - ch->notify(ch->priv, SMD_EVENT_CLOSE); - } - ch->notify(ch->priv, SMD_EVENT_DATA); - ch->notify_other_cpu(); - spin_unlock_irqrestore(&smd_lock, flags); -} - -static int smd_is_packet(int chn, unsigned type) -{ - type &= SMD_KIND_MASK; - if (type == SMD_KIND_PACKET) - return 1; - if (type == SMD_KIND_STREAM) - return 0; - - /* older AMSS reports SMD_KIND_UNKNOWN always */ - if ((chn > 4) || (chn == 1)) - return 1; - else - return 0; -} - -static int smd_stream_write(smd_channel_t *ch, const void *_data, int len) -{ - void *ptr; - const unsigned char *buf = _data; - unsigned xfer; - int orig_len = len; - - if (len < 0) - return -EINVAL; - - while ((xfer = ch_write_buffer(ch, &ptr)) != 0) { - if (!ch_is_open(ch)) - break; - if (xfer > len) - xfer = len; - memcpy(ptr, buf, xfer); - ch_write_done(ch, xfer); - len -= xfer; - buf += xfer; - if (len == 0) - break; - } - - ch->notify_other_cpu(); - - return orig_len - len; -} - -static int smd_packet_write(smd_channel_t *ch, const void *_data, int len) -{ - unsigned hdr[5]; - - if (len < 0) - return -EINVAL; - - if (smd_stream_write_avail(ch) < (len + SMD_HEADER_SIZE)) - return -ENOMEM; - - hdr[0] = len; - hdr[1] = hdr[2] = hdr[3] = hdr[4] = 0; - - smd_stream_write(ch, hdr, sizeof(hdr)); - smd_stream_write(ch, _data, len); - - return len; -} - -static int smd_stream_read(smd_channel_t *ch, void *data, int len) -{ - int r; - - if (len < 0) - return -EINVAL; - - r = ch_read(ch, data, len); - if (r > 0) - ch->notify_other_cpu(); - - return r; -} - -static int smd_packet_read(smd_channel_t *ch, void *data, int len) -{ - unsigned long flags; - int r; - - if (len < 0) - return -EINVAL; - - if (len > ch->current_packet) - len = ch->current_packet; - - r = ch_read(ch, data, len); - if (r > 0) - ch->notify_other_cpu(); - - spin_lock_irqsave(&smd_lock, flags); - ch->current_packet -= r; - update_packet_state(ch); - spin_unlock_irqrestore(&smd_lock, flags); - - return r; -} - -static int smd_alloc_channel(const char *name, uint32_t cid, uint32_t type) -{ - struct smd_channel *ch; - - ch = kzalloc(sizeof(struct smd_channel), GFP_KERNEL); - if (ch == 0) { - pr_err("smd_alloc_channel() out of memory\n"); - return -1; - } - ch->n = cid; - - if (_smd_alloc_channel(ch)) { - kfree(ch); - return -1; - } - - ch->fifo_mask = ch->fifo_size - 1; - ch->type = type; - - if ((type & SMD_TYPE_MASK) == SMD_TYPE_APPS_MODEM) - ch->notify_other_cpu = notify_modem_smd; - else - ch->notify_other_cpu = notify_dsp_smd; - - if (smd_is_packet(cid, type)) { - ch->read = smd_packet_read; - ch->write = smd_packet_write; - ch->read_avail = smd_packet_read_avail; - ch->write_avail = smd_packet_write_avail; - ch->update_state = update_packet_state; - } else { - ch->read = smd_stream_read; - ch->write = smd_stream_write; - ch->read_avail = smd_stream_read_avail; - ch->write_avail = smd_stream_write_avail; - ch->update_state = update_stream_state; - } - - if ((type & 0xff) == 0) - memcpy(ch->name, "SMD_", 4); - else - memcpy(ch->name, "DSP_", 4); - memcpy(ch->name + 4, name, 20); - ch->name[23] = 0; - ch->pdev.name = ch->name; - ch->pdev.id = -1; - - pr_debug("smd_alloc_channel() cid=%02d size=%05d '%s'\n", - ch->n, ch->fifo_size, ch->name); - - mutex_lock(&smd_creation_mutex); - list_add(&ch->ch_list, &smd_ch_closed_list); - mutex_unlock(&smd_creation_mutex); - - platform_device_register(&ch->pdev); - return 0; -} - -static void smd_channel_probe_worker(struct work_struct *work) -{ - struct smd_alloc_elm *shared; - unsigned ctype; - unsigned type; - unsigned n; - - shared = smem_find(ID_CH_ALLOC_TBL, sizeof(*shared) * 64); - if (!shared) { - pr_err("cannot find allocation table\n"); - return; - } - for (n = 0; n < 64; n++) { - if (smd_ch_allocated[n]) - continue; - if (!shared[n].ref_count) - continue; - if (!shared[n].name[0]) - continue; - ctype = shared[n].ctype; - type = ctype & SMD_TYPE_MASK; - - /* DAL channels are stream but neither the modem, - * nor the DSP correctly indicate this. Fixup manually. - */ - if (!memcmp(shared[n].name, "DAL", 3)) - ctype = (ctype & (~SMD_KIND_MASK)) | SMD_KIND_STREAM; - - type = shared[n].ctype & SMD_TYPE_MASK; - if ((type == SMD_TYPE_APPS_MODEM) || - (type == SMD_TYPE_APPS_DSP)) - if (!smd_alloc_channel(shared[n].name, shared[n].cid, ctype)) - smd_ch_allocated[n] = 1; - } -} - -static void do_nothing_notify(void *priv, unsigned flags) -{ -} - -struct smd_channel *smd_get_channel(const char *name) -{ - struct smd_channel *ch; - - mutex_lock(&smd_creation_mutex); - list_for_each_entry(ch, &smd_ch_closed_list, ch_list) { - if (!strcmp(name, ch->name)) { - list_del(&ch->ch_list); - mutex_unlock(&smd_creation_mutex); - return ch; - } - } - mutex_unlock(&smd_creation_mutex); - - return NULL; -} - -int smd_open(const char *name, smd_channel_t **_ch, - void *priv, void (*notify)(void *, unsigned)) -{ - struct smd_channel *ch; - unsigned long flags; - - if (smd_initialized == 0) { - pr_info("smd_open() before smd_init()\n"); - return -ENODEV; - } - - ch = smd_get_channel(name); - if (!ch) - return -ENODEV; - - if (notify == 0) - notify = do_nothing_notify; - - ch->notify = notify; - ch->current_packet = 0; - ch->last_state = SMD_SS_CLOSED; - ch->priv = priv; - - *_ch = ch; - - spin_lock_irqsave(&smd_lock, flags); - - if ((ch->type & SMD_TYPE_MASK) == SMD_TYPE_APPS_MODEM) - list_add(&ch->ch_list, &smd_ch_list_modem); - else - list_add(&ch->ch_list, &smd_ch_list_dsp); - - /* If the remote side is CLOSING, we need to get it to - * move to OPENING (which we'll do by moving from CLOSED to - * OPENING) and then get it to move from OPENING to - * OPENED (by doing the same state change ourselves). - * - * Otherwise, it should be OPENING and we can move directly - * to OPENED so that it will follow. - */ - if (ch->recv->state == SMD_SS_CLOSING) { - ch->send->head = 0; - ch_set_state(ch, SMD_SS_OPENING); - } else { - ch_set_state(ch, SMD_SS_OPENED); - } - spin_unlock_irqrestore(&smd_lock, flags); - smd_kick(ch); - - return 0; -} - -int smd_close(smd_channel_t *ch) -{ - unsigned long flags; - - if (ch == 0) - return -1; - - spin_lock_irqsave(&smd_lock, flags); - ch->notify = do_nothing_notify; - list_del(&ch->ch_list); - ch_set_state(ch, SMD_SS_CLOSED); - spin_unlock_irqrestore(&smd_lock, flags); - - mutex_lock(&smd_creation_mutex); - list_add(&ch->ch_list, &smd_ch_closed_list); - mutex_unlock(&smd_creation_mutex); - - return 0; -} - -int smd_read(smd_channel_t *ch, void *data, int len) -{ - return ch->read(ch, data, len); -} - -int smd_write(smd_channel_t *ch, const void *data, int len) -{ - return ch->write(ch, data, len); -} - -int smd_write_atomic(smd_channel_t *ch, const void *data, int len) -{ - unsigned long flags; - int res; - spin_lock_irqsave(&smd_lock, flags); - res = ch->write(ch, data, len); - spin_unlock_irqrestore(&smd_lock, flags); - return res; -} - -int smd_read_avail(smd_channel_t *ch) -{ - return ch->read_avail(ch); -} - -int smd_write_avail(smd_channel_t *ch) -{ - return ch->write_avail(ch); -} - -int smd_wait_until_readable(smd_channel_t *ch, int bytes) -{ - return -1; -} - -int smd_wait_until_writable(smd_channel_t *ch, int bytes) -{ - return -1; -} - -int smd_cur_packet_size(smd_channel_t *ch) -{ - return ch->current_packet; -} - - -/* ------------------------------------------------------------------------- */ - -void *smem_alloc(unsigned id, unsigned size) -{ - return smem_find(id, size); -} - -void __iomem *smem_item(unsigned id, unsigned *size) -{ - struct smem_shared *shared = (void *) MSM_SHARED_RAM_BASE; - struct smem_heap_entry *toc = shared->heap_toc; - - if (id >= SMEM_NUM_ITEMS) - return NULL; - - if (toc[id].allocated) { - *size = toc[id].size; - return (MSM_SHARED_RAM_BASE + toc[id].offset); - } else { - *size = 0; - } - - return NULL; -} - -void *smem_find(unsigned id, unsigned size_in) -{ - unsigned size; - void *ptr; - - ptr = smem_item(id, &size); - if (!ptr) - return 0; - - size_in = ALIGN(size_in, 8); - if (size_in != size) { - pr_err("smem_find(%d, %d): wrong size %d\n", - id, size_in, size); - return 0; - } - - return ptr; -} - -static irqreturn_t smsm_irq_handler(int irq, void *data) -{ - unsigned long flags; - unsigned apps, modm; - - spin_lock_irqsave(&smem_lock, flags); - - apps = raw_smsm_get_state(SMSM_STATE_APPS); - modm = raw_smsm_get_state(SMSM_STATE_MODEM); - - if (msm_smd_debug_mask & MSM_SMSM_DEBUG) - pr_info("<SM %08x %08x>\n", apps, modm); - if (modm & SMSM_RESET) - handle_modem_crash(); - - do_smd_probe(); - - spin_unlock_irqrestore(&smem_lock, flags); - return IRQ_HANDLED; -} - -int smsm_change_state(enum smsm_state_item item, - uint32_t clear_mask, uint32_t set_mask) -{ - void __iomem *addr = smd_info.state + item * 4; - unsigned long flags; - unsigned state; - - if (!smd_info.ready) - return -EIO; - - spin_lock_irqsave(&smem_lock, flags); - - if (raw_smsm_get_state(SMSM_STATE_MODEM) & SMSM_RESET) - handle_modem_crash(); - - state = (readl(addr) & ~clear_mask) | set_mask; - writel(state, addr); - - if (msm_smd_debug_mask & MSM_SMSM_DEBUG) - pr_info("smsm_change_state %d %x\n", item, state); - notify_other_smsm(); - - spin_unlock_irqrestore(&smem_lock, flags); - - return 0; -} - -uint32_t smsm_get_state(enum smsm_state_item item) -{ - unsigned long flags; - uint32_t rv; - - spin_lock_irqsave(&smem_lock, flags); - - rv = readl(smd_info.state + item * 4); - - if (item == SMSM_STATE_MODEM && (rv & SMSM_RESET)) - handle_modem_crash(); - - spin_unlock_irqrestore(&smem_lock, flags); - - return rv; -} - -#ifdef CONFIG_ARCH_MSM_SCORPION - -int smsm_set_sleep_duration(uint32_t delay) -{ - struct msm_dem_slave_data *ptr; - - ptr = smem_find(SMEM_APPS_DEM_SLAVE_DATA, sizeof(*ptr)); - if (ptr == NULL) { - pr_err("smsm_set_sleep_duration <SM NO APPS_DEM_SLAVE_DATA>\n"); - return -EIO; - } - if (msm_smd_debug_mask & MSM_SMSM_DEBUG) - pr_info("smsm_set_sleep_duration %d -> %d\n", - ptr->sleep_time, delay); - ptr->sleep_time = delay; - return 0; -} - -#else - -int smsm_set_sleep_duration(uint32_t delay) -{ - uint32_t *ptr; - - ptr = smem_find(SMEM_SMSM_SLEEP_DELAY, sizeof(*ptr)); - if (ptr == NULL) { - pr_err("smsm_set_sleep_duration <SM NO SLEEP_DELAY>\n"); - return -EIO; - } - if (msm_smd_debug_mask & MSM_SMSM_DEBUG) - pr_info("smsm_set_sleep_duration %d -> %d\n", - *ptr, delay); - *ptr = delay; - return 0; -} - -#endif - -int smd_core_init(void) -{ - int r; - - /* wait for essential items to be initialized */ - for (;;) { - unsigned size; - void __iomem *state; - state = smem_item(SMEM_SMSM_SHARED_STATE, &size); - if (size == SMSM_V1_SIZE || size == SMSM_V2_SIZE) { - smd_info.state = state; - break; - } - } - - smd_info.ready = 1; - - r = request_irq(INT_A9_M2A_0, smd_modem_irq_handler, - IRQF_TRIGGER_RISING, "smd_dev", 0); - if (r < 0) - return r; - r = enable_irq_wake(INT_A9_M2A_0); - if (r < 0) - pr_err("smd_core_init: enable_irq_wake failed for A9_M2A_0\n"); - - r = request_irq(INT_A9_M2A_5, smsm_irq_handler, - IRQF_TRIGGER_RISING, "smsm_dev", 0); - if (r < 0) { - free_irq(INT_A9_M2A_0, 0); - return r; - } - r = enable_irq_wake(INT_A9_M2A_5); - if (r < 0) - pr_err("smd_core_init: enable_irq_wake failed for A9_M2A_5\n"); - -#if defined(CONFIG_QDSP6) - r = request_irq(INT_ADSP_A11, smd_dsp_irq_handler, - IRQF_TRIGGER_RISING, "smd_dsp", 0); - if (r < 0) { - free_irq(INT_A9_M2A_0, 0); - free_irq(INT_A9_M2A_5, 0); - return r; - } -#endif - - /* check for any SMD channels that may already exist */ - do_smd_probe(); - - /* indicate that we're up and running */ - smsm_change_state(SMSM_STATE_APPS, - ~0, SMSM_INIT | SMSM_SMDINIT | SMSM_RPCINIT | SMSM_RUN); -#ifdef CONFIG_ARCH_MSM_SCORPION - smsm_change_state(SMSM_STATE_APPS_DEM, ~0, 0); -#endif - - return 0; -} - -static int msm_smd_probe(struct platform_device *pdev) -{ - /* - * If we haven't waited for the ARM9 to boot up till now, - * then we need to wait here. Otherwise this should just - * return immediately. - */ - proc_comm_boot_wait(); - - INIT_WORK(&probe_work, smd_channel_probe_worker); - - if (smd_core_init()) { - pr_err("smd_core_init() failed\n"); - return -1; - } - - do_smd_probe(); - - msm_check_for_modem_crash = check_for_modem_crash; - - msm_init_last_radio_log(THIS_MODULE); - - smd_initialized = 1; - - return 0; -} - -static struct platform_driver msm_smd_driver = { - .probe = msm_smd_probe, - .driver = { - .name = MODULE_NAME, - }, -}; - -static int __init msm_smd_init(void) -{ - return platform_driver_register(&msm_smd_driver); -} - -module_init(msm_smd_init); - -MODULE_DESCRIPTION("MSM Shared Memory Core"); -MODULE_AUTHOR("Brian Swetland <swetland@google.com>"); -MODULE_LICENSE("GPL"); diff --git a/arch/arm/mach-msm/smd_debug.c b/arch/arm/mach-msm/smd_debug.c deleted file mode 100644 index 8056b3e..0000000 --- a/arch/arm/mach-msm/smd_debug.c +++ /dev/null @@ -1,311 +0,0 @@ -/* arch/arm/mach-msm/smd_debug.c - * - * Copyright (C) 2007 Google, Inc. - * Author: Brian Swetland <swetland@google.com> - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#include <linux/debugfs.h> -#include <linux/list.h> - -#include <mach/msm_iomap.h> - -#include "smd_private.h" - -#if defined(CONFIG_DEBUG_FS) - -static char *chstate(unsigned n) -{ - switch (n) { - case SMD_SS_CLOSED: - return "CLOSED"; - case SMD_SS_OPENING: - return "OPENING"; - case SMD_SS_OPENED: - return "OPENED"; - case SMD_SS_FLUSHING: - return "FLUSHING"; - case SMD_SS_CLOSING: - return "CLOSING"; - case SMD_SS_RESET: - return "RESET"; - case SMD_SS_RESET_OPENING: - return "ROPENING"; - default: - return "UNKNOWN"; - } -} - - -static int dump_ch(char *buf, int max, struct smd_channel *ch) -{ - volatile struct smd_half_channel *s = ch->send; - volatile struct smd_half_channel *r = ch->recv; - - return scnprintf( - buf, max, - "ch%02d:" - " %8s(%05d/%05d) %c%c%c%c%c%c%c <->" - " %8s(%05d/%05d) %c%c%c%c%c%c%c '%s'\n", ch->n, - chstate(s->state), s->tail, s->head, - s->fDSR ? 'D' : 'd', - s->fCTS ? 'C' : 'c', - s->fCD ? 'C' : 'c', - s->fRI ? 'I' : 'i', - s->fHEAD ? 'W' : 'w', - s->fTAIL ? 'R' : 'r', - s->fSTATE ? 'S' : 's', - chstate(r->state), r->tail, r->head, - r->fDSR ? 'D' : 'd', - r->fCTS ? 'R' : 'r', - r->fCD ? 'C' : 'c', - r->fRI ? 'I' : 'i', - r->fHEAD ? 'W' : 'w', - r->fTAIL ? 'R' : 'r', - r->fSTATE ? 'S' : 's', - ch->name - ); -} - -static int debug_read_stat(char *buf, int max) -{ - char *msg; - int i = 0; - - msg = smem_find(ID_DIAG_ERR_MSG, SZ_DIAG_ERR_MSG); - - if (raw_smsm_get_state(SMSM_STATE_MODEM) & SMSM_RESET) - i += scnprintf(buf + i, max - i, - "smsm: ARM9 HAS CRASHED\n"); - - i += scnprintf(buf + i, max - i, "smsm: a9: %08x a11: %08x\n", - raw_smsm_get_state(SMSM_STATE_MODEM), - raw_smsm_get_state(SMSM_STATE_APPS)); -#ifdef CONFIG_ARCH_MSM_SCORPION - i += scnprintf(buf + i, max - i, "smsm dem: apps: %08x modem: %08x " - "qdsp6: %08x power: %08x time: %08x\n", - raw_smsm_get_state(SMSM_STATE_APPS_DEM), - raw_smsm_get_state(SMSM_STATE_MODEM_DEM), - raw_smsm_get_state(SMSM_STATE_QDSP6_DEM), - raw_smsm_get_state(SMSM_STATE_POWER_MASTER_DEM), - raw_smsm_get_state(SMSM_STATE_TIME_MASTER_DEM)); -#endif - if (msg) { - msg[SZ_DIAG_ERR_MSG - 1] = 0; - i += scnprintf(buf + i, max - i, "diag: '%s'\n", msg); - } - return i; -} - -static int debug_read_mem(char *buf, int max) -{ - unsigned n; - struct smem_shared *shared = (void *) MSM_SHARED_RAM_BASE; - struct smem_heap_entry *toc = shared->heap_toc; - int i = 0; - - i += scnprintf(buf + i, max - i, - "heap: init=%d free=%d remain=%d\n", - shared->heap_info.initialized, - shared->heap_info.free_offset, - shared->heap_info.heap_remaining); - - for (n = 0; n < SMEM_NUM_ITEMS; n++) { - if (toc[n].allocated == 0) - continue; - i += scnprintf(buf + i, max - i, - "%04d: offset %08x size %08x\n", - n, toc[n].offset, toc[n].size); - } - return i; -} - -static int debug_read_ch(char *buf, int max) -{ - struct smd_channel *ch; - unsigned long flags; - int i = 0; - - spin_lock_irqsave(&smd_lock, flags); - list_for_each_entry(ch, &smd_ch_list_dsp, ch_list) - i += dump_ch(buf + i, max - i, ch); - list_for_each_entry(ch, &smd_ch_list_modem, ch_list) - i += dump_ch(buf + i, max - i, ch); - list_for_each_entry(ch, &smd_ch_closed_list, ch_list) - i += dump_ch(buf + i, max - i, ch); - spin_unlock_irqrestore(&smd_lock, flags); - - return i; -} - -static int debug_read_version(char *buf, int max) -{ - struct smem_shared *shared = (void *) MSM_SHARED_RAM_BASE; - unsigned version = shared->version[VERSION_MODEM]; - return sprintf(buf, "%d.%d\n", version >> 16, version & 0xffff); -} - -static int debug_read_build_id(char *buf, int max) -{ - unsigned size; - void *data; - - data = smem_item(SMEM_HW_SW_BUILD_ID, &size); - if (!data) - return 0; - - if (size >= max) - size = max; - memcpy(buf, data, size); - - return size; -} - -static int debug_read_alloc_tbl(char *buf, int max) -{ - struct smd_alloc_elm *shared; - int n, i = 0; - - shared = smem_find(ID_CH_ALLOC_TBL, sizeof(*shared) * 64); - - for (n = 0; n < 64; n++) { - if (shared[n].ref_count == 0) - continue; - i += scnprintf(buf + i, max - i, - "%03d: %-20s cid=%02d type=%03d " - "kind=%02d ref_count=%d\n", - n, shared[n].name, shared[n].cid, - shared[n].ctype & 0xff, - (shared[n].ctype >> 8) & 0xf, - shared[n].ref_count); - } - - return i; -} - -#define DEBUG_BUFMAX 4096 -static char debug_buffer[DEBUG_BUFMAX]; - -static ssize_t debug_read(struct file *file, char __user *buf, - size_t count, loff_t *ppos) -{ - int (*fill)(char *buf, int max) = file->private_data; - int bsize = fill(debug_buffer, DEBUG_BUFMAX); - return simple_read_from_buffer(buf, count, ppos, debug_buffer, bsize); -} - -static const struct file_operations debug_ops = { - .read = debug_read, - .open = simple_open, - .llseek = default_llseek, -}; - -static void debug_create(const char *name, umode_t mode, - struct dentry *dent, - int (*fill)(char *buf, int max)) -{ - debugfs_create_file(name, mode, dent, fill, &debug_ops); -} - -int __init smd_debugfs_init(void) -{ - struct dentry *dent; - - dent = debugfs_create_dir("smd", 0); - if (IS_ERR(dent)) - return 1; - - debug_create("ch", 0444, dent, debug_read_ch); - debug_create("stat", 0444, dent, debug_read_stat); - debug_create("mem", 0444, dent, debug_read_mem); - debug_create("version", 0444, dent, debug_read_version); - debug_create("tbl", 0444, dent, debug_read_alloc_tbl); - debug_create("build", 0444, dent, debug_read_build_id); - - return 0; -} - -#endif - - -#define MAX_NUM_SLEEP_CLIENTS 64 -#define MAX_SLEEP_NAME_LEN 8 - -#define NUM_GPIO_INT_REGISTERS 6 -#define GPIO_SMEM_NUM_GROUPS 2 -#define GPIO_SMEM_MAX_PC_INTERRUPTS 8 - -struct tramp_gpio_save { - unsigned int enable; - unsigned int detect; - unsigned int polarity; -}; - -struct tramp_gpio_smem { - uint16_t num_fired[GPIO_SMEM_NUM_GROUPS]; - uint16_t fired[GPIO_SMEM_NUM_GROUPS][GPIO_SMEM_MAX_PC_INTERRUPTS]; - uint32_t enabled[NUM_GPIO_INT_REGISTERS]; - uint32_t detection[NUM_GPIO_INT_REGISTERS]; - uint32_t polarity[NUM_GPIO_INT_REGISTERS]; -}; - - -void smsm_print_sleep_info(void) -{ - unsigned long flags; - uint32_t *ptr; -#ifndef CONFIG_ARCH_MSM_SCORPION - struct tramp_gpio_smem *gpio; - struct smsm_interrupt_info *int_info; -#endif - - - spin_lock_irqsave(&smem_lock, flags); - - ptr = smem_alloc(SMEM_SMSM_SLEEP_DELAY, sizeof(*ptr)); - if (ptr) - pr_info("SMEM_SMSM_SLEEP_DELAY: %x\n", *ptr); - - ptr = smem_alloc(SMEM_SMSM_LIMIT_SLEEP, sizeof(*ptr)); - if (ptr) - pr_info("SMEM_SMSM_LIMIT_SLEEP: %x\n", *ptr); - - ptr = smem_alloc(SMEM_SLEEP_POWER_COLLAPSE_DISABLED, sizeof(*ptr)); - if (ptr) - pr_info("SMEM_SLEEP_POWER_COLLAPSE_DISABLED: %x\n", *ptr); - -#ifndef CONFIG_ARCH_MSM_SCORPION - int_info = smem_alloc(SMEM_SMSM_INT_INFO, sizeof(*int_info)); - if (int_info) - pr_info("SMEM_SMSM_INT_INFO %x %x %x\n", - int_info->interrupt_mask, - int_info->pending_interrupts, - int_info->wakeup_reason); - - gpio = smem_alloc(SMEM_GPIO_INT, sizeof(*gpio)); - if (gpio) { - int i; - for (i = 0; i < NUM_GPIO_INT_REGISTERS; i++) - pr_info("SMEM_GPIO_INT: %d: e %x d %x p %x\n", - i, gpio->enabled[i], gpio->detection[i], - gpio->polarity[i]); - - for (i = 0; i < GPIO_SMEM_NUM_GROUPS; i++) - pr_info("SMEM_GPIO_INT: %d: f %d: %d %d...\n", - i, gpio->num_fired[i], gpio->fired[i][0], - gpio->fired[i][1]); - } -#else -#endif - spin_unlock_irqrestore(&smem_lock, flags); -} - diff --git a/arch/arm/mach-msm/smd_private.h b/arch/arm/mach-msm/smd_private.h deleted file mode 100644 index 727bfe6..0000000 --- a/arch/arm/mach-msm/smd_private.h +++ /dev/null @@ -1,403 +0,0 @@ -/* arch/arm/mach-msm/smd_private.h - * - * Copyright (C) 2007 Google, Inc. - * Copyright (c) 2007 QUALCOMM Incorporated - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ -#ifndef _ARCH_ARM_MACH_MSM_MSM_SMD_PRIVATE_H_ -#define _ARCH_ARM_MACH_MSM_MSM_SMD_PRIVATE_H_ - -#include <linux/platform_device.h> -#include <linux/spinlock.h> -#include <linux/list.h> -#include <linux/io.h> - -#include <mach/msm_iomap.h> - -struct smem_heap_info { - unsigned initialized; - unsigned free_offset; - unsigned heap_remaining; - unsigned reserved; -}; - -struct smem_heap_entry { - unsigned allocated; - unsigned offset; - unsigned size; - unsigned reserved; -}; - -struct smem_proc_comm { - unsigned command; - unsigned status; - unsigned data1; - unsigned data2; -}; - -#define PC_APPS 0 -#define PC_MODEM 1 - -#define VERSION_SMD 0 -#define VERSION_QDSP6 4 -#define VERSION_APPS_SBL 6 -#define VERSION_MODEM_SBL 7 -#define VERSION_APPS 8 -#define VERSION_MODEM 9 - -struct smem_shared { - struct smem_proc_comm proc_comm[4]; - unsigned version[32]; - struct smem_heap_info heap_info; - struct smem_heap_entry heap_toc[512]; -}; - -#define SMSM_V1_SIZE (sizeof(unsigned) * 8) -#define SMSM_V2_SIZE (sizeof(unsigned) * 4) - -#ifdef CONFIG_MSM_SMD_PKG3 -struct smsm_interrupt_info { - uint32_t interrupt_mask; - uint32_t pending_interrupts; - uint32_t wakeup_reason; -}; -#else -#define DEM_MAX_PORT_NAME_LEN (20) -struct msm_dem_slave_data { - uint32_t sleep_time; - uint32_t interrupt_mask; - uint32_t resources_used; - uint32_t reserved1; - - uint32_t wakeup_reason; - uint32_t pending_interrupts; - uint32_t rpc_prog; - uint32_t rpc_proc; - char smd_port_name[DEM_MAX_PORT_NAME_LEN]; - uint32_t reserved2; -}; -#endif - -#define SZ_DIAG_ERR_MSG 0xC8 -#define ID_DIAG_ERR_MSG SMEM_DIAG_ERR_MESSAGE -#define ID_SMD_CHANNELS SMEM_SMD_BASE_ID -#define ID_SHARED_STATE SMEM_SMSM_SHARED_STATE -#define ID_CH_ALLOC_TBL SMEM_CHANNEL_ALLOC_TBL - -#define SMSM_INIT 0x00000001 -#define SMSM_SMDINIT 0x00000008 -#define SMSM_RPCINIT 0x00000020 -#define SMSM_RESET 0x00000040 -#define SMSM_RSA 0x00000080 -#define SMSM_RUN 0x00000100 -#define SMSM_PWRC 0x00000200 -#define SMSM_TIMEWAIT 0x00000400 -#define SMSM_TIMEINIT 0x00000800 -#define SMSM_PWRC_EARLY_EXIT 0x00001000 -#define SMSM_WFPI 0x00002000 -#define SMSM_SLEEP 0x00004000 -#define SMSM_SLEEPEXIT 0x00008000 -#define SMSM_APPS_REBOOT 0x00020000 -#define SMSM_SYSTEM_POWER_DOWN 0x00040000 -#define SMSM_SYSTEM_REBOOT 0x00080000 -#define SMSM_SYSTEM_DOWNLOAD 0x00100000 -#define SMSM_PWRC_SUSPEND 0x00200000 -#define SMSM_APPS_SHUTDOWN 0x00400000 -#define SMSM_SMD_LOOPBACK 0x00800000 -#define SMSM_RUN_QUIET 0x01000000 -#define SMSM_MODEM_WAIT 0x02000000 -#define SMSM_MODEM_BREAK 0x04000000 -#define SMSM_MODEM_CONTINUE 0x08000000 -#define SMSM_UNKNOWN 0x80000000 - -#define SMSM_WKUP_REASON_RPC 0x00000001 -#define SMSM_WKUP_REASON_INT 0x00000002 -#define SMSM_WKUP_REASON_GPIO 0x00000004 -#define SMSM_WKUP_REASON_TIMER 0x00000008 -#define SMSM_WKUP_REASON_ALARM 0x00000010 -#define SMSM_WKUP_REASON_RESET 0x00000020 - -#ifdef CONFIG_ARCH_MSM7X00A -enum smsm_state_item { - SMSM_STATE_APPS = 1, - SMSM_STATE_MODEM = 3, - SMSM_STATE_COUNT, -}; -#else -enum smsm_state_item { - SMSM_STATE_APPS, - SMSM_STATE_MODEM, - SMSM_STATE_HEXAGON, - SMSM_STATE_APPS_DEM, - SMSM_STATE_MODEM_DEM, - SMSM_STATE_QDSP6_DEM, - SMSM_STATE_POWER_MASTER_DEM, - SMSM_STATE_TIME_MASTER_DEM, - SMSM_STATE_COUNT, -}; -#endif - -void *smem_alloc(unsigned id, unsigned size); -int smsm_change_state(enum smsm_state_item item, uint32_t clear_mask, uint32_t set_mask); -uint32_t smsm_get_state(enum smsm_state_item item); -int smsm_set_sleep_duration(uint32_t delay); -void smsm_print_sleep_info(void); - -#define SMEM_NUM_SMD_CHANNELS 64 - -typedef enum { - /* fixed items */ - SMEM_PROC_COMM = 0, - SMEM_HEAP_INFO, - SMEM_ALLOCATION_TABLE, - SMEM_VERSION_INFO, - SMEM_HW_RESET_DETECT, - SMEM_AARM_WARM_BOOT, - SMEM_DIAG_ERR_MESSAGE, - SMEM_SPINLOCK_ARRAY, - SMEM_MEMORY_BARRIER_LOCATION, - - /* dynamic items */ - SMEM_AARM_PARTITION_TABLE, - SMEM_AARM_BAD_BLOCK_TABLE, - SMEM_RESERVE_BAD_BLOCKS, - SMEM_WM_UUID, - SMEM_CHANNEL_ALLOC_TBL, - SMEM_SMD_BASE_ID, - SMEM_SMEM_LOG_IDX = SMEM_SMD_BASE_ID + SMEM_NUM_SMD_CHANNELS, - SMEM_SMEM_LOG_EVENTS, - SMEM_SMEM_STATIC_LOG_IDX, - SMEM_SMEM_STATIC_LOG_EVENTS, - SMEM_SMEM_SLOW_CLOCK_SYNC, - SMEM_SMEM_SLOW_CLOCK_VALUE, - SMEM_BIO_LED_BUF, - SMEM_SMSM_SHARED_STATE, - SMEM_SMSM_INT_INFO, - SMEM_SMSM_SLEEP_DELAY, - SMEM_SMSM_LIMIT_SLEEP, - SMEM_SLEEP_POWER_COLLAPSE_DISABLED, - SMEM_KEYPAD_KEYS_PRESSED, - SMEM_KEYPAD_STATE_UPDATED, - SMEM_KEYPAD_STATE_IDX, - SMEM_GPIO_INT, - SMEM_MDDI_LCD_IDX, - SMEM_MDDI_HOST_DRIVER_STATE, - SMEM_MDDI_LCD_DISP_STATE, - SMEM_LCD_CUR_PANEL, - SMEM_MARM_BOOT_SEGMENT_INFO, - SMEM_AARM_BOOT_SEGMENT_INFO, - SMEM_SLEEP_STATIC, - SMEM_SCORPION_FREQUENCY, - SMEM_SMD_PROFILES, - SMEM_TSSC_BUSY, - SMEM_HS_SUSPEND_FILTER_INFO, - SMEM_BATT_INFO, - SMEM_APPS_BOOT_MODE, - SMEM_VERSION_FIRST, - SMEM_VERSION_LAST = SMEM_VERSION_FIRST + 24, - SMEM_OSS_RRCASN1_BUF1, - SMEM_OSS_RRCASN1_BUF2, - SMEM_ID_VENDOR0, - SMEM_ID_VENDOR1, - SMEM_ID_VENDOR2, - SMEM_HW_SW_BUILD_ID, - SMEM_SMD_BLOCK_PORT_BASE_ID, - SMEM_SMD_BLOCK_PORT_PROC0_HEAP = SMEM_SMD_BLOCK_PORT_BASE_ID + SMEM_NUM_SMD_CHANNELS, - SMEM_SMD_BLOCK_PORT_PROC1_HEAP = SMEM_SMD_BLOCK_PORT_PROC0_HEAP + SMEM_NUM_SMD_CHANNELS, - SMEM_I2C_MUTEX = SMEM_SMD_BLOCK_PORT_PROC1_HEAP + SMEM_NUM_SMD_CHANNELS, - SMEM_SCLK_CONVERSION, - SMEM_SMD_SMSM_INTR_MUX, - SMEM_SMSM_CPU_INTR_MASK, - SMEM_APPS_DEM_SLAVE_DATA, - SMEM_QDSP6_DEM_SLAVE_DATA, - SMEM_CLKREGIM_BSP, - SMEM_CLKREGIM_SOURCES, - SMEM_SMD_FIFO_BASE_ID, - SMEM_USABLE_RAM_PARTITION_TABLE = SMEM_SMD_FIFO_BASE_ID + SMEM_NUM_SMD_CHANNELS, - SMEM_POWER_ON_STATUS_INFO, - SMEM_DAL_AREA, - SMEM_SMEM_LOG_POWER_IDX, - SMEM_SMEM_LOG_POWER_WRAP, - SMEM_SMEM_LOG_POWER_EVENTS, - SMEM_ERR_CRASH_LOG, - SMEM_ERR_F3_TRACE_LOG, - SMEM_NUM_ITEMS, -} smem_mem_type; - - -#define SMD_SS_CLOSED 0x00000000 -#define SMD_SS_OPENING 0x00000001 -#define SMD_SS_OPENED 0x00000002 -#define SMD_SS_FLUSHING 0x00000003 -#define SMD_SS_CLOSING 0x00000004 -#define SMD_SS_RESET 0x00000005 -#define SMD_SS_RESET_OPENING 0x00000006 - -#define SMD_BUF_SIZE 8192 -#define SMD_CHANNELS 64 - -#define SMD_HEADER_SIZE 20 - -struct smd_alloc_elm { - char name[20]; - uint32_t cid; - uint32_t ctype; - uint32_t ref_count; -}; - -struct smd_half_channel { - unsigned state; - unsigned char fDSR; - unsigned char fCTS; - unsigned char fCD; - unsigned char fRI; - unsigned char fHEAD; - unsigned char fTAIL; - unsigned char fSTATE; - unsigned char fUNUSED; - unsigned tail; - unsigned head; -} __attribute__(( aligned(4), packed )); - -/* Only used on SMD package v3 on msm7201a */ -struct smd_shared_v1 { - struct smd_half_channel ch0; - unsigned char data0[SMD_BUF_SIZE]; - struct smd_half_channel ch1; - unsigned char data1[SMD_BUF_SIZE]; -}; - -/* Used on SMD package v4 */ -struct smd_shared_v2 { - struct smd_half_channel ch0; - struct smd_half_channel ch1; -}; - -struct smd_channel { - volatile struct smd_half_channel *send; - volatile struct smd_half_channel *recv; - unsigned char *send_data; - unsigned char *recv_data; - - unsigned fifo_mask; - unsigned fifo_size; - unsigned current_packet; - unsigned n; - - struct list_head ch_list; - - void *priv; - void (*notify)(void *priv, unsigned flags); - - int (*read)(struct smd_channel *ch, void *data, int len); - int (*write)(struct smd_channel *ch, const void *data, int len); - int (*read_avail)(struct smd_channel *ch); - int (*write_avail)(struct smd_channel *ch); - - void (*update_state)(struct smd_channel *ch); - unsigned last_state; - void (*notify_other_cpu)(void); - unsigned type; - - char name[32]; - struct platform_device pdev; -}; - -#define SMD_TYPE_MASK 0x0FF -#define SMD_TYPE_APPS_MODEM 0x000 -#define SMD_TYPE_APPS_DSP 0x001 -#define SMD_TYPE_MODEM_DSP 0x002 - -#define SMD_KIND_MASK 0xF00 -#define SMD_KIND_UNKNOWN 0x000 -#define SMD_KIND_STREAM 0x100 -#define SMD_KIND_PACKET 0x200 - -extern struct list_head smd_ch_closed_list; -extern struct list_head smd_ch_list_modem; -extern struct list_head smd_ch_list_dsp; - -extern spinlock_t smd_lock; -extern spinlock_t smem_lock; - -void *smem_find(unsigned id, unsigned size); -void *smem_item(unsigned id, unsigned *size); -uint32_t raw_smsm_get_state(enum smsm_state_item item); - -extern void msm_init_last_radio_log(struct module *); - -#ifdef CONFIG_MSM_SMD_PKG3 -/* - * This allocator assumes an SMD Package v3 which only exists on - * MSM7x00 SoC's. - */ -static inline int _smd_alloc_channel(struct smd_channel *ch) -{ - struct smd_shared_v1 *shared1; - - shared1 = smem_alloc(ID_SMD_CHANNELS + ch->n, sizeof(*shared1)); - if (!shared1) { - pr_err("smd_alloc_channel() cid %d does not exist\n", ch->n); - return -1; - } - ch->send = &shared1->ch0; - ch->recv = &shared1->ch1; - ch->send_data = shared1->data0; - ch->recv_data = shared1->data1; - ch->fifo_size = SMD_BUF_SIZE; - return 0; -} -#else -/* - * This allocator assumes an SMD Package v4, the most common - * and the default. - */ -static inline int _smd_alloc_channel(struct smd_channel *ch) -{ - struct smd_shared_v2 *shared2; - void *buffer; - unsigned buffer_sz; - - shared2 = smem_alloc(SMEM_SMD_BASE_ID + ch->n, sizeof(*shared2)); - buffer = smem_item(SMEM_SMD_FIFO_BASE_ID + ch->n, &buffer_sz); - - if (!buffer) - return -1; - - /* buffer must be a power-of-two size */ - if (buffer_sz & (buffer_sz - 1)) - return -1; - - buffer_sz /= 2; - ch->send = &shared2->ch0; - ch->recv = &shared2->ch1; - ch->send_data = buffer; - ch->recv_data = buffer + buffer_sz; - ch->fifo_size = buffer_sz; - return 0; -} -#endif /* CONFIG_MSM_SMD_PKG3 */ - -#if defined(CONFIG_ARCH_MSM7X30) -static inline void msm_a2m_int(uint32_t irq) -{ - writel(1 << irq, MSM_GCC_BASE + 0x8); -} -#else -static inline void msm_a2m_int(uint32_t irq) -{ - writel(1, MSM_CSR_BASE + 0x400 + (irq * 4)); -} -#endif /* CONFIG_ARCH_MSM7X30 */ - - -#endif diff --git a/arch/arm/mach-msm/vreg.c b/arch/arm/mach-msm/vreg.c deleted file mode 100644 index bd66ed0..0000000 --- a/arch/arm/mach-msm/vreg.c +++ /dev/null @@ -1,220 +0,0 @@ -/* arch/arm/mach-msm/vreg.c - * - * Copyright (C) 2008 Google, Inc. - * Copyright (c) 2009, Code Aurora Forum. All rights reserved. - * Author: Brian Swetland <swetland@google.com> - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#include <linux/kernel.h> -#include <linux/device.h> -#include <linux/init.h> -#include <linux/debugfs.h> -#include <linux/module.h> -#include <linux/string.h> -#include <mach/vreg.h> - -#include "proc_comm.h" - -struct vreg { - const char *name; - unsigned id; - int status; - unsigned refcnt; -}; - -#define VREG(_name, _id, _status, _refcnt) \ - { .name = _name, .id = _id, .status = _status, .refcnt = _refcnt } - -static struct vreg vregs[] = { - VREG("msma", 0, 0, 0), - VREG("msmp", 1, 0, 0), - VREG("msme1", 2, 0, 0), - VREG("msmc1", 3, 0, 0), - VREG("msmc2", 4, 0, 0), - VREG("gp3", 5, 0, 0), - VREG("msme2", 6, 0, 0), - VREG("gp4", 7, 0, 0), - VREG("gp1", 8, 0, 0), - VREG("tcxo", 9, 0, 0), - VREG("pa", 10, 0, 0), - VREG("rftx", 11, 0, 0), - VREG("rfrx1", 12, 0, 0), - VREG("rfrx2", 13, 0, 0), - VREG("synt", 14, 0, 0), - VREG("wlan", 15, 0, 0), - VREG("usb", 16, 0, 0), - VREG("boost", 17, 0, 0), - VREG("mmc", 18, 0, 0), - VREG("ruim", 19, 0, 0), - VREG("msmc0", 20, 0, 0), - VREG("gp2", 21, 0, 0), - VREG("gp5", 22, 0, 0), - VREG("gp6", 23, 0, 0), - VREG("rf", 24, 0, 0), - VREG("rf_vco", 26, 0, 0), - VREG("mpll", 27, 0, 0), - VREG("s2", 28, 0, 0), - VREG("s3", 29, 0, 0), - VREG("rfubm", 30, 0, 0), - VREG("ncp", 31, 0, 0), - VREG("gp7", 32, 0, 0), - VREG("gp8", 33, 0, 0), - VREG("gp9", 34, 0, 0), - VREG("gp10", 35, 0, 0), - VREG("gp11", 36, 0, 0), - VREG("gp12", 37, 0, 0), - VREG("gp13", 38, 0, 0), - VREG("gp14", 39, 0, 0), - VREG("gp15", 40, 0, 0), - VREG("gp16", 41, 0, 0), - VREG("gp17", 42, 0, 0), - VREG("s4", 43, 0, 0), - VREG("usb2", 44, 0, 0), - VREG("wlan2", 45, 0, 0), - VREG("xo_out", 46, 0, 0), - VREG("lvsw0", 47, 0, 0), - VREG("lvsw1", 48, 0, 0), -}; - -struct vreg *vreg_get(struct device *dev, const char *id) -{ - int n; - for (n = 0; n < ARRAY_SIZE(vregs); n++) { - if (!strcmp(vregs[n].name, id)) - return vregs + n; - } - return ERR_PTR(-ENOENT); -} - -void vreg_put(struct vreg *vreg) -{ -} - -int vreg_enable(struct vreg *vreg) -{ - unsigned id = vreg->id; - unsigned enable = 1; - - if (vreg->refcnt == 0) - vreg->status = msm_proc_comm(PCOM_VREG_SWITCH, &id, &enable); - - if ((vreg->refcnt < UINT_MAX) && (!vreg->status)) - vreg->refcnt++; - - return vreg->status; -} - -int vreg_disable(struct vreg *vreg) -{ - unsigned id = vreg->id; - unsigned enable = 0; - - if (!vreg->refcnt) - return 0; - - if (vreg->refcnt == 1) - vreg->status = msm_proc_comm(PCOM_VREG_SWITCH, &id, &enable); - - if (!vreg->status) - vreg->refcnt--; - - return vreg->status; -} - -int vreg_set_level(struct vreg *vreg, unsigned mv) -{ - unsigned id = vreg->id; - - vreg->status = msm_proc_comm(PCOM_VREG_SET_LEVEL, &id, &mv); - return vreg->status; -} - -#if defined(CONFIG_DEBUG_FS) - -static int vreg_debug_set(void *data, u64 val) -{ - struct vreg *vreg = data; - switch (val) { - case 0: - vreg_disable(vreg); - break; - case 1: - vreg_enable(vreg); - break; - default: - vreg_set_level(vreg, val); - break; - } - return 0; -} - -static int vreg_debug_get(void *data, u64 *val) -{ - struct vreg *vreg = data; - - if (!vreg->status) - *val = 0; - else - *val = 1; - - return 0; -} - -static int vreg_debug_count_set(void *data, u64 val) -{ - struct vreg *vreg = data; - if (val > UINT_MAX) - val = UINT_MAX; - vreg->refcnt = val; - return 0; -} - -static int vreg_debug_count_get(void *data, u64 *val) -{ - struct vreg *vreg = data; - - *val = vreg->refcnt; - - return 0; -} - -DEFINE_SIMPLE_ATTRIBUTE(vreg_fops, vreg_debug_get, vreg_debug_set, "%llu\n"); -DEFINE_SIMPLE_ATTRIBUTE(vreg_count_fops, vreg_debug_count_get, - vreg_debug_count_set, "%llu\n"); - -static int __init vreg_debug_init(void) -{ - struct dentry *dent; - int n; - char name[32]; - const char *refcnt_name = "_refcnt"; - - dent = debugfs_create_dir("vreg", 0); - if (IS_ERR(dent)) - return 0; - - for (n = 0; n < ARRAY_SIZE(vregs); n++) { - (void) debugfs_create_file(vregs[n].name, 0644, - dent, vregs + n, &vreg_fops); - - strlcpy(name, vregs[n].name, sizeof(name)); - strlcat(name, refcnt_name, sizeof(name)); - (void) debugfs_create_file(name, 0644, - dent, vregs + n, &vreg_count_fops); - } - - return 0; -} - -device_initcall(vreg_debug_init); -#endif diff --git a/arch/arm/mach-mvebu/board-v7.c b/arch/arm/mach-mvebu/board-v7.c index 89a139e..31b66f2 100644 --- a/arch/arm/mach-mvebu/board-v7.c +++ b/arch/arm/mach-mvebu/board-v7.c @@ -184,7 +184,7 @@ static void __init mvebu_dt_init(void) of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); } -static const char * const armada_370_xp_dt_compat[] = { +static const char * const armada_370_xp_dt_compat[] __initconst = { "marvell,armada-370-xp", NULL, }; @@ -205,7 +205,7 @@ DT_MACHINE_START(ARMADA_370_XP_DT, "Marvell Armada 370/XP (Device Tree)") .dt_compat = armada_370_xp_dt_compat, MACHINE_END -static const char * const armada_375_dt_compat[] = { +static const char * const armada_375_dt_compat[] __initconst = { "marvell,armada375", NULL, }; @@ -219,7 +219,7 @@ DT_MACHINE_START(ARMADA_375_DT, "Marvell Armada 375 (Device Tree)") .dt_compat = armada_375_dt_compat, MACHINE_END -static const char * const armada_38x_dt_compat[] = { +static const char * const armada_38x_dt_compat[] __initconst = { "marvell,armada380", "marvell,armada385", NULL, diff --git a/arch/arm/mach-mvebu/dove.c b/arch/arm/mach-mvebu/dove.c index b50464e..5a17415 100644 --- a/arch/arm/mach-mvebu/dove.c +++ b/arch/arm/mach-mvebu/dove.c @@ -27,7 +27,7 @@ static void __init dove_init(void) of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); } -static const char * const dove_dt_compat[] = { +static const char * const dove_dt_compat[] __initconst = { "marvell,dove", NULL }; diff --git a/arch/arm/mach-mvebu/kirkwood.c b/arch/arm/mach-mvebu/kirkwood.c index 6b53108..925f75f 100644 --- a/arch/arm/mach-mvebu/kirkwood.c +++ b/arch/arm/mach-mvebu/kirkwood.c @@ -186,7 +186,7 @@ static void __init kirkwood_dt_init(void) of_platform_populate(NULL, of_default_bus_match_table, auxdata, NULL); } -static const char * const kirkwood_dt_board_compat[] = { +static const char * const kirkwood_dt_board_compat[] __initconst = { "marvell,kirkwood", NULL }; diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index 2b8e477..276a755 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -175,12 +175,6 @@ config MACH_OMAP3_BEAGLE default y select OMAP_PACKAGE_CBB -config MACH_DEVKIT8000 - bool "DEVKIT8000 board" - depends on ARCH_OMAP3 - default y - select OMAP_PACKAGE_CUS - config MACH_OMAP_LDP bool "OMAP3 LDP board" depends on ARCH_OMAP3 @@ -225,12 +219,6 @@ config MACH_OMAP3_PANDORA select OMAP_PACKAGE_CBB select REGULATOR_FIXED_VOLTAGE if REGULATOR -config MACH_TOUCHBOOK - bool "OMAP3 Touch Book" - depends on ARCH_OMAP3 - default y - select OMAP_PACKAGE_CBB - config MACH_NOKIA_N810 bool @@ -260,12 +248,6 @@ config MACH_CM_T35 config MACH_CM_T3730 bool -config MACH_SBC3530 - bool "OMAP3 SBC STALKER board" - depends on ARCH_OMAP3 - default y - select OMAP_PACKAGE_CUS - config OMAP3_SDRC_AC_TIMING bool "Enable SDRC AC timing register changes" depends on ARCH_OMAP3 diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index b83f18f..ec002bd 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile @@ -243,7 +243,6 @@ obj-$(CONFIG_SOC_OMAP2420) += msdi.o # Specific board support obj-$(CONFIG_MACH_OMAP_GENERIC) += board-generic.o pdata-quirks.o obj-$(CONFIG_MACH_OMAP3_BEAGLE) += board-omap3beagle.o -obj-$(CONFIG_MACH_DEVKIT8000) += board-devkit8000.o obj-$(CONFIG_MACH_OMAP_LDP) += board-ldp.o obj-$(CONFIG_MACH_OMAP3530_LV_SOM) += board-omap3logic.o obj-$(CONFIG_MACH_OMAP3_TORPEDO) += board-omap3logic.o @@ -254,9 +253,6 @@ obj-$(CONFIG_MACH_NOKIA_RX51) += board-rx51.o sdram-nokia.o obj-$(CONFIG_MACH_NOKIA_RX51) += board-rx51-peripherals.o obj-$(CONFIG_MACH_NOKIA_RX51) += board-rx51-video.o obj-$(CONFIG_MACH_CM_T35) += board-cm-t35.o -obj-$(CONFIG_MACH_TOUCHBOOK) += board-omap3touchbook.o - -obj-$(CONFIG_MACH_SBC3530) += board-omap3stalker.o # Platform specific device init code diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c deleted file mode 100644 index d8e4f34..0000000 --- a/arch/arm/mach-omap2/board-devkit8000.c +++ /dev/null @@ -1,654 +0,0 @@ -/* - * board-devkit8000.c - TimLL Devkit8000 - * - * Copyright (C) 2009 Kim Botherway - * Copyright (C) 2010 Thomas Weber - * - * Modified from mach-omap2/board-omap3beagle.c - * - * Initial code: Syed Mohammed Khasim - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/platform_device.h> -#include <linux/delay.h> -#include <linux/err.h> -#include <linux/clk.h> -#include <linux/io.h> -#include <linux/leds.h> -#include <linux/gpio.h> -#include <linux/input.h> -#include <linux/gpio_keys.h> - -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> -#include <linux/mtd/nand.h> -#include <linux/mmc/host.h> -#include <linux/usb/phy.h> - -#include <linux/regulator/machine.h> -#include <linux/i2c/twl.h> -#include "id.h" -#include <asm/mach-types.h> -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/mach/flash.h> - -#include "common.h" -#include "gpmc.h" -#include <linux/platform_data/mtd-nand-omap2.h> -#include <video/omapdss.h> -#include <video/omap-panel-data.h> - -#include <linux/platform_data/spi-omap2-mcspi.h> -#include <linux/input/matrix_keypad.h> -#include <linux/spi/spi.h> -#include <linux/dm9000.h> -#include <linux/interrupt.h> - -#include "sdram-micron-mt46h32m32lf-6.h" -#include "mux.h" -#include "hsmmc.h" -#include "board-flash.h" -#include "common-board-devices.h" - -#define NAND_CS 0 - -#define OMAP_DM9000_GPIO_IRQ 25 -#define OMAP3_DEVKIT_TS_GPIO 27 - -static struct mtd_partition devkit8000_nand_partitions[] = { - /* All the partition sizes are listed in terms of NAND block size */ - { - .name = "X-Loader", - .offset = 0, - .size = 4 * NAND_BLOCK_SIZE, - .mask_flags = MTD_WRITEABLE, /* force read-only */ - }, - { - .name = "U-Boot", - .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */ - .size = 15 * NAND_BLOCK_SIZE, - .mask_flags = MTD_WRITEABLE, /* force read-only */ - }, - { - .name = "U-Boot Env", - .offset = MTDPART_OFS_APPEND, /* Offset = 0x260000 */ - .size = 1 * NAND_BLOCK_SIZE, - }, - { - .name = "Kernel", - .offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */ - .size = 32 * NAND_BLOCK_SIZE, - }, - { - .name = "File System", - .offset = MTDPART_OFS_APPEND, /* Offset = 0x680000 */ - .size = MTDPART_SIZ_FULL, - }, -}; - -static struct omap2_hsmmc_info mmc[] = { - { - .mmc = 1, - .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA, - .gpio_wp = 29, - .deferred = true, - }, - {} /* Terminator */ -}; - -static struct regulator_consumer_supply devkit8000_vmmc1_supply[] = { - REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), -}; - -/* ads7846 on SPI */ -static struct regulator_consumer_supply devkit8000_vio_supply[] = { - REGULATOR_SUPPLY("vcc", "spi2.0"), -}; - -static const struct display_timing devkit8000_lcd_videomode = { - .pixelclock = { 0, 40000000, 0 }, - - .hactive = { 0, 800, 0 }, - .hfront_porch = { 0, 1, 0 }, - .hback_porch = { 0, 1, 0 }, - .hsync_len = { 0, 48, 0 }, - - .vactive = { 0, 480, 0 }, - .vfront_porch = { 0, 12, 0 }, - .vback_porch = { 0, 25, 0 }, - .vsync_len = { 0, 3, 0 }, - - .flags = DISPLAY_FLAGS_HSYNC_LOW | DISPLAY_FLAGS_VSYNC_LOW | - DISPLAY_FLAGS_DE_HIGH | DISPLAY_FLAGS_PIXDATA_POSEDGE, -}; - -static struct panel_dpi_platform_data devkit8000_lcd_pdata = { - .name = "lcd", - .source = "dpi.0", - - .data_lines = 24, - - .display_timing = &devkit8000_lcd_videomode, - - .enable_gpio = -1, /* filled in code */ - .backlight_gpio = -1, -}; - -static struct platform_device devkit8000_lcd_device = { - .name = "panel-dpi", - .id = 0, - .dev.platform_data = &devkit8000_lcd_pdata, -}; - -static struct connector_dvi_platform_data devkit8000_dvi_connector_pdata = { - .name = "dvi", - .source = "tfp410.0", - .i2c_bus_num = 1, -}; - -static struct platform_device devkit8000_dvi_connector_device = { - .name = "connector-dvi", - .id = 0, - .dev.platform_data = &devkit8000_dvi_connector_pdata, -}; - -static struct encoder_tfp410_platform_data devkit8000_tfp410_pdata = { - .name = "tfp410.0", - .source = "dpi.0", - .data_lines = 24, - .power_down_gpio = -1, /* filled in code */ -}; - -static struct platform_device devkit8000_tfp410_device = { - .name = "tfp410", - .id = 0, - .dev.platform_data = &devkit8000_tfp410_pdata, -}; - -static struct connector_atv_platform_data devkit8000_tv_pdata = { - .name = "tv", - .source = "venc.0", - .connector_type = OMAP_DSS_VENC_TYPE_SVIDEO, - .invert_polarity = false, -}; - -static struct platform_device devkit8000_tv_connector_device = { - .name = "connector-analog-tv", - .id = 0, - .dev.platform_data = &devkit8000_tv_pdata, -}; - -static struct omap_dss_board_info devkit8000_dss_data = { - .default_display_name = "lcd", -}; - -static uint32_t board_keymap[] = { - KEY(0, 0, KEY_1), - KEY(1, 0, KEY_2), - KEY(2, 0, KEY_3), - KEY(0, 1, KEY_4), - KEY(1, 1, KEY_5), - KEY(2, 1, KEY_6), - KEY(3, 1, KEY_F5), - KEY(0, 2, KEY_7), - KEY(1, 2, KEY_8), - KEY(2, 2, KEY_9), - KEY(3, 2, KEY_F6), - KEY(0, 3, KEY_F7), - KEY(1, 3, KEY_0), - KEY(2, 3, KEY_F8), - PERSISTENT_KEY(4, 5), - KEY(4, 4, KEY_VOLUMEUP), - KEY(5, 5, KEY_VOLUMEDOWN), - 0 -}; - -static struct matrix_keymap_data board_map_data = { - .keymap = board_keymap, - .keymap_size = ARRAY_SIZE(board_keymap), -}; - -static struct twl4030_keypad_data devkit8000_kp_data = { - .keymap_data = &board_map_data, - .rows = 6, - .cols = 6, - .rep = 1, -}; - -static struct gpio_led gpio_leds[]; - -static int devkit8000_twl_gpio_setup(struct device *dev, - unsigned gpio, unsigned ngpio) -{ - /* gpio + 0 is "mmc0_cd" (input/IRQ) */ - mmc[0].gpio_cd = gpio + 0; - omap_hsmmc_late_init(mmc); - - /* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */ - gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1; - - /* TWL4030_GPIO_MAX + 0 is "LCD_PWREN" (out, active high) */ - devkit8000_lcd_pdata.enable_gpio = gpio + TWL4030_GPIO_MAX + 0; - - /* gpio + 7 is "DVI_PD" (out, active low) */ - devkit8000_tfp410_pdata.power_down_gpio = gpio + 7; - - return 0; -} - -static struct twl4030_gpio_platform_data devkit8000_gpio_data = { - .use_leds = true, - .pulldowns = BIT(1) | BIT(2) | BIT(6) | BIT(8) | BIT(13) - | BIT(15) | BIT(16) | BIT(17), - .setup = devkit8000_twl_gpio_setup, -}; - -static struct regulator_consumer_supply devkit8000_vpll1_supplies[] = { - REGULATOR_SUPPLY("vdds_dsi", "omapdss"), - REGULATOR_SUPPLY("vdds_dsi", "omapdss_dpi.0"), - REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi.0"), -}; - -/* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */ -static struct regulator_init_data devkit8000_vmmc1 = { - .constraints = { - .min_uV = 1850000, - .max_uV = 3150000, - .valid_modes_mask = REGULATOR_MODE_NORMAL - | REGULATOR_MODE_STANDBY, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE - | REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, - .num_consumer_supplies = ARRAY_SIZE(devkit8000_vmmc1_supply), - .consumer_supplies = devkit8000_vmmc1_supply, -}; - -/* VPLL1 for digital video outputs */ -static struct regulator_init_data devkit8000_vpll1 = { - .constraints = { - .min_uV = 1800000, - .max_uV = 1800000, - .valid_modes_mask = REGULATOR_MODE_NORMAL - | REGULATOR_MODE_STANDBY, - .valid_ops_mask = REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, - .num_consumer_supplies = ARRAY_SIZE(devkit8000_vpll1_supplies), - .consumer_supplies = devkit8000_vpll1_supplies, -}; - -/* VAUX4 for ads7846 and nubs */ -static struct regulator_init_data devkit8000_vio = { - .constraints = { - .min_uV = 1800000, - .max_uV = 1800000, - .apply_uV = true, - .valid_modes_mask = REGULATOR_MODE_NORMAL - | REGULATOR_MODE_STANDBY, - .valid_ops_mask = REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, - .num_consumer_supplies = ARRAY_SIZE(devkit8000_vio_supply), - .consumer_supplies = devkit8000_vio_supply, -}; - -static struct twl4030_platform_data devkit8000_twldata = { - /* platform_data for children goes here */ - .gpio = &devkit8000_gpio_data, - .vmmc1 = &devkit8000_vmmc1, - .vpll1 = &devkit8000_vpll1, - .vio = &devkit8000_vio, - .keypad = &devkit8000_kp_data, -}; - -static int __init devkit8000_i2c_init(void) -{ - omap3_pmic_get_config(&devkit8000_twldata, - TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO, - TWL_COMMON_REGULATOR_VDAC); - omap3_pmic_init("tps65930", &devkit8000_twldata); - /* Bus 3 is attached to the DVI port where devices like the pico DLP - * projector don't work reliably with 400kHz */ - omap_register_i2c_bus(3, 400, NULL, 0); - return 0; -} - -static struct gpio_led gpio_leds[] = { - { - .name = "led1", - .default_trigger = "heartbeat", - .gpio = 186, - .active_low = true, - }, - { - .name = "led2", - .default_trigger = "mmc0", - .gpio = 163, - .active_low = true, - }, - { - .name = "ledB", - .default_trigger = "none", - .gpio = 153, - .active_low = true, - }, - { - .name = "led3", - .default_trigger = "none", - .gpio = 164, - .active_low = true, - }, -}; - -static struct gpio_led_platform_data gpio_led_info = { - .leds = gpio_leds, - .num_leds = ARRAY_SIZE(gpio_leds), -}; - -static struct platform_device leds_gpio = { - .name = "leds-gpio", - .id = -1, - .dev = { - .platform_data = &gpio_led_info, - }, -}; - -static struct gpio_keys_button gpio_buttons[] = { - { - .code = BTN_EXTRA, - .gpio = 26, - .desc = "user", - .wakeup = 1, - }, -}; - -static struct gpio_keys_platform_data gpio_key_info = { - .buttons = gpio_buttons, - .nbuttons = ARRAY_SIZE(gpio_buttons), -}; - -static struct platform_device keys_gpio = { - .name = "gpio-keys", - .id = -1, - .dev = { - .platform_data = &gpio_key_info, - }, -}; - -#define OMAP_DM9000_BASE 0x2c000000 - -static struct resource omap_dm9000_resources[] = { - [0] = { - .start = OMAP_DM9000_BASE, - .end = (OMAP_DM9000_BASE + 0x4 - 1), - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = (OMAP_DM9000_BASE + 0x400), - .end = (OMAP_DM9000_BASE + 0x400 + 0x4 - 1), - .flags = IORESOURCE_MEM, - }, - [2] = { - .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW, - }, -}; - -static struct dm9000_plat_data omap_dm9000_platdata = { - .flags = DM9000_PLATF_16BITONLY, -}; - -static struct platform_device omap_dm9000_dev = { - .name = "dm9000", - .id = -1, - .num_resources = ARRAY_SIZE(omap_dm9000_resources), - .resource = omap_dm9000_resources, - .dev = { - .platform_data = &omap_dm9000_platdata, - }, -}; - -static void __init omap_dm9000_init(void) -{ - unsigned char *eth_addr = omap_dm9000_platdata.dev_addr; - struct omap_die_id odi; - int ret; - - ret = gpio_request_one(OMAP_DM9000_GPIO_IRQ, GPIOF_IN, "dm9000 irq"); - if (ret < 0) { - printk(KERN_ERR "Failed to request GPIO%d for dm9000 IRQ\n", - OMAP_DM9000_GPIO_IRQ); - return; - } - - /* init the mac address using DIE id */ - omap_get_die_id(&odi); - - eth_addr[0] = 0x02; /* locally administered */ - eth_addr[1] = odi.id_1 & 0xff; - eth_addr[2] = (odi.id_0 & 0xff000000) >> 24; - eth_addr[3] = (odi.id_0 & 0x00ff0000) >> 16; - eth_addr[4] = (odi.id_0 & 0x0000ff00) >> 8; - eth_addr[5] = (odi.id_0 & 0x000000ff); -} - -static struct platform_device *devkit8000_devices[] __initdata = { - &leds_gpio, - &keys_gpio, - &omap_dm9000_dev, - &devkit8000_lcd_device, - &devkit8000_tfp410_device, - &devkit8000_dvi_connector_device, - &devkit8000_tv_connector_device, -}; - -static struct usbhs_omap_platform_data usbhs_bdata __initdata = { - .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY, -}; - -#ifdef CONFIG_OMAP_MUX -static struct omap_board_mux board_mux[] __initdata = { - /* nCS and IRQ for Devkit8000 ethernet */ - OMAP3_MUX(GPMC_NCS6, OMAP_MUX_MODE0), - OMAP3_MUX(ETK_D11, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP), - - /* McSPI 2*/ - OMAP3_MUX(MCSPI2_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), - OMAP3_MUX(MCSPI2_SIMO, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), - OMAP3_MUX(MCSPI2_SOMI, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), - OMAP3_MUX(MCSPI2_CS0, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), - OMAP3_MUX(MCSPI2_CS1, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), - - /* PENDOWN GPIO */ - OMAP3_MUX(ETK_D13, OMAP_MUX_MODE4 | OMAP_PIN_INPUT), - - /* mUSB */ - OMAP3_MUX(HSUSB0_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), - OMAP3_MUX(HSUSB0_STP, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), - OMAP3_MUX(HSUSB0_DIR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), - OMAP3_MUX(HSUSB0_NXT, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), - OMAP3_MUX(HSUSB0_DATA0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), - OMAP3_MUX(HSUSB0_DATA1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), - OMAP3_MUX(HSUSB0_DATA2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), - OMAP3_MUX(HSUSB0_DATA3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), - OMAP3_MUX(HSUSB0_DATA4, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), - OMAP3_MUX(HSUSB0_DATA5, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), - OMAP3_MUX(HSUSB0_DATA6, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), - OMAP3_MUX(HSUSB0_DATA7, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), - - /* USB 1 */ - OMAP3_MUX(ETK_CTL, OMAP_MUX_MODE3 | OMAP_PIN_INPUT), - OMAP3_MUX(ETK_CLK, OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT), - OMAP3_MUX(ETK_D8, OMAP_MUX_MODE3 | OMAP_PIN_INPUT), - OMAP3_MUX(ETK_D9, OMAP_MUX_MODE3 | OMAP_PIN_INPUT), - OMAP3_MUX(ETK_D0, OMAP_MUX_MODE3 | OMAP_PIN_INPUT), - OMAP3_MUX(ETK_D1, OMAP_MUX_MODE3 | OMAP_PIN_INPUT), - OMAP3_MUX(ETK_D2, OMAP_MUX_MODE3 | OMAP_PIN_INPUT), - OMAP3_MUX(ETK_D3, OMAP_MUX_MODE3 | OMAP_PIN_INPUT), - OMAP3_MUX(ETK_D4, OMAP_MUX_MODE3 | OMAP_PIN_INPUT), - OMAP3_MUX(ETK_D5, OMAP_MUX_MODE3 | OMAP_PIN_INPUT), - OMAP3_MUX(ETK_D6, OMAP_MUX_MODE3 | OMAP_PIN_INPUT), - OMAP3_MUX(ETK_D7, OMAP_MUX_MODE3 | OMAP_PIN_INPUT), - - /* MMC 1 */ - OMAP3_MUX(SDMMC1_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), - OMAP3_MUX(SDMMC1_CMD, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), - OMAP3_MUX(SDMMC1_DAT0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), - OMAP3_MUX(SDMMC1_DAT1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), - OMAP3_MUX(SDMMC1_DAT2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), - OMAP3_MUX(SDMMC1_DAT3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), - OMAP3_MUX(SDMMC1_DAT4, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), - OMAP3_MUX(SDMMC1_DAT5, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), - OMAP3_MUX(SDMMC1_DAT6, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), - OMAP3_MUX(SDMMC1_DAT7, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), - - /* McBSP 2 */ - OMAP3_MUX(MCBSP2_FSX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), - OMAP3_MUX(MCBSP2_CLKX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), - OMAP3_MUX(MCBSP2_DR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), - OMAP3_MUX(MCBSP2_DX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), - - /* I2C 1 */ - OMAP3_MUX(I2C1_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), - OMAP3_MUX(I2C1_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), - - /* I2C 2 */ - OMAP3_MUX(I2C2_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), - OMAP3_MUX(I2C2_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), - - /* I2C 3 */ - OMAP3_MUX(I2C3_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), - OMAP3_MUX(I2C3_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), - - /* I2C 4 */ - OMAP3_MUX(I2C4_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), - OMAP3_MUX(I2C4_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), - - /* serial ports */ - OMAP3_MUX(MCBSP3_CLKX, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT), - OMAP3_MUX(MCBSP3_FSX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT), - OMAP3_MUX(UART1_TX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), - OMAP3_MUX(UART1_RX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), - - /* DSS */ - OMAP3_MUX(DSS_PCLK, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), - OMAP3_MUX(DSS_HSYNC, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), - OMAP3_MUX(DSS_VSYNC, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), - OMAP3_MUX(DSS_ACBIAS, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), - OMAP3_MUX(DSS_DATA0, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), - OMAP3_MUX(DSS_DATA1, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), - OMAP3_MUX(DSS_DATA2, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), - OMAP3_MUX(DSS_DATA3, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), - OMAP3_MUX(DSS_DATA4, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), - OMAP3_MUX(DSS_DATA5, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), - OMAP3_MUX(DSS_DATA6, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), - OMAP3_MUX(DSS_DATA7, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), - OMAP3_MUX(DSS_DATA8, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), - OMAP3_MUX(DSS_DATA9, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), - OMAP3_MUX(DSS_DATA10, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), - OMAP3_MUX(DSS_DATA11, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), - OMAP3_MUX(DSS_DATA12, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), - OMAP3_MUX(DSS_DATA13, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), - OMAP3_MUX(DSS_DATA14, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), - OMAP3_MUX(DSS_DATA15, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), - OMAP3_MUX(DSS_DATA16, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), - OMAP3_MUX(DSS_DATA17, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), - OMAP3_MUX(DSS_DATA18, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), - OMAP3_MUX(DSS_DATA19, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), - OMAP3_MUX(DSS_DATA20, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), - OMAP3_MUX(DSS_DATA21, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), - OMAP3_MUX(DSS_DATA22, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), - OMAP3_MUX(DSS_DATA23, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT), - - /* expansion port */ - /* McSPI 1 */ - OMAP3_MUX(MCSPI1_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), - OMAP3_MUX(MCSPI1_SIMO, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), - OMAP3_MUX(MCSPI1_SOMI, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), - OMAP3_MUX(MCSPI1_CS0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN), - OMAP3_MUX(MCSPI1_CS3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN), - - /* HDQ */ - OMAP3_MUX(HDQ_SIO, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), - - /* McSPI4 */ - OMAP3_MUX(MCBSP1_CLKR, OMAP_MUX_MODE1 | OMAP_PIN_INPUT), - OMAP3_MUX(MCBSP1_DX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT), - OMAP3_MUX(MCBSP1_DR, OMAP_MUX_MODE1 | OMAP_PIN_INPUT), - OMAP3_MUX(MCBSP1_FSX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT_PULLUP), - - /* MMC 2 */ - OMAP3_MUX(SDMMC2_DAT4, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT), - OMAP3_MUX(SDMMC2_DAT5, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT), - OMAP3_MUX(SDMMC2_DAT6, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT), - OMAP3_MUX(SDMMC2_DAT7, OMAP_MUX_MODE1 | OMAP_PIN_INPUT), - - /* I2C3 */ - OMAP3_MUX(I2C3_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), - OMAP3_MUX(I2C3_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), - - OMAP3_MUX(MCBSP1_CLKX, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT), - OMAP3_MUX(MCBSP_CLKS, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT), - OMAP3_MUX(MCBSP1_FSR, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT), - - OMAP3_MUX(GPMC_NCS7, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT), - OMAP3_MUX(GPMC_NCS3, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT), - - /* TPS IRQ */ - OMAP3_MUX(SYS_NIRQ, OMAP_MUX_MODE0 | OMAP_WAKEUP_EN | \ - OMAP_PIN_INPUT_PULLUP), - - { .reg_offset = OMAP_MUX_TERMINATOR }, -}; -#endif - -static void __init devkit8000_init(void) -{ - omap3_mux_init(board_mux, OMAP_PACKAGE_CUS); - omap_serial_init(); - omap_sdrc_init(mt46h32m32lf6_sdrc_params, - mt46h32m32lf6_sdrc_params); - - omap_dm9000_init(); - - omap_hsmmc_init(mmc); - devkit8000_i2c_init(); - omap_dm9000_resources[2].start = gpio_to_irq(OMAP_DM9000_GPIO_IRQ); - platform_add_devices(devkit8000_devices, - ARRAY_SIZE(devkit8000_devices)); - - omap_display_init(&devkit8000_dss_data); - - omap_ads7846_init(2, OMAP3_DEVKIT_TS_GPIO, 0, NULL); - - usb_bind_phy("musb-hdrc.0.auto", 0, "twl4030_usb"); - usb_musb_init(NULL); - usbhs_init(&usbhs_bdata); - board_nand_init(devkit8000_nand_partitions, - ARRAY_SIZE(devkit8000_nand_partitions), NAND_CS, - NAND_BUSWIDTH_16, NULL); - omap_twl4030_audio_init("omap3beagle", NULL); - - /* Ensure SDRC pins are mux'd for self-refresh */ - omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT); - omap_mux_init_signal("sdrc_cke1", OMAP_PIN_OUTPUT); -} - -MACHINE_START(DEVKIT8000, "OMAP3 Devkit8000") - .atag_offset = 0x100, - .reserve = omap_reserve, - .map_io = omap3_map_io, - .init_early = omap35xx_init_early, - .init_irq = omap3_init_irq, - .init_machine = devkit8000_init, - .init_late = omap35xx_init_late, - .init_time = omap3_secure_sync32k_timer_init, - .restart = omap3xxx_restart, -MACHINE_END diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach-omap2/board-omap3stalker.c deleted file mode 100644 index 6311f4b..0000000 --- a/arch/arm/mach-omap2/board-omap3stalker.c +++ /dev/null @@ -1,433 +0,0 @@ -/* - * linux/arch/arm/mach-omap2/board-omap3evm.c - * - * Copyright (C) 2008 Guangzhou EMA-Tech - * - * Modified from mach-omap2/board-omap3evm.c - * - * Initial code: Syed Mohammed Khasim - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/platform_device.h> -#include <linux/delay.h> -#include <linux/err.h> -#include <linux/clk.h> -#include <linux/io.h> -#include <linux/leds.h> -#include <linux/gpio.h> -#include <linux/input.h> -#include <linux/gpio_keys.h> - -#include <linux/regulator/fixed.h> -#include <linux/regulator/machine.h> -#include <linux/i2c/twl.h> -#include <linux/mmc/host.h> -#include <linux/input/matrix_keypad.h> -#include <linux/spi/spi.h> -#include <linux/interrupt.h> -#include <linux/smsc911x.h> -#include <linux/platform_data/at24.h> -#include <linux/usb/phy.h> - -#include <asm/mach-types.h> -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/mach/flash.h> - -#include "common.h" -#include "gpmc.h" -#include <linux/platform_data/mtd-nand-omap2.h> -#include <video/omapdss.h> -#include <video/omap-panel-data.h> - -#include <linux/platform_data/spi-omap2-mcspi.h> - -#include "sdram-micron-mt46h32m32lf-6.h" -#include "mux.h" -#include "hsmmc.h" -#include "common-board-devices.h" - -#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE) -#include "gpmc-smsc911x.h" - -#define OMAP3STALKER_ETHR_START 0x2c000000 -#define OMAP3STALKER_ETHR_SIZE 1024 -#define OMAP3STALKER_ETHR_GPIO_IRQ 19 -#define OMAP3STALKER_SMC911X_CS 5 - -static struct omap_smsc911x_platform_data smsc911x_cfg = { - .cs = OMAP3STALKER_SMC911X_CS, - .gpio_irq = OMAP3STALKER_ETHR_GPIO_IRQ, - .gpio_reset = -EINVAL, - .flags = (SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS), -}; - -static inline void __init omap3stalker_init_eth(void) -{ - omap_mux_init_gpio(19, OMAP_PIN_INPUT_PULLUP); - gpmc_smsc911x_init(&smsc911x_cfg); -} - -#else -static inline void __init omap3stalker_init_eth(void) -{ - return; -} -#endif - -/* - * OMAP3 DSS control signals - */ - -#define DSS_ENABLE_GPIO 199 -#define LCD_PANEL_BKLIGHT_GPIO 210 -#define ENABLE_VPLL2_DEV_GRP 0xE0 - -static void __init omap3_stalker_display_init(void) -{ - return; -} -static struct connector_dvi_platform_data omap3stalker_dvi_connector_pdata = { - .name = "dvi", - .source = "tfp410.0", - .i2c_bus_num = -1, -}; - -static struct platform_device omap3stalker_dvi_connector_device = { - .name = "connector-dvi", - .id = 0, - .dev.platform_data = &omap3stalker_dvi_connector_pdata, -}; - -static struct encoder_tfp410_platform_data omap3stalker_tfp410_pdata = { - .name = "tfp410.0", - .source = "dpi.0", - .data_lines = 24, - .power_down_gpio = DSS_ENABLE_GPIO, -}; - -static struct platform_device omap3stalker_tfp410_device = { - .name = "tfp410", - .id = 0, - .dev.platform_data = &omap3stalker_tfp410_pdata, -}; - -static struct connector_atv_platform_data omap3stalker_tv_pdata = { - .name = "tv", - .source = "venc.0", - .connector_type = OMAP_DSS_VENC_TYPE_COMPOSITE, - .invert_polarity = false, -}; - -static struct platform_device omap3stalker_tv_connector_device = { - .name = "connector-analog-tv", - .id = 0, - .dev.platform_data = &omap3stalker_tv_pdata, -}; - -static struct omap_dss_board_info omap3_stalker_dss_data = { - .default_display_name = "dvi", -}; - -static struct regulator_consumer_supply omap3stalker_vmmc1_supply[] = { - REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), -}; - -static struct regulator_consumer_supply omap3stalker_vsim_supply[] = { - REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"), -}; - -/* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */ -static struct regulator_init_data omap3stalker_vmmc1 = { - .constraints = { - .min_uV = 1850000, - .max_uV = 3150000, - .valid_modes_mask = REGULATOR_MODE_NORMAL - | REGULATOR_MODE_STANDBY, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE - | REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS, - }, - .num_consumer_supplies = ARRAY_SIZE(omap3stalker_vmmc1_supply), - .consumer_supplies = omap3stalker_vmmc1_supply, -}; - -/* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */ -static struct regulator_init_data omap3stalker_vsim = { - .constraints = { - .min_uV = 1800000, - .max_uV = 3000000, - .valid_modes_mask = REGULATOR_MODE_NORMAL - | REGULATOR_MODE_STANDBY, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE - | REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS, - }, - .num_consumer_supplies = ARRAY_SIZE(omap3stalker_vsim_supply), - .consumer_supplies = omap3stalker_vsim_supply, -}; - -static struct omap2_hsmmc_info mmc[] = { - { - .mmc = 1, - .caps = MMC_CAP_4_BIT_DATA, - .gpio_cd = -EINVAL, - .gpio_wp = 23, - .deferred = true, - }, - {} /* Terminator */ -}; - -static struct gpio_keys_button gpio_buttons[] = { - { - .code = BTN_EXTRA, - .gpio = 18, - .desc = "user", - .wakeup = 1, - }, -}; - -static struct gpio_keys_platform_data gpio_key_info = { - .buttons = gpio_buttons, - .nbuttons = ARRAY_SIZE(gpio_buttons), -}; - -static struct platform_device keys_gpio = { - .name = "gpio-keys", - .id = -1, - .dev = { - .platform_data = &gpio_key_info, - }, -}; - -static struct gpio_led gpio_leds[] = { - { - .name = "stalker:D8:usr0", - .default_trigger = "default-on", - .gpio = 126, - }, - { - .name = "stalker:D9:usr1", - .default_trigger = "default-on", - .gpio = 127, - }, - { - .name = "stalker:D3:mmc0", - .gpio = -EINVAL, /* gets replaced */ - .active_low = true, - .default_trigger = "mmc0", - }, - { - .name = "stalker:D4:heartbeat", - .gpio = -EINVAL, /* gets replaced */ - .active_low = true, - .default_trigger = "heartbeat", - }, -}; - -static struct gpio_led_platform_data gpio_led_info = { - .leds = gpio_leds, - .num_leds = ARRAY_SIZE(gpio_leds), -}; - -static struct platform_device leds_gpio = { - .name = "leds-gpio", - .id = -1, - .dev = { - .platform_data = &gpio_led_info, - }, -}; - -static int -omap3stalker_twl_gpio_setup(struct device *dev, - unsigned gpio, unsigned ngpio) -{ - /* gpio + 0 is "mmc0_cd" (input/IRQ) */ - mmc[0].gpio_cd = gpio + 0; - omap_hsmmc_late_init(mmc); - - /* - * Most GPIOs are for USB OTG. Some are mostly sent to - * the P2 connector; notably LEDA for the LCD backlight. - */ - - /* TWL4030_GPIO_MAX + 0 == ledA, LCD Backlight control */ - gpio_request_one(gpio + TWL4030_GPIO_MAX, GPIOF_OUT_INIT_LOW, - "EN_LCD_BKL"); - - /* gpio + 7 == DVI Enable */ - gpio_request_one(gpio + 7, GPIOF_OUT_INIT_LOW, "EN_DVI"); - - /* TWL4030_GPIO_MAX + 1 == ledB (out, mmc0) */ - gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1; - /* GPIO + 13 == ledsync (out, heartbeat) */ - gpio_leds[3].gpio = gpio + 13; - - platform_device_register(&leds_gpio); - return 0; -} - -static struct twl4030_gpio_platform_data omap3stalker_gpio_data = { - .use_leds = true, - .setup = omap3stalker_twl_gpio_setup, -}; - -static uint32_t board_keymap[] = { - KEY(0, 0, KEY_LEFT), - KEY(0, 1, KEY_DOWN), - KEY(0, 2, KEY_ENTER), - KEY(0, 3, KEY_M), - - KEY(1, 0, KEY_RIGHT), - KEY(1, 1, KEY_UP), - KEY(1, 2, KEY_I), - KEY(1, 3, KEY_N), - - KEY(2, 0, KEY_A), - KEY(2, 1, KEY_E), - KEY(2, 2, KEY_J), - KEY(2, 3, KEY_O), - - KEY(3, 0, KEY_B), - KEY(3, 1, KEY_F), - KEY(3, 2, KEY_K), - KEY(3, 3, KEY_P) -}; - -static struct matrix_keymap_data board_map_data = { - .keymap = board_keymap, - .keymap_size = ARRAY_SIZE(board_keymap), -}; - -static struct twl4030_keypad_data omap3stalker_kp_data = { - .keymap_data = &board_map_data, - .rows = 4, - .cols = 4, - .rep = 1, -}; - -static struct twl4030_platform_data omap3stalker_twldata = { - /* platform_data for children goes here */ - .keypad = &omap3stalker_kp_data, - .gpio = &omap3stalker_gpio_data, - .vmmc1 = &omap3stalker_vmmc1, - .vsim = &omap3stalker_vsim, -}; - -static struct at24_platform_data fram_info = { - .byte_len = (64 * 1024) / 8, - .page_size = 8192, - .flags = AT24_FLAG_ADDR16 | AT24_FLAG_IRUGO, -}; - -static struct i2c_board_info __initdata omap3stalker_i2c_boardinfo3[] = { - { - I2C_BOARD_INFO("24c64", 0x50), - .flags = I2C_CLIENT_WAKE, - .platform_data = &fram_info, - }, -}; - -static int __init omap3_stalker_i2c_init(void) -{ - omap3_pmic_get_config(&omap3stalker_twldata, - TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_MADC | - TWL_COMMON_PDATA_AUDIO, - TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2); - - omap3stalker_twldata.vdac->constraints.apply_uV = true; - omap3stalker_twldata.vpll2->constraints.apply_uV = true; - omap3stalker_twldata.vpll2->constraints.name = "VDVI"; - - omap3_pmic_init("twl4030", &omap3stalker_twldata); - omap_register_i2c_bus(2, 400, NULL, 0); - omap_register_i2c_bus(3, 400, omap3stalker_i2c_boardinfo3, - ARRAY_SIZE(omap3stalker_i2c_boardinfo3)); - return 0; -} - -#define OMAP3_STALKER_TS_GPIO 175 - -static struct usbhs_phy_data phy_data[] __initdata = { - { - .port = 2, - .reset_gpio = 21, - .vcc_gpio = -EINVAL, - }, -}; - -static struct platform_device *omap3_stalker_devices[] __initdata = { - &keys_gpio, - &omap3stalker_tfp410_device, - &omap3stalker_dvi_connector_device, - &omap3stalker_tv_connector_device, -}; - -static struct usbhs_omap_platform_data usbhs_bdata __initdata = { - .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY, -}; - -#ifdef CONFIG_OMAP_MUX -static struct omap_board_mux board_mux[] __initdata = { - OMAP3_MUX(SYS_NIRQ, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP | - OMAP_PIN_OFF_INPUT_PULLUP | OMAP_PIN_OFF_WAKEUPENABLE), - OMAP3_MUX(MCSPI1_CS1, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP | - OMAP_PIN_OFF_INPUT_PULLUP | OMAP_PIN_OFF_WAKEUPENABLE), - {.reg_offset = OMAP_MUX_TERMINATOR}, -}; -#endif - -static struct regulator_consumer_supply dummy_supplies[] = { - REGULATOR_SUPPLY("vddvario", "smsc911x.0"), - REGULATOR_SUPPLY("vdd33a", "smsc911x.0"), -}; - -static void __init omap3_stalker_init(void) -{ - regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies)); - omap3_mux_init(board_mux, OMAP_PACKAGE_CUS); - - omap_mux_init_gpio(23, OMAP_PIN_INPUT); - omap_hsmmc_init(mmc); - - omap3_stalker_i2c_init(); - - platform_add_devices(omap3_stalker_devices, - ARRAY_SIZE(omap3_stalker_devices)); - - omap_display_init(&omap3_stalker_dss_data); - - omap_serial_init(); - omap_sdrc_init(mt46h32m32lf6_sdrc_params, NULL); - usb_bind_phy("musb-hdrc.0.auto", 0, "twl4030_usb"); - usb_musb_init(NULL); - - usbhs_init_phys(phy_data, ARRAY_SIZE(phy_data)); - usbhs_init(&usbhs_bdata); - omap_ads7846_init(1, OMAP3_STALKER_TS_GPIO, 310, NULL); - - omap_mux_init_gpio(21, OMAP_PIN_OUTPUT); - omap_mux_init_gpio(18, OMAP_PIN_INPUT_PULLUP); - - omap3stalker_init_eth(); - omap3_stalker_display_init(); -/* Ensure SDRC pins are mux'd for self-refresh */ - omap_mux_init_signal("sdr_cke0", OMAP_PIN_OUTPUT); - omap_mux_init_signal("sdr_cke1", OMAP_PIN_OUTPUT); -} - -MACHINE_START(SBC3530, "OMAP3 STALKER") - /* Maintainer: Jason Lam -lzg@ema-tech.com */ - .atag_offset = 0x100, - .map_io = omap3_map_io, - .init_early = omap35xx_init_early, - .init_irq = omap3_init_irq, - .init_machine = omap3_stalker_init, - .init_late = omap35xx_init_late, - .init_time = omap3_secure_sync32k_timer_init, - .restart = omap3xxx_restart, -MACHINE_END diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c b/arch/arm/mach-omap2/board-omap3touchbook.c deleted file mode 100644 index a01993e..0000000 --- a/arch/arm/mach-omap2/board-omap3touchbook.c +++ /dev/null @@ -1,395 +0,0 @@ -/* - * linux/arch/arm/mach-omap2/board-omap3touchbook.c - * - * Copyright (C) 2009 Always Innovating - * - * Modified from mach-omap2/board-omap3beagleboard.c - * - * Initial code: Grégoire Gentil, Tim Yamin - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/platform_device.h> -#include <linux/delay.h> -#include <linux/err.h> -#include <linux/clk.h> -#include <linux/io.h> -#include <linux/leds.h> -#include <linux/gpio.h> -#include <linux/input.h> -#include <linux/gpio_keys.h> - -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> -#include <linux/mtd/nand.h> -#include <linux/mmc/host.h> -#include <linux/usb/phy.h> - -#include <linux/platform_data/spi-omap2-mcspi.h> -#include <linux/spi/spi.h> - -#include <linux/spi/ads7846.h> - -#include <linux/regulator/machine.h> -#include <linux/i2c/twl.h> - -#include <asm/mach-types.h> -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/mach/flash.h> -#include <asm/system_info.h> - -#include "common.h" -#include "gpmc.h" -#include <linux/platform_data/mtd-nand-omap2.h> - -#include "mux.h" -#include "hsmmc.h" -#include "board-flash.h" -#include "common-board-devices.h" - -#include <asm/setup.h> - -#define OMAP3_AC_GPIO 136 -#define OMAP3_TS_GPIO 162 -#define TB_BL_PWM_TIMER 9 -#define TB_KILL_POWER_GPIO 168 - -#define NAND_CS 0 - -static unsigned long touchbook_revision; - -static struct mtd_partition omap3touchbook_nand_partitions[] = { - /* All the partition sizes are listed in terms of NAND block size */ - { - .name = "X-Loader", - .offset = 0, - .size = 4 * NAND_BLOCK_SIZE, - .mask_flags = MTD_WRITEABLE, /* force read-only */ - }, - { - .name = "U-Boot", - .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */ - .size = 15 * NAND_BLOCK_SIZE, - .mask_flags = MTD_WRITEABLE, /* force read-only */ - }, - { - .name = "U-Boot Env", - .offset = MTDPART_OFS_APPEND, /* Offset = 0x260000 */ - .size = 1 * NAND_BLOCK_SIZE, - }, - { - .name = "Kernel", - .offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */ - .size = 32 * NAND_BLOCK_SIZE, - }, - { - .name = "File System", - .offset = MTDPART_OFS_APPEND, /* Offset = 0x680000 */ - .size = MTDPART_SIZ_FULL, - }, -}; - -#include "sdram-micron-mt46h32m32lf-6.h" - -static struct omap2_hsmmc_info mmc[] = { - { - .mmc = 1, - .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA, - .gpio_wp = 29, - .deferred = true, - }, - {} /* Terminator */ -}; - -static struct regulator_consumer_supply touchbook_vmmc1_supply[] = { - REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), -}; - -static struct regulator_consumer_supply touchbook_vsim_supply[] = { - REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"), -}; - -static struct gpio_led gpio_leds[]; - -static int touchbook_twl_gpio_setup(struct device *dev, - unsigned gpio, unsigned ngpio) -{ - /* gpio + 0 is "mmc0_cd" (input/IRQ) */ - mmc[0].gpio_cd = gpio + 0; - omap_hsmmc_late_init(mmc); - - /* REVISIT: need ehci-omap hooks for external VBUS - * power switch and overcurrent detect - */ - gpio_request_one(gpio + 1, GPIOF_IN, "EHCI_nOC"); - - /* TWL4030_GPIO_MAX + 0 == ledA, EHCI nEN_USB_PWR (out, active low) */ - gpio_request_one(gpio + TWL4030_GPIO_MAX, GPIOF_OUT_INIT_LOW, - "nEN_USB_PWR"); - - /* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */ - gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1; - - return 0; -} - -static struct twl4030_gpio_platform_data touchbook_gpio_data = { - .use_leds = true, - .pullups = BIT(1), - .pulldowns = BIT(2) | BIT(6) | BIT(7) | BIT(8) | BIT(13) - | BIT(15) | BIT(16) | BIT(17), - .setup = touchbook_twl_gpio_setup, -}; - -static struct regulator_consumer_supply touchbook_vdac_supply[] = { -{ - .supply = "vdac", -}, -}; - -static struct regulator_consumer_supply touchbook_vdvi_supply[] = { -{ - .supply = "vdvi", -}, -}; - -/* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */ -static struct regulator_init_data touchbook_vmmc1 = { - .constraints = { - .min_uV = 1850000, - .max_uV = 3150000, - .valid_modes_mask = REGULATOR_MODE_NORMAL - | REGULATOR_MODE_STANDBY, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE - | REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, - .num_consumer_supplies = ARRAY_SIZE(touchbook_vmmc1_supply), - .consumer_supplies = touchbook_vmmc1_supply, -}; - -/* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */ -static struct regulator_init_data touchbook_vsim = { - .constraints = { - .min_uV = 1800000, - .max_uV = 3000000, - .valid_modes_mask = REGULATOR_MODE_NORMAL - | REGULATOR_MODE_STANDBY, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE - | REGULATOR_CHANGE_MODE - | REGULATOR_CHANGE_STATUS, - }, - .num_consumer_supplies = ARRAY_SIZE(touchbook_vsim_supply), - .consumer_supplies = touchbook_vsim_supply, -}; - -static struct twl4030_platform_data touchbook_twldata = { - /* platform_data for children goes here */ - .gpio = &touchbook_gpio_data, - .vmmc1 = &touchbook_vmmc1, - .vsim = &touchbook_vsim, -}; - -static struct i2c_board_info __initdata touchBook_i2c_boardinfo[] = { - { - I2C_BOARD_INFO("bq27200", 0x55), - }, -}; - -static int __init omap3_touchbook_i2c_init(void) -{ - /* Standard TouchBook bus */ - omap3_pmic_get_config(&touchbook_twldata, - TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO, - TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2); - - touchbook_twldata.vdac->num_consumer_supplies = - ARRAY_SIZE(touchbook_vdac_supply); - touchbook_twldata.vdac->consumer_supplies = touchbook_vdac_supply; - - touchbook_twldata.vpll2->constraints.name = "VDVI"; - touchbook_twldata.vpll2->num_consumer_supplies = - ARRAY_SIZE(touchbook_vdvi_supply); - touchbook_twldata.vpll2->consumer_supplies = touchbook_vdvi_supply; - - omap3_pmic_init("twl4030", &touchbook_twldata); - /* Additional TouchBook bus */ - omap_register_i2c_bus(3, 100, touchBook_i2c_boardinfo, - ARRAY_SIZE(touchBook_i2c_boardinfo)); - - return 0; -} - -static struct ads7846_platform_data ads7846_pdata = { - .x_min = 100, - .y_min = 265, - .x_max = 3950, - .y_max = 3750, - .x_plate_ohms = 40, - .pressure_max = 255, - .debounce_max = 10, - .debounce_tol = 5, - .debounce_rep = 1, - .gpio_pendown = OMAP3_TS_GPIO, - .keep_vref_on = 1, -}; - -static struct gpio_led gpio_leds[] = { - { - .name = "touchbook::usr0", - .default_trigger = "heartbeat", - .gpio = 150, - }, - { - .name = "touchbook::usr1", - .default_trigger = "mmc0", - .gpio = 149, - }, - { - .name = "touchbook::pmu_stat", - .gpio = -EINVAL, /* gets replaced */ - .active_low = true, - }, -}; - -static struct gpio_led_platform_data gpio_led_info = { - .leds = gpio_leds, - .num_leds = ARRAY_SIZE(gpio_leds), -}; - -static struct platform_device leds_gpio = { - .name = "leds-gpio", - .id = -1, - .dev = { - .platform_data = &gpio_led_info, - }, -}; - -static struct gpio_keys_button gpio_buttons[] = { - { - .code = BTN_EXTRA, - .gpio = 7, - .desc = "user", - .wakeup = 1, - }, - { - .code = KEY_POWER, - .gpio = 183, - .desc = "power", - .wakeup = 1, - }, -}; - -static struct gpio_keys_platform_data gpio_key_info = { - .buttons = gpio_buttons, - .nbuttons = ARRAY_SIZE(gpio_buttons), -}; - -static struct platform_device keys_gpio = { - .name = "gpio-keys", - .id = -1, - .dev = { - .platform_data = &gpio_key_info, - }, -}; - -#ifdef CONFIG_OMAP_MUX -static struct omap_board_mux board_mux[] __initdata = { - { .reg_offset = OMAP_MUX_TERMINATOR }, -}; -#endif - -static struct usbhs_phy_data phy_data[] __initdata = { - { - .port = 2, - .reset_gpio = 147, - .vcc_gpio = -EINVAL, - }, -}; - -static struct platform_device *omap3_touchbook_devices[] __initdata = { - &leds_gpio, - &keys_gpio, -}; - -static struct usbhs_omap_platform_data usbhs_bdata __initdata = { - .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY, - .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY, -}; - -static void omap3_touchbook_poweroff(void) -{ - int pwr_off = TB_KILL_POWER_GPIO; - - if (gpio_request_one(pwr_off, GPIOF_OUT_INIT_LOW, "DVI reset") < 0) - printk(KERN_ERR "Unable to get kill power GPIO\n"); -} - -static int __init early_touchbook_revision(char *p) -{ - if (!p) - return 0; - - return kstrtoul(p, 10, &touchbook_revision); -} -early_param("tbr", early_touchbook_revision); - -static void __init omap3_touchbook_init(void) -{ - omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); - - pm_power_off = omap3_touchbook_poweroff; - - if (system_rev >= 0x20 && system_rev <= 0x34301000) { - omap_mux_init_gpio(23, OMAP_PIN_INPUT); - mmc[0].gpio_wp = 23; - } else { - omap_mux_init_gpio(29, OMAP_PIN_INPUT); - } - omap_hsmmc_init(mmc); - - omap3_touchbook_i2c_init(); - platform_add_devices(omap3_touchbook_devices, - ARRAY_SIZE(omap3_touchbook_devices)); - omap_serial_init(); - omap_sdrc_init(mt46h32m32lf6_sdrc_params, - mt46h32m32lf6_sdrc_params); - - omap_mux_init_gpio(170, OMAP_PIN_INPUT); - /* REVISIT leave DVI powered down until it's needed ... */ - gpio_request_one(176, GPIOF_OUT_INIT_HIGH, "DVI_nPD"); - - /* Touchscreen and accelerometer */ - omap_ads7846_init(4, OMAP3_TS_GPIO, 310, &ads7846_pdata); - usb_bind_phy("musb-hdrc.0.auto", 0, "twl4030_usb"); - usb_musb_init(NULL); - - usbhs_init_phys(phy_data, ARRAY_SIZE(phy_data)); - usbhs_init(&usbhs_bdata); - board_nand_init(omap3touchbook_nand_partitions, - ARRAY_SIZE(omap3touchbook_nand_partitions), NAND_CS, - NAND_BUSWIDTH_16, NULL); - - /* Ensure SDRC pins are mux'd for self-refresh */ - omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT); - omap_mux_init_signal("sdrc_cke1", OMAP_PIN_OUTPUT); -} - -MACHINE_START(TOUCHBOOK, "OMAP3 touchbook Board") - /* Maintainer: Gregoire Gentil - http://www.alwaysinnovating.com */ - .atag_offset = 0x100, - .reserve = omap_reserve, - .map_io = omap3_map_io, - .init_early = omap3430_init_early, - .init_irq = omap3_init_irq, - .init_machine = omap3_touchbook_init, - .init_late = omap3430_init_late, - .init_time = omap3_secure_sync32k_timer_init, - .restart = omap3xxx_restart, -MACHINE_END diff --git a/arch/arm/mach-pxa/idp.c b/arch/arm/mach-pxa/idp.c index 343c4e3..7d8eab8 100644 --- a/arch/arm/mach-pxa/idp.c +++ b/arch/arm/mach-pxa/idp.c @@ -81,11 +81,16 @@ static struct resource smc91x_resources[] = { } }; +static struct smc91x_platdata smc91x_platdata = { + .flags = SMC91X_USE_32BIT | SMC91X_USE_DMA | SMC91X_NOWAIT, +}; + static struct platform_device smc91x_device = { .name = "smc91x", .id = 0, .num_resources = ARRAY_SIZE(smc91x_resources), .resource = smc91x_resources, + .dev.platform_data = &smc91x_platdata, }; static void idp_backlight_power(int on) diff --git a/arch/arm/mach-pxa/lpd270.c b/arch/arm/mach-pxa/lpd270.c index ad777b3..28da319 100644 --- a/arch/arm/mach-pxa/lpd270.c +++ b/arch/arm/mach-pxa/lpd270.c @@ -24,6 +24,7 @@ #include <linux/mtd/mtd.h> #include <linux/mtd/partitions.h> #include <linux/pwm_backlight.h> +#include <linux/smc91x.h> #include <asm/types.h> #include <asm/setup.h> @@ -189,15 +190,20 @@ static struct resource smc91x_resources[] = { [1] = { .start = LPD270_ETHERNET_IRQ, .end = LPD270_ETHERNET_IRQ, - .flags = IORESOURCE_IRQ, + .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, }, }; +struct smc91x_platdata smc91x_platdata = { + .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT; +}; + static struct platform_device smc91x_device = { .name = "smc91x", .id = 0, .num_resources = ARRAY_SIZE(smc91x_resources), .resource = smc91x_resources, + .dev.platform_data = &smc91x_platdata, }; static struct resource lpd270_flash_resources[] = { diff --git a/arch/arm/mach-realview/core.c b/arch/arm/mach-realview/core.c index 850e506..c309593 100644 --- a/arch/arm/mach-realview/core.c +++ b/arch/arm/mach-realview/core.c @@ -28,6 +28,7 @@ #include <linux/platform_data/video-clcd-versatile.h> #include <linux/io.h> #include <linux/smsc911x.h> +#include <linux/smc91x.h> #include <linux/ata_platform.h> #include <linux/amba/mmci.h> #include <linux/gfp.h> @@ -94,6 +95,10 @@ static struct smsc911x_platform_config smsc911x_config = { .phy_interface = PHY_INTERFACE_MODE_MII, }; +static struct smc91x_platdata smc91x_platdata = { + .flags = SMC91X_USE_32BIT | SMC91X_NOWAIT, +}; + static struct platform_device realview_eth_device = { .name = "smsc911x", .id = 0, @@ -107,6 +112,8 @@ int realview_eth_register(const char *name, struct resource *res) realview_eth_device.resource = res; if (strcmp(realview_eth_device.name, "smsc911x") == 0) realview_eth_device.dev.platform_data = &smsc911x_config; + else + realview_eth_device.dev.platform_data = &smc91x_platdata; return platform_device_register(&realview_eth_device); } diff --git a/arch/arm/mach-realview/realview_eb.c b/arch/arm/mach-realview/realview_eb.c index 64c88d6..b3869cb 100644 --- a/arch/arm/mach-realview/realview_eb.c +++ b/arch/arm/mach-realview/realview_eb.c @@ -234,7 +234,7 @@ static struct resource realview_eb_eth_resources[] = { [1] = { .start = IRQ_EB_ETH, .end = IRQ_EB_ETH, - .flags = IORESOURCE_IRQ, + .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, }, }; diff --git a/arch/arm/mach-sa1100/neponset.c b/arch/arm/mach-sa1100/neponset.c index 169262e..7b0cd31 100644 --- a/arch/arm/mach-sa1100/neponset.c +++ b/arch/arm/mach-sa1100/neponset.c @@ -12,6 +12,7 @@ #include <linux/pm.h> #include <linux/serial_core.h> #include <linux/slab.h> +#include <linux/smc91x.h> #include <asm/mach-types.h> #include <asm/mach/map.h> @@ -258,12 +259,17 @@ static int neponset_probe(struct platform_device *dev) 0x02000000, "smc91x-attrib"), { .flags = IORESOURCE_IRQ }, }; + struct smc91x_platdata smc91x_platdata = { + .flags = SMC91X_USE_8BIT | SMC91X_IO_SHIFT_2 | SMC91X_NOWAIT, + }; struct platform_device_info smc91x_devinfo = { .parent = &dev->dev, .name = "smc91x", .id = 0, .res = smc91x_resources, .num_res = ARRAY_SIZE(smc91x_resources), + .data = &smc91c_platdata, + .size_data = sizeof(smc91c_platdata), }; int ret, irq; diff --git a/arch/arm/mach-sa1100/pleb.c b/arch/arm/mach-sa1100/pleb.c index 0912618..696fd0f 100644 --- a/arch/arm/mach-sa1100/pleb.c +++ b/arch/arm/mach-sa1100/pleb.c @@ -11,6 +11,7 @@ #include <linux/irq.h> #include <linux/io.h> #include <linux/mtd/partitions.h> +#include <linux/smc91x.h> #include <mach/hardware.h> #include <asm/setup.h> @@ -43,12 +44,18 @@ static struct resource smc91x_resources[] = { #endif }; +static struct smc91x_platdata smc91x_platdata = { + .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT, +}; static struct platform_device smc91x_device = { .name = "smc91x", .id = 0, .num_resources = ARRAY_SIZE(smc91x_resources), .resource = smc91x_resources, + .dev = { + .platform_data = &smc91c_platdata, + }, }; static struct platform_device *devices[] __initdata = { diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile index d53996e..03794b0 100644 --- a/arch/arm/mach-shmobile/Makefile +++ b/arch/arm/mach-shmobile/Makefile @@ -12,8 +12,8 @@ obj-$(CONFIG_ARCH_R8A73A4) += setup-r8a73a4.o obj-$(CONFIG_ARCH_R8A7740) += setup-r8a7740.o pm-r8a7740.o obj-$(CONFIG_ARCH_R8A7778) += setup-r8a7778.o obj-$(CONFIG_ARCH_R8A7779) += setup-r8a7779.o pm-r8a7779.o -obj-$(CONFIG_ARCH_R8A7790) += setup-r8a7790.o pm-r8a7790.o -obj-$(CONFIG_ARCH_R8A7791) += setup-r8a7791.o pm-r8a7791.o +obj-$(CONFIG_ARCH_R8A7790) += setup-r8a7790.o +obj-$(CONFIG_ARCH_R8A7791) += setup-r8a7791.o obj-$(CONFIG_ARCH_R8A7794) += setup-r8a7794.o obj-$(CONFIG_ARCH_EMEV2) += setup-emev2.o obj-$(CONFIG_ARCH_R7S72100) += setup-r7s72100.o @@ -46,10 +46,10 @@ smp-$(CONFIG_ARCH_EMEV2) += smp-emev2.o headsmp-scu.o platsmp-scu.o # PM objects obj-$(CONFIG_SUSPEND) += suspend.o -obj-$(CONFIG_CPU_IDLE) += cpuidle.o obj-$(CONFIG_CPU_FREQ) += cpufreq.o obj-$(CONFIG_PM_RCAR) += pm-rcar.o obj-$(CONFIG_PM_RMOBILE) += pm-rmobile.o +obj-$(CONFIG_ARCH_RCAR_GEN2) += pm-rcar-gen2.o # special sh7372 handling for IRQ objects and low level sleep code obj-$(CONFIG_ARCH_SH7372) += entry-intc.o sleep-sh7372.o diff --git a/arch/arm/mach-shmobile/common.h b/arch/arm/mach-shmobile/common.h index 309025e..1dc0971 100644 --- a/arch/arm/mach-shmobile/common.h +++ b/arch/arm/mach-shmobile/common.h @@ -23,8 +23,6 @@ struct clk; extern int shmobile_clk_init(void); extern void shmobile_handle_irq_intc(struct pt_regs *); extern struct platform_suspend_ops shmobile_suspend_ops; -struct cpuidle_driver; -extern void shmobile_cpuidle_set_driver(struct cpuidle_driver *drv); #ifdef CONFIG_SUSPEND int shmobile_suspend_init(void); @@ -34,12 +32,6 @@ static inline int shmobile_suspend_init(void) { return 0; } static inline void shmobile_smp_apmu_suspend_init(void) { } #endif -#ifdef CONFIG_CPU_IDLE -int shmobile_cpuidle_init(void); -#else -static inline int shmobile_cpuidle_init(void) { return 0; } -#endif - #ifdef CONFIG_CPU_FREQ int shmobile_cpufreq_init(void); #else @@ -51,7 +43,6 @@ extern void __iomem *shmobile_scu_base; static inline void __init shmobile_init_late(void) { shmobile_suspend_init(); - shmobile_cpuidle_init(); shmobile_cpufreq_init(); } diff --git a/arch/arm/mach-shmobile/cpuidle.c b/arch/arm/mach-shmobile/cpuidle.c deleted file mode 100644 index 0afeb5c..0000000 --- a/arch/arm/mach-shmobile/cpuidle.c +++ /dev/null @@ -1,37 +0,0 @@ -/* - * CPUIdle support code for SH-Mobile ARM - * - * Copyright (C) 2011 Magnus Damm - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ - -#include <linux/pm.h> -#include <linux/cpuidle.h> -#include <linux/suspend.h> -#include <linux/module.h> -#include <linux/err.h> -#include <asm/cpuidle.h> -#include <asm/io.h> - -static struct cpuidle_driver shmobile_cpuidle_default_driver = { - .name = "shmobile_cpuidle", - .owner = THIS_MODULE, - .states[0] = ARM_CPUIDLE_WFI_STATE, - .safe_state_index = 0, /* C1 */ - .state_count = 1, -}; - -static struct cpuidle_driver *cpuidle_drv = &shmobile_cpuidle_default_driver; - -void __init shmobile_cpuidle_set_driver(struct cpuidle_driver *drv) -{ - cpuidle_drv = drv; -} - -int __init shmobile_cpuidle_init(void) -{ - return cpuidle_register(cpuidle_drv, NULL); -} diff --git a/arch/arm/mach-shmobile/pm-r8a7790.c b/arch/arm/mach-shmobile/pm-r8a7790.c deleted file mode 100644 index 80e8d95..0000000 --- a/arch/arm/mach-shmobile/pm-r8a7790.c +++ /dev/null @@ -1,82 +0,0 @@ -/* - * r8a7790 Power management support - * - * Copyright (C) 2013 Renesas Electronics Corporation - * Copyright (C) 2011 Renesas Solutions Corp. - * Copyright (C) 2011 Magnus Damm - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ - -#include <linux/kernel.h> -#include <linux/smp.h> -#include <asm/io.h> -#include "common.h" -#include "pm-rcar.h" -#include "r8a7790.h" - -/* RST */ -#define RST 0xe6160000 -#define CA15BAR 0x0020 -#define CA7BAR 0x0030 -#define CA15RESCNT 0x0040 -#define CA7RESCNT 0x0044 - -/* On-chip RAM */ -#define MERAM 0xe8080000 - -/* SYSC */ -#define SYSCIER 0x0c -#define SYSCIMR 0x10 - -#if defined(CONFIG_SMP) - -static void __init r8a7790_sysc_init(void) -{ - void __iomem *base = rcar_sysc_init(0xe6180000); - - /* enable all interrupt sources, but do not use interrupt handler */ - iowrite32(0x0131000e, base + SYSCIER); - iowrite32(0, base + SYSCIMR); -} - -#else /* CONFIG_SMP */ - -static inline void r8a7790_sysc_init(void) {} - -#endif /* CONFIG_SMP */ - -void __init r8a7790_pm_init(void) -{ - void __iomem *p; - u32 bar; - static int once; - - if (once++) - return; - - /* MERAM for jump stub, because BAR requires 256KB aligned address */ - p = ioremap_nocache(MERAM, shmobile_boot_size); - memcpy_toio(p, shmobile_boot_vector, shmobile_boot_size); - iounmap(p); - - /* setup reset vectors */ - p = ioremap_nocache(RST, 0x63); - bar = (MERAM >> 8) & 0xfffffc00; - writel_relaxed(bar, p + CA15BAR); - writel_relaxed(bar, p + CA7BAR); - writel_relaxed(bar | 0x10, p + CA15BAR); - writel_relaxed(bar | 0x10, p + CA7BAR); - - /* de-assert reset for all CPUs */ - writel_relaxed((readl_relaxed(p + CA15RESCNT) & ~0x0f) | 0xa5a50000, - p + CA15RESCNT); - writel_relaxed((readl_relaxed(p + CA7RESCNT) & ~0x0f) | 0x5a5a0000, - p + CA7RESCNT); - iounmap(p); - - r8a7790_sysc_init(); - shmobile_smp_apmu_suspend_init(); -} diff --git a/arch/arm/mach-shmobile/pm-r8a7791.c b/arch/arm/mach-shmobile/pm-r8a7791.c deleted file mode 100644 index 25f107b..0000000 --- a/arch/arm/mach-shmobile/pm-r8a7791.c +++ /dev/null @@ -1,73 +0,0 @@ -/* - * r8a7791 Power management support - * - * Copyright (C) 2014 Renesas Electronics Corporation - * Copyright (C) 2011 Renesas Solutions Corp. - * Copyright (C) 2011 Magnus Damm - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ - -#include <linux/kernel.h> -#include <linux/smp.h> -#include <asm/io.h> -#include "common.h" -#include "pm-rcar.h" -#include "r8a7791.h" - -#define RST 0xe6160000 -#define CA15BAR 0x0020 -#define CA15RESCNT 0x0040 -#define RAM 0xe6300000 - -/* SYSC */ -#define SYSCIER 0x0c -#define SYSCIMR 0x10 - -#if defined(CONFIG_SMP) - -static void __init r8a7791_sysc_init(void) -{ - void __iomem *base = rcar_sysc_init(0xe6180000); - - /* enable all interrupt sources, but do not use interrupt handler */ - iowrite32(0x0131000e, base + SYSCIER); - iowrite32(0, base + SYSCIMR); -} - -#else /* CONFIG_SMP */ - -static inline void r8a7791_sysc_init(void) {} - -#endif /* CONFIG_SMP */ - -void __init r8a7791_pm_init(void) -{ - void __iomem *p; - u32 bar; - static int once; - - if (once++) - return; - - /* RAM for jump stub, because BAR requires 256KB aligned address */ - p = ioremap_nocache(RAM, shmobile_boot_size); - memcpy_toio(p, shmobile_boot_vector, shmobile_boot_size); - iounmap(p); - - /* setup reset vectors */ - p = ioremap_nocache(RST, 0x63); - bar = (RAM >> 8) & 0xfffffc00; - writel_relaxed(bar, p + CA15BAR); - writel_relaxed(bar | 0x10, p + CA15BAR); - - /* enable clocks to all CPUs */ - writel_relaxed((readl_relaxed(p + CA15RESCNT) & ~0x0f) | 0xa5a50000, - p + CA15RESCNT); - iounmap(p); - - r8a7791_sysc_init(); - shmobile_smp_apmu_suspend_init(); -} diff --git a/arch/arm/mach-shmobile/pm-rcar-gen2.c b/arch/arm/mach-shmobile/pm-rcar-gen2.c new file mode 100644 index 0000000..6815781 --- /dev/null +++ b/arch/arm/mach-shmobile/pm-rcar-gen2.c @@ -0,0 +1,115 @@ +/* + * R-Car Generation 2 Power management support + * + * Copyright (C) 2013 - 2015 Renesas Electronics Corporation + * Copyright (C) 2011 Renesas Solutions Corp. + * Copyright (C) 2011 Magnus Damm + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ + +#include <linux/kernel.h> +#include <linux/of.h> +#include <linux/smp.h> +#include <asm/io.h> +#include "common.h" +#include "pm-rcar.h" +#include "rcar-gen2.h" + +/* RST */ +#define RST 0xe6160000 +#define CA15BAR 0x0020 +#define CA7BAR 0x0030 +#define CA15RESCNT 0x0040 +#define CA7RESCNT 0x0044 + +/* On-chip RAM */ +#define MERAM 0xe8080000 +#define RAM 0xe6300000 + +/* SYSC */ +#define SYSCIER 0x0c +#define SYSCIMR 0x10 + +#if defined(CONFIG_SMP) + +static void __init rcar_gen2_sysc_init(u32 syscier) +{ + void __iomem *base = rcar_sysc_init(0xe6180000); + + /* enable all interrupt sources, but do not use interrupt handler */ + iowrite32(syscier, base + SYSCIER); + iowrite32(0, base + SYSCIMR); +} + +#else /* CONFIG_SMP */ + +static inline void rcar_gen2_sysc_init(u32 syscier) {} + +#endif /* CONFIG_SMP */ + +void __init rcar_gen2_pm_init(void) +{ + void __iomem *p; + u32 bar; + static int once; + struct device_node *np, *cpus; + bool has_a7 = false; + bool has_a15 = false; + phys_addr_t boot_vector_addr = 0; + u32 syscier = 0; + + if (once++) + return; + + cpus = of_find_node_by_path("/cpus"); + if (!cpus) + return; + + for_each_child_of_node(cpus, np) { + if (of_device_is_compatible(np, "arm,cortex-a15")) + has_a15 = true; + else if (of_device_is_compatible(np, "arm,cortex-a7")) + has_a7 = true; + } + + if (of_machine_is_compatible("renesas,r8a7790")) { + boot_vector_addr = MERAM; + syscier = 0x013111ef; + + } else if (of_machine_is_compatible("renesas,r8a7791")) { + boot_vector_addr = RAM; + syscier = 0x00111003; + } + + /* RAM for jump stub, because BAR requires 256KB aligned address */ + p = ioremap_nocache(boot_vector_addr, shmobile_boot_size); + memcpy_toio(p, shmobile_boot_vector, shmobile_boot_size); + iounmap(p); + + /* setup reset vectors */ + p = ioremap_nocache(RST, 0x63); + bar = (boot_vector_addr >> 8) & 0xfffffc00; + if (has_a15) { + writel_relaxed(bar, p + CA15BAR); + writel_relaxed(bar | 0x10, p + CA15BAR); + + /* de-assert reset for CA15 CPUs */ + writel_relaxed((readl_relaxed(p + CA15RESCNT) & ~0x0f) | + 0xa5a50000, p + CA15RESCNT); + } + if (has_a7) { + writel_relaxed(bar, p + CA7BAR); + writel_relaxed(bar | 0x10, p + CA7BAR); + + /* de-assert reset for CA7 CPUs */ + writel_relaxed((readl_relaxed(p + CA7RESCNT) & ~0x0f) | + 0x5a5a0000, p + CA7RESCNT); + } + iounmap(p); + + rcar_gen2_sysc_init(syscier); + shmobile_smp_apmu_suspend_init(); +} diff --git a/arch/arm/mach-shmobile/pm-sh7372.c b/arch/arm/mach-shmobile/pm-sh7372.c index c0293ae..9f19052 100644 --- a/arch/arm/mach-shmobile/pm-sh7372.c +++ b/arch/arm/mach-shmobile/pm-sh7372.c @@ -462,7 +462,7 @@ static struct cpuidle_driver sh7372_cpuidle_driver = { static void __init sh7372_cpuidle_init(void) { - shmobile_cpuidle_set_driver(&sh7372_cpuidle_driver); + return cpuidle_register(cpuidle_drv, NULL); } #else static void __init sh7372_cpuidle_init(void) {} diff --git a/arch/arm/mach-shmobile/r8a7790.h b/arch/arm/mach-shmobile/r8a7790.h index bf73a85..1a46d02 100644 --- a/arch/arm/mach-shmobile/r8a7790.h +++ b/arch/arm/mach-shmobile/r8a7790.h @@ -1,7 +1,6 @@ #ifndef __ASM_R8A7790_H__ #define __ASM_R8A7790_H__ -void r8a7790_pm_init(void); extern struct smp_operations r8a7790_smp_ops; #endif /* __ASM_R8A7790_H__ */ diff --git a/arch/arm/mach-shmobile/r8a7791.h b/arch/arm/mach-shmobile/r8a7791.h index 6cf11eb..7ca0b7d 100644 --- a/arch/arm/mach-shmobile/r8a7791.h +++ b/arch/arm/mach-shmobile/r8a7791.h @@ -1,7 +1,6 @@ #ifndef __ASM_R8A7791_H__ #define __ASM_R8A7791_H__ -void r8a7791_pm_init(void); extern struct smp_operations r8a7791_smp_ops; #endif /* __ASM_R8A7791_H__ */ diff --git a/arch/arm/mach-shmobile/rcar-gen2.h b/arch/arm/mach-shmobile/rcar-gen2.h index ce53cb5..8a66b4a 100644 --- a/arch/arm/mach-shmobile/rcar-gen2.h +++ b/arch/arm/mach-shmobile/rcar-gen2.h @@ -5,5 +5,6 @@ void rcar_gen2_timer_init(void); #define MD(nr) BIT(nr) u32 rcar_gen2_read_mode_pins(void); void rcar_gen2_reserve(void); +void rcar_gen2_pm_init(void); #endif /* __ASM_RCAR_GEN2_H__ */ diff --git a/arch/arm/mach-shmobile/setup-r8a7740.c b/arch/arm/mach-shmobile/setup-r8a7740.c index dd64caf..9832e48 100644 --- a/arch/arm/mach-shmobile/setup-r8a7740.c +++ b/arch/arm/mach-shmobile/setup-r8a7740.c @@ -842,13 +842,6 @@ static void __init r8a7740_generic_init(void) of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); } -#define RESCNT2 IOMEM(0xe6188020) -static void r8a7740_restart(enum reboot_mode mode, const char *cmd) -{ - /* Do soft power on reset */ - writel(1 << 31, RESCNT2); -} - static const char *r8a7740_boards_compat_dt[] __initdata = { "renesas,r8a7740", NULL, @@ -861,7 +854,6 @@ DT_MACHINE_START(R8A7740_DT, "Generic R8A7740 (Flattened Device Tree)") .init_machine = r8a7740_generic_init, .init_late = shmobile_init_late, .dt_compat = r8a7740_boards_compat_dt, - .restart = r8a7740_restart, MACHINE_END #endif /* CONFIG_USE_OF */ diff --git a/arch/arm/mach-shmobile/setup-rcar-gen2.c b/arch/arm/mach-shmobile/setup-rcar-gen2.c index d1fa625..51464cc 100644 --- a/arch/arm/mach-shmobile/setup-rcar-gen2.c +++ b/arch/arm/mach-shmobile/setup-rcar-gen2.c @@ -50,9 +50,7 @@ u32 rcar_gen2_read_mode_pins(void) void __init rcar_gen2_timer_init(void) { -#if defined(CONFIG_ARM_ARCH_TIMER) || defined(CONFIG_COMMON_CLK) u32 mode = rcar_gen2_read_mode_pins(); -#endif #ifdef CONFIG_ARM_ARCH_TIMER void __iomem *base; int extal_mhz = 0; @@ -128,9 +126,7 @@ void __init rcar_gen2_timer_init(void) iounmap(base); #endif /* CONFIG_ARM_ARCH_TIMER */ -#ifdef CONFIG_COMMON_CLK rcar_gen2_clocks_init(mode); -#endif #ifdef CONFIG_ARCH_SHMOBILE_MULTI clocksource_of_init(); #endif diff --git a/arch/arm/mach-shmobile/smp-r8a7790.c b/arch/arm/mach-shmobile/smp-r8a7790.c index 9c3da13..f8be415 100644 --- a/arch/arm/mach-shmobile/smp-r8a7790.c +++ b/arch/arm/mach-shmobile/smp-r8a7790.c @@ -23,6 +23,7 @@ #include "common.h" #include "platsmp-apmu.h" #include "pm-rcar.h" +#include "rcar-gen2.h" #include "r8a7790.h" static struct rcar_sysc_ch r8a7790_ca15_scu = { @@ -54,7 +55,7 @@ static void __init r8a7790_smp_prepare_cpus(unsigned int max_cpus) ARRAY_SIZE(r8a7790_apmu_config)); /* turn on power to SCU */ - r8a7790_pm_init(); + rcar_gen2_pm_init(); rcar_sysc_power_up(&r8a7790_ca15_scu); rcar_sysc_power_up(&r8a7790_ca7_scu); } diff --git a/arch/arm/mach-shmobile/smp-r8a7791.c b/arch/arm/mach-shmobile/smp-r8a7791.c index 7e49e0a..6658682 100644 --- a/arch/arm/mach-shmobile/smp-r8a7791.c +++ b/arch/arm/mach-shmobile/smp-r8a7791.c @@ -39,7 +39,7 @@ static void __init r8a7791_smp_prepare_cpus(unsigned int max_cpus) r8a7791_apmu_config, ARRAY_SIZE(r8a7791_apmu_config)); - r8a7791_pm_init(); + rcar_gen2_pm_init(); } static int r8a7791_smp_boot_secondary(unsigned int cpu, diff --git a/arch/arm64/boot/dts/arm/foundation-v8.dts b/arch/arm64/boot/dts/arm/foundation-v8.dts index 27f3296..4eac8dc 100644 --- a/arch/arm64/boot/dts/arm/foundation-v8.dts +++ b/arch/arm64/boot/dts/arm/foundation-v8.dts @@ -34,6 +34,7 @@ reg = <0x0 0x0>; enable-method = "spin-table"; cpu-release-addr = <0x0 0x8000fff8>; + next-level-cache = <&L2_0>; }; cpu@1 { device_type = "cpu"; @@ -41,6 +42,7 @@ reg = <0x0 0x1>; enable-method = "spin-table"; cpu-release-addr = <0x0 0x8000fff8>; + next-level-cache = <&L2_0>; }; cpu@2 { device_type = "cpu"; @@ -48,6 +50,7 @@ reg = <0x0 0x2>; enable-method = "spin-table"; cpu-release-addr = <0x0 0x8000fff8>; + next-level-cache = <&L2_0>; }; cpu@3 { device_type = "cpu"; @@ -55,6 +58,11 @@ reg = <0x0 0x3>; enable-method = "spin-table"; cpu-release-addr = <0x0 0x8000fff8>; + next-level-cache = <&L2_0>; + }; + + L2_0: l2-cache0 { + compatible = "cache"; }; }; diff --git a/arch/arm64/boot/dts/arm/juno.dts b/arch/arm64/boot/dts/arm/juno.dts index d429129..133ee59 100644 --- a/arch/arm64/boot/dts/arm/juno.dts +++ b/arch/arm64/boot/dts/arm/juno.dts @@ -39,6 +39,7 @@ reg = <0x0 0x0>; device_type = "cpu"; enable-method = "psci"; + next-level-cache = <&A57_L2>; }; A57_1: cpu@1 { @@ -46,6 +47,7 @@ reg = <0x0 0x1>; device_type = "cpu"; enable-method = "psci"; + next-level-cache = <&A57_L2>; }; A53_0: cpu@100 { @@ -53,6 +55,7 @@ reg = <0x0 0x100>; device_type = "cpu"; enable-method = "psci"; + next-level-cache = <&A53_L2>; }; A53_1: cpu@101 { @@ -60,6 +63,7 @@ reg = <0x0 0x101>; device_type = "cpu"; enable-method = "psci"; + next-level-cache = <&A53_L2>; }; A53_2: cpu@102 { @@ -67,6 +71,7 @@ reg = <0x0 0x102>; device_type = "cpu"; enable-method = "psci"; + next-level-cache = <&A53_L2>; }; A53_3: cpu@103 { @@ -74,6 +79,15 @@ reg = <0x0 0x103>; device_type = "cpu"; enable-method = "psci"; + next-level-cache = <&A53_L2>; + }; + + A57_L2: l2-cache0 { + compatible = "cache"; + }; + + A53_L2: l2-cache1 { + compatible = "cache"; }; }; diff --git a/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts b/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts index efc59b3..20addab 100644 --- a/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts +++ b/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts @@ -37,6 +37,7 @@ reg = <0x0 0x0>; enable-method = "spin-table"; cpu-release-addr = <0x0 0x8000fff8>; + next-level-cache = <&L2_0>; }; cpu@1 { device_type = "cpu"; @@ -44,6 +45,7 @@ reg = <0x0 0x1>; enable-method = "spin-table"; cpu-release-addr = <0x0 0x8000fff8>; + next-level-cache = <&L2_0>; }; cpu@2 { device_type = "cpu"; @@ -51,6 +53,7 @@ reg = <0x0 0x2>; enable-method = "spin-table"; cpu-release-addr = <0x0 0x8000fff8>; + next-level-cache = <&L2_0>; }; cpu@3 { device_type = "cpu"; @@ -58,6 +61,11 @@ reg = <0x0 0x3>; enable-method = "spin-table"; cpu-release-addr = <0x0 0x8000fff8>; + next-level-cache = <&L2_0>; + }; + + L2_0: l2-cache0 { + compatible = "cache"; }; }; diff --git a/arch/arm64/crypto/Makefile b/arch/arm64/crypto/Makefile index 5720608..abb79b3 100644 --- a/arch/arm64/crypto/Makefile +++ b/arch/arm64/crypto/Makefile @@ -29,7 +29,7 @@ aes-ce-blk-y := aes-glue-ce.o aes-ce.o obj-$(CONFIG_CRYPTO_AES_ARM64_NEON_BLK) += aes-neon-blk.o aes-neon-blk-y := aes-glue-neon.o aes-neon.o -AFLAGS_aes-ce.o := -DINTERLEAVE=2 -DINTERLEAVE_INLINE +AFLAGS_aes-ce.o := -DINTERLEAVE=4 AFLAGS_aes-neon.o := -DINTERLEAVE=4 CFLAGS_aes-glue-ce.o := -DUSE_V8_CRYPTO_EXTENSIONS diff --git a/arch/arm64/include/asm/assembler.h b/arch/arm64/include/asm/assembler.h index 5901480..750bac4 100644 --- a/arch/arm64/include/asm/assembler.h +++ b/arch/arm64/include/asm/assembler.h @@ -20,6 +20,9 @@ #error "Only include this from assembly code" #endif +#ifndef __ASM_ASSEMBLER_H +#define __ASM_ASSEMBLER_H + #include <asm/ptrace.h> #include <asm/thread_info.h> @@ -155,3 +158,5 @@ lr .req x30 // link register #endif orr \rd, \lbits, \hbits, lsl #32 .endm + +#endif /* __ASM_ASSEMBLER_H */ diff --git a/arch/arm64/include/asm/cpuidle.h b/arch/arm64/include/asm/cpuidle.h index 0710654..c60643f 100644 --- a/arch/arm64/include/asm/cpuidle.h +++ b/arch/arm64/include/asm/cpuidle.h @@ -1,6 +1,8 @@ #ifndef __ASM_CPUIDLE_H #define __ASM_CPUIDLE_H +#include <asm/proc-fns.h> + #ifdef CONFIG_CPU_IDLE extern int cpu_init_idle(unsigned int cpu); extern int cpu_suspend(unsigned long arg); diff --git a/arch/arm64/include/asm/insn.h b/arch/arm64/include/asm/insn.h index e2ff32a..d2f4942 100644 --- a/arch/arm64/include/asm/insn.h +++ b/arch/arm64/include/asm/insn.h @@ -264,8 +264,10 @@ __AARCH64_INSN_FUNCS(ands, 0x7F200000, 0x6A000000) __AARCH64_INSN_FUNCS(bics, 0x7F200000, 0x6A200000) __AARCH64_INSN_FUNCS(b, 0xFC000000, 0x14000000) __AARCH64_INSN_FUNCS(bl, 0xFC000000, 0x94000000) -__AARCH64_INSN_FUNCS(cbz, 0xFE000000, 0x34000000) -__AARCH64_INSN_FUNCS(cbnz, 0xFE000000, 0x35000000) +__AARCH64_INSN_FUNCS(cbz, 0x7F000000, 0x34000000) +__AARCH64_INSN_FUNCS(cbnz, 0x7F000000, 0x35000000) +__AARCH64_INSN_FUNCS(tbz, 0x7F000000, 0x36000000) +__AARCH64_INSN_FUNCS(tbnz, 0x7F000000, 0x37000000) __AARCH64_INSN_FUNCS(bcond, 0xFF000010, 0x54000000) __AARCH64_INSN_FUNCS(svc, 0xFFE0001F, 0xD4000001) __AARCH64_INSN_FUNCS(hvc, 0xFFE0001F, 0xD4000002) diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h index 16449c535..800ec0e 100644 --- a/arch/arm64/include/asm/pgtable.h +++ b/arch/arm64/include/asm/pgtable.h @@ -460,7 +460,7 @@ static inline pud_t *pud_offset(pgd_t *pgd, unsigned long addr) static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) { const pteval_t mask = PTE_USER | PTE_PXN | PTE_UXN | PTE_RDONLY | - PTE_PROT_NONE | PTE_VALID | PTE_WRITE; + PTE_PROT_NONE | PTE_WRITE | PTE_TYPE_MASK; pte_val(pte) = (pte_val(pte) & ~mask) | (pgprot_val(newprot) & mask); return pte; } diff --git a/arch/arm64/include/asm/processor.h b/arch/arm64/include/asm/processor.h index f9be30e..20e9591 100644 --- a/arch/arm64/include/asm/processor.h +++ b/arch/arm64/include/asm/processor.h @@ -45,7 +45,8 @@ #define STACK_TOP STACK_TOP_MAX #endif /* CONFIG_COMPAT */ -#define ARCH_LOW_ADDRESS_LIMIT PHYS_MASK +extern phys_addr_t arm64_dma_phys_limit; +#define ARCH_LOW_ADDRESS_LIMIT (arm64_dma_phys_limit - 1) #endif /* __KERNEL__ */ struct debug_info { diff --git a/arch/arm64/include/asm/tlbflush.h b/arch/arm64/include/asm/tlbflush.h index 73f0ce5..4abe9b9 100644 --- a/arch/arm64/include/asm/tlbflush.h +++ b/arch/arm64/include/asm/tlbflush.h @@ -24,11 +24,6 @@ #include <linux/sched.h> #include <asm/cputype.h> -extern void __cpu_flush_user_tlb_range(unsigned long, unsigned long, struct vm_area_struct *); -extern void __cpu_flush_kern_tlb_range(unsigned long, unsigned long); - -extern struct cpu_tlb_fns cpu_tlb; - /* * TLB Management * ============== diff --git a/arch/arm64/kernel/Makefile b/arch/arm64/kernel/Makefile index bef04af..5ee07ee 100644 --- a/arch/arm64/kernel/Makefile +++ b/arch/arm64/kernel/Makefile @@ -15,8 +15,9 @@ CFLAGS_REMOVE_return_address.o = -pg arm64-obj-y := cputable.o debug-monitors.o entry.o irq.o fpsimd.o \ entry-fpsimd.o process.o ptrace.o setup.o signal.o \ sys.o stacktrace.o time.o traps.o io.o vdso.o \ - hyp-stub.o psci.o cpu_ops.o insn.o return_address.o \ - cpuinfo.o cpu_errata.o alternative.o cacheinfo.o + hyp-stub.o psci.o psci-call.o cpu_ops.o insn.o \ + return_address.o cpuinfo.o cpu_errata.o \ + alternative.o cacheinfo.o arm64-obj-$(CONFIG_COMPAT) += sys32.o kuser32.o signal32.o \ sys_compat.o entry32.o \ diff --git a/arch/arm64/kernel/ftrace.c b/arch/arm64/kernel/ftrace.c index cf8556a..c851be7 100644 --- a/arch/arm64/kernel/ftrace.c +++ b/arch/arm64/kernel/ftrace.c @@ -156,7 +156,7 @@ static int ftrace_modify_graph_caller(bool enable) branch = aarch64_insn_gen_branch_imm(pc, (unsigned long)ftrace_graph_caller, - AARCH64_INSN_BRANCH_LINK); + AARCH64_INSN_BRANCH_NOLINK); nop = aarch64_insn_gen_nop(); if (enable) diff --git a/arch/arm64/kernel/insn.c b/arch/arm64/kernel/insn.c index 27d4864..c8eca88 100644 --- a/arch/arm64/kernel/insn.c +++ b/arch/arm64/kernel/insn.c @@ -87,8 +87,10 @@ static void __kprobes *patch_map(void *addr, int fixmap) if (module && IS_ENABLED(CONFIG_DEBUG_SET_MODULE_RONX)) page = vmalloc_to_page(addr); - else + else if (!module && IS_ENABLED(CONFIG_DEBUG_RODATA)) page = virt_to_page(addr); + else + return addr; BUG_ON(!page); set_fixmap(fixmap, page_to_phys(page)); diff --git a/arch/arm64/kernel/psci-call.S b/arch/arm64/kernel/psci-call.S new file mode 100644 index 0000000..cf83e61 --- /dev/null +++ b/arch/arm64/kernel/psci-call.S @@ -0,0 +1,28 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Copyright (C) 2015 ARM Limited + * + * Author: Will Deacon <will.deacon@arm.com> + */ + +#include <linux/linkage.h> + +/* int __invoke_psci_fn_hvc(u64 function_id, u64 arg0, u64 arg1, u64 arg2) */ +ENTRY(__invoke_psci_fn_hvc) + hvc #0 + ret +ENDPROC(__invoke_psci_fn_hvc) + +/* int __invoke_psci_fn_smc(u64 function_id, u64 arg0, u64 arg1, u64 arg2) */ +ENTRY(__invoke_psci_fn_smc) + smc #0 + ret +ENDPROC(__invoke_psci_fn_smc) diff --git a/arch/arm64/kernel/psci.c b/arch/arm64/kernel/psci.c index 3425f31..9b8a70a 100644 --- a/arch/arm64/kernel/psci.c +++ b/arch/arm64/kernel/psci.c @@ -57,6 +57,9 @@ static struct psci_operations psci_ops; static int (*invoke_psci_fn)(u64, u64, u64, u64); typedef int (*psci_initcall_t)(const struct device_node *); +asmlinkage int __invoke_psci_fn_hvc(u64, u64, u64, u64); +asmlinkage int __invoke_psci_fn_smc(u64, u64, u64, u64); + enum psci_function { PSCI_FN_CPU_SUSPEND, PSCI_FN_CPU_ON, @@ -109,40 +112,6 @@ static void psci_power_state_unpack(u32 power_state, PSCI_0_2_POWER_STATE_AFFL_SHIFT; } -/* - * The following two functions are invoked via the invoke_psci_fn pointer - * and will not be inlined, allowing us to piggyback on the AAPCS. - */ -static noinline int __invoke_psci_fn_hvc(u64 function_id, u64 arg0, u64 arg1, - u64 arg2) -{ - asm volatile( - __asmeq("%0", "x0") - __asmeq("%1", "x1") - __asmeq("%2", "x2") - __asmeq("%3", "x3") - "hvc #0\n" - : "+r" (function_id) - : "r" (arg0), "r" (arg1), "r" (arg2)); - - return function_id; -} - -static noinline int __invoke_psci_fn_smc(u64 function_id, u64 arg0, u64 arg1, - u64 arg2) -{ - asm volatile( - __asmeq("%0", "x0") - __asmeq("%1", "x1") - __asmeq("%2", "x2") - __asmeq("%3", "x3") - "smc #0\n" - : "+r" (function_id) - : "r" (arg0), "r" (arg1), "r" (arg2)); - - return function_id; -} - static int psci_get_version(void) { int err; diff --git a/arch/arm64/kernel/signal32.c b/arch/arm64/kernel/signal32.c index c20a300..d26fcd4 100644 --- a/arch/arm64/kernel/signal32.c +++ b/arch/arm64/kernel/signal32.c @@ -154,8 +154,7 @@ int copy_siginfo_to_user32(compat_siginfo_t __user *to, const siginfo_t *from) case __SI_TIMER: err |= __put_user(from->si_tid, &to->si_tid); err |= __put_user(from->si_overrun, &to->si_overrun); - err |= __put_user((compat_uptr_t)(unsigned long)from->si_ptr, - &to->si_ptr); + err |= __put_user(from->si_int, &to->si_int); break; case __SI_POLL: err |= __put_user(from->si_band, &to->si_band); @@ -184,7 +183,7 @@ int copy_siginfo_to_user32(compat_siginfo_t __user *to, const siginfo_t *from) case __SI_MESGQ: /* But this is */ err |= __put_user(from->si_pid, &to->si_pid); err |= __put_user(from->si_uid, &to->si_uid); - err |= __put_user((compat_uptr_t)(unsigned long)from->si_ptr, &to->si_ptr); + err |= __put_user(from->si_int, &to->si_int); break; case __SI_SYS: err |= __put_user((compat_uptr_t)(unsigned long) diff --git a/arch/arm64/kernel/vdso/gettimeofday.S b/arch/arm64/kernel/vdso/gettimeofday.S index fe652ff..efa79e8 100644 --- a/arch/arm64/kernel/vdso/gettimeofday.S +++ b/arch/arm64/kernel/vdso/gettimeofday.S @@ -174,8 +174,6 @@ ENDPROC(__kernel_clock_gettime) /* int __kernel_clock_getres(clockid_t clock_id, struct timespec *res); */ ENTRY(__kernel_clock_getres) .cfi_startproc - cbz w1, 3f - cmp w0, #CLOCK_REALTIME ccmp w0, #CLOCK_MONOTONIC, #0x4, ne b.ne 1f @@ -188,6 +186,7 @@ ENTRY(__kernel_clock_getres) b.ne 4f ldr x2, 6f 2: + cbz w1, 3f stp xzr, x2, [x1] 3: /* res == NULL. */ diff --git a/arch/arm64/mm/dma-mapping.c b/arch/arm64/mm/dma-mapping.c index 0a24b9b..58e0c2b 100644 --- a/arch/arm64/mm/dma-mapping.c +++ b/arch/arm64/mm/dma-mapping.c @@ -348,8 +348,6 @@ static struct dma_map_ops swiotlb_dma_ops = { .mapping_error = swiotlb_dma_mapping_error, }; -extern int swiotlb_late_init_with_default_size(size_t default_size); - static int __init atomic_pool_init(void) { pgprot_t prot = __pgprot(PROT_NORMAL_NC); @@ -411,21 +409,13 @@ out: return -ENOMEM; } -static int __init swiotlb_late_init(void) +static int __init arm64_dma_init(void) { - size_t swiotlb_size = min(SZ_64M, MAX_ORDER_NR_PAGES << PAGE_SHIFT); + int ret; dma_ops = &swiotlb_dma_ops; - return swiotlb_late_init_with_default_size(swiotlb_size); -} - -static int __init arm64_dma_init(void) -{ - int ret = 0; - - ret |= swiotlb_late_init(); - ret |= atomic_pool_init(); + ret = atomic_pool_init(); return ret; } diff --git a/arch/arm64/mm/init.c b/arch/arm64/mm/init.c index 71145f9..ae85da6 100644 --- a/arch/arm64/mm/init.c +++ b/arch/arm64/mm/init.c @@ -33,6 +33,7 @@ #include <linux/dma-mapping.h> #include <linux/dma-contiguous.h> #include <linux/efi.h> +#include <linux/swiotlb.h> #include <asm/fixmap.h> #include <asm/memory.h> @@ -45,6 +46,7 @@ #include "mm.h" phys_addr_t memstart_addr __read_mostly = 0; +phys_addr_t arm64_dma_phys_limit __read_mostly; #ifdef CONFIG_BLK_DEV_INITRD static int __init early_initrd(char *p) @@ -85,7 +87,7 @@ static void __init zone_sizes_init(unsigned long min, unsigned long max) /* 4GB maximum for 32-bit only capable devices */ if (IS_ENABLED(CONFIG_ZONE_DMA)) { - max_dma = PFN_DOWN(max_zone_dma_phys()); + max_dma = PFN_DOWN(arm64_dma_phys_limit); zone_size[ZONE_DMA] = max_dma - min; } zone_size[ZONE_NORMAL] = max - max_dma; @@ -156,8 +158,6 @@ early_param("mem", early_mem); void __init arm64_memblock_init(void) { - phys_addr_t dma_phys_limit = 0; - memblock_enforce_memory_limit(memory_limit); /* @@ -174,8 +174,10 @@ void __init arm64_memblock_init(void) /* 4GB maximum for 32-bit only capable devices */ if (IS_ENABLED(CONFIG_ZONE_DMA)) - dma_phys_limit = max_zone_dma_phys(); - dma_contiguous_reserve(dma_phys_limit); + arm64_dma_phys_limit = max_zone_dma_phys(); + else + arm64_dma_phys_limit = PHYS_MASK + 1; + dma_contiguous_reserve(arm64_dma_phys_limit); memblock_allow_resize(); memblock_dump_all(); @@ -276,6 +278,8 @@ static void __init free_unused_memmap(void) */ void __init mem_init(void) { + swiotlb_init(1); + set_max_mapnr(pfn_to_page(max_pfn) - mem_map); #ifndef CONFIG_SPARSEMEM_VMEMMAP diff --git a/arch/arm64/mm/pageattr.c b/arch/arm64/mm/pageattr.c index bb0ea94..1d3ec3d 100644 --- a/arch/arm64/mm/pageattr.c +++ b/arch/arm64/mm/pageattr.c @@ -51,7 +51,10 @@ static int change_memory_common(unsigned long addr, int numpages, WARN_ON_ONCE(1); } - if (!is_module_address(start) || !is_module_address(end - 1)) + if (start < MODULES_VADDR || start >= MODULES_END) + return -EINVAL; + + if (end < MODULES_VADDR || end >= MODULES_END) return -EINVAL; data.set_mask = set_mask; diff --git a/arch/frv/include/asm/pgtable.h b/arch/frv/include/asm/pgtable.h index 93bcf2a..07d7a7e 100644 --- a/arch/frv/include/asm/pgtable.h +++ b/arch/frv/include/asm/pgtable.h @@ -123,12 +123,14 @@ extern unsigned long empty_zero_page; #define PGDIR_MASK (~(PGDIR_SIZE - 1)) #define PTRS_PER_PGD 64 +#define __PAGETABLE_PUD_FOLDED #define PUD_SHIFT 26 #define PTRS_PER_PUD 1 #define PUD_SIZE (1UL << PUD_SHIFT) #define PUD_MASK (~(PUD_SIZE - 1)) #define PUE_SIZE 256 +#define __PAGETABLE_PMD_FOLDED #define PMD_SHIFT 26 #define PMD_SIZE (1UL << PMD_SHIFT) #define PMD_MASK (~(PMD_SIZE - 1)) diff --git a/arch/m32r/include/asm/pgtable-2level.h b/arch/m32r/include/asm/pgtable-2level.h index 8fd8ee7..421e6ba 100644 --- a/arch/m32r/include/asm/pgtable-2level.h +++ b/arch/m32r/include/asm/pgtable-2level.h @@ -13,6 +13,7 @@ * the M32R is two-level, so we don't really have any * PMD directory physically. */ +#define __PAGETABLE_PMD_FOLDED #define PMD_SHIFT 22 #define PTRS_PER_PMD 1 diff --git a/arch/m68k/include/asm/pgtable_mm.h b/arch/m68k/include/asm/pgtable_mm.h index 28a145b..35ed4a9 100644 --- a/arch/m68k/include/asm/pgtable_mm.h +++ b/arch/m68k/include/asm/pgtable_mm.h @@ -54,10 +54,12 @@ */ #ifdef CONFIG_SUN3 #define PTRS_PER_PTE 16 +#define __PAGETABLE_PMD_FOLDED #define PTRS_PER_PMD 1 #define PTRS_PER_PGD 2048 #elif defined(CONFIG_COLDFIRE) #define PTRS_PER_PTE 512 +#define __PAGETABLE_PMD_FOLDED #define PTRS_PER_PMD 1 #define PTRS_PER_PGD 1024 #else diff --git a/arch/metag/include/asm/processor.h b/arch/metag/include/asm/processor.h index 881071c..13272fd 100644 --- a/arch/metag/include/asm/processor.h +++ b/arch/metag/include/asm/processor.h @@ -149,8 +149,8 @@ extern void exit_thread(void); unsigned long get_wchan(struct task_struct *p); -#define KSTK_EIP(tsk) ((tsk)->thread.kernel_context->CurrPC) -#define KSTK_ESP(tsk) ((tsk)->thread.kernel_context->AX[0].U0) +#define KSTK_EIP(tsk) (task_pt_regs(tsk)->ctx.CurrPC) +#define KSTK_ESP(tsk) (task_pt_regs(tsk)->ctx.AX[0].U0) #define user_stack_pointer(regs) ((regs)->ctx.AX[0].U0) diff --git a/arch/mips/kvm/tlb.c b/arch/mips/kvm/tlb.c index bbcd822..b6beb0e 100644 --- a/arch/mips/kvm/tlb.c +++ b/arch/mips/kvm/tlb.c @@ -216,6 +216,7 @@ int kvm_mips_host_tlb_write(struct kvm_vcpu *vcpu, unsigned long entryhi, if (idx > current_cpu_data.tlbsize) { kvm_err("%s: Invalid Index: %d\n", __func__, idx); kvm_mips_dump_host_tlbs(); + local_irq_restore(flags); return -1; } diff --git a/arch/mips/kvm/trace.h b/arch/mips/kvm/trace.h index c1388d4..bd6437f 100644 --- a/arch/mips/kvm/trace.h +++ b/arch/mips/kvm/trace.h @@ -24,18 +24,18 @@ TRACE_EVENT(kvm_exit, TP_PROTO(struct kvm_vcpu *vcpu, unsigned int reason), TP_ARGS(vcpu, reason), TP_STRUCT__entry( - __field(struct kvm_vcpu *, vcpu) + __field(unsigned long, pc) __field(unsigned int, reason) ), TP_fast_assign( - __entry->vcpu = vcpu; + __entry->pc = vcpu->arch.pc; __entry->reason = reason; ), TP_printk("[%s]PC: 0x%08lx", kvm_mips_exit_types_str[__entry->reason], - __entry->vcpu->arch.pc) + __entry->pc) ); #endif /* _TRACE_KVM_H */ diff --git a/arch/mn10300/include/asm/pgtable.h b/arch/mn10300/include/asm/pgtable.h index afab728..96d3f9d 100644 --- a/arch/mn10300/include/asm/pgtable.h +++ b/arch/mn10300/include/asm/pgtable.h @@ -56,7 +56,9 @@ extern void paging_init(void); #define PGDIR_SHIFT 22 #define PTRS_PER_PGD 1024 #define PTRS_PER_PUD 1 /* we don't really have any PUD physically */ +#define __PAGETABLE_PUD_FOLDED #define PTRS_PER_PMD 1 /* we don't really have any PMD physically */ +#define __PAGETABLE_PMD_FOLDED #define PTRS_PER_PTE 1024 #define PGD_SIZE PAGE_SIZE diff --git a/arch/parisc/include/asm/pgtable.h b/arch/parisc/include/asm/pgtable.h index 8c966b2..15207b9 100644 --- a/arch/parisc/include/asm/pgtable.h +++ b/arch/parisc/include/asm/pgtable.h @@ -96,6 +96,7 @@ extern void purge_tlb_entries(struct mm_struct *, unsigned long); #if PT_NLEVELS == 3 #define BITS_PER_PMD (PAGE_SHIFT + PMD_ORDER - BITS_PER_PMD_ENTRY) #else +#define __PAGETABLE_PMD_FOLDED #define BITS_PER_PMD 0 #endif #define PTRS_PER_PMD (1UL << BITS_PER_PMD) diff --git a/arch/powerpc/include/asm/iommu.h b/arch/powerpc/include/asm/iommu.h index 9cfa370..f1ea597 100644 --- a/arch/powerpc/include/asm/iommu.h +++ b/arch/powerpc/include/asm/iommu.h @@ -113,6 +113,7 @@ extern void iommu_register_group(struct iommu_table *tbl, int pci_domain_number, unsigned long pe_num); extern int iommu_add_device(struct device *dev); extern void iommu_del_device(struct device *dev); +extern int __init tce_iommu_bus_notifier_init(void); #else static inline void iommu_register_group(struct iommu_table *tbl, int pci_domain_number, @@ -128,6 +129,11 @@ static inline int iommu_add_device(struct device *dev) static inline void iommu_del_device(struct device *dev) { } + +static inline int __init tce_iommu_bus_notifier_init(void) +{ + return 0; +} #endif /* !CONFIG_IOMMU_API */ static inline void set_iommu_table_base_and_group(struct device *dev, diff --git a/arch/powerpc/include/asm/irq_work.h b/arch/powerpc/include/asm/irq_work.h new file mode 100644 index 0000000..744fd54 --- /dev/null +++ b/arch/powerpc/include/asm/irq_work.h @@ -0,0 +1,9 @@ +#ifndef _ASM_POWERPC_IRQ_WORK_H +#define _ASM_POWERPC_IRQ_WORK_H + +static inline bool arch_irq_work_has_interrupt(void) +{ + return true; +} + +#endif /* _ASM_POWERPC_IRQ_WORK_H */ diff --git a/arch/powerpc/kernel/iommu.c b/arch/powerpc/kernel/iommu.c index 5d3968c..b054f33 100644 --- a/arch/powerpc/kernel/iommu.c +++ b/arch/powerpc/kernel/iommu.c @@ -1175,4 +1175,30 @@ void iommu_del_device(struct device *dev) } EXPORT_SYMBOL_GPL(iommu_del_device); +static int tce_iommu_bus_notifier(struct notifier_block *nb, + unsigned long action, void *data) +{ + struct device *dev = data; + + switch (action) { + case BUS_NOTIFY_ADD_DEVICE: + return iommu_add_device(dev); + case BUS_NOTIFY_DEL_DEVICE: + if (dev->iommu_group) + iommu_del_device(dev); + return 0; + default: + return 0; + } +} + +static struct notifier_block tce_iommu_bus_nb = { + .notifier_call = tce_iommu_bus_notifier, +}; + +int __init tce_iommu_bus_notifier_init(void) +{ + bus_register_notifier(&pci_bus_type, &tce_iommu_bus_nb); + return 0; +} #endif /* CONFIG_IOMMU_API */ diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c index 6e19afa..ec9ec20 100644 --- a/arch/powerpc/kernel/smp.c +++ b/arch/powerpc/kernel/smp.c @@ -541,8 +541,8 @@ int __cpu_up(unsigned int cpu, struct task_struct *tidle) if (smp_ops->give_timebase) smp_ops->give_timebase(); - /* Wait until cpu puts itself in the online map */ - while (!cpu_online(cpu)) + /* Wait until cpu puts itself in the online & active maps */ + while (!cpu_online(cpu) || !cpu_active(cpu)) cpu_relax(); return 0; diff --git a/arch/powerpc/platforms/powernv/pci.c b/arch/powerpc/platforms/powernv/pci.c index e69142f..54323d6 100644 --- a/arch/powerpc/platforms/powernv/pci.c +++ b/arch/powerpc/platforms/powernv/pci.c @@ -836,30 +836,4 @@ void __init pnv_pci_init(void) #endif } -static int tce_iommu_bus_notifier(struct notifier_block *nb, - unsigned long action, void *data) -{ - struct device *dev = data; - - switch (action) { - case BUS_NOTIFY_ADD_DEVICE: - return iommu_add_device(dev); - case BUS_NOTIFY_DEL_DEVICE: - if (dev->iommu_group) - iommu_del_device(dev); - return 0; - default: - return 0; - } -} - -static struct notifier_block tce_iommu_bus_nb = { - .notifier_call = tce_iommu_bus_notifier, -}; - -static int __init tce_iommu_bus_notifier_init(void) -{ - bus_register_notifier(&pci_bus_type, &tce_iommu_bus_nb); - return 0; -} machine_subsys_initcall_sync(powernv, tce_iommu_bus_notifier_init); diff --git a/arch/powerpc/platforms/pseries/iommu.c b/arch/powerpc/platforms/pseries/iommu.c index 1d3d52d..7803a19 100644 --- a/arch/powerpc/platforms/pseries/iommu.c +++ b/arch/powerpc/platforms/pseries/iommu.c @@ -1340,3 +1340,5 @@ static int __init disable_multitce(char *str) } __setup("multitce=", disable_multitce); + +machine_subsys_initcall_sync(pseries, tce_iommu_bus_notifier_init); diff --git a/arch/s390/include/asm/pgtable.h b/arch/s390/include/asm/pgtable.h index fbb5ee3..e08ec38 100644 --- a/arch/s390/include/asm/pgtable.h +++ b/arch/s390/include/asm/pgtable.h @@ -91,7 +91,9 @@ extern unsigned long zero_page_mask; */ #define PTRS_PER_PTE 256 #ifndef CONFIG_64BIT +#define __PAGETABLE_PUD_FOLDED #define PTRS_PER_PMD 1 +#define __PAGETABLE_PMD_FOLDED #define PTRS_PER_PUD 1 #else /* CONFIG_64BIT */ #define PTRS_PER_PMD 2048 diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index c2fb8a8..b7d31ca 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -499,6 +499,7 @@ config X86_INTEL_QUARK depends on X86_IO_APIC select IOSF_MBI select INTEL_IMR + select COMMON_CLK ---help--- Select to include support for Quark X1000 SoC. Say Y here if you have a Quark based system such as the Arduino diff --git a/arch/x86/include/asm/xsave.h b/arch/x86/include/asm/xsave.h index 5fa9770..c9a6d68 100644 --- a/arch/x86/include/asm/xsave.h +++ b/arch/x86/include/asm/xsave.h @@ -82,18 +82,15 @@ static inline int xsave_state_booting(struct xsave_struct *fx, u64 mask) if (boot_cpu_has(X86_FEATURE_XSAVES)) asm volatile("1:"XSAVES"\n\t" "2:\n\t" - : : "D" (fx), "m" (*fx), "a" (lmask), "d" (hmask) + xstate_fault + : "D" (fx), "m" (*fx), "a" (lmask), "d" (hmask) : "memory"); else asm volatile("1:"XSAVE"\n\t" "2:\n\t" - : : "D" (fx), "m" (*fx), "a" (lmask), "d" (hmask) + xstate_fault + : "D" (fx), "m" (*fx), "a" (lmask), "d" (hmask) : "memory"); - - asm volatile(xstate_fault - : "0" (0) - : "memory"); - return err; } @@ -112,18 +109,15 @@ static inline int xrstor_state_booting(struct xsave_struct *fx, u64 mask) if (boot_cpu_has(X86_FEATURE_XSAVES)) asm volatile("1:"XRSTORS"\n\t" "2:\n\t" - : : "D" (fx), "m" (*fx), "a" (lmask), "d" (hmask) + xstate_fault + : "D" (fx), "m" (*fx), "a" (lmask), "d" (hmask) : "memory"); else asm volatile("1:"XRSTOR"\n\t" "2:\n\t" - : : "D" (fx), "m" (*fx), "a" (lmask), "d" (hmask) + xstate_fault + : "D" (fx), "m" (*fx), "a" (lmask), "d" (hmask) : "memory"); - - asm volatile(xstate_fault - : "0" (0) - : "memory"); - return err; } @@ -149,9 +143,9 @@ static inline int xsave_state(struct xsave_struct *fx, u64 mask) */ alternative_input_2( "1:"XSAVE, - "1:"XSAVEOPT, + XSAVEOPT, X86_FEATURE_XSAVEOPT, - "1:"XSAVES, + XSAVES, X86_FEATURE_XSAVES, [fx] "D" (fx), "a" (lmask), "d" (hmask) : "memory"); @@ -178,7 +172,7 @@ static inline int xrstor_state(struct xsave_struct *fx, u64 mask) */ alternative_input( "1: " XRSTOR, - "1: " XRSTORS, + XRSTORS, X86_FEATURE_XSAVES, "D" (fx), "m" (*fx), "a" (lmask), "d" (hmask) : "memory"); diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c index b5c8ff5..2346c95 100644 --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c @@ -1396,6 +1396,12 @@ void cpu_init(void) wait_for_master_cpu(cpu); + /* + * Initialize the CR4 shadow before doing anything that could + * try to read it. + */ + cr4_init_shadow(); + show_ucode_info_early(); printk(KERN_INFO "Initializing CPU#%d\n", cpu); diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c index 94d7dcb..50163fa 100644 --- a/arch/x86/kernel/cpu/intel.c +++ b/arch/x86/kernel/cpu/intel.c @@ -565,8 +565,8 @@ static const struct _tlb_table intel_tlb_table[] = { { 0xb2, TLB_INST_4K, 64, " TLB_INST 4KByte pages, 4-way set associative" }, { 0xb3, TLB_DATA_4K, 128, " TLB_DATA 4 KByte pages, 4-way set associative" }, { 0xb4, TLB_DATA_4K, 256, " TLB_DATA 4 KByte pages, 4-way associative" }, - { 0xb5, TLB_INST_4K, 64, " TLB_INST 4 KByte pages, 8-way set ssociative" }, - { 0xb6, TLB_INST_4K, 128, " TLB_INST 4 KByte pages, 8-way set ssociative" }, + { 0xb5, TLB_INST_4K, 64, " TLB_INST 4 KByte pages, 8-way set associative" }, + { 0xb6, TLB_INST_4K, 128, " TLB_INST 4 KByte pages, 8-way set associative" }, { 0xba, TLB_DATA_4K, 64, " TLB_DATA 4 KByte pages, 4-way associative" }, { 0xc0, TLB_DATA_4K_4M, 8, " TLB_DATA 4 KByte and 4 MByte pages, 4-way associative" }, { 0xc1, STLB_4K_2M, 1024, " STLB 4 KByte and 2 MByte pages, 8-way associative" }, diff --git a/arch/x86/kernel/entry_32.S b/arch/x86/kernel/entry_32.S index 000d419..31e2d5b 100644 --- a/arch/x86/kernel/entry_32.S +++ b/arch/x86/kernel/entry_32.S @@ -982,6 +982,9 @@ ENTRY(xen_hypervisor_callback) ENTRY(xen_do_upcall) 1: mov %esp, %eax call xen_evtchn_do_upcall +#ifndef CONFIG_PREEMPT + call xen_maybe_preempt_hcall +#endif jmp ret_from_intr CFI_ENDPROC ENDPROC(xen_hypervisor_callback) diff --git a/arch/x86/kernel/entry_64.S b/arch/x86/kernel/entry_64.S index db13655..1d74d16 100644 --- a/arch/x86/kernel/entry_64.S +++ b/arch/x86/kernel/entry_64.S @@ -269,11 +269,14 @@ ENTRY(ret_from_fork) testl $3, CS-ARGOFFSET(%rsp) # from kernel_thread? jz 1f - testl $_TIF_IA32, TI_flags(%rcx) # 32-bit compat task needs IRET - jnz int_ret_from_sys_call - - RESTORE_TOP_OF_STACK %rdi, -ARGOFFSET - jmp ret_from_sys_call # go to the SYSRET fastpath + /* + * By the time we get here, we have no idea whether our pt_regs, + * ti flags, and ti status came from the 64-bit SYSCALL fast path, + * the slow path, or one of the ia32entry paths. + * Use int_ret_from_sys_call to return, since it can safely handle + * all of the above. + */ + jmp int_ret_from_sys_call 1: subq $REST_SKIP, %rsp # leave space for volatiles @@ -1208,6 +1211,9 @@ ENTRY(xen_do_hypervisor_callback) # do_hypervisor_callback(struct *pt_regs) popq %rsp CFI_DEF_CFA_REGISTER rsp decl PER_CPU_VAR(irq_count) +#ifndef CONFIG_PREEMPT + call xen_maybe_preempt_hcall +#endif jmp error_exit CFI_ENDPROC END(xen_do_hypervisor_callback) diff --git a/arch/x86/kernel/kprobes/core.c b/arch/x86/kernel/kprobes/core.c index 6a1146e..4e3d5a9 100644 --- a/arch/x86/kernel/kprobes/core.c +++ b/arch/x86/kernel/kprobes/core.c @@ -223,27 +223,48 @@ static unsigned long __recover_probed_insn(kprobe_opcode_t *buf, unsigned long addr) { struct kprobe *kp; + unsigned long faddr; kp = get_kprobe((void *)addr); - /* There is no probe, return original address */ - if (!kp) + faddr = ftrace_location(addr); + /* + * Addresses inside the ftrace location are refused by + * arch_check_ftrace_location(). Something went terribly wrong + * if such an address is checked here. + */ + if (WARN_ON(faddr && faddr != addr)) + return 0UL; + /* + * Use the current code if it is not modified by Kprobe + * and it cannot be modified by ftrace. + */ + if (!kp && !faddr) return addr; /* - * Basically, kp->ainsn.insn has an original instruction. - * However, RIP-relative instruction can not do single-stepping - * at different place, __copy_instruction() tweaks the displacement of - * that instruction. In that case, we can't recover the instruction - * from the kp->ainsn.insn. + * Basically, kp->ainsn.insn has an original instruction. + * However, RIP-relative instruction can not do single-stepping + * at different place, __copy_instruction() tweaks the displacement of + * that instruction. In that case, we can't recover the instruction + * from the kp->ainsn.insn. * - * On the other hand, kp->opcode has a copy of the first byte of - * the probed instruction, which is overwritten by int3. And - * the instruction at kp->addr is not modified by kprobes except - * for the first byte, we can recover the original instruction - * from it and kp->opcode. + * On the other hand, in case on normal Kprobe, kp->opcode has a copy + * of the first byte of the probed instruction, which is overwritten + * by int3. And the instruction at kp->addr is not modified by kprobes + * except for the first byte, we can recover the original instruction + * from it and kp->opcode. + * + * In case of Kprobes using ftrace, we do not have a copy of + * the original instruction. In fact, the ftrace location might + * be modified at anytime and even could be in an inconsistent state. + * Fortunately, we know that the original code is the ideal 5-byte + * long NOP. */ - memcpy(buf, kp->addr, MAX_INSN_SIZE * sizeof(kprobe_opcode_t)); - buf[0] = kp->opcode; + memcpy(buf, (void *)addr, MAX_INSN_SIZE * sizeof(kprobe_opcode_t)); + if (faddr) + memcpy(buf, ideal_nops[NOP_ATOMIC5], 5); + else + buf[0] = kp->opcode; return (unsigned long)buf; } @@ -251,6 +272,7 @@ __recover_probed_insn(kprobe_opcode_t *buf, unsigned long addr) * Recover the probed instruction at addr for further analysis. * Caller must lock kprobes by kprobe_mutex, or disable preemption * for preventing to release referencing kprobes. + * Returns zero if the instruction can not get recovered. */ unsigned long recover_probed_instruction(kprobe_opcode_t *buf, unsigned long addr) { @@ -285,6 +307,8 @@ static int can_probe(unsigned long paddr) * normally used, we just go through if there is no kprobe. */ __addr = recover_probed_instruction(buf, addr); + if (!__addr) + return 0; kernel_insn_init(&insn, (void *)__addr, MAX_INSN_SIZE); insn_get_length(&insn); @@ -333,6 +357,8 @@ int __copy_instruction(u8 *dest, u8 *src) unsigned long recovered_insn = recover_probed_instruction(buf, (unsigned long)src); + if (!recovered_insn) + return 0; kernel_insn_init(&insn, (void *)recovered_insn, MAX_INSN_SIZE); insn_get_length(&insn); /* Another subsystem puts a breakpoint, failed to recover */ diff --git a/arch/x86/kernel/kprobes/opt.c b/arch/x86/kernel/kprobes/opt.c index 0dd8d08..7b3b9d1 100644 --- a/arch/x86/kernel/kprobes/opt.c +++ b/arch/x86/kernel/kprobes/opt.c @@ -259,6 +259,8 @@ static int can_optimize(unsigned long paddr) */ return 0; recovered_insn = recover_probed_instruction(buf, addr); + if (!recovered_insn) + return 0; kernel_insn_init(&insn, (void *)recovered_insn, MAX_INSN_SIZE); insn_get_length(&insn); /* Another subsystem puts a breakpoint */ diff --git a/arch/x86/kvm/emulate.c b/arch/x86/kvm/emulate.c index e0b794a..106c015 100644 --- a/arch/x86/kvm/emulate.c +++ b/arch/x86/kvm/emulate.c @@ -4950,7 +4950,8 @@ int x86_emulate_insn(struct x86_emulate_ctxt *ctxt) goto done; } } - ctxt->dst.orig_val = ctxt->dst.val; + /* Copy full 64-bit value for CMPXCHG8B. */ + ctxt->dst.orig_val64 = ctxt->dst.val64; special_insn: diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c index e55b5fc..bd4e34d 100644 --- a/arch/x86/kvm/lapic.c +++ b/arch/x86/kvm/lapic.c @@ -1572,7 +1572,7 @@ void kvm_lapic_reset(struct kvm_vcpu *vcpu) apic_set_reg(apic, APIC_TMR + 0x10 * i, 0); } apic->irr_pending = kvm_apic_vid_enabled(vcpu->kvm); - apic->isr_count = kvm_apic_vid_enabled(vcpu->kvm); + apic->isr_count = kvm_x86_ops->hwapic_isr_update ? 1 : 0; apic->highest_isr_cache = -1; update_divide_count(apic); atomic_set(&apic->lapic_timer.pending, 0); @@ -1782,7 +1782,7 @@ void kvm_apic_post_state_restore(struct kvm_vcpu *vcpu, update_divide_count(apic); start_apic_timer(apic); apic->irr_pending = true; - apic->isr_count = kvm_apic_vid_enabled(vcpu->kvm) ? + apic->isr_count = kvm_x86_ops->hwapic_isr_update ? 1 : count_vectors(apic->regs + APIC_ISR); apic->highest_isr_cache = -1; if (kvm_x86_ops->hwapic_irr_update) diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c index d319e0c..cc618c8 100644 --- a/arch/x86/kvm/svm.c +++ b/arch/x86/kvm/svm.c @@ -3649,11 +3649,6 @@ static void svm_load_eoi_exitmap(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap) return; } -static void svm_hwapic_isr_update(struct kvm *kvm, int isr) -{ - return; -} - static void svm_sync_pir_to_irr(struct kvm_vcpu *vcpu) { return; @@ -4403,7 +4398,6 @@ static struct kvm_x86_ops svm_x86_ops = { .set_virtual_x2apic_mode = svm_set_virtual_x2apic_mode, .vm_has_apicv = svm_vm_has_apicv, .load_eoi_exitmap = svm_load_eoi_exitmap, - .hwapic_isr_update = svm_hwapic_isr_update, .sync_pir_to_irr = svm_sync_pir_to_irr, .set_tss_addr = svm_set_tss_addr, diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c index 14c1a18..f7b20b4 100644 --- a/arch/x86/kvm/vmx.c +++ b/arch/x86/kvm/vmx.c @@ -4367,6 +4367,18 @@ static int vmx_complete_nested_posted_interrupt(struct kvm_vcpu *vcpu) return 0; } +static inline bool kvm_vcpu_trigger_posted_interrupt(struct kvm_vcpu *vcpu) +{ +#ifdef CONFIG_SMP + if (vcpu->mode == IN_GUEST_MODE) { + apic->send_IPI_mask(get_cpu_mask(vcpu->cpu), + POSTED_INTR_VECTOR); + return true; + } +#endif + return false; +} + static int vmx_deliver_nested_posted_interrupt(struct kvm_vcpu *vcpu, int vector) { @@ -4375,9 +4387,7 @@ static int vmx_deliver_nested_posted_interrupt(struct kvm_vcpu *vcpu, if (is_guest_mode(vcpu) && vector == vmx->nested.posted_intr_nv) { /* the PIR and ON have been set by L1. */ - if (vcpu->mode == IN_GUEST_MODE) - apic->send_IPI_mask(get_cpu_mask(vcpu->cpu), - POSTED_INTR_VECTOR); + kvm_vcpu_trigger_posted_interrupt(vcpu); /* * If a posted intr is not recognized by hardware, * we will accomplish it in the next vmentry. @@ -4409,12 +4419,7 @@ static void vmx_deliver_posted_interrupt(struct kvm_vcpu *vcpu, int vector) r = pi_test_and_set_on(&vmx->pi_desc); kvm_make_request(KVM_REQ_EVENT, vcpu); -#ifdef CONFIG_SMP - if (!r && (vcpu->mode == IN_GUEST_MODE)) - apic->send_IPI_mask(get_cpu_mask(vcpu->cpu), - POSTED_INTR_VECTOR); - else -#endif + if (r || !kvm_vcpu_trigger_posted_interrupt(vcpu)) kvm_vcpu_kick(vcpu); } diff --git a/arch/x86/lguest/Kconfig b/arch/x86/lguest/Kconfig index 4a0890f8..08f41ca 100644 --- a/arch/x86/lguest/Kconfig +++ b/arch/x86/lguest/Kconfig @@ -1,6 +1,6 @@ config LGUEST_GUEST bool "Lguest guest support" - depends on X86_32 && PARAVIRT + depends on X86_32 && PARAVIRT && PCI select TTY select VIRTUALIZATION select VIRTIO @@ -8,7 +8,7 @@ config LGUEST_GUEST help Lguest is a tiny in-kernel hypervisor. Selecting this will allow your kernel to boot under lguest. This option will increase - your kernel size by about 6k. If in doubt, say N. + your kernel size by about 10k. If in doubt, say N. If you say Y here, make sure you say Y (or M) to the virtio block and net drivers which lguest needs. diff --git a/arch/x86/pci/acpi.c b/arch/x86/pci/acpi.c index 6ac2738..e469598 100644 --- a/arch/x86/pci/acpi.c +++ b/arch/x86/pci/acpi.c @@ -331,7 +331,7 @@ static void probe_pci_root_info(struct pci_root_info *info, struct list_head *list) { int ret; - struct resource_entry *entry; + struct resource_entry *entry, *tmp; sprintf(info->name, "PCI Bus %04x:%02x", domain, busnum); info->bridge = device; @@ -345,8 +345,13 @@ static void probe_pci_root_info(struct pci_root_info *info, dev_dbg(&device->dev, "no IO and memory resources present in _CRS\n"); else - resource_list_for_each_entry(entry, list) - entry->res->name = info->name; + resource_list_for_each_entry_safe(entry, tmp, list) { + if ((entry->res->flags & IORESOURCE_WINDOW) == 0 || + (entry->res->flags & IORESOURCE_DISABLED)) + resource_list_destroy_entry(entry); + else + entry->res->name = info->name; + } } struct pci_bus *pci_acpi_scan_root(struct acpi_pci_root *root) diff --git a/arch/x86/platform/intel-mid/intel-mid.c b/arch/x86/platform/intel-mid/intel-mid.c index 1bbedc4..3005f0c 100644 --- a/arch/x86/platform/intel-mid/intel-mid.c +++ b/arch/x86/platform/intel-mid/intel-mid.c @@ -130,7 +130,7 @@ static void intel_mid_arch_setup(void) intel_mid_ops = get_intel_mid_ops[__intel_mid_cpu_chip](); else { intel_mid_ops = get_intel_mid_ops[INTEL_MID_CPU_CHIP_PENWELL](); - pr_info("ARCH: Uknown SoC, assuming PENWELL!\n"); + pr_info("ARCH: Unknown SoC, assuming PENWELL!\n"); } out: diff --git a/arch/x86/xen/enlighten.c b/arch/x86/xen/enlighten.c index bd8b845..5240f56 100644 --- a/arch/x86/xen/enlighten.c +++ b/arch/x86/xen/enlighten.c @@ -1070,6 +1070,23 @@ static inline void xen_write_cr8(unsigned long val) BUG_ON(val); } #endif + +static u64 xen_read_msr_safe(unsigned int msr, int *err) +{ + u64 val; + + val = native_read_msr_safe(msr, err); + switch (msr) { + case MSR_IA32_APICBASE: +#ifdef CONFIG_X86_X2APIC + if (!(cpuid_ecx(1) & (1 << (X86_FEATURE_X2APIC & 31)))) +#endif + val &= ~X2APIC_ENABLE; + break; + } + return val; +} + static int xen_write_msr_safe(unsigned int msr, unsigned low, unsigned high) { int ret; @@ -1240,7 +1257,7 @@ static const struct pv_cpu_ops xen_cpu_ops __initconst = { .wbinvd = native_wbinvd, - .read_msr = native_read_msr_safe, + .read_msr = xen_read_msr_safe, .write_msr = xen_write_msr_safe, .read_tsc = native_read_tsc, @@ -1741,6 +1758,7 @@ asmlinkage __visible void __init xen_start_kernel(void) #ifdef CONFIG_X86_32 i386_start_kernel(); #else + cr4_init_shadow(); /* 32b kernel does this in i386_start_kernel() */ x86_64_start_reservations((char *)__pa_symbol(&boot_params)); #endif } |
