diff options
Diffstat (limited to 'arch')
522 files changed, 9850 insertions, 8045 deletions
diff --git a/arch/alpha/include/asm/bitops.h b/arch/alpha/include/asm/bitops.h index adfab8a..85b8152 100644 --- a/arch/alpha/include/asm/bitops.h +++ b/arch/alpha/include/asm/bitops.h @@ -454,13 +454,11 @@ sched_find_first_bit(const unsigned long b[2]) return __ffs(tmp) + ofs; } -#include <asm-generic/bitops/ext2-non-atomic.h> +#include <asm-generic/bitops/le.h> #define ext2_set_bit_atomic(l,n,a) test_and_set_bit(n,a) #define ext2_clear_bit_atomic(l,n,a) test_and_clear_bit(n,a) -#include <asm-generic/bitops/minix.h> - #endif /* __KERNEL__ */ #endif /* _ALPHA_BITOPS_H */ diff --git a/arch/alpha/include/asm/types.h b/arch/alpha/include/asm/types.h index bd621ec..8815443 100644 --- a/arch/alpha/include/asm/types.h +++ b/arch/alpha/include/asm/types.h @@ -20,16 +20,4 @@ typedef unsigned int umode_t; #endif /* __ASSEMBLY__ */ - -/* - * These aren't exported outside the kernel to avoid name space clashes - */ -#ifdef __KERNEL__ -#ifndef __ASSEMBLY__ - -typedef u64 dma_addr_t; -typedef u64 dma64_addr_t; - -#endif /* __ASSEMBLY__ */ -#endif /* __KERNEL__ */ #endif /* _ALPHA_TYPES_H */ diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 599e163..93d595a 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -235,6 +235,7 @@ config ARCH_INTEGRATOR select ICST select GENERIC_CLOCKEVENTS select PLAT_VERSATILE + select PLAT_VERSATILE_FPGA_IRQ help Support for ARM's Integrator platform. @@ -242,11 +243,11 @@ config ARCH_REALVIEW bool "ARM Ltd. RealView family" select ARM_AMBA select CLKDEV_LOOKUP - select HAVE_SCHED_CLOCK select ICST select GENERIC_CLOCKEVENTS select ARCH_WANT_OPTIONAL_GPIOLIB select PLAT_VERSATILE + select PLAT_VERSATILE_CLCD select ARM_TIMER_SP804 select GPIO_PL061 if GPIOLIB help @@ -257,11 +258,12 @@ config ARCH_VERSATILE select ARM_AMBA select ARM_VIC select CLKDEV_LOOKUP - select HAVE_SCHED_CLOCK select ICST select GENERIC_CLOCKEVENTS select ARCH_WANT_OPTIONAL_GPIOLIB select PLAT_VERSATILE + select PLAT_VERSATILE_CLCD + select PLAT_VERSATILE_FPGA_IRQ select ARM_TIMER_SP804 help This enables support for ARM Ltd Versatile board. @@ -274,9 +276,10 @@ config ARCH_VEXPRESS select CLKDEV_LOOKUP select GENERIC_CLOCKEVENTS select HAVE_CLK - select HAVE_SCHED_CLOCK + select HAVE_PATA_PLATFORM select ICST select PLAT_VERSATILE + select PLAT_VERSATILE_CLCD help This enables support for the ARM Ltd Versatile Express boards. @@ -1011,6 +1014,7 @@ source "arch/arm/mach-ux500/Kconfig" source "arch/arm/mach-versatile/Kconfig" source "arch/arm/mach-vexpress/Kconfig" +source "arch/arm/plat-versatile/Kconfig" source "arch/arm/mach-vt8500/Kconfig" diff --git a/arch/arm/boot/compressed/Makefile b/arch/arm/boot/compressed/Makefile index f9f77c6..8ebbb51 100644 --- a/arch/arm/boot/compressed/Makefile +++ b/arch/arm/boot/compressed/Makefile @@ -95,8 +95,8 @@ ORIG_CFLAGS := $(KBUILD_CFLAGS) KBUILD_CFLAGS = $(subst -pg, , $(ORIG_CFLAGS)) endif -EXTRA_CFLAGS := -fpic -fno-builtin -EXTRA_AFLAGS := -Wa,-march=all +ccflags-y := -fpic -fno-builtin +asflags-y := -Wa,-march=all # Provide size of uncompressed kernel to the decompressor via a linker symbol. LDFLAGS_vmlinux = --defsym _image_size=$(shell stat -c "%s" $(obj)/../Image) diff --git a/arch/arm/boot/compressed/mmcif-sh7372.c b/arch/arm/boot/compressed/mmcif-sh7372.c index e6180af..7453c83 100644 --- a/arch/arm/boot/compressed/mmcif-sh7372.c +++ b/arch/arm/boot/compressed/mmcif-sh7372.c @@ -10,7 +10,8 @@ */ #include <linux/mmc/sh_mmcif.h> -#include <mach/mmcif.h> +#include <linux/mmc/boot.h> +#include <mach/mmc.h> #define MMCIF_BASE (void __iomem *)0xe6bd0000 @@ -41,8 +42,8 @@ */ asmlinkage void mmcif_loader(unsigned char *buf, unsigned long len) { - mmcif_init_progress(); - mmcif_update_progress(MMCIF_PROGRESS_ENTER); + mmc_init_progress(); + mmc_update_progress(MMC_PROGRESS_ENTER); /* Initialise MMC * registers: PORT84CR-PORT92CR @@ -68,12 +69,12 @@ asmlinkage void mmcif_loader(unsigned char *buf, unsigned long len) /* Enable clock to MMC hardware block */ __raw_writel(__raw_readl(SMSTPCR3) & ~(1 << 12), SMSTPCR3); - mmcif_update_progress(MMCIF_PROGRESS_INIT); + mmc_update_progress(MMC_PROGRESS_INIT); /* setup MMCIF hardware */ sh_mmcif_boot_init(MMCIF_BASE); - mmcif_update_progress(MMCIF_PROGRESS_LOAD); + mmc_update_progress(MMC_PROGRESS_LOAD); /* load kernel via MMCIF interface */ sh_mmcif_boot_do_read(MMCIF_BASE, 2, /* Kernel is at block 2 */ @@ -83,5 +84,5 @@ asmlinkage void mmcif_loader(unsigned char *buf, unsigned long len) /* Disable clock to MMC hardware block */ __raw_writel(__raw_readl(SMSTPCR3) & (1 << 12), SMSTPCR3); - mmcif_update_progress(MMCIF_PROGRESS_DONE); + mmc_update_progress(MMC_PROGRESS_DONE); } diff --git a/arch/arm/configs/omap2plus_defconfig b/arch/arm/configs/omap2plus_defconfig index 019fb7c..076db52 100644 --- a/arch/arm/configs/omap2plus_defconfig +++ b/arch/arm/configs/omap2plus_defconfig @@ -193,6 +193,17 @@ CONFIG_FIRMWARE_EDID=y CONFIG_FB_MODE_HELPERS=y CONFIG_FB_TILEBLITTING=y CONFIG_FB_OMAP_LCD_VGA=y +CONFIG_OMAP2_DSS=m +CONFIG_OMAP2_DSS_RFBI=y +CONFIG_OMAP2_DSS_SDI=y +CONFIG_OMAP2_DSS_DSI=y +CONFIG_FB_OMAP2=m +CONFIG_PANEL_GENERIC_DPI=m +CONFIG_PANEL_SHARP_LS037V7DW01=m +CONFIG_PANEL_NEC_NL8048HL11_01B=m +CONFIG_PANEL_TAAL=m +CONFIG_PANEL_TPO_TD043MTEA1=m +CONFIG_PANEL_ACX565AKM=m CONFIG_BACKLIGHT_LCD_SUPPORT=y CONFIG_LCD_CLASS_DEVICE=y CONFIG_LCD_PLATFORM=y diff --git a/arch/arm/configs/tegra_defconfig b/arch/arm/configs/tegra_defconfig index 7a9267e..8845f1c 100644 --- a/arch/arm/configs/tegra_defconfig +++ b/arch/arm/configs/tegra_defconfig @@ -21,6 +21,10 @@ CONFIG_MODULE_FORCE_UNLOAD=y # CONFIG_IOSCHED_CFQ is not set CONFIG_ARCH_TEGRA=y CONFIG_MACH_HARMONY=y +CONFIG_MACH_KAEN=y +CONFIG_MACH_PAZ00=y +CONFIG_MACH_TRIMSLICE=y +CONFIG_MACH_WARIO=y CONFIG_TEGRA_DEBUG_UARTD=y CONFIG_ARM_ERRATA_742230=y CONFIG_NO_HZ=y @@ -40,6 +44,10 @@ CONFIG_PACKET=y CONFIG_UNIX=y CONFIG_NET_KEY=y CONFIG_INET=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +CONFIG_IP_PNP_RARP=y CONFIG_INET_ESP=y # CONFIG_INET_XFRM_MODE_TUNNEL is not set # CONFIG_INET_XFRM_MODE_BEET is not set @@ -66,7 +74,7 @@ CONFIG_APDS9802ALS=y CONFIG_ISL29003=y CONFIG_NETDEVICES=y CONFIG_DUMMY=y -# CONFIG_NETDEV_1000 is not set +CONFIG_R8169=y # CONFIG_NETDEV_10000 is not set # CONFIG_WLAN is not set # CONFIG_INPUT is not set @@ -78,12 +86,23 @@ CONFIG_SERIAL_8250_CONSOLE=y # CONFIG_LEGACY_PTYS is not set # CONFIG_HW_RANDOM is not set CONFIG_I2C=y -# CONFIG_HWMON is not set -# CONFIG_MFD_SUPPORT is not set +# CONFIG_I2C_COMPAT is not set +# CONFIG_I2C_HELPER_AUTO is not set +CONFIG_I2C_TEGRA=y +CONFIG_SENSORS_LM90=y +CONFIG_MFD_TPS6586X=y +CONFIG_REGULATOR=y +CONFIG_REGULATOR_TPS6586X=y # CONFIG_USB_SUPPORT is not set CONFIG_MMC=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_PLTFM=y +CONFIG_MMC_SDHCI_TEGRA=y +CONFIG_STAGING=y +# CONFIG_STAGING_EXCLUDE_BUILD is not set +CONFIG_IIO=y +CONFIG_SENSORS_ISL29018=y +CONFIG_SENSORS_AK8975=y CONFIG_EXT2_FS=y CONFIG_EXT2_FS_XATTR=y CONFIG_EXT2_FS_POSIX_ACL=y @@ -95,6 +114,10 @@ CONFIG_EXT3_FS_SECURITY=y # CONFIG_DNOTIFY is not set CONFIG_VFAT_FS=y CONFIG_TMPFS=y +CONFIG_NFS_FS=y +CONFIG_ROOT_NFS=y +CONFIG_PARTITION_ADVANCED=y +CONFIG_EFI_PARTITION=y CONFIG_NLS_CODEPAGE_437=y CONFIG_NLS_ISO8859_1=y CONFIG_PRINTK_TIME=y diff --git a/arch/arm/include/asm/bitops.h b/arch/arm/include/asm/bitops.h index af54ed1..6b7403f 100644 --- a/arch/arm/include/asm/bitops.h +++ b/arch/arm/include/asm/bitops.h @@ -287,41 +287,63 @@ static inline int fls(int x) #include <asm-generic/bitops/hweight.h> #include <asm-generic/bitops/lock.h> -/* - * Ext2 is defined to use little-endian byte ordering. - * These do not need to be atomic. - */ -#define ext2_set_bit(nr,p) \ - __test_and_set_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p)) -#define ext2_set_bit_atomic(lock,nr,p) \ - test_and_set_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p)) -#define ext2_clear_bit(nr,p) \ - __test_and_clear_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p)) -#define ext2_clear_bit_atomic(lock,nr,p) \ - test_and_clear_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p)) -#define ext2_test_bit(nr,p) \ - test_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p)) -#define ext2_find_first_zero_bit(p,sz) \ - _find_first_zero_bit_le(p,sz) -#define ext2_find_next_zero_bit(p,sz,off) \ - _find_next_zero_bit_le(p,sz,off) -#define ext2_find_next_bit(p, sz, off) \ - _find_next_bit_le(p, sz, off) +static inline void __set_bit_le(int nr, void *addr) +{ + __set_bit(WORD_BITOFF_TO_LE(nr), addr); +} + +static inline void __clear_bit_le(int nr, void *addr) +{ + __clear_bit(WORD_BITOFF_TO_LE(nr), addr); +} + +static inline int __test_and_set_bit_le(int nr, void *addr) +{ + return __test_and_set_bit(WORD_BITOFF_TO_LE(nr), addr); +} + +static inline int test_and_set_bit_le(int nr, void *addr) +{ + return test_and_set_bit(WORD_BITOFF_TO_LE(nr), addr); +} + +static inline int __test_and_clear_bit_le(int nr, void *addr) +{ + return __test_and_clear_bit(WORD_BITOFF_TO_LE(nr), addr); +} + +static inline int test_and_clear_bit_le(int nr, void *addr) +{ + return test_and_clear_bit(WORD_BITOFF_TO_LE(nr), addr); +} + +static inline int test_bit_le(int nr, const void *addr) +{ + return test_bit(WORD_BITOFF_TO_LE(nr), addr); +} + +static inline int find_first_zero_bit_le(const void *p, unsigned size) +{ + return _find_first_zero_bit_le(p, size); +} + +static inline int find_next_zero_bit_le(const void *p, int size, int offset) +{ + return _find_next_zero_bit_le(p, size, offset); +} + +static inline int find_next_bit_le(const void *p, int size, int offset) +{ + return _find_next_bit_le(p, size, offset); +} /* - * Minix is defined to use little-endian byte ordering. - * These do not need to be atomic. + * Ext2 is defined to use little-endian byte ordering. */ -#define minix_set_bit(nr,p) \ - __set_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p)) -#define minix_test_bit(nr,p) \ - test_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p)) -#define minix_test_and_set_bit(nr,p) \ - __test_and_set_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p)) -#define minix_test_and_clear_bit(nr,p) \ - __test_and_clear_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p)) -#define minix_find_first_zero_bit(p,sz) \ - _find_first_zero_bit_le(p,sz) +#define ext2_set_bit_atomic(lock, nr, p) \ + test_and_set_bit_le(nr, p) +#define ext2_clear_bit_atomic(lock, nr, p) \ + test_and_clear_bit_le(nr, p) #endif /* __KERNEL__ */ diff --git a/arch/arm/include/asm/localtimer.h b/arch/arm/include/asm/localtimer.h index 6bc63ab..080d74f 100644 --- a/arch/arm/include/asm/localtimer.h +++ b/arch/arm/include/asm/localtimer.h @@ -44,8 +44,14 @@ int local_timer_ack(void); /* * Setup a local timer interrupt for a CPU. */ -void local_timer_setup(struct clock_event_device *); +int local_timer_setup(struct clock_event_device *); +#else + +static inline int local_timer_setup(struct clock_event_device *evt) +{ + return -ENXIO; +} #endif #endif diff --git a/arch/arm/include/asm/outercache.h b/arch/arm/include/asm/outercache.h index 348d513..d838743 100644 --- a/arch/arm/include/asm/outercache.h +++ b/arch/arm/include/asm/outercache.h @@ -21,6 +21,8 @@ #ifndef __ASM_OUTERCACHE_H #define __ASM_OUTERCACHE_H +#include <linux/types.h> + struct outer_cache_fns { void (*inv_range)(unsigned long, unsigned long); void (*clean_range)(unsigned long, unsigned long); @@ -38,17 +40,17 @@ struct outer_cache_fns { extern struct outer_cache_fns outer_cache; -static inline void outer_inv_range(unsigned long start, unsigned long end) +static inline void outer_inv_range(phys_addr_t start, phys_addr_t end) { if (outer_cache.inv_range) outer_cache.inv_range(start, end); } -static inline void outer_clean_range(unsigned long start, unsigned long end) +static inline void outer_clean_range(phys_addr_t start, phys_addr_t end) { if (outer_cache.clean_range) outer_cache.clean_range(start, end); } -static inline void outer_flush_range(unsigned long start, unsigned long end) +static inline void outer_flush_range(phys_addr_t start, phys_addr_t end) { if (outer_cache.flush_range) outer_cache.flush_range(start, end); @@ -74,11 +76,11 @@ static inline void outer_disable(void) #else -static inline void outer_inv_range(unsigned long start, unsigned long end) +static inline void outer_inv_range(phys_addr_t start, phys_addr_t end) { } -static inline void outer_clean_range(unsigned long start, unsigned long end) +static inline void outer_clean_range(phys_addr_t start, phys_addr_t end) { } -static inline void outer_flush_range(unsigned long start, unsigned long end) +static inline void outer_flush_range(phys_addr_t start, phys_addr_t end) { } static inline void outer_flush_all(void) { } static inline void outer_inv_all(void) { } diff --git a/arch/arm/include/asm/pgtable.h b/arch/arm/include/asm/pgtable.h index ebcb643..5750704 100644 --- a/arch/arm/include/asm/pgtable.h +++ b/arch/arm/include/asm/pgtable.h @@ -301,6 +301,7 @@ extern pgd_t swapper_pg_dir[PTRS_PER_PGD]; #define pgd_present(pgd) (1) #define pgd_clear(pgdp) do { } while (0) #define set_pgd(pgd,pgdp) do { } while (0) +#define set_pud(pud,pudp) do { } while (0) /* Find an entry in the second-level page table.. */ @@ -351,7 +352,7 @@ static inline pte_t *pmd_page_vaddr(pmd_t pmd) #define pte_unmap(pte) __pte_unmap(pte) #define pte_pfn(pte) (pte_val(pte) >> PAGE_SHIFT) -#define pfn_pte(pfn,prot) __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot)) +#define pfn_pte(pfn,prot) __pte(__pfn_to_phys(pfn) | pgprot_val(prot)) #define pte_page(pte) pfn_to_page(pte_pfn(pte)) #define mk_pte(page,prot) pfn_pte(page_to_pfn(page), prot) diff --git a/arch/arm/include/asm/setup.h b/arch/arm/include/asm/setup.h index da8b52e..95176af 100644 --- a/arch/arm/include/asm/setup.h +++ b/arch/arm/include/asm/setup.h @@ -195,7 +195,7 @@ static struct tagtable __tagtable_##fn __tag = { tag, fn } #define NR_BANKS 8 struct membank { - unsigned long start; + phys_addr_t start; unsigned long size; unsigned int highmem; }; diff --git a/arch/arm/include/asm/types.h b/arch/arm/include/asm/types.h index 345df01..48192ac 100644 --- a/arch/arm/include/asm/types.h +++ b/arch/arm/include/asm/types.h @@ -16,15 +16,6 @@ typedef unsigned short umode_t; #define BITS_PER_LONG 32 -#ifndef __ASSEMBLY__ - -/* Dma addresses are 32-bits wide. */ - -typedef u32 dma_addr_t; -typedef u32 dma64_addr_t; - -#endif /* __ASSEMBLY__ */ - #endif /* __KERNEL__ */ #endif diff --git a/arch/arm/kernel/crash_dump.c b/arch/arm/kernel/crash_dump.c index cd3b853..90c50d4 100644 --- a/arch/arm/kernel/crash_dump.c +++ b/arch/arm/kernel/crash_dump.c @@ -18,9 +18,6 @@ #include <linux/uaccess.h> #include <linux/io.h> -/* stores the physical address of elf header of crash image */ -unsigned long long elfcorehdr_addr = ELFCORE_ADDR_MAX; - /** * copy_oldmem_page() - copy one page from old kernel memory * @pfn: page frame number to be copied diff --git a/arch/arm/kernel/hw_breakpoint.c b/arch/arm/kernel/hw_breakpoint.c index 44b84fe..8dbc126 100644 --- a/arch/arm/kernel/hw_breakpoint.c +++ b/arch/arm/kernel/hw_breakpoint.c @@ -238,8 +238,8 @@ static int enable_monitor_mode(void) ARM_DBG_READ(c1, 0, dscr); /* Ensure that halting mode is disabled. */ - if (WARN_ONCE(dscr & ARM_DSCR_HDBGEN, "halting debug mode enabled." - "Unable to access hardware resources.")) { + if (WARN_ONCE(dscr & ARM_DSCR_HDBGEN, + "halting debug mode enabled. Unable to access hardware resources.\n")) { ret = -EPERM; goto out; } @@ -377,7 +377,7 @@ int arch_install_hw_breakpoint(struct perf_event *bp) } } - if (WARN_ONCE(i == max_slots, "Can't find any breakpoint slot")) { + if (WARN_ONCE(i == max_slots, "Can't find any breakpoint slot\n")) { ret = -EBUSY; goto out; } @@ -423,7 +423,7 @@ void arch_uninstall_hw_breakpoint(struct perf_event *bp) } } - if (WARN_ONCE(i == max_slots, "Can't find any breakpoint slot")) + if (WARN_ONCE(i == max_slots, "Can't find any breakpoint slot\n")) return; /* Reset the control register. */ @@ -635,7 +635,7 @@ int arch_validate_hwbkpt_settings(struct perf_event *bp) if (WARN_ONCE(!bp->overflow_handler && (arch_check_bp_in_kernelspace(bp) || !core_has_mismatch_brps() || !bp->hw.bp_target), - "overflow handler required but none found")) { + "overflow handler required but none found\n")) { ret = -EINVAL; } out: @@ -936,8 +936,8 @@ static int __init arch_hw_breakpoint_init(void) ARM_DBG_READ(c1, 0, dscr); if (dscr & ARM_DSCR_HDBGEN) { max_watchpoint_len = 4; - pr_warning("halting debug mode enabled. Assuming maximum " - "watchpoint size of %u bytes.", max_watchpoint_len); + pr_warning("halting debug mode enabled. Assuming maximum watchpoint size of %u bytes.\n", + max_watchpoint_len); } else { /* Work out the maximum supported watchpoint length. */ max_watchpoint_len = get_max_wp_len(); diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c index d1da921..006c1e8 100644 --- a/arch/arm/kernel/setup.c +++ b/arch/arm/kernel/setup.c @@ -466,13 +466,13 @@ static struct machine_desc * __init setup_machine(unsigned int nr) /* can't use cpu_relax() here as it may require MMU setup */; } -static int __init arm_add_memory(unsigned long start, unsigned long size) +static int __init arm_add_memory(phys_addr_t start, unsigned long size) { struct membank *bank = &meminfo.bank[meminfo.nr_banks]; if (meminfo.nr_banks >= NR_BANKS) { printk(KERN_CRIT "NR_BANKS too low, " - "ignoring memory at %#lx\n", start); + "ignoring memory at 0x%08llx\n", (long long)start); return -EINVAL; } @@ -502,7 +502,8 @@ static int __init arm_add_memory(unsigned long start, unsigned long size) static int __init early_mem(char *p) { static int usermem __initdata = 0; - unsigned long size, start; + unsigned long size; + phys_addr_t start; char *endp; /* @@ -788,30 +789,6 @@ static void __init reserve_crashkernel(void) static inline void reserve_crashkernel(void) {} #endif /* CONFIG_KEXEC */ -/* - * Note: elfcorehdr_addr is not just limited to vmcore. It is also used by - * is_kdump_kernel() to determine if we are booting after a panic. Hence - * ifdef it under CONFIG_CRASH_DUMP and not CONFIG_PROC_VMCORE. - */ - -#ifdef CONFIG_CRASH_DUMP -/* - * elfcorehdr= specifies the location of elf core header stored by the crashed - * kernel. This option will be passed by kexec loader to the capture kernel. - */ -static int __init setup_elfcorehdr(char *arg) -{ - char *end; - - if (!arg) - return -EINVAL; - - elfcorehdr_addr = memparse(arg, &end); - return end > arg ? 0 : -EINVAL; -} -early_param("elfcorehdr", setup_elfcorehdr); -#endif /* CONFIG_CRASH_DUMP */ - static void __init squash_mem_tags(struct tag *tag) { for (; tag->hdr.size; tag = tag_next(tag)) diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c index 4539ebc..8fe05ad 100644 --- a/arch/arm/kernel/smp.c +++ b/arch/arm/kernel/smp.c @@ -474,13 +474,12 @@ static void smp_timer_broadcast(const struct cpumask *mask) #define smp_timer_broadcast NULL #endif -#ifndef CONFIG_LOCAL_TIMERS static void broadcast_timer_set_mode(enum clock_event_mode mode, struct clock_event_device *evt) { } -static void local_timer_setup(struct clock_event_device *evt) +static void broadcast_timer_setup(struct clock_event_device *evt) { evt->name = "dummy_timer"; evt->features = CLOCK_EVT_FEAT_ONESHOT | @@ -492,7 +491,6 @@ static void local_timer_setup(struct clock_event_device *evt) clockevents_register_device(evt); } -#endif void __cpuinit percpu_timer_setup(void) { @@ -502,7 +500,8 @@ void __cpuinit percpu_timer_setup(void) evt->cpumask = cpumask_of(cpu); evt->broadcast = smp_timer_broadcast; - local_timer_setup(evt); + if (local_timer_setup(evt)) + broadcast_timer_setup(evt); } #ifdef CONFIG_HOTPLUG_CPU diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c index 21ac43f..f0000e1 100644 --- a/arch/arm/kernel/traps.c +++ b/arch/arm/kernel/traps.c @@ -712,17 +712,17 @@ EXPORT_SYMBOL(__readwrite_bug); void __pte_error(const char *file, int line, pte_t pte) { - printk("%s:%d: bad pte %08lx.\n", file, line, pte_val(pte)); + printk("%s:%d: bad pte %08llx.\n", file, line, (long long)pte_val(pte)); } void __pmd_error(const char *file, int line, pmd_t pmd) { - printk("%s:%d: bad pmd %08lx.\n", file, line, pmd_val(pmd)); + printk("%s:%d: bad pmd %08llx.\n", file, line, (long long)pmd_val(pmd)); } void __pgd_error(const char *file, int line, pgd_t pgd) { - printk("%s:%d: bad pgd %08lx.\n", file, line, pgd_val(pgd)); + printk("%s:%d: bad pgd %08llx.\n", file, line, (long long)pgd_val(pgd)); } asmlinkage void __div0(void) diff --git a/arch/arm/lib/uaccess_with_memcpy.c b/arch/arm/lib/uaccess_with_memcpy.c index e2d2f2c..8b9b136 100644 --- a/arch/arm/lib/uaccess_with_memcpy.c +++ b/arch/arm/lib/uaccess_with_memcpy.c @@ -27,13 +27,18 @@ pin_page_for_write(const void __user *_addr, pte_t **ptep, spinlock_t **ptlp) pgd_t *pgd; pmd_t *pmd; pte_t *pte; + pud_t *pud; spinlock_t *ptl; pgd = pgd_offset(current->mm, addr); if (unlikely(pgd_none(*pgd) || pgd_bad(*pgd))) return 0; - pmd = pmd_offset(pgd, addr); + pud = pud_offset(pgd, addr); + if (unlikely(pud_none(*pud) || pud_bad(*pud))) + return 0; + + pmd = pmd_offset(pud, addr); if (unlikely(pmd_none(*pmd) || pmd_bad(*pmd))) return 0; diff --git a/arch/arm/mach-exynos4/localtimer.c b/arch/arm/mach-exynos4/localtimer.c index 2a2993a..6bf3d0a 100644 --- a/arch/arm/mach-exynos4/localtimer.c +++ b/arch/arm/mach-exynos4/localtimer.c @@ -18,8 +18,9 @@ /* * Setup the local clock events for a CPU. */ -void __cpuinit local_timer_setup(struct clock_event_device *evt) +int __cpuinit local_timer_setup(struct clock_event_device *evt) { evt->irq = IRQ_LOCALTIMER; twd_timer_setup(evt); + return 0; } diff --git a/arch/arm/mach-imx/mach-mx27_3ds.c b/arch/arm/mach-imx/mach-mx27_3ds.c index 614b3c0..6e1accf 100644 --- a/arch/arm/mach-imx/mach-mx27_3ds.c +++ b/arch/arm/mach-imx/mach-mx27_3ds.c @@ -232,10 +232,13 @@ static struct mc13xxx_regulator_init_data mx27_3ds_regulators[] = { }; /* MC13783 */ -static struct mc13xxx_platform_data mc13783_pdata __initdata = { - .regulators = mx27_3ds_regulators, - .num_regulators = ARRAY_SIZE(mx27_3ds_regulators), - .flags = MC13XXX_USE_REGULATOR, +static struct mc13xxx_platform_data mc13783_pdata = { + .regulators = { + .regulators = mx27_3ds_regulators, + .num_regulators = ARRAY_SIZE(mx27_3ds_regulators), + + }, + .flags = MC13783_USE_REGULATOR, }; /* SPI */ diff --git a/arch/arm/mach-imx/mach-pcm038.c b/arch/arm/mach-imx/mach-pcm038.c index 38c7708..4cbce6d 100644 --- a/arch/arm/mach-imx/mach-pcm038.c +++ b/arch/arm/mach-imx/mach-pcm038.c @@ -263,10 +263,12 @@ static struct mc13xxx_regulator_init_data pcm038_regulators[] = { }; static struct mc13xxx_platform_data pcm038_pmic = { - .regulators = pcm038_regulators, - .num_regulators = ARRAY_SIZE(pcm038_regulators), - .flags = MC13XXX_USE_ADC | MC13XXX_USE_REGULATOR | - MC13XXX_USE_TOUCHSCREEN, + .regulators = { + .regulators = pcm038_regulators, + .num_regulators = ARRAY_SIZE(pcm038_regulators), + }, + .flags = MC13783_USE_ADC | MC13783_USE_REGULATOR | + MC13783_USE_TOUCHSCREEN, }; static struct spi_board_info pcm038_spi_board_info[] __initdata = { diff --git a/arch/arm/mach-integrator/Kconfig b/arch/arm/mach-integrator/Kconfig index 769b0f1..d701d32 100644 --- a/arch/arm/mach-integrator/Kconfig +++ b/arch/arm/mach-integrator/Kconfig @@ -13,6 +13,7 @@ config ARCH_INTEGRATOR_CP bool "Support Integrator/CP platform" select ARCH_CINTEGRATOR select ARM_TIMER_SP804 + select PLAT_VERSATILE_CLCD help Include support for the ARM(R) Integrator CP platform. diff --git a/arch/arm/mach-integrator/common.h b/arch/arm/mach-integrator/common.h index 5f96e15..a08f9b0 100644 --- a/arch/arm/mach-integrator/common.h +++ b/arch/arm/mach-integrator/common.h @@ -1 +1,2 @@ +void integrator_init_early(void); void integrator_reserve(void); diff --git a/arch/arm/mach-integrator/core.c b/arch/arm/mach-integrator/core.c index b8e884b..77315b9 100644 --- a/arch/arm/mach-integrator/core.c +++ b/arch/arm/mach-integrator/core.c @@ -144,12 +144,15 @@ static struct clk_lookup lookups[] = { } }; +void __init integrator_init_early(void) +{ + clkdev_add_table(lookups, ARRAY_SIZE(lookups)); +} + static int __init integrator_init(void) { int i; - clkdev_add_table(lookups, ARRAY_SIZE(lookups)); - for (i = 0; i < ARRAY_SIZE(amba_devs); i++) { struct amba_device *d = amba_devs[i]; amba_device_register(d, &iomem_resource); diff --git a/arch/arm/mach-integrator/impd1.c b/arch/arm/mach-integrator/impd1.c index 5db574f..8cbb75a 100644 --- a/arch/arm/mach-integrator/impd1.c +++ b/arch/arm/mach-integrator/impd1.c @@ -121,6 +121,7 @@ static struct clcd_panel vga = { .height = -1, .tim2 = TIM2_BCD | TIM2_IPC, .cntl = CNTL_LCDTFT | CNTL_LCDVCOMP(1), + .caps = CLCD_CAP_5551, .connector = IMPD1_CTRL_DISP_VGA, .bpp = 16, .grayscale = 0, @@ -149,6 +150,7 @@ static struct clcd_panel svga = { .tim2 = TIM2_BCD, .cntl = CNTL_LCDTFT | CNTL_LCDVCOMP(1), .connector = IMPD1_CTRL_DISP_VGA, + .caps = CLCD_CAP_5551, .bpp = 16, .grayscale = 0, }; @@ -175,6 +177,7 @@ static struct clcd_panel prospector = { .height = -1, .tim2 = TIM2_BCD, .cntl = CNTL_LCDTFT | CNTL_LCDVCOMP(1), + .caps = CLCD_CAP_5551, .fixedtimings = 1, .connector = IMPD1_CTRL_DISP_LCD, .bpp = 16, @@ -206,6 +209,7 @@ static struct clcd_panel ltm10c209 = { .height = -1, .tim2 = TIM2_BCD, .cntl = CNTL_LCDTFT | CNTL_LCDVCOMP(1), + .caps = CLCD_CAP_5551, .fixedtimings = 1, .connector = IMPD1_CTRL_DISP_LCD, .bpp = 16, @@ -279,6 +283,7 @@ static void impd1fb_clcd_remove(struct clcd_fb *fb) static struct clcd_board impd1_clcd_data = { .name = "IM-PD/1", + .caps = CLCD_CAP_5551 | CLCD_CAP_888, .check = clcdfb_check, .decode = clcdfb_decode, .disable = impd1fb_clcd_disable, diff --git a/arch/arm/mach-integrator/include/mach/cm.h b/arch/arm/mach-integrator/include/mach/cm.h index 1ab353e..445d57a 100644 --- a/arch/arm/mach-integrator/include/mach/cm.h +++ b/arch/arm/mach-integrator/include/mach/cm.h @@ -24,9 +24,9 @@ void cm_control(u32, u32); #define CM_CTRL_LCDBIASDN (1 << 10) #define CM_CTRL_LCDMUXSEL_MASK (7 << 11) #define CM_CTRL_LCDMUXSEL_GENLCD (1 << 11) -#define CM_CTRL_LCDMUXSEL_VGA_16BPP (2 << 11) +#define CM_CTRL_LCDMUXSEL_VGA565_TFT555 (2 << 11) #define CM_CTRL_LCDMUXSEL_SHARPLCD (3 << 11) -#define CM_CTRL_LCDMUXSEL_VGA_8421BPP (4 << 11) +#define CM_CTRL_LCDMUXSEL_VGA555_TFT555 (4 << 11) #define CM_CTRL_LCDEN0 (1 << 14) #define CM_CTRL_LCDEN1 (1 << 15) #define CM_CTRL_STATIC1 (1 << 16) diff --git a/arch/arm/mach-integrator/integrator_ap.c b/arch/arm/mach-integrator/integrator_ap.c index b666443..980803f 100644 --- a/arch/arm/mach-integrator/integrator_ap.c +++ b/arch/arm/mach-integrator/integrator_ap.c @@ -48,6 +48,8 @@ #include <asm/mach/map.h> #include <asm/mach/time.h> +#include <plat/fpga-irq.h> + #include "common.h" /* @@ -57,10 +59,10 @@ * Setup a VA for the Integrator interrupt controller (for header #0, * just for now). */ -#define VA_IC_BASE IO_ADDRESS(INTEGRATOR_IC_BASE) -#define VA_SC_BASE IO_ADDRESS(INTEGRATOR_SC_BASE) -#define VA_EBI_BASE IO_ADDRESS(INTEGRATOR_EBI_BASE) -#define VA_CMIC_BASE IO_ADDRESS(INTEGRATOR_HDR_IC) +#define VA_IC_BASE __io_address(INTEGRATOR_IC_BASE) +#define VA_SC_BASE __io_address(INTEGRATOR_SC_BASE) +#define VA_EBI_BASE __io_address(INTEGRATOR_EBI_BASE) +#define VA_CMIC_BASE __io_address(INTEGRATOR_HDR_IC) /* * Logical Physical @@ -156,27 +158,14 @@ static void __init ap_map_io(void) #define INTEGRATOR_SC_VALID_INT 0x003fffff -static void sc_mask_irq(struct irq_data *d) -{ - writel(1 << d->irq, VA_IC_BASE + IRQ_ENABLE_CLEAR); -} - -static void sc_unmask_irq(struct irq_data *d) -{ - writel(1 << d->irq, VA_IC_BASE + IRQ_ENABLE_SET); -} - -static struct irq_chip sc_chip = { - .name = "SC", - .irq_ack = sc_mask_irq, - .irq_mask = sc_mask_irq, - .irq_unmask = sc_unmask_irq, +static struct fpga_irq_data sc_irq_data = { + .base = VA_IC_BASE, + .irq_start = 0, + .chip.name = "SC", }; static void __init ap_init_irq(void) { - unsigned int i; - /* Disable all interrupts initially. */ /* Do the core module ones */ writel(-1, VA_CMIC_BASE + IRQ_ENABLE_CLEAR); @@ -185,13 +174,7 @@ static void __init ap_init_irq(void) writel(-1, VA_IC_BASE + IRQ_ENABLE_CLEAR); writel(-1, VA_IC_BASE + FIQ_ENABLE_CLEAR); - for (i = 0; i < NR_IRQS; i++) { - if (((1 << i) & INTEGRATOR_SC_VALID_INT) != 0) { - set_irq_chip(i, &sc_chip); - set_irq_handler(i, handle_level_irq); - set_irq_flags(i, IRQF_VALID | IRQF_PROBE); - } - } + fpga_irq_init(-1, INTEGRATOR_SC_VALID_INT, &sc_irq_data); } #ifdef CONFIG_PM @@ -282,7 +265,7 @@ static void ap_flash_exit(void) static void ap_flash_set_vpp(int on) { - unsigned long reg = on ? SC_CTRLS : SC_CTRLC; + void __iomem *reg = on ? SC_CTRLS : SC_CTRLC; writel(INTEGRATOR_SC_CTRL_nFLVPPEN, reg); } @@ -499,8 +482,9 @@ static struct sys_timer ap_timer = { MACHINE_START(INTEGRATOR, "ARM-Integrator") /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */ .boot_params = 0x00000100, - .map_io = ap_map_io, .reserve = integrator_reserve, + .map_io = ap_map_io, + .init_early = integrator_init_early, .init_irq = ap_init_irq, .timer = &ap_timer, .init_machine = ap_init, diff --git a/arch/arm/mach-integrator/integrator_cp.c b/arch/arm/mach-integrator/integrator_cp.c index e9327da..9e3ce26 100644 --- a/arch/arm/mach-integrator/integrator_cp.c +++ b/arch/arm/mach-integrator/integrator_cp.c @@ -42,6 +42,10 @@ #include <asm/hardware/timer-sp.h> +#include <plat/clcd.h> +#include <plat/fpga-irq.h> +#include <plat/sched_clock.h> + #include "common.h" #define INTCP_PA_FLASH_BASE 0x24000000 @@ -49,9 +53,9 @@ #define INTCP_PA_CLCD_BASE 0xc0000000 -#define INTCP_VA_CIC_BASE IO_ADDRESS(INTEGRATOR_HDR_BASE + 0x40) -#define INTCP_VA_PIC_BASE IO_ADDRESS(INTEGRATOR_IC_BASE) -#define INTCP_VA_SIC_BASE IO_ADDRESS(INTEGRATOR_CP_SIC_BASE) +#define INTCP_VA_CIC_BASE __io_address(INTEGRATOR_HDR_BASE + 0x40) +#define INTCP_VA_PIC_BASE __io_address(INTEGRATOR_IC_BASE) +#define INTCP_VA_SIC_BASE __io_address(INTEGRATOR_CP_SIC_BASE) #define INTCP_ETH_SIZE 0x10 @@ -139,129 +143,48 @@ static void __init intcp_map_io(void) iotable_init(intcp_io_desc, ARRAY_SIZE(intcp_io_desc)); } -#define cic_writel __raw_writel -#define cic_readl __raw_readl -#define pic_writel __raw_writel -#define pic_readl __raw_readl -#define sic_writel __raw_writel -#define sic_readl __raw_readl - -static void cic_mask_irq(struct irq_data *d) -{ - unsigned int irq = d->irq - IRQ_CIC_START; - cic_writel(1 << irq, INTCP_VA_CIC_BASE + IRQ_ENABLE_CLEAR); -} - -static void cic_unmask_irq(struct irq_data *d) -{ - unsigned int irq = d->irq - IRQ_CIC_START; - cic_writel(1 << irq, INTCP_VA_CIC_BASE + IRQ_ENABLE_SET); -} - -static struct irq_chip cic_chip = { - .name = "CIC", - .irq_ack = cic_mask_irq, - .irq_mask = cic_mask_irq, - .irq_unmask = cic_unmask_irq, +static struct fpga_irq_data cic_irq_data = { + .base = INTCP_VA_CIC_BASE, + .irq_start = IRQ_CIC_START, + .chip.name = "CIC", }; -static void pic_mask_irq(struct irq_data *d) -{ - unsigned int irq = d->irq - IRQ_PIC_START; - pic_writel(1 << irq, INTCP_VA_PIC_BASE + IRQ_ENABLE_CLEAR); -} - -static void pic_unmask_irq(struct irq_data *d) -{ - unsigned int irq = d->irq - IRQ_PIC_START; - pic_writel(1 << irq, INTCP_VA_PIC_BASE + IRQ_ENABLE_SET); -} - -static struct irq_chip pic_chip = { - .name = "PIC", - .irq_ack = pic_mask_irq, - .irq_mask = pic_mask_irq, - .irq_unmask = pic_unmask_irq, +static struct fpga_irq_data pic_irq_data = { + .base = INTCP_VA_PIC_BASE, + .irq_start = IRQ_PIC_START, + .chip.name = "PIC", }; -static void sic_mask_irq(struct irq_data *d) -{ - unsigned int irq = d->irq - IRQ_SIC_START; - sic_writel(1 << irq, INTCP_VA_SIC_BASE + IRQ_ENABLE_CLEAR); -} - -static void sic_unmask_irq(struct irq_data *d) -{ - unsigned int irq = d->irq - IRQ_SIC_START; - sic_writel(1 << irq, INTCP_VA_SIC_BASE + IRQ_ENABLE_SET); -} - -static struct irq_chip sic_chip = { - .name = "SIC", - .irq_ack = sic_mask_irq, - .irq_mask = sic_mask_irq, - .irq_unmask = sic_unmask_irq, +static struct fpga_irq_data sic_irq_data = { + .base = INTCP_VA_SIC_BASE, + .irq_start = IRQ_SIC_START, + .chip.name = "SIC", }; -static void -sic_handle_irq(unsigned int irq, struct irq_desc *desc) -{ - unsigned long status = sic_readl(INTCP_VA_SIC_BASE + IRQ_STATUS); - - if (status == 0) { - do_bad_IRQ(irq, desc); - return; - } - - do { - irq = ffs(status) - 1; - status &= ~(1 << irq); - - irq += IRQ_SIC_START; - - generic_handle_irq(irq); - } while (status); -} - static void __init intcp_init_irq(void) { - unsigned int i; + u32 pic_mask, sic_mask; + + pic_mask = ~((~0u) << (11 - IRQ_PIC_START)); + pic_mask |= (~((~0u) << (29 - 22))) << 22; + sic_mask = ~((~0u) << (1 + IRQ_SIC_END - IRQ_SIC_START)); /* * Disable all interrupt sources */ - pic_writel(0xffffffff, INTCP_VA_PIC_BASE + IRQ_ENABLE_CLEAR); - pic_writel(0xffffffff, INTCP_VA_PIC_BASE + FIQ_ENABLE_CLEAR); - - for (i = IRQ_PIC_START; i <= IRQ_PIC_END; i++) { - if (i == 11) - i = 22; - if (i == 29) - break; - set_irq_chip(i, &pic_chip); - set_irq_handler(i, handle_level_irq); - set_irq_flags(i, IRQF_VALID | IRQF_PROBE); - } + writel(0xffffffff, INTCP_VA_PIC_BASE + IRQ_ENABLE_CLEAR); + writel(0xffffffff, INTCP_VA_PIC_BASE + FIQ_ENABLE_CLEAR); + writel(0xffffffff, INTCP_VA_CIC_BASE + IRQ_ENABLE_CLEAR); + writel(0xffffffff, INTCP_VA_CIC_BASE + FIQ_ENABLE_CLEAR); + writel(sic_mask, INTCP_VA_SIC_BASE + IRQ_ENABLE_CLEAR); + writel(sic_mask, INTCP_VA_SIC_BASE + FIQ_ENABLE_CLEAR); - cic_writel(0xffffffff, INTCP_VA_CIC_BASE + IRQ_ENABLE_CLEAR); - cic_writel(0xffffffff, INTCP_VA_CIC_BASE + FIQ_ENABLE_CLEAR); + fpga_irq_init(-1, pic_mask, &pic_irq_data); - for (i = IRQ_CIC_START; i <= IRQ_CIC_END; i++) { - set_irq_chip(i, &cic_chip); - set_irq_handler(i, handle_level_irq); - set_irq_flags(i, IRQF_VALID); - } - - sic_writel(0x00000fff, INTCP_VA_SIC_BASE + IRQ_ENABLE_CLEAR); - sic_writel(0x00000fff, INTCP_VA_SIC_BASE + FIQ_ENABLE_CLEAR); - - for (i = IRQ_SIC_START; i <= IRQ_SIC_END; i++) { - set_irq_chip(i, &sic_chip); - set_irq_handler(i, handle_level_irq); - set_irq_flags(i, IRQF_VALID | IRQF_PROBE); - } + fpga_irq_init(-1, ~((~0u) << (1 + IRQ_CIC_END - IRQ_CIC_START)), + &cic_irq_data); - set_irq_chained_handler(IRQ_CP_CPPLDINT, sic_handle_irq); + fpga_irq_init(IRQ_CP_CPPLDINT, sic_mask, &sic_irq_data); } /* @@ -449,43 +372,21 @@ static struct amba_device aaci_device = { /* * CLCD support */ -static struct clcd_panel vga = { - .mode = { - .name = "VGA", - .refresh = 60, - .xres = 640, - .yres = 480, - .pixclock = 39721, - .left_margin = 40, - .right_margin = 24, - .upper_margin = 32, - .lower_margin = 11, - .hsync_len = 96, - .vsync_len = 2, - .sync = 0, - .vmode = FB_VMODE_NONINTERLACED, - }, - .width = -1, - .height = -1, - .tim2 = TIM2_BCD | TIM2_IPC, - .cntl = CNTL_LCDTFT | CNTL_LCDVCOMP(1), - .bpp = 16, - .grayscale = 0, -}; - /* * Ensure VGA is selected. */ static void cp_clcd_enable(struct clcd_fb *fb) { - u32 val; + struct fb_var_screeninfo *var = &fb->fb.var; + u32 val = CM_CTRL_STATIC1 | CM_CTRL_STATIC2; - if (fb->fb.var.bits_per_pixel <= 8) - val = CM_CTRL_LCDMUXSEL_VGA_8421BPP; + if (var->bits_per_pixel <= 8 || + (var->bits_per_pixel == 16 && var->green.length == 5)) + /* Pseudocolor, RGB555, BGR555 */ + val |= CM_CTRL_LCDMUXSEL_VGA555_TFT555; else if (fb->fb.var.bits_per_pixel <= 16) - val = CM_CTRL_LCDMUXSEL_VGA_16BPP - | CM_CTRL_LCDEN0 | CM_CTRL_LCDEN1 - | CM_CTRL_STATIC1 | CM_CTRL_STATIC2; + /* truecolor RGB565 */ + val |= CM_CTRL_LCDMUXSEL_VGA565_TFT555; else val = 0; /* no idea for this, don't trust the docs */ @@ -498,49 +399,24 @@ static void cp_clcd_enable(struct clcd_fb *fb) CM_CTRL_n24BITEN, val); } -static unsigned long framesize = SZ_1M; - static int cp_clcd_setup(struct clcd_fb *fb) { - dma_addr_t dma; - - fb->panel = &vga; - - fb->fb.screen_base = dma_alloc_writecombine(&fb->dev->dev, framesize, - &dma, GFP_KERNEL); - if (!fb->fb.screen_base) { - printk(KERN_ERR "CLCD: unable to map framebuffer\n"); - return -ENOMEM; - } - - fb->fb.fix.smem_start = dma; - fb->fb.fix.smem_len = framesize; - - return 0; -} - -static int cp_clcd_mmap(struct clcd_fb *fb, struct vm_area_struct *vma) -{ - return dma_mmap_writecombine(&fb->dev->dev, vma, - fb->fb.screen_base, - fb->fb.fix.smem_start, - fb->fb.fix.smem_len); -} + fb->panel = versatile_clcd_get_panel("VGA"); + if (!fb->panel) + return -EINVAL; -static void cp_clcd_remove(struct clcd_fb *fb) -{ - dma_free_writecombine(&fb->dev->dev, fb->fb.fix.smem_len, - fb->fb.screen_base, fb->fb.fix.smem_start); + return versatile_clcd_setup_dma(fb, SZ_1M); } static struct clcd_board clcd_data = { .name = "Integrator/CP", + .caps = CLCD_CAP_5551 | CLCD_CAP_RGB565 | CLCD_CAP_888, .check = clcdfb_check, .decode = clcdfb_decode, .enable = cp_clcd_enable, .setup = cp_clcd_setup, - .mmap = cp_clcd_mmap, - .remove = cp_clcd_remove, + .mmap = versatile_clcd_mmap_dma, + .remove = versatile_clcd_remove_dma, }; static struct amba_device clcd_device = { @@ -565,11 +441,23 @@ static struct amba_device *amba_devs[] __initdata = { &clcd_device, }; +#define REFCOUNTER (__io_address(INTEGRATOR_HDR_BASE) + 0x28) + +static void __init intcp_init_early(void) +{ + clkdev_add_table(cp_lookups, ARRAY_SIZE(cp_lookups)); + + integrator_init_early(); + +#ifdef CONFIG_PLAT_VERSATILE_SCHED_CLOCK + versatile_sched_clock_init(REFCOUNTER, 24000000); +#endif +} + static void __init intcp_init(void) { int i; - clkdev_add_table(cp_lookups, ARRAY_SIZE(cp_lookups)); platform_add_devices(intcp_devs, ARRAY_SIZE(intcp_devs)); for (i = 0; i < ARRAY_SIZE(amba_devs); i++) { @@ -599,8 +487,9 @@ static struct sys_timer cp_timer = { MACHINE_START(CINTEGRATOR, "ARM-IntegratorCP") /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */ .boot_params = 0x00000100, - .map_io = intcp_map_io, .reserve = integrator_reserve, + .map_io = intcp_map_io, + .init_early = intcp_init_early, .init_irq = intcp_init_irq, .timer = &cp_timer, .init_machine = intcp_init, diff --git a/arch/arm/mach-mmp/include/mach/mmp2.h b/arch/arm/mach-mmp/include/mach/mmp2.h index 4aec493..2cbf6df 100644 --- a/arch/arm/mach-mmp/include/mach/mmp2.h +++ b/arch/arm/mach-mmp/include/mach/mmp2.h @@ -11,8 +11,8 @@ extern void __init mmp2_init_irq(void); extern void mmp2_clear_pmic_int(void); #include <linux/i2c.h> +#include <linux/i2c/pxa-i2c.h> #include <mach/devices.h> -#include <plat/i2c.h> extern struct pxa_device_desc mmp2_device_uart1; extern struct pxa_device_desc mmp2_device_uart2; diff --git a/arch/arm/mach-mmp/include/mach/pxa168.h b/arch/arm/mach-mmp/include/mach/pxa168.h index 1801e42..a52b3d2 100644 --- a/arch/arm/mach-mmp/include/mach/pxa168.h +++ b/arch/arm/mach-mmp/include/mach/pxa168.h @@ -8,8 +8,8 @@ extern void __init pxa168_init_irq(void); extern void pxa168_clear_keypad_wakeup(void); #include <linux/i2c.h> +#include <linux/i2c/pxa-i2c.h> #include <mach/devices.h> -#include <plat/i2c.h> #include <plat/pxa3xx_nand.h> #include <video/pxa168fb.h> #include <plat/pxa27x_keypad.h> diff --git a/arch/arm/mach-mmp/include/mach/pxa910.h b/arch/arm/mach-mmp/include/mach/pxa910.h index f13c49d..91be755 100644 --- a/arch/arm/mach-mmp/include/mach/pxa910.h +++ b/arch/arm/mach-mmp/include/mach/pxa910.h @@ -7,8 +7,8 @@ extern struct sys_timer pxa910_timer; extern void __init pxa910_init_irq(void); #include <linux/i2c.h> +#include <linux/i2c/pxa-i2c.h> #include <mach/devices.h> -#include <plat/i2c.h> #include <plat/pxa3xx_nand.h> extern struct pxa_device_desc pxa910_device_uart1; diff --git a/arch/arm/mach-msm/timer.c b/arch/arm/mach-msm/timer.c index e7f8e5a..56f920c 100644 --- a/arch/arm/mach-msm/timer.c +++ b/arch/arm/mach-msm/timer.c @@ -263,7 +263,7 @@ static void __init msm_timer_init(void) } #ifdef CONFIG_SMP -void __cpuinit local_timer_setup(struct clock_event_device *evt) +int __cpuinit local_timer_setup(struct clock_event_device *evt) { struct msm_clock *clock = &msm_clocks[MSM_GLOBAL_TIMER]; @@ -295,6 +295,7 @@ void __cpuinit local_timer_setup(struct clock_event_device *evt) gic_enable_ppi(clock->irq.irq); clockevents_register_device(evt); + return 0; } inline int local_timer_ack(void) diff --git a/arch/arm/mach-mx3/mach-mx31_3ds.c b/arch/arm/mach-mx3/mach-mx31_3ds.c index 544d3e4..034be62 100644 --- a/arch/arm/mach-mx3/mach-mx31_3ds.c +++ b/arch/arm/mach-mx3/mach-mx31_3ds.c @@ -488,10 +488,12 @@ static struct mc13xxx_regulator_init_data mx31_3ds_regulators[] = { }; /* MC13783 */ -static struct mc13xxx_platform_data mc13783_pdata __initdata = { - .regulators = mx31_3ds_regulators, - .num_regulators = ARRAY_SIZE(mx31_3ds_regulators), - .flags = MC13XXX_USE_REGULATOR | MC13XXX_USE_TOUCHSCREEN +static struct mc13xxx_platform_data mc13783_pdata = { + .regulators = { + .regulators = mx31_3ds_regulators, + .num_regulators = ARRAY_SIZE(mx31_3ds_regulators), + }, + .flags = MC13783_USE_REGULATOR | MC13783_USE_TOUCHSCREEN, }; /* SPI */ diff --git a/arch/arm/mach-mx3/mach-mx31moboard.c b/arch/arm/mach-mx3/mach-mx31moboard.c index 6f3692b..3a021b0 100644 --- a/arch/arm/mach-mx3/mach-mx31moboard.c +++ b/arch/arm/mach-mx3/mach-mx31moboard.c @@ -268,8 +268,10 @@ static struct mc13783_leds_platform_data moboard_leds = { }; static struct mc13xxx_platform_data moboard_pmic = { - .regulators = moboard_regulators, - .num_regulators = ARRAY_SIZE(moboard_regulators), + .regulators = { + .regulators = moboard_regulators, + .num_regulators = ARRAY_SIZE(moboard_regulators), + }, .leds = &moboard_leds, .flags = MC13XXX_USE_REGULATOR | MC13XXX_USE_RTC | MC13XXX_USE_ADC | MC13XXX_USE_LED, diff --git a/arch/arm/mach-mxs/include/mach/dma.h b/arch/arm/mach-mxs/include/mach/dma.h new file mode 100644 index 0000000..7f4aeea --- /dev/null +++ b/arch/arm/mach-mxs/include/mach/dma.h @@ -0,0 +1,26 @@ +/* + * Copyright 2011 Freescale Semiconductor, Inc. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __MACH_MXS_DMA_H__ +#define __MACH_MXS_DMA_H__ + +struct mxs_dma_data { + int chan_irq; +}; + +static inline int mxs_dma_is_apbh(struct dma_chan *chan) +{ + return !strcmp(dev_name(chan->device->dev), "mxs-dma-apbh"); +} + +static inline int mxs_dma_is_apbx(struct dma_chan *chan) +{ + return !strcmp(dev_name(chan->device->dev), "mxs-dma-apbx"); +} + +#endif /* __MACH_MXS_DMA_H__ */ diff --git a/arch/arm/mach-mxs/include/mach/mmc.h b/arch/arm/mach-mxs/include/mach/mmc.h new file mode 100644 index 0000000..211547a --- /dev/null +++ b/arch/arm/mach-mxs/include/mach/mmc.h @@ -0,0 +1,18 @@ +/* + * Copyright 2011 Freescale Semiconductor, Inc. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __MACH_MXS_MMC_H__ +#define __MACH_MXS_MMC_H__ + +struct mxs_mmc_platform_data { + int wp_gpio; /* write protect pin */ + unsigned int flags; +#define SLOTF_4_BIT_CAPABLE (1 << 0) +#define SLOTF_8_BIT_CAPABLE (1 << 1) +}; +#endif /* __MACH_MXS_MMC_H__ */ diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index eeab35d..b997a358 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -44,6 +44,7 @@ config ARCH_OMAP4 depends on ARCH_OMAP2PLUS select CPU_V7 select ARM_GIC + select LOCAL_TIMERS if SMP select PL310_ERRATA_588369 select PL310_ERRATA_727915 select ARM_ERRATA_720789 diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c index c06eb42..9afd087 100644 --- a/arch/arm/mach-omap2/board-3430sdp.c +++ b/arch/arm/mach-omap2/board-3430sdp.c @@ -307,9 +307,6 @@ static struct omap_dss_board_info sdp3430_dss_data = { .default_device = &sdp3430_lcd_device, }; -static struct regulator_consumer_supply sdp3430_vdda_dac_supply = - REGULATOR_SUPPLY("vdda_dac", "omapdss"); - static struct omap_board_config_kernel sdp3430_config[] __initdata = { }; @@ -398,12 +395,13 @@ static struct regulator_consumer_supply sdp3430_vaux3_supplies[] = { }; static struct regulator_consumer_supply sdp3430_vdda_dac_supplies[] = { - REGULATOR_SUPPLY("vdda_dac", "omapdss"), + REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), }; /* VPLL2 for digital video outputs */ static struct regulator_consumer_supply sdp3430_vpll2_supplies[] = { REGULATOR_SUPPLY("vdds_dsi", "omapdss"), + REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"), }; static struct regulator_consumer_supply sdp3430_vmmc1_supplies[] = { diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c index 333ceb2..56702c5 100644 --- a/arch/arm/mach-omap2/board-4430sdp.c +++ b/arch/arm/mach-omap2/board-4430sdp.c @@ -36,6 +36,7 @@ #include <plat/usb.h> #include <plat/mmc.h> #include <plat/omap4-keypad.h> +#include <plat/display.h> #include "mux.h" #include "hsmmc.h" @@ -47,6 +48,8 @@ #define ETH_KS8851_QUART 138 #define OMAP4_SFH7741_SENSOR_OUTPUT_GPIO 184 #define OMAP4_SFH7741_ENABLE_GPIO 188 +#define HDMI_GPIO_HPD 60 /* Hot plug pin for HDMI */ +#define HDMI_GPIO_LS_OE 41 /* Level shifter for HDMI */ static const int sdp4430_keymap[] = { KEY(0, 0, KEY_E), @@ -547,6 +550,12 @@ static struct regulator_init_data sdp4430_vusb = { }, }; +static struct regulator_init_data sdp4430_clk32kg = { + .constraints = { + .valid_ops_mask = REGULATOR_CHANGE_STATUS, + }, +}; + static struct twl4030_platform_data sdp4430_twldata = { .irq_base = TWL6030_IRQ_BASE, .irq_end = TWL6030_IRQ_END, @@ -562,6 +571,7 @@ static struct twl4030_platform_data sdp4430_twldata = { .vaux1 = &sdp4430_vaux1, .vaux2 = &sdp4430_vaux2, .vaux3 = &sdp4430_vaux3, + .clk32kg = &sdp4430_clk32kg, .usb = &omap4_usbphy_data }; @@ -621,6 +631,76 @@ static void __init omap_sfh7741prox_init(void) } } +static void sdp4430_hdmi_mux_init(void) +{ + /* PAD0_HDMI_HPD_PAD1_HDMI_CEC */ + omap_mux_init_signal("hdmi_hpd", + OMAP_PIN_INPUT_PULLUP); + omap_mux_init_signal("hdmi_cec", + OMAP_PIN_INPUT_PULLUP); + /* PAD0_HDMI_DDC_SCL_PAD1_HDMI_DDC_SDA */ + omap_mux_init_signal("hdmi_ddc_scl", + OMAP_PIN_INPUT_PULLUP); + omap_mux_init_signal("hdmi_ddc_sda", + OMAP_PIN_INPUT_PULLUP); +} + +static int sdp4430_panel_enable_hdmi(struct omap_dss_device *dssdev) +{ + int status; + + status = gpio_request_one(HDMI_GPIO_HPD, GPIOF_OUT_INIT_HIGH, + "hdmi_gpio_hpd"); + if (status) { + pr_err("Cannot request GPIO %d\n", HDMI_GPIO_HPD); + return status; + } + status = gpio_request_one(HDMI_GPIO_LS_OE, GPIOF_OUT_INIT_HIGH, + "hdmi_gpio_ls_oe"); + if (status) { + pr_err("Cannot request GPIO %d\n", HDMI_GPIO_LS_OE); + goto error1; + } + + return 0; + +error1: + gpio_free(HDMI_GPIO_HPD); + + return status; +} + +static void sdp4430_panel_disable_hdmi(struct omap_dss_device *dssdev) +{ + gpio_free(HDMI_GPIO_LS_OE); + gpio_free(HDMI_GPIO_HPD); +} + +static struct omap_dss_device sdp4430_hdmi_device = { + .name = "hdmi", + .driver_name = "hdmi_panel", + .type = OMAP_DISPLAY_TYPE_HDMI, + .platform_enable = sdp4430_panel_enable_hdmi, + .platform_disable = sdp4430_panel_disable_hdmi, + .channel = OMAP_DSS_CHANNEL_DIGIT, +}; + +static struct omap_dss_device *sdp4430_dss_devices[] = { + &sdp4430_hdmi_device, +}; + +static struct omap_dss_board_info sdp4430_dss_data = { + .num_devices = ARRAY_SIZE(sdp4430_dss_devices), + .devices = sdp4430_dss_devices, + .default_device = &sdp4430_hdmi_device, +}; + +void omap_4430sdp_display_init(void) +{ + sdp4430_hdmi_mux_init(); + omap_display_init(&sdp4430_dss_data); +} + #ifdef CONFIG_OMAP_MUX static struct omap_board_mux board_mux[] __initdata = { OMAP4_MUX(USBB2_ULPITLL_CLK, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT), @@ -729,6 +809,8 @@ static void __init omap_4430sdp_init(void) status = omap4_keyboard_init(&sdp4430_keypad_data); if (status) pr_err("Keypad initialization failed: %d\n", status); + + omap_4430sdp_display_init(); } static void __init omap_4430sdp_map_io(void) diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c index 7b56479..02a12b4 100644 --- a/arch/arm/mach-omap2/board-cm-t35.c +++ b/arch/arm/mach-omap2/board-cm-t35.c @@ -488,7 +488,7 @@ static struct regulator_consumer_supply cm_t35_vsim_supply = { }; static struct regulator_consumer_supply cm_t35_vdac_supply = - REGULATOR_SUPPLY("vdda_dac", "omapdss"); + REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"); static struct regulator_consumer_supply cm_t35_vdvi_supply = REGULATOR_SUPPLY("vdvi", "omapdss"); diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c index aa27483..65f9fde 100644 --- a/arch/arm/mach-omap2/board-devkit8000.c +++ b/arch/arm/mach-omap2/board-devkit8000.c @@ -196,7 +196,7 @@ static struct omap_dss_board_info devkit8000_dss_data = { }; static struct regulator_consumer_supply devkit8000_vdda_dac_supply = - REGULATOR_SUPPLY("vdda_dac", "omapdss"); + REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"); static uint32_t board_keymap[] = { KEY(0, 0, KEY_1), @@ -277,8 +277,10 @@ static struct twl4030_gpio_platform_data devkit8000_gpio_data = { .setup = devkit8000_twl_gpio_setup, }; -static struct regulator_consumer_supply devkit8000_vpll1_supply = - REGULATOR_SUPPLY("vdds_dsi", "omapdss"); +static struct regulator_consumer_supply devkit8000_vpll1_supplies[] = { + REGULATOR_SUPPLY("vdds_dsi", "omapdss"), + REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"), +}; /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */ static struct regulator_init_data devkit8000_vmmc1 = { @@ -319,8 +321,8 @@ static struct regulator_init_data devkit8000_vpll1 = { .valid_ops_mask = REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS, }, - .num_consumer_supplies = 1, - .consumer_supplies = &devkit8000_vpll1_supply, + .num_consumer_supplies = ARRAY_SIZE(devkit8000_vpll1_supplies), + .consumer_supplies = devkit8000_vpll1_supplies, }; /* VAUX4 for ads7846 and nubs */ diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c index d3199b4..5f8a2fd 100644 --- a/arch/arm/mach-omap2/board-igep0020.c +++ b/arch/arm/mach-omap2/board-igep0020.c @@ -485,8 +485,10 @@ static struct omap_dss_board_info igep2_dss_data = { .default_device = &igep2_dvi_device, }; -static struct regulator_consumer_supply igep2_vpll2_supply = - REGULATOR_SUPPLY("vdds_dsi", "omapdss"); +static struct regulator_consumer_supply igep2_vpll2_supplies[] = { + REGULATOR_SUPPLY("vdds_dsi", "omapdss"), + REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"), +}; static struct regulator_init_data igep2_vpll2 = { .constraints = { @@ -499,8 +501,8 @@ static struct regulator_init_data igep2_vpll2 = { .valid_ops_mask = REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS, }, - .num_consumer_supplies = 1, - .consumer_supplies = &igep2_vpll2_supply, + .num_consumer_supplies = ARRAY_SIZE(igep2_vpll2_supplies), + .consumer_supplies = igep2_vpll2_supplies, }; static void __init igep2_display_init(void) diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c index 7640c05..33007fd 100644 --- a/arch/arm/mach-omap2/board-omap3beagle.c +++ b/arch/arm/mach-omap2/board-omap3beagle.c @@ -232,10 +232,12 @@ static struct omap_dss_board_info beagle_dss_data = { }; static struct regulator_consumer_supply beagle_vdac_supply = - REGULATOR_SUPPLY("vdda_dac", "omapdss"); + REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"); -static struct regulator_consumer_supply beagle_vdvi_supply = - REGULATOR_SUPPLY("vdds_dsi", "omapdss"); +static struct regulator_consumer_supply beagle_vdvi_supplies[] = { + REGULATOR_SUPPLY("vdds_dsi", "omapdss"), + REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"), +}; static void __init beagle_display_init(void) { @@ -422,8 +424,8 @@ static struct regulator_init_data beagle_vpll2 = { .valid_ops_mask = REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS, }, - .num_consumer_supplies = 1, - .consumer_supplies = &beagle_vdvi_supply, + .num_consumer_supplies = ARRAY_SIZE(beagle_vdvi_supplies), + .consumer_supplies = beagle_vdvi_supplies, }; static struct twl4030_usb_data beagle_usb_data = { diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c index 0fa2c7b..5a1a916 100644 --- a/arch/arm/mach-omap2/board-omap3evm.c +++ b/arch/arm/mach-omap2/board-omap3evm.c @@ -542,7 +542,7 @@ static struct twl4030_codec_data omap3evm_codec_data = { }; static struct regulator_consumer_supply omap3_evm_vdda_dac_supply = - REGULATOR_SUPPLY("vdda_dac", "omapdss"); + REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"); /* VDAC for DSS driving S-Video */ static struct regulator_init_data omap3_evm_vdac = { @@ -560,8 +560,10 @@ static struct regulator_init_data omap3_evm_vdac = { }; /* VPLL2 for digital video outputs */ -static struct regulator_consumer_supply omap3_evm_vpll2_supply = - REGULATOR_SUPPLY("vdds_dsi", "omapdss"); +static struct regulator_consumer_supply omap3_evm_vpll2_supplies[] = { + REGULATOR_SUPPLY("vdds_dsi", "omapdss"), + REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"), +}; static struct regulator_init_data omap3_evm_vpll2 = { .constraints = { @@ -573,8 +575,8 @@ static struct regulator_init_data omap3_evm_vpll2 = { .valid_ops_mask = REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS, }, - .num_consumer_supplies = 1, - .consumer_supplies = &omap3_evm_vpll2_supply, + .num_consumer_supplies = ARRAY_SIZE(omap3_evm_vpll2_supplies), + .consumer_supplies = omap3_evm_vpll2_supplies, }; /* ads7846 on SPI */ diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c index 2e5dc21..07dba88 100644 --- a/arch/arm/mach-omap2/board-omap3pandora.c +++ b/arch/arm/mach-omap2/board-omap3pandora.c @@ -342,11 +342,12 @@ static struct regulator_consumer_supply pandora_vmmc3_supply = REGULATOR_SUPPLY("vmmc", "omap_hsmmc.2"); static struct regulator_consumer_supply pandora_vdda_dac_supply = - REGULATOR_SUPPLY("vdda_dac", "omapdss"); + REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"); static struct regulator_consumer_supply pandora_vdds_supplies[] = { REGULATOR_SUPPLY("vdds_sdi", "omapdss"), REGULATOR_SUPPLY("vdds_dsi", "omapdss"), + REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"), }; static struct regulator_consumer_supply pandora_vcc_lcd_supply = diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach-omap2/board-omap3stalker.c index 8ebdbc3..a6e0b91 100644 --- a/arch/arm/mach-omap2/board-omap3stalker.c +++ b/arch/arm/mach-omap2/board-omap3stalker.c @@ -439,7 +439,7 @@ static struct twl4030_codec_data omap3stalker_codec_data = { }; static struct regulator_consumer_supply omap3_stalker_vdda_dac_supply = - REGULATOR_SUPPLY("vdda_dac", "omapdss"); + REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"); /* VDAC for DSS driving S-Video */ static struct regulator_init_data omap3_stalker_vdac = { @@ -457,8 +457,10 @@ static struct regulator_init_data omap3_stalker_vdac = { }; /* VPLL2 for digital video outputs */ -static struct regulator_consumer_supply omap3_stalker_vpll2_supply = - REGULATOR_SUPPLY("vdds_dsi", "omapdss"); +static struct regulator_consumer_supply omap3_stalker_vpll2_supplies[] = { + REGULATOR_SUPPLY("vdds_dsi", "omapdss"), + REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"), +}; static struct regulator_init_data omap3_stalker_vpll2 = { .constraints = { @@ -471,8 +473,8 @@ static struct regulator_init_data omap3_stalker_vpll2 = { .valid_ops_mask = REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS, }, - .num_consumer_supplies = 1, - .consumer_supplies = &omap3_stalker_vpll2_supply, + .num_consumer_supplies = ARRAY_SIZE(omap3_stalker_vpll2_supplies), + .consumer_supplies = omap3_stalker_vpll2_supplies, }; static struct twl4030_platform_data omap3stalker_twldata = { diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c index 0f4d8a7..c936c6d 100644 --- a/arch/arm/mach-omap2/board-omap4panda.c +++ b/arch/arm/mach-omap2/board-omap4panda.c @@ -34,11 +34,13 @@ #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> +#include <plat/display.h> #include <plat/board.h> #include <plat/common.h> #include <plat/usb.h> #include <plat/mmc.h> +#include <plat/panel-generic-dpi.h> #include "timer-gp.h" #include "hsmmc.h" @@ -49,6 +51,8 @@ #define GPIO_HUB_NRESET 62 #define GPIO_WIFI_PMENA 43 #define GPIO_WIFI_IRQ 53 +#define HDMI_GPIO_HPD 60 /* Hot plug pin for HDMI */ +#define HDMI_GPIO_LS_OE 41 /* Level shifter for HDMI */ /* wl127x BT, FM, GPS connectivity chip */ static int wl1271_gpios[] = {46, -1, -1}; @@ -407,6 +411,12 @@ static struct regulator_init_data omap4_panda_vusb = { }, }; +static struct regulator_init_data omap4_panda_clk32kg = { + .constraints = { + .valid_ops_mask = REGULATOR_CHANGE_STATUS, + }, +}; + static struct twl4030_platform_data omap4_panda_twldata = { .irq_base = TWL6030_IRQ_BASE, .irq_end = TWL6030_IRQ_END, @@ -422,6 +432,7 @@ static struct twl4030_platform_data omap4_panda_twldata = { .vaux1 = &omap4_panda_vaux1, .vaux2 = &omap4_panda_vaux2, .vaux3 = &omap4_panda_vaux3, + .clk32kg = &omap4_panda_clk32kg, .usb = &omap4_usbphy_data, }; @@ -433,6 +444,17 @@ static struct i2c_board_info __initdata omap4_panda_i2c_boardinfo[] = { .platform_data = &omap4_panda_twldata, }, }; + +/* + * Display monitor features are burnt in their EEPROM as EDID data. The EEPROM + * is connected as I2C slave device, and can be accessed at address 0x50 + */ +static struct i2c_board_info __initdata panda_i2c_eeprom[] = { + { + I2C_BOARD_INFO("eeprom", 0x50), + }, +}; + static int __init omap4_panda_i2c_init(void) { /* @@ -442,7 +464,12 @@ static int __init omap4_panda_i2c_init(void) omap_register_i2c_bus(1, 400, omap4_panda_i2c_boardinfo, ARRAY_SIZE(omap4_panda_i2c_boardinfo)); omap_register_i2c_bus(2, 400, NULL, 0); - omap_register_i2c_bus(3, 400, NULL, 0); + /* + * Bus 3 is attached to the DVI port where devices like the pico DLP + * projector don't work reliably with 400kHz + */ + omap_register_i2c_bus(3, 100, panda_i2c_eeprom, + ARRAY_SIZE(panda_i2c_eeprom)); omap_register_i2c_bus(4, 400, NULL, 0); return 0; } @@ -462,6 +489,64 @@ static struct omap_board_mux board_mux[] __initdata = { OMAP4_MUX(SDMMC5_DAT1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP), OMAP4_MUX(SDMMC5_DAT2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP), OMAP4_MUX(SDMMC5_DAT3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP), + /* gpio 0 - TFP410 PD */ + OMAP4_MUX(KPD_COL1, OMAP_PIN_OUTPUT | OMAP_MUX_MODE3), + /* dispc2_data23 */ + OMAP4_MUX(USBB2_ULPITLL_STP, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5), + /* dispc2_data22 */ + OMAP4_MUX(USBB2_ULPITLL_DIR, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5), + /* dispc2_data21 */ + OMAP4_MUX(USBB2_ULPITLL_NXT, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5), + /* dispc2_data20 */ + OMAP4_MUX(USBB2_ULPITLL_DAT0, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5), + /* dispc2_data19 */ + OMAP4_MUX(USBB2_ULPITLL_DAT1, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5), + /* dispc2_data18 */ + OMAP4_MUX(USBB2_ULPITLL_DAT2, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5), + /* dispc2_data15 */ + OMAP4_MUX(USBB2_ULPITLL_DAT3, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5), + /* dispc2_data14 */ + OMAP4_MUX(USBB2_ULPITLL_DAT4, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5), + /* dispc2_data13 */ + OMAP4_MUX(USBB2_ULPITLL_DAT5, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5), + /* dispc2_data12 */ + OMAP4_MUX(USBB2_ULPITLL_DAT6, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5), + /* dispc2_data11 */ + OMAP4_MUX(USBB2_ULPITLL_DAT7, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5), + /* dispc2_data10 */ + OMAP4_MUX(DPM_EMU3, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5), + /* dispc2_data9 */ + OMAP4_MUX(DPM_EMU4, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5), + /* dispc2_data16 */ + OMAP4_MUX(DPM_EMU5, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5), + /* dispc2_data17 */ + OMAP4_MUX(DPM_EMU6, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5), + /* dispc2_hsync */ + OMAP4_MUX(DPM_EMU7, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5), + /* dispc2_pclk */ + OMAP4_MUX(DPM_EMU8, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5), + /* dispc2_vsync */ + OMAP4_MUX(DPM_EMU9, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5), + /* dispc2_de */ + OMAP4_MUX(DPM_EMU10, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5), + /* dispc2_data8 */ + OMAP4_MUX(DPM_EMU11, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5), + /* dispc2_data7 */ + OMAP4_MUX(DPM_EMU12, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5), + /* dispc2_data6 */ + OMAP4_MUX(DPM_EMU13, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5), + /* dispc2_data5 */ + OMAP4_MUX(DPM_EMU14, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5), + /* dispc2_data4 */ + OMAP4_MUX(DPM_EMU15, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5), + /* dispc2_data3 */ + OMAP4_MUX(DPM_EMU16, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5), + /* dispc2_data2 */ + OMAP4_MUX(DPM_EMU17, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5), + /* dispc2_data1 */ + OMAP4_MUX(DPM_EMU18, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5), + /* dispc2_data0 */ + OMAP4_MUX(DPM_EMU19, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5), { .reg_offset = OMAP_MUX_TERMINATOR }, }; @@ -535,6 +620,128 @@ static inline void board_serial_init(void) } #endif +/* Display DVI */ +#define PANDA_DVI_TFP410_POWER_DOWN_GPIO 0 + +static int omap4_panda_enable_dvi(struct omap_dss_device *dssdev) +{ + gpio_set_value(dssdev->reset_gpio, 1); + return 0; +} + +static void omap4_panda_disable_dvi(struct omap_dss_device *dssdev) +{ + gpio_set_value(dssdev->reset_gpio, 0); +} + +/* Using generic display panel */ +static struct panel_generic_dpi_data omap4_dvi_panel = { + .name = "generic", + .platform_enable = omap4_panda_enable_dvi, + .platform_disable = omap4_panda_disable_dvi, +}; + +struct omap_dss_device omap4_panda_dvi_device = { + .type = OMAP_DISPLAY_TYPE_DPI, + .name = "dvi", + .driver_name = "generic_dpi_panel", + .data = &omap4_dvi_panel, + .phy.dpi.data_lines = 24, + .reset_gpio = PANDA_DVI_TFP410_POWER_DOWN_GPIO, + .channel = OMAP_DSS_CHANNEL_LCD2, +}; + +int __init omap4_panda_dvi_init(void) +{ + int r; + + /* Requesting TFP410 DVI GPIO and disabling it, at bootup */ + r = gpio_request_one(omap4_panda_dvi_device.reset_gpio, + GPIOF_OUT_INIT_LOW, "DVI PD"); + if (r) + pr_err("Failed to get DVI powerdown GPIO\n"); + + return r; +} + + +static void omap4_panda_hdmi_mux_init(void) +{ + /* PAD0_HDMI_HPD_PAD1_HDMI_CEC */ + omap_mux_init_signal("hdmi_hpd", + OMAP_PIN_INPUT_PULLUP); + omap_mux_init_signal("hdmi_cec", + OMAP_PIN_INPUT_PULLUP); + /* PAD0_HDMI_DDC_SCL_PAD1_HDMI_DDC_SDA */ + omap_mux_init_signal("hdmi_ddc_scl", + OMAP_PIN_INPUT_PULLUP); + omap_mux_init_signal("hdmi_ddc_sda", + OMAP_PIN_INPUT_PULLUP); +} + +static int omap4_panda_panel_enable_hdmi(struct omap_dss_device *dssdev) +{ + int status; + + status = gpio_request_one(HDMI_GPIO_HPD, GPIOF_OUT_INIT_HIGH, + "hdmi_gpio_hpd"); + if (status) { + pr_err("Cannot request GPIO %d\n", HDMI_GPIO_HPD); + return status; + } + status = gpio_request_one(HDMI_GPIO_LS_OE, GPIOF_OUT_INIT_HIGH, + "hdmi_gpio_ls_oe"); + if (status) { + pr_err("Cannot request GPIO %d\n", HDMI_GPIO_LS_OE); + goto error1; + } + + return 0; + +error1: + gpio_free(HDMI_GPIO_HPD); + + return status; +} + +static void omap4_panda_panel_disable_hdmi(struct omap_dss_device *dssdev) +{ + gpio_free(HDMI_GPIO_LS_OE); + gpio_free(HDMI_GPIO_HPD); +} + +static struct omap_dss_device omap4_panda_hdmi_device = { + .name = "hdmi", + .driver_name = "hdmi_panel", + .type = OMAP_DISPLAY_TYPE_HDMI, + .platform_enable = omap4_panda_panel_enable_hdmi, + .platform_disable = omap4_panda_panel_disable_hdmi, + .channel = OMAP_DSS_CHANNEL_DIGIT, +}; + +static struct omap_dss_device *omap4_panda_dss_devices[] = { + &omap4_panda_dvi_device, + &omap4_panda_hdmi_device, +}; + +static struct omap_dss_board_info omap4_panda_dss_data = { + .num_devices = ARRAY_SIZE(omap4_panda_dss_devices), + .devices = omap4_panda_dss_devices, + .default_device = &omap4_panda_dvi_device, +}; + +void omap4_panda_display_init(void) +{ + int r; + + r = omap4_panda_dvi_init(); + if (r) + pr_err("error initializing panda DVI\n"); + + omap4_panda_hdmi_mux_init(); + omap_display_init(&omap4_panda_dss_data); +} + static void __init omap4_panda_init(void) { int package = OMAP_PACKAGE_CBS; @@ -553,6 +760,7 @@ static void __init omap4_panda_init(void) omap4_twl6030_hsmmc_init(mmc); omap4_ehci_init(); usb_musb_init(&musb_board_data); + omap4_panda_display_init(); } static void __init omap4_panda_map_io(void) diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c index d096194..59ca333 100644 --- a/arch/arm/mach-omap2/board-overo.c +++ b/arch/arm/mach-omap2/board-overo.c @@ -28,6 +28,8 @@ #include <linux/platform_device.h> #include <linux/i2c/twl.h> #include <linux/regulator/machine.h> +#include <linux/regulator/fixed.h> +#include <linux/spi/spi.h> #include <linux/mtd/mtd.h> #include <linux/mtd/nand.h> @@ -41,10 +43,14 @@ #include <plat/board.h> #include <plat/common.h> +#include <plat/display.h> +#include <plat/panel-generic-dpi.h> #include <mach/gpio.h> #include <plat/gpmc.h> #include <mach/hardware.h> #include <plat/nand.h> +#include <plat/mcspi.h> +#include <plat/mux.h> #include <plat/usb.h> #include "mux.h" @@ -68,8 +74,6 @@ #if defined(CONFIG_TOUCHSCREEN_ADS7846) || \ defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE) -#include <plat/mcspi.h> -#include <linux/spi/spi.h> #include <linux/spi/ads7846.h> static struct omap2_mcspi_device_config ads7846_mcspi_config = { @@ -94,16 +98,32 @@ static struct ads7846_platform_data ads7846_config = { .keep_vref_on = 1, }; -static struct spi_board_info overo_spi_board_info[] __initdata = { - { - .modalias = "ads7846", - .bus_num = 1, - .chip_select = 0, - .max_speed_hz = 1500000, - .controller_data = &ads7846_mcspi_config, - .irq = OMAP_GPIO_IRQ(OVERO_GPIO_PENDOWN), - .platform_data = &ads7846_config, - } +/* fixed regulator for ads7846 */ +static struct regulator_consumer_supply ads7846_supply = + REGULATOR_SUPPLY("vcc", "spi1.0"); + +static struct regulator_init_data vads7846_regulator = { + .constraints = { + .valid_ops_mask = REGULATOR_CHANGE_STATUS, + }, + .num_consumer_supplies = 1, + .consumer_supplies = &ads7846_supply, +}; + +static struct fixed_voltage_config vads7846 = { + .supply_name = "vads7846", + .microvolts = 3300000, /* 3.3V */ + .gpio = -EINVAL, + .startup_delay = 0, + .init_data = &vads7846_regulator, +}; + +static struct platform_device vads7846_device = { + .name = "reg-fixed-voltage", + .id = 1, + .dev = { + .platform_data = &vads7846, + }, }; static void __init overo_ads7846_init(void) @@ -116,8 +136,7 @@ static void __init overo_ads7846_init(void) return; } - spi_register_board_info(overo_spi_board_info, - ARRAY_SIZE(overo_spi_board_info)); + platform_device_register(&vads7846_device); } #else @@ -233,6 +252,137 @@ static inline void __init overo_init_smsc911x(void) static inline void __init overo_init_smsc911x(void) { return; } #endif +/* DSS */ +static int lcd_enabled; +static int dvi_enabled; + +#define OVERO_GPIO_LCD_EN 144 +#define OVERO_GPIO_LCD_BL 145 + +static void __init overo_display_init(void) +{ + if ((gpio_request(OVERO_GPIO_LCD_EN, "OVERO_GPIO_LCD_EN") == 0) && + (gpio_direction_output(OVERO_GPIO_LCD_EN, 1) == 0)) + gpio_export(OVERO_GPIO_LCD_EN, 0); + else + printk(KERN_ERR "could not obtain gpio for " + "OVERO_GPIO_LCD_EN\n"); + + if ((gpio_request(OVERO_GPIO_LCD_BL, "OVERO_GPIO_LCD_BL") == 0) && + (gpio_direction_output(OVERO_GPIO_LCD_BL, 1) == 0)) + gpio_export(OVERO_GPIO_LCD_BL, 0); + else + printk(KERN_ERR "could not obtain gpio for " + "OVERO_GPIO_LCD_BL\n"); +} + +static int overo_panel_enable_dvi(struct omap_dss_device *dssdev) +{ + if (lcd_enabled) { + printk(KERN_ERR "cannot enable DVI, LCD is enabled\n"); + return -EINVAL; + } + dvi_enabled = 1; + + return 0; +} + +static void overo_panel_disable_dvi(struct omap_dss_device *dssdev) +{ + dvi_enabled = 0; +} + +static struct panel_generic_dpi_data dvi_panel = { + .name = "generic", + .platform_enable = overo_panel_enable_dvi, + .platform_disable = overo_panel_disable_dvi, +}; + +static struct omap_dss_device overo_dvi_device = { + .name = "dvi", + .type = OMAP_DISPLAY_TYPE_DPI, + .driver_name = "generic_dpi_panel", + .data = &dvi_panel, + .phy.dpi.data_lines = 24, +}; + +static struct omap_dss_device overo_tv_device = { + .name = "tv", + .driver_name = "venc", + .type = OMAP_DISPLAY_TYPE_VENC, + .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO, +}; + +static int overo_panel_enable_lcd(struct omap_dss_device *dssdev) +{ + if (dvi_enabled) { + printk(KERN_ERR "cannot enable LCD, DVI is enabled\n"); + return -EINVAL; + } + + gpio_set_value(OVERO_GPIO_LCD_EN, 1); + gpio_set_value(OVERO_GPIO_LCD_BL, 1); + lcd_enabled = 1; + return 0; +} + +static void overo_panel_disable_lcd(struct omap_dss_device *dssdev) +{ + gpio_set_value(OVERO_GPIO_LCD_EN, 0); + gpio_set_value(OVERO_GPIO_LCD_BL, 0); + lcd_enabled = 0; +} + +static struct panel_generic_dpi_data lcd43_panel = { + .name = "samsung_lte430wq_f0c", + .platform_enable = overo_panel_enable_lcd, + .platform_disable = overo_panel_disable_lcd, +}; + +static struct omap_dss_device overo_lcd43_device = { + .name = "lcd43", + .type = OMAP_DISPLAY_TYPE_DPI, + .driver_name = "generic_dpi_panel", + .data = &lcd43_panel, + .phy.dpi.data_lines = 24, +}; + +#if defined(CONFIG_PANEL_LGPHILIPS_LB035Q02) || \ + defined(CONFIG_PANEL_LGPHILIPS_LB035Q02_MODULE) +static struct omap_dss_device overo_lcd35_device = { + .type = OMAP_DISPLAY_TYPE_DPI, + .name = "lcd35", + .driver_name = "lgphilips_lb035q02_panel", + .phy.dpi.data_lines = 24, + .platform_enable = overo_panel_enable_lcd, + .platform_disable = overo_panel_disable_lcd, +}; +#endif + +static struct omap_dss_device *overo_dss_devices[] = { + &overo_dvi_device, + &overo_tv_device, +#if defined(CONFIG_PANEL_LGPHILIPS_LB035Q02) || \ + defined(CONFIG_PANEL_LGPHILIPS_LB035Q02_MODULE) + &overo_lcd35_device, +#endif + &overo_lcd43_device, +}; + +static struct omap_dss_board_info overo_dss_data = { + .num_devices = ARRAY_SIZE(overo_dss_devices), + .devices = overo_dss_devices, + .default_device = &overo_dvi_device, +}; + +static struct regulator_consumer_supply overo_vdda_dac_supply = + REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"); + +static struct regulator_consumer_supply overo_vdds_dsi_supply[] = { + REGULATOR_SUPPLY("vdds_dsi", "omapdss"), + REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"), +}; + static struct mtd_partition overo_nand_partitions[] = { { .name = "xloader", @@ -323,6 +473,93 @@ static struct regulator_consumer_supply overo_vmmc1_supply = { .supply = "vmmc", }; +#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE) +#include <linux/leds.h> + +static struct gpio_led gpio_leds[] = { + { + .name = "overo:red:gpio21", + .default_trigger = "heartbeat", + .gpio = 21, + .active_low = true, + }, + { + .name = "overo:blue:gpio22", + .default_trigger = "none", + .gpio = 22, + .active_low = true, + }, + { + .name = "overo:blue:COM", + .default_trigger = "mmc0", + .gpio = -EINVAL, /* gets replaced */ + .active_low = true, + }, +}; + +static struct gpio_led_platform_data gpio_leds_pdata = { + .leds = gpio_leds, + .num_leds = ARRAY_SIZE(gpio_leds), +}; + +static struct platform_device gpio_leds_device = { + .name = "leds-gpio", + .id = -1, + .dev = { + .platform_data = &gpio_leds_pdata, + }, +}; + +static void __init overo_init_led(void) +{ + platform_device_register(&gpio_leds_device); +} + +#else +static inline void __init overo_init_led(void) { return; } +#endif + +#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) +#include <linux/input.h> +#include <linux/gpio_keys.h> + +static struct gpio_keys_button gpio_buttons[] = { + { + .code = BTN_0, + .gpio = 23, + .desc = "button0", + .wakeup = 1, + }, + { + .code = BTN_1, + .gpio = 14, + .desc = "button1", + .wakeup = 1, + }, +}; + +static struct gpio_keys_platform_data gpio_keys_pdata = { + .buttons = gpio_buttons, + .nbuttons = ARRAY_SIZE(gpio_buttons), +}; + +static struct platform_device gpio_keys_device = { + .name = "gpio-keys", + .id = -1, + .dev = { + .platform_data = &gpio_keys_pdata, + }, +}; + +static void __init overo_init_keys(void) +{ + platform_device_register(&gpio_keys_device); +} + +#else +static inline void __init overo_init_keys(void) { return; } +#endif + static int overo_twl_gpio_setup(struct device *dev, unsigned gpio, unsigned ngpio) { @@ -330,6 +567,11 @@ static int overo_twl_gpio_setup(struct device *dev, overo_vmmc1_supply.dev = mmc[0].dev; +#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE) + /* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */ + gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1; +#endif + return 0; } @@ -337,6 +579,7 @@ static struct twl4030_gpio_platform_data overo_gpio_data = { .gpio_base = OMAP_MAX_GPIO_LINES, .irq_base = TWL4030_GPIO_IRQ_BASE, .irq_end = TWL4030_GPIO_IRQ_END, + .use_leds = true, .setup = overo_twl_gpio_setup, }; @@ -358,6 +601,35 @@ static struct regulator_init_data overo_vmmc1 = { .consumer_supplies = &overo_vmmc1_supply, }; +/* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */ +static struct regulator_init_data overo_vdac = { + .constraints = { + .min_uV = 1800000, + .max_uV = 1800000, + .valid_modes_mask = REGULATOR_MODE_NORMAL + | REGULATOR_MODE_STANDBY, + .valid_ops_mask = REGULATOR_CHANGE_MODE + | REGULATOR_CHANGE_STATUS, + }, + .num_consumer_supplies = 1, + .consumer_supplies = &overo_vdda_dac_supply, +}; + +/* VPLL2 for digital video outputs */ +static struct regulator_init_data overo_vpll2 = { + .constraints = { + .name = "VDVI", + .min_uV = 1800000, + .max_uV = 1800000, + .valid_modes_mask = REGULATOR_MODE_NORMAL + | REGULATOR_MODE_STANDBY, + .valid_ops_mask = REGULATOR_CHANGE_MODE + | REGULATOR_CHANGE_STATUS, + }, + .num_consumer_supplies = ARRAY_SIZE(overo_vdds_dsi_supply), + .consumer_supplies = overo_vdds_dsi_supply, +}; + static struct twl4030_codec_audio_data overo_audio_data; static struct twl4030_codec_data overo_codec_data = { @@ -365,8 +637,6 @@ static struct twl4030_codec_data overo_codec_data = { .audio = &overo_audio_data, }; -/* mmc2 (WLAN) and Bluetooth don't use twl4030 regulators */ - static struct twl4030_platform_data overo_twldata = { .irq_base = TWL4030_IRQ_BASE, .irq_end = TWL4030_IRQ_END, @@ -374,6 +644,8 @@ static struct twl4030_platform_data overo_twldata = { .usb = &overo_usb_data, .codec = &overo_codec_data, .vmmc1 = &overo_vmmc1, + .vdac = &overo_vdac, + .vpll2 = &overo_vpll2, }; static struct i2c_board_info __initdata overo_i2c_boardinfo[] = { @@ -394,18 +666,38 @@ static int __init overo_i2c_init(void) return 0; } -static struct platform_device overo_lcd_device = { - .name = "overo_lcd", - .id = -1, -}; - -static struct omap_lcd_config overo_lcd_config __initdata = { - .ctrl_name = "internal", +static struct spi_board_info overo_spi_board_info[] __initdata = { +#if defined(CONFIG_TOUCHSCREEN_ADS7846) || \ + defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE) + { + .modalias = "ads7846", + .bus_num = 1, + .chip_select = 0, + .max_speed_hz = 1500000, + .controller_data = &ads7846_mcspi_config, + .irq = OMAP_GPIO_IRQ(OVERO_GPIO_PENDOWN), + .platform_data = &ads7846_config, + }, +#endif +#if defined(CONFIG_PANEL_LGPHILIPS_LB035Q02) || \ + defined(CONFIG_PANEL_LGPHILIPS_LB035Q02_MODULE) + { + .modalias = "lgphilips_lb035q02_panel-spi", + .bus_num = 1, + .chip_select = 1, + .max_speed_hz = 500000, + .mode = SPI_MODE_3, + }, +#endif }; -static struct omap_board_config_kernel overo_config[] __initdata = { - { OMAP_TAG_LCD, &overo_lcd_config }, -}; +static int __init overo_spi_init(void) +{ + overo_ads7846_init(); + spi_register_board_info(overo_spi_board_info, + ARRAY_SIZE(overo_spi_board_info)); + return 0; +} static void __init overo_init_early(void) { @@ -414,15 +706,10 @@ static void __init overo_init_early(void) mt46h32m32lf6_sdrc_params); } -static struct platform_device *overo_devices[] __initdata = { - &overo_lcd_device, -}; - static const struct usbhs_omap_board_data usbhs_bdata __initconst = { .port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED, .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY, .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED, - .phy_reset = true, .reset_gpio_port[0] = -EINVAL, .reset_gpio_port[1] = OVERO_GPIO_USBH_NRESET, @@ -444,16 +731,18 @@ static struct omap_musb_board_data musb_board_data = { static void __init overo_init(void) { omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); - omap_board_config = overo_config; - omap_board_config_size = ARRAY_SIZE(overo_config); overo_i2c_init(); - platform_add_devices(overo_devices, ARRAY_SIZE(overo_devices)); + omap_display_init(&overo_dss_data); omap_serial_init(); overo_flash_init(); usb_musb_init(&musb_board_data); usbhs_init(&usbhs_bdata); + overo_spi_init(); overo_ads7846_init(); overo_init_smsc911x(); + overo_display_init(); + overo_init_led(); + overo_init_keys(); /* Ensure SDRC pins are mux'd for self-refresh */ omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT); diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c index 5f1900c..bbcb677 100644 --- a/arch/arm/mach-omap2/board-rx51-peripherals.c +++ b/arch/arm/mach-omap2/board-rx51-peripherals.c @@ -372,7 +372,7 @@ static struct regulator_consumer_supply rx51_vaux1_consumers[] = { }; static struct regulator_consumer_supply rx51_vdac_supply[] = { - REGULATOR_SUPPLY("vdda_dac", "omapdss"), + REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), }; static struct regulator_init_data rx51_vaux1 = { diff --git a/arch/arm/mach-omap2/board-zoom-peripherals.c b/arch/arm/mach-omap2/board-zoom-peripherals.c index 448ab60..8dee754 100644 --- a/arch/arm/mach-omap2/board-zoom-peripherals.c +++ b/arch/arm/mach-omap2/board-zoom-peripherals.c @@ -226,11 +226,13 @@ static struct omap2_hsmmc_info mmc[] = { {} /* Terminator */ }; -static struct regulator_consumer_supply zoom_vpll2_supply = - REGULATOR_SUPPLY("vdds_dsi", "omapdss"); +static struct regulator_consumer_supply zoom_vpll2_supplies[] = { + REGULATOR_SUPPLY("vdds_dsi", "omapdss"), + REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"), +}; static struct regulator_consumer_supply zoom_vdda_dac_supply = - REGULATOR_SUPPLY("vdda_dac", "omapdss"); + REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"); static struct regulator_init_data zoom_vpll2 = { .constraints = { @@ -241,8 +243,8 @@ static struct regulator_init_data zoom_vpll2 = { .valid_ops_mask = REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS, }, - .num_consumer_supplies = 1, - .consumer_supplies = &zoom_vpll2_supply, + .num_consumer_supplies = ARRAY_SIZE(zoom_vpll2_supplies), + .consumer_supplies = zoom_vpll2_supplies, }; static struct regulator_init_data zoom_vdac = { diff --git a/arch/arm/mach-omap2/clock2420_data.c b/arch/arm/mach-omap2/clock2420_data.c index b6f65d4..2926d02 100644 --- a/arch/arm/mach-omap2/clock2420_data.c +++ b/arch/arm/mach-omap2/clock2420_data.c @@ -1804,10 +1804,10 @@ static struct omap_clk omap2420_clks[] = { CLK(NULL, "gfx_2d_fck", &gfx_2d_fck, CK_242X), CLK(NULL, "gfx_ick", &gfx_ick, CK_242X), /* DSS domain clocks */ - CLK("omapdss", "ick", &dss_ick, CK_242X), - CLK("omapdss", "dss1_fck", &dss1_fck, CK_242X), - CLK("omapdss", "dss2_fck", &dss2_fck, CK_242X), - CLK("omapdss", "tv_fck", &dss_54m_fck, CK_242X), + CLK("omapdss_dss", "ick", &dss_ick, CK_242X), + CLK("omapdss_dss", "fck", &dss1_fck, CK_242X), + CLK("omapdss_dss", "sys_clk", &dss2_fck, CK_242X), + CLK("omapdss_dss", "tv_clk", &dss_54m_fck, CK_242X), /* L3 domain clocks */ CLK(NULL, "core_l3_ck", &core_l3_ck, CK_242X), CLK(NULL, "ssi_fck", &ssi_ssr_sst_fck, CK_242X), diff --git a/arch/arm/mach-omap2/clock2430_data.c b/arch/arm/mach-omap2/clock2430_data.c index bba0183..0c79d39 100644 --- a/arch/arm/mach-omap2/clock2430_data.c +++ b/arch/arm/mach-omap2/clock2430_data.c @@ -1894,10 +1894,10 @@ static struct omap_clk omap2430_clks[] = { CLK(NULL, "mdm_ick", &mdm_ick, CK_243X), CLK(NULL, "mdm_osc_ck", &mdm_osc_ck, CK_243X), /* DSS domain clocks */ - CLK("omapdss", "ick", &dss_ick, CK_243X), - CLK("omapdss", "dss1_fck", &dss1_fck, CK_243X), - CLK("omapdss", "dss2_fck", &dss2_fck, CK_243X), - CLK("omapdss", "tv_fck", &dss_54m_fck, CK_243X), + CLK("omapdss_dss", "ick", &dss_ick, CK_243X), + CLK("omapdss_dss", "fck", &dss1_fck, CK_243X), + CLK("omapdss_dss", "sys_clk", &dss2_fck, CK_243X), + CLK("omapdss_dss", "tv_clk", &dss_54m_fck, CK_243X), /* L3 domain clocks */ CLK(NULL, "core_l3_ck", &core_l3_ck, CK_243X), CLK(NULL, "ssi_fck", &ssi_ssr_sst_fck, CK_243X), diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c index fcb321a..75b119b 100644 --- a/arch/arm/mach-omap2/clock3xxx_data.c +++ b/arch/arm/mach-omap2/clock3xxx_data.c @@ -3356,13 +3356,13 @@ static struct omap_clk omap3xxx_clks[] = { CLK("omap_rng", "ick", &rng_ick, CK_34XX | CK_36XX), CLK(NULL, "sha11_ick", &sha11_ick, CK_34XX | CK_36XX), CLK(NULL, "des1_ick", &des1_ick, CK_34XX | CK_36XX), - CLK("omapdss", "dss1_fck", &dss1_alwon_fck_3430es1, CK_3430ES1), - CLK("omapdss", "dss1_fck", &dss1_alwon_fck_3430es2, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), - CLK("omapdss", "tv_fck", &dss_tv_fck, CK_3XXX), - CLK("omapdss", "video_fck", &dss_96m_fck, CK_3XXX), - CLK("omapdss", "dss2_fck", &dss2_alwon_fck, CK_3XXX), - CLK("omapdss", "ick", &dss_ick_3430es1, CK_3430ES1), - CLK("omapdss", "ick", &dss_ick_3430es2, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), + CLK("omapdss_dss", "fck", &dss1_alwon_fck_3430es1, CK_3430ES1), + CLK("omapdss_dss", "fck", &dss1_alwon_fck_3430es2, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), + CLK("omapdss_dss", "tv_clk", &dss_tv_fck, CK_3XXX), + CLK("omapdss_dss", "video_clk", &dss_96m_fck, CK_3XXX), + CLK("omapdss_dss", "sys_clk", &dss2_alwon_fck, CK_3XXX), + CLK("omapdss_dss", "ick", &dss_ick_3430es1, CK_3430ES1), + CLK("omapdss_dss", "ick", &dss_ick_3430es2, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), CLK(NULL, "cam_mclk", &cam_mclk, CK_34XX | CK_36XX), CLK(NULL, "cam_ick", &cam_ick, CK_34XX | CK_36XX), CLK(NULL, "csi2_96m_fck", &csi2_96m_fck, CK_34XX | CK_36XX), diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c index d32ed97..276992d 100644 --- a/arch/arm/mach-omap2/clock44xx_data.c +++ b/arch/arm/mach-omap2/clock44xx_data.c @@ -3114,11 +3114,16 @@ static struct omap_clk omap44xx_clks[] = { CLK(NULL, "dmic_sync_mux_ck", &dmic_sync_mux_ck, CK_443X), CLK(NULL, "dmic_fck", &dmic_fck, CK_443X), CLK(NULL, "dsp_fck", &dsp_fck, CK_443X), - CLK(NULL, "dss_sys_clk", &dss_sys_clk, CK_443X), - CLK(NULL, "dss_tv_clk", &dss_tv_clk, CK_443X), - CLK(NULL, "dss_dss_clk", &dss_dss_clk, CK_443X), - CLK(NULL, "dss_48mhz_clk", &dss_48mhz_clk, CK_443X), - CLK(NULL, "dss_fck", &dss_fck, CK_443X), + CLK("omapdss_dss", "sys_clk", &dss_sys_clk, CK_443X), + CLK("omapdss_dss", "tv_clk", &dss_tv_clk, CK_443X), + CLK("omapdss_dss", "dss_clk", &dss_dss_clk, CK_443X), + CLK("omapdss_dss", "video_clk", &dss_48mhz_clk, CK_443X), + CLK("omapdss_dss", "fck", &dss_fck, CK_443X), + /* + * On OMAP4, DSS ick is a dummy clock; this is needed for compatibility + * with OMAP2/3. + */ + CLK("omapdss_dss", "ick", &dummy_ck, CK_443X), CLK(NULL, "efuse_ctrl_cust_fck", &efuse_ctrl_cust_fck, CK_443X), CLK(NULL, "emif1_fck", &emif1_fck, CK_443X), CLK(NULL, "emif2_fck", &emif2_fck, CK_443X), diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c index 0d2d6a9..e978514 100644 --- a/arch/arm/mach-omap2/devices.c +++ b/arch/arm/mach-omap2/devices.c @@ -35,6 +35,7 @@ #include "mux.h" #include "control.h" +#include "devices.h" #define L3_MODULES_MAX_LEN 12 #define L3_MODULES 3 @@ -102,7 +103,7 @@ postcore_initcall(omap4_l3_init); #if defined(CONFIG_VIDEO_OMAP2) || defined(CONFIG_VIDEO_OMAP2_MODULE) -static struct resource cam_resources[] = { +static struct resource omap2cam_resources[] = { { .start = OMAP24XX_CAMERA_BASE, .end = OMAP24XX_CAMERA_BASE + 0xfff, @@ -114,19 +115,13 @@ static struct resource cam_resources[] = { } }; -static struct platform_device omap_cam_device = { +static struct platform_device omap2cam_device = { .name = "omap24xxcam", .id = -1, - .num_resources = ARRAY_SIZE(cam_resources), - .resource = cam_resources, + .num_resources = ARRAY_SIZE(omap2cam_resources), + .resource = omap2cam_resources, }; - -static inline void omap_init_camera(void) -{ - platform_device_register(&omap_cam_device); -} - -#elif defined(CONFIG_VIDEO_OMAP3) || defined(CONFIG_VIDEO_OMAP3_MODULE) +#endif static struct resource omap3isp_resources[] = { { @@ -135,11 +130,6 @@ static struct resource omap3isp_resources[] = { .flags = IORESOURCE_MEM, }, { - .start = OMAP3430_ISP_CBUFF_BASE, - .end = OMAP3430_ISP_CBUFF_END, - .flags = IORESOURCE_MEM, - }, - { .start = OMAP3430_ISP_CCP2_BASE, .end = OMAP3430_ISP_CCP2_END, .flags = IORESOURCE_MEM, @@ -175,13 +165,33 @@ static struct resource omap3isp_resources[] = { .flags = IORESOURCE_MEM, }, { - .start = OMAP3430_ISP_CSI2A_BASE, - .end = OMAP3430_ISP_CSI2A_END, + .start = OMAP3430_ISP_CSI2A_REGS1_BASE, + .end = OMAP3430_ISP_CSI2A_REGS1_END, + .flags = IORESOURCE_MEM, + }, + { + .start = OMAP3430_ISP_CSIPHY2_BASE, + .end = OMAP3430_ISP_CSIPHY2_END, + .flags = IORESOURCE_MEM, + }, + { + .start = OMAP3630_ISP_CSI2A_REGS2_BASE, + .end = OMAP3630_ISP_CSI2A_REGS2_END, + .flags = IORESOURCE_MEM, + }, + { + .start = OMAP3630_ISP_CSI2C_REGS1_BASE, + .end = OMAP3630_ISP_CSI2C_REGS1_END, + .flags = IORESOURCE_MEM, + }, + { + .start = OMAP3630_ISP_CSIPHY1_BASE, + .end = OMAP3630_ISP_CSIPHY1_END, .flags = IORESOURCE_MEM, }, { - .start = OMAP3430_ISP_CSI2PHY_BASE, - .end = OMAP3430_ISP_CSI2PHY_END, + .start = OMAP3630_ISP_CSI2C_REGS2_BASE, + .end = OMAP3630_ISP_CSI2C_REGS2_END, .flags = IORESOURCE_MEM, }, { @@ -197,15 +207,19 @@ static struct platform_device omap3isp_device = { .resource = omap3isp_resources, }; -static inline void omap_init_camera(void) +int omap3_init_camera(struct isp_platform_data *pdata) { - platform_device_register(&omap3isp_device); + omap3isp_device.dev.platform_data = pdata; + return platform_device_register(&omap3isp_device); } -#else + static inline void omap_init_camera(void) { -} +#if defined(CONFIG_VIDEO_OMAP2) || defined(CONFIG_VIDEO_OMAP2_MODULE) + if (cpu_is_omap24xx()) + platform_device_register(&omap2cam_device); #endif +} struct omap_device_pm_latency omap_keyboard_latency[] = { { diff --git a/arch/arm/mach-omap2/devices.h b/arch/arm/mach-omap2/devices.h new file mode 100644 index 0000000..f61eb6e --- /dev/null +++ b/arch/arm/mach-omap2/devices.h @@ -0,0 +1,19 @@ +/* + * arch/arm/mach-omap2/devices.h + * + * OMAP2 platform device setup/initialization + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef __ARCH_ARM_MACH_OMAP_DEVICES_H +#define __ARCH_ARM_MACH_OMAP_DEVICES_H + +struct isp_platform_data; + +int omap3_init_camera(struct isp_platform_data *pdata); + +#endif diff --git a/arch/arm/mach-omap2/display.c b/arch/arm/mach-omap2/display.c index b18db84..256d23f 100644 --- a/arch/arm/mach-omap2/display.c +++ b/arch/arm/mach-omap2/display.c @@ -23,6 +23,8 @@ #include <linux/err.h> #include <plat/display.h> +#include <plat/omap_hwmod.h> +#include <plat/omap_device.h> static struct platform_device omap_display_device = { .name = "omapdss", @@ -32,9 +34,87 @@ static struct platform_device omap_display_device = { }, }; +static struct omap_device_pm_latency omap_dss_latency[] = { + [0] = { + .deactivate_func = omap_device_idle_hwmods, + .activate_func = omap_device_enable_hwmods, + .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST, + }, +}; + +/* oh_core is used for getting opt-clocks */ +static struct omap_hwmod *oh_core; + +static bool opt_clock_available(const char *clk_role) +{ + int i; + + for (i = 0; i < oh_core->opt_clks_cnt; i++) { + if (!strcmp(oh_core->opt_clks[i].role, clk_role)) + return true; + } + return false; +} + int __init omap_display_init(struct omap_dss_board_info *board_data) { int r = 0; + struct omap_hwmod *oh; + struct omap_device *od; + int i; + struct omap_display_platform_data pdata; + + /* + * omap: valid DSS hwmod names + * omap2,3,4: dss_core, dss_dispc, dss_rfbi, dss_venc + * omap3,4: dss_dsi1 + * omap4: dss_dsi2, dss_hdmi + */ + char *oh_name[] = { "dss_core", "dss_dispc", "dss_rfbi", "dss_venc", + "dss_dsi1", "dss_dsi2", "dss_hdmi" }; + char *dev_name[] = { "omapdss_dss", "omapdss_dispc", "omapdss_rfbi", + "omapdss_venc", "omapdss_dsi1", "omapdss_dsi2", + "omapdss_hdmi" }; + int oh_count; + + memset(&pdata, 0, sizeof(pdata)); + + if (cpu_is_omap24xx()) + oh_count = ARRAY_SIZE(oh_name) - 3; + /* last 3 hwmod dev in oh_name are not available for omap2 */ + else if (cpu_is_omap44xx()) + oh_count = ARRAY_SIZE(oh_name); + else + oh_count = ARRAY_SIZE(oh_name) - 2; + /* last 2 hwmod dev in oh_name are not available for omap3 */ + + /* opt_clks are always associated with dss hwmod */ + oh_core = omap_hwmod_lookup("dss_core"); + if (!oh_core) { + pr_err("Could not look up dss_core.\n"); + return -ENODEV; + } + + pdata.board_data = board_data; + pdata.board_data->get_last_off_on_transaction_id = NULL; + pdata.opt_clock_available = opt_clock_available; + + for (i = 0; i < oh_count; i++) { + oh = omap_hwmod_lookup(oh_name[i]); + if (!oh) { + pr_err("Could not look up %s\n", oh_name[i]); + return -ENODEV; + } + + od = omap_device_build(dev_name[i], -1, oh, &pdata, + sizeof(struct omap_display_platform_data), + omap_dss_latency, + ARRAY_SIZE(omap_dss_latency), 0); + + if (WARN((IS_ERR(od)), "Could not build omap_device for %s\n", + oh_name[i])) + return -ENODEV; + } omap_display_device.dev.platform_data = board_data; r = platform_device_register(&omap_display_device); diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c index 6282346..8eb3ce1 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c @@ -1168,11 +1168,6 @@ static struct omap_hwmod_class omap2420_dss_hwmod_class = { .sysc = &omap2420_dss_sysc, }; -/* dss */ -static struct omap_hwmod_irq_info omap2420_dss_irqs[] = { - { .irq = 25 }, -}; - static struct omap_hwmod_dma_info omap2420_dss_sdma_chs[] = { { .name = "dispc", .dma_req = 5 }, }; @@ -1221,8 +1216,6 @@ static struct omap_hwmod omap2420_dss_core_hwmod = { .name = "dss_core", .class = &omap2420_dss_hwmod_class, .main_clk = "dss1_fck", /* instead of dss_fck */ - .mpu_irqs = omap2420_dss_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_dss_irqs), .sdma_reqs = omap2420_dss_sdma_chs, .sdma_reqs_cnt = ARRAY_SIZE(omap2420_dss_sdma_chs), .prcm = { @@ -1265,6 +1258,10 @@ static struct omap_hwmod_class omap2420_dispc_hwmod_class = { .sysc = &omap2420_dispc_sysc, }; +static struct omap_hwmod_irq_info omap2420_dispc_irqs[] = { + { .irq = 25 }, +}; + static struct omap_hwmod_addr_space omap2420_dss_dispc_addrs[] = { { .pa_start = 0x48050400, @@ -1297,6 +1294,8 @@ static struct omap_hwmod_ocp_if *omap2420_dss_dispc_slaves[] = { static struct omap_hwmod omap2420_dss_dispc_hwmod = { .name = "dss_dispc", .class = &omap2420_dispc_hwmod_class, + .mpu_irqs = omap2420_dispc_irqs, + .mpu_irqs_cnt = ARRAY_SIZE(omap2420_dispc_irqs), .main_clk = "dss1_fck", .prcm = { .omap2 = { diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c index 0fdf2ca..a860fb5 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c @@ -1268,10 +1268,6 @@ static struct omap_hwmod_class omap2430_dss_hwmod_class = { .sysc = &omap2430_dss_sysc, }; -/* dss */ -static struct omap_hwmod_irq_info omap2430_dss_irqs[] = { - { .irq = 25 }, -}; static struct omap_hwmod_dma_info omap2430_dss_sdma_chs[] = { { .name = "dispc", .dma_req = 5 }, }; @@ -1314,8 +1310,6 @@ static struct omap_hwmod omap2430_dss_core_hwmod = { .name = "dss_core", .class = &omap2430_dss_hwmod_class, .main_clk = "dss1_fck", /* instead of dss_fck */ - .mpu_irqs = omap2430_dss_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_dss_irqs), .sdma_reqs = omap2430_dss_sdma_chs, .sdma_reqs_cnt = ARRAY_SIZE(omap2430_dss_sdma_chs), .prcm = { @@ -1358,6 +1352,10 @@ static struct omap_hwmod_class omap2430_dispc_hwmod_class = { .sysc = &omap2430_dispc_sysc, }; +static struct omap_hwmod_irq_info omap2430_dispc_irqs[] = { + { .irq = 25 }, +}; + static struct omap_hwmod_addr_space omap2430_dss_dispc_addrs[] = { { .pa_start = 0x48050400, @@ -1384,6 +1382,8 @@ static struct omap_hwmod_ocp_if *omap2430_dss_dispc_slaves[] = { static struct omap_hwmod omap2430_dss_dispc_hwmod = { .name = "dss_dispc", .class = &omap2430_dispc_hwmod_class, + .mpu_irqs = omap2430_dispc_irqs, + .mpu_irqs_cnt = ARRAY_SIZE(omap2430_dispc_irqs), .main_clk = "dss1_fck", .prcm = { .omap2 = { diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c index c819c30..b98e2dfc 100644 --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c @@ -1480,11 +1480,6 @@ static struct omap_hwmod_class omap3xxx_dss_hwmod_class = { .sysc = &omap3xxx_dss_sysc, }; -/* dss */ -static struct omap_hwmod_irq_info omap3xxx_dss_irqs[] = { - { .irq = 25 }, -}; - static struct omap_hwmod_dma_info omap3xxx_dss_sdma_chs[] = { { .name = "dispc", .dma_req = 5 }, { .name = "dsi1", .dma_req = 74 }, @@ -1548,7 +1543,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_slaves[] = { static struct omap_hwmod_opt_clk dss_opt_clks[] = { { .role = "tv_clk", .clk = "dss_tv_fck" }, - { .role = "dssclk", .clk = "dss_96m_fck" }, + { .role = "video_clk", .clk = "dss_96m_fck" }, { .role = "sys_clk", .clk = "dss2_alwon_fck" }, }; @@ -1556,8 +1551,6 @@ static struct omap_hwmod omap3430es1_dss_core_hwmod = { .name = "dss_core", .class = &omap3xxx_dss_hwmod_class, .main_clk = "dss1_alwon_fck", /* instead of dss_fck */ - .mpu_irqs = omap3xxx_dss_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_dss_irqs), .sdma_reqs = omap3xxx_dss_sdma_chs, .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_dss_sdma_chs), @@ -1584,8 +1577,6 @@ static struct omap_hwmod omap3xxx_dss_core_hwmod = { .name = "dss_core", .class = &omap3xxx_dss_hwmod_class, .main_clk = "dss1_alwon_fck", /* instead of dss_fck */ - .mpu_irqs = omap3xxx_dss_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_dss_irqs), .sdma_reqs = omap3xxx_dss_sdma_chs, .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_dss_sdma_chs), @@ -1631,6 +1622,10 @@ static struct omap_hwmod_class omap3xxx_dispc_hwmod_class = { .sysc = &omap3xxx_dispc_sysc, }; +static struct omap_hwmod_irq_info omap3xxx_dispc_irqs[] = { + { .irq = 25 }, +}; + static struct omap_hwmod_addr_space omap3xxx_dss_dispc_addrs[] = { { .pa_start = 0x48050400, @@ -1664,6 +1659,8 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_dispc_slaves[] = { static struct omap_hwmod omap3xxx_dss_dispc_hwmod = { .name = "dss_dispc", .class = &omap3xxx_dispc_hwmod_class, + .mpu_irqs = omap3xxx_dispc_irqs, + .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_dispc_irqs), .main_clk = "dss1_alwon_fck", .prcm = { .omap2 = { @@ -1689,6 +1686,10 @@ static struct omap_hwmod_class omap3xxx_dsi_hwmod_class = { .name = "dsi", }; +static struct omap_hwmod_irq_info omap3xxx_dsi1_irqs[] = { + { .irq = 25 }, +}; + /* dss_dsi1 */ static struct omap_hwmod_addr_space omap3xxx_dss_dsi1_addrs[] = { { @@ -1722,6 +1723,8 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_dsi1_slaves[] = { static struct omap_hwmod omap3xxx_dss_dsi1_hwmod = { .name = "dss_dsi1", .class = &omap3xxx_dsi_hwmod_class, + .mpu_irqs = omap3xxx_dsi1_irqs, + .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_dsi1_irqs), .main_clk = "dss1_alwon_fck", .prcm = { .omap2 = { diff --git a/arch/arm/mach-omap2/timer-mpu.c b/arch/arm/mach-omap2/timer-mpu.c index 954682e..31c0ac4 100644 --- a/arch/arm/mach-omap2/timer-mpu.c +++ b/arch/arm/mach-omap2/timer-mpu.c @@ -26,9 +26,14 @@ /* * Setup the local clock events for a CPU. */ -void __cpuinit local_timer_setup(struct clock_event_device *evt) +int __cpuinit local_timer_setup(struct clock_event_device *evt) { + /* Local timers are not supprted on OMAP4430 ES1.0 */ + if (omap_rev() == OMAP4430_REV_ES1_0) + return -ENXIO; + evt->irq = OMAP44XX_IRQ_LOCALTIMER; twd_timer_setup(evt); + return 0; } diff --git a/arch/arm/mach-pxa/balloon3.c b/arch/arm/mach-pxa/balloon3.c index e194d92..d2af733 100644 --- a/arch/arm/mach-pxa/balloon3.c +++ b/arch/arm/mach-pxa/balloon3.c @@ -27,6 +27,7 @@ #include <linux/mtd/partitions.h> #include <linux/types.h> #include <linux/i2c/pcf857x.h> +#include <linux/i2c/pxa-i2c.h> #include <linux/mtd/nand.h> #include <linux/mtd/physmap.h> #include <linux/regulator/max1586.h> @@ -51,8 +52,6 @@ #include <mach/irda.h> #include <mach/ohci.h> -#include <plat/i2c.h> - #include "generic.h" #include "devices.h" diff --git a/arch/arm/mach-pxa/cm-x300.c b/arch/arm/mach-pxa/cm-x300.c index 7984268..bfca7ed 100644 --- a/arch/arm/mach-pxa/cm-x300.c +++ b/arch/arm/mach-pxa/cm-x300.c @@ -29,6 +29,7 @@ #include <linux/i2c.h> #include <linux/i2c/pca953x.h> +#include <linux/i2c/pxa-i2c.h> #include <linux/mfd/da903x.h> #include <linux/regulator/machine.h> @@ -48,7 +49,6 @@ #include <mach/pxafb.h> #include <mach/mmc.h> #include <mach/ohci.h> -#include <plat/i2c.h> #include <plat/pxa3xx_nand.h> #include <mach/audio.h> #include <mach/pxa3xx-u2d.h> diff --git a/arch/arm/mach-pxa/colibri-evalboard.c b/arch/arm/mach-pxa/colibri-evalboard.c index 28f667e..81c3c43 100644 --- a/arch/arm/mach-pxa/colibri-evalboard.c +++ b/arch/arm/mach-pxa/colibri-evalboard.c @@ -20,6 +20,7 @@ #include <mach/hardware.h> #include <asm/mach/arch.h> #include <linux/i2c.h> +#include <linux/i2c/pxa-i2c.h> #include <mach/pxa27x.h> #include <mach/colibri.h> @@ -27,8 +28,6 @@ #include <mach/ohci.h> #include <mach/pxa27x-udc.h> -#include <plat/i2c.h> - #include "generic.h" #include "devices.h" diff --git a/arch/arm/mach-pxa/colibri-pxa270-income.c b/arch/arm/mach-pxa/colibri-pxa270-income.c index 07b62a0..ee797397 100644 --- a/arch/arm/mach-pxa/colibri-pxa270-income.c +++ b/arch/arm/mach-pxa/colibri-pxa270-income.c @@ -21,6 +21,7 @@ #include <linux/kernel.h> #include <linux/platform_device.h> #include <linux/pwm_backlight.h> +#include <linux/i2c/pxa-i2c.h> #include <linux/sysdev.h> #include <asm/irq.h> @@ -33,8 +34,6 @@ #include <mach/pxa27x-udc.h> #include <mach/pxafb.h> -#include <plat/i2c.h> - #include "devices.h" #include "generic.h" diff --git a/arch/arm/mach-pxa/corgi.c b/arch/arm/mach-pxa/corgi.c index a5452a3..d4e705c 100644 --- a/arch/arm/mach-pxa/corgi.c +++ b/arch/arm/mach-pxa/corgi.c @@ -24,6 +24,7 @@ #include <linux/gpio.h> #include <linux/backlight.h> #include <linux/i2c.h> +#include <linux/i2c/pxa-i2c.h> #include <linux/io.h> #include <linux/spi/spi.h> #include <linux/spi/ads7846.h> @@ -45,7 +46,6 @@ #include <asm/mach/irq.h> #include <mach/pxa25x.h> -#include <plat/i2c.h> #include <mach/irda.h> #include <mach/mmc.h> #include <mach/udc.h> diff --git a/arch/arm/mach-pxa/csb726.c b/arch/arm/mach-pxa/csb726.c index a305424..0481c29 100644 --- a/arch/arm/mach-pxa/csb726.c +++ b/arch/arm/mach-pxa/csb726.c @@ -17,12 +17,12 @@ #include <linux/mtd/partitions.h> #include <linux/sm501.h> #include <linux/smsc911x.h> +#include <linux/i2c/pxa-i2c.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <mach/csb726.h> #include <mach/mfp-pxa27x.h> -#include <plat/i2c.h> #include <mach/mmc.h> #include <mach/ohci.h> #include <mach/pxa2xx-regs.h> diff --git a/arch/arm/mach-pxa/devices.c b/arch/arm/mach-pxa/devices.c index 4c766e3..c4bf08b 100644 --- a/arch/arm/mach-pxa/devices.c +++ b/arch/arm/mach-pxa/devices.c @@ -4,6 +4,7 @@ #include <linux/platform_device.h> #include <linux/dma-mapping.h> #include <linux/spi/pxa2xx_spi.h> +#include <linux/i2c/pxa-i2c.h> #include <asm/pmu.h> #include <mach/udc.h> @@ -16,7 +17,6 @@ #include <mach/camera.h> #include <mach/audio.h> #include <mach/hardware.h> -#include <plat/i2c.h> #include <plat/pxa3xx_nand.h> #include "devices.h" diff --git a/arch/arm/mach-pxa/em-x270.c b/arch/arm/mach-pxa/em-x270.c index a78bb30..b411d7c 100644 --- a/arch/arm/mach-pxa/em-x270.c +++ b/arch/arm/mach-pxa/em-x270.c @@ -31,6 +31,7 @@ #include <linux/apm-emulation.h> #include <linux/i2c.h> #include <linux/i2c/pca953x.h> +#include <linux/i2c/pxa-i2c.h> #include <linux/regulator/userspace-consumer.h> #include <media/soc_camera.h> @@ -45,7 +46,6 @@ #include <mach/ohci.h> #include <mach/mmc.h> #include <plat/pxa27x_keypad.h> -#include <plat/i2c.h> #include <mach/camera.h> #include "generic.h" diff --git a/arch/arm/mach-pxa/ezx.c b/arch/arm/mach-pxa/ezx.c index 87cec0a..93f05e0 100644 --- a/arch/arm/mach-pxa/ezx.c +++ b/arch/arm/mach-pxa/ezx.c @@ -20,6 +20,7 @@ #include <linux/gpio.h> #include <linux/gpio_keys.h> #include <linux/leds-lp3944.h> +#include <linux/i2c/pxa-i2c.h> #include <media/soc_camera.h> @@ -30,7 +31,6 @@ #include <mach/pxa27x.h> #include <mach/pxafb.h> #include <mach/ohci.h> -#include <plat/i2c.h> #include <mach/hardware.h> #include <plat/pxa27x_keypad.h> #include <mach/camera.h> diff --git a/arch/arm/mach-pxa/hx4700.c b/arch/arm/mach-pxa/hx4700.c index a908e0a..6de0ad0 100644 --- a/arch/arm/mach-pxa/hx4700.c +++ b/arch/arm/mach-pxa/hx4700.c @@ -35,6 +35,7 @@ #include <linux/spi/spi.h> #include <linux/spi/pxa2xx_spi.h> #include <linux/usb/gpio_vbus.h> +#include <linux/i2c/pxa-i2c.h> #include <mach/hardware.h> #include <asm/mach-types.h> @@ -42,7 +43,6 @@ #include <mach/pxa27x.h> #include <mach/hx4700.h> -#include <plat/i2c.h> #include <mach/irda.h> #include <video/platform_lcd.h> diff --git a/arch/arm/mach-pxa/littleton.c b/arch/arm/mach-pxa/littleton.c index ccb7bfa..87c1ed9 100644 --- a/arch/arm/mach-pxa/littleton.c +++ b/arch/arm/mach-pxa/littleton.c @@ -28,6 +28,7 @@ #include <linux/leds.h> #include <linux/mfd/da903x.h> #include <linux/i2c/max732x.h> +#include <linux/i2c/pxa-i2c.h> #include <asm/types.h> #include <asm/setup.h> @@ -45,7 +46,6 @@ #include <mach/mmc.h> #include <plat/pxa27x_keypad.h> #include <mach/littleton.h> -#include <plat/i2c.h> #include <plat/pxa3xx_nand.h> #include "generic.h" diff --git a/arch/arm/mach-pxa/magician.c b/arch/arm/mach-pxa/magician.c index 41198f0..5535991 100644 --- a/arch/arm/mach-pxa/magician.c +++ b/arch/arm/mach-pxa/magician.c @@ -28,6 +28,7 @@ #include <linux/regulator/bq24022.h> #include <linux/regulator/machine.h> #include <linux/usb/gpio_vbus.h> +#include <linux/i2c/pxa-i2c.h> #include <mach/hardware.h> #include <asm/mach-types.h> @@ -36,7 +37,6 @@ #include <mach/pxa27x.h> #include <mach/magician.h> #include <mach/pxafb.h> -#include <plat/i2c.h> #include <mach/mmc.h> #include <mach/irda.h> #include <mach/ohci.h> diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c index d4b6f23..f954222 100644 --- a/arch/arm/mach-pxa/mainstone.c +++ b/arch/arm/mach-pxa/mainstone.c @@ -27,6 +27,7 @@ #include <linux/gpio_keys.h> #include <linux/pwm_backlight.h> #include <linux/smc91x.h> +#include <linux/i2c/pxa-i2c.h> #include <asm/types.h> #include <asm/setup.h> @@ -46,7 +47,6 @@ #include <mach/mainstone.h> #include <mach/audio.h> #include <mach/pxafb.h> -#include <plat/i2c.h> #include <mach/mmc.h> #include <mach/irda.h> #include <mach/ohci.h> diff --git a/arch/arm/mach-pxa/mioa701.c b/arch/arm/mach-pxa/mioa701.c index faafea3..78d98a8 100644 --- a/arch/arm/mach-pxa/mioa701.c +++ b/arch/arm/mach-pxa/mioa701.c @@ -39,6 +39,7 @@ #include <linux/usb/gpio_vbus.h> #include <linux/regulator/max1586.h> #include <linux/slab.h> +#include <linux/i2c/pxa-i2c.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> @@ -50,7 +51,6 @@ #include <mach/mmc.h> #include <mach/udc.h> #include <mach/pxa27x-udc.h> -#include <plat/i2c.h> #include <mach/camera.h> #include <mach/audio.h> #include <media/soc_camera.h> diff --git a/arch/arm/mach-pxa/mxm8x10.c b/arch/arm/mach-pxa/mxm8x10.c index cdf7f41..b5a8fd3 100644 --- a/arch/arm/mach-pxa/mxm8x10.c +++ b/arch/arm/mach-pxa/mxm8x10.c @@ -22,8 +22,8 @@ #include <linux/serial_8250.h> #include <linux/dm9000.h> #include <linux/gpio.h> +#include <linux/i2c/pxa-i2c.h> -#include <plat/i2c.h> #include <plat/pxa3xx_nand.h> #include <mach/pxafb.h> diff --git a/arch/arm/mach-pxa/palm27x.c b/arch/arm/mach-pxa/palm27x.c index 35572c4..72adb3ae 100644 --- a/arch/arm/mach-pxa/palm27x.c +++ b/arch/arm/mach-pxa/palm27x.c @@ -22,6 +22,7 @@ #include <linux/power_supply.h> #include <linux/usb/gpio_vbus.h> #include <linux/regulator/max1586.h> +#include <linux/i2c/pxa-i2c.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> @@ -36,8 +37,6 @@ #include <mach/palmasoc.h> #include <mach/palm27x.h> -#include <plat/i2c.h> - #include "generic.h" #include "devices.h" diff --git a/arch/arm/mach-pxa/pcm990-baseboard.c b/arch/arm/mach-pxa/pcm990-baseboard.c index 90820fa..9dbf3ccd 100644 --- a/arch/arm/mach-pxa/pcm990-baseboard.c +++ b/arch/arm/mach-pxa/pcm990-baseboard.c @@ -23,12 +23,12 @@ #include <linux/irq.h> #include <linux/platform_device.h> #include <linux/i2c.h> +#include <linux/i2c/pxa-i2c.h> #include <linux/pwm_backlight.h> #include <media/soc_camera.h> #include <asm/gpio.h> -#include <plat/i2c.h> #include <mach/camera.h> #include <asm/mach/map.h> #include <mach/pxa27x.h> diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c index 4f0ff1a..35353af 100644 --- a/arch/arm/mach-pxa/poodle.c +++ b/arch/arm/mach-pxa/poodle.c @@ -23,6 +23,7 @@ #include <linux/mtd/physmap.h> #include <linux/gpio.h> #include <linux/i2c.h> +#include <linux/i2c/pxa-i2c.h> #include <linux/spi/spi.h> #include <linux/spi/ads7846.h> #include <linux/spi/pxa2xx_spi.h> @@ -44,7 +45,6 @@ #include <mach/irda.h> #include <mach/poodle.h> #include <mach/pxafb.h> -#include <plat/i2c.h> #include <asm/hardware/scoop.h> #include <asm/hardware/locomo.h> diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c index 28b11be..1cb5d0f 100644 --- a/arch/arm/mach-pxa/pxa27x.c +++ b/arch/arm/mach-pxa/pxa27x.c @@ -19,6 +19,7 @@ #include <linux/sysdev.h> #include <linux/io.h> #include <linux/irq.h> +#include <linux/i2c/pxa-i2c.h> #include <asm/mach/map.h> #include <mach/hardware.h> @@ -32,8 +33,6 @@ #include <mach/dma.h> #include <mach/smemc.h> -#include <plat/i2c.h> - #include "generic.h" #include "devices.h" #include "clock.h" diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c index 1230343..f374247 100644 --- a/arch/arm/mach-pxa/pxa3xx.c +++ b/arch/arm/mach-pxa/pxa3xx.c @@ -21,6 +21,7 @@ #include <linux/irq.h> #include <linux/io.h> #include <linux/sysdev.h> +#include <linux/i2c/pxa-i2c.h> #include <asm/mach/map.h> #include <mach/hardware.h> @@ -32,7 +33,6 @@ #include <mach/dma.h> #include <mach/regs-intc.h> #include <mach/smemc.h> -#include <plat/i2c.h> #include "generic.h" #include "devices.h" diff --git a/arch/arm/mach-pxa/pxa95x.c b/arch/arm/mach-pxa/pxa95x.c index 437980f..23b229b 100644 --- a/arch/arm/mach-pxa/pxa95x.c +++ b/arch/arm/mach-pxa/pxa95x.c @@ -15,6 +15,7 @@ #include <linux/init.h> #include <linux/pm.h> #include <linux/platform_device.h> +#include <linux/i2c/pxa-i2c.h> #include <linux/irq.h> #include <linux/io.h> #include <linux/sysdev.h> @@ -27,7 +28,6 @@ #include <mach/pm.h> #include <mach/dma.h> #include <mach/regs-intc.h> -#include <plat/i2c.h> #include "generic.h" #include "devices.h" diff --git a/arch/arm/mach-pxa/raumfeld.c b/arch/arm/mach-pxa/raumfeld.c index 8361151..4709418 100644 --- a/arch/arm/mach-pxa/raumfeld.c +++ b/arch/arm/mach-pxa/raumfeld.c @@ -32,6 +32,7 @@ #include <linux/sched.h> #include <linux/pwm_backlight.h> #include <linux/i2c.h> +#include <linux/i2c/pxa-i2c.h> #include <linux/spi/spi.h> #include <linux/spi/spi_gpio.h> #include <linux/lis3lv02d.h> @@ -53,7 +54,6 @@ #include <mach/ohci.h> #include <mach/pxafb.h> #include <mach/mmc.h> -#include <plat/i2c.h> #include <plat/pxa3xx_nand.h> #include "generic.h" diff --git a/arch/arm/mach-pxa/saar.c b/arch/arm/mach-pxa/saar.c index c1ca8cb..eb83c89 100644 --- a/arch/arm/mach-pxa/saar.c +++ b/arch/arm/mach-pxa/saar.c @@ -20,6 +20,7 @@ #include <linux/delay.h> #include <linux/fb.h> #include <linux/i2c.h> +#include <linux/i2c/pxa-i2c.h> #include <linux/smc91x.h> #include <linux/mfd/da903x.h> #include <linux/mtd/mtd.h> @@ -31,7 +32,6 @@ #include <asm/mach/flash.h> #include <mach/pxa930.h> -#include <plat/i2c.h> #include <mach/pxafb.h> #include "devices.h" diff --git a/arch/arm/mach-pxa/saarb.c b/arch/arm/mach-pxa/saarb.c index e497922..9322fe5 100644 --- a/arch/arm/mach-pxa/saarb.c +++ b/arch/arm/mach-pxa/saarb.c @@ -13,6 +13,7 @@ #include <linux/init.h> #include <linux/kernel.h> #include <linux/i2c.h> +#include <linux/i2c/pxa-i2c.h> #include <linux/mfd/88pm860x.h> #include <asm/mach-types.h> @@ -24,8 +25,6 @@ #include <mach/mfp-pxa930.h> #include <mach/gpio.h> -#include <plat/i2c.h> - #include "generic.h" #define SAARB_NR_IRQS (IRQ_BOARD_START + 40) diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c index b49a2c2..38e2c09 100644 --- a/arch/arm/mach-pxa/spitz.c +++ b/arch/arm/mach-pxa/spitz.c @@ -19,6 +19,7 @@ #include <linux/gpio.h> #include <linux/leds.h> #include <linux/i2c.h> +#include <linux/i2c/pxa-i2c.h> #include <linux/i2c/pca953x.h> #include <linux/spi/spi.h> #include <linux/spi/ads7846.h> @@ -47,8 +48,6 @@ #include <mach/sharpsl_pm.h> #include <mach/smemc.h> -#include <plat/i2c.h> - #include "generic.h" #include "devices.h" diff --git a/arch/arm/mach-pxa/stargate2.c b/arch/arm/mach-pxa/stargate2.c index 9a14fdb..cb5611d 100644 --- a/arch/arm/mach-pxa/stargate2.c +++ b/arch/arm/mach-pxa/stargate2.c @@ -25,6 +25,7 @@ #include <linux/mtd/plat-ram.h> #include <linux/mtd/partitions.h> +#include <linux/i2c/pxa-i2c.h> #include <linux/i2c/pcf857x.h> #include <linux/i2c/at24.h> #include <linux/smc91x.h> @@ -43,7 +44,6 @@ #include <asm/mach/flash.h> #include <mach/pxa27x.h> -#include <plat/i2c.h> #include <mach/mmc.h> #include <mach/udc.h> #include <mach/pxa27x-udc.h> diff --git a/arch/arm/mach-pxa/tavorevb3.c b/arch/arm/mach-pxa/tavorevb3.c index 70191a9..79f4422 100644 --- a/arch/arm/mach-pxa/tavorevb3.c +++ b/arch/arm/mach-pxa/tavorevb3.c @@ -15,6 +15,7 @@ #include <linux/platform_device.h> #include <linux/interrupt.h> #include <linux/i2c.h> +#include <linux/i2c/pxa-i2c.h> #include <linux/gpio.h> #include <linux/mfd/88pm860x.h> @@ -23,8 +24,6 @@ #include <mach/pxa930.h> -#include <plat/i2c.h> - #include "devices.h" #include "generic.h" diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c index f2582ec..5ad3807 100644 --- a/arch/arm/mach-pxa/tosa.c +++ b/arch/arm/mach-pxa/tosa.c @@ -34,6 +34,7 @@ #include <linux/spi/spi.h> #include <linux/spi/pxa2xx_spi.h> #include <linux/input/matrix_keypad.h> +#include <linux/i2c/pxa-i2c.h> #include <asm/setup.h> #include <asm/mach-types.h> @@ -41,7 +42,6 @@ #include <mach/pxa25x.h> #include <mach/reset.h> #include <mach/irda.h> -#include <plat/i2c.h> #include <mach/mmc.h> #include <mach/udc.h> #include <mach/tosa_bt.h> diff --git a/arch/arm/mach-pxa/trizeps4.c b/arch/arm/mach-pxa/trizeps4.c index 423261d..857bb2e 100644 --- a/arch/arm/mach-pxa/trizeps4.c +++ b/arch/arm/mach-pxa/trizeps4.c @@ -26,6 +26,7 @@ #include <linux/dm9000.h> #include <linux/mtd/physmap.h> #include <linux/mtd/partitions.h> +#include <linux/i2c/pxa-i2c.h> #include <asm/types.h> #include <asm/setup.h> @@ -47,7 +48,6 @@ #include <mach/irda.h> #include <mach/ohci.h> #include <mach/smemc.h> -#include <plat/i2c.h> #include "generic.h" #include "devices.h" diff --git a/arch/arm/mach-pxa/viper.c b/arch/arm/mach-pxa/viper.c index 49eeeab..1227921 100644 --- a/arch/arm/mach-pxa/viper.c +++ b/arch/arm/mach-pxa/viper.c @@ -36,6 +36,7 @@ #include <linux/gpio.h> #include <linux/jiffies.h> #include <linux/i2c-gpio.h> +#include <linux/i2c/pxa-i2c.h> #include <linux/serial_8250.h> #include <linux/smc91x.h> #include <linux/pwm_backlight.h> @@ -47,7 +48,6 @@ #include <mach/pxa25x.h> #include <mach/audio.h> #include <mach/pxafb.h> -#include <plat/i2c.h> #include <mach/regs-uart.h> #include <mach/arcom-pcmcia.h> #include <mach/viper.h> diff --git a/arch/arm/mach-pxa/vpac270.c b/arch/arm/mach-pxa/vpac270.c index b9b5797..e709fd45 100644 --- a/arch/arm/mach-pxa/vpac270.c +++ b/arch/arm/mach-pxa/vpac270.c @@ -26,6 +26,7 @@ #include <linux/ucb1400.h> #include <linux/ata_platform.h> #include <linux/regulator/max1586.h> +#include <linux/i2c/pxa-i2c.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> @@ -40,8 +41,6 @@ #include <mach/udc.h> #include <mach/pata_pxa.h> -#include <plat/i2c.h> - #include "generic.h" #include "devices.h" diff --git a/arch/arm/mach-pxa/xcep.c b/arch/arm/mach-pxa/xcep.c index 51c0281..f55f8f2 100644 --- a/arch/arm/mach-pxa/xcep.c +++ b/arch/arm/mach-pxa/xcep.c @@ -16,6 +16,7 @@ #include <linux/platform_device.h> #include <linux/i2c.h> +#include <linux/i2c/pxa-i2c.h> #include <linux/smc91x.h> #include <linux/mtd/mtd.h> #include <linux/mtd/partitions.h> @@ -26,8 +27,6 @@ #include <asm/mach/irq.h> #include <asm/mach/map.h> -#include <plat/i2c.h> - #include <mach/hardware.h> #include <mach/pxa2xx-regs.h> #include <mach/mfp-pxa25x.h> diff --git a/arch/arm/mach-pxa/z2.c b/arch/arm/mach-pxa/z2.c index a323e07..aaf8837 100644 --- a/arch/arm/mach-pxa/z2.c +++ b/arch/arm/mach-pxa/z2.c @@ -29,6 +29,7 @@ #include <linux/gpio_keys.h> #include <linux/delay.h> #include <linux/regulator/machine.h> +#include <linux/i2c/pxa-i2c.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> @@ -40,8 +41,6 @@ #include <mach/mmc.h> #include <plat/pxa27x_keypad.h> -#include <plat/i2c.h> - #include "generic.h" #include "devices.h" diff --git a/arch/arm/mach-pxa/zeus.c b/arch/arm/mach-pxa/zeus.c index b92aa3b..730f51e 100644 --- a/arch/arm/mach-pxa/zeus.c +++ b/arch/arm/mach-pxa/zeus.c @@ -25,6 +25,7 @@ #include <linux/mtd/partitions.h> #include <linux/mtd/physmap.h> #include <linux/i2c.h> +#include <linux/i2c/pxa-i2c.h> #include <linux/i2c/pca953x.h> #include <linux/apm-emulation.h> #include <linux/can/platform/mcp251x.h> @@ -33,8 +34,6 @@ #include <asm/mach/arch.h> #include <asm/mach/map.h> -#include <plat/i2c.h> - #include <mach/pxa2xx-regs.h> #include <mach/regs-uart.h> #include <mach/ohci.h> diff --git a/arch/arm/mach-pxa/zylonite_pxa300.c b/arch/arm/mach-pxa/zylonite_pxa300.c index 3aa73b3..93c64d8 100644 --- a/arch/arm/mach-pxa/zylonite_pxa300.c +++ b/arch/arm/mach-pxa/zylonite_pxa300.c @@ -17,11 +17,11 @@ #include <linux/kernel.h> #include <linux/init.h> #include <linux/i2c.h> +#include <linux/i2c/pxa-i2c.h> #include <linux/i2c/pca953x.h> #include <linux/gpio.h> #include <mach/pxa300.h> -#include <plat/i2c.h> #include <mach/zylonite.h> #include "generic.h" diff --git a/arch/arm/mach-realview/Makefile b/arch/arm/mach-realview/Makefile index a01b76b..541fa4c 100644 --- a/arch/arm/mach-realview/Makefile +++ b/arch/arm/mach-realview/Makefile @@ -8,6 +8,5 @@ obj-$(CONFIG_MACH_REALVIEW_PB11MP) += realview_pb11mp.o obj-$(CONFIG_MACH_REALVIEW_PB1176) += realview_pb1176.o obj-$(CONFIG_MACH_REALVIEW_PBA8) += realview_pba8.o obj-$(CONFIG_MACH_REALVIEW_PBX) += realview_pbx.o -obj-$(CONFIG_SMP) += platsmp.o headsmp.o +obj-$(CONFIG_SMP) += platsmp.o obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o -obj-$(CONFIG_LOCAL_TIMERS) += localtimer.o diff --git a/arch/arm/mach-realview/core.c b/arch/arm/mach-realview/core.c index 1c6602c..75dbc87 100644 --- a/arch/arm/mach-realview/core.c +++ b/arch/arm/mach-realview/core.c @@ -51,6 +51,7 @@ #include <mach/irqs.h> #include <asm/hardware/timer-sp.h> +#include <plat/clcd.h> #include <plat/sched_clock.h> #include "core.h" @@ -359,18 +360,19 @@ static struct clk_lookup lookups[] = { } }; -static int __init clk_init(void) +void __init realview_init_early(void) { + void __iomem *sys = __io_address(REALVIEW_SYS_BASE); + if (machine_is_realview_pb1176()) - oscvco_clk.vcoreg = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_OSC0_OFFSET; + oscvco_clk.vcoreg = sys + REALVIEW_SYS_OSC0_OFFSET; else - oscvco_clk.vcoreg = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_OSC4_OFFSET; + oscvco_clk.vcoreg = sys + REALVIEW_SYS_OSC4_OFFSET; clkdev_add_table(lookups, ARRAY_SIZE(lookups)); - return 0; + versatile_sched_clock_init(sys + REALVIEW_SYS_24MHz_OFFSET, 24000000); } -core_initcall(clk_init); /* * CLCD support. @@ -385,157 +387,6 @@ core_initcall(clk_init); #define SYS_CLCD_ID_SANYO_2_5 (0x07 << 8) #define SYS_CLCD_ID_VGA (0x1f << 8) -static struct clcd_panel vga = { - .mode = { - .name = "VGA", - .refresh = 60, - .xres = 640, - .yres = 480, - .pixclock = 39721, - .left_margin = 40, - .right_margin = 24, - .upper_margin = 32, - .lower_margin = 11, - .hsync_len = 96, - .vsync_len = 2, - .sync = 0, - .vmode = FB_VMODE_NONINTERLACED, - }, - .width = -1, - .height = -1, - .tim2 = TIM2_BCD | TIM2_IPC, - .cntl = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1), - .bpp = 16, -}; - -static struct clcd_panel xvga = { - .mode = { - .name = "XVGA", - .refresh = 60, - .xres = 1024, - .yres = 768, - .pixclock = 15748, - .left_margin = 152, - .right_margin = 48, - .upper_margin = 23, - .lower_margin = 3, - .hsync_len = 104, - .vsync_len = 4, - .sync = 0, - .vmode = FB_VMODE_NONINTERLACED, - }, - .width = -1, - .height = -1, - .tim2 = TIM2_BCD | TIM2_IPC, - .cntl = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1), - .bpp = 16, -}; - -static struct clcd_panel sanyo_3_8_in = { - .mode = { - .name = "Sanyo QVGA", - .refresh = 116, - .xres = 320, - .yres = 240, - .pixclock = 100000, - .left_margin = 6, - .right_margin = 6, - .upper_margin = 5, - .lower_margin = 5, - .hsync_len = 6, - .vsync_len = 6, - .sync = 0, - .vmode = FB_VMODE_NONINTERLACED, - }, - .width = -1, - .height = -1, - .tim2 = TIM2_BCD, - .cntl = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1), - .bpp = 16, -}; - -static struct clcd_panel sanyo_2_5_in = { - .mode = { - .name = "Sanyo QVGA Portrait", - .refresh = 116, - .xres = 240, - .yres = 320, - .pixclock = 100000, - .left_margin = 20, - .right_margin = 10, - .upper_margin = 2, - .lower_margin = 2, - .hsync_len = 10, - .vsync_len = 2, - .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, - .vmode = FB_VMODE_NONINTERLACED, - }, - .width = -1, - .height = -1, - .tim2 = TIM2_IVS | TIM2_IHS | TIM2_IPC, - .cntl = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1), - .bpp = 16, -}; - -static struct clcd_panel epson_2_2_in = { - .mode = { - .name = "Epson QCIF", - .refresh = 390, - .xres = 176, - .yres = 220, - .pixclock = 62500, - .left_margin = 3, - .right_margin = 2, - .upper_margin = 1, - .lower_margin = 0, - .hsync_len = 3, - .vsync_len = 2, - .sync = 0, - .vmode = FB_VMODE_NONINTERLACED, - }, - .width = -1, - .height = -1, - .tim2 = TIM2_BCD | TIM2_IPC, - .cntl = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1), - .bpp = 16, -}; - -/* - * Detect which LCD panel is connected, and return the appropriate - * clcd_panel structure. Note: we do not have any information on - * the required timings for the 8.4in panel, so we presently assume - * VGA timings. - */ -static struct clcd_panel *realview_clcd_panel(void) -{ - void __iomem *sys_clcd = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_CLCD_OFFSET; - struct clcd_panel *vga_panel; - struct clcd_panel *panel; - u32 val; - - if (machine_is_realview_eb()) - vga_panel = &vga; - else - vga_panel = &xvga; - - val = readl(sys_clcd) & SYS_CLCD_ID_MASK; - if (val == SYS_CLCD_ID_SANYO_3_8) - panel = &sanyo_3_8_in; - else if (val == SYS_CLCD_ID_SANYO_2_5) - panel = &sanyo_2_5_in; - else if (val == SYS_CLCD_ID_EPSON_2_2) - panel = &epson_2_2_in; - else if (val == SYS_CLCD_ID_VGA) - panel = vga_panel; - else { - printk(KERN_ERR "CLCD: unknown LCD panel ID 0x%08x, using VGA\n", - val); - panel = vga_panel; - } - - return panel; -} - /* * Disable all display connectors on the interface module. */ @@ -565,56 +416,60 @@ static void realview_clcd_enable(struct clcd_fb *fb) writel(val, sys_clcd); } +/* + * Detect which LCD panel is connected, and return the appropriate + * clcd_panel structure. Note: we do not have any information on + * the required timings for the 8.4in panel, so we presently assume + * VGA timings. + */ static int realview_clcd_setup(struct clcd_fb *fb) { + void __iomem *sys_clcd = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_CLCD_OFFSET; + const char *panel_name, *vga_panel_name; unsigned long framesize; - dma_addr_t dma; + u32 val; - if (machine_is_realview_eb()) + if (machine_is_realview_eb()) { /* VGA, 16bpp */ framesize = 640 * 480 * 2; - else + vga_panel_name = "VGA"; + } else { /* XVGA, 16bpp */ framesize = 1024 * 768 * 2; - - fb->panel = realview_clcd_panel(); - - fb->fb.screen_base = dma_alloc_writecombine(&fb->dev->dev, framesize, - &dma, GFP_KERNEL | GFP_DMA); - if (!fb->fb.screen_base) { - printk(KERN_ERR "CLCD: unable to map framebuffer\n"); - return -ENOMEM; + vga_panel_name = "XVGA"; } - fb->fb.fix.smem_start = dma; - fb->fb.fix.smem_len = framesize; - - return 0; -} + val = readl(sys_clcd) & SYS_CLCD_ID_MASK; + if (val == SYS_CLCD_ID_SANYO_3_8) + panel_name = "Sanyo TM38QV67A02A"; + else if (val == SYS_CLCD_ID_SANYO_2_5) + panel_name = "Sanyo QVGA Portrait"; + else if (val == SYS_CLCD_ID_EPSON_2_2) + panel_name = "Epson L2F50113T00"; + else if (val == SYS_CLCD_ID_VGA) + panel_name = vga_panel_name; + else { + pr_err("CLCD: unknown LCD panel ID 0x%08x, using VGA\n", val); + panel_name = vga_panel_name; + } -static int realview_clcd_mmap(struct clcd_fb *fb, struct vm_area_struct *vma) -{ - return dma_mmap_writecombine(&fb->dev->dev, vma, - fb->fb.screen_base, - fb->fb.fix.smem_start, - fb->fb.fix.smem_len); -} + fb->panel = versatile_clcd_get_panel(panel_name); + if (!fb->panel) + return -EINVAL; -static void realview_clcd_remove(struct clcd_fb *fb) -{ - dma_free_writecombine(&fb->dev->dev, fb->fb.fix.smem_len, - fb->fb.screen_base, fb->fb.fix.smem_start); + return versatile_clcd_setup_dma(fb, framesize); } struct clcd_board clcd_plat_data = { .name = "RealView", + .caps = CLCD_CAP_ALL, .check = clcdfb_check, .decode = clcdfb_decode, .disable = realview_clcd_disable, .enable = realview_clcd_enable, .setup = realview_clcd_setup, - .mmap = realview_clcd_mmap, - .remove = realview_clcd_remove, + .mmap = versatile_clcd_mmap_dma, + .remove = versatile_clcd_remove_dma, }; #ifdef CONFIG_LEDS @@ -656,12 +511,6 @@ void realview_leds_event(led_event_t ledevt) #endif /* CONFIG_LEDS */ /* - * The sched_clock counter - */ -#define REFCOUNTER (__io_address(REALVIEW_SYS_BASE) + \ - REALVIEW_SYS_24MHz_OFFSET) - -/* * Where is the timer (VA)? */ void __iomem *timer0_va_base; @@ -676,8 +525,6 @@ void __init realview_timer_init(unsigned int timer_irq) { u32 val; - versatile_sched_clock_init(REFCOUNTER, 24000000); - /* * set clock frequency: * REALVIEW_REFCLK is 32KHz diff --git a/arch/arm/mach-realview/core.h b/arch/arm/mach-realview/core.h index 693239d..5c83d1e 100644 --- a/arch/arm/mach-realview/core.h +++ b/arch/arm/mach-realview/core.h @@ -42,7 +42,6 @@ static struct amba_device name##_device = { \ }, \ .dma_mask = ~0, \ .irq = base##_IRQ, \ - /* .dma = base##_DMA,*/ \ } struct machine_desc; @@ -63,6 +62,7 @@ extern void realview_timer_init(unsigned int timer_irq); extern int realview_flash_register(struct resource *res, u32 num); extern int realview_eth_register(const char *name, struct resource *res); extern int realview_usb_register(struct resource *res); +extern void realview_init_early(void); extern void realview_fixup(struct machine_desc *mdesc, struct tag *tags, char **from, struct meminfo *meminfo); extern void (*realview_reset)(char); diff --git a/arch/arm/mach-realview/headsmp.S b/arch/arm/mach-realview/headsmp.S deleted file mode 100644 index b34be45..0000000 --- a/arch/arm/mach-realview/headsmp.S +++ /dev/null @@ -1,40 +0,0 @@ -/* - * linux/arch/arm/mach-realview/headsmp.S - * - * Copyright (c) 2003 ARM Limited - * All Rights Reserved - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#include <linux/linkage.h> -#include <linux/init.h> - - __INIT - -/* - * Realview specific entry point for secondary CPUs. This provides - * a "holding pen" into which all secondary cores are held until we're - * ready for them to initialise. - */ -ENTRY(realview_secondary_startup) - mrc p15, 0, r0, c0, c0, 5 - and r0, r0, #15 - adr r4, 1f - ldmia r4, {r5, r6} - sub r4, r4, r5 - add r6, r6, r4 -pen: ldr r7, [r6] - cmp r7, r0 - bne pen - - /* - * we've been released from the holding pen: secondary_stack - * should now contain the SVC stack for this core - */ - b secondary_startup - - .align -1: .long . - .long pen_release diff --git a/arch/arm/mach-realview/localtimer.c b/arch/arm/mach-realview/localtimer.c deleted file mode 100644 index 60b4e11..0000000 --- a/arch/arm/mach-realview/localtimer.c +++ /dev/null @@ -1,26 +0,0 @@ -/* - * linux/arch/arm/mach-realview/localtimer.c - * - * Copyright (C) 2002 ARM Ltd. - * All Rights Reserved - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#include <linux/init.h> -#include <linux/smp.h> -#include <linux/clockchips.h> - -#include <asm/irq.h> -#include <asm/smp_twd.h> -#include <asm/localtimer.h> - -/* - * Setup the local clock events for a CPU. - */ -void __cpuinit local_timer_setup(struct clock_event_device *evt) -{ - evt->irq = IRQ_LOCALTIMER; - twd_timer_setup(evt); -} diff --git a/arch/arm/mach-realview/platsmp.c b/arch/arm/mach-realview/platsmp.c index 6959d13..2391922 100644 --- a/arch/arm/mach-realview/platsmp.c +++ b/arch/arm/mach-realview/platsmp.c @@ -10,44 +10,21 @@ */ #include <linux/init.h> #include <linux/errno.h> -#include <linux/delay.h> -#include <linux/device.h> -#include <linux/jiffies.h> #include <linux/smp.h> #include <linux/io.h> -#include <asm/cacheflush.h> #include <mach/hardware.h> #include <asm/mach-types.h> +#include <asm/smp_scu.h> #include <asm/unified.h> #include <mach/board-eb.h> #include <mach/board-pb11mp.h> #include <mach/board-pbx.h> -#include <asm/smp_scu.h> #include "core.h" -extern void realview_secondary_startup(void); - -/* - * control for which core is the next to come out of the secondary - * boot "holding pen" - */ -volatile int __cpuinitdata pen_release = -1; - -/* - * Write pen_release in a way that is guaranteed to be visible to all - * observers, irrespective of whether they're taking part in coherency - * or not. This is necessary for the hotplug code to work reliably. - */ -static void __cpuinit write_pen_release(int val) -{ - pen_release = val; - smp_wmb(); - __cpuc_flush_dcache_area((void *)&pen_release, sizeof(pen_release)); - outer_clean_range(__pa(&pen_release), __pa(&pen_release + 1)); -} +extern void versatile_secondary_startup(void); static void __iomem *scu_base_addr(void) { @@ -62,75 +39,6 @@ static void __iomem *scu_base_addr(void) return (void __iomem *)0; } -static DEFINE_SPINLOCK(boot_lock); - -void __cpuinit platform_secondary_init(unsigned int cpu) -{ - /* - * if any interrupts are already enabled for the primary - * core (e.g. timer irq), then they will not have been enabled - * for us: do so - */ - gic_secondary_init(0); - - /* - * let the primary processor know we're out of the - * pen, then head off into the C entry point - */ - write_pen_release(-1); - - /* - * Synchronise with the boot thread. - */ - spin_lock(&boot_lock); - spin_unlock(&boot_lock); -} - -int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle) -{ - unsigned long timeout; - - /* - * set synchronisation state between this boot processor - * and the secondary one - */ - spin_lock(&boot_lock); - - /* - * The secondary processor is waiting to be released from - * the holding pen - release it, then wait for it to flag - * that it has been released by resetting pen_release. - * - * Note that "pen_release" is the hardware CPU ID, whereas - * "cpu" is Linux's internal ID. - */ - write_pen_release(cpu); - - /* - * Send the secondary CPU a soft interrupt, thereby causing - * the boot monitor to read the system wide flags register, - * and branch to the address found there. - */ - smp_cross_call(cpumask_of(cpu), 1); - - timeout = jiffies + (1 * HZ); - while (time_before(jiffies, timeout)) { - smp_rmb(); - if (pen_release == -1) - break; - - udelay(10); - } - - /* - * now the secondary core is starting up let it run its - * calibrations, then wait for it to finish - */ - spin_unlock(&boot_lock); - - return pen_release != -1 ? -ENOSYS : 0; -} - /* * Initialise the CPU possible map early - this describes the CPUs * which may be present or become present in the system. @@ -174,6 +82,6 @@ void __init platform_smp_prepare_cpus(unsigned int max_cpus) * until it receives a soft interrupt, and then the * secondary CPU branches to this address. */ - __raw_writel(BSYM(virt_to_phys(realview_secondary_startup)), + __raw_writel(BSYM(virt_to_phys(versatile_secondary_startup)), __io_address(REALVIEW_SYS_FLAGSSET)); } diff --git a/arch/arm/mach-realview/realview_eb.c b/arch/arm/mach-realview/realview_eb.c index 8ede983..2ecc1d9 100644 --- a/arch/arm/mach-realview/realview_eb.c +++ b/arch/arm/mach-realview/realview_eb.c @@ -144,60 +144,39 @@ static struct pl022_ssp_controller ssp0_plat_data = { * These devices are connected via the core APB bridge */ #define GPIO2_IRQ { IRQ_EB_GPIO2, NO_IRQ } -#define GPIO2_DMA { 0, 0 } #define GPIO3_IRQ { IRQ_EB_GPIO3, NO_IRQ } -#define GPIO3_DMA { 0, 0 } #define AACI_IRQ { IRQ_EB_AACI, NO_IRQ } -#define AACI_DMA { 0x80, 0x81 } #define MMCI0_IRQ { IRQ_EB_MMCI0A, IRQ_EB_MMCI0B } -#define MMCI0_DMA { 0x84, 0 } #define KMI0_IRQ { IRQ_EB_KMI0, NO_IRQ } -#define KMI0_DMA { 0, 0 } #define KMI1_IRQ { IRQ_EB_KMI1, NO_IRQ } -#define KMI1_DMA { 0, 0 } /* * These devices are connected directly to the multi-layer AHB switch */ #define EB_SMC_IRQ { NO_IRQ, NO_IRQ } -#define EB_SMC_DMA { 0, 0 } #define MPMC_IRQ { NO_IRQ, NO_IRQ } -#define MPMC_DMA { 0, 0 } #define EB_CLCD_IRQ { IRQ_EB_CLCD, NO_IRQ } -#define EB_CLCD_DMA { 0, 0 } #define DMAC_IRQ { IRQ_EB_DMA, NO_IRQ } -#define DMAC_DMA { 0, 0 } /* * These devices are connected via the core APB bridge */ #define SCTL_IRQ { NO_IRQ, NO_IRQ } -#define SCTL_DMA { 0, 0 } #define EB_WATCHDOG_IRQ { IRQ_EB_WDOG, NO_IRQ } -#define EB_WATCHDOG_DMA { 0, 0 } #define EB_GPIO0_IRQ { IRQ_EB_GPIO0, NO_IRQ } -#define EB_GPIO0_DMA { 0, 0 } #define GPIO1_IRQ { IRQ_EB_GPIO1, NO_IRQ } -#define GPIO1_DMA { 0, 0 } #define EB_RTC_IRQ { IRQ_EB_RTC, NO_IRQ } -#define EB_RTC_DMA { 0, 0 } /* * These devices are connected via the DMA APB bridge */ #define SCI_IRQ { IRQ_EB_SCI, NO_IRQ } -#define SCI_DMA { 7, 6 } #define EB_UART0_IRQ { IRQ_EB_UART0, NO_IRQ } -#define EB_UART0_DMA { 15, 14 } #define EB_UART1_IRQ { IRQ_EB_UART1, NO_IRQ } -#define EB_UART1_DMA { 13, 12 } #define EB_UART2_IRQ { IRQ_EB_UART2, NO_IRQ } -#define EB_UART2_DMA { 11, 10 } #define EB_UART3_IRQ { IRQ_EB_UART3, NO_IRQ } -#define EB_UART3_DMA { 0x86, 0x87 } #define EB_SSP_IRQ { IRQ_EB_SSP, NO_IRQ } -#define EB_SSP_DMA { 9, 8 } /* FPGA Primecells */ AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL); @@ -487,6 +466,7 @@ MACHINE_START(REALVIEW_EB, "ARM-RealView EB") .boot_params = PLAT_PHYS_OFFSET + 0x00000100, .fixup = realview_fixup, .map_io = realview_eb_map_io, + .init_early = realview_init_early, .init_irq = gic_init_irq, .timer = &realview_eb_timer, .init_machine = realview_eb_init, diff --git a/arch/arm/mach-realview/realview_pb1176.c b/arch/arm/mach-realview/realview_pb1176.c index 9f26369..eab6070 100644 --- a/arch/arm/mach-realview/realview_pb1176.c +++ b/arch/arm/mach-realview/realview_pb1176.c @@ -134,47 +134,26 @@ static struct pl022_ssp_controller ssp0_plat_data = { * RealView PB1176 AMBA devices */ #define GPIO2_IRQ { IRQ_PB1176_GPIO2, NO_IRQ } -#define GPIO2_DMA { 0, 0 } #define GPIO3_IRQ { IRQ_PB1176_GPIO3, NO_IRQ } -#define GPIO3_DMA { 0, 0 } #define AACI_IRQ { IRQ_PB1176_AACI, NO_IRQ } -#define AACI_DMA { 0x80, 0x81 } #define MMCI0_IRQ { IRQ_PB1176_MMCI0A, IRQ_PB1176_MMCI0B } -#define MMCI0_DMA { 0x84, 0 } #define KMI0_IRQ { IRQ_PB1176_KMI0, NO_IRQ } -#define KMI0_DMA { 0, 0 } #define KMI1_IRQ { IRQ_PB1176_KMI1, NO_IRQ } -#define KMI1_DMA { 0, 0 } #define PB1176_SMC_IRQ { NO_IRQ, NO_IRQ } -#define PB1176_SMC_DMA { 0, 0 } #define MPMC_IRQ { NO_IRQ, NO_IRQ } -#define MPMC_DMA { 0, 0 } #define PB1176_CLCD_IRQ { IRQ_DC1176_CLCD, NO_IRQ } -#define PB1176_CLCD_DMA { 0, 0 } #define SCTL_IRQ { NO_IRQ, NO_IRQ } -#define SCTL_DMA { 0, 0 } #define PB1176_WATCHDOG_IRQ { IRQ_DC1176_WATCHDOG, NO_IRQ } -#define PB1176_WATCHDOG_DMA { 0, 0 } #define PB1176_GPIO0_IRQ { IRQ_PB1176_GPIO0, NO_IRQ } -#define PB1176_GPIO0_DMA { 0, 0 } #define GPIO1_IRQ { IRQ_PB1176_GPIO1, NO_IRQ } -#define GPIO1_DMA { 0, 0 } #define PB1176_RTC_IRQ { IRQ_DC1176_RTC, NO_IRQ } -#define PB1176_RTC_DMA { 0, 0 } #define SCI_IRQ { IRQ_PB1176_SCI, NO_IRQ } -#define SCI_DMA { 7, 6 } #define PB1176_UART0_IRQ { IRQ_DC1176_UART0, NO_IRQ } -#define PB1176_UART0_DMA { 15, 14 } #define PB1176_UART1_IRQ { IRQ_DC1176_UART1, NO_IRQ } -#define PB1176_UART1_DMA { 13, 12 } #define PB1176_UART2_IRQ { IRQ_DC1176_UART2, NO_IRQ } -#define PB1176_UART2_DMA { 11, 10 } #define PB1176_UART3_IRQ { IRQ_DC1176_UART3, NO_IRQ } -#define PB1176_UART3_DMA { 0x86, 0x87 } #define PB1176_UART4_IRQ { IRQ_PB1176_UART4, NO_IRQ } -#define PB1176_UART4_DMA { 0, 0 } #define PB1176_SSP_IRQ { IRQ_DC1176_SSP, NO_IRQ } -#define PB1176_SSP_DMA { 9, 8 } /* FPGA Primecells */ AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL); @@ -382,6 +361,7 @@ MACHINE_START(REALVIEW_PB1176, "ARM-RealView PB1176") .boot_params = PLAT_PHYS_OFFSET + 0x00000100, .fixup = realview_pb1176_fixup, .map_io = realview_pb1176_map_io, + .init_early = realview_init_early, .init_irq = gic_init_irq, .timer = &realview_pb1176_timer, .init_machine = realview_pb1176_init, diff --git a/arch/arm/mach-realview/realview_pb11mp.c b/arch/arm/mach-realview/realview_pb11mp.c index dea06b2..b2985fc 100644 --- a/arch/arm/mach-realview/realview_pb11mp.c +++ b/arch/arm/mach-realview/realview_pb11mp.c @@ -136,47 +136,26 @@ static struct pl022_ssp_controller ssp0_plat_data = { */ #define GPIO2_IRQ { IRQ_PB11MP_GPIO2, NO_IRQ } -#define GPIO2_DMA { 0, 0 } #define GPIO3_IRQ { IRQ_PB11MP_GPIO3, NO_IRQ } -#define GPIO3_DMA { 0, 0 } #define AACI_IRQ { IRQ_TC11MP_AACI, NO_IRQ } -#define AACI_DMA { 0x80, 0x81 } #define MMCI0_IRQ { IRQ_TC11MP_MMCI0A, IRQ_TC11MP_MMCI0B } -#define MMCI0_DMA { 0x84, 0 } #define KMI0_IRQ { IRQ_TC11MP_KMI0, NO_IRQ } -#define KMI0_DMA { 0, 0 } #define KMI1_IRQ { IRQ_TC11MP_KMI1, NO_IRQ } -#define KMI1_DMA { 0, 0 } #define PB11MP_SMC_IRQ { NO_IRQ, NO_IRQ } -#define PB11MP_SMC_DMA { 0, 0 } #define MPMC_IRQ { NO_IRQ, NO_IRQ } -#define MPMC_DMA { 0, 0 } #define PB11MP_CLCD_IRQ { IRQ_PB11MP_CLCD, NO_IRQ } -#define PB11MP_CLCD_DMA { 0, 0 } #define DMAC_IRQ { IRQ_PB11MP_DMAC, NO_IRQ } -#define DMAC_DMA { 0, 0 } #define SCTL_IRQ { NO_IRQ, NO_IRQ } -#define SCTL_DMA { 0, 0 } #define PB11MP_WATCHDOG_IRQ { IRQ_PB11MP_WATCHDOG, NO_IRQ } -#define PB11MP_WATCHDOG_DMA { 0, 0 } #define PB11MP_GPIO0_IRQ { IRQ_PB11MP_GPIO0, NO_IRQ } -#define PB11MP_GPIO0_DMA { 0, 0 } #define GPIO1_IRQ { IRQ_PB11MP_GPIO1, NO_IRQ } -#define GPIO1_DMA { 0, 0 } #define PB11MP_RTC_IRQ { IRQ_TC11MP_RTC, NO_IRQ } -#define PB11MP_RTC_DMA { 0, 0 } #define SCI_IRQ { IRQ_PB11MP_SCI, NO_IRQ } -#define SCI_DMA { 7, 6 } #define PB11MP_UART0_IRQ { IRQ_TC11MP_UART0, NO_IRQ } -#define PB11MP_UART0_DMA { 15, 14 } #define PB11MP_UART1_IRQ { IRQ_TC11MP_UART1, NO_IRQ } -#define PB11MP_UART1_DMA { 13, 12 } #define PB11MP_UART2_IRQ { IRQ_PB11MP_UART2, NO_IRQ } -#define PB11MP_UART2_DMA { 11, 10 } #define PB11MP_UART3_IRQ { IRQ_PB11MP_UART3, NO_IRQ } -#define PB11MP_UART3_DMA { 0x86, 0x87 } #define PB11MP_SSP_IRQ { IRQ_PB11MP_SSP, NO_IRQ } -#define PB11MP_SSP_DMA { 9, 8 } /* FPGA Primecells */ AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL); @@ -384,6 +363,7 @@ MACHINE_START(REALVIEW_PB11MP, "ARM-RealView PB11MPCore") .boot_params = PLAT_PHYS_OFFSET + 0x00000100, .fixup = realview_fixup, .map_io = realview_pb11mp_map_io, + .init_early = realview_init_early, .init_irq = gic_init_irq, .timer = &realview_pb11mp_timer, .init_machine = realview_pb11mp_init, diff --git a/arch/arm/mach-realview/realview_pba8.c b/arch/arm/mach-realview/realview_pba8.c index 7d0f173..fb68665 100644 --- a/arch/arm/mach-realview/realview_pba8.c +++ b/arch/arm/mach-realview/realview_pba8.c @@ -126,47 +126,26 @@ static struct pl022_ssp_controller ssp0_plat_data = { */ #define GPIO2_IRQ { IRQ_PBA8_GPIO2, NO_IRQ } -#define GPIO2_DMA { 0, 0 } #define GPIO3_IRQ { IRQ_PBA8_GPIO3, NO_IRQ } -#define GPIO3_DMA { 0, 0 } #define AACI_IRQ { IRQ_PBA8_AACI, NO_IRQ } -#define AACI_DMA { 0x80, 0x81 } #define MMCI0_IRQ { IRQ_PBA8_MMCI0A, IRQ_PBA8_MMCI0B } -#define MMCI0_DMA { 0x84, 0 } #define KMI0_IRQ { IRQ_PBA8_KMI0, NO_IRQ } -#define KMI0_DMA { 0, 0 } #define KMI1_IRQ { IRQ_PBA8_KMI1, NO_IRQ } -#define KMI1_DMA { 0, 0 } #define PBA8_SMC_IRQ { NO_IRQ, NO_IRQ } -#define PBA8_SMC_DMA { 0, 0 } #define MPMC_IRQ { NO_IRQ, NO_IRQ } -#define MPMC_DMA { 0, 0 } #define PBA8_CLCD_IRQ { IRQ_PBA8_CLCD, NO_IRQ } -#define PBA8_CLCD_DMA { 0, 0 } #define DMAC_IRQ { IRQ_PBA8_DMAC, NO_IRQ } -#define DMAC_DMA { 0, 0 } #define SCTL_IRQ { NO_IRQ, NO_IRQ } -#define SCTL_DMA { 0, 0 } #define PBA8_WATCHDOG_IRQ { IRQ_PBA8_WATCHDOG, NO_IRQ } -#define PBA8_WATCHDOG_DMA { 0, 0 } #define PBA8_GPIO0_IRQ { IRQ_PBA8_GPIO0, NO_IRQ } -#define PBA8_GPIO0_DMA { 0, 0 } #define GPIO1_IRQ { IRQ_PBA8_GPIO1, NO_IRQ } -#define GPIO1_DMA { 0, 0 } #define PBA8_RTC_IRQ { IRQ_PBA8_RTC, NO_IRQ } -#define PBA8_RTC_DMA { 0, 0 } #define SCI_IRQ { IRQ_PBA8_SCI, NO_IRQ } -#define SCI_DMA { 7, 6 } #define PBA8_UART0_IRQ { IRQ_PBA8_UART0, NO_IRQ } -#define PBA8_UART0_DMA { 15, 14 } #define PBA8_UART1_IRQ { IRQ_PBA8_UART1, NO_IRQ } -#define PBA8_UART1_DMA { 13, 12 } #define PBA8_UART2_IRQ { IRQ_PBA8_UART2, NO_IRQ } -#define PBA8_UART2_DMA { 11, 10 } #define PBA8_UART3_IRQ { IRQ_PBA8_UART3, NO_IRQ } -#define PBA8_UART3_DMA { 0x86, 0x87 } #define PBA8_SSP_IRQ { IRQ_PBA8_SSP, NO_IRQ } -#define PBA8_SSP_DMA { 9, 8 } /* FPGA Primecells */ AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL); @@ -334,6 +313,7 @@ MACHINE_START(REALVIEW_PBA8, "ARM-RealView PB-A8") .boot_params = PLAT_PHYS_OFFSET + 0x00000100, .fixup = realview_fixup, .map_io = realview_pba8_map_io, + .init_early = realview_init_early, .init_irq = gic_init_irq, .timer = &realview_pba8_timer, .init_machine = realview_pba8_init, diff --git a/arch/arm/mach-realview/realview_pbx.c b/arch/arm/mach-realview/realview_pbx.c index b89e28f..92ace2c 100644 --- a/arch/arm/mach-realview/realview_pbx.c +++ b/arch/arm/mach-realview/realview_pbx.c @@ -148,47 +148,26 @@ static struct pl022_ssp_controller ssp0_plat_data = { */ #define GPIO2_IRQ { IRQ_PBX_GPIO2, NO_IRQ } -#define GPIO2_DMA { 0, 0 } #define GPIO3_IRQ { IRQ_PBX_GPIO3, NO_IRQ } -#define GPIO3_DMA { 0, 0 } #define AACI_IRQ { IRQ_PBX_AACI, NO_IRQ } -#define AACI_DMA { 0x80, 0x81 } #define MMCI0_IRQ { IRQ_PBX_MMCI0A, IRQ_PBX_MMCI0B } -#define MMCI0_DMA { 0x84, 0 } #define KMI0_IRQ { IRQ_PBX_KMI0, NO_IRQ } -#define KMI0_DMA { 0, 0 } #define KMI1_IRQ { IRQ_PBX_KMI1, NO_IRQ } -#define KMI1_DMA { 0, 0 } #define PBX_SMC_IRQ { NO_IRQ, NO_IRQ } -#define PBX_SMC_DMA { 0, 0 } #define MPMC_IRQ { NO_IRQ, NO_IRQ } -#define MPMC_DMA { 0, 0 } #define PBX_CLCD_IRQ { IRQ_PBX_CLCD, NO_IRQ } -#define PBX_CLCD_DMA { 0, 0 } #define DMAC_IRQ { IRQ_PBX_DMAC, NO_IRQ } -#define DMAC_DMA { 0, 0 } #define SCTL_IRQ { NO_IRQ, NO_IRQ } -#define SCTL_DMA { 0, 0 } #define PBX_WATCHDOG_IRQ { IRQ_PBX_WATCHDOG, NO_IRQ } -#define PBX_WATCHDOG_DMA { 0, 0 } #define PBX_GPIO0_IRQ { IRQ_PBX_GPIO0, NO_IRQ } -#define PBX_GPIO0_DMA { 0, 0 } #define GPIO1_IRQ { IRQ_PBX_GPIO1, NO_IRQ } -#define GPIO1_DMA { 0, 0 } #define PBX_RTC_IRQ { IRQ_PBX_RTC, NO_IRQ } -#define PBX_RTC_DMA { 0, 0 } #define SCI_IRQ { IRQ_PBX_SCI, NO_IRQ } -#define SCI_DMA { 7, 6 } #define PBX_UART0_IRQ { IRQ_PBX_UART0, NO_IRQ } -#define PBX_UART0_DMA { 15, 14 } #define PBX_UART1_IRQ { IRQ_PBX_UART1, NO_IRQ } -#define PBX_UART1_DMA { 13, 12 } #define PBX_UART2_IRQ { IRQ_PBX_UART2, NO_IRQ } -#define PBX_UART2_DMA { 11, 10 } #define PBX_UART3_IRQ { IRQ_PBX_UART3, NO_IRQ } -#define PBX_UART3_DMA { 0x86, 0x87 } #define PBX_SSP_IRQ { IRQ_PBX_SSP, NO_IRQ } -#define PBX_SSP_DMA { 9, 8 } /* FPGA Primecells */ AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL); @@ -417,6 +396,7 @@ MACHINE_START(REALVIEW_PBX, "ARM-RealView PBX") .boot_params = PLAT_PHYS_OFFSET + 0x00000100, .fixup = realview_pbx_fixup, .map_io = realview_pbx_map_io, + .init_early = realview_init_early, .init_irq = gic_init_irq, .timer = &realview_pbx_timer, .init_machine = realview_pbx_init, diff --git a/arch/arm/mach-s3c2410/h1940-bluetooth.c b/arch/arm/mach-s3c2410/h1940-bluetooth.c index 6b86a72..2c126bb 100644 --- a/arch/arm/mach-s3c2410/h1940-bluetooth.c +++ b/arch/arm/mach-s3c2410/h1940-bluetooth.c @@ -18,12 +18,14 @@ #include <linux/leds.h> #include <linux/gpio.h> #include <linux/rfkill.h> +#include <linux/leds.h> #include <mach/regs-gpio.h> #include <mach/hardware.h> #include <mach/h1940-latch.h> +#include <mach/h1940.h> -#define DRV_NAME "h1940-bt" +#define DRV_NAME "h1940-bt" /* Bluetooth control */ static void h1940bt_enable(int on) @@ -37,6 +39,8 @@ static void h1940bt_enable(int on) gpio_set_value(S3C2410_GPH(1), 1); mdelay(10); gpio_set_value(S3C2410_GPH(1), 0); + + h1940_led_blink_set(-EINVAL, GPIO_LED_BLINK, NULL, NULL); } else { gpio_set_value(S3C2410_GPH(1), 1); @@ -44,6 +48,8 @@ static void h1940bt_enable(int on) gpio_set_value(S3C2410_GPH(1), 0); mdelay(10); gpio_set_value(H1940_LATCH_BLUETOOTH_POWER, 0); + + h1940_led_blink_set(-EINVAL, GPIO_LED_NO_BLINK_LOW, NULL, NULL); } } @@ -85,7 +91,6 @@ static int __devinit h1940bt_probe(struct platform_device *pdev) s3c_gpio_cfgpin(S3C2410_GPH(3), S3C2410_GPH3_RXD0); s3c_gpio_setpull(S3C2410_GPH(3), S3C_GPIO_PULL_NONE); - rfk = rfkill_alloc(DRV_NAME, &pdev->dev, RFKILL_TYPE_BLUETOOTH, &h1940bt_rfkill_ops, NULL); if (!rfk) { @@ -93,8 +98,6 @@ static int __devinit h1940bt_probe(struct platform_device *pdev) goto err_rfk_alloc; } - rfkill_set_led_trigger_name(rfk, "h1940-bluetooth"); - ret = rfkill_register(rfk); if (ret) goto err_rfkill; diff --git a/arch/arm/mach-s3c2410/include/mach/h1940.h b/arch/arm/mach-s3c2410/include/mach/h1940.h index 4559784..2aa683c 100644 --- a/arch/arm/mach-s3c2410/include/mach/h1940.h +++ b/arch/arm/mach-s3c2410/include/mach/h1940.h @@ -17,5 +17,8 @@ #define H1940_SUSPEND_CHECK (0x30080000) extern void h1940_pm_return(void); +extern int h1940_led_blink_set(unsigned gpio, int state, + unsigned long *delay_on, unsigned long *delay_off); + #endif /* __ASM_ARCH_H1940_H */ diff --git a/arch/arm/mach-s3c2410/mach-h1940.c b/arch/arm/mach-s3c2410/mach-h1940.c index 1e93f17..2a2fa06 100644 --- a/arch/arm/mach-s3c2410/mach-h1940.c +++ b/arch/arm/mach-s3c2410/mach-h1940.c @@ -23,8 +23,15 @@ #include <linux/platform_device.h> #include <linux/io.h> #include <linux/gpio.h> +#include <linux/input.h> +#include <linux/gpio_keys.h> #include <linux/pwm_backlight.h> #include <linux/i2c.h> +#include <linux/leds.h> +#include <linux/pda_power.h> +#include <linux/s3c_adc_battery.h> +#include <linux/delay.h> + #include <video/platform_lcd.h> #include <linux/mmc/host.h> @@ -203,20 +210,239 @@ static struct s3c2410fb_mach_info h1940_fb_info __initdata = { .num_displays = 1, .default_display = 0, - .lpcsel= 0x02, - .gpccon= 0xaa940659, - .gpccon_mask= 0xffffffff, - .gpcup= 0x0000ffff, - .gpcup_mask= 0xffffffff, - .gpdcon= 0xaa84aaa0, - .gpdcon_mask= 0xffffffff, - .gpdup= 0x0000faff, - .gpdup_mask= 0xffffffff, + .lpcsel = 0x02, + .gpccon = 0xaa940659, + .gpccon_mask = 0xffffc0f0, + .gpcup = 0x0000ffff, + .gpcup_mask = 0xffffffff, + .gpdcon = 0xaa84aaa0, + .gpdcon_mask = 0xffffffff, + .gpdup = 0x0000faff, + .gpdup_mask = 0xffffffff, }; -static struct platform_device h1940_device_leds = { - .name = "h1940-leds", +static int power_supply_init(struct device *dev) +{ + return gpio_request(S3C2410_GPF(2), "cable plugged"); +} + +static int h1940_is_ac_online(void) +{ + return !gpio_get_value(S3C2410_GPF(2)); +} + +static void power_supply_exit(struct device *dev) +{ + gpio_free(S3C2410_GPF(2)); +} + +static char *h1940_supplicants[] = { + "main-battery", + "backup-battery", +}; + +static struct pda_power_pdata power_supply_info = { + .init = power_supply_init, + .is_ac_online = h1940_is_ac_online, + .exit = power_supply_exit, + .supplied_to = h1940_supplicants, + .num_supplicants = ARRAY_SIZE(h1940_supplicants), +}; + +static struct resource power_supply_resources[] = { + [0] = { + .name = "ac", + .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE | + IORESOURCE_IRQ_HIGHEDGE, + .start = IRQ_EINT2, + .end = IRQ_EINT2, + }, +}; + +static struct platform_device power_supply = { + .name = "pda-power", + .id = -1, + .dev = { + .platform_data = + &power_supply_info, + }, + .resource = power_supply_resources, + .num_resources = ARRAY_SIZE(power_supply_resources), +}; + +static const struct s3c_adc_bat_thresh bat_lut_noac[] = { + { .volt = 4070, .cur = 162, .level = 100}, + { .volt = 4040, .cur = 165, .level = 95}, + { .volt = 4016, .cur = 164, .level = 90}, + { .volt = 3996, .cur = 166, .level = 85}, + { .volt = 3971, .cur = 168, .level = 80}, + { .volt = 3951, .cur = 168, .level = 75}, + { .volt = 3931, .cur = 170, .level = 70}, + { .volt = 3903, .cur = 172, .level = 65}, + { .volt = 3886, .cur = 172, .level = 60}, + { .volt = 3858, .cur = 176, .level = 55}, + { .volt = 3842, .cur = 176, .level = 50}, + { .volt = 3818, .cur = 176, .level = 45}, + { .volt = 3789, .cur = 180, .level = 40}, + { .volt = 3769, .cur = 180, .level = 35}, + { .volt = 3749, .cur = 184, .level = 30}, + { .volt = 3732, .cur = 184, .level = 25}, + { .volt = 3716, .cur = 184, .level = 20}, + { .volt = 3708, .cur = 184, .level = 15}, + { .volt = 3716, .cur = 96, .level = 10}, + { .volt = 3700, .cur = 96, .level = 5}, + { .volt = 3684, .cur = 96, .level = 0}, +}; + +static const struct s3c_adc_bat_thresh bat_lut_acin[] = { + { .volt = 4130, .cur = 0, .level = 100}, + { .volt = 3982, .cur = 0, .level = 50}, + { .volt = 3854, .cur = 0, .level = 10}, + { .volt = 3841, .cur = 0, .level = 0}, +}; + +int h1940_bat_init(void) +{ + int ret; + + ret = gpio_request(H1940_LATCH_SM803_ENABLE, "h1940-charger-enable"); + if (ret) + return ret; + gpio_direction_output(H1940_LATCH_SM803_ENABLE, 0); + + return 0; + +} + +void h1940_bat_exit(void) +{ + gpio_free(H1940_LATCH_SM803_ENABLE); +} + +void h1940_enable_charger(void) +{ + gpio_set_value(H1940_LATCH_SM803_ENABLE, 1); +} + +void h1940_disable_charger(void) +{ + gpio_set_value(H1940_LATCH_SM803_ENABLE, 0); +} + +static struct s3c_adc_bat_pdata h1940_bat_cfg = { + .init = h1940_bat_init, + .exit = h1940_bat_exit, + .enable_charger = h1940_enable_charger, + .disable_charger = h1940_disable_charger, + .gpio_charge_finished = S3C2410_GPF(3), + .gpio_inverted = 1, + .lut_noac = bat_lut_noac, + .lut_noac_cnt = ARRAY_SIZE(bat_lut_noac), + .lut_acin = bat_lut_acin, + .lut_acin_cnt = ARRAY_SIZE(bat_lut_acin), + .volt_channel = 0, + .current_channel = 1, + .volt_mult = 4056, + .current_mult = 1893, + .internal_impedance = 200, + .backup_volt_channel = 3, + /* TODO Check backup volt multiplier */ + .backup_volt_mult = 4056, + .backup_volt_min = 0, + .backup_volt_max = 4149288 +}; + +static struct platform_device h1940_battery = { + .name = "s3c-adc-battery", .id = -1, + .dev = { + .parent = &s3c_device_adc.dev, + .platform_data = &h1940_bat_cfg, + }, +}; + +DEFINE_SPINLOCK(h1940_blink_spin); + +int h1940_led_blink_set(unsigned gpio, int state, + unsigned long *delay_on, unsigned long *delay_off) +{ + int blink_gpio, check_gpio1, check_gpio2; + + switch (gpio) { + case H1940_LATCH_LED_GREEN: + blink_gpio = S3C2410_GPA(7); + check_gpio1 = S3C2410_GPA(1); + check_gpio2 = S3C2410_GPA(3); + break; + case H1940_LATCH_LED_RED: + blink_gpio = S3C2410_GPA(1); + check_gpio1 = S3C2410_GPA(7); + check_gpio2 = S3C2410_GPA(3); + break; + default: + blink_gpio = S3C2410_GPA(3); + check_gpio1 = S3C2410_GPA(1); + check_gpio1 = S3C2410_GPA(7); + break; + } + + if (delay_on && delay_off && !*delay_on && !*delay_off) + *delay_on = *delay_off = 500; + + spin_lock(&h1940_blink_spin); + + switch (state) { + case GPIO_LED_NO_BLINK_LOW: + case GPIO_LED_NO_BLINK_HIGH: + if (!gpio_get_value(check_gpio1) && + !gpio_get_value(check_gpio2)) + gpio_set_value(H1940_LATCH_LED_FLASH, 0); + gpio_set_value(blink_gpio, 0); + if (gpio_is_valid(gpio)) + gpio_set_value(gpio, state); + break; + case GPIO_LED_BLINK: + if (gpio_is_valid(gpio)) + gpio_set_value(gpio, 0); + gpio_set_value(H1940_LATCH_LED_FLASH, 1); + gpio_set_value(blink_gpio, 1); + break; + } + + spin_unlock(&h1940_blink_spin); + + return 0; +} +EXPORT_SYMBOL(h1940_led_blink_set); + +static struct gpio_led h1940_leds_desc[] = { + { + .name = "Green", + .default_trigger = "main-battery-full", + .gpio = H1940_LATCH_LED_GREEN, + .retain_state_suspended = 1, + }, + { + .name = "Red", + .default_trigger + = "main-battery-charging-blink-full-solid", + .gpio = H1940_LATCH_LED_RED, + .retain_state_suspended = 1, + }, +}; + +static struct gpio_led_platform_data h1940_leds_pdata = { + .num_leds = ARRAY_SIZE(h1940_leds_desc), + .leds = h1940_leds_desc, + .gpio_blink_set = h1940_led_blink_set, +}; + +static struct platform_device h1940_device_leds = { + .name = "leds-gpio", + .id = -1, + .dev = { + .platform_data = &h1940_leds_pdata, + }, }; static struct platform_device h1940_device_bluetooth = { @@ -302,14 +528,14 @@ static struct platform_device h1940_backlight = { static void h1940_lcd_power_set(struct plat_lcd_data *pd, unsigned int power) { - int value; + int value, retries = 100; if (!power) { gpio_set_value(S3C2410_GPC(0), 0); /* wait for 3ac */ do { value = gpio_get_value(S3C2410_GPC(6)); - } while (value); + } while (value && retries--); gpio_set_value(H1940_LATCH_LCD_P2, 0); gpio_set_value(H1940_LATCH_LCD_P3, 0); @@ -327,6 +553,9 @@ static void h1940_lcd_power_set(struct plat_lcd_data *pd, gpio_set_value(H1940_LATCH_LCD_P0, 1); gpio_set_value(H1940_LATCH_LCD_P1, 1); + gpio_direction_input(S3C2410_GPC(1)); + gpio_direction_input(S3C2410_GPC(4)); + mdelay(10); s3c_gpio_cfgpin(S3C2410_GPC(1), S3C_GPIO_SFN(2)); s3c_gpio_cfgpin(S3C2410_GPC(4), S3C_GPIO_SFN(2)); @@ -362,7 +591,44 @@ static struct i2c_board_info h1940_i2c_devices[] = { }, }; +#define DECLARE_BUTTON(p, k, n, w) \ + { \ + .gpio = p, \ + .code = k, \ + .desc = n, \ + .wakeup = w, \ + .active_low = 1, \ + } + +static struct gpio_keys_button h1940_buttons[] = { + DECLARE_BUTTON(S3C2410_GPF(0), KEY_POWER, "Power", 1), + DECLARE_BUTTON(S3C2410_GPF(6), KEY_ENTER, "Select", 1), + DECLARE_BUTTON(S3C2410_GPF(7), KEY_RECORD, "Record", 0), + DECLARE_BUTTON(S3C2410_GPG(0), KEY_F11, "Calendar", 0), + DECLARE_BUTTON(S3C2410_GPG(2), KEY_F12, "Contacts", 0), + DECLARE_BUTTON(S3C2410_GPG(3), KEY_MAIL, "Mail", 0), + DECLARE_BUTTON(S3C2410_GPG(6), KEY_LEFT, "Left_arrow", 0), + DECLARE_BUTTON(S3C2410_GPG(7), KEY_HOMEPAGE, "Home", 0), + DECLARE_BUTTON(S3C2410_GPG(8), KEY_RIGHT, "Right_arrow", 0), + DECLARE_BUTTON(S3C2410_GPG(9), KEY_UP, "Up_arrow", 0), + DECLARE_BUTTON(S3C2410_GPG(10), KEY_DOWN, "Down_arrow", 0), +}; + +static struct gpio_keys_platform_data h1940_buttons_data = { + .buttons = h1940_buttons, + .nbuttons = ARRAY_SIZE(h1940_buttons), +}; + +static struct platform_device h1940_dev_buttons = { + .name = "gpio-keys", + .id = -1, + .dev = { + .platform_data = &h1940_buttons_data, + } +}; + static struct platform_device *h1940_devices[] __initdata = { + &h1940_dev_buttons, &s3c_device_ohci, &s3c_device_lcd, &s3c_device_wdt, @@ -379,6 +645,8 @@ static struct platform_device *h1940_devices[] __initdata = { &h1940_lcd_powerdev, &s3c_device_adc, &s3c_device_ts, + &power_supply, + &h1940_battery, }; static void __init h1940_map_io(void) @@ -461,6 +729,15 @@ static void __init h1940_init(void) platform_add_devices(h1940_devices, ARRAY_SIZE(h1940_devices)); + gpio_request(S3C2410_GPA(1), "Red LED blink"); + gpio_request(S3C2410_GPA(3), "Blue LED blink"); + gpio_request(S3C2410_GPA(7), "Green LED blink"); + gpio_request(H1940_LATCH_LED_FLASH, "LED blink"); + gpio_direction_output(S3C2410_GPA(1), 0); + gpio_direction_output(S3C2410_GPA(3), 0); + gpio_direction_output(S3C2410_GPA(7), 0); + gpio_direction_output(H1940_LATCH_LED_FLASH, 0); + i2c_register_board_info(0, h1940_i2c_devices, ARRAY_SIZE(h1940_i2c_devices)); } diff --git a/arch/arm/mach-s3c2440/mach-mini2440.c b/arch/arm/mach-s3c2440/mach-mini2440.c index d80f129..dfedc9c 100644 --- a/arch/arm/mach-s3c2440/mach-mini2440.c +++ b/arch/arm/mach-s3c2440/mach-mini2440.c @@ -488,6 +488,11 @@ static struct i2c_board_info mini2440_i2c_devs[] __initdata = { }, }; +static struct platform_device uda1340_codec = { + .name = "uda134x-codec", + .id = -1, +}; + static struct platform_device *mini2440_devices[] __initdata = { &s3c_device_ohci, &s3c_device_wdt, @@ -503,7 +508,9 @@ static struct platform_device *mini2440_devices[] __initdata = { &s3c_device_nand, &s3c_device_sdi, &s3c_device_iis, + &uda1340_codec, &mini2440_audio, + &samsung_asoc_dma, }; static void __init mini2440_map_io(void) diff --git a/arch/arm/mach-s3c2440/mach-rx1950.c b/arch/arm/mach-s3c2440/mach-rx1950.c index 86bbc23..27ea950 100644 --- a/arch/arm/mach-s3c2440/mach-rx1950.c +++ b/arch/arm/mach-s3c2440/mach-rx1950.c @@ -263,27 +263,78 @@ void rx1950_disable_charger(void) gpio_direction_output(S3C2410_GPJ(3), 0); } +DEFINE_SPINLOCK(rx1950_blink_spin); + +static int rx1950_led_blink_set(unsigned gpio, int state, + unsigned long *delay_on, unsigned long *delay_off) +{ + int blink_gpio, check_gpio; + + switch (gpio) { + case S3C2410_GPA(6): + blink_gpio = S3C2410_GPA(4); + check_gpio = S3C2410_GPA(3); + break; + case S3C2410_GPA(7): + blink_gpio = S3C2410_GPA(3); + check_gpio = S3C2410_GPA(4); + break; + default: + return -EINVAL; + break; + } + + if (delay_on && delay_off && !*delay_on && !*delay_off) + *delay_on = *delay_off = 500; + + spin_lock(&rx1950_blink_spin); + + switch (state) { + case GPIO_LED_NO_BLINK_LOW: + case GPIO_LED_NO_BLINK_HIGH: + if (!gpio_get_value(check_gpio)) + gpio_set_value(S3C2410_GPJ(6), 0); + gpio_set_value(blink_gpio, 0); + gpio_set_value(gpio, state); + break; + case GPIO_LED_BLINK: + gpio_set_value(gpio, 0); + gpio_set_value(S3C2410_GPJ(6), 1); + gpio_set_value(blink_gpio, 1); + break; + } + + spin_unlock(&rx1950_blink_spin); + + return 0; +} + static struct gpio_led rx1950_leds_desc[] = { { - .name = "Green", - .default_trigger = "main-battery-charging-or-full", - .gpio = S3C2410_GPA(6), + .name = "Green", + .default_trigger = "main-battery-full", + .gpio = S3C2410_GPA(6), + .retain_state_suspended = 1, }, { - .name = "Red", - .default_trigger = "main-battery-full", - .gpio = S3C2410_GPA(7), + .name = "Red", + .default_trigger + = "main-battery-charging-blink-full-solid", + .gpio = S3C2410_GPA(7), + .retain_state_suspended = 1, }, { - .name = "Blue", + .name = "Blue", .default_trigger = "rx1950-acx-mem", - .gpio = S3C2410_GPA(11), + .gpio = S3C2410_GPA(11), + .retain_state_suspended = 1, }, }; static struct gpio_led_platform_data rx1950_leds_pdata = { .num_leds = ARRAY_SIZE(rx1950_leds_desc), .leds = rx1950_leds_desc, + .gpio_blink_set = rx1950_led_blink_set, }; static struct platform_device rx1950_leds = { @@ -752,6 +803,13 @@ static void __init rx1950_init_machine(void) WARN_ON(gpio_request(S3C2410_GPB(1), "LCD power")); + WARN_ON(gpio_request(S3C2410_GPA(3), "Red blink")); + WARN_ON(gpio_request(S3C2410_GPA(4), "Green blink")); + WARN_ON(gpio_request(S3C2410_GPJ(6), "LED blink")); + gpio_direction_output(S3C2410_GPA(3), 0); + gpio_direction_output(S3C2410_GPA(4), 0); + gpio_direction_output(S3C2410_GPJ(6), 0); + platform_add_devices(rx1950_devices, ARRAY_SIZE(rx1950_devices)); i2c_register_board_info(0, rx1950_i2c_devices, diff --git a/arch/arm/mach-s5pv210/mach-goni.c b/arch/arm/mach-s5pv210/mach-goni.c index 2432917..31d5aa7 100644 --- a/arch/arm/mach-s5pv210/mach-goni.c +++ b/arch/arm/mach-s5pv210/mach-goni.c @@ -15,7 +15,7 @@ #include <linux/fb.h> #include <linux/i2c.h> #include <linux/i2c-gpio.h> -#include <linux/i2c/qt602240_ts.h> +#include <linux/i2c/atmel_mxt_ts.h> #include <linux/mfd/max8998.h> #include <linux/mfd/wm8994/pdata.h> #include <linux/regulator/fixed.h> @@ -25,6 +25,7 @@ #include <linux/gpio_keys.h> #include <linux/input.h> #include <linux/gpio.h> +#include <linux/interrupt.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> @@ -225,7 +226,7 @@ static void __init goni_radio_init(void) } /* TSP */ -static struct qt602240_platform_data qt602240_platform_data = { +static struct mxt_platform_data qt602240_platform_data = { .x_line = 17, .y_line = 11, .x_size = 800, @@ -233,7 +234,8 @@ static struct qt602240_platform_data qt602240_platform_data = { .blen = 0x21, .threshold = 0x28, .voltage = 2800000, /* 2.8V */ - .orient = QT602240_DIAGONAL, + .orient = MXT_DIAGONAL, + .irqflags = IRQF_TRIGGER_FALLING, }; static struct s3c2410_platform_i2c i2c2_data __initdata = { diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c index 1a8118c9..a94f29d 100644 --- a/arch/arm/mach-shmobile/board-ap4evb.c +++ b/arch/arm/mach-shmobile/board-ap4evb.c @@ -923,7 +923,8 @@ static struct platform_device ceu_device = { .num_resources = ARRAY_SIZE(ceu_resources), .resource = ceu_resources, .dev = { - .platform_data = &sh_mobile_ceu_info, + .platform_data = &sh_mobile_ceu_info, + .coherent_dma_mask = 0xffffffff, }, }; diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c index 1a63c21..49bc074 100644 --- a/arch/arm/mach-shmobile/board-mackerel.c +++ b/arch/arm/mach-shmobile/board-mackerel.c @@ -295,6 +295,18 @@ static struct fb_videomode mackerel_lcdc_modes[] = { }, }; +static int mackerel_set_brightness(void *board_data, int brightness) +{ + gpio_set_value(GPIO_PORT31, brightness); + + return 0; +} + +static int mackerel_get_brightness(void *board_data) +{ + return gpio_get_value(GPIO_PORT31); +} + static struct sh_mobile_lcdc_info lcdc_info = { .clock_source = LCDC_CLK_BUS, .ch[0] = { @@ -307,6 +319,14 @@ static struct sh_mobile_lcdc_info lcdc_info = { .flags = 0, .lcd_size_cfg.width = 152, .lcd_size_cfg.height = 91, + .board_cfg = { + .set_brightness = mackerel_set_brightness, + .get_brightness = mackerel_get_brightness, + }, + .bl_info = { + .name = "sh_mobile_lcdc_bl", + .max_brightness = 1, + }, } }; @@ -901,7 +921,8 @@ static struct platform_device ceu_device = { .num_resources = ARRAY_SIZE(ceu_resources), .resource = ceu_resources, .dev = { - .platform_data = &sh_mobile_ceu_info, + .platform_data = &sh_mobile_ceu_info, + .coherent_dma_mask = 0xffffffff, }, }; @@ -1059,7 +1080,7 @@ static void __init mackerel_init(void) gpio_request(GPIO_FN_LCDDCK, NULL); gpio_request(GPIO_PORT31, NULL); /* backlight */ - gpio_direction_output(GPIO_PORT31, 1); + gpio_direction_output(GPIO_PORT31, 0); /* off by default */ gpio_request(GPIO_PORT151, NULL); /* LCDDON */ gpio_direction_output(GPIO_PORT151, 1); diff --git a/arch/arm/mach-shmobile/include/mach/mmcif-ap4eb.h b/arch/arm/mach-shmobile/include/mach/mmc-ap4eb.h index a8d02be..db59fdb 100644 --- a/arch/arm/mach-shmobile/include/mach/mmcif-ap4eb.h +++ b/arch/arm/mach-shmobile/include/mach/mmc-ap4eb.h @@ -1,5 +1,5 @@ -#ifndef MMCIF_AP4EB_H -#define MMCIF_AP4EB_H +#ifndef MMC_AP4EB_H +#define MMC_AP4EB_H #define PORT185CR (void __iomem *)0xe60520b9 #define PORT186CR (void __iomem *)0xe60520ba @@ -8,7 +8,7 @@ #define PORTR191_160DR (void __iomem *)0xe6056014 -static inline void mmcif_init_progress(void) +static inline void mmc_init_progress(void) { /* Initialise LEDS1-4 * registers: PORT185CR-PORT188CR (LED1-LED4 Control) @@ -20,10 +20,10 @@ static inline void mmcif_init_progress(void) __raw_writeb(0x10, PORT188CR); } -static inline void mmcif_update_progress(int n) +static inline void mmc_update_progress(int n) { __raw_writel((__raw_readl(PORTR191_160DR) & ~(0xf << 25)) | (1 << (25 + n)), PORTR191_160DR); } -#endif /* MMCIF_AP4EB_H */ +#endif /* MMC_AP4EB_H */ diff --git a/arch/arm/mach-shmobile/include/mach/mmcif-mackerel.h b/arch/arm/mach-shmobile/include/mach/mmc-mackerel.h index 4b4f694..15d3a9e 100644 --- a/arch/arm/mach-shmobile/include/mach/mmcif-mackerel.h +++ b/arch/arm/mach-shmobile/include/mach/mmc-mackerel.h @@ -1,5 +1,5 @@ -#ifndef MMCIF_MACKEREL_H -#define MMCIF_MACKEREL_H +#ifndef MMC_MACKEREL_H +#define MMC_MACKEREL_H #define PORT0CR (void __iomem *)0xe6051000 #define PORT1CR (void __iomem *)0xe6051001 @@ -9,7 +9,7 @@ #define PORTR031_000DR (void __iomem *)0xe6055000 #define PORTL159_128DR (void __iomem *)0xe6054010 -static inline void mmcif_init_progress(void) +static inline void mmc_init_progress(void) { /* Initialise LEDS0-3 * registers: PORT0CR-PORT2CR,PORT159CR (LED0-LED3 Control) @@ -21,7 +21,7 @@ static inline void mmcif_init_progress(void) __raw_writeb(0x10, PORT159CR); } -static inline void mmcif_update_progress(int n) +static inline void mmc_update_progress(int n) { unsigned a = 0, b = 0; @@ -35,5 +35,4 @@ static inline void mmcif_update_progress(int n) __raw_writel((__raw_readl(PORTL159_128DR) & ~(1 << 31)) | b, PORTL159_128DR); } - -#endif /* MMCIF_MACKEREL_H */ +#endif /* MMC_MACKEREL_H */ diff --git a/arch/arm/mach-shmobile/include/mach/mmcif.h b/arch/arm/mach-shmobile/include/mach/mmc.h index f4dc327..e11560a 100644 --- a/arch/arm/mach-shmobile/include/mach/mmcif.h +++ b/arch/arm/mach-shmobile/include/mach/mmc.h @@ -1,5 +1,5 @@ -#ifndef MMCIF_H -#define MMCIF_H +#ifndef MMC_H +#define MMC_H /************************************************** * @@ -8,11 +8,11 @@ **************************************************/ #ifdef CONFIG_MACH_AP4EVB -#include "mach/mmcif-ap4eb.h" +#include "mach/mmc-ap4eb.h" #elif CONFIG_MACH_MACKEREL -#include "mach/mmcif-mackerel.h" +#include "mach/mmc-mackerel.h" #else #error "unsupported board." #endif -#endif /* MMCIF_H */ +#endif /* MMC_H */ diff --git a/arch/arm/mach-shmobile/localtimer.c b/arch/arm/mach-shmobile/localtimer.c index 2111c28..ad9ccc9 100644 --- a/arch/arm/mach-shmobile/localtimer.c +++ b/arch/arm/mach-shmobile/localtimer.c @@ -18,8 +18,9 @@ /* * Setup the local clock events for a CPU. */ -void __cpuinit local_timer_setup(struct clock_event_device *evt) +int __cpuinit local_timer_setup(struct clock_event_device *evt) { evt->irq = 29; twd_timer_setup(evt); + return 0; } diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig index 622a9ec..3cdeffc 100644 --- a/arch/arm/mach-tegra/Kconfig +++ b/arch/arm/mach-tegra/Kconfig @@ -36,6 +36,11 @@ config MACH_KAEN help Support for the Kaen version of Seaboard +config MACH_PAZ00 + bool "Paz00 board" + help + Support for the Toshiba AC100/Dynabook AZ netbook + config MACH_SEABOARD bool "Seaboard board" help diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile index 9f7a7e1..1afe050 100644 --- a/arch/arm/mach-tegra/Makefile +++ b/arch/arm/mach-tegra/Makefile @@ -22,6 +22,10 @@ obj-$(CONFIG_USB_SUPPORT) += usb_phy.o obj-${CONFIG_MACH_HARMONY} += board-harmony.o obj-${CONFIG_MACH_HARMONY} += board-harmony-pinmux.o obj-${CONFIG_MACH_HARMONY} += board-harmony-pcie.o +obj-${CONFIG_MACH_HARMONY} += board-harmony-power.o + +obj-${CONFIG_MACH_PAZ00} += board-paz00.o +obj-${CONFIG_MACH_PAZ00} += board-paz00-pinmux.o obj-${CONFIG_MACH_SEABOARD} += board-seaboard.o obj-${CONFIG_MACH_SEABOARD} += board-seaboard-pinmux.o diff --git a/arch/arm/mach-tegra/board-harmony-pcie.c b/arch/arm/mach-tegra/board-harmony-pcie.c index f7e7d45..9c27b95 100644 --- a/arch/arm/mach-tegra/board-harmony-pcie.c +++ b/arch/arm/mach-tegra/board-harmony-pcie.c @@ -27,13 +27,29 @@ #ifdef CONFIG_TEGRA_PCI +/* GPIO 3 of the PMIC */ +#define EN_VDD_1V05_GPIO (TEGRA_NR_GPIOS + 2) + static int __init harmony_pcie_init(void) { + struct regulator *regulator = NULL; int err; if (!machine_is_harmony()) return 0; + err = gpio_request(EN_VDD_1V05_GPIO, "EN_VDD_1V05"); + if (err) + return err; + + gpio_direction_output(EN_VDD_1V05_GPIO, 1); + + regulator = regulator_get(NULL, "pex_clk"); + if (IS_ERR_OR_NULL(regulator)) + goto err_reg; + + regulator_enable(regulator); + tegra_pinmux_set_tristate(TEGRA_PINGROUP_GPV, TEGRA_TRI_NORMAL); tegra_pinmux_set_tristate(TEGRA_PINGROUP_SLXA, TEGRA_TRI_NORMAL); tegra_pinmux_set_tristate(TEGRA_PINGROUP_SLXK, TEGRA_TRI_NORMAL); @@ -49,9 +65,15 @@ err_pcie: tegra_pinmux_set_tristate(TEGRA_PINGROUP_SLXA, TEGRA_TRI_TRISTATE); tegra_pinmux_set_tristate(TEGRA_PINGROUP_SLXK, TEGRA_TRI_TRISTATE); + regulator_disable(regulator); + regulator_put(regulator); +err_reg: + gpio_free(EN_VDD_1V05_GPIO); + return err; } -subsys_initcall(harmony_pcie_init); +/* PCI should be initialized after I2C, mfd and regulators */ +subsys_initcall_sync(harmony_pcie_init); #endif diff --git a/arch/arm/mach-tegra/board-harmony-pinmux.c b/arch/arm/mach-tegra/board-harmony-pinmux.c index 98368d9..4d63e2e 100644 --- a/arch/arm/mach-tegra/board-harmony-pinmux.c +++ b/arch/arm/mach-tegra/board-harmony-pinmux.c @@ -27,11 +27,11 @@ static struct tegra_pingroup_config harmony_pinmux[] = { {TEGRA_PINGROUP_ATC, TEGRA_MUX_NAND, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, {TEGRA_PINGROUP_ATD, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, {TEGRA_PINGROUP_ATE, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, - {TEGRA_PINGROUP_CDEV1, TEGRA_MUX_OSC, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE}, + {TEGRA_PINGROUP_CDEV1, TEGRA_MUX_PLLA_OUT, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, {TEGRA_PINGROUP_CDEV2, TEGRA_MUX_PLLP_OUT4, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE}, {TEGRA_PINGROUP_CRTP, TEGRA_MUX_CRT, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, {TEGRA_PINGROUP_CSUS, TEGRA_MUX_VI_SENSOR_CLK, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE}, - {TEGRA_PINGROUP_DAP1, TEGRA_MUX_DAP1, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, + {TEGRA_PINGROUP_DAP1, TEGRA_MUX_DAP1, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, {TEGRA_PINGROUP_DAP2, TEGRA_MUX_DAP2, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, {TEGRA_PINGROUP_DAP3, TEGRA_MUX_DAP3, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, {TEGRA_PINGROUP_DAP4, TEGRA_MUX_DAP4, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, @@ -114,13 +114,13 @@ static struct tegra_pingroup_config harmony_pinmux[] = { {TEGRA_PINGROUP_SLXK, TEGRA_MUX_PCIE, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, {TEGRA_PINGROUP_SPDI, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, {TEGRA_PINGROUP_SPDO, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, - {TEGRA_PINGROUP_SPIA, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE}, - {TEGRA_PINGROUP_SPIB, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE}, - {TEGRA_PINGROUP_SPIC, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_SPIA, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_SPIB, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_SPIC, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, {TEGRA_PINGROUP_SPID, TEGRA_MUX_SPI1, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE}, {TEGRA_PINGROUP_SPIE, TEGRA_MUX_SPI1, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, {TEGRA_PINGROUP_SPIF, TEGRA_MUX_SPI1, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE}, - {TEGRA_PINGROUP_SPIG, TEGRA_MUX_SPI2_ALT, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, + {TEGRA_PINGROUP_SPIG, TEGRA_MUX_SPI2_ALT, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, {TEGRA_PINGROUP_SPIH, TEGRA_MUX_SPI2_ALT, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, {TEGRA_PINGROUP_UAA, TEGRA_MUX_ULPI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, {TEGRA_PINGROUP_UAB, TEGRA_MUX_ULPI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, @@ -141,12 +141,16 @@ static struct tegra_pingroup_config harmony_pinmux[] = { }; static struct tegra_gpio_table gpio_table[] = { - { .gpio = TEGRA_GPIO_PI5, .enable = true }, /* mmc2 cd */ - { .gpio = TEGRA_GPIO_PH1, .enable = true }, /* mmc2 wp */ - { .gpio = TEGRA_GPIO_PT3, .enable = true }, /* mmc2 pwr */ - { .gpio = TEGRA_GPIO_PH2, .enable = true }, /* mmc4 cd */ - { .gpio = TEGRA_GPIO_PH3, .enable = true }, /* mmc4 wp */ - { .gpio = TEGRA_GPIO_PI6, .enable = true }, /* mmc4 pwr */ + { .gpio = TEGRA_GPIO_SD2_CD, .enable = true }, + { .gpio = TEGRA_GPIO_SD2_WP, .enable = true }, + { .gpio = TEGRA_GPIO_SD2_POWER, .enable = true }, + { .gpio = TEGRA_GPIO_SD4_CD, .enable = true }, + { .gpio = TEGRA_GPIO_SD4_WP, .enable = true }, + { .gpio = TEGRA_GPIO_SD4_POWER, .enable = true }, + { .gpio = TEGRA_GPIO_CDC_IRQ, .enable = true }, + { .gpio = TEGRA_GPIO_HP_DET, .enable = true }, + { .gpio = TEGRA_GPIO_INT_MIC_EN, .enable = true }, + { .gpio = TEGRA_GPIO_EXT_MIC_EN, .enable = true }, }; void harmony_pinmux_init(void) diff --git a/arch/arm/mach-tegra/board-harmony-power.c b/arch/arm/mach-tegra/board-harmony-power.c new file mode 100644 index 0000000..c84442c --- /dev/null +++ b/arch/arm/mach-tegra/board-harmony-power.c @@ -0,0 +1,117 @@ +/* + * Copyright (C) 2010 NVIDIA, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA + * 02111-1307, USA + */ +#include <linux/i2c.h> +#include <linux/platform_device.h> +#include <linux/gpio.h> + +#include <linux/regulator/machine.h> +#include <linux/mfd/tps6586x.h> + +#include <mach/irqs.h> + +#define PMC_CTRL 0x0 +#define PMC_CTRL_INTR_LOW (1 << 17) + +static struct regulator_consumer_supply tps658621_ldo0_supply[] = { + REGULATOR_SUPPLY("pex_clk", NULL), +}; + +static struct regulator_init_data ldo0_data = { + .constraints = { + .min_uV = 1250 * 1000, + .max_uV = 3300 * 1000, + .valid_modes_mask = (REGULATOR_MODE_NORMAL | + REGULATOR_MODE_STANDBY), + .valid_ops_mask = (REGULATOR_CHANGE_MODE | + REGULATOR_CHANGE_STATUS | + REGULATOR_CHANGE_VOLTAGE), + }, + .num_consumer_supplies = ARRAY_SIZE(tps658621_ldo0_supply), + .consumer_supplies = tps658621_ldo0_supply, +}; + +#define HARMONY_REGULATOR_INIT(_id, _minmv, _maxmv) \ + static struct regulator_init_data _id##_data = { \ + .constraints = { \ + .min_uV = (_minmv)*1000, \ + .max_uV = (_maxmv)*1000, \ + .valid_modes_mask = (REGULATOR_MODE_NORMAL | \ + REGULATOR_MODE_STANDBY), \ + .valid_ops_mask = (REGULATOR_CHANGE_MODE | \ + REGULATOR_CHANGE_STATUS | \ + REGULATOR_CHANGE_VOLTAGE), \ + }, \ + } + +HARMONY_REGULATOR_INIT(sm0, 725, 1500); +HARMONY_REGULATOR_INIT(sm1, 725, 1500); +HARMONY_REGULATOR_INIT(sm2, 3000, 4550); +HARMONY_REGULATOR_INIT(ldo1, 725, 1500); +HARMONY_REGULATOR_INIT(ldo2, 725, 1500); +HARMONY_REGULATOR_INIT(ldo3, 1250, 3300); +HARMONY_REGULATOR_INIT(ldo4, 1700, 2475); +HARMONY_REGULATOR_INIT(ldo5, 1250, 3300); +HARMONY_REGULATOR_INIT(ldo6, 1250, 3300); +HARMONY_REGULATOR_INIT(ldo7, 1250, 3300); +HARMONY_REGULATOR_INIT(ldo8, 1250, 3300); +HARMONY_REGULATOR_INIT(ldo9, 1250, 3300); + +#define TPS_REG(_id, _data) \ + { \ + .id = TPS6586X_ID_##_id, \ + .name = "tps6586x-regulator", \ + .platform_data = _data, \ + } + +static struct tps6586x_subdev_info tps_devs[] = { + TPS_REG(SM_0, &sm0_data), + TPS_REG(SM_1, &sm1_data), + TPS_REG(SM_2, &sm2_data), + TPS_REG(LDO_0, &ldo0_data), + TPS_REG(LDO_1, &ldo1_data), + TPS_REG(LDO_2, &ldo2_data), + TPS_REG(LDO_3, &ldo3_data), + TPS_REG(LDO_4, &ldo4_data), + TPS_REG(LDO_5, &ldo5_data), + TPS_REG(LDO_6, &ldo6_data), + TPS_REG(LDO_7, &ldo7_data), + TPS_REG(LDO_8, &ldo8_data), + TPS_REG(LDO_9, &ldo9_data), +}; + +static struct tps6586x_platform_data tps_platform = { + .irq_base = TEGRA_NR_IRQS, + .num_subdevs = ARRAY_SIZE(tps_devs), + .subdevs = tps_devs, + .gpio_base = TEGRA_NR_GPIOS, +}; + +static struct i2c_board_info __initdata harmony_regulators[] = { + { + I2C_BOARD_INFO("tps6586x", 0x34), + .irq = INT_EXTERNAL_PMU, + .platform_data = &tps_platform, + }, +}; + +int __init harmony_regulator_init(void) +{ + i2c_register_board_info(3, harmony_regulators, 1); + + return 0; +} diff --git a/arch/arm/mach-tegra/board-harmony.c b/arch/arm/mach-tegra/board-harmony.c index 49224e9..75c918a 100644 --- a/arch/arm/mach-tegra/board-harmony.c +++ b/arch/arm/mach-tegra/board-harmony.c @@ -2,6 +2,7 @@ * arch/arm/mach-tegra/board-harmony.c * * Copyright (C) 2010 Google, Inc. + * Copyright (C) 2011 NVIDIA, Inc. * * This software is licensed under the terms of the GNU General Public * License version 2, as published by the Free Software Foundation, and @@ -22,12 +23,18 @@ #include <linux/dma-mapping.h> #include <linux/pda_power.h> #include <linux/io.h> +#include <linux/gpio.h> +#include <linux/i2c.h> +#include <linux/i2c-tegra.h> + +#include <sound/wm8903.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/time.h> #include <asm/setup.h> +#include <mach/harmony_audio.h> #include <mach/iomap.h> #include <mach/irqs.h> #include <mach/sdhci.h> @@ -60,11 +67,81 @@ static struct platform_device debug_uart = { }, }; +static struct harmony_audio_platform_data harmony_audio_pdata = { + .gpio_spkr_en = TEGRA_GPIO_SPKR_EN, + .gpio_hp_det = TEGRA_GPIO_HP_DET, + .gpio_int_mic_en = TEGRA_GPIO_INT_MIC_EN, + .gpio_ext_mic_en = TEGRA_GPIO_EXT_MIC_EN, +}; + +static struct platform_device harmony_audio_device = { + .name = "tegra-snd-harmony", + .id = 0, + .dev = { + .platform_data = &harmony_audio_pdata, + }, +}; + +static struct tegra_i2c_platform_data harmony_i2c1_platform_data = { + .bus_clk_rate = 400000, +}; + +static struct tegra_i2c_platform_data harmony_i2c2_platform_data = { + .bus_clk_rate = 400000, +}; + +static struct tegra_i2c_platform_data harmony_i2c3_platform_data = { + .bus_clk_rate = 400000, +}; + +static struct tegra_i2c_platform_data harmony_dvc_platform_data = { + .bus_clk_rate = 400000, +}; + +static struct wm8903_platform_data harmony_wm8903_pdata = { + .irq_active_low = 0, + .micdet_cfg = 0, + .micdet_delay = 100, + .gpio_base = HARMONY_GPIO_WM8903(0), + .gpio_cfg = { + WM8903_GPIO_NO_CONFIG, + WM8903_GPIO_NO_CONFIG, + 0, + WM8903_GPIO_NO_CONFIG, + WM8903_GPIO_NO_CONFIG, + }, +}; + +static struct i2c_board_info __initdata wm8903_board_info = { + I2C_BOARD_INFO("wm8903", 0x1a), + .platform_data = &harmony_wm8903_pdata, + .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_CDC_IRQ), +}; + +static void __init harmony_i2c_init(void) +{ + tegra_i2c_device1.dev.platform_data = &harmony_i2c1_platform_data; + tegra_i2c_device2.dev.platform_data = &harmony_i2c2_platform_data; + tegra_i2c_device3.dev.platform_data = &harmony_i2c3_platform_data; + tegra_i2c_device4.dev.platform_data = &harmony_dvc_platform_data; + + platform_device_register(&tegra_i2c_device1); + platform_device_register(&tegra_i2c_device2); + platform_device_register(&tegra_i2c_device3); + platform_device_register(&tegra_i2c_device4); + + i2c_register_board_info(0, &wm8903_board_info, 1); +} + static struct platform_device *harmony_devices[] __initdata = { &debug_uart, &tegra_sdhci_device1, &tegra_sdhci_device2, &tegra_sdhci_device4, + &tegra_i2s_device1, + &tegra_das_device, + &tegra_pcm_device, + &harmony_audio_device, }; static void __init tegra_harmony_fixup(struct machine_desc *desc, @@ -80,6 +157,10 @@ static void __init tegra_harmony_fixup(struct machine_desc *desc, static __initdata struct tegra_clk_init_table harmony_clk_init_table[] = { /* name parent rate enabled */ { "uartd", "pll_p", 216000000, true }, + { "pll_a", "pll_p_out1", 56448000, true }, + { "pll_a_out0", "pll_a", 11289600, true }, + { "cdev1", NULL, 0, true }, + { "i2s1", "pll_a_out0", 11289600, false}, { NULL, NULL, 0, 0}, }; @@ -91,15 +172,15 @@ static struct tegra_sdhci_platform_data sdhci_pdata1 = { }; static struct tegra_sdhci_platform_data sdhci_pdata2 = { - .cd_gpio = TEGRA_GPIO_PI5, - .wp_gpio = TEGRA_GPIO_PH1, - .power_gpio = TEGRA_GPIO_PT3, + .cd_gpio = TEGRA_GPIO_SD2_CD, + .wp_gpio = TEGRA_GPIO_SD2_WP, + .power_gpio = TEGRA_GPIO_SD2_POWER, }; static struct tegra_sdhci_platform_data sdhci_pdata4 = { - .cd_gpio = TEGRA_GPIO_PH2, - .wp_gpio = TEGRA_GPIO_PH3, - .power_gpio = TEGRA_GPIO_PI6, + .cd_gpio = TEGRA_GPIO_SD4_CD, + .wp_gpio = TEGRA_GPIO_SD4_WP, + .power_gpio = TEGRA_GPIO_SD4_POWER, .is_8bit = 1, }; @@ -114,6 +195,8 @@ static void __init tegra_harmony_init(void) tegra_sdhci_device4.dev.platform_data = &sdhci_pdata4; platform_add_devices(harmony_devices, ARRAY_SIZE(harmony_devices)); + harmony_i2c_init(); + harmony_regulator_init(); } MACHINE_START(HARMONY, "harmony") diff --git a/arch/arm/mach-tegra/board-harmony.h b/arch/arm/mach-tegra/board-harmony.h index 09ca775..1e57b07 100644 --- a/arch/arm/mach-tegra/board-harmony.h +++ b/arch/arm/mach-tegra/board-harmony.h @@ -17,6 +17,21 @@ #ifndef _MACH_TEGRA_BOARD_HARMONY_H #define _MACH_TEGRA_BOARD_HARMONY_H +#define HARMONY_GPIO_WM8903(_x_) (TEGRA_NR_GPIOS + (_x_)) + +#define TEGRA_GPIO_SD2_CD TEGRA_GPIO_PI5 +#define TEGRA_GPIO_SD2_WP TEGRA_GPIO_PH1 +#define TEGRA_GPIO_SD2_POWER TEGRA_GPIO_PT3 +#define TEGRA_GPIO_SD4_CD TEGRA_GPIO_PH2 +#define TEGRA_GPIO_SD4_WP TEGRA_GPIO_PH3 +#define TEGRA_GPIO_SD4_POWER TEGRA_GPIO_PI6 +#define TEGRA_GPIO_CDC_IRQ TEGRA_GPIO_PX3 +#define TEGRA_GPIO_SPKR_EN HARMONY_GPIO_WM8903(2) +#define TEGRA_GPIO_HP_DET TEGRA_GPIO_PW2 +#define TEGRA_GPIO_INT_MIC_EN TEGRA_GPIO_PX0 +#define TEGRA_GPIO_EXT_MIC_EN TEGRA_GPIO_PX1 + void harmony_pinmux_init(void); +int harmony_regulator_init(void); #endif diff --git a/arch/arm/mach-tegra/board-paz00-pinmux.c b/arch/arm/mach-tegra/board-paz00-pinmux.c new file mode 100644 index 0000000..2643d1b --- /dev/null +++ b/arch/arm/mach-tegra/board-paz00-pinmux.c @@ -0,0 +1,157 @@ +/* + * arch/arm/mach-tegra/board-paz00-pinmux.c + * + * Copyright (C) 2010 Marc Dietrich <marvin24@gmx.de> + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include <linux/kernel.h> +#include <linux/gpio.h> +#include <mach/pinmux.h> + +#include "gpio-names.h" +#include "board-paz00.h" + +static struct tegra_pingroup_config paz00_pinmux[] = { + {TEGRA_PINGROUP_ATA, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_ATB, TEGRA_MUX_SDIO4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_ATC, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_ATD, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_ATE, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_CDEV1, TEGRA_MUX_PLLA_OUT, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE}, + {TEGRA_PINGROUP_CDEV2, TEGRA_MUX_PLLP_OUT4, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_CRTP, TEGRA_MUX_CRT, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, + {TEGRA_PINGROUP_CSUS, TEGRA_MUX_PLLC_OUT1, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE}, + {TEGRA_PINGROUP_DAP1, TEGRA_MUX_DAP1, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_DAP2, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_DAP3, TEGRA_MUX_DAP3, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, + {TEGRA_PINGROUP_DAP4, TEGRA_MUX_DAP4, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, + {TEGRA_PINGROUP_DDC, TEGRA_MUX_I2C2, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_DTA, TEGRA_MUX_RSVD1, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, + {TEGRA_PINGROUP_DTB, TEGRA_MUX_RSVD1, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, + {TEGRA_PINGROUP_DTC, TEGRA_MUX_RSVD1, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, + {TEGRA_PINGROUP_DTD, TEGRA_MUX_RSVD1, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, + {TEGRA_PINGROUP_DTE, TEGRA_MUX_RSVD1, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, + {TEGRA_PINGROUP_DTF, TEGRA_MUX_I2C3, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_GMA, TEGRA_MUX_SDIO4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_GMB, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_GMC, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_GMD, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_GME, TEGRA_MUX_SDIO4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_GPU, TEGRA_MUX_PWM, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_GPU7, TEGRA_MUX_RTCK, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_GPV, TEGRA_MUX_PCIE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_HDINT, TEGRA_MUX_HDMI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_I2CP, TEGRA_MUX_I2C, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_IRRX, TEGRA_MUX_UARTA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_IRTX, TEGRA_MUX_UARTA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_KBCA, TEGRA_MUX_KBC, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_KBCB, TEGRA_MUX_SDIO2, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_KBCC, TEGRA_MUX_KBC, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_KBCD, TEGRA_MUX_SDIO2, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_KBCE, TEGRA_MUX_KBC, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_KBCF, TEGRA_MUX_KBC, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_LCSN, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, + {TEGRA_PINGROUP_LD0, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_LD1, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_LD10, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_LD11, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_LD12, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_LD13, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_LD14, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_LD15, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_LD16, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_LD17, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_LD2, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_LD3, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_LD4, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_LD5, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_LD6, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_LD7, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_LD8, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_LD9, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_LDC, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_LDI, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_LHP0, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE}, + {TEGRA_PINGROUP_LHP1, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE}, + {TEGRA_PINGROUP_LHP2, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE}, + {TEGRA_PINGROUP_LHS, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_LM0, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, + {TEGRA_PINGROUP_LM1, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, + {TEGRA_PINGROUP_LPP, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE}, + {TEGRA_PINGROUP_LPW0, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, + {TEGRA_PINGROUP_LPW1, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, + {TEGRA_PINGROUP_LPW2, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, + {TEGRA_PINGROUP_LSC0, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_LSC1, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, + {TEGRA_PINGROUP_LSCK, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, + {TEGRA_PINGROUP_LSDA, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, + {TEGRA_PINGROUP_LSDI, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, + {TEGRA_PINGROUP_LSPI, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_LVP0, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, + {TEGRA_PINGROUP_LVP1, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE}, + {TEGRA_PINGROUP_LVS, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_OWC, TEGRA_MUX_OWR, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, + {TEGRA_PINGROUP_PMC, TEGRA_MUX_PWR_ON, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_PTA, TEGRA_MUX_HDMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_RM, TEGRA_MUX_I2C, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_SDB, TEGRA_MUX_PWM, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, + {TEGRA_PINGROUP_SDC, TEGRA_MUX_TWC, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, + {TEGRA_PINGROUP_SDD, TEGRA_MUX_PWM, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, + {TEGRA_PINGROUP_SDIO1, TEGRA_MUX_SDIO1, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_SLXA, TEGRA_MUX_PCIE, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, + {TEGRA_PINGROUP_SLXC, TEGRA_MUX_SPI4, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, + {TEGRA_PINGROUP_SLXD, TEGRA_MUX_SPI4, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, + {TEGRA_PINGROUP_SLXK, TEGRA_MUX_PCIE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_SPDI, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, + {TEGRA_PINGROUP_SPDO, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_SPIA, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE}, + {TEGRA_PINGROUP_SPIB, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE}, + {TEGRA_PINGROUP_SPIC, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_SPID, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE}, + {TEGRA_PINGROUP_SPIE, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, + {TEGRA_PINGROUP_SPIF, TEGRA_MUX_RSVD4, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE}, + {TEGRA_PINGROUP_SPIG, TEGRA_MUX_SPI2_ALT, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_SPIH, TEGRA_MUX_SPI2_ALT, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, + {TEGRA_PINGROUP_UAA, TEGRA_MUX_ULPI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_UAB, TEGRA_MUX_ULPI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_UAC, TEGRA_MUX_RSVD4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_UAD, TEGRA_MUX_SPDIF, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, + {TEGRA_PINGROUP_UCA, TEGRA_MUX_UARTC, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, + {TEGRA_PINGROUP_UCB, TEGRA_MUX_UARTC, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, + {TEGRA_PINGROUP_UDA, TEGRA_MUX_ULPI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_CK32, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_DDRC, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_PMCA, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_PMCB, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_PMCC, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_PMCD, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_PMCE, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_XM2C, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_XM2D, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, +}; + +static struct tegra_gpio_table gpio_table[] = { + { .gpio = TEGRA_GPIO_SD1_CD, .enable = true }, + { .gpio = TEGRA_GPIO_SD1_WP, .enable = true }, + { .gpio = TEGRA_GPIO_SD1_POWER, .enable = true }, + { .gpio = TEGRA_GPIO_SD4_CD, .enable = true }, + { .gpio = TEGRA_GPIO_SD4_WP, .enable = true }, + { .gpio = TEGRA_GPIO_SD4_POWER, .enable = true }, +}; + +void paz00_pinmux_init(void) +{ + tegra_pinmux_config_table(paz00_pinmux, ARRAY_SIZE(paz00_pinmux)); + + tegra_gpio_config(gpio_table, ARRAY_SIZE(gpio_table)); +} diff --git a/arch/arm/mach-tegra/board-paz00.c b/arch/arm/mach-tegra/board-paz00.c new file mode 100644 index 0000000..57e50a8 --- /dev/null +++ b/arch/arm/mach-tegra/board-paz00.c @@ -0,0 +1,128 @@ +/* + * arch/arm/mach-tegra/board-paz00.c + * + * Copyright (C) 2011 Marc Dietrich <marvin24@gmx.de> + * + * Based on board-harmony.c + * Copyright (C) 2010 Google, Inc. + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/platform_device.h> +#include <linux/serial_8250.h> +#include <linux/clk.h> +#include <linux/dma-mapping.h> +#include <linux/pda_power.h> +#include <linux/io.h> + +#include <asm/mach-types.h> +#include <asm/mach/arch.h> +#include <asm/mach/time.h> +#include <asm/setup.h> + +#include <mach/iomap.h> +#include <mach/irqs.h> +#include <mach/sdhci.h> + +#include "board.h" +#include "board-paz00.h" +#include "clock.h" +#include "devices.h" +#include "gpio-names.h" + +static struct plat_serial8250_port debug_uart_platform_data[] = { + { + .membase = IO_ADDRESS(TEGRA_UARTD_BASE), + .mapbase = TEGRA_UARTD_BASE, + .irq = INT_UARTD, + .flags = UPF_BOOT_AUTOCONF, + .iotype = UPIO_MEM, + .regshift = 2, + .uartclk = 216000000, + }, { + .flags = 0 + } +}; + +static struct platform_device debug_uart = { + .name = "serial8250", + .id = PLAT8250_DEV_PLATFORM, + .dev = { + .platform_data = debug_uart_platform_data, + }, +}; + +static struct platform_device *paz00_devices[] __initdata = { + &debug_uart, + &tegra_sdhci_device1, + &tegra_sdhci_device2, + &tegra_sdhci_device4, +}; + +static void __init tegra_paz00_fixup(struct machine_desc *desc, + struct tag *tags, char **cmdline, struct meminfo *mi) +{ + mi->nr_banks = 1; + mi->bank[0].start = PHYS_OFFSET; + mi->bank[0].size = 448 * SZ_1M; +} + +static __initdata struct tegra_clk_init_table paz00_clk_init_table[] = { + /* name parent rate enabled */ + { "uartd", "pll_p", 216000000, true }, + { NULL, NULL, 0, 0}, +}; + + +static struct tegra_sdhci_platform_data sdhci_pdata1 = { + .cd_gpio = TEGRA_GPIO_SD1_CD, + .wp_gpio = TEGRA_GPIO_SD1_WP, + .power_gpio = TEGRA_GPIO_SD1_POWER, +}; + +static struct tegra_sdhci_platform_data sdhci_pdata2 = { + .cd_gpio = -1, + .wp_gpio = -1, + .power_gpio = -1, +}; + +static struct tegra_sdhci_platform_data sdhci_pdata4 = { + .cd_gpio = TEGRA_GPIO_SD4_CD, + .wp_gpio = TEGRA_GPIO_SD4_WP, + .power_gpio = TEGRA_GPIO_SD4_POWER, + .is_8bit = 1, +}; + +static void __init tegra_paz00_init(void) +{ + tegra_clk_init_from_table(paz00_clk_init_table); + + paz00_pinmux_init(); + + tegra_sdhci_device1.dev.platform_data = &sdhci_pdata1; + tegra_sdhci_device2.dev.platform_data = &sdhci_pdata2; + tegra_sdhci_device4.dev.platform_data = &sdhci_pdata4; + + platform_add_devices(paz00_devices, ARRAY_SIZE(paz00_devices)); +} + +MACHINE_START(PAZ00, "paz00") + .boot_params = 0x00000100, + .fixup = tegra_paz00_fixup, + .map_io = tegra_map_common_io, + .init_early = tegra_init_early, + .init_irq = tegra_init_irq, + .timer = &tegra_timer, + .init_machine = tegra_paz00_init, +MACHINE_END diff --git a/arch/arm/mach-tegra/board-paz00.h b/arch/arm/mach-tegra/board-paz00.h new file mode 100644 index 0000000..da193ca7 --- /dev/null +++ b/arch/arm/mach-tegra/board-paz00.h @@ -0,0 +1,29 @@ +/* + * arch/arm/mach-tegra/board-paz00.h + * + * Copyright (C) 2010 Marc Dietrich <marvin24@gmx.de> + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef _MACH_TEGRA_BOARD_PAZ00_H +#define _MACH_TEGRA_BOARD_PAZ00_H + +#define TEGRA_GPIO_SD1_CD TEGRA_GPIO_PV5 +#define TEGRA_GPIO_SD1_WP TEGRA_GPIO_PH1 +#define TEGRA_GPIO_SD1_POWER TEGRA_GPIO_PT3 +#define TEGRA_GPIO_SD4_CD TEGRA_GPIO_PH2 +#define TEGRA_GPIO_SD4_WP TEGRA_GPIO_PH3 +#define TEGRA_GPIO_SD4_POWER TEGRA_GPIO_PI6 + +void paz00_pinmux_init(void); + +#endif diff --git a/arch/arm/mach-tegra/board-seaboard-pinmux.c b/arch/arm/mach-tegra/board-seaboard-pinmux.c index 2d6ad83..0bda495 100644 --- a/arch/arm/mach-tegra/board-seaboard-pinmux.c +++ b/arch/arm/mach-tegra/board-seaboard-pinmux.c @@ -161,11 +161,12 @@ static __initdata struct tegra_pingroup_config seaboard_pinmux[] = { static struct tegra_gpio_table gpio_table[] = { - { .gpio = TEGRA_GPIO_PI5, .enable = true }, /* mmc2 cd */ - { .gpio = TEGRA_GPIO_PH1, .enable = true }, /* mmc2 wp */ - { .gpio = TEGRA_GPIO_PI6, .enable = true }, /* mmc2 pwr */ - { .gpio = TEGRA_GPIO_LIDSWITCH, .enable = true }, /* lid switch */ - { .gpio = TEGRA_GPIO_POWERKEY, .enable = true }, /* power key */ + { .gpio = TEGRA_GPIO_SD2_CD, .enable = true }, + { .gpio = TEGRA_GPIO_SD2_WP, .enable = true }, + { .gpio = TEGRA_GPIO_SD2_POWER, .enable = true }, + { .gpio = TEGRA_GPIO_LIDSWITCH, .enable = true }, + { .gpio = TEGRA_GPIO_POWERKEY, .enable = true }, + { .gpio = TEGRA_GPIO_ISL29018_IRQ, .enable = true }, }; void __init seaboard_pinmux_init(void) diff --git a/arch/arm/mach-tegra/board-seaboard.c b/arch/arm/mach-tegra/board-seaboard.c index 6ca9e61..a8d7ace 100644 --- a/arch/arm/mach-tegra/board-seaboard.c +++ b/arch/arm/mach-tegra/board-seaboard.c @@ -18,9 +18,12 @@ #include <linux/init.h> #include <linux/platform_device.h> #include <linux/serial_8250.h> +#include <linux/i2c.h> +#include <linux/i2c-tegra.h> #include <linux/delay.h> #include <linux/input.h> #include <linux/io.h> +#include <linux/gpio.h> #include <linux/gpio_keys.h> #include <mach/iomap.h> @@ -63,6 +66,22 @@ static __initdata struct tegra_clk_init_table seaboard_clk_init_table[] = { { NULL, NULL, 0, 0}, }; +static struct tegra_i2c_platform_data seaboard_i2c1_platform_data = { + .bus_clk_rate = 400000. +}; + +static struct tegra_i2c_platform_data seaboard_i2c2_platform_data = { + .bus_clk_rate = 400000, +}; + +static struct tegra_i2c_platform_data seaboard_i2c3_platform_data = { + .bus_clk_rate = 400000, +}; + +static struct tegra_i2c_platform_data seaboard_dvc_platform_data = { + .bus_clk_rate = 400000, +}; + static struct gpio_keys_button seaboard_gpio_keys_buttons[] = { { .code = SW_LID, @@ -103,9 +122,9 @@ static struct tegra_sdhci_platform_data sdhci_pdata1 = { }; static struct tegra_sdhci_platform_data sdhci_pdata3 = { - .cd_gpio = TEGRA_GPIO_PI5, - .wp_gpio = TEGRA_GPIO_PH1, - .power_gpio = TEGRA_GPIO_PI6, + .cd_gpio = TEGRA_GPIO_SD2_CD, + .wp_gpio = TEGRA_GPIO_SD2_WP, + .power_gpio = TEGRA_GPIO_SD2_POWER, }; static struct tegra_sdhci_platform_data sdhci_pdata4 = { @@ -124,7 +143,36 @@ static struct platform_device *seaboard_devices[] __initdata = { &seaboard_gpio_keys_device, }; -static void __init __tegra_seaboard_init(void) +static struct i2c_board_info __initdata isl29018_device = { + I2C_BOARD_INFO("isl29018", 0x44), + .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_ISL29018_IRQ), +}; + +static struct i2c_board_info __initdata adt7461_device = { + I2C_BOARD_INFO("adt7461", 0x4c), +}; + +static void __init seaboard_i2c_init(void) +{ + gpio_request(TEGRA_GPIO_ISL29018_IRQ, "isl29018"); + gpio_direction_input(TEGRA_GPIO_ISL29018_IRQ); + + i2c_register_board_info(0, &isl29018_device, 1); + + i2c_register_board_info(4, &adt7461_device, 1); + + tegra_i2c_device1.dev.platform_data = &seaboard_i2c1_platform_data; + tegra_i2c_device2.dev.platform_data = &seaboard_i2c2_platform_data; + tegra_i2c_device3.dev.platform_data = &seaboard_i2c3_platform_data; + tegra_i2c_device4.dev.platform_data = &seaboard_dvc_platform_data; + + platform_device_register(&tegra_i2c_device1); + platform_device_register(&tegra_i2c_device2); + platform_device_register(&tegra_i2c_device3); + platform_device_register(&tegra_i2c_device4); +} + +static void __init seaboard_common_init(void) { seaboard_pinmux_init(); @@ -144,7 +192,9 @@ static void __init tegra_seaboard_init(void) debug_uart_platform_data[0].mapbase = TEGRA_UARTD_BASE; debug_uart_platform_data[0].irq = INT_UARTD; - __tegra_seaboard_init(); + seaboard_common_init(); + + seaboard_i2c_init(); } static void __init tegra_kaen_init(void) @@ -154,7 +204,9 @@ static void __init tegra_kaen_init(void) debug_uart_platform_data[0].mapbase = TEGRA_UARTB_BASE; debug_uart_platform_data[0].irq = INT_UARTB; - __tegra_seaboard_init(); + seaboard_common_init(); + + seaboard_i2c_init(); } static void __init tegra_wario_init(void) @@ -164,7 +216,9 @@ static void __init tegra_wario_init(void) debug_uart_platform_data[0].mapbase = TEGRA_UARTB_BASE; debug_uart_platform_data[0].irq = INT_UARTB; - __tegra_seaboard_init(); + seaboard_common_init(); + + seaboard_i2c_init(); } diff --git a/arch/arm/mach-tegra/board-seaboard.h b/arch/arm/mach-tegra/board-seaboard.h index a098e35..d8415e1 100644 --- a/arch/arm/mach-tegra/board-seaboard.h +++ b/arch/arm/mach-tegra/board-seaboard.h @@ -17,6 +17,9 @@ #ifndef _MACH_TEGRA_BOARD_SEABOARD_H #define _MACH_TEGRA_BOARD_SEABOARD_H +#define TEGRA_GPIO_SD2_CD TEGRA_GPIO_PI5 +#define TEGRA_GPIO_SD2_WP TEGRA_GPIO_PH1 +#define TEGRA_GPIO_SD2_POWER TEGRA_GPIO_PI6 #define TEGRA_GPIO_LIDSWITCH TEGRA_GPIO_PC7 #define TEGRA_GPIO_USB1 TEGRA_GPIO_PD0 #define TEGRA_GPIO_POWERKEY TEGRA_GPIO_PV2 diff --git a/arch/arm/mach-tegra/board-trimslice-pinmux.c b/arch/arm/mach-tegra/board-trimslice-pinmux.c index 6d4fc9f..13534fa 100644 --- a/arch/arm/mach-tegra/board-trimslice-pinmux.c +++ b/arch/arm/mach-tegra/board-trimslice-pinmux.c @@ -16,8 +16,11 @@ #include <linux/kernel.h> #include <linux/init.h> + #include <mach/pinmux.h> +#include <mach/gpio.h> +#include "gpio-names.h" #include "board-trimslice.h" static __initdata struct tegra_pingroup_config trimslice_pinmux[] = { @@ -139,7 +142,13 @@ static __initdata struct tegra_pingroup_config trimslice_pinmux[] = { {TEGRA_PINGROUP_XM2D, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, }; +static struct tegra_gpio_table gpio_table[] = { + { .gpio = TRIMSLICE_GPIO_SD4_CD, .enable = true }, /* mmc4 cd */ + { .gpio = TRIMSLICE_GPIO_SD4_WP, .enable = true }, /* mmc4 wp */ +}; + void __init trimslice_pinmux_init(void) { tegra_pinmux_config_table(trimslice_pinmux, ARRAY_SIZE(trimslice_pinmux)); + tegra_gpio_config(gpio_table, ARRAY_SIZE(gpio_table)); } diff --git a/arch/arm/mach-tegra/board-trimslice.c b/arch/arm/mach-tegra/board-trimslice.c index 7be7d4a..cda4cfd 100644 --- a/arch/arm/mach-tegra/board-trimslice.c +++ b/arch/arm/mach-tegra/board-trimslice.c @@ -29,9 +29,12 @@ #include <asm/setup.h> #include <mach/iomap.h> +#include <mach/sdhci.h> #include "board.h" #include "clock.h" +#include "devices.h" +#include "gpio-names.h" #include "board-trimslice.h" @@ -56,9 +59,22 @@ static struct platform_device debug_uart = { .platform_data = debug_uart_platform_data, }, }; +static struct tegra_sdhci_platform_data sdhci_pdata1 = { + .cd_gpio = -1, + .wp_gpio = -1, + .power_gpio = -1, +}; + +static struct tegra_sdhci_platform_data sdhci_pdata4 = { + .cd_gpio = TRIMSLICE_GPIO_SD4_CD, + .wp_gpio = TRIMSLICE_GPIO_SD4_WP, + .power_gpio = -1, +}; static struct platform_device *trimslice_devices[] __initdata = { &debug_uart, + &tegra_sdhci_device1, + &tegra_sdhci_device4, }; static void __init tegra_trimslice_fixup(struct machine_desc *desc, @@ -92,6 +108,9 @@ static void __init tegra_trimslice_init(void) trimslice_pinmux_init(); + tegra_sdhci_device1.dev.platform_data = &sdhci_pdata1; + tegra_sdhci_device4.dev.platform_data = &sdhci_pdata4; + platform_add_devices(trimslice_devices, ARRAY_SIZE(trimslice_devices)); } diff --git a/arch/arm/mach-tegra/board-trimslice.h b/arch/arm/mach-tegra/board-trimslice.h index 16ec0f0..e8ef629 100644 --- a/arch/arm/mach-tegra/board-trimslice.h +++ b/arch/arm/mach-tegra/board-trimslice.h @@ -17,6 +17,9 @@ #ifndef _MACH_TEGRA_BOARD_TRIMSLICE_H #define _MACH_TEGRA_BOARD_TRIMSLICE_H +#define TRIMSLICE_GPIO_SD4_CD TEGRA_GPIO_PP1 /* mmc4 cd */ +#define TRIMSLICE_GPIO_SD4_WP TEGRA_GPIO_PP2 /* mmc4 wp */ + void trimslice_pinmux_init(void); #endif diff --git a/arch/arm/mach-tegra/devices.c b/arch/arm/mach-tegra/devices.c index 682e6d3..1528f9d 100644 --- a/arch/arm/mach-tegra/devices.c +++ b/arch/arm/mach-tegra/devices.c @@ -503,3 +503,73 @@ struct platform_device tegra_uarte_device = { .coherent_dma_mask = DMA_BIT_MASK(32), }, }; + +static struct resource i2s_resource1[] = { + [0] = { + .start = INT_I2S1, + .end = INT_I2S1, + .flags = IORESOURCE_IRQ + }, + [1] = { + .start = TEGRA_DMA_REQ_SEL_I2S_1, + .end = TEGRA_DMA_REQ_SEL_I2S_1, + .flags = IORESOURCE_DMA + }, + [2] = { + .start = TEGRA_I2S1_BASE, + .end = TEGRA_I2S1_BASE + TEGRA_I2S1_SIZE - 1, + .flags = IORESOURCE_MEM + } +}; + +static struct resource i2s_resource2[] = { + [0] = { + .start = INT_I2S2, + .end = INT_I2S2, + .flags = IORESOURCE_IRQ + }, + [1] = { + .start = TEGRA_DMA_REQ_SEL_I2S2_1, + .end = TEGRA_DMA_REQ_SEL_I2S2_1, + .flags = IORESOURCE_DMA + }, + [2] = { + .start = TEGRA_I2S2_BASE, + .end = TEGRA_I2S2_BASE + TEGRA_I2S2_SIZE - 1, + .flags = IORESOURCE_MEM + } +}; + +struct platform_device tegra_i2s_device1 = { + .name = "tegra-i2s", + .id = 0, + .resource = i2s_resource1, + .num_resources = ARRAY_SIZE(i2s_resource1), +}; + +struct platform_device tegra_i2s_device2 = { + .name = "tegra-i2s", + .id = 1, + .resource = i2s_resource2, + .num_resources = ARRAY_SIZE(i2s_resource2), +}; + +static struct resource tegra_das_resources[] = { + [0] = { + .start = TEGRA_APB_MISC_DAS_BASE, + .end = TEGRA_APB_MISC_DAS_BASE + TEGRA_APB_MISC_DAS_SIZE - 1, + .flags = IORESOURCE_MEM, + }, +}; + +struct platform_device tegra_das_device = { + .name = "tegra-das", + .id = -1, + .num_resources = ARRAY_SIZE(tegra_das_resources), + .resource = tegra_das_resources, +}; + +struct platform_device tegra_pcm_device = { + .name = "tegra-pcm-audio", + .id = -1, +}; diff --git a/arch/arm/mach-tegra/devices.h b/arch/arm/mach-tegra/devices.h index 888810c..4a7dc0a 100644 --- a/arch/arm/mach-tegra/devices.h +++ b/arch/arm/mach-tegra/devices.h @@ -42,5 +42,9 @@ extern struct platform_device tegra_uartc_device; extern struct platform_device tegra_uartd_device; extern struct platform_device tegra_uarte_device; extern struct platform_device tegra_pmu_device; +extern struct platform_device tegra_i2s_device1; +extern struct platform_device tegra_i2s_device2; +extern struct platform_device tegra_das_device; +extern struct platform_device tegra_pcm_device; #endif diff --git a/arch/arm/mach-tegra/include/mach/iomap.h b/arch/arm/mach-tegra/include/mach/iomap.h index 691cdab..19dec3a 100644 --- a/arch/arm/mach-tegra/include/mach/iomap.h +++ b/arch/arm/mach-tegra/include/mach/iomap.h @@ -122,6 +122,9 @@ #define TEGRA_APB_MISC_BASE 0x70000000 #define TEGRA_APB_MISC_SIZE SZ_4K +#define TEGRA_APB_MISC_DAS_BASE 0x70000c00 +#define TEGRA_APB_MISC_DAS_SIZE SZ_128 + #define TEGRA_AC97_BASE 0x70002000 #define TEGRA_AC97_SIZE SZ_512 diff --git a/arch/arm/mach-tegra/localtimer.c b/arch/arm/mach-tegra/localtimer.c index f81ca7c..e91d681 100644 --- a/arch/arm/mach-tegra/localtimer.c +++ b/arch/arm/mach-tegra/localtimer.c @@ -18,8 +18,9 @@ /* * Setup the local clock events for a CPU. */ -void __cpuinit local_timer_setup(struct clock_event_device *evt) +int __cpuinit local_timer_setup(struct clock_event_device *evt) { evt->irq = IRQ_LOCALTIMER; twd_timer_setup(evt); + return 0; } diff --git a/arch/arm/mach-ux500/localtimer.c b/arch/arm/mach-ux500/localtimer.c index 2288f6a..5ba1133 100644 --- a/arch/arm/mach-ux500/localtimer.c +++ b/arch/arm/mach-ux500/localtimer.c @@ -21,8 +21,9 @@ /* * Setup the local clock events for a CPU. */ -void __cpuinit local_timer_setup(struct clock_event_device *evt) +int __cpuinit local_timer_setup(struct clock_event_device *evt) { evt->irq = IRQ_LOCALTIMER; twd_timer_setup(evt); + return 0; } diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c index 136c32e..eb7ffa0 100644 --- a/arch/arm/mach-versatile/core.c +++ b/arch/arm/mach-versatile/core.c @@ -50,6 +50,8 @@ #include <mach/platform.h> #include <asm/hardware/timer-sp.h> +#include <plat/clcd.h> +#include <plat/fpga-irq.h> #include <plat/sched_clock.h> #include "core.h" @@ -63,47 +65,12 @@ #define VA_VIC_BASE __io_address(VERSATILE_VIC_BASE) #define VA_SIC_BASE __io_address(VERSATILE_SIC_BASE) -static void sic_mask_irq(struct irq_data *d) -{ - unsigned int irq = d->irq - IRQ_SIC_START; - - writel(1 << irq, VA_SIC_BASE + SIC_IRQ_ENABLE_CLEAR); -} - -static void sic_unmask_irq(struct irq_data *d) -{ - unsigned int irq = d->irq - IRQ_SIC_START; - - writel(1 << irq, VA_SIC_BASE + SIC_IRQ_ENABLE_SET); -} - -static struct irq_chip sic_chip = { - .name = "SIC", - .irq_ack = sic_mask_irq, - .irq_mask = sic_mask_irq, - .irq_unmask = sic_unmask_irq, +static struct fpga_irq_data sic_irq = { + .base = VA_SIC_BASE, + .irq_start = IRQ_SIC_START, + .chip.name = "SIC", }; -static void -sic_handle_irq(unsigned int irq, struct irq_desc *desc) -{ - unsigned long status = readl(VA_SIC_BASE + SIC_IRQ_STATUS); - - if (status == 0) { - do_bad_IRQ(irq, desc); - return; - } - - do { - irq = ffs(status) - 1; - status &= ~(1 << irq); - - irq += IRQ_SIC_START; - - generic_handle_irq(irq); - } while (status); -} - #if 1 #define IRQ_MMCI0A IRQ_VICSOURCE22 #define IRQ_AACI IRQ_VICSOURCE24 @@ -118,22 +85,11 @@ sic_handle_irq(unsigned int irq, struct irq_desc *desc) void __init versatile_init_irq(void) { - unsigned int i; - vic_init(VA_VIC_BASE, IRQ_VIC_START, ~0, 0); - set_irq_chained_handler(IRQ_VICSOURCE31, sic_handle_irq); - - /* Do second interrupt controller */ writel(~0, VA_SIC_BASE + SIC_IRQ_ENABLE_CLEAR); - for (i = IRQ_SIC_START; i <= IRQ_SIC_END; i++) { - if ((PIC_MASK & (1 << (i - IRQ_SIC_START))) == 0) { - set_irq_chip(i, &sic_chip); - set_irq_handler(i, handle_level_irq); - set_irq_flags(i, IRQF_VALID | IRQF_PROBE); - } - } + fpga_irq_init(IRQ_VICSOURCE31, ~PIC_MASK, &sic_irq); /* * Interrupts on secondary controller from 0 to 8 are routed to @@ -476,127 +432,7 @@ static struct clk_lookup lookups[] = { #define SYS_CLCD_ID_SANYO_2_5 (0x07 << 8) #define SYS_CLCD_ID_VGA (0x1f << 8) -static struct clcd_panel vga = { - .mode = { - .name = "VGA", - .refresh = 60, - .xres = 640, - .yres = 480, - .pixclock = 39721, - .left_margin = 40, - .right_margin = 24, - .upper_margin = 32, - .lower_margin = 11, - .hsync_len = 96, - .vsync_len = 2, - .sync = 0, - .vmode = FB_VMODE_NONINTERLACED, - }, - .width = -1, - .height = -1, - .tim2 = TIM2_BCD | TIM2_IPC, - .cntl = CNTL_LCDTFT | CNTL_LCDVCOMP(1), - .bpp = 16, -}; - -static struct clcd_panel sanyo_3_8_in = { - .mode = { - .name = "Sanyo QVGA", - .refresh = 116, - .xres = 320, - .yres = 240, - .pixclock = 100000, - .left_margin = 6, - .right_margin = 6, - .upper_margin = 5, - .lower_margin = 5, - .hsync_len = 6, - .vsync_len = 6, - .sync = 0, - .vmode = FB_VMODE_NONINTERLACED, - }, - .width = -1, - .height = -1, - .tim2 = TIM2_BCD, - .cntl = CNTL_LCDTFT | CNTL_LCDVCOMP(1), - .bpp = 16, -}; - -static struct clcd_panel sanyo_2_5_in = { - .mode = { - .name = "Sanyo QVGA Portrait", - .refresh = 116, - .xres = 240, - .yres = 320, - .pixclock = 100000, - .left_margin = 20, - .right_margin = 10, - .upper_margin = 2, - .lower_margin = 2, - .hsync_len = 10, - .vsync_len = 2, - .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, - .vmode = FB_VMODE_NONINTERLACED, - }, - .width = -1, - .height = -1, - .tim2 = TIM2_IVS | TIM2_IHS | TIM2_IPC, - .cntl = CNTL_LCDTFT | CNTL_LCDVCOMP(1), - .bpp = 16, -}; - -static struct clcd_panel epson_2_2_in = { - .mode = { - .name = "Epson QCIF", - .refresh = 390, - .xres = 176, - .yres = 220, - .pixclock = 62500, - .left_margin = 3, - .right_margin = 2, - .upper_margin = 1, - .lower_margin = 0, - .hsync_len = 3, - .vsync_len = 2, - .sync = 0, - .vmode = FB_VMODE_NONINTERLACED, - }, - .width = -1, - .height = -1, - .tim2 = TIM2_BCD | TIM2_IPC, - .cntl = CNTL_LCDTFT | CNTL_LCDVCOMP(1), - .bpp = 16, -}; - -/* - * Detect which LCD panel is connected, and return the appropriate - * clcd_panel structure. Note: we do not have any information on - * the required timings for the 8.4in panel, so we presently assume - * VGA timings. - */ -static struct clcd_panel *versatile_clcd_panel(void) -{ - void __iomem *sys_clcd = __io_address(VERSATILE_SYS_BASE) + VERSATILE_SYS_CLCD_OFFSET; - struct clcd_panel *panel = &vga; - u32 val; - - val = readl(sys_clcd) & SYS_CLCD_ID_MASK; - if (val == SYS_CLCD_ID_SANYO_3_8) - panel = &sanyo_3_8_in; - else if (val == SYS_CLCD_ID_SANYO_2_5) - panel = &sanyo_2_5_in; - else if (val == SYS_CLCD_ID_EPSON_2_2) - panel = &epson_2_2_in; - else if (val == SYS_CLCD_ID_VGA) - panel = &vga; - else { - printk(KERN_ERR "CLCD: unknown LCD panel ID 0x%08x, using VGA\n", - val); - panel = &vga; - } - - return panel; -} +static bool is_sanyo_2_5_lcd; /* * Disable all display connectors on the interface module. @@ -614,7 +450,7 @@ static void versatile_clcd_disable(struct clcd_fb *fb) /* * If the LCD is Sanyo 2x5 in on the IB2 board, turn the back-light off */ - if (machine_is_versatile_ab() && fb->panel == &sanyo_2_5_in) { + if (machine_is_versatile_ab() && is_sanyo_2_5_lcd) { void __iomem *versatile_ib2_ctrl = __io_address(VERSATILE_IB2_CTRL); unsigned long ctrl; @@ -630,18 +466,22 @@ static void versatile_clcd_disable(struct clcd_fb *fb) */ static void versatile_clcd_enable(struct clcd_fb *fb) { + struct fb_var_screeninfo *var = &fb->fb.var; void __iomem *sys_clcd = __io_address(VERSATILE_SYS_BASE) + VERSATILE_SYS_CLCD_OFFSET; u32 val; val = readl(sys_clcd); val &= ~SYS_CLCD_MODE_MASK; - switch (fb->fb.var.green.length) { + switch (var->green.length) { case 5: val |= SYS_CLCD_MODE_5551; break; case 6: - val |= SYS_CLCD_MODE_565_RLSB; + if (var->red.offset == 0) + val |= SYS_CLCD_MODE_565_RLSB; + else + val |= SYS_CLCD_MODE_565_BLSB; break; case 8: val |= SYS_CLCD_MODE_888; @@ -663,7 +503,7 @@ static void versatile_clcd_enable(struct clcd_fb *fb) /* * If the LCD is Sanyo 2x5 in on the IB2 board, turn the back-light on */ - if (machine_is_versatile_ab() && fb->panel == &sanyo_2_5_in) { + if (machine_is_versatile_ab() && is_sanyo_2_5_lcd) { void __iomem *versatile_ib2_ctrl = __io_address(VERSATILE_IB2_CTRL); unsigned long ctrl; @@ -674,50 +514,62 @@ static void versatile_clcd_enable(struct clcd_fb *fb) #endif } -static unsigned long framesize = SZ_1M; - +/* + * Detect which LCD panel is connected, and return the appropriate + * clcd_panel structure. Note: we do not have any information on + * the required timings for the 8.4in panel, so we presently assume + * VGA timings. + */ static int versatile_clcd_setup(struct clcd_fb *fb) { - dma_addr_t dma; + void __iomem *sys_clcd = __io_address(VERSATILE_SYS_BASE) + VERSATILE_SYS_CLCD_OFFSET; + const char *panel_name; + u32 val; - fb->panel = versatile_clcd_panel(); + is_sanyo_2_5_lcd = false; - fb->fb.screen_base = dma_alloc_writecombine(&fb->dev->dev, framesize, - &dma, GFP_KERNEL); - if (!fb->fb.screen_base) { - printk(KERN_ERR "CLCD: unable to map framebuffer\n"); - return -ENOMEM; + val = readl(sys_clcd) & SYS_CLCD_ID_MASK; + if (val == SYS_CLCD_ID_SANYO_3_8) + panel_name = "Sanyo TM38QV67A02A"; + else if (val == SYS_CLCD_ID_SANYO_2_5) { + panel_name = "Sanyo QVGA Portrait"; + is_sanyo_2_5_lcd = true; + } else if (val == SYS_CLCD_ID_EPSON_2_2) + panel_name = "Epson L2F50113T00"; + else if (val == SYS_CLCD_ID_VGA) + panel_name = "VGA"; + else { + printk(KERN_ERR "CLCD: unknown LCD panel ID 0x%08x, using VGA\n", + val); + panel_name = "VGA"; } - fb->fb.fix.smem_start = dma; - fb->fb.fix.smem_len = framesize; + fb->panel = versatile_clcd_get_panel(panel_name); + if (!fb->panel) + return -EINVAL; - return 0; + return versatile_clcd_setup_dma(fb, SZ_1M); } -static int versatile_clcd_mmap(struct clcd_fb *fb, struct vm_area_struct *vma) +static void versatile_clcd_decode(struct clcd_fb *fb, struct clcd_regs *regs) { - return dma_mmap_writecombine(&fb->dev->dev, vma, - fb->fb.screen_base, - fb->fb.fix.smem_start, - fb->fb.fix.smem_len); -} + clcdfb_decode(fb, regs); -static void versatile_clcd_remove(struct clcd_fb *fb) -{ - dma_free_writecombine(&fb->dev->dev, fb->fb.fix.smem_len, - fb->fb.screen_base, fb->fb.fix.smem_start); + /* Always clear BGR for RGB565: we do the routing externally */ + if (fb->fb.var.green.length == 6) + regs->cntl &= ~CNTL_BGR; } static struct clcd_board clcd_plat_data = { .name = "Versatile", + .caps = CLCD_CAP_5551 | CLCD_CAP_565 | CLCD_CAP_888, .check = clcdfb_check, - .decode = clcdfb_decode, + .decode = versatile_clcd_decode, .disable = versatile_clcd_disable, .enable = versatile_clcd_enable, .setup = versatile_clcd_setup, - .mmap = versatile_clcd_mmap, - .remove = versatile_clcd_remove, + .mmap = versatile_clcd_mmap_dma, + .remove = versatile_clcd_remove_dma, }; static struct pl061_platform_data gpio0_plat_data = { @@ -737,53 +589,35 @@ static struct pl022_ssp_controller ssp0_plat_data = { }; #define AACI_IRQ { IRQ_AACI, NO_IRQ } -#define AACI_DMA { 0x80, 0x81 } #define MMCI0_IRQ { IRQ_MMCI0A,IRQ_SIC_MMCI0B } -#define MMCI0_DMA { 0x84, 0 } #define KMI0_IRQ { IRQ_SIC_KMI0, NO_IRQ } -#define KMI0_DMA { 0, 0 } #define KMI1_IRQ { IRQ_SIC_KMI1, NO_IRQ } -#define KMI1_DMA { 0, 0 } /* * These devices are connected directly to the multi-layer AHB switch */ #define SMC_IRQ { NO_IRQ, NO_IRQ } -#define SMC_DMA { 0, 0 } #define MPMC_IRQ { NO_IRQ, NO_IRQ } -#define MPMC_DMA { 0, 0 } #define CLCD_IRQ { IRQ_CLCDINT, NO_IRQ } -#define CLCD_DMA { 0, 0 } #define DMAC_IRQ { IRQ_DMAINT, NO_IRQ } -#define DMAC_DMA { 0, 0 } /* * These devices are connected via the core APB bridge */ #define SCTL_IRQ { NO_IRQ, NO_IRQ } -#define SCTL_DMA { 0, 0 } #define WATCHDOG_IRQ { IRQ_WDOGINT, NO_IRQ } -#define WATCHDOG_DMA { 0, 0 } #define GPIO0_IRQ { IRQ_GPIOINT0, NO_IRQ } -#define GPIO0_DMA { 0, 0 } #define GPIO1_IRQ { IRQ_GPIOINT1, NO_IRQ } -#define GPIO1_DMA { 0, 0 } #define RTC_IRQ { IRQ_RTCINT, NO_IRQ } -#define RTC_DMA { 0, 0 } /* * These devices are connected via the DMA APB bridge */ #define SCI_IRQ { IRQ_SCIINT, NO_IRQ } -#define SCI_DMA { 7, 6 } #define UART0_IRQ { IRQ_UARTINT0, NO_IRQ } -#define UART0_DMA { 15, 14 } #define UART1_IRQ { IRQ_UARTINT1, NO_IRQ } -#define UART1_DMA { 13, 12 } #define UART2_IRQ { IRQ_UARTINT2, NO_IRQ } -#define UART2_DMA { 11, 10 } #define SSP_IRQ { IRQ_SSPINT, NO_IRQ } -#define SSP_DMA { 9, 8 } /* FPGA Primecells */ AMBA_DEVICE(aaci, "fpga:04", AACI, NULL); @@ -865,14 +699,21 @@ static void versatile_leds_event(led_event_t ledevt) } #endif /* CONFIG_LEDS */ -void __init versatile_init(void) +/* Early initializations */ +void __init versatile_init_early(void) { - int i; - - osc4_clk.vcoreg = __io_address(VERSATILE_SYS_BASE) + VERSATILE_SYS_OSCCLCD_OFFSET; + void __iomem *sys = __io_address(VERSATILE_SYS_BASE); + osc4_clk.vcoreg = sys + VERSATILE_SYS_OSCCLCD_OFFSET; clkdev_add_table(lookups, ARRAY_SIZE(lookups)); + versatile_sched_clock_init(sys + VERSATILE_SYS_24MHz_OFFSET, 24000000); +} + +void __init versatile_init(void) +{ + int i; + platform_device_register(&versatile_flash_device); platform_device_register(&versatile_i2c_device); platform_device_register(&smc91x_device); @@ -889,12 +730,6 @@ void __init versatile_init(void) } /* - * The sched_clock counter - */ -#define REFCOUNTER (__io_address(VERSATILE_SYS_BASE) + \ - VERSATILE_SYS_24MHz_OFFSET) - -/* * Where is the timer (VA)? */ #define TIMER0_VA_BASE __io_address(VERSATILE_TIMER0_1_BASE) @@ -909,8 +744,6 @@ static void __init versatile_timer_init(void) { u32 val; - versatile_sched_clock_init(REFCOUNTER, 24000000); - /* * set clock frequency: * VERSATILE_REFCLK is 32KHz diff --git a/arch/arm/mach-versatile/core.h b/arch/arm/mach-versatile/core.h index 9d39886..fd6404e 100644 --- a/arch/arm/mach-versatile/core.h +++ b/arch/arm/mach-versatile/core.h @@ -25,6 +25,7 @@ #include <linux/amba/bus.h> extern void __init versatile_init(void); +extern void __init versatile_init_early(void); extern void __init versatile_init_irq(void); extern void __init versatile_map_io(void); extern struct sys_timer versatile_timer; @@ -44,7 +45,6 @@ static struct amba_device name##_device = { \ }, \ .dma_mask = ~0, \ .irq = base##_IRQ, \ - /* .dma = base##_DMA,*/ \ } #endif diff --git a/arch/arm/mach-versatile/include/mach/hardware.h b/arch/arm/mach-versatile/include/mach/hardware.h index b5e75bb..6911e1f 100644 --- a/arch/arm/mach-versatile/include/mach/hardware.h +++ b/arch/arm/mach-versatile/include/mach/hardware.h @@ -39,6 +39,6 @@ /* macro to get at IO space when running virtually */ #define IO_ADDRESS(x) (((x) & 0x0fffffff) + (((x) >> 4) & 0x0f000000) + 0xf0000000) -#define __io_address(n) __io(IO_ADDRESS(n)) +#define __io_address(n) ((void __iomem __force *)IO_ADDRESS(n)) #endif diff --git a/arch/arm/mach-versatile/versatile_ab.c b/arch/arm/mach-versatile/versatile_ab.c index aa9730f..f8ae64b 100644 --- a/arch/arm/mach-versatile/versatile_ab.c +++ b/arch/arm/mach-versatile/versatile_ab.c @@ -37,6 +37,7 @@ MACHINE_START(VERSATILE_AB, "ARM-Versatile AB") /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */ .boot_params = 0x00000100, .map_io = versatile_map_io, + .init_early = versatile_init_early, .init_irq = versatile_init_irq, .timer = &versatile_timer, .init_machine = versatile_init, diff --git a/arch/arm/mach-versatile/versatile_pb.c b/arch/arm/mach-versatile/versatile_pb.c index bf46964..37c23df 100644 --- a/arch/arm/mach-versatile/versatile_pb.c +++ b/arch/arm/mach-versatile/versatile_pb.c @@ -59,19 +59,14 @@ static struct pl061_platform_data gpio3_plat_data = { }; #define UART3_IRQ { IRQ_SIC_UART3, NO_IRQ } -#define UART3_DMA { 0x86, 0x87 } #define SCI1_IRQ { IRQ_SIC_SCI3, NO_IRQ } -#define SCI1_DMA { 0x88, 0x89 } #define MMCI1_IRQ { IRQ_MMCI1A, IRQ_SIC_MMCI1B } -#define MMCI1_DMA { 0x85, 0 } /* * These devices are connected via the core APB bridge */ #define GPIO2_IRQ { IRQ_GPIOINT2, NO_IRQ } -#define GPIO2_DMA { 0, 0 } #define GPIO3_IRQ { IRQ_GPIOINT3, NO_IRQ } -#define GPIO3_DMA { 0, 0 } /* * These devices are connected via the DMA APB bridge @@ -110,6 +105,7 @@ MACHINE_START(VERSATILE_PB, "ARM-Versatile PB") /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */ .boot_params = 0x00000100, .map_io = versatile_map_io, + .init_early = versatile_init_early, .init_irq = versatile_init_irq, .timer = &versatile_timer, .init_machine = versatile_pb_init, diff --git a/arch/arm/mach-vexpress/Kconfig b/arch/arm/mach-vexpress/Kconfig index 3f19b66..9311484 100644 --- a/arch/arm/mach-vexpress/Kconfig +++ b/arch/arm/mach-vexpress/Kconfig @@ -5,5 +5,8 @@ config ARCH_VEXPRESS_CA9X4 bool "Versatile Express Cortex-A9x4 tile" select CPU_V7 select ARM_GIC + select ARM_ERRATA_720789 + select ARM_ERRATA_751472 + select ARM_ERRATA_753970 endmenu diff --git a/arch/arm/mach-vexpress/Makefile b/arch/arm/mach-vexpress/Makefile index 2c0ac7d..90551b9 100644 --- a/arch/arm/mach-vexpress/Makefile +++ b/arch/arm/mach-vexpress/Makefile @@ -4,6 +4,5 @@ obj-y := v2m.o obj-$(CONFIG_ARCH_VEXPRESS_CA9X4) += ct-ca9x4.o -obj-$(CONFIG_SMP) += platsmp.o headsmp.o +obj-$(CONFIG_SMP) += platsmp.o obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o -obj-$(CONFIG_LOCAL_TIMERS) += localtimer.o diff --git a/arch/arm/mach-vexpress/core.h b/arch/arm/mach-vexpress/core.h index 362780d..f439715 100644 --- a/arch/arm/mach-vexpress/core.h +++ b/arch/arm/mach-vexpress/core.h @@ -17,8 +17,3 @@ struct amba_device name##_device = { \ .irq = IRQ_##base, \ /* .dma = DMA_##base,*/ \ } - -struct map_desc; - -void v2m_map_io(struct map_desc *tile, size_t num); -extern struct sys_timer v2m_timer; diff --git a/arch/arm/mach-vexpress/ct-ca9x4.c b/arch/arm/mach-vexpress/ct-ca9x4.c index e9bccc5..ebc22e7 100644 --- a/arch/arm/mach-vexpress/ct-ca9x4.c +++ b/arch/arm/mach-vexpress/ct-ca9x4.c @@ -10,19 +10,17 @@ #include <linux/amba/clcd.h> #include <linux/clkdev.h> -#include <asm/pgtable.h> #include <asm/hardware/arm_timer.h> #include <asm/hardware/cache-l2x0.h> #include <asm/hardware/gic.h> -#include <asm/mach-types.h> #include <asm/pmu.h> +#include <asm/smp_scu.h> #include <asm/smp_twd.h> #include <mach/ct-ca9x4.h> #include <asm/hardware/timer-sp.h> -#include <asm/mach/arch.h> #include <asm/mach/map.h> #include <asm/mach/time.h> @@ -30,6 +28,8 @@ #include <mach/motherboard.h> +#include <plat/clcd.h> + #define V2M_PA_CS7 0x10000000 static struct map_desc ct_ca9x4_io_desc[] __initdata = { @@ -56,7 +56,7 @@ static void __init ct_ca9x4_map_io(void) #ifdef CONFIG_LOCAL_TIMERS twd_base = MMIO_P2V(A9_MPCORE_TWD); #endif - v2m_map_io(ct_ca9x4_io_desc, ARRAY_SIZE(ct_ca9x4_io_desc)); + iotable_init(ct_ca9x4_io_desc, ARRAY_SIZE(ct_ca9x4_io_desc)); } static void __init ct_ca9x4_init_irq(void) @@ -80,29 +80,6 @@ static struct sys_timer ct_ca9x4_timer = { }; #endif -static struct clcd_panel xvga_panel = { - .mode = { - .name = "XVGA", - .refresh = 60, - .xres = 1024, - .yres = 768, - .pixclock = 15384, - .left_margin = 168, - .right_margin = 8, - .upper_margin = 29, - .lower_margin = 3, - .hsync_len = 144, - .vsync_len = 6, - .sync = 0, - .vmode = FB_VMODE_NONINTERLACED, - }, - .width = -1, - .height = -1, - .tim2 = TIM2_BCD | TIM2_IPC, - .cntl = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1), - .bpp = 16, -}; - static void ct_ca9x4_clcd_enable(struct clcd_fb *fb) { v2m_cfg_write(SYS_CFG_MUXFPGA | SYS_CFG_SITE_DB1, 0); @@ -112,42 +89,23 @@ static void ct_ca9x4_clcd_enable(struct clcd_fb *fb) static int ct_ca9x4_clcd_setup(struct clcd_fb *fb) { unsigned long framesize = 1024 * 768 * 2; - dma_addr_t dma; - fb->panel = &xvga_panel; + fb->panel = versatile_clcd_get_panel("XVGA"); + if (!fb->panel) + return -EINVAL; - fb->fb.screen_base = dma_alloc_writecombine(&fb->dev->dev, framesize, - &dma, GFP_KERNEL); - if (!fb->fb.screen_base) { - printk(KERN_ERR "CLCD: unable to map frame buffer\n"); - return -ENOMEM; - } - fb->fb.fix.smem_start = dma; - fb->fb.fix.smem_len = framesize; - - return 0; -} - -static int ct_ca9x4_clcd_mmap(struct clcd_fb *fb, struct vm_area_struct *vma) -{ - return dma_mmap_writecombine(&fb->dev->dev, vma, fb->fb.screen_base, - fb->fb.fix.smem_start, fb->fb.fix.smem_len); -} - -static void ct_ca9x4_clcd_remove(struct clcd_fb *fb) -{ - dma_free_writecombine(&fb->dev->dev, fb->fb.fix.smem_len, - fb->fb.screen_base, fb->fb.fix.smem_start); + return versatile_clcd_setup_dma(fb, framesize); } static struct clcd_board ct_ca9x4_clcd_data = { .name = "CT-CA9X4", + .caps = CLCD_CAP_5551 | CLCD_CAP_565, .check = clcdfb_check, .decode = clcdfb_decode, .enable = ct_ca9x4_clcd_enable, .setup = ct_ca9x4_clcd_setup, - .mmap = ct_ca9x4_clcd_mmap, - .remove = ct_ca9x4_clcd_remove, + .mmap = versatile_clcd_mmap_dma, + .remove = versatile_clcd_remove_dma, }; static AMBA_DEVICE(clcd, "ct:clcd", CT_CA9X4_CLCDC, &ct_ca9x4_clcd_data); @@ -220,6 +178,11 @@ static struct platform_device pmu_device = { .resource = pmu_resources, }; +static void __init ct_ca9x4_init_early(void) +{ + clkdev_add_table(lookups, ARRAY_SIZE(lookups)); +} + static void __init ct_ca9x4_init(void) { int i; @@ -234,22 +197,40 @@ static void __init ct_ca9x4_init(void) l2x0_init(l2x0_base, 0x00400000, 0xfe0fffff); #endif - clkdev_add_table(lookups, ARRAY_SIZE(lookups)); - for (i = 0; i < ARRAY_SIZE(ct_ca9x4_amba_devs); i++) amba_device_register(ct_ca9x4_amba_devs[i], &iomem_resource); platform_device_register(&pmu_device); } -MACHINE_START(VEXPRESS, "ARM-Versatile Express CA9x4") - .boot_params = PLAT_PHYS_OFFSET + 0x00000100, +#ifdef CONFIG_SMP +static void ct_ca9x4_init_cpu_map(void) +{ + int i, ncores = scu_get_core_count(MMIO_P2V(A9_MPCORE_SCU)); + + for (i = 0; i < ncores; ++i) + set_cpu_possible(i, true); +} + +static void ct_ca9x4_smp_enable(unsigned int max_cpus) +{ + int i; + for (i = 0; i < max_cpus; i++) + set_cpu_present(i, true); + + scu_enable(MMIO_P2V(A9_MPCORE_SCU)); +} +#endif + +struct ct_desc ct_ca9x4_desc __initdata = { + .id = V2M_CT_ID_CA9, + .name = "CA9x4", .map_io = ct_ca9x4_map_io, + .init_early = ct_ca9x4_init_early, .init_irq = ct_ca9x4_init_irq, -#if 0 - .timer = &ct_ca9x4_timer, -#else - .timer = &v2m_timer, + .init_tile = ct_ca9x4_init, +#ifdef CONFIG_SMP + .init_cpu_map = ct_ca9x4_init_cpu_map, + .smp_enable = ct_ca9x4_smp_enable, #endif - .init_machine = ct_ca9x4_init, -MACHINE_END +}; diff --git a/arch/arm/mach-vexpress/include/mach/ct-ca9x4.h b/arch/arm/mach-vexpress/include/mach/ct-ca9x4.h index f9e2f8d..a34d3d4 100644 --- a/arch/arm/mach-vexpress/include/mach/ct-ca9x4.h +++ b/arch/arm/mach-vexpress/include/mach/ct-ca9x4.h @@ -45,4 +45,6 @@ #define IRQ_CT_CA9X4_PMU_CPU2 94 #define IRQ_CT_CA9X4_PMU_CPU3 95 +extern struct ct_desc ct_ca9x4_desc; + #endif diff --git a/arch/arm/mach-vexpress/include/mach/motherboard.h b/arch/arm/mach-vexpress/include/mach/motherboard.h index 98a8ded..0a3a375 100644 --- a/arch/arm/mach-vexpress/include/mach/motherboard.h +++ b/arch/arm/mach-vexpress/include/mach/motherboard.h @@ -118,4 +118,26 @@ int v2m_cfg_write(u32 devfn, u32 data); int v2m_cfg_read(u32 devfn, u32 *data); +/* + * Core tile IDs + */ +#define V2M_CT_ID_CA9 0x0c000191 +#define V2M_CT_ID_UNSUPPORTED 0xff000191 +#define V2M_CT_ID_MASK 0xff000fff + +struct ct_desc { + u32 id; + const char *name; + void (*map_io)(void); + void (*init_early)(void); + void (*init_irq)(void); + void (*init_tile)(void); +#ifdef CONFIG_SMP + void (*init_cpu_map)(void); + void (*smp_enable)(unsigned int); +#endif +}; + +extern struct ct_desc *ct_desc; + #endif diff --git a/arch/arm/mach-vexpress/platsmp.c b/arch/arm/mach-vexpress/platsmp.c index 634bf1d..2b5f7ac 100644 --- a/arch/arm/mach-vexpress/platsmp.c +++ b/arch/arm/mach-vexpress/platsmp.c @@ -10,114 +10,17 @@ */ #include <linux/init.h> #include <linux/errno.h> -#include <linux/delay.h> -#include <linux/device.h> -#include <linux/jiffies.h> #include <linux/smp.h> #include <linux/io.h> -#include <asm/cacheflush.h> -#include <asm/smp_scu.h> #include <asm/unified.h> -#include <mach/ct-ca9x4.h> #include <mach/motherboard.h> #define V2M_PA_CS7 0x10000000 #include "core.h" -extern void vexpress_secondary_startup(void); - -/* - * control for which core is the next to come out of the secondary - * boot "holding pen" - */ -volatile int __cpuinitdata pen_release = -1; - -/* - * Write pen_release in a way that is guaranteed to be visible to all - * observers, irrespective of whether they're taking part in coherency - * or not. This is necessary for the hotplug code to work reliably. - */ -static void __cpuinit write_pen_release(int val) -{ - pen_release = val; - smp_wmb(); - __cpuc_flush_dcache_area((void *)&pen_release, sizeof(pen_release)); - outer_clean_range(__pa(&pen_release), __pa(&pen_release + 1)); -} - -static void __iomem *scu_base_addr(void) -{ - return MMIO_P2V(A9_MPCORE_SCU); -} - -static DEFINE_SPINLOCK(boot_lock); - -void __cpuinit platform_secondary_init(unsigned int cpu) -{ - /* - * if any interrupts are already enabled for the primary - * core (e.g. timer irq), then they will not have been enabled - * for us: do so - */ - gic_secondary_init(0); - - /* - * let the primary processor know we're out of the - * pen, then head off into the C entry point - */ - write_pen_release(-1); - - /* - * Synchronise with the boot thread. - */ - spin_lock(&boot_lock); - spin_unlock(&boot_lock); -} - -int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle) -{ - unsigned long timeout; - - /* - * Set synchronisation state between this boot processor - * and the secondary one - */ - spin_lock(&boot_lock); - - /* - * This is really belt and braces; we hold unintended secondary - * CPUs in the holding pen until we're ready for them. However, - * since we haven't sent them a soft interrupt, they shouldn't - * be there. - */ - write_pen_release(cpu); - - /* - * Send the secondary CPU a soft interrupt, thereby causing - * the boot monitor to read the system wide flags register, - * and branch to the address found there. - */ - smp_cross_call(cpumask_of(cpu), 1); - - timeout = jiffies + (1 * HZ); - while (time_before(jiffies, timeout)) { - smp_rmb(); - if (pen_release == -1) - break; - - udelay(10); - } - - /* - * now the secondary core is starting up let it run its - * calibrations, then wait for it to finish - */ - spin_unlock(&boot_lock); - - return pen_release != -1 ? -ENOSYS : 0; -} +extern void versatile_secondary_startup(void); /* * Initialise the CPU possible map early - this describes the CPUs @@ -125,36 +28,16 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle) */ void __init smp_init_cpus(void) { - void __iomem *scu_base = scu_base_addr(); - unsigned int i, ncores; - - ncores = scu_base ? scu_get_core_count(scu_base) : 1; - - /* sanity check */ - if (ncores > NR_CPUS) { - printk(KERN_WARNING - "vexpress: no. of cores (%d) greater than configured " - "maximum of %d - clipping\n", - ncores, NR_CPUS); - ncores = NR_CPUS; - } - - for (i = 0; i < ncores; i++) - set_cpu_possible(i, true); + ct_desc->init_cpu_map(); } void __init platform_smp_prepare_cpus(unsigned int max_cpus) { - int i; - /* * Initialise the present map, which describes the set of CPUs * actually populated at the present time. */ - for (i = 0; i < max_cpus; i++) - set_cpu_present(i, true); - - scu_enable(scu_base_addr()); + ct_desc->smp_enable(max_cpus); /* * Write the address of secondary startup into the @@ -163,6 +46,6 @@ void __init platform_smp_prepare_cpus(unsigned int max_cpus) * secondary CPU branches to this address. */ writel(~0, MMIO_P2V(V2M_SYS_FLAGSCLR)); - writel(BSYM(virt_to_phys(vexpress_secondary_startup)), + writel(BSYM(virt_to_phys(versatile_secondary_startup)), MMIO_P2V(V2M_SYS_FLAGSSET)); } diff --git a/arch/arm/mach-vexpress/v2m.c b/arch/arm/mach-vexpress/v2m.c index 1edae65..ba46e8e 100644 --- a/arch/arm/mach-vexpress/v2m.c +++ b/arch/arm/mach-vexpress/v2m.c @@ -7,13 +7,16 @@ #include <linux/io.h> #include <linux/init.h> #include <linux/platform_device.h> +#include <linux/ata_platform.h> #include <linux/smsc911x.h> #include <linux/spinlock.h> #include <linux/sysdev.h> #include <linux/usb/isp1760.h> #include <linux/clkdev.h> +#include <asm/mach-types.h> #include <asm/sizes.h> +#include <asm/mach/arch.h> #include <asm/mach/flash.h> #include <asm/mach/map.h> #include <asm/mach/time.h> @@ -21,6 +24,7 @@ #include <asm/hardware/timer-sp.h> #include <asm/hardware/sp810.h> +#include <mach/ct-ca9x4.h> #include <mach/motherboard.h> #include <plat/sched_clock.h> @@ -42,19 +46,16 @@ static struct map_desc v2m_io_desc[] __initdata = { }, }; -void __init v2m_map_io(struct map_desc *tile, size_t num) +static void __init v2m_init_early(void) { - iotable_init(v2m_io_desc, ARRAY_SIZE(v2m_io_desc)); - iotable_init(tile, num); + ct_desc->init_early(); + versatile_sched_clock_init(MMIO_P2V(V2M_SYS_24MHZ), 24000000); } - static void __init v2m_timer_init(void) { u32 scctrl; - versatile_sched_clock_init(MMIO_P2V(V2M_SYS_24MHZ), 24000000); - /* Select 1MHz TIMCLK as the reference clock for SP804 timers */ scctrl = readl(MMIO_P2V(V2M_SYSCTL + SCCTRL)); scctrl |= SCCTRL_TIMEREN0SEL_TIMCLK; @@ -68,7 +69,7 @@ static void __init v2m_timer_init(void) sp804_clockevents_init(MMIO_P2V(V2M_TIMER0), IRQ_V2M_TIMER0); } -struct sys_timer v2m_timer = { +static struct sys_timer v2m_timer = { .init = v2m_timer_init, }; @@ -249,6 +250,29 @@ static struct platform_device v2m_flash_device = { .dev.platform_data = &v2m_flash_data, }; +static struct pata_platform_info v2m_pata_data = { + .ioport_shift = 2, +}; + +static struct resource v2m_pata_resources[] = { + { + .start = V2M_CF, + .end = V2M_CF + 0xff, + .flags = IORESOURCE_MEM, + }, { + .start = V2M_CF + 0x100, + .end = V2M_CF + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device v2m_cf_device = { + .name = "pata_platform", + .id = -1, + .resource = v2m_pata_resources, + .num_resources = ARRAY_SIZE(v2m_pata_resources), + .dev.platform_data = &v2m_pata_data, +}; static unsigned int v2m_mmci_status(struct device *dev) { @@ -354,7 +378,44 @@ static void v2m_restart(char str, const char *cmd) printk(KERN_EMERG "Unable to reboot\n"); } -static int __init v2m_init(void) +struct ct_desc *ct_desc; + +static struct ct_desc *ct_descs[] __initdata = { +#ifdef CONFIG_ARCH_VEXPRESS_CA9X4 + &ct_ca9x4_desc, +#endif +}; + +static void __init v2m_populate_ct_desc(void) +{ + int i; + u32 current_tile_id; + + ct_desc = NULL; + current_tile_id = readl(MMIO_P2V(V2M_SYS_PROCID0)) & V2M_CT_ID_MASK; + + for (i = 0; i < ARRAY_SIZE(ct_descs) && !ct_desc; ++i) + if (ct_descs[i]->id == current_tile_id) + ct_desc = ct_descs[i]; + + if (!ct_desc) + panic("vexpress: failed to populate core tile description " + "for tile ID 0x%8x\n", current_tile_id); +} + +static void __init v2m_map_io(void) +{ + iotable_init(v2m_io_desc, ARRAY_SIZE(v2m_io_desc)); + v2m_populate_ct_desc(); + ct_desc->map_io(); +} + +static void __init v2m_init_irq(void) +{ + ct_desc->init_irq(); +} + +static void __init v2m_init(void) { int i; @@ -363,6 +424,7 @@ static int __init v2m_init(void) platform_device_register(&v2m_pcie_i2c_device); platform_device_register(&v2m_ddc_i2c_device); platform_device_register(&v2m_flash_device); + platform_device_register(&v2m_cf_device); platform_device_register(&v2m_eth_device); platform_device_register(&v2m_usb_device); @@ -372,6 +434,14 @@ static int __init v2m_init(void) pm_power_off = v2m_power_off; arm_pm_restart = v2m_restart; - return 0; + ct_desc->init_tile(); } -arch_initcall(v2m_init); + +MACHINE_START(VEXPRESS, "ARM-Versatile Express") + .boot_params = PLAT_PHYS_OFFSET + 0x00000100, + .map_io = v2m_map_io, + .init_early = v2m_init_early, + .init_irq = v2m_init_irq, + .timer = &v2m_timer, + .init_machine = v2m_init, +MACHINE_END diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c index 4771dba..82a093c 100644 --- a/arch/arm/mm/dma-mapping.c +++ b/arch/arm/mm/dma-mapping.c @@ -149,6 +149,7 @@ static int __init consistent_init(void) { int ret = 0; pgd_t *pgd; + pud_t *pud; pmd_t *pmd; pte_t *pte; int i = 0; @@ -156,7 +157,15 @@ static int __init consistent_init(void) do { pgd = pgd_offset(&init_mm, base); - pmd = pmd_alloc(&init_mm, pgd, base); + + pud = pud_alloc(&init_mm, pgd, base); + if (!pud) { + printk(KERN_ERR "%s: no pud tables\n", __func__); + ret = -ENOMEM; + break; + } + + pmd = pmd_alloc(&init_mm, pud, base); if (!pmd) { printk(KERN_ERR "%s: no pmd tables\n", __func__); ret = -ENOMEM; diff --git a/arch/arm/mm/fault-armv.c b/arch/arm/mm/fault-armv.c index 01210db..7cab791 100644 --- a/arch/arm/mm/fault-armv.c +++ b/arch/arm/mm/fault-armv.c @@ -95,6 +95,7 @@ static int adjust_pte(struct vm_area_struct *vma, unsigned long address, { spinlock_t *ptl; pgd_t *pgd; + pud_t *pud; pmd_t *pmd; pte_t *pte; int ret; @@ -103,7 +104,11 @@ static int adjust_pte(struct vm_area_struct *vma, unsigned long address, if (pgd_none_or_clear_bad(pgd)) return 0; - pmd = pmd_offset(pgd, address); + pud = pud_offset(pgd, address); + if (pud_none_or_clear_bad(pud)) + return 0; + + pmd = pmd_offset(pud, address); if (pmd_none_or_clear_bad(pmd)) return 0; diff --git a/arch/arm/mm/fault.c b/arch/arm/mm/fault.c index f10f9ba..bc0e1d8 100644 --- a/arch/arm/mm/fault.c +++ b/arch/arm/mm/fault.c @@ -76,9 +76,11 @@ void show_pte(struct mm_struct *mm, unsigned long addr) printk(KERN_ALERT "pgd = %p\n", mm->pgd); pgd = pgd_offset(mm, addr); - printk(KERN_ALERT "[%08lx] *pgd=%08lx", addr, pgd_val(*pgd)); + printk(KERN_ALERT "[%08lx] *pgd=%08llx", + addr, (long long)pgd_val(*pgd)); do { + pud_t *pud; pmd_t *pmd; pte_t *pte; @@ -90,9 +92,21 @@ void show_pte(struct mm_struct *mm, unsigned long addr) break; } - pmd = pmd_offset(pgd, addr); + pud = pud_offset(pgd, addr); + if (PTRS_PER_PUD != 1) + printk(", *pud=%08lx", pud_val(*pud)); + + if (pud_none(*pud)) + break; + + if (pud_bad(*pud)) { + printk("(bad)"); + break; + } + + pmd = pmd_offset(pud, addr); if (PTRS_PER_PMD != 1) - printk(", *pmd=%08lx", pmd_val(*pmd)); + printk(", *pmd=%08llx", (long long)pmd_val(*pmd)); if (pmd_none(*pmd)) break; @@ -107,8 +121,9 @@ void show_pte(struct mm_struct *mm, unsigned long addr) break; pte = pte_offset_map(pmd, addr); - printk(", *pte=%08lx", pte_val(*pte)); - printk(", *ppte=%08lx", pte_val(pte[PTE_HWTABLE_PTRS])); + printk(", *pte=%08llx", (long long)pte_val(*pte)); + printk(", *ppte=%08llx", + (long long)pte_val(pte[PTE_HWTABLE_PTRS])); pte_unmap(pte); } while(0); @@ -388,6 +403,7 @@ do_translation_fault(unsigned long addr, unsigned int fsr, { unsigned int index; pgd_t *pgd, *pgd_k; + pud_t *pud, *pud_k; pmd_t *pmd, *pmd_k; if (addr < TASK_SIZE) @@ -406,12 +422,19 @@ do_translation_fault(unsigned long addr, unsigned int fsr, if (pgd_none(*pgd_k)) goto bad_area; - if (!pgd_present(*pgd)) set_pgd(pgd, *pgd_k); - pmd_k = pmd_offset(pgd_k, addr); - pmd = pmd_offset(pgd, addr); + pud = pud_offset(pgd, addr); + pud_k = pud_offset(pgd_k, addr); + + if (pud_none(*pud_k)) + goto bad_area; + if (!pud_present(*pud)) + set_pud(pud, *pud_k); + + pmd = pmd_offset(pud, addr); + pmd_k = pmd_offset(pud_k, addr); /* * On ARM one Linux PGD entry contains two hardware entries (see page diff --git a/arch/arm/mm/idmap.c b/arch/arm/mm/idmap.c index 5729944..2be9139 100644 --- a/arch/arm/mm/idmap.c +++ b/arch/arm/mm/idmap.c @@ -4,10 +4,10 @@ #include <asm/pgalloc.h> #include <asm/pgtable.h> -static void idmap_add_pmd(pgd_t *pgd, unsigned long addr, unsigned long end, +static void idmap_add_pmd(pud_t *pud, unsigned long addr, unsigned long end, unsigned long prot) { - pmd_t *pmd = pmd_offset(pgd, addr); + pmd_t *pmd = pmd_offset(pud, addr); addr = (addr & PMD_MASK) | prot; pmd[0] = __pmd(addr); @@ -16,6 +16,18 @@ static void idmap_add_pmd(pgd_t *pgd, unsigned long addr, unsigned long end, flush_pmd_entry(pmd); } +static void idmap_add_pud(pgd_t *pgd, unsigned long addr, unsigned long end, + unsigned long prot) +{ + pud_t *pud = pud_offset(pgd, addr); + unsigned long next; + + do { + next = pud_addr_end(addr, end); + idmap_add_pmd(pud, addr, next, prot); + } while (pud++, addr = next, addr != end); +} + void identity_mapping_add(pgd_t *pgd, unsigned long addr, unsigned long end) { unsigned long prot, next; @@ -27,17 +39,28 @@ void identity_mapping_add(pgd_t *pgd, unsigned long addr, unsigned long end) pgd += pgd_index(addr); do { next = pgd_addr_end(addr, end); - idmap_add_pmd(pgd, addr, next, prot); + idmap_add_pud(pgd, addr, next, prot); } while (pgd++, addr = next, addr != end); } #ifdef CONFIG_SMP -static void idmap_del_pmd(pgd_t *pgd, unsigned long addr, unsigned long end) +static void idmap_del_pmd(pud_t *pud, unsigned long addr, unsigned long end) { - pmd_t *pmd = pmd_offset(pgd, addr); + pmd_t *pmd = pmd_offset(pud, addr); pmd_clear(pmd); } +static void idmap_del_pud(pgd_t *pgd, unsigned long addr, unsigned long end) +{ + pud_t *pud = pud_offset(pgd, addr); + unsigned long next; + + do { + next = pud_addr_end(addr, end); + idmap_del_pmd(pud, addr, next); + } while (pud++, addr = next, addr != end); +} + void identity_mapping_del(pgd_t *pgd, unsigned long addr, unsigned long end) { unsigned long next; @@ -45,7 +68,7 @@ void identity_mapping_del(pgd_t *pgd, unsigned long addr, unsigned long end) pgd += pgd_index(addr); do { next = pgd_addr_end(addr, end); - idmap_del_pmd(pgd, addr, next); + idmap_del_pud(pgd, addr, next); } while (pgd++, addr = next, addr != end); } #endif diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c index cddd684..e5f6fc4 100644 --- a/arch/arm/mm/init.c +++ b/arch/arm/mm/init.c @@ -78,7 +78,7 @@ __tagtable(ATAG_INITRD2, parse_tag_initrd2); */ struct meminfo meminfo; -void show_mem(void) +void show_mem(unsigned int filter) { int free = 0, total = 0, reserved = 0; int shared = 0, cached = 0, slab = 0, i; @@ -350,7 +350,7 @@ void __init bootmem_init(void) */ arm_bootmem_free(min, max_low, max_high); - high_memory = __va((max_low << PAGE_SHIFT) - 1) + 1; + high_memory = __va(((phys_addr_t)max_low << PAGE_SHIFT) - 1) + 1; /* * This doesn't seem to be used by the Linux memory manager any @@ -398,8 +398,8 @@ free_memmap(unsigned long start_pfn, unsigned long end_pfn) * Convert to physical addresses, and * round start upwards and end downwards. */ - pg = PAGE_ALIGN(__pa(start_pg)); - pgend = __pa(end_pg) & PAGE_MASK; + pg = (unsigned long)PAGE_ALIGN(__pa(start_pg)); + pgend = (unsigned long)__pa(end_pg) & PAGE_MASK; /* * If there are free pages between these, diff --git a/arch/arm/mm/mm.h b/arch/arm/mm/mm.h index 36960df..d238410 100644 --- a/arch/arm/mm/mm.h +++ b/arch/arm/mm/mm.h @@ -7,7 +7,7 @@ extern pmd_t *top_pmd; static inline pmd_t *pmd_off(pgd_t *pgd, unsigned long virt) { - return pmd_offset(pgd, virt); + return pmd_offset(pud_offset(pgd, virt), virt); } static inline pmd_t *pmd_off_k(unsigned long virt) diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c index ff7b43b..6cf76b3 100644 --- a/arch/arm/mm/mmu.c +++ b/arch/arm/mm/mmu.c @@ -533,7 +533,7 @@ static void __init *early_alloc(unsigned long sz) static pte_t * __init early_pte_alloc(pmd_t *pmd, unsigned long addr, unsigned long prot) { if (pmd_none(*pmd)) { - pte_t *pte = early_alloc(2 * PTRS_PER_PTE * sizeof(pte_t)); + pte_t *pte = early_alloc(PTE_HWTABLE_OFF + PTE_HWTABLE_SIZE); __pmd_populate(pmd, __pa(pte), prot); } BUG_ON(pmd_bad(*pmd)); @@ -551,11 +551,11 @@ static void __init alloc_init_pte(pmd_t *pmd, unsigned long addr, } while (pte++, addr += PAGE_SIZE, addr != end); } -static void __init alloc_init_section(pgd_t *pgd, unsigned long addr, +static void __init alloc_init_section(pud_t *pud, unsigned long addr, unsigned long end, phys_addr_t phys, const struct mem_type *type) { - pmd_t *pmd = pmd_offset(pgd, addr); + pmd_t *pmd = pmd_offset(pud, addr); /* * Try a section mapping - end, addr and phys must all be aligned @@ -584,6 +584,19 @@ static void __init alloc_init_section(pgd_t *pgd, unsigned long addr, } } +static void alloc_init_pud(pgd_t *pgd, unsigned long addr, unsigned long end, + unsigned long phys, const struct mem_type *type) +{ + pud_t *pud = pud_offset(pgd, addr); + unsigned long next; + + do { + next = pud_addr_end(addr, end); + alloc_init_section(pud, addr, next, phys, type); + phys += next - addr; + } while (pud++, addr = next, addr != end); +} + static void __init create_36bit_mapping(struct map_desc *md, const struct mem_type *type) { @@ -592,13 +605,13 @@ static void __init create_36bit_mapping(struct map_desc *md, pgd_t *pgd; addr = md->virtual; - phys = (unsigned long)__pfn_to_phys(md->pfn); + phys = __pfn_to_phys(md->pfn); length = PAGE_ALIGN(md->length); if (!(cpu_architecture() >= CPU_ARCH_ARMv6 || cpu_is_xsc3())) { printk(KERN_ERR "MM: CPU does not support supersection " "mapping for 0x%08llx at 0x%08lx\n", - __pfn_to_phys((u64)md->pfn), addr); + (long long)__pfn_to_phys((u64)md->pfn), addr); return; } @@ -611,14 +624,14 @@ static void __init create_36bit_mapping(struct map_desc *md, if (type->domain) { printk(KERN_ERR "MM: invalid domain in supersection " "mapping for 0x%08llx at 0x%08lx\n", - __pfn_to_phys((u64)md->pfn), addr); + (long long)__pfn_to_phys((u64)md->pfn), addr); return; } if ((addr | length | __pfn_to_phys(md->pfn)) & ~SUPERSECTION_MASK) { - printk(KERN_ERR "MM: cannot create mapping for " - "0x%08llx at 0x%08lx invalid alignment\n", - __pfn_to_phys((u64)md->pfn), addr); + printk(KERN_ERR "MM: cannot create mapping for 0x%08llx" + " at 0x%08lx invalid alignment\n", + (long long)__pfn_to_phys((u64)md->pfn), addr); return; } @@ -631,7 +644,8 @@ static void __init create_36bit_mapping(struct map_desc *md, pgd = pgd_offset_k(addr); end = addr + length; do { - pmd_t *pmd = pmd_offset(pgd, addr); + pud_t *pud = pud_offset(pgd, addr); + pmd_t *pmd = pmd_offset(pud, addr); int i; for (i = 0; i < 16; i++) @@ -652,22 +666,23 @@ static void __init create_36bit_mapping(struct map_desc *md, */ static void __init create_mapping(struct map_desc *md) { - unsigned long phys, addr, length, end; + unsigned long addr, length, end; + phys_addr_t phys; const struct mem_type *type; pgd_t *pgd; if (md->virtual != vectors_base() && md->virtual < TASK_SIZE) { - printk(KERN_WARNING "BUG: not creating mapping for " - "0x%08llx at 0x%08lx in user region\n", - __pfn_to_phys((u64)md->pfn), md->virtual); + printk(KERN_WARNING "BUG: not creating mapping for 0x%08llx" + " at 0x%08lx in user region\n", + (long long)__pfn_to_phys((u64)md->pfn), md->virtual); return; } if ((md->type == MT_DEVICE || md->type == MT_ROM) && md->virtual >= PAGE_OFFSET && md->virtual < VMALLOC_END) { - printk(KERN_WARNING "BUG: mapping for 0x%08llx at 0x%08lx " - "overlaps vmalloc space\n", - __pfn_to_phys((u64)md->pfn), md->virtual); + printk(KERN_WARNING "BUG: mapping for 0x%08llx" + " at 0x%08lx overlaps vmalloc space\n", + (long long)__pfn_to_phys((u64)md->pfn), md->virtual); } type = &mem_types[md->type]; @@ -681,13 +696,13 @@ static void __init create_mapping(struct map_desc *md) } addr = md->virtual & PAGE_MASK; - phys = (unsigned long)__pfn_to_phys(md->pfn); + phys = __pfn_to_phys(md->pfn); length = PAGE_ALIGN(md->length + (md->virtual & ~PAGE_MASK)); if (type->prot_l1 == 0 && ((addr | phys | length) & ~SECTION_MASK)) { - printk(KERN_WARNING "BUG: map for 0x%08lx at 0x%08lx can not " + printk(KERN_WARNING "BUG: map for 0x%08llx at 0x%08lx can not " "be mapped using pages, ignoring.\n", - __pfn_to_phys(md->pfn), addr); + (long long)__pfn_to_phys(md->pfn), addr); return; } @@ -696,7 +711,7 @@ static void __init create_mapping(struct map_desc *md) do { unsigned long next = pgd_addr_end(addr, end); - alloc_init_section(pgd, addr, next, phys, type); + alloc_init_pud(pgd, addr, next, phys, type); phys += next - addr; addr = next; @@ -794,9 +809,10 @@ static void __init sanity_check_meminfo(void) */ if (__va(bank->start) >= vmalloc_min || __va(bank->start) < (void *)PAGE_OFFSET) { - printk(KERN_NOTICE "Ignoring RAM at %.8lx-%.8lx " + printk(KERN_NOTICE "Ignoring RAM at %.8llx-%.8llx " "(vmalloc region overlap).\n", - bank->start, bank->start + bank->size - 1); + (unsigned long long)bank->start, + (unsigned long long)bank->start + bank->size - 1); continue; } @@ -807,10 +823,11 @@ static void __init sanity_check_meminfo(void) if (__va(bank->start + bank->size) > vmalloc_min || __va(bank->start + bank->size) < __va(bank->start)) { unsigned long newsize = vmalloc_min - __va(bank->start); - printk(KERN_NOTICE "Truncating RAM at %.8lx-%.8lx " - "to -%.8lx (vmalloc region overlap).\n", - bank->start, bank->start + bank->size - 1, - bank->start + newsize - 1); + printk(KERN_NOTICE "Truncating RAM at %.8llx-%.8llx " + "to -%.8llx (vmalloc region overlap).\n", + (unsigned long long)bank->start, + (unsigned long long)bank->start + bank->size - 1, + (unsigned long long)bank->start + newsize - 1); bank->size = newsize; } #endif diff --git a/arch/arm/mm/pgd.c b/arch/arm/mm/pgd.c index 709244c..b2027c1 100644 --- a/arch/arm/mm/pgd.c +++ b/arch/arm/mm/pgd.c @@ -23,6 +23,7 @@ pgd_t *pgd_alloc(struct mm_struct *mm) { pgd_t *new_pgd, *init_pgd; + pud_t *new_pud, *init_pud; pmd_t *new_pmd, *init_pmd; pte_t *new_pte, *init_pte; @@ -46,7 +47,11 @@ pgd_t *pgd_alloc(struct mm_struct *mm) * On ARM, first page must always be allocated since it * contains the machine vectors. */ - new_pmd = pmd_alloc(mm, new_pgd, 0); + new_pud = pud_alloc(mm, new_pgd, 0); + if (!new_pud) + goto no_pud; + + new_pmd = pmd_alloc(mm, new_pud, 0); if (!new_pmd) goto no_pmd; @@ -54,7 +59,8 @@ pgd_t *pgd_alloc(struct mm_struct *mm) if (!new_pte) goto no_pte; - init_pmd = pmd_offset(init_pgd, 0); + init_pud = pud_offset(init_pgd, 0); + init_pmd = pmd_offset(init_pud, 0); init_pte = pte_offset_map(init_pmd, 0); set_pte_ext(new_pte, *init_pte, 0); pte_unmap(init_pte); @@ -66,6 +72,8 @@ pgd_t *pgd_alloc(struct mm_struct *mm) no_pte: pmd_free(mm, new_pmd); no_pmd: + pud_free(mm, new_pud); +no_pud: free_pages((unsigned long)new_pgd, 2); no_pgd: return NULL; @@ -74,6 +82,7 @@ no_pgd: void pgd_free(struct mm_struct *mm, pgd_t *pgd_base) { pgd_t *pgd; + pud_t *pud; pmd_t *pmd; pgtable_t pte; @@ -84,7 +93,11 @@ void pgd_free(struct mm_struct *mm, pgd_t *pgd_base) if (pgd_none_or_clear_bad(pgd)) goto no_pgd; - pmd = pmd_offset(pgd, 0); + pud = pud_offset(pgd, 0); + if (pud_none_or_clear_bad(pud)) + goto no_pud; + + pmd = pmd_offset(pud, 0); if (pmd_none_or_clear_bad(pmd)) goto no_pmd; @@ -92,8 +105,11 @@ void pgd_free(struct mm_struct *mm, pgd_t *pgd_base) pmd_clear(pmd); pte_free(mm, pte); no_pmd: - pgd_clear(pgd); + pud_clear(pud); pmd_free(mm, pmd); +no_pud: + pgd_clear(pgd); + pud_free(mm, pud); no_pgd: free_pages((unsigned long) pgd_base, 2); } diff --git a/arch/arm/plat-mxc/include/mach/esdhc.h b/arch/arm/plat-mxc/include/mach/esdhc.h index a48a9aa..86003f4 100644 --- a/arch/arm/plat-mxc/include/mach/esdhc.h +++ b/arch/arm/plat-mxc/include/mach/esdhc.h @@ -10,7 +10,17 @@ #ifndef __ASM_ARCH_IMX_ESDHC_H #define __ASM_ARCH_IMX_ESDHC_H +/** + * struct esdhc_platform_data - optional platform data for esdhc on i.MX + * + * strongly recommended for i.MX25/35, not needed for other variants + * + * @wp_gpio: gpio for write_protect (-EINVAL if unused) + * @cd_gpio: gpio for card_detect interrupt (-EINVAL if unused) + */ + struct esdhc_platform_data { - unsigned int wp_gpio; /* write protect pin */ + unsigned int wp_gpio; + unsigned int cd_gpio; }; #endif /* __ASM_ARCH_IMX_ESDHC_H */ diff --git a/arch/arm/plat-nomadik/include/plat/ste_dma40.h b/arch/arm/plat-nomadik/include/plat/ste_dma40.h index 4d6dd4c..c448860 100644 --- a/arch/arm/plat-nomadik/include/plat/ste_dma40.h +++ b/arch/arm/plat-nomadik/include/plat/ste_dma40.h @@ -104,6 +104,8 @@ struct stedma40_half_channel_info { * * @dir: MEM 2 MEM, PERIPH 2 MEM , MEM 2 PERIPH, PERIPH 2 PERIPH * @high_priority: true if high-priority + * @realtime: true if realtime mode is to be enabled. Only available on DMA40 + * version 3+, i.e DB8500v2+ * @mode: channel mode: physical, logical, or operation * @mode_opt: options for the chosen channel mode * @src_dev_type: Src device type @@ -119,6 +121,7 @@ struct stedma40_half_channel_info { struct stedma40_chan_cfg { enum stedma40_xfer_dir dir; bool high_priority; + bool realtime; enum stedma40_mode mode; enum stedma40_mode_opt mode_opt; int src_dev_type; @@ -169,25 +172,6 @@ struct stedma40_platform_data { bool stedma40_filter(struct dma_chan *chan, void *data); /** - * stedma40_memcpy_sg() - extension of the dma framework, memcpy to/from - * scattergatter lists. - * - * @chan: dmaengine handle - * @sgl_dst: Destination scatter list - * @sgl_src: Source scatter list - * @sgl_len: The length of each scatterlist. Both lists must be of equal length - * and each element must match the corresponding element in the other scatter - * list. - * @flags: is actually enum dma_ctrl_flags. See dmaengine.h - */ - -struct dma_async_tx_descriptor *stedma40_memcpy_sg(struct dma_chan *chan, - struct scatterlist *sgl_dst, - struct scatterlist *sgl_src, - unsigned int sgl_len, - unsigned long flags); - -/** * stedma40_slave_mem() - Transfers a raw data buffer to or from a slave * (=device) * diff --git a/arch/arm/plat-omap/include/plat/display.h b/arch/arm/plat-omap/include/plat/display.h index 0f140ec..5e04ddc 100644 --- a/arch/arm/plat-omap/include/plat/display.h +++ b/arch/arm/plat-omap/include/plat/display.h @@ -58,6 +58,7 @@ enum omap_display_type { OMAP_DISPLAY_TYPE_SDI = 1 << 2, OMAP_DISPLAY_TYPE_DSI = 1 << 3, OMAP_DISPLAY_TYPE_VENC = 1 << 4, + OMAP_DISPLAY_TYPE_HDMI = 1 << 5, }; enum omap_plane { @@ -237,6 +238,13 @@ static inline int omap_display_init(struct omap_dss_board_info *board_data) } #endif +struct omap_display_platform_data { + struct omap_dss_board_info *board_data; + /* TODO: Additional members to be added when PM is considered */ + + bool (*opt_clock_available)(const char *clk_role); +}; + struct omap_video_timings { /* Unit: pixels */ u16 x_res; @@ -396,8 +404,8 @@ struct omap_dss_device { struct { u16 regn; u16 regm; - u16 regm3; - u16 regm4; + u16 regm_dispc; + u16 regm_dsi; u16 lp_clk_div; @@ -555,6 +563,9 @@ int omap_dsi_update(struct omap_dss_device *dssdev, int channel, u16 x, u16 y, u16 w, u16 h, void (*callback)(int, void *), void *data); +int omap_dsi_request_vc(struct omap_dss_device *dssdev, int *channel); +int omap_dsi_set_vc_id(struct omap_dss_device *dssdev, int channel, int vc_id); +void omap_dsi_release_vc(struct omap_dss_device *dssdev, int channel); int omapdss_dsi_display_enable(struct omap_dss_device *dssdev); void omapdss_dsi_display_disable(struct omap_dss_device *dssdev); diff --git a/arch/arm/plat-omap/include/plat/omap34xx.h b/arch/arm/plat-omap/include/plat/omap34xx.h index 98fc8b4..b9e8588 100644 --- a/arch/arm/plat-omap/include/plat/omap34xx.h +++ b/arch/arm/plat-omap/include/plat/omap34xx.h @@ -56,8 +56,12 @@ #define OMAP3430_ISP_RESZ_BASE (OMAP3430_ISP_BASE + 0x1000) #define OMAP3430_ISP_SBL_BASE (OMAP3430_ISP_BASE + 0x1200) #define OMAP3430_ISP_MMU_BASE (OMAP3430_ISP_BASE + 0x1400) -#define OMAP3430_ISP_CSI2A_BASE (OMAP3430_ISP_BASE + 0x1800) -#define OMAP3430_ISP_CSI2PHY_BASE (OMAP3430_ISP_BASE + 0x1970) +#define OMAP3430_ISP_CSI2A_REGS1_BASE (OMAP3430_ISP_BASE + 0x1800) +#define OMAP3430_ISP_CSIPHY2_BASE (OMAP3430_ISP_BASE + 0x1970) +#define OMAP3630_ISP_CSI2A_REGS2_BASE (OMAP3430_ISP_BASE + 0x19C0) +#define OMAP3630_ISP_CSI2C_REGS1_BASE (OMAP3430_ISP_BASE + 0x1C00) +#define OMAP3630_ISP_CSIPHY1_BASE (OMAP3430_ISP_BASE + 0x1D70) +#define OMAP3630_ISP_CSI2C_REGS2_BASE (OMAP3430_ISP_BASE + 0x1DC0) #define OMAP3430_ISP_END (OMAP3430_ISP_BASE + 0x06F) #define OMAP3430_ISP_CBUFF_END (OMAP3430_ISP_CBUFF_BASE + 0x077) @@ -69,8 +73,12 @@ #define OMAP3430_ISP_RESZ_END (OMAP3430_ISP_RESZ_BASE + 0x0AB) #define OMAP3430_ISP_SBL_END (OMAP3430_ISP_SBL_BASE + 0x0FB) #define OMAP3430_ISP_MMU_END (OMAP3430_ISP_MMU_BASE + 0x06F) -#define OMAP3430_ISP_CSI2A_END (OMAP3430_ISP_CSI2A_BASE + 0x16F) -#define OMAP3430_ISP_CSI2PHY_END (OMAP3430_ISP_CSI2PHY_BASE + 0x007) +#define OMAP3430_ISP_CSI2A_REGS1_END (OMAP3430_ISP_CSI2A_REGS1_BASE + 0x16F) +#define OMAP3430_ISP_CSIPHY2_END (OMAP3430_ISP_CSIPHY2_BASE + 0x00B) +#define OMAP3630_ISP_CSI2A_REGS2_END (OMAP3630_ISP_CSI2A_REGS2_BASE + 0x3F) +#define OMAP3630_ISP_CSI2C_REGS1_END (OMAP3630_ISP_CSI2C_REGS1_BASE + 0x16F) +#define OMAP3630_ISP_CSIPHY1_END (OMAP3630_ISP_CSIPHY1_BASE + 0x00B) +#define OMAP3630_ISP_CSI2C_REGS2_END (OMAP3630_ISP_CSI2C_REGS2_BASE + 0x3F) #define OMAP34XX_HSUSB_OTG_BASE (L4_34XX_BASE + 0xAB000) #define OMAP34XX_USBTLL_BASE (L4_34XX_BASE + 0x62000) diff --git a/arch/arm/plat-pxa/include/plat/i2c.h b/arch/arm/plat-pxa/include/plat/i2c.h deleted file mode 100644 index 1a9f65e..0000000 --- a/arch/arm/plat-pxa/include/plat/i2c.h +++ /dev/null @@ -1,82 +0,0 @@ -/* - * i2c_pxa.h - * - * Copyright (C) 2002 Intrinsyc Software Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - */ -#ifndef _I2C_PXA_H_ -#define _I2C_PXA_H_ - -#if 0 -#define DEF_TIMEOUT 3 -#else -/* need a longer timeout if we're dealing with the fact we may well be - * looking at a multi-master environment -*/ -#define DEF_TIMEOUT 32 -#endif - -#define BUS_ERROR (-EREMOTEIO) -#define XFER_NAKED (-ECONNREFUSED) -#define I2C_RETRY (-2000) /* an error has occurred retry transmit */ - -/* ICR initialize bit values -* -* 15. FM 0 (100 Khz operation) -* 14. UR 0 (No unit reset) -* 13. SADIE 0 (Disables the unit from interrupting on slave addresses -* matching its slave address) -* 12. ALDIE 0 (Disables the unit from interrupt when it loses arbitration -* in master mode) -* 11. SSDIE 0 (Disables interrupts from a slave stop detected, in slave mode) -* 10. BEIE 1 (Enable interrupts from detected bus errors, no ACK sent) -* 9. IRFIE 1 (Enable interrupts from full buffer received) -* 8. ITEIE 1 (Enables the I2C unit to interrupt when transmit buffer empty) -* 7. GCD 1 (Disables i2c unit response to general call messages as a slave) -* 6. IUE 0 (Disable unit until we change settings) -* 5. SCLE 1 (Enables the i2c clock output for master mode (drives SCL) -* 4. MA 0 (Only send stop with the ICR stop bit) -* 3. TB 0 (We are not transmitting a byte initially) -* 2. ACKNAK 0 (Send an ACK after the unit receives a byte) -* 1. STOP 0 (Do not send a STOP) -* 0. START 0 (Do not send a START) -* -*/ -#define I2C_ICR_INIT (ICR_BEIE | ICR_IRFIE | ICR_ITEIE | ICR_GCD | ICR_SCLE) - -/* I2C status register init values - * - * 10. BED 1 (Clear bus error detected) - * 9. SAD 1 (Clear slave address detected) - * 7. IRF 1 (Clear IDBR Receive Full) - * 6. ITE 1 (Clear IDBR Transmit Empty) - * 5. ALD 1 (Clear Arbitration Loss Detected) - * 4. SSD 1 (Clear Slave Stop Detected) - */ -#define I2C_ISR_INIT 0x7FF /* status register init */ - -struct i2c_slave_client; - -struct i2c_pxa_platform_data { - unsigned int slave_addr; - struct i2c_slave_client *slave; - unsigned int class; - unsigned int use_pio :1; - unsigned int fast_mode :1; -}; - -extern void pxa_set_i2c_info(struct i2c_pxa_platform_data *info); - -#ifdef CONFIG_PXA27x -extern void pxa27x_set_i2c_power_info(struct i2c_pxa_platform_data *info); -#endif - -#ifdef CONFIG_PXA3xx -extern void pxa3xx_set_i2c_power_info(struct i2c_pxa_platform_data *info); -#endif - -#endif diff --git a/arch/arm/plat-versatile/Kconfig b/arch/arm/plat-versatile/Kconfig new file mode 100644 index 0000000..52353be --- /dev/null +++ b/arch/arm/plat-versatile/Kconfig @@ -0,0 +1,17 @@ +if PLAT_VERSATILE + +config PLAT_VERSATILE_CLCD + bool + +config PLAT_VERSATILE_FPGA_IRQ + bool + +config PLAT_VERSATILE_LEDS + def_bool y if LEDS_CLASS + depends on ARCH_REALVIEW || ARCH_VERSATILE + +config PLAT_VERSATILE_SCHED_CLOCK + def_bool y if !ARCH_INTEGRATOR_AP + select HAVE_SCHED_CLOCK + +endif diff --git a/arch/arm/plat-versatile/Makefile b/arch/arm/plat-versatile/Makefile index 16dde08..69714db 100644 --- a/arch/arm/plat-versatile/Makefile +++ b/arch/arm/plat-versatile/Makefile @@ -1,8 +1,7 @@ obj-y := clock.o -ifneq ($(CONFIG_ARCH_INTEGRATOR),y) -obj-y += sched-clock.o -endif -ifeq ($(CONFIG_LEDS_CLASS),y) -obj-$(CONFIG_ARCH_REALVIEW) += leds.o -obj-$(CONFIG_ARCH_VERSATILE) += leds.o -endif +obj-$(CONFIG_LOCAL_TIMERS) += localtimer.o +obj-$(CONFIG_PLAT_VERSATILE_CLCD) += clcd.o +obj-$(CONFIG_PLAT_VERSATILE_FPGA_IRQ) += fpga-irq.o +obj-$(CONFIG_PLAT_VERSATILE_LEDS) += leds.o +obj-$(CONFIG_PLAT_VERSATILE_SCHED_CLOCK) += sched-clock.o +obj-$(CONFIG_SMP) += headsmp.o platsmp.o diff --git a/arch/arm/plat-versatile/clcd.c b/arch/arm/plat-versatile/clcd.c new file mode 100644 index 0000000..6628cc2 --- /dev/null +++ b/arch/arm/plat-versatile/clcd.c @@ -0,0 +1,182 @@ +#include <linux/device.h> +#include <linux/dma-mapping.h> +#include <linux/amba/bus.h> +#include <linux/amba/clcd.h> +#include <plat/clcd.h> + +static struct clcd_panel vga = { + .mode = { + .name = "VGA", + .refresh = 60, + .xres = 640, + .yres = 480, + .pixclock = 39721, + .left_margin = 40, + .right_margin = 24, + .upper_margin = 32, + .lower_margin = 11, + .hsync_len = 96, + .vsync_len = 2, + .sync = 0, + .vmode = FB_VMODE_NONINTERLACED, + }, + .width = -1, + .height = -1, + .tim2 = TIM2_BCD | TIM2_IPC, + .cntl = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1), + .caps = CLCD_CAP_5551 | CLCD_CAP_565 | CLCD_CAP_888, + .bpp = 16, +}; + +static struct clcd_panel xvga = { + .mode = { + .name = "XVGA", + .refresh = 60, + .xres = 1024, + .yres = 768, + .pixclock = 15748, + .left_margin = 152, + .right_margin = 48, + .upper_margin = 23, + .lower_margin = 3, + .hsync_len = 104, + .vsync_len = 4, + .sync = 0, + .vmode = FB_VMODE_NONINTERLACED, + }, + .width = -1, + .height = -1, + .tim2 = TIM2_BCD | TIM2_IPC, + .cntl = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1), + .caps = CLCD_CAP_5551 | CLCD_CAP_565 | CLCD_CAP_888, + .bpp = 16, +}; + +/* Sanyo TM38QV67A02A - 3.8 inch QVGA (320x240) Color TFT */ +static struct clcd_panel sanyo_tm38qv67a02a = { + .mode = { + .name = "Sanyo TM38QV67A02A", + .refresh = 116, + .xres = 320, + .yres = 240, + .pixclock = 100000, + .left_margin = 6, + .right_margin = 6, + .upper_margin = 5, + .lower_margin = 5, + .hsync_len = 6, + .vsync_len = 6, + .sync = 0, + .vmode = FB_VMODE_NONINTERLACED, + }, + .width = -1, + .height = -1, + .tim2 = TIM2_BCD, + .cntl = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1), + .caps = CLCD_CAP_5551, + .bpp = 16, +}; + +static struct clcd_panel sanyo_2_5_in = { + .mode = { + .name = "Sanyo QVGA Portrait", + .refresh = 116, + .xres = 240, + .yres = 320, + .pixclock = 100000, + .left_margin = 20, + .right_margin = 10, + .upper_margin = 2, + .lower_margin = 2, + .hsync_len = 10, + .vsync_len = 2, + .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, + .vmode = FB_VMODE_NONINTERLACED, + }, + .width = -1, + .height = -1, + .tim2 = TIM2_IVS | TIM2_IHS | TIM2_IPC, + .cntl = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1), + .caps = CLCD_CAP_5551, + .bpp = 16, +}; + +/* Epson L2F50113T00 - 2.2 inch 176x220 Color TFT */ +static struct clcd_panel epson_l2f50113t00 = { + .mode = { + .name = "Epson L2F50113T00", + .refresh = 390, + .xres = 176, + .yres = 220, + .pixclock = 62500, + .left_margin = 3, + .right_margin = 2, + .upper_margin = 1, + .lower_margin = 0, + .hsync_len = 3, + .vsync_len = 2, + .sync = 0, + .vmode = FB_VMODE_NONINTERLACED, + }, + .width = -1, + .height = -1, + .tim2 = TIM2_BCD | TIM2_IPC, + .cntl = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1), + .caps = CLCD_CAP_5551, + .bpp = 16, +}; + +static struct clcd_panel *panels[] = { + &vga, + &xvga, + &sanyo_tm38qv67a02a, + &sanyo_2_5_in, + &epson_l2f50113t00, +}; + +struct clcd_panel *versatile_clcd_get_panel(const char *name) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(panels); i++) + if (strcmp(panels[i]->mode.name, name) == 0) + break; + + if (i < ARRAY_SIZE(panels)) + return panels[i]; + + pr_err("CLCD: couldn't get parameters for panel %s\n", name); + + return NULL; +} + +int versatile_clcd_setup_dma(struct clcd_fb *fb, unsigned long framesize) +{ + dma_addr_t dma; + + fb->fb.screen_base = dma_alloc_writecombine(&fb->dev->dev, framesize, + &dma, GFP_KERNEL); + if (!fb->fb.screen_base) { + pr_err("CLCD: unable to map framebuffer\n"); + return -ENOMEM; + } + + fb->fb.fix.smem_start = dma; + fb->fb.fix.smem_len = framesize; + + return 0; +} + +int versatile_clcd_mmap_dma(struct clcd_fb *fb, struct vm_area_struct *vma) +{ + return dma_mmap_writecombine(&fb->dev->dev, vma, + fb->fb.screen_base, + fb->fb.fix.smem_start, + fb->fb.fix.smem_len); +} + +void versatile_clcd_remove_dma(struct clcd_fb *fb) +{ + dma_free_writecombine(&fb->dev->dev, fb->fb.fix.smem_len, + fb->fb.screen_base, fb->fb.fix.smem_start); +} diff --git a/arch/arm/plat-versatile/fpga-irq.c b/arch/arm/plat-versatile/fpga-irq.c new file mode 100644 index 0000000..31d945d --- /dev/null +++ b/arch/arm/plat-versatile/fpga-irq.c @@ -0,0 +1,72 @@ +/* + * Support for Versatile FPGA-based IRQ controllers + */ +#include <linux/irq.h> +#include <linux/io.h> + +#include <asm/mach/irq.h> +#include <plat/fpga-irq.h> + +#define IRQ_STATUS 0x00 +#define IRQ_RAW_STATUS 0x04 +#define IRQ_ENABLE_SET 0x08 +#define IRQ_ENABLE_CLEAR 0x0c + +static void fpga_irq_mask(struct irq_data *d) +{ + struct fpga_irq_data *f = irq_data_get_irq_chip_data(d); + u32 mask = 1 << (d->irq - f->irq_start); + + writel(mask, f->base + IRQ_ENABLE_CLEAR); +} + +static void fpga_irq_unmask(struct irq_data *d) +{ + struct fpga_irq_data *f = irq_data_get_irq_chip_data(d); + u32 mask = 1 << (d->irq - f->irq_start); + + writel(mask, f->base + IRQ_ENABLE_SET); +} + +static void fpga_irq_handle(unsigned int irq, struct irq_desc *desc) +{ + struct fpga_irq_data *f = get_irq_desc_data(desc); + u32 status = readl(f->base + IRQ_STATUS); + + if (status == 0) { + do_bad_IRQ(irq, desc); + return; + } + + do { + irq = ffs(status) - 1; + status &= ~(1 << irq); + + generic_handle_irq(irq + f->irq_start); + } while (status); +} + +void __init fpga_irq_init(int parent_irq, u32 valid, struct fpga_irq_data *f) +{ + unsigned int i; + + f->chip.irq_ack = fpga_irq_mask; + f->chip.irq_mask = fpga_irq_mask; + f->chip.irq_unmask = fpga_irq_unmask; + + if (parent_irq != -1) { + set_irq_data(parent_irq, f); + set_irq_chained_handler(parent_irq, fpga_irq_handle); + } + + for (i = 0; i < 32; i++) { + if (valid & (1 << i)) { + unsigned int irq = f->irq_start + i; + + set_irq_chip_data(irq, f); + set_irq_chip(irq, &f->chip); + set_irq_handler(irq, handle_level_irq); + set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); + } + } +} diff --git a/arch/arm/mach-vexpress/headsmp.S b/arch/arm/plat-versatile/headsmp.S index 7a3f063..d397a1f 100644 --- a/arch/arm/mach-vexpress/headsmp.S +++ b/arch/arm/plat-versatile/headsmp.S @@ -1,5 +1,5 @@ /* - * linux/arch/arm/mach-vexpress/headsmp.S + * linux/arch/arm/plat-versatile/headsmp.S * * Copyright (c) 2003 ARM Limited * All Rights Reserved @@ -14,11 +14,11 @@ __INIT /* - * Versatile Express specific entry point for secondary CPUs. This - * provides a "holding pen" into which all secondary cores are held + * Realview/Versatile Express specific entry point for secondary CPUs. + * This provides a "holding pen" into which all secondary cores are held * until we're ready for them to initialise. */ -ENTRY(vexpress_secondary_startup) +ENTRY(versatile_secondary_startup) mrc p15, 0, r0, c0, c0, 5 and r0, r0, #15 adr r4, 1f diff --git a/arch/arm/plat-versatile/include/plat/clcd.h b/arch/arm/plat-versatile/include/plat/clcd.h new file mode 100644 index 0000000..6bb6a1d --- /dev/null +++ b/arch/arm/plat-versatile/include/plat/clcd.h @@ -0,0 +1,9 @@ +#ifndef PLAT_CLCD_H +#define PLAT_CLCD_H + +struct clcd_panel *versatile_clcd_get_panel(const char *); +int versatile_clcd_setup_dma(struct clcd_fb *, unsigned long); +int versatile_clcd_mmap_dma(struct clcd_fb *, struct vm_area_struct *); +void versatile_clcd_remove_dma(struct clcd_fb *); + +#endif diff --git a/arch/arm/plat-versatile/include/plat/fpga-irq.h b/arch/arm/plat-versatile/include/plat/fpga-irq.h new file mode 100644 index 0000000..627fafd --- /dev/null +++ b/arch/arm/plat-versatile/include/plat/fpga-irq.h @@ -0,0 +1,12 @@ +#ifndef PLAT_FPGA_IRQ_H +#define PLAT_FPGA_IRQ_H + +struct fpga_irq_data { + void __iomem *base; + unsigned int irq_start; + struct irq_chip chip; +}; + +void fpga_irq_init(int, u32, struct fpga_irq_data *); + +#endif diff --git a/arch/arm/mach-vexpress/localtimer.c b/arch/arm/plat-versatile/localtimer.c index c0e3a59..0fb3961 100644 --- a/arch/arm/mach-vexpress/localtimer.c +++ b/arch/arm/plat-versatile/localtimer.c @@ -1,5 +1,5 @@ /* - * linux/arch/arm/mach-vexpress/localtimer.c + * linux/arch/arm/plat-versatile/localtimer.c * * Copyright (C) 2002 ARM Ltd. * All Rights Reserved @@ -19,8 +19,9 @@ /* * Setup the local clock events for a CPU. */ -void __cpuinit local_timer_setup(struct clock_event_device *evt) +int __cpuinit local_timer_setup(struct clock_event_device *evt) { evt->irq = IRQ_LOCALTIMER; twd_timer_setup(evt); + return 0; } diff --git a/arch/arm/plat-versatile/platsmp.c b/arch/arm/plat-versatile/platsmp.c new file mode 100644 index 0000000..ba3d471 --- /dev/null +++ b/arch/arm/plat-versatile/platsmp.c @@ -0,0 +1,104 @@ +/* + * linux/arch/arm/plat-versatile/platsmp.c + * + * Copyright (C) 2002 ARM Ltd. + * All Rights Reserved + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#include <linux/init.h> +#include <linux/errno.h> +#include <linux/delay.h> +#include <linux/device.h> +#include <linux/jiffies.h> +#include <linux/smp.h> + +#include <asm/cacheflush.h> + +/* + * control for which core is the next to come out of the secondary + * boot "holding pen" + */ +volatile int __cpuinitdata pen_release = -1; + +/* + * Write pen_release in a way that is guaranteed to be visible to all + * observers, irrespective of whether they're taking part in coherency + * or not. This is necessary for the hotplug code to work reliably. + */ +static void __cpuinit write_pen_release(int val) +{ + pen_release = val; + smp_wmb(); + __cpuc_flush_dcache_area((void *)&pen_release, sizeof(pen_release)); + outer_clean_range(__pa(&pen_release), __pa(&pen_release + 1)); +} + +static DEFINE_SPINLOCK(boot_lock); + +void __cpuinit platform_secondary_init(unsigned int cpu) +{ + /* + * if any interrupts are already enabled for the primary + * core (e.g. timer irq), then they will not have been enabled + * for us: do so + */ + gic_secondary_init(0); + + /* + * let the primary processor know we're out of the + * pen, then head off into the C entry point + */ + write_pen_release(-1); + + /* + * Synchronise with the boot thread. + */ + spin_lock(&boot_lock); + spin_unlock(&boot_lock); +} + +int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle) +{ + unsigned long timeout; + + /* + * Set synchronisation state between this boot processor + * and the secondary one + */ + spin_lock(&boot_lock); + + /* + * This is really belt and braces; we hold unintended secondary + * CPUs in the holding pen until we're ready for them. However, + * since we haven't sent them a soft interrupt, they shouldn't + * be there. + */ + write_pen_release(cpu); + + /* + * Send the secondary CPU a soft interrupt, thereby causing + * the boot monitor to read the system wide flags register, + * and branch to the address found there. + */ + smp_cross_call(cpumask_of(cpu), 1); + + timeout = jiffies + (1 * HZ); + while (time_before(jiffies, timeout)) { + smp_rmb(); + if (pen_release == -1) + break; + + udelay(10); + } + + /* + * now the secondary core is starting up let it run its + * calibrations, then wait for it to finish + */ + spin_unlock(&boot_lock); + + return pen_release != -1 ? -ENOSYS : 0; +} diff --git a/arch/arm/tools/mach-types b/arch/arm/tools/mach-types index 9d6feaa..7ca41f0 100644 --- a/arch/arm/tools/mach-types +++ b/arch/arm/tools/mach-types @@ -12,2745 +12,458 @@ # # http://www.arm.linux.org.uk/developer/machines/?action=new # -# Last update: Mon Feb 7 08:59:27 2011 +# XXX: This is a cut-down version of the file; it contains only machines that +# XXX: are in mainline or have been submitted to the machine database within +# XXX: the last 12 months. If your entry is missing please email rmk at +# XXX: <linux@arm.linux.org.uk> +# +# Last update: Sun Mar 20 18:06:11 2011 # # machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number # ebsa110 ARCH_EBSA110 EBSA110 0 riscpc ARCH_RPC RISCPC 1 -nexuspci ARCH_NEXUSPCI NEXUSPCI 3 ebsa285 ARCH_EBSA285 EBSA285 4 netwinder ARCH_NETWINDER NETWINDER 5 cats ARCH_CATS CATS 6 -tbox ARCH_TBOX TBOX 7 -co285 ARCH_CO285 CO285 8 -clps7110 ARCH_CLPS7110 CLPS7110 9 -archimedes ARCH_ARC ARCHIMEDES 10 -a5k ARCH_A5K A5K 11 -etoile ARCH_ETOILE ETOILE 12 -lacie_nas ARCH_LACIE_NAS LACIE_NAS 13 -clps7500 ARCH_CLPS7500 CLPS7500 14 shark ARCH_SHARK SHARK 15 brutus SA1100_BRUTUS BRUTUS 16 personal_server ARCH_PERSONAL_SERVER PERSONAL_SERVER 17 -itsy SA1100_ITSY ITSY 18 l7200 ARCH_L7200 L7200 19 pleb SA1100_PLEB PLEB 20 integrator ARCH_INTEGRATOR INTEGRATOR 21 h3600 SA1100_H3600 H3600 22 -ixp1200 ARCH_IXP1200 IXP1200 23 p720t ARCH_P720T P720T 24 assabet SA1100_ASSABET ASSABET 25 -victor SA1100_VICTOR VICTOR 26 lart SA1100_LART LART 27 -ranger SA1100_RANGER RANGER 28 graphicsclient SA1100_GRAPHICSCLIENT GRAPHICSCLIENT 29 xp860 SA1100_XP860 XP860 30 cerf SA1100_CERF CERF 31 nanoengine SA1100_NANOENGINE NANOENGINE 32 -fpic SA1100_FPIC FPIC 33 -extenex1 SA1100_EXTENEX1 EXTENEX1 34 -sherman SA1100_SHERMAN SHERMAN 35 -accelent_sa SA1100_ACCELENT ACCELENT_SA 36 -accelent_l7200 ARCH_L7200_ACCELENT ACCELENT_L7200 37 -netport SA1100_NETPORT NETPORT 38 -pangolin SA1100_PANGOLIN PANGOLIN 39 -yopy SA1100_YOPY YOPY 40 -coolidge SA1100_COOLIDGE COOLIDGE 41 -huw_webpanel SA1100_HUW_WEBPANEL HUW_WEBPANEL 42 -spotme ARCH_SPOTME SPOTME 43 -freebird ARCH_FREEBIRD FREEBIRD 44 -ti925 ARCH_TI925 TI925 45 -riscstation ARCH_RISCSTATION RISCSTATION 46 -cavy SA1100_CAVY CAVY 47 jornada720 SA1100_JORNADA720 JORNADA720 48 -omnimeter SA1100_OMNIMETER OMNIMETER 49 edb7211 ARCH_EDB7211 EDB7211 50 -citygo SA1100_CITYGO CITYGO 51 pfs168 SA1100_PFS168 PFS168 52 -spot SA1100_SPOT SPOT 53 flexanet SA1100_FLEXANET FLEXANET 54 -webpal ARCH_WEBPAL WEBPAL 55 -linpda SA1100_LINPDA LINPDA 56 -anakin ARCH_ANAKIN ANAKIN 57 -mvi SA1100_MVI MVI 58 -jupiter SA1100_JUPITER JUPITER 59 -psionw ARCH_PSIONW PSIONW 60 -aln SA1100_ALN ALN 61 -epxa ARCH_CAMELOT CAMELOT 62 -gds2200 SA1100_GDS2200 GDS2200 63 -netbook SA1100_PSION_SERIES7 PSION_SERIES7 64 -xfile SA1100_XFILE XFILE 65 -accelent_ep9312 ARCH_ACCELENT_EP9312 ACCELENT_EP9312 66 -ic200 ARCH_IC200 IC200 67 -creditlart SA1100_CREDITLART CREDITLART 68 -htm SA1100_HTM HTM 69 -iq80310 ARCH_IQ80310 IQ80310 70 -freebot SA1100_FREEBOT FREEBOT 71 -entel ARCH_ENTEL ENTEL 72 -enp3510 ARCH_ENP3510 ENP3510 73 -trizeps SA1100_TRIZEPS TRIZEPS 74 -nesa SA1100_NESA NESA 75 -venus ARCH_VENUS VENUS 76 -tardis ARCH_TARDIS TARDIS 77 -mercury ARCH_MERCURY MERCURY 78 -empeg SA1100_EMPEG EMPEG 79 -adi_evb ARCH_I80200FCC I80200FCC 80 -itt_cpb SA1100_ITT_CPB ITT_CPB 81 -svc SA1100_SVC SVC 82 -alpha2 SA1100_ALPHA2 ALPHA2 84 -alpha1 SA1100_ALPHA1 ALPHA1 85 -netarm ARCH_NETARM NETARM 86 simpad SA1100_SIMPAD SIMPAD 87 -pda1 ARCH_PDA1 PDA1 88 lubbock ARCH_LUBBOCK LUBBOCK 89 -aniko ARCH_ANIKO ANIKO 90 clep7212 ARCH_CLEP7212 CLEP7212 91 -cs89712 ARCH_CS89712 CS89712 92 -weararm SA1100_WEARARM WEARARM 93 -possio_px SA1100_POSSIO_PX POSSIO_PX 94 -sidearm SA1100_SIDEARM SIDEARM 95 -stork SA1100_STORK STORK 96 shannon SA1100_SHANNON SHANNON 97 -ace ARCH_ACE ACE 98 -ballyarm SA1100_BALLYARM BALLYARM 99 -simputer SA1100_SIMPUTER SIMPUTER 100 -nexterm SA1100_NEXTERM NEXTERM 101 -sa1100_elf SA1100_SA1100_ELF SA1100_ELF 102 -gator SA1100_GATOR GATOR 103 -granite ARCH_GRANITE GRANITE 104 consus SA1100_CONSUS CONSUS 105 aaed2000 ARCH_AAED2000 AAED2000 106 cdb89712 ARCH_CDB89712 CDB89712 107 graphicsmaster SA1100_GRAPHICSMASTER GRAPHICSMASTER 108 adsbitsy SA1100_ADSBITSY ADSBITSY 109 pxa_idp ARCH_PXA_IDP PXA_IDP 110 -plce ARCH_PLCE PLCE 111 pt_system3 SA1100_PT_SYSTEM3 PT_SYSTEM3 112 -murphy ARCH_MEDALB MEDALB 113 -eagle ARCH_EAGLE EAGLE 114 -dsc21 ARCH_DSC21 DSC21 115 -dsc24 ARCH_DSC24 DSC24 116 -ti5472 ARCH_TI5472 TI5472 117 autcpu12 ARCH_AUTCPU12 AUTCPU12 118 -uengine ARCH_UENGINE UENGINE 119 -bluestem SA1100_BLUESTEM BLUESTEM 120 -xingu8 ARCH_XINGU8 XINGU8 121 -bushstb ARCH_BUSHSTB BUSHSTB 122 -epsilon1 SA1100_EPSILON1 EPSILON1 123 -balloon SA1100_BALLOON BALLOON 124 -puppy ARCH_PUPPY PUPPY 125 -elroy SA1100_ELROY ELROY 126 -gms720 ARCH_GMS720 GMS720 127 -s24x ARCH_S24X S24X 128 -jtel_clep7312 ARCH_JTEL_CLEP7312 JTEL_CLEP7312 129 -cx821xx ARCH_CX821XX CX821XX 130 -edb7312 ARCH_EDB7312 EDB7312 131 -bsa1110 SA1100_BSA1110 BSA1110 132 -powerpin ARCH_POWERPIN POWERPIN 133 -openarm ARCH_OPENARM OPENARM 134 -whitechapel SA1100_WHITECHAPEL WHITECHAPEL 135 h3100 SA1100_H3100 H3100 136 -h3800 SA1100_H3800 H3800 137 -blue_v1 ARCH_BLUE_V1 BLUE_V1 138 -pxa_cerf ARCH_PXA_CERF PXA_CERF 139 -arm7tevb ARCH_ARM7TEVB ARM7TEVB 140 -d7400 SA1100_D7400 D7400 141 -piranha ARCH_PIRANHA PIRANHA 142 -sbcamelot SA1100_SBCAMELOT SBCAMELOT 143 -kings SA1100_KINGS KINGS 144 -smdk2400 ARCH_SMDK2400 SMDK2400 145 collie SA1100_COLLIE COLLIE 146 -idr ARCH_IDR IDR 147 badge4 SA1100_BADGE4 BADGE4 148 -webnet ARCH_WEBNET WEBNET 149 -d7300 SA1100_D7300 D7300 150 -cep SA1100_CEP CEP 151 fortunet ARCH_FORTUNET FORTUNET 152 -vc547x ARCH_VC547X VC547X 153 -filewalker SA1100_FILEWALKER FILEWALKER 154 -netgateway SA1100_NETGATEWAY NETGATEWAY 155 -symbol2800 SA1100_SYMBOL2800 SYMBOL2800 156 -suns SA1100_SUNS SUNS 157 -frodo SA1100_FRODO FRODO 158 -ms301 SA1100_MACH_TYTE_MS301 MACH_TYTE_MS301 159 mx1ads ARCH_MX1ADS MX1ADS 160 h7201 ARCH_H7201 H7201 161 h7202 ARCH_H7202 H7202 162 -amico ARCH_AMICO AMICO 163 -iam SA1100_IAM IAM 164 -tt530 SA1100_TT530 TT530 165 -sam2400 ARCH_SAM2400 SAM2400 166 -jornada56x SA1100_JORNADA56X JORNADA56X 167 -active SA1100_ACTIVE ACTIVE 168 iq80321 ARCH_IQ80321 IQ80321 169 -wid SA1100_WID WID 170 -sabinal ARCH_SABINAL SABINAL 171 -ixp425_matacumbe ARCH_IXP425_MATACUMBE IXP425_MATACUMBE 172 -miniprint SA1100_MINIPRINT MINIPRINT 173 -adm510x ARCH_ADM510X ADM510X 174 -svs200 SA1100_SVS200 SVS200 175 -atg_tcu ARCH_ATG_TCU ATG_TCU 176 -jornada820 SA1100_JORNADA820 JORNADA820 177 -s3c44b0 ARCH_S3C44B0 S3C44B0 178 -margis2 ARCH_MARGIS2 MARGIS2 179 ks8695 ARCH_KS8695 KS8695 180 -brh ARCH_BRH BRH 181 -s3c2410 ARCH_S3C2410 S3C2410 182 -possio_px30 ARCH_POSSIO_PX30 POSSIO_PX30 183 -s3c2800 ARCH_S3C2800 S3C2800 184 -fleetwood SA1100_FLEETWOOD FLEETWOOD 185 -omaha ARCH_OMAHA OMAHA 186 -ta7 ARCH_TA7 TA7 187 -nova SA1100_NOVA NOVA 188 -hmk ARCH_HMK HMK 189 -karo ARCH_KARO KARO 190 -fester SA1100_FESTER FESTER 191 -gpi ARCH_GPI GPI 192 smdk2410 ARCH_SMDK2410 SMDK2410 193 -i519 ARCH_I519 I519 194 -nexio SA1100_NEXIO NEXIO 195 -bitbox SA1100_BITBOX BITBOX 196 -g200 SA1100_G200 G200 197 -gill SA1100_GILL GILL 198 -pxa_mercury ARCH_PXA_MERCURY PXA_MERCURY 199 ceiva ARCH_CEIVA CEIVA 200 -fret SA1100_FRET FRET 201 -emailphone SA1100_EMAILPHONE EMAILPHONE 202 -h3900 ARCH_H3900 H3900 203 -pxa1 ARCH_PXA1 PXA1 204 -koan369 SA1100_KOAN369 KOAN369 205 -cogent ARCH_COGENT COGENT 206 -esl_simputer ARCH_ESL_SIMPUTER ESL_SIMPUTER 207 -esl_simputer_clr ARCH_ESL_SIMPUTER_CLR ESL_SIMPUTER_CLR 208 -esl_simputer_bw ARCH_ESL_SIMPUTER_BW ESL_SIMPUTER_BW 209 -hhp_cradle ARCH_HHP_CRADLE HHP_CRADLE 210 -he500 ARCH_HE500 HE500 211 -inhandelf2 SA1100_INHANDELF2 INHANDELF2 212 -inhandftip SA1100_INHANDFTIP INHANDFTIP 213 -dnp1110 SA1100_DNP1110 DNP1110 214 -pnp1110 SA1100_PNP1110 PNP1110 215 -csb226 ARCH_CSB226 CSB226 216 -arnold SA1100_ARNOLD ARNOLD 217 voiceblue MACH_VOICEBLUE VOICEBLUE 218 -jz8028 ARCH_JZ8028 JZ8028 219 h5400 ARCH_H5400 H5400 220 -forte SA1100_FORTE FORTE 221 -acam SA1100_ACAM ACAM 222 -abox SA1100_ABOX ABOX 223 -atmel ARCH_ATMEL ATMEL 224 -sitsang ARCH_SITSANG SITSANG 225 -cpu1110lcdnet SA1100_CPU1110LCDNET CPU1110LCDNET 226 -mpl_vcma9 ARCH_MPL_VCMA9 MPL_VCMA9 227 -opus_a1 ARCH_OPUS_A1 OPUS_A1 228 -daytona ARCH_DAYTONA DAYTONA 229 -killbear SA1100_KILLBEAR KILLBEAR 230 -yoho ARCH_YOHO YOHO 231 -jasper ARCH_JASPER JASPER 232 -dsc25 ARCH_DSC25 DSC25 233 omap_innovator MACH_OMAP_INNOVATOR OMAP_INNOVATOR 234 -mnci ARCH_RAMSES RAMSES 235 -s28x ARCH_S28X S28X 236 -mport3 ARCH_MPORT3 MPORT3 237 -pxa_eagle250 ARCH_PXA_EAGLE250 PXA_EAGLE250 238 -pdb ARCH_PDB PDB 239 -blue_2g SA1100_BLUE_2G BLUE_2G 240 -bluearch SA1100_BLUEARCH BLUEARCH 241 ixdp2400 ARCH_IXDP2400 IXDP2400 242 ixdp2800 ARCH_IXDP2800 IXDP2800 243 -explorer SA1100_EXPLORER EXPLORER 244 ixdp425 ARCH_IXDP425 IXDP425 245 -chimp ARCH_CHIMP CHIMP 246 -stork_nest ARCH_STORK_NEST STORK_NEST 247 -stork_egg ARCH_STORK_EGG STORK_EGG 248 -wismo SA1100_WISMO WISMO 249 -ezlinx ARCH_EZLINX EZLINX 250 -at91rm9200 ARCH_AT91RM9200 AT91RM9200 251 -adtech_orion ARCH_ADTECH_ORION ADTECH_ORION 252 -neptune ARCH_NEPTUNE NEPTUNE 253 hackkit SA1100_HACKKIT HACKKIT 254 -pxa_wins30 ARCH_PXA_WINS30 PXA_WINS30 255 -lavinna SA1100_LAVINNA LAVINNA 256 -pxa_uengine ARCH_PXA_UENGINE PXA_UENGINE 257 -innokom ARCH_INNOKOM INNOKOM 258 -bms ARCH_BMS BMS 259 ixcdp1100 ARCH_IXCDP1100 IXCDP1100 260 -prpmc1100 ARCH_PRPMC1100 PRPMC1100 261 at91rm9200dk ARCH_AT91RM9200DK AT91RM9200DK 262 -armstick ARCH_ARMSTICK ARMSTICK 263 -armonie ARCH_ARMONIE ARMONIE 264 -mport1 ARCH_MPORT1 MPORT1 265 -s3c5410 ARCH_S3C5410 S3C5410 266 -zcp320a ARCH_ZCP320A ZCP320A 267 -i_box ARCH_I_BOX I_BOX 268 -stlc1502 ARCH_STLC1502 STLC1502 269 -siren ARCH_SIREN SIREN 270 -greenlake ARCH_GREENLAKE GREENLAKE 271 -argus ARCH_ARGUS ARGUS 272 -combadge SA1100_COMBADGE COMBADGE 273 -rokepxa ARCH_ROKEPXA ROKEPXA 274 cintegrator ARCH_CINTEGRATOR CINTEGRATOR 275 -guidea07 ARCH_GUIDEA07 GUIDEA07 276 -tat257 ARCH_TAT257 TAT257 277 -igp2425 ARCH_IGP2425 IGP2425 278 -bluegrama ARCH_BLUEGRAMMA BLUEGRAMMA 279 -ipod ARCH_IPOD IPOD 280 -adsbitsyx ARCH_ADSBITSYX ADSBITSYX 281 -trizeps2 ARCH_TRIZEPS2 TRIZEPS2 282 viper ARCH_VIPER VIPER 283 -adsbitsyplus SA1100_ADSBITSYPLUS ADSBITSYPLUS 284 -adsagc SA1100_ADSAGC ADSAGC 285 -stp7312 ARCH_STP7312 STP7312 286 -nx_phnx MACH_NX_PHNX NX_PHNX 287 -wep_ep250 ARCH_WEP_EP250 WEP_EP250 288 -inhandelf3 ARCH_INHANDELF3 INHANDELF3 289 adi_coyote ARCH_ADI_COYOTE ADI_COYOTE 290 -iyonix ARCH_IYONIX IYONIX 291 -damicam1 ARCH_DAMICAM_SA1110 DAMICAM_SA1110 292 -meg03 ARCH_MEG03 MEG03 293 -pxa_whitechapel ARCH_PXA_WHITECHAPEL PXA_WHITECHAPEL 294 -nwsc ARCH_NWSC NWSC 295 -nwlarm ARCH_NWLARM NWLARM 296 -ixp425_mguard ARCH_IXP425_MGUARD IXP425_MGUARD 297 -pxa_netdcu4 ARCH_PXA_NETDCU4 PXA_NETDCU4 298 ixdp2401 ARCH_IXDP2401 IXDP2401 299 ixdp2801 ARCH_IXDP2801 IXDP2801 300 -zodiac ARCH_ZODIAC ZODIAC 301 -armmodul ARCH_ARMMODUL ARMMODUL 302 -ketop SA1100_KETOP KETOP 303 -av7200 ARCH_AV7200 AV7200 304 -arch_ti925 ARCH_ARCH_TI925 ARCH_TI925 305 -acq200 ARCH_ACQ200 ACQ200 306 -pt_dafit SA1100_PT_DAFIT PT_DAFIT 307 -ihba ARCH_IHBA IHBA 308 -quinque ARCH_QUINQUE QUINQUE 309 -nimbraone ARCH_NIMBRAONE NIMBRAONE 310 -nimbra29x ARCH_NIMBRA29X NIMBRA29X 311 -nimbra210 ARCH_NIMBRA210 NIMBRA210 312 -hhp_d95xx ARCH_HHP_D95XX HHP_D95XX 313 -labarm ARCH_LABARM LABARM 314 -m825xx ARCH_M825XX M825XX 315 -m7100 SA1100_M7100 M7100 316 -nipc2 ARCH_NIPC2 NIPC2 317 -fu7202 ARCH_FU7202 FU7202 318 -adsagx ARCH_ADSAGX ADSAGX 319 -pxa_pooh ARCH_PXA_POOH PXA_POOH 320 -bandon ARCH_BANDON BANDON 321 -pcm7210 ARCH_PCM7210 PCM7210 322 -nms9200 ARCH_NMS9200 NMS9200 323 -logodl ARCH_LOGODL LOGODL 324 -m7140 SA1100_M7140 M7140 325 -korebot ARCH_KOREBOT KOREBOT 326 iq31244 ARCH_IQ31244 IQ31244 327 -koan393 SA1100_KOAN393 KOAN393 328 -inhandftip3 ARCH_INHANDFTIP3 INHANDFTIP3 329 -gonzo ARCH_GONZO GONZO 330 bast ARCH_BAST BAST 331 -scanpass ARCH_SCANPASS SCANPASS 332 -ep7312_pooh ARCH_EP7312_POOH EP7312_POOH 333 -ta7s ARCH_TA7S TA7S 334 -ta7v ARCH_TA7V TA7V 335 -icarus SA1100_ICARUS ICARUS 336 -h1900 ARCH_H1900 H1900 337 -gemini SA1100_GEMINI GEMINI 338 -axim ARCH_AXIM AXIM 339 -audiotron ARCH_AUDIOTRON AUDIOTRON 340 -h2200 ARCH_H2200 H2200 341 -loox600 ARCH_LOOX600 LOOX600 342 -niop ARCH_NIOP NIOP 343 -dm310 ARCH_DM310 DM310 344 -seedpxa_c2 ARCH_SEEDPXA_C2 SEEDPXA_C2 345 -ixp4xx_mguardpci ARCH_IXP4XX_MGUARD_PCI IXP4XX_MGUARD_PCI 346 h1940 ARCH_H1940 H1940 347 -scorpio ARCH_SCORPIO SCORPIO 348 -viva ARCH_VIVA VIVA 349 -pxa_xcard ARCH_PXA_XCARD PXA_XCARD 350 -csb335 ARCH_CSB335 CSB335 351 -ixrd425 ARCH_IXRD425 IXRD425 352 -iq80315 ARCH_IQ80315 IQ80315 353 -nmp7312 ARCH_NMP7312 NMP7312 354 -cx861xx ARCH_CX861XX CX861XX 355 enp2611 ARCH_ENP2611 ENP2611 356 -xda SA1100_XDA XDA 357 -csir_ims ARCH_CSIR_IMS CSIR_IMS 358 -ixp421_dnaeeth ARCH_IXP421_DNAEETH IXP421_DNAEETH 359 -pocketserv9200 ARCH_POCKETSERV9200 POCKETSERV9200 360 -toto ARCH_TOTO TOTO 361 s3c2440 ARCH_S3C2440 S3C2440 362 -ks8695p ARCH_KS8695P KS8695P 363 -se4000 ARCH_SE4000 SE4000 364 -quadriceps ARCH_QUADRICEPS QUADRICEPS 365 -bronco ARCH_BRONCO BRONCO 366 -esl_wireless_tab ARCH_ESL_WIRELESS_TAB ESL_WIRELESS_TAB 367 -esl_sofcomp ARCH_ESL_SOFCOMP ESL_SOFCOMP 368 -s5c7375 ARCH_S5C7375 S5C7375 369 -spearhead ARCH_SPEARHEAD SPEARHEAD 370 -pantera ARCH_PANTERA PANTERA 371 -prayoglite ARCH_PRAYOGLITE PRAYOGLITE 372 gumstix ARCH_GUMSTIX GUMSTIX 373 -rcube ARCH_RCUBE RCUBE 374 -rea_olv ARCH_REA_OLV REA_OLV 375 -pxa_iphone ARCH_PXA_IPHONE PXA_IPHONE 376 -s3c3410 ARCH_S3C3410 S3C3410 377 -espd_4510b ARCH_ESPD_4510B ESPD_4510B 378 -mp1x ARCH_MP1X MP1X 379 -at91rm9200tb ARCH_AT91RM9200TB AT91RM9200TB 380 -adsvgx ARCH_ADSVGX ADSVGX 381 omap_h2 MACH_OMAP_H2 OMAP_H2 382 -pelee ARCH_PELEE PELEE 383 e740 MACH_E740 E740 384 iq80331 ARCH_IQ80331 IQ80331 385 versatile_pb ARCH_VERSATILE_PB VERSATILE_PB 387 kev7a400 MACH_KEV7A400 KEV7A400 388 lpd7a400 MACH_LPD7A400 LPD7A400 389 lpd7a404 MACH_LPD7A404 LPD7A404 390 -fujitsu_camelot ARCH_FUJITSU_CAMELOT FUJITSU_CAMELOT 391 -janus2m ARCH_JANUS2M JANUS2M 392 -embtf MACH_EMBTF EMBTF 393 -hpm MACH_HPM HPM 394 -smdk2410tk MACH_SMDK2410TK SMDK2410TK 395 -smdk2410aj MACH_SMDK2410AJ SMDK2410AJ 396 -streetracer MACH_STREETRACER STREETRACER 397 -eframe MACH_EFRAME EFRAME 398 csb337 MACH_CSB337 CSB337 399 -pxa_lark MACH_PXA_LARK PXA_LARK 400 -pxa_pnp2110 MACH_PNP2110 PNP2110 401 -tcc72x MACH_TCC72X TCC72X 402 -altair MACH_ALTAIR ALTAIR 403 -kc3 MACH_KC3 KC3 404 -sinteftd MACH_SINTEFTD SINTEFTD 405 mainstone MACH_MAINSTONE MAINSTONE 406 -aday4x MACH_ADAY4X ADAY4X 407 -lite300 MACH_LITE300 LITE300 408 -s5c7376 MACH_S5C7376 S5C7376 409 -mt02 MACH_MT02 MT02 410 -mport3s MACH_MPORT3S MPORT3S 411 -ra_alpha MACH_RA_ALPHA RA_ALPHA 412 xcep MACH_XCEP XCEP 413 arcom_vulcan MACH_ARCOM_VULCAN ARCOM_VULCAN 414 -stargate MACH_STARGATE STARGATE 415 -armadilloj MACH_ARMADILLOJ ARMADILLOJ 416 -elroy_jack MACH_ELROY_JACK ELROY_JACK 417 -backend MACH_BACKEND BACKEND 418 -s5linbox MACH_S5LINBOX S5LINBOX 419 nomadik MACH_NOMADIK NOMADIK 420 -ia_cpu_9200 MACH_IA_CPU_9200 IA_CPU_9200 421 -at91_bja1 MACH_AT91_BJA1 AT91_BJA1 422 corgi MACH_CORGI CORGI 423 poodle MACH_POODLE POODLE 424 -ten MACH_TEN TEN 425 -roverp5p MACH_ROVERP5P ROVERP5P 426 -sc2700 MACH_SC2700 SC2700 427 -ex_eagle MACH_EX_EAGLE EX_EAGLE 428 -nx_pxa12 MACH_NX_PXA12 NX_PXA12 429 -nx_pxa5 MACH_NX_PXA5 NX_PXA5 430 -blackboard2 MACH_BLACKBOARD2 BLACKBOARD2 431 -i819 MACH_I819 I819 432 -ixmb995e MACH_IXMB995E IXMB995E 433 -skyrider MACH_SKYRIDER SKYRIDER 434 -skyhawk MACH_SKYHAWK SKYHAWK 435 -enterprise MACH_ENTERPRISE ENTERPRISE 436 -dep2410 MACH_DEP2410 DEP2410 437 armcore MACH_ARMCORE ARMCORE 438 -hobbit MACH_HOBBIT HOBBIT 439 -h7210 MACH_H7210 H7210 440 -pxa_netdcu5 MACH_PXA_NETDCU5 PXA_NETDCU5 441 -acc MACH_ACC ACC 442 -esl_sarva MACH_ESL_SARVA ESL_SARVA 443 -xm250 MACH_XM250 XM250 444 -t6tc1xb MACH_T6TC1XB T6TC1XB 445 -ess710 MACH_ESS710 ESS710 446 mx31ads MACH_MX31ADS MX31ADS 447 himalaya MACH_HIMALAYA HIMALAYA 448 -bolfenk MACH_BOLFENK BOLFENK 449 -at91rm9200kr MACH_AT91RM9200KR AT91RM9200KR 450 edb9312 MACH_EDB9312 EDB9312 451 omap_generic MACH_OMAP_GENERIC OMAP_GENERIC 452 -aximx3 MACH_AXIMX3 AXIMX3 453 -eb67xdip MACH_EB67XDIP EB67XDIP 454 -webtxs MACH_WEBTXS WEBTXS 455 -hawk MACH_HAWK HAWK 456 -ccat91sbc001 MACH_CCAT91SBC001 CCAT91SBC001 457 -expresso MACH_EXPRESSO EXPRESSO 458 -h4000 MACH_H4000 H4000 459 -dino MACH_DINO DINO 460 -ml675k MACH_ML675K ML675K 461 edb9301 MACH_EDB9301 EDB9301 462 edb9315 MACH_EDB9315 EDB9315 463 -reciva_tt MACH_RECIVA_TT RECIVA_TT 464 -cstcb01 MACH_CSTCB01 CSTCB01 465 -cstcb1 MACH_CSTCB1 CSTCB1 466 -shadwell MACH_SHADWELL SHADWELL 467 -goepel263 MACH_GOEPEL263 GOEPEL263 468 -acq100 MACH_ACQ100 ACQ100 469 -mx1fs2 MACH_MX1FS2 MX1FS2 470 -hiptop_g1 MACH_HIPTOP_G1 HIPTOP_G1 471 -sparky MACH_SPARKY SPARKY 472 -ns9750 MACH_NS9750 NS9750 473 -phoenix MACH_PHOENIX PHOENIX 474 vr1000 MACH_VR1000 VR1000 475 -deisterpxa MACH_DEISTERPXA DEISTERPXA 476 -bcm1160 MACH_BCM1160 BCM1160 477 -pcm022 MACH_PCM022 PCM022 478 -adsgcx MACH_ADSGCX ADSGCX 479 -dreadnaught MACH_DREADNAUGHT DREADNAUGHT 480 -dm320 MACH_DM320 DM320 481 -markov MACH_MARKOV MARKOV 482 -cos7a400 MACH_COS7A400 COS7A400 483 -milano MACH_MILANO MILANO 484 -ue9328 MACH_UE9328 UE9328 485 -uex255 MACH_UEX255 UEX255 486 -ue2410 MACH_UE2410 UE2410 487 -a620 MACH_A620 A620 488 -ocelot MACH_OCELOT OCELOT 489 -cheetah MACH_CHEETAH CHEETAH 490 omap_perseus2 MACH_OMAP_PERSEUS2 OMAP_PERSEUS2 491 -zvue MACH_ZVUE ZVUE 492 -roverp1 MACH_ROVERP1 ROVERP1 493 -asidial2 MACH_ASIDIAL2 ASIDIAL2 494 -s3c24a0 MACH_S3C24A0 S3C24A0 495 e800 MACH_E800 E800 496 e750 MACH_E750 E750 497 -s3c5500 MACH_S3C5500 S3C5500 498 -smdk5500 MACH_SMDK5500 SMDK5500 499 -signalsync MACH_SIGNALSYNC SIGNALSYNC 500 -nbc MACH_NBC NBC 501 -kodiak MACH_KODIAK KODIAK 502 -netbookpro MACH_NETBOOKPRO NETBOOKPRO 503 -hw90200 MACH_HW90200 HW90200 504 -condor MACH_CONDOR CONDOR 505 -cup MACH_CUP CUP 506 -kite MACH_KITE KITE 507 scb9328 MACH_SCB9328 SCB9328 508 omap_h3 MACH_OMAP_H3 OMAP_H3 509 omap_h4 MACH_OMAP_H4 OMAP_H4 510 -n10 MACH_N10 N10 511 -montejade MACH_MONTAJADE MONTAJADE 512 -sg560 MACH_SG560 SG560 513 -dp1000 MACH_DP1000 DP1000 514 omap_osk MACH_OMAP_OSK OMAP_OSK 515 -rg100v3 MACH_RG100V3 RG100V3 516 -mx2ads MACH_MX2ADS MX2ADS 517 -pxa_kilo MACH_PXA_KILO PXA_KILO 518 -ixp4xx_eagle MACH_IXP4XX_EAGLE IXP4XX_EAGLE 519 tosa MACH_TOSA TOSA 520 -mb2520f MACH_MB2520F MB2520F 521 -emc1000 MACH_EMC1000 EMC1000 522 -tidsc25 MACH_TIDSC25 TIDSC25 523 -akcpmxl MACH_AKCPMXL AKCPMXL 524 -av3xx MACH_AV3XX AV3XX 525 avila MACH_AVILA AVILA 526 -pxa_mpm10 MACH_PXA_MPM10 PXA_MPM10 527 -pxa_kyanite MACH_PXA_KYANITE PXA_KYANITE 528 -sgold MACH_SGOLD SGOLD 529 -oscar MACH_OSCAR OSCAR 530 -epxa4usb2 MACH_EPXA4USB2 EPXA4USB2 531 -xsengine MACH_XSENGINE XSENGINE 532 -ip600 MACH_IP600 IP600 533 -mcan2 MACH_MCAN2 MCAN2 534 -ddi_blueridge MACH_DDI_BLUERIDGE DDI_BLUERIDGE 535 -skyminder MACH_SKYMINDER SKYMINDER 536 -lpd79520 MACH_LPD79520 LPD79520 537 edb9302 MACH_EDB9302 EDB9302 538 -hw90340 MACH_HW90340 HW90340 539 -cip_box MACH_CIP_BOX CIP_BOX 540 -ivpn MACH_IVPN IVPN 541 -rsoc2 MACH_RSOC2 RSOC2 542 husky MACH_HUSKY HUSKY 543 -boxer MACH_BOXER BOXER 544 shepherd MACH_SHEPHERD SHEPHERD 545 -aml42800aa MACH_AML42800AA AML42800AA 546 -lpc2294 MACH_LPC2294 LPC2294 548 -switchgrass MACH_SWITCHGRASS SWITCHGRASS 549 -ens_cmu MACH_ENS_CMU ENS_CMU 550 -mm6_sdb MACH_MM6_SDB MM6_SDB 551 -saturn MACH_SATURN SATURN 552 -i30030evb MACH_I30030EVB I30030EVB 553 -mxc27530evb MACH_MXC27530EVB MXC27530EVB 554 -smdk2800 MACH_SMDK2800 SMDK2800 555 -mtwilson MACH_MTWILSON MTWILSON 556 -ziti MACH_ZITI ZITI 557 -grandfather MACH_GRANDFATHER GRANDFATHER 558 -tengine MACH_TENGINE TENGINE 559 -s3c2460 MACH_S3C2460 S3C2460 560 -pdm MACH_PDM PDM 561 h4700 MACH_H4700 H4700 562 -h6300 MACH_H6300 H6300 563 -rz1700 MACH_RZ1700 RZ1700 564 -a716 MACH_A716 A716 565 -estk2440a MACH_ESTK2440A ESTK2440A 566 -atwixp425 MACH_ATWIXP425 ATWIXP425 567 -csb336 MACH_CSB336 CSB336 568 -rirm2 MACH_RIRM2 RIRM2 569 -cx23518 MACH_CX23518 CX23518 570 -cx2351x MACH_CX2351X CX2351X 571 -computime MACH_COMPUTIME COMPUTIME 572 -izarus MACH_IZARUS IZARUS 573 -pxa_rts MACH_RTS RTS 574 -se5100 MACH_SE5100 SE5100 575 -s3c2510 MACH_S3C2510 S3C2510 576 -csb437tl MACH_CSB437TL CSB437TL 577 -slauson MACH_SLAUSON SLAUSON 578 -pearlriver MACH_PEARLRIVER PEARLRIVER 579 -tdc_p210 MACH_TDC_P210 TDC_P210 580 -sg580 MACH_SG580 SG580 581 -wrsbcarm7 MACH_WRSBCARM7 WRSBCARM7 582 -ipd MACH_IPD IPD 583 -pxa_dnp2110 MACH_PXA_DNP2110 PXA_DNP2110 584 -xaeniax MACH_XAENIAX XAENIAX 585 -somn4250 MACH_SOMN4250 SOMN4250 586 -pleb2 MACH_PLEB2 PLEB2 587 -cornwallis MACH_CORNWALLIS CORNWALLIS 588 -gurney_drv MACH_GURNEY_DRV GURNEY_DRV 589 -chaffee MACH_CHAFFEE CHAFFEE 590 -rms101 MACH_RMS101 RMS101 591 rx3715 MACH_RX3715 RX3715 592 -swift MACH_SWIFT SWIFT 593 -roverp7 MACH_ROVERP7 ROVERP7 594 -pr818s MACH_PR818S PR818S 595 -trxpro MACH_TRXPRO TRXPRO 596 nslu2 MACH_NSLU2 NSLU2 597 e400 MACH_E400 E400 598 -trab MACH_TRAB TRAB 599 -cmc_pu2 MACH_CMC_PU2 CMC_PU2 600 -fulcrum MACH_FULCRUM FULCRUM 601 -netgate42x MACH_NETGATE42X NETGATE42X 602 -str710 MACH_STR710 STR710 603 ixdpg425 MACH_IXDPG425 IXDPG425 604 -tomtomgo MACH_TOMTOMGO TOMTOMGO 605 versatile_ab MACH_VERSATILE_AB VERSATILE_AB 606 edb9307 MACH_EDB9307 EDB9307 607 -sg565 MACH_SG565 SG565 608 -lpd79524 MACH_LPD79524 LPD79524 609 -lpd79525 MACH_LPD79525 LPD79525 610 -rms100 MACH_RMS100 RMS100 611 kb9200 MACH_KB9200 KB9200 612 sx1 MACH_SX1 SX1 613 -hms39c7092 MACH_HMS39C7092 HMS39C7092 614 -armadillo MACH_ARMADILLO ARMADILLO 615 -ipcu MACH_IPCU IPCU 616 -loox720 MACH_LOOX720 LOOX720 617 ixdp465 MACH_IXDP465 IXDP465 618 ixdp2351 MACH_IXDP2351 IXDP2351 619 -adsvix MACH_ADSVIX ADSVIX 620 -dm270 MACH_DM270 DM270 621 -socltplus MACH_SOCLTPLUS SOCLTPLUS 622 -ecia MACH_ECIA ECIA 623 -cm4008 MACH_CM4008 CM4008 624 -p2001 MACH_P2001 P2001 625 -twister MACH_TWISTER TWISTER 626 -mudshark MACH_MUDSHARK MUDSHARK 627 -hb2 MACH_HB2 HB2 628 iq80332 MACH_IQ80332 IQ80332 629 -sendt MACH_SENDT SENDT 630 -mx2jazz MACH_MX2JAZZ MX2JAZZ 631 -multiio MACH_MULTIIO MULTIIO 632 -hrdisplay MACH_HRDISPLAY HRDISPLAY 633 -mxc27530ads MACH_MXC27530ADS MXC27530ADS 634 -trizeps3 MACH_TRIZEPS3 TRIZEPS3 635 -zefeerdza MACH_ZEFEERDZA ZEFEERDZA 636 -zefeerdzb MACH_ZEFEERDZB ZEFEERDZB 637 -zefeerdzg MACH_ZEFEERDZG ZEFEERDZG 638 -zefeerdzn MACH_ZEFEERDZN ZEFEERDZN 639 -zefeerdzq MACH_ZEFEERDZQ ZEFEERDZQ 640 gtwx5715 MACH_GTWX5715 GTWX5715 641 -astro_jack MACH_ASTRO_JACK ASTRO_JACK 643 -tip03 MACH_TIP03 TIP03 644 -a9200ec MACH_A9200EC A9200EC 645 -pnx0105 MACH_PNX0105 PNX0105 646 -adcpoecpu MACH_ADCPOECPU ADCPOECPU 647 csb637 MACH_CSB637 CSB637 648 -mb9200 MACH_MB9200 MB9200 650 -kulun MACH_KULUN KULUN 651 -snapper MACH_SNAPPER SNAPPER 652 -optima MACH_OPTIMA OPTIMA 653 -dlhsbc MACH_DLHSBC DLHSBC 654 -x30 MACH_X30 X30 655 n30 MACH_N30 N30 656 -manga_ks8695 MACH_MANGA_KS8695 MANGA_KS8695 657 -ajax MACH_AJAX AJAX 658 nec_mp900 MACH_NEC_MP900 NEC_MP900 659 -vvtk1000 MACH_VVTK1000 VVTK1000 661 kafa MACH_KAFA KAFA 662 -vvtk3000 MACH_VVTK3000 VVTK3000 663 -pimx1 MACH_PIMX1 PIMX1 664 -ollie MACH_OLLIE OLLIE 665 -skymax MACH_SKYMAX SKYMAX 666 -jazz MACH_JAZZ JAZZ 667 -tel_t3 MACH_TEL_T3 TEL_T3 668 -aisino_fcr255 MACH_AISINO_FCR255 AISINO_FCR255 669 -btweb MACH_BTWEB BTWEB 670 -dbg_lh79520 MACH_DBG_LH79520 DBG_LH79520 671 -cm41xx MACH_CM41XX CM41XX 672 ts72xx MACH_TS72XX TS72XX 673 -nggpxa MACH_NGGPXA NGGPXA 674 -csb535 MACH_CSB535 CSB535 675 -csb536 MACH_CSB536 CSB536 676 -pxa_trakpod MACH_PXA_TRAKPOD PXA_TRAKPOD 677 -praxis MACH_PRAXIS PRAXIS 678 -lh75411 MACH_LH75411 LH75411 679 otom MACH_OTOM OTOM 680 nexcoder_2440 MACH_NEXCODER_2440 NEXCODER_2440 681 -loox410 MACH_LOOX410 LOOX410 682 -westlake MACH_WESTLAKE WESTLAKE 683 -nsb MACH_NSB NSB 684 -esl_sarva_stn MACH_ESL_SARVA_STN ESL_SARVA_STN 685 -esl_sarva_tft MACH_ESL_SARVA_TFT ESL_SARVA_TFT 686 -esl_sarva_iad MACH_ESL_SARVA_IAD ESL_SARVA_IAD 687 -esl_sarva_acc MACH_ESL_SARVA_ACC ESL_SARVA_ACC 688 -typhoon MACH_TYPHOON TYPHOON 689 -cnav MACH_CNAV CNAV 690 -a730 MACH_A730 A730 691 -netstar MACH_NETSTAR NETSTAR 692 -supercon MACH_PHASEFALE_SUPERCON PHASEFALE_SUPERCON 693 -shiva1100 MACH_SHIVA1100 SHIVA1100 694 -etexsc MACH_ETEXSC ETEXSC 695 -ixdpg465 MACH_IXDPG465 IXDPG465 696 -a9m2410 MACH_A9M2410 A9M2410 697 -a9m2440 MACH_A9M2440 A9M2440 698 -a9m9750 MACH_A9M9750 A9M9750 699 -a9m9360 MACH_A9M9360 A9M9360 700 -unc90 MACH_UNC90 UNC90 701 eco920 MACH_ECO920 ECO920 702 -satview MACH_SATVIEW SATVIEW 703 roadrunner MACH_ROADRUNNER ROADRUNNER 704 at91rm9200ek MACH_AT91RM9200EK AT91RM9200EK 705 -gp32 MACH_GP32 GP32 706 -gem MACH_GEM GEM 707 -i858 MACH_I858 I858 708 -hx2750 MACH_HX2750 HX2750 709 -mxc91131evb MACH_MXC91131EVB MXC91131EVB 710 -p700 MACH_P700 P700 711 -cpe MACH_CPE CPE 712 spitz MACH_SPITZ SPITZ 713 -nimbra340 MACH_NIMBRA340 NIMBRA340 714 -lpc22xx MACH_LPC22XX LPC22XX 715 -omap_comet3 MACH_COMET3 COMET3 716 -omap_comet4 MACH_COMET4 COMET4 717 -csb625 MACH_CSB625 CSB625 718 -fortunet2 MACH_FORTUNET2 FORTUNET2 719 -s5h2200 MACH_S5H2200 S5H2200 720 -optorm920 MACH_OPTORM920 OPTORM920 721 -adsbitsyxb MACH_ADSBITSYXB ADSBITSYXB 722 adssphere MACH_ADSSPHERE ADSSPHERE 723 -adsportal MACH_ADSPORTAL ADSPORTAL 724 -ln2410sbc MACH_LN2410SBC LN2410SBC 725 -cb3rufc MACH_CB3RUFC CB3RUFC 726 -mp2usb MACH_MP2USB MP2USB 727 -ntnp425c MACH_NTNP425C NTNP425C 728 colibri MACH_COLIBRI COLIBRI 729 -pcm7220 MACH_PCM7220 PCM7220 730 gateway7001 MACH_GATEWAY7001 GATEWAY7001 731 pcm027 MACH_PCM027 PCM027 732 -cmpxa MACH_CMPXA CMPXA 733 anubis MACH_ANUBIS ANUBIS 734 -ite8152 MACH_ITE8152 ITE8152 735 -lpc3xxx MACH_LPC3XXX LPC3XXX 736 -puppeteer MACH_PUPPETEER PUPPETEER 737 -e570 MACH_E570 E570 739 -x50 MACH_X50 X50 740 -recon MACH_RECON RECON 741 -xboardgp8 MACH_XBOARDGP8 XBOARDGP8 742 -fpic2 MACH_FPIC2 FPIC2 743 akita MACH_AKITA AKITA 744 -a81 MACH_A81 A81 745 -svm_sc25x MACH_SVM_SC25X SVM_SC25X 746 -vt020 MACH_VADATECH020 VADATECH020 747 -tli MACH_TLI TLI 748 -edb9315lc MACH_EDB9315LC EDB9315LC 749 -passec MACH_PASSEC PASSEC 750 -ds_tiger MACH_DS_TIGER DS_TIGER 751 -e310 MACH_E310 E310 752 e330 MACH_E330 E330 753 -rt3000 MACH_RT3000 RT3000 754 nokia770 MACH_NOKIA770 NOKIA770 755 -pnx0106 MACH_PNX0106 PNX0106 756 -hx21xx MACH_HX21XX HX21XX 757 -faraday MACH_FARADAY FARADAY 758 -sbc9312 MACH_SBC9312 SBC9312 759 -batman MACH_BATMAN BATMAN 760 -jpd201 MACH_JPD201 JPD201 761 -mipsa MACH_MIPSA MIPSA 762 -kacom MACH_KACOM KACOM 763 -swarcocpu MACH_SWARCOCPU SWARCOCPU 764 -swarcodsl MACH_SWARCODSL SWARCODSL 765 -blueangel MACH_BLUEANGEL BLUEANGEL 766 -hairygrama MACH_HAIRYGRAMA HAIRYGRAMA 767 -banff MACH_BANFF BANFF 768 carmeva MACH_CARMEVA CARMEVA 769 -sam255 MACH_SAM255 SAM255 770 -ppm10 MACH_PPM10 PPM10 771 edb9315a MACH_EDB9315A EDB9315A 772 -sunset MACH_SUNSET SUNSET 773 stargate2 MACH_STARGATE2 STARGATE2 774 intelmote2 MACH_INTELMOTE2 INTELMOTE2 775 trizeps4 MACH_TRIZEPS4 TRIZEPS4 776 -mainstone2 MACH_MAINSTONE2 MAINSTONE2 777 -ez_ixp42x MACH_EZ_IXP42X EZ_IXP42X 778 -tapwave_zodiac MACH_TAPWAVE_ZODIAC TAPWAVE_ZODIAC 779 -universalmeter MACH_UNIVERSALMETER UNIVERSALMETER 780 -hicoarm9 MACH_HICOARM9 HICOARM9 781 pnx4008 MACH_PNX4008 PNX4008 782 -kws6000 MACH_KWS6000 KWS6000 783 -portux920t MACH_PORTUX920T PORTUX920T 784 -ez_x5 MACH_EZ_X5 EZ_X5 785 -omap_rudolph MACH_OMAP_RUDOLPH OMAP_RUDOLPH 786 cpuat91 MACH_CPUAT91 CPUAT91 787 -rea9200 MACH_REA9200 REA9200 788 -acts_pune_sa1110 MACH_ACTS_PUNE_SA1110 ACTS_PUNE_SA1110 789 -ixp425 MACH_IXP425 IXP425 790 -i30030ads MACH_I30030ADS I30030ADS 791 -perch MACH_PERCH PERCH 792 -eis05r1 MACH_EIS05R1 EIS05R1 793 -pepperpad MACH_PEPPERPAD PEPPERPAD 794 -sb3010 MACH_SB3010 SB3010 795 -rm9200 MACH_RM9200 RM9200 796 -dma03 MACH_DMA03 DMA03 797 -road_s101 MACH_ROAD_S101 ROAD_S101 798 iq81340sc MACH_IQ81340SC IQ81340SC 799 -iq_nextgen_b MACH_IQ_NEXTGEN_B IQ_NEXTGEN_B 800 iq81340mc MACH_IQ81340MC IQ81340MC 801 -iq_nextgen_d MACH_IQ_NEXTGEN_D IQ_NEXTGEN_D 802 -iq_nextgen_e MACH_IQ_NEXTGEN_E IQ_NEXTGEN_E 803 -mallow_at91 MACH_MALLOW_AT91 MALLOW_AT91 804 -cybertracker_i MACH_CYBERTRACKER_I CYBERTRACKER_I 805 -gesbc931x MACH_GESBC931X GESBC931X 806 -centipad MACH_CENTIPAD CENTIPAD 807 -armsoc MACH_ARMSOC ARMSOC 808 -se4200 MACH_SE4200 SE4200 809 -ems197a MACH_EMS197A EMS197A 810 micro9 MACH_MICRO9 MICRO9 811 micro9l MACH_MICRO9L MICRO9L 812 -uc5471dsp MACH_UC5471DSP UC5471DSP 813 -sj5471eng MACH_SJ5471ENG SJ5471ENG 814 -none MACH_CMPXA26X CMPXA26X 815 -nc1 MACH_NC NC 816 omap_palmte MACH_OMAP_PALMTE OMAP_PALMTE 817 -ajax52x MACH_AJAX52X AJAX52X 818 -siriustar MACH_SIRIUSTAR SIRIUSTAR 819 -iodata_hdlg MACH_IODATA_HDLG IODATA_HDLG 820 -at91rm9200utl MACH_AT91RM9200UTL AT91RM9200UTL 821 -biosafe MACH_BIOSAFE BIOSAFE 822 -mp1000 MACH_MP1000 MP1000 823 -parsy MACH_PARSY PARSY 824 -ccxp270 MACH_CCXP CCXP 825 -omap_gsample MACH_OMAP_GSAMPLE OMAP_GSAMPLE 826 realview_eb MACH_REALVIEW_EB REALVIEW_EB 827 -samoa MACH_SAMOA SAMOA 828 -palmt3 MACH_PALMT3 PALMT3 829 -i878 MACH_I878 I878 830 borzoi MACH_BORZOI BORZOI 831 -gecko MACH_GECKO GECKO 832 -ds101 MACH_DS101 DS101 833 -omap_palmtt2 MACH_OMAP_PALMTT2 OMAP_PALMTT2 834 palmld MACH_PALMLD PALMLD 835 -cc9c MACH_CC9C CC9C 836 -sbc1670 MACH_SBC1670 SBC1670 837 ixdp28x5 MACH_IXDP28X5 IXDP28X5 838 omap_palmtt MACH_OMAP_PALMTT OMAP_PALMTT 839 -ml696k MACH_ML696K ML696K 840 arcom_zeus MACH_ARCOM_ZEUS ARCOM_ZEUS 841 osiris MACH_OSIRIS OSIRIS 842 -maestro MACH_MAESTRO MAESTRO 843 palmte2 MACH_PALMTE2 PALMTE2 844 -ixbbm MACH_IXBBM IXBBM 845 mx27ads MACH_MX27ADS MX27ADS 846 -ax8004 MACH_AX8004 AX8004 847 at91sam9261ek MACH_AT91SAM9261EK AT91SAM9261EK 848 loft MACH_LOFT LOFT 849 -magpie MACH_MAGPIE MAGPIE 850 mx21ads MACH_MX21ADS MX21ADS 851 -mb87m3400 MACH_MB87M3400 MB87M3400 852 -mguard_delta MACH_MGUARD_DELTA MGUARD_DELTA 853 -davinci_dvdp MACH_DAVINCI_DVDP DAVINCI_DVDP 854 -htcuniversal MACH_HTCUNIVERSAL HTCUNIVERSAL 855 -tpad MACH_TPAD TPAD 856 -roverp3 MACH_ROVERP3 ROVERP3 857 -jornada928 MACH_JORNADA928 JORNADA928 858 -mv88fxx81 MACH_MV88FXX81 MV88FXX81 859 -stmp36xx MACH_STMP36XX STMP36XX 860 -sxni79524 MACH_SXNI79524 SXNI79524 861 ams_delta MACH_AMS_DELTA AMS_DELTA 862 -uranium MACH_URANIUM URANIUM 863 -ucon MACH_UCON UCON 864 nas100d MACH_NAS100D NAS100D 865 -l083 MACH_L083_1000 L083_1000 866 -ezx MACH_EZX EZX 867 -pnx5220 MACH_PNX5220 PNX5220 868 -butte MACH_BUTTE BUTTE 869 -srm2 MACH_SRM2 SRM2 870 -dsbr MACH_DSBR DSBR 871 -crystalball MACH_CRYSTALBALL CRYSTALBALL 872 -tinypxa27x MACH_TINYPXA27X TINYPXA27X 873 -herbie MACH_HERBIE HERBIE 874 magician MACH_MAGICIAN MAGICIAN 875 -cm4002 MACH_CM4002 CM4002 876 -b4 MACH_B4 B4 877 -maui MACH_MAUI MAUI 878 -cybertracker_g MACH_CYBERTRACKER_G CYBERTRACKER_G 879 nxdkn MACH_NXDKN NXDKN 880 -mio8390 MACH_MIO8390 MIO8390 881 -omi_board MACH_OMI_BOARD OMI_BOARD 882 -mx21civ MACH_MX21CIV MX21CIV 883 -mahi_cdac MACH_MAHI_CDAC MAHI_CDAC 884 palmtx MACH_PALMTX PALMTX 885 s3c2413 MACH_S3C2413 S3C2413 887 -samsys_ep0 MACH_SAMSYS_EP0 SAMSYS_EP0 888 -wg302v1 MACH_WG302V1 WG302V1 889 wg302v2 MACH_WG302V2 WG302V2 890 -eb42x MACH_EB42X EB42X 891 -iq331es MACH_IQ331ES IQ331ES 892 -cosydsp MACH_COSYDSP COSYDSP 893 -uplat7d_proto MACH_UPLAT7D UPLAT7D 894 -ptdavinci MACH_PTDAVINCI PTDAVINCI 895 -mbus MACH_MBUS MBUS 896 -nadia2vb MACH_NADIA2VB NADIA2VB 897 -r1000 MACH_R1000 R1000 898 -hw90250 MACH_HW90250 HW90250 899 omap_2430sdp MACH_OMAP_2430SDP OMAP_2430SDP 900 davinci_evm MACH_DAVINCI_EVM DAVINCI_EVM 901 -omap_tornado MACH_OMAP_TORNADO OMAP_TORNADO 902 -olocreek MACH_OLOCREEK OLOCREEK 903 palmz72 MACH_PALMZ72 PALMZ72 904 nxdb500 MACH_NXDB500 NXDB500 905 -apf9328 MACH_APF9328 APF9328 906 -omap_wipoq MACH_OMAP_WIPOQ OMAP_WIPOQ 907 -omap_twip MACH_OMAP_TWIP OMAP_TWIP 908 -treo650 MACH_TREO650 TREO650 909 -acumen MACH_ACUMEN ACUMEN 910 -xp100 MACH_XP100 XP100 911 -fs2410 MACH_FS2410 FS2410 912 -pxa270_cerf MACH_PXA270_CERF PXA270_CERF 913 -sq2ftlpalm MACH_SQ2FTLPALM SQ2FTLPALM 914 -bsemserver MACH_BSEMSERVER BSEMSERVER 915 -netclient MACH_NETCLIENT NETCLIENT 916 palmt5 MACH_PALMT5 PALMT5 917 palmtc MACH_PALMTC PALMTC 918 omap_apollon MACH_OMAP_APOLLON OMAP_APOLLON 919 -mxc30030evb MACH_MXC30030EVB MXC30030EVB 920 -rea_cpu2 MACH_REA_2D REA_2D 921 -eti3e524 MACH_TI3E524 TI3E524 922 ateb9200 MACH_ATEB9200 ATEB9200 923 -auckland MACH_AUCKLAND AUCKLAND 924 -ak3220m MACH_AK3320M AK3320M 925 -duramax MACH_DURAMAX DURAMAX 926 n35 MACH_N35 N35 927 -pronghorn MACH_PRONGHORN PRONGHORN 928 -fundy MACH_FUNDY FUNDY 929 logicpd_pxa270 MACH_LOGICPD_PXA270 LOGICPD_PXA270 930 -cpu777 MACH_CPU777 CPU777 931 -simicon9201 MACH_SIMICON9201 SIMICON9201 932 -leap2_hpm MACH_LEAP2_HPM LEAP2_HPM 933 -cm922txa10 MACH_CM922TXA10 CM922TXA10 934 -sandgate MACH_PXA PXA 935 -sandgate2 MACH_SANDGATE2 SANDGATE2 936 -sandgate2g MACH_SANDGATE2G SANDGATE2G 937 -sandgate2p MACH_SANDGATE2P SANDGATE2P 938 -fred_jack MACH_FRED_JACK FRED_JACK 939 -ttg_color1 MACH_TTG_COLOR1 TTG_COLOR1 940 nxeb500hmi MACH_NXEB500HMI NXEB500HMI 941 -netdcu8 MACH_NETDCU8 NETDCU8 942 -ng_fvx538 MACH_NG_FVX538 NG_FVX538 944 -ng_fvs338 MACH_NG_FVS338 NG_FVS338 945 -pnx4103 MACH_PNX4103 PNX4103 946 -hesdb MACH_HESDB HESDB 947 -xsilo MACH_XSILO XSILO 948 espresso MACH_ESPRESSO ESPRESSO 949 -emlc MACH_EMLC EMLC 950 -sisteron MACH_SISTERON SISTERON 951 rx1950 MACH_RX1950 RX1950 952 -tsc_venus MACH_TSC_VENUS TSC_VENUS 953 -ds101j MACH_DS101J DS101J 954 -mxc30030ads MACH_MXC30030ADS MXC30030ADS 955 -fujitsu_wimaxsoc MACH_FUJITSU_WIMAXSOC FUJITSU_WIMAXSOC 956 -dualpcmodem MACH_DUALPCMODEM DUALPCMODEM 957 gesbc9312 MACH_GESBC9312 GESBC9312 958 -htcapache MACH_HTCAPACHE HTCAPACHE 959 -ixdp435 MACH_IXDP435 IXDP435 960 -catprovt100 MACH_CATPROVT100 CATPROVT100 961 -picotux1xx MACH_PICOTUX1XX PICOTUX1XX 962 picotux2xx MACH_PICOTUX2XX PICOTUX2XX 963 dsmg600 MACH_DSMG600 DSMG600 964 -empc2 MACH_EMPC2 EMPC2 965 -ventura MACH_VENTURA VENTURA 966 -phidget_sbc MACH_PHIDGET_SBC PHIDGET_SBC 967 -ij3k MACH_IJ3K IJ3K 968 -pisgah MACH_PISGAH PISGAH 969 omap_fsample MACH_OMAP_FSAMPLE OMAP_FSAMPLE 970 -sg720 MACH_SG720 SG720 971 -redfox MACH_REDFOX REDFOX 972 -mysh_ep9315_1 MACH_MYSH_EP9315_1 MYSH_EP9315_1 973 -tpf106 MACH_TPF106 TPF106 974 -at91rm9200kg MACH_AT91RM9200KG AT91RM9200KG 975 -rcmt2 MACH_SLEDB SLEDB 976 -ontrack MACH_ONTRACK ONTRACK 977 -pm1200 MACH_PM1200 PM1200 978 -ess24562 MACH_ESS24XXX ESS24XXX 979 -coremp7 MACH_COREMP7 COREMP7 980 -nexcoder_6446 MACH_NEXCODER_6446 NEXCODER_6446 981 -stvc8380 MACH_STVC8380 STVC8380 982 -teklynx MACH_TEKLYNX TEKLYNX 983 -carbonado MACH_CARBONADO CARBONADO 984 -sysmos_mp730 MACH_SYSMOS_MP730 SYSMOS_MP730 985 snapper_cl15 MACH_SNAPPER_CL15 SNAPPER_CL15 986 -pgigim MACH_PGIGIM PGIGIM 987 -ptx9160p2 MACH_PTX9160P2 PTX9160P2 988 -dcore1 MACH_DCORE1 DCORE1 989 -victorpxa MACH_VICTORPXA VICTORPXA 990 -mx2dtb MACH_MX2DTB MX2DTB 991 -pxa_irex_er0100 MACH_PXA_IREX_ER0100 PXA_IREX_ER0100 992 omap_palmz71 MACH_OMAP_PALMZ71 OMAP_PALMZ71 993 -bartec_deg MACH_BARTEC_DEG BARTEC_DEG 994 -hw50251 MACH_HW50251 HW50251 995 -ibox MACH_IBOX IBOX 996 -atlaslh7a404 MACH_ATLASLH7A404 ATLASLH7A404 997 -pt2026 MACH_PT2026 PT2026 998 -htcalpine MACH_HTCALPINE HTCALPINE 999 -bartec_vtu MACH_BARTEC_VTU BARTEC_VTU 1000 -vcoreii MACH_VCOREII VCOREII 1001 -pdnb3 MACH_PDNB3 PDNB3 1002 -htcbeetles MACH_HTCBEETLES HTCBEETLES 1003 -s3c6400 MACH_S3C6400 S3C6400 1004 -s3c2443 MACH_S3C2443 S3C2443 1005 -omap_ldk MACH_OMAP_LDK OMAP_LDK 1006 -smdk2460 MACH_SMDK2460 SMDK2460 1007 -smdk2440 MACH_SMDK2440 SMDK2440 1008 smdk2412 MACH_SMDK2412 SMDK2412 1009 -webbox MACH_WEBBOX WEBBOX 1010 -cwwndp MACH_CWWNDP CWWNDP 1011 -i839 MACH_DRAGON DRAGON 1012 -opendo_cpu_board MACH_OPENDO_CPU_BOARD OPENDO_CPU_BOARD 1013 -ccm2200 MACH_CCM2200 CCM2200 1014 -etwarm MACH_ETWARM ETWARM 1015 -m93030 MACH_M93030 M93030 1016 -cc7u MACH_CC7U CC7U 1017 -mtt_ranger MACH_MTT_RANGER MTT_RANGER 1018 -nexus MACH_NEXUS NEXUS 1019 -desman MACH_DESMAN DESMAN 1020 -bkde303 MACH_BKDE303 BKDE303 1021 smdk2413 MACH_SMDK2413 SMDK2413 1022 -aml_m7200 MACH_AML_M7200 AML_M7200 1023 aml_m5900 MACH_AML_M5900 AML_M5900 1024 -sg640 MACH_SG640 SG640 1025 -edg79524 MACH_EDG79524 EDG79524 1026 -ai2410 MACH_AI2410 AI2410 1027 -ixp465 MACH_IXP465 IXP465 1028 balloon3 MACH_BALLOON3 BALLOON3 1029 -heins MACH_HEINS HEINS 1030 -mpluseva MACH_MPLUSEVA MPLUSEVA 1031 -rt042 MACH_RT042 RT042 1032 -cwiem MACH_CWIEM CWIEM 1033 -cm_x270 MACH_CM_X270 CM_X270 1034 -cm_x255 MACH_CM_X255 CM_X255 1035 -esh_at91 MACH_ESH_AT91 ESH_AT91 1036 -sandgate3 MACH_SANDGATE3 SANDGATE3 1037 -primo MACH_PRIMO PRIMO 1038 -gemstone MACH_GEMSTONE GEMSTONE 1039 -pronghorn_metro MACH_PRONGHORNMETRO PRONGHORNMETRO 1040 -sidewinder MACH_SIDEWINDER SIDEWINDER 1041 -picomod1 MACH_PICOMOD1 PICOMOD1 1042 -sg590 MACH_SG590 SG590 1043 -akai9307 MACH_AKAI9307 AKAI9307 1044 -fontaine MACH_FONTAINE FONTAINE 1045 -wombat MACH_WOMBAT WOMBAT 1046 -acq300 MACH_ACQ300 ACQ300 1047 -mod272 MACH_MOD_270 MOD_270 1048 -vmc_vc0820 MACH_VC0820 VC0820 1049 -ani_aim MACH_ANI_AIM ANI_AIM 1050 -jellyfish MACH_JELLYFISH JELLYFISH 1051 -amanita MACH_AMANITA AMANITA 1052 -vlink MACH_VLINK VLINK 1053 -dexflex MACH_DEXFLEX DEXFLEX 1054 -eigen_ttq MACH_EIGEN_TTQ EIGEN_TTQ 1055 -arcom_titan MACH_ARCOM_TITAN ARCOM_TITAN 1056 -tabla MACH_TABLA TABLA 1057 -mdirac3 MACH_MDIRAC3 MDIRAC3 1058 -mrhfbp2 MACH_MRHFBP2 MRHFBP2 1059 -at91rm9200rb MACH_AT91RM9200RB AT91RM9200RB 1060 -ani_apm MACH_ANI_APM ANI_APM 1061 -ella1 MACH_ELLA1 ELLA1 1062 -inhand_pxa27x MACH_INHAND_PXA27X INHAND_PXA27X 1063 -inhand_pxa25x MACH_INHAND_PXA25X INHAND_PXA25X 1064 -empos_xm MACH_EMPOS_XM EMPOS_XM 1065 -empos MACH_EMPOS EMPOS 1066 -empos_tiny MACH_EMPOS_TINY EMPOS_TINY 1067 -empos_sm MACH_EMPOS_SM EMPOS_SM 1068 -egret MACH_EGRET EGRET 1069 -ostrich MACH_OSTRICH OSTRICH 1070 -n50 MACH_N50 N50 1071 ecbat91 MACH_ECBAT91 ECBAT91 1072 -stareast MACH_STAREAST STAREAST 1073 -dspg_dw MACH_DSPG_DW DSPG_DW 1074 onearm MACH_ONEARM ONEARM 1075 -mrg110_6 MACH_MRG110_6 MRG110_6 1076 -wrt300nv2 MACH_WRT300NV2 WRT300NV2 1077 -xm_bulverde MACH_XM_BULVERDE XM_BULVERDE 1078 -msm6100 MACH_MSM6100 MSM6100 1079 -eti_b1 MACH_ETI_B1 ETI_B1 1080 -za9l_series MACH_ZILOG_ZA9L ZILOG_ZA9L 1081 -bit2440 MACH_BIT2440 BIT2440 1082 -nbi MACH_NBI NBI 1083 smdk2443 MACH_SMDK2443 SMDK2443 1084 -vdavinci MACH_VDAVINCI VDAVINCI 1085 -atc6 MACH_ATC6 ATC6 1086 -multmdw MACH_MULTMDW MULTMDW 1087 -mba2440 MACH_MBA2440 MBA2440 1088 -ecsd MACH_ECSD ECSD 1089 -palmz31 MACH_PALMZ31 PALMZ31 1090 fsg MACH_FSG FSG 1091 -razor101 MACH_RAZOR101 RAZOR101 1092 -opera_tdm MACH_OPERA_TDM OPERA_TDM 1093 -comcerto MACH_COMCERTO COMCERTO 1094 -tb0319 MACH_TB0319 TB0319 1095 -kws8000 MACH_KWS8000 KWS8000 1096 -b2 MACH_B2 B2 1097 -lcl54 MACH_LCL54 LCL54 1098 at91sam9260ek MACH_AT91SAM9260EK AT91SAM9260EK 1099 glantank MACH_GLANTANK GLANTANK 1100 n2100 MACH_N2100 N2100 1101 -n4100 MACH_N4100 N4100 1102 -rsc4 MACH_VERTICAL_RSC4 VERTICAL_RSC4 1103 -sg8100 MACH_SG8100 SG8100 1104 -im42xx MACH_IM42XX IM42XX 1105 -ftxx MACH_FTXX FTXX 1106 -lwfusion MACH_LWFUSION LWFUSION 1107 qt2410 MACH_QT2410 QT2410 1108 kixrp435 MACH_KIXRP435 KIXRP435 1109 -ccw9c MACH_CCW9C CCW9C 1110 -dabhs MACH_DABHS DABHS 1111 -gzmx MACH_GZMX GZMX 1112 -ipnw100ap MACH_IPNW100AP IPNW100AP 1113 cc9p9360dev MACH_CC9P9360DEV CC9P9360DEV 1114 -cc9p9750dev MACH_CC9P9750DEV CC9P9750DEV 1115 -cc9p9360val MACH_CC9P9360VAL CC9P9360VAL 1116 -cc9p9750val MACH_CC9P9750VAL CC9P9750VAL 1117 -nx70v MACH_NX70V NX70V 1118 -at91rm9200df MACH_AT91RM9200DF AT91RM9200DF 1119 -se_pilot2 MACH_SE_PILOT2 SE_PILOT2 1120 -mtcn_t800 MACH_MTCN_T800 MTCN_T800 1121 -vcmx212 MACH_VCMX212 VCMX212 1122 -lynx MACH_LYNX LYNX 1123 -at91sam9260id MACH_AT91SAM9260ID AT91SAM9260ID 1124 -hw86052 MACH_HW86052 HW86052 1125 -pilz_pmi3 MACH_PILZ_PMI3 PILZ_PMI3 1126 edb9302a MACH_EDB9302A EDB9302A 1127 edb9307a MACH_EDB9307A EDB9307A 1128 -ct_dfs MACH_CT_DFS CT_DFS 1129 -pilz_pmi4 MACH_PILZ_PMI4 PILZ_PMI4 1130 -xceednp_ixp MACH_XCEEDNP_IXP XCEEDNP_IXP 1131 -smdk2442b MACH_SMDK2442B SMDK2442B 1132 -xnode MACH_XNODE XNODE 1133 -aidx270 MACH_AIDX270 AIDX270 1134 -rema MACH_REMA REMA 1135 -bps1000 MACH_BPS1000 BPS1000 1136 -hw90350 MACH_HW90350 HW90350 1137 omap_3430sdp MACH_OMAP_3430SDP OMAP_3430SDP 1138 -bluetouch MACH_BLUETOUCH BLUETOUCH 1139 vstms MACH_VSTMS VSTMS 1140 -xsbase270 MACH_XSBASE270 XSBASE270 1141 -at91sam9260ek_cn MACH_AT91SAM9260EK_CN AT91SAM9260EK_CN 1142 -adsturboxb MACH_ADSTURBOXB ADSTURBOXB 1143 -oti4110 MACH_OTI4110 OTI4110 1144 -hme_pxa MACH_HME_PXA HME_PXA 1145 -deisterdca MACH_DEISTERDCA DEISTERDCA 1146 -ces_ssem2 MACH_CES_SSEM2 CES_SSEM2 1147 -ces_mtr MACH_CES_MTR CES_MTR 1148 -tds_avng_sbc MACH_TDS_AVNG_SBC TDS_AVNG_SBC 1149 -everest MACH_EVEREST EVEREST 1150 -pnx4010 MACH_PNX4010 PNX4010 1151 -oxnas MACH_OXNAS OXNAS 1152 -fiori MACH_FIORI FIORI 1153 -ml1200 MACH_ML1200 ML1200 1154 -pecos MACH_PECOS PECOS 1155 -nb2xxx MACH_NB2XXX NB2XXX 1156 -hw6900 MACH_HW6900 HW6900 1157 -cdcs_quoll MACH_CDCS_QUOLL CDCS_QUOLL 1158 -quicksilver MACH_QUICKSILVER QUICKSILVER 1159 -uplat926 MACH_UPLAT926 UPLAT926 1160 -dep2410_dep2410 MACH_DEP2410_THOMAS DEP2410_THOMAS 1161 -dtk2410 MACH_DTK2410 DTK2410 1162 -chili MACH_CHILI CHILI 1163 -demeter MACH_DEMETER DEMETER 1164 -dionysus MACH_DIONYSUS DIONYSUS 1165 -as352x MACH_AS352X AS352X 1166 -service MACH_SERVICE SERVICE 1167 -cs_e9301 MACH_CS_E9301 CS_E9301 1168 micro9m MACH_MICRO9M MICRO9M 1169 -ia_mospck MACH_IA_MOSPCK IA_MOSPCK 1170 -ql201b MACH_QL201B QL201B 1171 -bbm MACH_BBM BBM 1174 -exxx MACH_EXXX EXXX 1175 -wma11b MACH_WMA11B WMA11B 1176 -pelco_atlas MACH_PELCO_ATLAS PELCO_ATLAS 1177 -g500 MACH_G500 G500 1178 bug MACH_BUG BUG 1179 -mx33ads MACH_MX33ADS MX33ADS 1180 -chub MACH_CHUB CHUB 1181 -neo1973_gta01 MACH_NEO1973_GTA01 NEO1973_GTA01 1182 -w90n740 MACH_W90N740 W90N740 1183 -medallion_sa2410 MACH_MEDALLION_SA2410 MEDALLION_SA2410 1184 -ia_cpu_9200_2 MACH_IA_CPU_9200_2 IA_CPU_9200_2 1185 -dimmrm9200 MACH_DIMMRM9200 DIMMRM9200 1186 -pm9261 MACH_PM9261 PM9261 1187 -ml7304 MACH_ML7304 ML7304 1189 -ucp250 MACH_UCP250 UCP250 1190 -intboard MACH_INTBOARD INTBOARD 1191 -gulfstream MACH_GULFSTREAM GULFSTREAM 1192 -labquest MACH_LABQUEST LABQUEST 1193 -vcmx313 MACH_VCMX313 VCMX313 1194 -urg200 MACH_URG200 URG200 1195 -cpux255lcdnet MACH_CPUX255LCDNET CPUX255LCDNET 1196 -netdcu9 MACH_NETDCU9 NETDCU9 1197 -netdcu10 MACH_NETDCU10 NETDCU10 1198 -dspg_dga MACH_DSPG_DGA DSPG_DGA 1199 -dspg_dvw MACH_DSPG_DVW DSPG_DVW 1200 -solos MACH_SOLOS SOLOS 1201 at91sam9263ek MACH_AT91SAM9263EK AT91SAM9263EK 1202 -osstbox MACH_OSSTBOX OSSTBOX 1203 -kbat9261 MACH_KBAT9261 KBAT9261 1204 -ct1100 MACH_CT1100 CT1100 1205 -akcppxa MACH_AKCPPXA AKCPPXA 1206 -ochaya1020 MACH_OCHAYA1020 OCHAYA1020 1207 -hitrack MACH_HITRACK HITRACK 1208 -syme1 MACH_SYME1 SYME1 1209 -syhl1 MACH_SYHL1 SYHL1 1210 -empca400 MACH_EMPCA400 EMPCA400 1211 em7210 MACH_EM7210 EM7210 1212 -htchermes MACH_HTCHERMES HTCHERMES 1213 -eti_c1 MACH_ETI_C1 ETI_C1 1214 -ac100 MACH_AC100 AC100 1216 -sneetch MACH_SNEETCH SNEETCH 1217 -studentmate MACH_STUDENTMATE STUDENTMATE 1218 -zir2410 MACH_ZIR2410 ZIR2410 1219 -zir2413 MACH_ZIR2413 ZIR2413 1220 -dlonip3 MACH_DLONIP3 DLONIP3 1221 -instream MACH_INSTREAM INSTREAM 1222 -ambarella MACH_AMBARELLA AMBARELLA 1223 -nevis MACH_NEVIS NEVIS 1224 -htc_trinity MACH_HTC_TRINITY HTC_TRINITY 1225 -ql202b MACH_QL202B QL202B 1226 vpac270 MACH_VPAC270 VPAC270 1227 -rd129 MACH_RD129 RD129 1228 -htcwizard MACH_HTCWIZARD HTCWIZARD 1229 treo680 MACH_TREO680 TREO680 1230 -tecon_tmezon MACH_TECON_TMEZON TECON_TMEZON 1231 zylonite MACH_ZYLONITE ZYLONITE 1233 -gene1270 MACH_GENE1270 GENE1270 1234 -zir2412 MACH_ZIR2412 ZIR2412 1235 mx31lite MACH_MX31LITE MX31LITE 1236 -t700wx MACH_T700WX T700WX 1237 -vf100 MACH_VF100 VF100 1238 -nsb2 MACH_NSB2 NSB2 1239 -nxhmi_bb MACH_NXHMI_BB NXHMI_BB 1240 -nxhmi_re MACH_NXHMI_RE NXHMI_RE 1241 -n4100pro MACH_N4100PRO N4100PRO 1242 -sam9260 MACH_SAM9260 SAM9260 1243 -omap_treo600 MACH_OMAP_TREO600 OMAP_TREO600 1244 -indy2410 MACH_INDY2410 INDY2410 1245 -nelt_a MACH_NELT_A NELT_A 1246 -n311 MACH_N311 N311 1248 -at91sam9260vgk MACH_AT91SAM9260VGK AT91SAM9260VGK 1249 -at91leppe MACH_AT91LEPPE AT91LEPPE 1250 -at91lepccn MACH_AT91LEPCCN AT91LEPCCN 1251 -apc7100 MACH_APC7100 APC7100 1252 -stargazer MACH_STARGAZER STARGAZER 1253 -sonata MACH_SONATA SONATA 1254 -schmoogie MACH_SCHMOOGIE SCHMOOGIE 1255 -aztool MACH_AZTOOL AZTOOL 1256 mioa701 MACH_MIOA701 MIOA701 1257 -sxni9260 MACH_SXNI9260 SXNI9260 1258 -mxc27520evb MACH_MXC27520EVB MXC27520EVB 1259 armadillo5x0 MACH_ARMADILLO5X0 ARMADILLO5X0 1260 -mb9260 MACH_MB9260 MB9260 1261 -mb9263 MACH_MB9263 MB9263 1262 -ipac9302 MACH_IPAC9302 IPAC9302 1263 cc9p9360js MACH_CC9P9360JS CC9P9360JS 1264 -gallium MACH_GALLIUM GALLIUM 1265 -msc2410 MACH_MSC2410 MSC2410 1266 -ghi270 MACH_GHI270 GHI270 1267 -davinci_leonardo MACH_DAVINCI_LEONARDO DAVINCI_LEONARDO 1268 -oiab MACH_OIAB OIAB 1269 smdk6400 MACH_SMDK6400 SMDK6400 1270 nokia_n800 MACH_NOKIA_N800 NOKIA_N800 1271 -greenphone MACH_GREENPHONE GREENPHONE 1272 -compex42x MACH_COMPEXWP18 COMPEXWP18 1273 -xmate MACH_XMATE XMATE 1274 -energizer MACH_ENERGIZER ENERGIZER 1275 -ime1 MACH_IME1 IME1 1276 -sweda_tms MACH_SWEDATMS SWEDATMS 1277 -ntnp435c MACH_NTNP435C NTNP435C 1278 -spectro2 MACH_SPECTRO2 SPECTRO2 1279 -h6039 MACH_H6039 H6039 1280 ep80219 MACH_EP80219 EP80219 1281 -samoa_ii MACH_SAMOA_II SAMOA_II 1282 -cwmxl MACH_CWMXL CWMXL 1283 -as9200 MACH_AS9200 AS9200 1284 -sfx1149 MACH_SFX1149 SFX1149 1285 -navi010 MACH_NAVI010 NAVI010 1286 -multmdp MACH_MULTMDP MULTMDP 1287 -scb9520 MACH_SCB9520 SCB9520 1288 -htcathena MACH_HTCATHENA HTCATHENA 1289 -xp179 MACH_XP179 XP179 1290 -h4300 MACH_H4300 H4300 1291 goramo_mlr MACH_GORAMO_MLR GORAMO_MLR 1292 -mxc30020evb MACH_MXC30020EVB MXC30020EVB 1293 -adsbitsyg5 MACH_ADSBITSYG5 ADSBITSYG5 1294 -adsportalplus MACH_ADSPORTALPLUS ADSPORTALPLUS 1295 -mmsp2plus MACH_MMSP2PLUS MMSP2PLUS 1296 em_x270 MACH_EM_X270 EM_X270 1297 -tpp302 MACH_TPP302 TPP302 1298 -tpp104 MACH_TPM104 TPM104 1299 -tpm102 MACH_TPM102 TPM102 1300 -tpm109 MACH_TPM109 TPM109 1301 -fbxo1 MACH_FBXO1 FBXO1 1302 -hxd8 MACH_HXD8 HXD8 1303 neo1973_gta02 MACH_NEO1973_GTA02 NEO1973_GTA02 1304 -emtest MACH_EMTEST EMTEST 1305 -ad6900 MACH_AD6900 AD6900 1306 -europa MACH_EUROPA EUROPA 1307 -metroconnect MACH_METROCONNECT METROCONNECT 1308 -ez_s2410 MACH_EZ_S2410 EZ_S2410 1309 -ez_s2440 MACH_EZ_S2440 EZ_S2440 1310 -ez_ep9312 MACH_EZ_EP9312 EZ_EP9312 1311 -ez_ep9315 MACH_EZ_EP9315 EZ_EP9315 1312 -ez_x7 MACH_EZ_X7 EZ_X7 1313 -godotdb MACH_GODOTDB GODOTDB 1314 -mistral MACH_MISTRAL MISTRAL 1315 -msm MACH_MSM MSM 1316 -ct5910 MACH_CT5910 CT5910 1317 -ct5912 MACH_CT5912 CT5912 1318 -hynet_ine MACH_HYNET_INE HYNET_INE 1319 -hynet_app MACH_HYNET_APP HYNET_APP 1320 -msm7200 MACH_MSM7200 MSM7200 1321 -msm7600 MACH_MSM7600 MSM7600 1322 -ceb255 MACH_CEB255 CEB255 1323 -ciel MACH_CIEL CIEL 1324 -slm5650 MACH_SLM5650 SLM5650 1325 at91sam9rlek MACH_AT91SAM9RLEK AT91SAM9RLEK 1326 -comtech_router MACH_COMTECH_ROUTER COMTECH_ROUTER 1327 -sbc2410x MACH_SBC2410X SBC2410X 1328 -at4x0bd MACH_AT4X0BD AT4X0BD 1329 -cbifr MACH_CBIFR CBIFR 1330 -arcom_quantum MACH_ARCOM_QUANTUM ARCOM_QUANTUM 1331 -matrix520 MACH_MATRIX520 MATRIX520 1332 -matrix510 MACH_MATRIX510 MATRIX510 1333 -matrix500 MACH_MATRIX500 MATRIX500 1334 -m501 MACH_M501 M501 1335 -aaeon1270 MACH_AAEON1270 AAEON1270 1336 -matrix500ev MACH_MATRIX500EV MATRIX500EV 1337 -pac500 MACH_PAC500 PAC500 1338 -pnx8181 MACH_PNX8181 PNX8181 1339 colibri320 MACH_COLIBRI320 COLIBRI320 1340 -aztoolbb MACH_AZTOOLBB AZTOOLBB 1341 -aztoolg2 MACH_AZTOOLG2 AZTOOLG2 1342 -dvlhost MACH_DVLHOST DVLHOST 1343 -zir9200 MACH_ZIR9200 ZIR9200 1344 -zir9260 MACH_ZIR9260 ZIR9260 1345 -cocopah MACH_COCOPAH COCOPAH 1346 -nds MACH_NDS NDS 1347 -rosencrantz MACH_ROSENCRANTZ ROSENCRANTZ 1348 -fttx_odsc MACH_FTTX_ODSC FTTX_ODSC 1349 -classe_r6904 MACH_CLASSE_R6904 CLASSE_R6904 1350 cam60 MACH_CAM60 CAM60 1351 -mxc30031ads MACH_MXC30031ADS MXC30031ADS 1352 -datacall MACH_DATACALL DATACALL 1353 at91eb01 MACH_AT91EB01 AT91EB01 1354 -rty MACH_RTY RTY 1355 -dwl2100 MACH_DWL2100 DWL2100 1356 -vinsi MACH_VINSI VINSI 1357 db88f5281 MACH_DB88F5281 DB88F5281 1358 csb726 MACH_CSB726 CSB726 1359 -tik27 MACH_TIK27 TIK27 1360 -mx_uc7420 MACH_MX_UC7420 MX_UC7420 1361 -rirm3 MACH_RIRM3 RIRM3 1362 -pelco_odyssey MACH_PELCO_ODYSSEY PELCO_ODYSSEY 1363 -adx_abox MACH_ADX_ABOX ADX_ABOX 1365 -adx_tpid MACH_ADX_TPID ADX_TPID 1366 -minicheck MACH_MINICHECK MINICHECK 1367 -idam MACH_IDAM IDAM 1368 -mario_mx MACH_MARIO_MX MARIO_MX 1369 -vi1888 MACH_VI1888 VI1888 1370 -zr4230 MACH_ZR4230 ZR4230 1371 -t1_ix_blue MACH_T1_IX_BLUE T1_IX_BLUE 1372 -syhq2 MACH_SYHQ2 SYHQ2 1373 -computime_r3 MACH_COMPUTIME_R3 COMPUTIME_R3 1374 -oratis MACH_ORATIS ORATIS 1375 -mikko MACH_MIKKO MIKKO 1376 -holon MACH_HOLON HOLON 1377 -olip8 MACH_OLIP8 OLIP8 1378 -ghi270hg MACH_GHI270HG GHI270HG 1379 davinci_dm6467_evm MACH_DAVINCI_DM6467_EVM DAVINCI_DM6467_EVM 1380 davinci_dm355_evm MACH_DAVINCI_DM355_EVM DAVINCI_DM355_EVM 1381 -blackriver MACH_BLACKRIVER BLACKRIVER 1383 -sandgate_wp MACH_SANDGATEWP SANDGATEWP 1384 -cdotbwsg MACH_CDOTBWSG CDOTBWSG 1385 -quark963 MACH_QUARK963 QUARK963 1386 -csb735 MACH_CSB735 CSB735 1387 littleton MACH_LITTLETON LITTLETON 1388 -mio_p550 MACH_MIO_P550 MIO_P550 1389 -motion2440 MACH_MOTION2440 MOTION2440 1390 -imm500 MACH_IMM500 IMM500 1391 -homematic MACH_HOMEMATIC HOMEMATIC 1392 -ermine MACH_ERMINE ERMINE 1393 -kb9202b MACH_KB9202B KB9202B 1394 -hs1xx MACH_HS1XX HS1XX 1395 -studentmate2440 MACH_STUDENTMATE2440 STUDENTMATE2440 1396 -arvoo_l1_z1 MACH_ARVOO_L1_Z1 ARVOO_L1_Z1 1397 -dep2410k MACH_DEP2410K DEP2410K 1398 -xxsvideo MACH_XXSVIDEO XXSVIDEO 1399 -im4004 MACH_IM4004 IM4004 1400 -ochaya1050 MACH_OCHAYA1050 OCHAYA1050 1401 -lep9261 MACH_LEP9261 LEP9261 1402 -svenmeb MACH_SVENMEB SVENMEB 1403 -fortunet2ne MACH_FORTUNET2NE FORTUNET2NE 1404 -nxhx MACH_NXHX NXHX 1406 realview_pb11mp MACH_REALVIEW_PB11MP REALVIEW_PB11MP 1407 -ids500 MACH_IDS500 IDS500 1408 -ors_n725 MACH_ORS_N725 ORS_N725 1409 -hsdarm MACH_HSDARM HSDARM 1410 -sha_pon003 MACH_SHA_PON003 SHA_PON003 1411 -sha_pon004 MACH_SHA_PON004 SHA_PON004 1412 -sha_pon007 MACH_SHA_PON007 SHA_PON007 1413 -sha_pon011 MACH_SHA_PON011 SHA_PON011 1414 -h6042 MACH_H6042 H6042 1415 -h6043 MACH_H6043 H6043 1416 -looxc550 MACH_LOOXC550 LOOXC550 1417 -cnty_titan MACH_CNTY_TITAN CNTY_TITAN 1418 -app3xx MACH_APP3XX APP3XX 1419 -sideoatsgrama MACH_SIDEOATSGRAMA SIDEOATSGRAMA 1420 -treo700p MACH_TREO700P TREO700P 1421 -treo700w MACH_TREO700W TREO700W 1422 -treo750 MACH_TREO750 TREO750 1423 -treo755p MACH_TREO755P TREO755P 1424 -ezreganut9200 MACH_EZREGANUT9200 EZREGANUT9200 1425 -sarge MACH_SARGE SARGE 1426 -a696 MACH_A696 A696 1427 -turtle1916 MACH_TURTLE TURTLE 1428 mx27_3ds MACH_MX27_3DS MX27_3DS 1430 -bishop MACH_BISHOP BISHOP 1431 -pxx MACH_PXX PXX 1432 -redwood MACH_REDWOOD REDWOOD 1433 -omap_2430dlp MACH_OMAP_2430DLP OMAP_2430DLP 1436 -omap_2430osk MACH_OMAP_2430OSK OMAP_2430OSK 1437 -sardine MACH_SARDINE SARDINE 1438 halibut MACH_HALIBUT HALIBUT 1439 trout MACH_TROUT TROUT 1440 -goldfish MACH_GOLDFISH GOLDFISH 1441 -gesbc2440 MACH_GESBC2440 GESBC2440 1442 -nomad MACH_NOMAD NOMAD 1443 -rosalind MACH_ROSALIND ROSALIND 1444 -cc9p9215 MACH_CC9P9215 CC9P9215 1445 -cc9p9210 MACH_CC9P9210 CC9P9210 1446 -cc9p9215js MACH_CC9P9215JS CC9P9215JS 1447 -cc9p9210js MACH_CC9P9210JS CC9P9210JS 1448 -nasffe MACH_NASFFE NASFFE 1449 -tn2x0bd MACH_TN2X0BD TN2X0BD 1450 -gwmpxa MACH_GWMPXA GWMPXA 1451 -exyplus MACH_EXYPLUS EXYPLUS 1452 -jadoo21 MACH_JADOO21 JADOO21 1453 -looxn560 MACH_LOOXN560 LOOXN560 1454 -bonsai MACH_BONSAI BONSAI 1455 -adsmilgato MACH_ADSMILGATO ADSMILGATO 1456 -gba MACH_GBA GBA 1457 -h6044 MACH_H6044 H6044 1458 -app MACH_APP APP 1459 tct_hammer MACH_TCT_HAMMER TCT_HAMMER 1460 herald MACH_HERALD HERALD 1461 -artemis MACH_ARTEMIS ARTEMIS 1462 -htctitan MACH_HTCTITAN HTCTITAN 1463 -qranium MACH_QRANIUM QRANIUM 1464 -adx_wsc2 MACH_ADX_WSC2 ADX_WSC2 1465 -adx_medcom MACH_ADX_MEDCOM ADX_MEDCOM 1466 -bboard MACH_BBOARD BBOARD 1467 -cambria MACH_CAMBRIA CAMBRIA 1468 -mt7xxx MACH_MT7XXX MT7XXX 1469 -matrix512 MACH_MATRIX512 MATRIX512 1470 -matrix522 MACH_MATRIX522 MATRIX522 1471 -ipac5010 MACH_IPAC5010 IPAC5010 1472 -sakura MACH_SAKURA SAKURA 1473 -grocx MACH_GROCX GROCX 1474 -pm9263 MACH_PM9263 PM9263 1475 sim_one MACH_SIM_ONE SIM_ONE 1476 -acq132 MACH_ACQ132 ACQ132 1477 -datr MACH_DATR DATR 1478 -actux1 MACH_ACTUX1 ACTUX1 1479 -actux2 MACH_ACTUX2 ACTUX2 1480 -actux3 MACH_ACTUX3 ACTUX3 1481 -flexit MACH_FLEXIT FLEXIT 1482 -bh2x0bd MACH_BH2X0BD BH2X0BD 1483 -atb2002 MACH_ATB2002 ATB2002 1484 -xenon MACH_XENON XENON 1485 -fm607 MACH_FM607 FM607 1486 -matrix514 MACH_MATRIX514 MATRIX514 1487 -matrix524 MACH_MATRIX524 MATRIX524 1488 -inpod MACH_INPOD INPOD 1489 jive MACH_JIVE JIVE 1490 -tll_mx21 MACH_TLL_MX21 TLL_MX21 1491 -sbc2800 MACH_SBC2800 SBC2800 1492 -cc7ucamry MACH_CC7UCAMRY CC7UCAMRY 1493 -ubisys_p9_sc15 MACH_UBISYS_P9_SC15 UBISYS_P9_SC15 1494 -ubisys_p9_ssc2d10 MACH_UBISYS_P9_SSC2D10 UBISYS_P9_SSC2D10 1495 -ubisys_p9_rcu3 MACH_UBISYS_P9_RCU3 UBISYS_P9_RCU3 1496 -aml_m8000 MACH_AML_M8000 AML_M8000 1497 -snapper_270 MACH_SNAPPER_270 SNAPPER_270 1498 -omap_bbx MACH_OMAP_BBX OMAP_BBX 1499 -ucn2410 MACH_UCN2410 UCN2410 1500 sam9_l9260 MACH_SAM9_L9260 SAM9_L9260 1501 -eti_c2 MACH_ETI_C2 ETI_C2 1502 -avalanche MACH_AVALANCHE AVALANCHE 1503 realview_pb1176 MACH_REALVIEW_PB1176 REALVIEW_PB1176 1504 -dp1500 MACH_DP1500 DP1500 1505 -apple_iphone MACH_APPLE_IPHONE APPLE_IPHONE 1506 yl9200 MACH_YL9200 YL9200 1507 rd88f5182 MACH_RD88F5182 RD88F5182 1508 kurobox_pro MACH_KUROBOX_PRO KUROBOX_PRO 1509 -se_poet MACH_SE_POET SE_POET 1510 mx31_3ds MACH_MX31_3DS MX31_3DS 1511 -r270 MACH_R270 R270 1512 -armour21 MACH_ARMOUR21 ARMOUR21 1513 -dt2 MACH_DT2 DT2 1514 -vt4 MACH_VT4 VT4 1515 -tyco320 MACH_TYCO320 TYCO320 1516 -adma MACH_ADMA ADMA 1517 -wp188 MACH_WP188 WP188 1518 -corsica MACH_CORSICA CORSICA 1519 -bigeye MACH_BIGEYE BIGEYE 1520 -tll5000 MACH_TLL5000 TLL5000 1522 -bebot MACH_BEBOT BEBOT 1523 qong MACH_QONG QONG 1524 -tcompact MACH_TCOMPACT TCOMPACT 1525 -puma5 MACH_PUMA5 PUMA5 1526 -elara MACH_ELARA ELARA 1527 -ellington MACH_ELLINGTON ELLINGTON 1528 -xda_atom MACH_XDA_ATOM XDA_ATOM 1529 -energizer2 MACH_ENERGIZER2 ENERGIZER2 1530 -odin MACH_ODIN ODIN 1531 -actux4 MACH_ACTUX4 ACTUX4 1532 -esl_omap MACH_ESL_OMAP ESL_OMAP 1533 omap2evm MACH_OMAP2EVM OMAP2EVM 1534 omap3evm MACH_OMAP3EVM OMAP3EVM 1535 -adx_pcu57 MACH_ADX_PCU57 ADX_PCU57 1536 -monaco MACH_MONACO MONACO 1537 -levante MACH_LEVANTE LEVANTE 1538 -tmxipx425 MACH_TMXIPX425 TMXIPX425 1539 -leep MACH_LEEP LEEP 1540 -raad MACH_RAAD RAAD 1541 dns323 MACH_DNS323 DNS323 1542 -ap1000 MACH_AP1000 AP1000 1543 -a9sam6432 MACH_A9SAM6432 A9SAM6432 1544 -shiny MACH_SHINY SHINY 1545 omap3_beagle MACH_OMAP3_BEAGLE OMAP3_BEAGLE 1546 -csr_bdb2 MACH_CSR_BDB2 CSR_BDB2 1547 nokia_n810 MACH_NOKIA_N810 NOKIA_N810 1548 -c270 MACH_C270 C270 1549 -sentry MACH_SENTRY SENTRY 1550 pcm038 MACH_PCM038 PCM038 1551 -anc300 MACH_ANC300 ANC300 1552 -htckaiser MACH_HTCKAISER HTCKAISER 1553 -sbat100 MACH_SBAT100 SBAT100 1554 -modunorm MACH_MODUNORM MODUNORM 1555 -pelos_twarm MACH_PELOS_TWARM PELOS_TWARM 1556 -flank MACH_FLANK FLANK 1557 -sirloin MACH_SIRLOIN SIRLOIN 1558 -brisket MACH_BRISKET BRISKET 1559 -chuck MACH_CHUCK CHUCK 1560 -otter MACH_OTTER OTTER 1561 -davinci_ldk MACH_DAVINCI_LDK DAVINCI_LDK 1562 -phreedom MACH_PHREEDOM PHREEDOM 1563 -sg310 MACH_SG310 SG310 1564 ts_x09 MACH_TS209 TS209 1565 at91cap9adk MACH_AT91CAP9ADK AT91CAP9ADK 1566 -tion9315 MACH_TION9315 TION9315 1567 -mast MACH_MAST MAST 1568 -pfw MACH_PFW PFW 1569 -yl_p2440 MACH_YL_P2440 YL_P2440 1570 -zsbc32 MACH_ZSBC32 ZSBC32 1571 -omap_pace2 MACH_OMAP_PACE2 OMAP_PACE2 1572 -imx_pace2 MACH_IMX_PACE2 IMX_PACE2 1573 mx31moboard MACH_MX31MOBOARD MX31MOBOARD 1574 -mx37_3ds MACH_MX37_3DS MX37_3DS 1575 -rcc MACH_RCC RCC 1576 -dmp MACH_ARM9 ARM9 1577 -vision_ep9307 MACH_VISION_EP9307 VISION_EP9307 1578 -scly1000 MACH_SCLY1000 SCLY1000 1579 -fontel_ep MACH_FONTEL_EP FONTEL_EP 1580 -voiceblue3g MACH_VOICEBLUE3G VOICEBLUE3G 1581 -tt9200 MACH_TT9200 TT9200 1582 -digi2410 MACH_DIGI2410 DIGI2410 1583 terastation_pro2 MACH_TERASTATION_PRO2 TERASTATION_PRO2 1584 linkstation_pro MACH_LINKSTATION_PRO LINKSTATION_PRO 1585 -motorola_a780 MACH_MOTOROLA_A780 MOTOROLA_A780 1587 -motorola_e6 MACH_MOTOROLA_E6 MOTOROLA_E6 1588 -motorola_e2 MACH_MOTOROLA_E2 MOTOROLA_E2 1589 -motorola_e680 MACH_MOTOROLA_E680 MOTOROLA_E680 1590 -ur2410 MACH_UR2410 UR2410 1591 -tas9261 MACH_TAS9261 TAS9261 1592 -davinci_hermes_hd MACH_HERMES_HD HERMES_HD 1593 -davinci_perseo_hd MACH_PERSEO_HD PERSEO_HD 1594 -stargazer2 MACH_STARGAZER2 STARGAZER2 1595 e350 MACH_E350 E350 1596 -wpcm450 MACH_WPCM450 WPCM450 1597 -cartesio MACH_CARTESIO CARTESIO 1598 -toybox MACH_TOYBOX TOYBOX 1599 -tx27 MACH_TX27 TX27 1600 ts409 MACH_TS409 TS409 1601 -p300 MACH_P300 P300 1602 -xdacomet MACH_XDACOMET XDACOMET 1603 -dexflex2 MACH_DEXFLEX2 DEXFLEX2 1604 -ow MACH_OW OW 1605 -armebs3 MACH_ARMEBS3 ARMEBS3 1606 -u3 MACH_U3 U3 1607 -smdk2450 MACH_SMDK2450 SMDK2450 1608 -rsi_ews MACH_RSI_EWS RSI_EWS 1609 -tnb MACH_TNB TNB 1610 -toepath MACH_TOEPATH TOEPATH 1611 -kb9263 MACH_KB9263 KB9263 1612 -mt7108 MACH_MT7108 MT7108 1613 -smtr2440 MACH_SMTR2440 SMTR2440 1614 -manao MACH_MANAO MANAO 1615 cm_x300 MACH_CM_X300 CM_X300 1616 -gulfstream_kp MACH_GULFSTREAM_KP GULFSTREAM_KP 1617 -lanreadyfn522 MACH_LANREADYFN522 LANREADYFN522 1618 -arma37 MACH_ARMA37 ARMA37 1619 -mendel MACH_MENDEL MENDEL 1620 -pelco_iliad MACH_PELCO_ILIAD PELCO_ILIAD 1621 -unit2p MACH_UNIT2P UNIT2P 1622 -inc20otter MACH_INC20OTTER INC20OTTER 1623 at91sam9g20ek MACH_AT91SAM9G20EK AT91SAM9G20EK 1624 -sc_ge2 MACH_STORCENTER STORCENTER 1625 smdk6410 MACH_SMDK6410 SMDK6410 1626 u300 MACH_U300 U300 1627 -u500 MACH_U500 U500 1628 -ds9260 MACH_DS9260 DS9260 1629 -riverrock MACH_RIVERROCK RIVERROCK 1630 -scibath MACH_SCIBATH SCIBATH 1631 -at91sam7se MACH_AT91SAM7SE512EK AT91SAM7SE512EK 1632 wrt350n_v2 MACH_WRT350N_V2 WRT350N_V2 1633 -multimedia MACH_MULTIMEDIA MULTIMEDIA 1634 -marvin MACH_MARVIN MARVIN 1635 -x500 MACH_X500 X500 1636 -awlug4lcu MACH_AWLUG4LCU AWLUG4LCU 1637 -palermoc MACH_PALERMOC PALERMOC 1638 omap_ldp MACH_OMAP_LDP OMAP_LDP 1639 -ip500 MACH_IP500 IP500 1640 -ase2 MACH_ASE2 ASE2 1642 -mx35evb MACH_MX35EVB MX35EVB 1643 -aml_m8050 MACH_AML_M8050 AML_M8050 1644 mx35_3ds MACH_MX35_3DS MX35_3DS 1645 -mars MACH_MARS MARS 1646 neuros_osd2 MACH_NEUROS_OSD2 NEUROS_OSD2 1647 -badger MACH_BADGER BADGER 1648 trizeps4wl MACH_TRIZEPS4WL TRIZEPS4WL 1649 -trizeps5 MACH_TRIZEPS5 TRIZEPS5 1650 -marlin MACH_MARLIN MARLIN 1651 ts78xx MACH_TS78XX TS78XX 1652 -hpipaq214 MACH_HPIPAQ214 HPIPAQ214 1653 -at572d940dcm MACH_AT572D940DCM AT572D940DCM 1654 -ne1board MACH_NE1BOARD NE1BOARD 1655 -zante MACH_ZANTE ZANTE 1656 sffsdr MACH_SFFSDR SFFSDR 1657 -tw2662 MACH_TW2662 TW2662 1658 -vf10xx MACH_VF10XX VF10XX 1659 -zoran43xx MACH_ZORAN43XX ZORAN43XX 1660 -sonix926 MACH_SONIX926 SONIX926 1661 -celestialsemi MACH_CELESTIALSEMI CELESTIALSEMI 1662 -cc9m2443js MACH_CC9M2443JS CC9M2443JS 1663 -tw5334 MACH_TW5334 TW5334 1664 -omap_htcartemis MACH_HTCARTEMIS HTCARTEMIS 1665 -nal_hlite MACH_NAL_HLITE NAL_HLITE 1666 -htcvogue MACH_HTCVOGUE HTCVOGUE 1667 -smartweb MACH_SMARTWEB SMARTWEB 1668 -mv86xx MACH_MV86XX MV86XX 1669 -mv87xx MACH_MV87XX MV87XX 1670 -songyoungho MACH_SONGYOUNGHO SONGYOUNGHO 1671 -younghotema MACH_YOUNGHOTEMA YOUNGHOTEMA 1672 pcm037 MACH_PCM037 PCM037 1673 -mmvp MACH_MMVP MMVP 1674 -mmap MACH_MMAP MMAP 1675 -ptid2410 MACH_PTID2410 PTID2410 1676 -james_926 MACH_JAMES_926 JAMES_926 1677 -fm6000 MACH_FM6000 FM6000 1678 db88f6281_bp MACH_DB88F6281_BP DB88F6281_BP 1680 rd88f6192_nas MACH_RD88F6192_NAS RD88F6192_NAS 1681 rd88f6281 MACH_RD88F6281 RD88F6281 1682 db78x00_bp MACH_DB78X00_BP DB78X00_BP 1683 smdk2416 MACH_SMDK2416 SMDK2416 1685 -oce_spider_si MACH_OCE_SPIDER_SI OCE_SPIDER_SI 1686 -oce_spider_sk MACH_OCE_SPIDER_SK OCE_SPIDER_SK 1687 -rovern6 MACH_ROVERN6 ROVERN6 1688 -pelco_evolution MACH_PELCO_EVOLUTION PELCO_EVOLUTION 1689 wbd111 MACH_WBD111 WBD111 1690 -elaracpe MACH_ELARACPE ELARACPE 1691 -mabv3 MACH_MABV3 MABV3 1692 mv2120 MACH_MV2120 MV2120 1693 -csb737 MACH_CSB737 CSB737 1695 mx51_3ds MACH_MX51_3DS MX51_3DS 1696 -g900 MACH_G900 G900 1697 -apf27 MACH_APF27 APF27 1698 -ggus2000 MACH_GGUS2000 GGUS2000 1699 -omap_2430_mimic MACH_OMAP_2430_MIMIC OMAP_2430_MIMIC 1700 imx27lite MACH_IMX27LITE IMX27LITE 1701 -almex MACH_ALMEX ALMEX 1702 -control MACH_CONTROL CONTROL 1703 -mba2410 MACH_MBA2410 MBA2410 1704 -volcano MACH_VOLCANO VOLCANO 1705 -zenith MACH_ZENITH ZENITH 1706 -muchip MACH_MUCHIP MUCHIP 1707 -magellan MACH_MAGELLAN MAGELLAN 1708 usb_a9260 MACH_USB_A9260 USB_A9260 1709 usb_a9263 MACH_USB_A9263 USB_A9263 1710 qil_a9260 MACH_QIL_A9260 QIL_A9260 1711 -cme9210 MACH_CME9210 CME9210 1712 -hczh4 MACH_HCZH4 HCZH4 1713 -spearbasic MACH_SPEARBASIC SPEARBASIC 1714 -dep2440 MACH_DEP2440 DEP2440 1715 -hdl_gxr MACH_HDL_GXR HDL_GXR 1716 -hdl_gt MACH_HDL_GT HDL_GT 1717 -hdl_4g MACH_HDL_4G HDL_4G 1718 -s3c6000 MACH_S3C6000 S3C6000 1719 -mmsp2_mdk MACH_MMSP2_MDK MMSP2_MDK 1720 -mpx220 MACH_MPX220 MPX220 1721 kzm_arm11_01 MACH_KZM_ARM11_01 KZM_ARM11_01 1722 -htc_polaris MACH_HTC_POLARIS HTC_POLARIS 1723 -htc_kaiser MACH_HTC_KAISER HTC_KAISER 1724 -lg_ks20 MACH_LG_KS20 LG_KS20 1725 -hhgps MACH_HHGPS HHGPS 1726 nokia_n810_wimax MACH_NOKIA_N810_WIMAX NOKIA_N810_WIMAX 1727 -insight MACH_INSIGHT INSIGHT 1728 sapphire MACH_SAPPHIRE SAPPHIRE 1729 -csb637xo MACH_CSB637XO CSB637XO 1730 -evisiong MACH_EVISIONG EVISIONG 1731 stmp37xx MACH_STMP37XX STMP37XX 1732 stmp378x MACH_STMP378X STMP378X 1733 -tnt MACH_TNT TNT 1734 -tbxt MACH_TBXT TBXT 1735 -playmate MACH_PLAYMATE PLAYMATE 1736 -pns10 MACH_PNS10 PNS10 1737 -eznavi MACH_EZNAVI EZNAVI 1738 -ps4000 MACH_PS4000 PS4000 1739 ezx_a780 MACH_EZX_A780 EZX_A780 1740 ezx_e680 MACH_EZX_E680 EZX_E680 1741 ezx_a1200 MACH_EZX_A1200 EZX_A1200 1742 ezx_e6 MACH_EZX_E6 EZX_E6 1743 ezx_e2 MACH_EZX_E2 EZX_E2 1744 ezx_a910 MACH_EZX_A910 EZX_A910 1745 -cwmx31 MACH_CWMX31 CWMX31 1746 -sl2312 MACH_SL2312 SL2312 1747 -blenny MACH_BLENNY BLENNY 1748 -ds107 MACH_DS107 DS107 1749 -dsx07 MACH_DSX07 DSX07 1750 -picocom1 MACH_PICOCOM1 PICOCOM1 1751 -lynx_wolverine MACH_LYNX_WOLVERINE LYNX_WOLVERINE 1752 -ubisys_p9_sc19 MACH_UBISYS_P9_SC19 UBISYS_P9_SC19 1753 -kratos_low MACH_KRATOS_LOW KRATOS_LOW 1754 -m700 MACH_M700 M700 1755 edmini_v2 MACH_EDMINI_V2 EDMINI_V2 1756 zipit2 MACH_ZIPIT2 ZIPIT2 1757 -hslfemtocell MACH_HSLFEMTOCELL HSLFEMTOCELL 1758 -daintree_at91 MACH_DAINTREE_AT91 DAINTREE_AT91 1759 -sg560usb MACH_SG560USB SG560USB 1760 omap3_pandora MACH_OMAP3_PANDORA OMAP3_PANDORA 1761 -usr8200 MACH_USR8200 USR8200 1762 -s1s65k MACH_S1S65K S1S65K 1763 -s2s65a MACH_S2S65A S2S65A 1764 -icore MACH_ICORE ICORE 1765 mss2 MACH_MSS2 MSS2 1766 -belmont MACH_BELMONT BELMONT 1767 -asusp525 MACH_ASUSP525 ASUSP525 1768 lb88rc8480 MACH_LB88RC8480 LB88RC8480 1769 -hipxa MACH_HIPXA HIPXA 1770 mx25_3ds MACH_MX25_3DS MX25_3DS 1771 -m800 MACH_M800 M800 1772 omap3530_lv_som MACH_OMAP3530_LV_SOM OMAP3530_LV_SOM 1773 -prima_evb MACH_PRIMA_EVB PRIMA_EVB 1774 -mx31bt1 MACH_MX31BT1 MX31BT1 1775 -atlas4_evb MACH_ATLAS4_EVB ATLAS4_EVB 1776 -mx31cicada MACH_MX31CICADA MX31CICADA 1777 -mi424wr MACH_MI424WR MI424WR 1778 -axs_ultrax MACH_AXS_ULTRAX AXS_ULTRAX 1779 -at572d940deb MACH_AT572D940DEB AT572D940DEB 1780 davinci_da830_evm MACH_DAVINCI_DA830_EVM DAVINCI_DA830_EVM 1781 -ep9302 MACH_EP9302 EP9302 1782 at572d940hfek MACH_AT572D940HFEB AT572D940HFEB 1783 -cybook3 MACH_CYBOOK3 CYBOOK3 1784 -wdg002 MACH_WDG002 WDG002 1785 -sg560adsl MACH_SG560ADSL SG560ADSL 1786 -nextio_n2800_ica MACH_NEXTIO_N2800_ICA NEXTIO_N2800_ICA 1787 dove_db MACH_DOVE_DB DOVE_DB 1788 -marvell_newdb MACH_MARVELL_NEWDB MARVELL_NEWDB 1789 -vandihud MACH_VANDIHUD VANDIHUD 1790 -magx_e8 MACH_MAGX_E8 MAGX_E8 1791 -magx_z6 MACH_MAGX_Z6 MAGX_Z6 1792 -magx_v8 MACH_MAGX_V8 MAGX_V8 1793 -magx_u9 MACH_MAGX_U9 MAGX_U9 1794 -toughcf08 MACH_TOUGHCF08 TOUGHCF08 1795 -zw4400 MACH_ZW4400 ZW4400 1796 -marat91 MACH_MARAT91 MARAT91 1797 overo MACH_OVERO OVERO 1798 at2440evb MACH_AT2440EVB AT2440EVB 1799 neocore926 MACH_NEOCORE926 NEOCORE926 1800 wnr854t MACH_WNR854T WNR854T 1801 -imx27 MACH_IMX27 IMX27 1802 -moose_db MACH_MOOSE_DB MOOSE_DB 1803 -fab4 MACH_FAB4 FAB4 1804 -htcdiamond MACH_HTCDIAMOND HTCDIAMOND 1805 -fiona MACH_FIONA FIONA 1806 -mxc30030_x MACH_MXC30030_X MXC30030_X 1807 -bmp1000 MACH_BMP1000 BMP1000 1808 -logi9200 MACH_LOGI9200 LOGI9200 1809 -tqma31 MACH_TQMA31 TQMA31 1810 -ccw9p9215js MACH_CCW9P9215JS CCW9P9215JS 1811 rd88f5181l_ge MACH_RD88F5181L_GE RD88F5181L_GE 1812 -sifmain MACH_SIFMAIN SIFMAIN 1813 -sam9_l9261 MACH_SAM9_L9261 SAM9_L9261 1814 -cc9m2443 MACH_CC9M2443 CC9M2443 1815 -xaria300 MACH_XARIA300 XARIA300 1816 -it9200 MACH_IT9200 IT9200 1817 rd88f5181l_fxo MACH_RD88F5181L_FXO RD88F5181L_FXO 1818 -kriss_sensor MACH_KRISS_SENSOR KRISS_SENSOR 1819 -pilz_pmi5 MACH_PILZ_PMI5 PILZ_PMI5 1820 -jade MACH_JADE JADE 1821 -ks8695_softplc MACH_KS8695_SOFTPLC KS8695_SOFTPLC 1822 -gprisc3 MACH_GPRISC3 GPRISC3 1823 stamp9g20 MACH_STAMP9G20 STAMP9G20 1824 -smdk6430 MACH_SMDK6430 SMDK6430 1825 smdkc100 MACH_SMDKC100 SMDKC100 1826 tavorevb MACH_TAVOREVB TAVOREVB 1827 saar MACH_SAAR SAAR 1828 -deister_eyecam MACH_DEISTER_EYECAM DEISTER_EYECAM 1829 at91sam9m10g45ek MACH_AT91SAM9M10G45EK AT91SAM9M10G45EK 1830 -linkstation_produo MACH_LINKSTATION_PRODUO LINKSTATION_PRODUO 1831 -hit_b0 MACH_HIT_B0 HIT_B0 1832 -adx_rmu MACH_ADX_RMU ADX_RMU 1833 -xg_cpe_main MACH_XG_CPE_MAIN XG_CPE_MAIN 1834 -edb9407a MACH_EDB9407A EDB9407A 1835 -dtb9608 MACH_DTB9608 DTB9608 1836 -em104v1 MACH_EM104V1 EM104V1 1837 -demo MACH_DEMO DEMO 1838 -logi9260 MACH_LOGI9260 LOGI9260 1839 -mx31_exm32 MACH_MX31_EXM32 MX31_EXM32 1840 -usb_a9g20 MACH_USB_A9G20 USB_A9G20 1841 -picproje2008 MACH_PICPROJE2008 PICPROJE2008 1842 -cs_e9315 MACH_CS_E9315 CS_E9315 1843 -qil_a9g20 MACH_QIL_A9G20 QIL_A9G20 1844 -sha_pon020 MACH_SHA_PON020 SHA_PON020 1845 -nad MACH_NAD NAD 1846 -sbc35_a9260 MACH_SBC35_A9260 SBC35_A9260 1847 -sbc35_a9g20 MACH_SBC35_A9G20 SBC35_A9G20 1848 -davinci_beginning MACH_DAVINCI_BEGINNING DAVINCI_BEGINNING 1849 -uwc MACH_UWC UWC 1850 mxlads MACH_MXLADS MXLADS 1851 -htcnike MACH_HTCNIKE HTCNIKE 1852 -deister_pxa270 MACH_DEISTER_PXA270 DEISTER_PXA270 1853 -cme9210js MACH_CME9210JS CME9210JS 1854 -cc9p9360 MACH_CC9P9360 CC9P9360 1855 -mocha MACH_MOCHA MOCHA 1856 -wapd170ag MACH_WAPD170AG WAPD170AG 1857 linkstation_mini MACH_LINKSTATION_MINI LINKSTATION_MINI 1858 afeb9260 MACH_AFEB9260 AFEB9260 1859 -w90x900 MACH_W90X900 W90X900 1860 -w90x700 MACH_W90X700 W90X700 1861 -kt300ip MACH_KT300IP KT300IP 1862 -kt300ip_g20 MACH_KT300IP_G20 KT300IP_G20 1863 -srcm MACH_SRCM SRCM 1864 -wlnx_9260 MACH_WLNX_9260 WLNX_9260 1865 -openmoko_gta03 MACH_OPENMOKO_GTA03 OPENMOKO_GTA03 1866 -osprey2 MACH_OSPREY2 OSPREY2 1867 -kbio9260 MACH_KBIO9260 KBIO9260 1868 -ginza MACH_GINZA GINZA 1869 -a636n MACH_A636N A636N 1870 imx27ipcam MACH_IMX27IPCAM IMX27IPCAM 1871 -nemoc MACH_NEMOC NEMOC 1872 -geneva MACH_GENEVA GENEVA 1873 -htcpharos MACH_HTCPHAROS HTCPHAROS 1874 -neonc MACH_NEONC NEONC 1875 -nas7100 MACH_NAS7100 NAS7100 1876 -teuphone MACH_TEUPHONE TEUPHONE 1877 -annax_eth2 MACH_ANNAX_ETH2 ANNAX_ETH2 1878 -csb733 MACH_CSB733 CSB733 1879 -bk3 MACH_BK3 BK3 1880 -omap_em32 MACH_OMAP_EM32 OMAP_EM32 1881 -et9261cp MACH_ET9261CP ET9261CP 1882 -jasperc MACH_JASPERC JASPERC 1883 -issi_arm9 MACH_ISSI_ARM9 ISSI_ARM9 1884 -ued MACH_UED UED 1885 -esiblade MACH_ESIBLADE ESIBLADE 1886 -eye02 MACH_EYE02 EYE02 1887 -imx27kbd MACH_IMX27KBD IMX27KBD 1888 -sst61vc010_fpga MACH_SST61VC010_FPGA SST61VC010_FPGA 1889 -kixvp435 MACH_KIXVP435 KIXVP435 1890 -kixnp435 MACH_KIXNP435 KIXNP435 1891 -africa MACH_AFRICA AFRICA 1892 -nh233 MACH_NH233 NH233 1893 rd88f6183ap_ge MACH_RD88F6183AP_GE RD88F6183AP_GE 1894 -bcm4760 MACH_BCM4760 BCM4760 1895 -eddy_v2 MACH_EDDY_V2 EDDY_V2 1896 realview_pba8 MACH_REALVIEW_PBA8 REALVIEW_PBA8 1897 -hid_a7 MACH_HID_A7 HID_A7 1898 -hero MACH_HERO HERO 1899 -omap_poseidon MACH_OMAP_POSEIDON OMAP_POSEIDON 1900 realview_pbx MACH_REALVIEW_PBX REALVIEW_PBX 1901 micro9s MACH_MICRO9S MICRO9S 1902 -mako MACH_MAKO MAKO 1903 -xdaflame MACH_XDAFLAME XDAFLAME 1904 -phidget_sbc2 MACH_PHIDGET_SBC2 PHIDGET_SBC2 1905 -limestone MACH_LIMESTONE LIMESTONE 1906 -iprobe_c32 MACH_IPROBE_C32 IPROBE_C32 1907 rut100 MACH_RUT100 RUT100 1908 -asusp535 MACH_ASUSP535 ASUSP535 1909 -htcraphael MACH_HTCRAPHAEL HTCRAPHAEL 1910 -sygdg1 MACH_SYGDG1 SYGDG1 1911 -sygdg2 MACH_SYGDG2 SYGDG2 1912 -seoul MACH_SEOUL SEOUL 1913 -salerno MACH_SALERNO SALERNO 1914 -ucn_s3c64xx MACH_UCN_S3C64XX UCN_S3C64XX 1915 -msm7201a MACH_MSM7201A MSM7201A 1916 -lpr1 MACH_LPR1 LPR1 1917 -armadillo500fx MACH_ARMADILLO500FX ARMADILLO500FX 1918 g3evm MACH_G3EVM G3EVM 1919 -z3_dm355 MACH_Z3_DM355 Z3_DM355 1920 w90p910evb MACH_W90P910EVB W90P910EVB 1921 -w90p920evb MACH_W90P920EVB W90P920EVB 1922 w90p950evb MACH_W90P950EVB W90P950EVB 1923 w90n960evb MACH_W90N960EVB W90N960EVB 1924 -camhd MACH_CAMHD CAMHD 1925 -mvc100 MACH_MVC100 MVC100 1926 -electrum_200 MACH_ELECTRUM_200 ELECTRUM_200 1927 -htcjade MACH_HTCJADE HTCJADE 1928 -memphis MACH_MEMPHIS MEMPHIS 1929 -imx27sbc MACH_IMX27SBC IMX27SBC 1930 -lextar MACH_LEXTAR LEXTAR 1931 mv88f6281gtw_ge MACH_MV88F6281GTW_GE MV88F6281GTW_GE 1932 ncp MACH_NCP NCP 1933 -z32an_series MACH_Z32AN Z32AN 1934 -tmq_capd MACH_TMQ_CAPD TMQ_CAPD 1935 -omap3_wl MACH_OMAP3_WL OMAP3_WL 1936 -chumby MACH_CHUMBY CHUMBY 1937 -atsarm9 MACH_ATSARM9 ATSARM9 1938 davinci_dm365_evm MACH_DAVINCI_DM365_EVM DAVINCI_DM365_EVM 1939 -bahamas MACH_BAHAMAS BAHAMAS 1940 -das MACH_DAS DAS 1941 -minidas MACH_MINIDAS MINIDAS 1942 -vk1000 MACH_VK1000 VK1000 1943 centro MACH_CENTRO CENTRO 1944 -ctera_2bay MACH_CTERA_2BAY CTERA_2BAY 1945 -edgeconnect MACH_EDGECONNECT EDGECONNECT 1946 -nd27000 MACH_ND27000 ND27000 1947 -cobra MACH_GEMALTO_COBRA GEMALTO_COBRA 1948 -ingelabs_comet MACH_INGELABS_COMET INGELABS_COMET 1949 -pollux_wiz MACH_POLLUX_WIZ POLLUX_WIZ 1950 -blackstone MACH_BLACKSTONE BLACKSTONE 1951 -topaz MACH_TOPAZ TOPAZ 1952 -aixle MACH_AIXLE AIXLE 1953 -mw998 MACH_MW998 MW998 1954 nokia_rx51 MACH_NOKIA_RX51 NOKIA_RX51 1955 -vsc5605ev MACH_VSC5605EV VSC5605EV 1956 -nt98700dk MACH_NT98700DK NT98700DK 1957 -icontact MACH_ICONTACT ICONTACT 1958 -swarco_frcpu MACH_SWARCO_FRCPU SWARCO_FRCPU 1959 -swarco_scpu MACH_SWARCO_SCPU SWARCO_SCPU 1960 -bbox_p16 MACH_BBOX_P16 BBOX_P16 1961 -bstd MACH_BSTD BSTD 1962 -sbc2440ii MACH_SBC2440II SBC2440II 1963 -pcm034 MACH_PCM034 PCM034 1964 -neso MACH_NESO NESO 1965 -wlnx_9g20 MACH_WLNX_9G20 WLNX_9G20 1966 omap_zoom2 MACH_OMAP_ZOOM2 OMAP_ZOOM2 1967 -totemnova MACH_TOTEMNOVA TOTEMNOVA 1968 -c5000 MACH_C5000 C5000 1969 -unipo_at91sam9263 MACH_UNIPO_AT91SAM9263 UNIPO_AT91SAM9263 1970 -ethernut5 MACH_ETHERNUT5 ETHERNUT5 1971 -arm11 MACH_ARM11 ARM11 1972 cpuat9260 MACH_CPUAT9260 CPUAT9260 1973 -cpupxa255 MACH_CPUPXA255 CPUPXA255 1974 eukrea_cpuimx27 MACH_CPUIMX27 CPUIMX27 1975 -cheflux MACH_CHEFLUX CHEFLUX 1976 -eb_cpux9k2 MACH_EB_CPUX9K2 EB_CPUX9K2 1977 -opcotec MACH_OPCOTEC OPCOTEC 1978 -yt MACH_YT YT 1979 -motoq MACH_MOTOQ MOTOQ 1980 -bsb1 MACH_BSB1 BSB1 1981 acs5k MACH_ACS5K ACS5K 1982 -milan MACH_MILAN MILAN 1983 -quartzv2 MACH_QUARTZV2 QUARTZV2 1984 -rsvp MACH_RSVP RSVP 1985 -rmp200 MACH_RMP200 RMP200 1986 snapper_9260 MACH_SNAPPER_9260 SNAPPER_9260 1987 dsm320 MACH_DSM320 DSM320 1988 -adsgcm MACH_ADSGCM ADSGCM 1989 -ase2_400 MACH_ASE2_400 ASE2_400 1990 -pizza MACH_PIZZA PIZZA 1991 -spot_ngpl MACH_SPOT_NGPL SPOT_NGPL 1992 -armata MACH_ARMATA ARMATA 1993 exeda MACH_EXEDA EXEDA 1994 -mx31sf005 MACH_MX31SF005 MX31SF005 1995 -f5d8231_4_v2 MACH_F5D8231_4_V2 F5D8231_4_V2 1996 -q2440 MACH_Q2440 Q2440 1997 -qq2440 MACH_QQ2440 QQ2440 1998 mini2440 MACH_MINI2440 MINI2440 1999 colibri300 MACH_COLIBRI300 COLIBRI300 2000 -jades MACH_JADES JADES 2001 -spark MACH_SPARK SPARK 2002 -benzina MACH_BENZINA BENZINA 2003 -blaze MACH_BLAZE BLAZE 2004 linkstation_ls_hgl MACH_LINKSTATION_LS_HGL LINKSTATION_LS_HGL 2005 -htckovsky MACH_HTCKOVSKY HTCKOVSKY 2006 -sony_prs505 MACH_SONY_PRS505 SONY_PRS505 2007 -hanlin_v3 MACH_HANLIN_V3 HANLIN_V3 2008 -sapphira MACH_SAPPHIRA SAPPHIRA 2009 -dack_sda_01 MACH_DACK_SDA_01 DACK_SDA_01 2010 -armbox MACH_ARMBOX ARMBOX 2011 -harris_rvp MACH_HARRIS_RVP HARRIS_RVP 2012 -ribaldo MACH_RIBALDO RIBALDO 2013 -agora MACH_AGORA AGORA 2014 -omap3_mini MACH_OMAP3_MINI OMAP3_MINI 2015 -a9sam6432_b MACH_A9SAM6432_B A9SAM6432_B 2016 -usg2410 MACH_USG2410 USG2410 2017 -pc72052_i10_revb MACH_PC72052_I10_REVB PC72052_I10_REVB 2018 -mx35_exm32 MACH_MX35_EXM32 MX35_EXM32 2019 -topas910 MACH_TOPAS910 TOPAS910 2020 -hyena MACH_HYENA HYENA 2021 -pospax MACH_POSPAX POSPAX 2022 -hdl_gx MACH_HDL_GX HDL_GX 2023 -ctera_4bay MACH_CTERA_4BAY CTERA_4BAY 2024 -ctera_plug_c MACH_CTERA_PLUG_C CTERA_PLUG_C 2025 -crwea_plug_i MACH_CRWEA_PLUG_I CRWEA_PLUG_I 2026 -egauge2 MACH_EGAUGE2 EGAUGE2 2027 -didj MACH_DIDJ DIDJ 2028 -m_s3c2443 MACH_MEISTER MEISTER 2029 -htcblackstone MACH_HTCBLACKSTONE HTCBLACKSTONE 2030 cpuat9g20 MACH_CPUAT9G20 CPUAT9G20 2031 smdk6440 MACH_SMDK6440 SMDK6440 2032 -omap_35xx_mvp MACH_OMAP_35XX_MVP OMAP_35XX_MVP 2033 -ctera_plug_i MACH_CTERA_PLUG_I CTERA_PLUG_I 2034 -pvg610_100 MACH_PVG610 PVG610 2035 -hprw6815 MACH_HPRW6815 HPRW6815 2036 -omap3_oswald MACH_OMAP3_OSWALD OMAP3_OSWALD 2037 nas4220b MACH_NAS4220B NAS4220B 2038 -htcraphael_cdma MACH_HTCRAPHAEL_CDMA HTCRAPHAEL_CDMA 2039 -htcdiamond_cdma MACH_HTCDIAMOND_CDMA HTCDIAMOND_CDMA 2040 -scaler MACH_SCALER SCALER 2041 zylonite2 MACH_ZYLONITE2 ZYLONITE2 2042 aspenite MACH_ASPENITE ASPENITE 2043 -teton MACH_TETON TETON 2044 ttc_dkb MACH_TTC_DKB TTC_DKB 2045 -bishop2 MACH_BISHOP2 BISHOP2 2046 -ippv5 MACH_IPPV5 IPPV5 2047 -farm926 MACH_FARM926 FARM926 2048 -mmccpu MACH_MMCCPU MMCCPU 2049 -sgmsfl MACH_SGMSFL SGMSFL 2050 -tt8000 MACH_TT8000 TT8000 2051 -zrn4300lp MACH_ZRN4300LP ZRN4300LP 2052 -mptc MACH_MPTC MPTC 2053 -h6051 MACH_H6051 H6051 2054 -pvg610_101 MACH_PVG610_101 PVG610_101 2055 -stamp9261_pc_evb MACH_STAMP9261_PC_EVB STAMP9261_PC_EVB 2056 -pelco_odysseus MACH_PELCO_ODYSSEUS PELCO_ODYSSEUS 2057 -tny_a9260 MACH_TNY_A9260 TNY_A9260 2058 -tny_a9g20 MACH_TNY_A9G20 TNY_A9G20 2059 -aesop_mp2530f MACH_AESOP_MP2530F AESOP_MP2530F 2060 -dx900 MACH_DX900 DX900 2061 -cpodc2 MACH_CPODC2 CPODC2 2062 -tilt_8925 MACH_TILT_8925 TILT_8925 2063 -davinci_dm357_evm MACH_DAVINCI_DM357_EVM DAVINCI_DM357_EVM 2064 -swordfish MACH_SWORDFISH SWORDFISH 2065 -corvus MACH_CORVUS CORVUS 2066 -taurus MACH_TAURUS TAURUS 2067 -axm MACH_AXM AXM 2068 -axc MACH_AXC AXC 2069 -baby MACH_BABY BABY 2070 -mp200 MACH_MP200 MP200 2071 pcm043 MACH_PCM043 PCM043 2072 -hanlin_v3c MACH_HANLIN_V3C HANLIN_V3C 2073 -kbk9g20 MACH_KBK9G20 KBK9G20 2074 -adsturbog5 MACH_ADSTURBOG5 ADSTURBOG5 2075 -avenger_lite1 MACH_AVENGER_LITE1 AVENGER_LITE1 2076 -suc82x MACH_SUC SUC 2077 -at91sam7s256 MACH_AT91SAM7S256 AT91SAM7S256 2078 -mendoza MACH_MENDOZA MENDOZA 2079 -kira MACH_KIRA KIRA 2080 -mx1hbm MACH_MX1HBM MX1HBM 2081 -quatro43xx MACH_QUATRO43XX QUATRO43XX 2082 -quatro4230 MACH_QUATRO4230 QUATRO4230 2083 -nsb400 MACH_NSB400 NSB400 2084 -drp255 MACH_DRP255 DRP255 2085 -thoth MACH_THOTH THOTH 2086 -firestone MACH_FIRESTONE FIRESTONE 2087 -asusp750 MACH_ASUSP750 ASUSP750 2088 -ctera_dl MACH_CTERA_DL CTERA_DL 2089 -socr MACH_SOCR SOCR 2090 -htcoxygen MACH_HTCOXYGEN HTCOXYGEN 2091 -heroc MACH_HEROC HEROC 2092 -zeno6800 MACH_ZENO6800 ZENO6800 2093 -sc2mcs MACH_SC2MCS SC2MCS 2094 -gene100 MACH_GENE100 GENE100 2095 -as353x MACH_AS353X AS353X 2096 sheevaplug MACH_SHEEVAPLUG SHEEVAPLUG 2097 -at91sam9g20 MACH_AT91SAM9G20 AT91SAM9G20 2098 -mv88f6192gtw_fe MACH_MV88F6192GTW_FE MV88F6192GTW_FE 2099 -cc9200 MACH_CC9200 CC9200 2100 -sm9200 MACH_SM9200 SM9200 2101 -tp9200 MACH_TP9200 TP9200 2102 -snapperdv MACH_SNAPPERDV SNAPPERDV 2103 avengers_lite MACH_AVENGERS_LITE AVENGERS_LITE 2104 -avengers_lite1 MACH_AVENGERS_LITE1 AVENGERS_LITE1 2105 -omap3axon MACH_OMAP3AXON OMAP3AXON 2106 -ma8xx MACH_MA8XX MA8XX 2107 -mp201ek MACH_MP201EK MP201EK 2108 -davinci_tux MACH_DAVINCI_TUX DAVINCI_TUX 2109 -mpa1600 MACH_MPA1600 MPA1600 2110 -pelco_troy MACH_PELCO_TROY PELCO_TROY 2111 -nsb667 MACH_NSB667 NSB667 2112 -rovers5_4mpix MACH_ROVERS5_4MPIX ROVERS5_4MPIX 2113 -twocom MACH_TWOCOM TWOCOM 2114 -ubisys_p9_rcu3r2 MACH_UBISYS_P9_RCU3R2 UBISYS_P9_RCU3R2 2115 -hero_espresso MACH_HERO_ESPRESSO HERO_ESPRESSO 2116 -afeusb MACH_AFEUSB AFEUSB 2117 -t830 MACH_T830 T830 2118 -spd8020_cc MACH_SPD8020_CC SPD8020_CC 2119 -om_3d7k MACH_OM_3D7K OM_3D7K 2120 -picocom2 MACH_PICOCOM2 PICOCOM2 2121 -uwg4mx27 MACH_UWG4MX27 UWG4MX27 2122 -uwg4mx31 MACH_UWG4MX31 UWG4MX31 2123 -cherry MACH_CHERRY CHERRY 2124 mx51_babbage MACH_MX51_BABBAGE MX51_BABBAGE 2125 -s3c2440turkiye MACH_S3C2440TURKIYE S3C2440TURKIYE 2126 -tx37 MACH_TX37 TX37 2127 -sbc2800_9g20 MACH_SBC2800_9G20 SBC2800_9G20 2128 -benzglb MACH_BENZGLB BENZGLB 2129 -benztd MACH_BENZTD BENZTD 2130 -cartesio_plus MACH_CARTESIO_PLUS CARTESIO_PLUS 2131 -solrad_g20 MACH_SOLRAD_G20 SOLRAD_G20 2132 -mx27wallace MACH_MX27WALLACE MX27WALLACE 2133 -fmzwebmodul MACH_FMZWEBMODUL FMZWEBMODUL 2134 rd78x00_masa MACH_RD78X00_MASA RD78X00_MASA 2135 -smallogger MACH_SMALLOGGER SMALLOGGER 2136 -ccw9p9215 MACH_CCW9P9215 CCW9P9215 2137 dm355_leopard MACH_DM355_LEOPARD DM355_LEOPARD 2138 ts219 MACH_TS219 TS219 2139 -tny_a9263 MACH_TNY_A9263 TNY_A9263 2140 -apollo MACH_APOLLO APOLLO 2141 -at91cap9stk MACH_AT91CAP9STK AT91CAP9STK 2142 -spc300 MACH_SPC300 SPC300 2143 -eko MACH_EKO EKO 2144 -ccw9m2443 MACH_CCW9M2443 CCW9M2443 2145 -ccw9m2443js MACH_CCW9M2443JS CCW9M2443JS 2146 -m2m_router_device MACH_M2M_ROUTER_DEVICE M2M_ROUTER_DEVICE 2147 -str9104nas MACH_STAR9104NAS STAR9104NAS 2148 pca100 MACH_PCA100 PCA100 2149 -z3_dm365_mod_01 MACH_Z3_DM365_MOD_01 Z3_DM365_MOD_01 2150 -hipox MACH_HIPOX HIPOX 2151 -omap3_piteds MACH_OMAP3_PITEDS OMAP3_PITEDS 2152 -bm150r MACH_BM150R BM150R 2153 -tbone MACH_TBONE TBONE 2154 -merlin MACH_MERLIN MERLIN 2155 -falcon MACH_FALCON FALCON 2156 davinci_da850_evm MACH_DAVINCI_DA850_EVM DAVINCI_DA850_EVM 2157 -s5p6440 MACH_S5P6440 S5P6440 2158 at91sam9g10ek MACH_AT91SAM9G10EK AT91SAM9G10EK 2159 omap_4430sdp MACH_OMAP_4430SDP OMAP_4430SDP 2160 -lpc313x MACH_LPC313X LPC313X 2161 magx_zn5 MACH_MAGX_ZN5 MAGX_ZN5 2162 -magx_em30 MACH_MAGX_EM30 MAGX_EM30 2163 -magx_ve66 MACH_MAGX_VE66 MAGX_VE66 2164 -meesc MACH_MEESC MEESC 2165 -otc570 MACH_OTC570 OTC570 2166 -bcu2412 MACH_BCU2412 BCU2412 2167 -beacon MACH_BEACON BEACON 2168 -actia_tgw MACH_ACTIA_TGW ACTIA_TGW 2169 -e4430 MACH_E4430 E4430 2170 -ql300 MACH_QL300 QL300 2171 -btmavb101 MACH_BTMAVB101 BTMAVB101 2172 -btmawb101 MACH_BTMAWB101 BTMAWB101 2173 -sq201 MACH_SQ201 SQ201 2174 -quatro45xx MACH_QUATRO45XX QUATRO45XX 2175 -openpad MACH_OPENPAD OPENPAD 2176 -tx25 MACH_TX25 TX25 2177 omap3_torpedo MACH_OMAP3_TORPEDO OMAP3_TORPEDO 2178 -htcraphael_k MACH_HTCRAPHAEL_K HTCRAPHAEL_K 2179 -lal43 MACH_LAL43 LAL43 2181 -htcraphael_cdma500 MACH_HTCRAPHAEL_CDMA500 HTCRAPHAEL_CDMA500 2182 anw6410 MACH_ANW6410 ANW6410 2183 -htcprophet MACH_HTCPROPHET HTCPROPHET 2185 -cfa_10022 MACH_CFA_10022 CFA_10022 2186 imx27_visstrim_m10 MACH_IMX27_VISSTRIM_M10 IMX27_VISSTRIM_M10 2187 -px2imx27 MACH_PX2IMX27 PX2IMX27 2188 -stm3210e_eval MACH_STM3210E_EVAL STM3210E_EVAL 2189 -dvs10 MACH_DVS10 DVS10 2190 portuxg20 MACH_PORTUXG20 PORTUXG20 2191 -arm_spv MACH_ARM_SPV ARM_SPV 2192 smdkc110 MACH_SMDKC110 SMDKC110 2193 -cabespresso MACH_CABESPRESSO CABESPRESSO 2194 -hmc800 MACH_HMC800 HMC800 2195 -sholes MACH_SHOLES SHOLES 2196 -btmxc31 MACH_BTMXC31 BTMXC31 2197 -dt501 MACH_DT501 DT501 2198 -ktx MACH_KTX KTX 2199 omap3517evm MACH_OMAP3517EVM OMAP3517EVM 2200 netspace_v2 MACH_NETSPACE_V2 NETSPACE_V2 2201 netspace_max_v2 MACH_NETSPACE_MAX_V2 NETSPACE_MAX_V2 2202 d2net_v2 MACH_D2NET_V2 D2NET_V2 2203 net2big_v2 MACH_NET2BIG_V2 NET2BIG_V2 2204 -net4big_v2 MACH_NET4BIG_V2 NET4BIG_V2 2205 net5big_v2 MACH_NET5BIG_V2 NET5BIG_V2 2206 -endb2443 MACH_ENDB2443 ENDB2443 2207 inetspace_v2 MACH_INETSPACE_V2 INETSPACE_V2 2208 -tros MACH_TROS TROS 2209 -pelco_homer MACH_PELCO_HOMER PELCO_HOMER 2210 -ofsp8 MACH_OFSP8 OFSP8 2211 at91sam9g45ekes MACH_AT91SAM9G45EKES AT91SAM9G45EKES 2212 -guf_cupid MACH_GUF_CUPID GUF_CUPID 2213 -eab1r MACH_EAB1R EAB1R 2214 -desirec MACH_DESIREC DESIREC 2215 -cordoba MACH_CORDOBA CORDOBA 2216 -irvine MACH_IRVINE IRVINE 2217 -sff772 MACH_SFF772 SFF772 2218 -pelco_milano MACH_PELCO_MILANO PELCO_MILANO 2219 pc7302 MACH_PC7302 PC7302 2220 -bip6000 MACH_BIP6000 BIP6000 2221 -silvermoon MACH_SILVERMOON SILVERMOON 2222 -vc0830 MACH_VC0830 VC0830 2223 -dt430 MACH_DT430 DT430 2224 -ji42pf MACH_JI42PF JI42PF 2225 -gnet_ksm MACH_GNET_KSM GNET_KSM 2226 -gnet_sgm MACH_GNET_SGM GNET_SGM 2227 -gnet_sgr MACH_GNET_SGR GNET_SGR 2228 -omap3_icetekevm MACH_OMAP3_ICETEKEVM OMAP3_ICETEKEVM 2229 -pnp MACH_PNP PNP 2230 -ctera_2bay_k MACH_CTERA_2BAY_K CTERA_2BAY_K 2231 -ctera_2bay_u MACH_CTERA_2BAY_U CTERA_2BAY_U 2232 -sas_c MACH_SAS_C SAS_C 2233 -vma2315 MACH_VMA2315 VMA2315 2234 -vcs MACH_VCS VCS 2235 spear600 MACH_SPEAR600 SPEAR600 2236 spear300 MACH_SPEAR300 SPEAR300 2237 -spear1300 MACH_SPEAR1300 SPEAR1300 2238 lilly1131 MACH_LILLY1131 LILLY1131 2239 -arvoo_ax301 MACH_ARVOO_AX301 ARVOO_AX301 2240 -mapphone MACH_MAPPHONE MAPPHONE 2241 -legend MACH_LEGEND LEGEND 2242 -salsa MACH_SALSA SALSA 2243 -lounge MACH_LOUNGE LOUNGE 2244 -vision MACH_VISION VISION 2245 -vmb20 MACH_VMB20 VMB20 2246 -hy2410 MACH_HY2410 HY2410 2247 -hy9315 MACH_HY9315 HY9315 2248 -bullwinkle MACH_BULLWINKLE BULLWINKLE 2249 -arm_ultimator2 MACH_ARM_ULTIMATOR2 ARM_ULTIMATOR2 2250 -vs_v210 MACH_VS_V210 VS_V210 2252 -vs_v212 MACH_VS_V212 VS_V212 2253 hmt MACH_HMT HMT 2254 -km_kirkwood MACH_KM_KIRKWOOD KM_KIRKWOOD 2255 -vesper MACH_VESPER VESPER 2256 -str9 MACH_STR9 STR9 2257 -omap3_wl_ff MACH_OMAP3_WL_FF OMAP3_WL_FF 2258 -simcom MACH_SIMCOM SIMCOM 2259 -mcwebio MACH_MCWEBIO MCWEBIO 2260 -omap3_phrazer MACH_OMAP3_PHRAZER OMAP3_PHRAZER 2261 -darwin MACH_DARWIN DARWIN 2262 -oratiscomu MACH_ORATISCOMU ORATISCOMU 2263 -rtsbc20 MACH_RTSBC20 RTSBC20 2264 -sgh_i780 MACH_I780 I780 2265 -gemini324 MACH_GEMINI324 GEMINI324 2266 -oratislan MACH_ORATISLAN ORATISLAN 2267 -oratisalog MACH_ORATISALOG ORATISALOG 2268 -oratismadi MACH_ORATISMADI ORATISMADI 2269 -oratisot16 MACH_ORATISOT16 ORATISOT16 2270 -oratisdesk MACH_ORATISDESK ORATISDESK 2271 vexpress MACH_VEXPRESS VEXPRESS 2272 -sintexo MACH_SINTEXO SINTEXO 2273 -cm3389 MACH_CM3389 CM3389 2274 -omap3_cio MACH_OMAP3_CIO OMAP3_CIO 2275 -sgh_i900 MACH_SGH_I900 SGH_I900 2276 -bst100 MACH_BST100 BST100 2277 -passion MACH_PASSION PASSION 2278 -indesign_at91sam MACH_INDESIGN_AT91SAM INDESIGN_AT91SAM 2279 -c4_badger MACH_C4_BADGER C4_BADGER 2280 -c4_viper MACH_C4_VIPER C4_VIPER 2281 d2net MACH_D2NET D2NET 2282 bigdisk MACH_BIGDISK BIGDISK 2283 -notalvision MACH_NOTALVISION NOTALVISION 2284 -omap3_kboc MACH_OMAP3_KBOC OMAP3_KBOC 2285 -cyclone MACH_CYCLONE CYCLONE 2286 -ninja MACH_NINJA NINJA 2287 at91sam9g20ek_2mmc MACH_AT91SAM9G20EK_2MMC AT91SAM9G20EK_2MMC 2288 bcmring MACH_BCMRING BCMRING 2289 -resol_dl2 MACH_RESOL_DL2 RESOL_DL2 2290 -ifosw MACH_IFOSW IFOSW 2291 -htcrhodium MACH_HTCRHODIUM HTCRHODIUM 2292 -htctopaz MACH_HTCTOPAZ HTCTOPAZ 2293 -matrix504 MACH_MATRIX504 MATRIX504 2294 -mrfsa MACH_MRFSA MRFSA 2295 -sc_p270 MACH_SC_P270 SC_P270 2296 -atlas5_evb MACH_ATLAS5_EVB ATLAS5_EVB 2297 -pelco_lobox MACH_PELCO_LOBOX PELCO_LOBOX 2298 -dilax_pcu200 MACH_DILAX_PCU200 DILAX_PCU200 2299 -leonardo MACH_LEONARDO LEONARDO 2300 -zoran_approach7 MACH_ZORAN_APPROACH7 ZORAN_APPROACH7 2301 -dp6xx MACH_DP6XX DP6XX 2302 -bcm2153_vesper MACH_BCM2153_VESPER BCM2153_VESPER 2303 mahimahi MACH_MAHIMAHI MAHIMAHI 2304 -clickc MACH_CLICKC CLICKC 2305 -zb_gateway MACH_ZB_GATEWAY ZB_GATEWAY 2306 -tazcard MACH_TAZCARD TAZCARD 2307 -tazdev MACH_TAZDEV TAZDEV 2308 -annax_cb_arm MACH_ANNAX_CB_ARM ANNAX_CB_ARM 2309 -annax_dm3 MACH_ANNAX_DM3 ANNAX_DM3 2310 -cerebric MACH_CEREBRIC CEREBRIC 2311 -orca MACH_ORCA ORCA 2312 -pc9260 MACH_PC9260 PC9260 2313 -ems285a MACH_EMS285A EMS285A 2314 -gec2410 MACH_GEC2410 GEC2410 2315 -gec2440 MACH_GEC2440 GEC2440 2316 -mw903 MACH_ARCH_MW903 ARCH_MW903 2317 -mw2440 MACH_MW2440 MW2440 2318 -ecac2378 MACH_ECAC2378 ECAC2378 2319 -tazkiosk MACH_TAZKIOSK TAZKIOSK 2320 -whiterabbit_mch MACH_WHITERABBIT_MCH WHITERABBIT_MCH 2321 -sbox9263 MACH_SBOX9263 SBOX9263 2322 -oreo MACH_OREO OREO 2323 smdk6442 MACH_SMDK6442 SMDK6442 2324 openrd_base MACH_OPENRD_BASE OPENRD_BASE 2325 -incredible MACH_INCREDIBLE INCREDIBLE 2326 -incrediblec MACH_INCREDIBLEC INCREDIBLEC 2327 -heroct MACH_HEROCT HEROCT 2328 -mmnet1000 MACH_MMNET1000 MMNET1000 2329 devkit8000 MACH_DEVKIT8000 DEVKIT8000 2330 -devkit9000 MACH_DEVKIT9000 DEVKIT9000 2331 -mx31txtr MACH_MX31TXTR MX31TXTR 2332 -u380 MACH_U380 U380 2333 -oamp3_hualu MACH_HUALU_BOARD HUALU_BOARD 2334 -npcmx50 MACH_NPCMX50 NPCMX50 2335 mx51_efikamx MACH_MX51_EFIKAMX MX51_EFIKAMX 2336 -mx51_lange52 MACH_MX51_LANGE52 MX51_LANGE52 2337 -riom MACH_RIOM RIOM 2338 -comcas MACH_COMCAS COMCAS 2339 -wsi_mx27 MACH_WSI_MX27 WSI_MX27 2340 cm_t35 MACH_CM_T35 CM_T35 2341 net2big MACH_NET2BIG NET2BIG 2342 -motorola_a1600 MACH_MOTOROLA_A1600 MOTOROLA_A1600 2343 igep0020 MACH_IGEP0020 IGEP0020 2344 -igep0010 MACH_IGEP0010 IGEP0010 2345 -mv6281gtwge2 MACH_MV6281GTWGE2 MV6281GTWGE2 2346 -scat100 MACH_SCAT100 SCAT100 2347 -sanmina MACH_SANMINA SANMINA 2348 -momento MACH_MOMENTO MOMENTO 2349 -nuc9xx MACH_NUC9XX NUC9XX 2350 -nuc910evb MACH_NUC910EVB NUC910EVB 2351 -nuc920evb MACH_NUC920EVB NUC920EVB 2352 -nuc950evb MACH_NUC950EVB NUC950EVB 2353 -nuc945evb MACH_NUC945EVB NUC945EVB 2354 -nuc960evb MACH_NUC960EVB NUC960EVB 2355 nuc932evb MACH_NUC932EVB NUC932EVB 2356 -nuc900 MACH_NUC900 NUC900 2357 -sd1soc MACH_SD1SOC SD1SOC 2358 -ln2440bc MACH_LN2440BC LN2440BC 2359 -rsbc MACH_RSBC RSBC 2360 openrd_client MACH_OPENRD_CLIENT OPENRD_CLIENT 2361 -hpipaq11x MACH_HPIPAQ11X HPIPAQ11X 2362 -wayland MACH_WAYLAND WAYLAND 2363 -acnbsx102 MACH_ACNBSX102 ACNBSX102 2364 -hwat91 MACH_HWAT91 HWAT91 2365 -at91sam9263cs MACH_AT91SAM9263CS AT91SAM9263CS 2366 -csb732 MACH_CSB732 CSB732 2367 u8500 MACH_U8500 U8500 2368 -huqiu MACH_HUQIU HUQIU 2369 mx51_efikasb MACH_MX51_EFIKASB MX51_EFIKASB 2370 -pmt1g MACH_PMT1G PMT1G 2371 -htcelf MACH_HTCELF HTCELF 2372 -armadillo420 MACH_ARMADILLO420 ARMADILLO420 2373 -armadillo440 MACH_ARMADILLO440 ARMADILLO440 2374 -u_chip_dual_arm MACH_U_CHIP_DUAL_ARM U_CHIP_DUAL_ARM 2375 -csr_bdb3 MACH_CSR_BDB3 CSR_BDB3 2376 -dolby_cat1018 MACH_DOLBY_CAT1018 DOLBY_CAT1018 2377 -hy9307 MACH_HY9307 HY9307 2378 -aspire_easystore MACH_A_ES A_ES 2379 -davinci_irif MACH_DAVINCI_IRIF DAVINCI_IRIF 2380 -agama9263 MACH_AGAMA9263 AGAMA9263 2381 marvell_jasper MACH_MARVELL_JASPER MARVELL_JASPER 2382 flint MACH_FLINT FLINT 2383 tavorevb3 MACH_TAVOREVB3 TAVOREVB3 2384 -sch_m490 MACH_SCH_M490 SCH_M490 2386 -rbl01 MACH_RBL01 RBL01 2387 -omnifi MACH_OMNIFI OMNIFI 2388 -otavalo MACH_OTAVALO OTAVALO 2389 -sienna MACH_SIENNA SIENNA 2390 -htc_excalibur_s620 MACH_HTC_EXCALIBUR_S620 HTC_EXCALIBUR_S620 2391 -htc_opal MACH_HTC_OPAL HTC_OPAL 2392 touchbook MACH_TOUCHBOOK TOUCHBOOK 2393 -latte MACH_LATTE LATTE 2394 -xa200 MACH_XA200 XA200 2395 -nimrod MACH_NIMROD NIMROD 2396 -cc9p9215_3g MACH_CC9P9215_3G CC9P9215_3G 2397 -cc9p9215_3gjs MACH_CC9P9215_3GJS CC9P9215_3GJS 2398 -tk71 MACH_TK71 TK71 2399 -comham3525 MACH_COMHAM3525 COMHAM3525 2400 -mx31erebus MACH_MX31EREBUS MX31EREBUS 2401 -mcardmx27 MACH_MCARDMX27 MCARDMX27 2402 -paradise MACH_PARADISE PARADISE 2403 -tide MACH_TIDE TIDE 2404 -wzl2440 MACH_WZL2440 WZL2440 2405 -sdrdemo MACH_SDRDEMO SDRDEMO 2406 -ethercan2 MACH_ETHERCAN2 ETHERCAN2 2407 -ecmimg20 MACH_ECMIMG20 ECMIMG20 2408 -omap_dragon MACH_OMAP_DRAGON OMAP_DRAGON 2409 -halo MACH_HALO HALO 2410 -huangshan MACH_HUANGSHAN HUANGSHAN 2411 -vl_ma2sc MACH_VL_MA2SC VL_MA2SC 2412 raumfeld_rc MACH_RAUMFELD_RC RAUMFELD_RC 2413 raumfeld_connector MACH_RAUMFELD_CONNECTOR RAUMFELD_CONNECTOR 2414 raumfeld_speaker MACH_RAUMFELD_SPEAKER RAUMFELD_SPEAKER 2415 -multibus_master MACH_MULTIBUS_MASTER MULTIBUS_MASTER 2416 -multibus_pbk MACH_MULTIBUS_PBK MULTIBUS_PBK 2417 tnetv107x MACH_TNETV107X TNETV107X 2418 -snake MACH_SNAKE SNAKE 2419 -cwmx27 MACH_CWMX27 CWMX27 2420 -sch_m480 MACH_SCH_M480 SCH_M480 2421 -platypus MACH_PLATYPUS PLATYPUS 2422 -pss2 MACH_PSS2 PSS2 2423 -davinci_apm150 MACH_DAVINCI_APM150 DAVINCI_APM150 2424 -str9100 MACH_STR9100 STR9100 2425 -net5big MACH_NET5BIG NET5BIG 2426 -seabed9263 MACH_SEABED9263 SEABED9263 2427 -mx51_m2id MACH_MX51_M2ID MX51_M2ID 2428 -octvocplus_eb MACH_OCTVOCPLUS_EB OCTVOCPLUS_EB 2429 -klk_firefox MACH_KLK_FIREFOX KLK_FIREFOX 2430 -klk_wirma_module MACH_KLK_WIRMA_MODULE KLK_WIRMA_MODULE 2431 -klk_wirma_mmi MACH_KLK_WIRMA_MMI KLK_WIRMA_MMI 2432 -supersonic MACH_SUPERSONIC SUPERSONIC 2433 -liberty MACH_LIBERTY LIBERTY 2434 -mh355 MACH_MH355 MH355 2435 -pc7802 MACH_PC7802 PC7802 2436 -gnet_sgc MACH_GNET_SGC GNET_SGC 2437 -einstein15 MACH_EINSTEIN15 EINSTEIN15 2438 -cmpd MACH_CMPD CMPD 2439 -davinci_hase1 MACH_DAVINCI_HASE1 DAVINCI_HASE1 2440 -lgeincitephone MACH_LGEINCITEPHONE LGEINCITEPHONE 2441 -ea313x MACH_EA313X EA313X 2442 -fwbd_39064 MACH_FWBD_39064 FWBD_39064 2443 -fwbd_390128 MACH_FWBD_390128 FWBD_390128 2444 -pelco_moe MACH_PELCO_MOE PELCO_MOE 2445 -minimix27 MACH_MINIMIX27 MINIMIX27 2446 -omap3_thunder MACH_OMAP3_THUNDER OMAP3_THUNDER 2447 -passionc MACH_PASSIONC PASSIONC 2448 -mx27amata MACH_MX27AMATA MX27AMATA 2449 -bgat1 MACH_BGAT1 BGAT1 2450 -buzz MACH_BUZZ BUZZ 2451 -mb9g20 MACH_MB9G20 MB9G20 2452 -yushan MACH_YUSHAN YUSHAN 2453 -lizard MACH_LIZARD LIZARD 2454 -omap3polycom MACH_OMAP3POLYCOM OMAP3POLYCOM 2455 smdkv210 MACH_SMDKV210 SMDKV210 2456 -bravo MACH_BRAVO BRAVO 2457 -siogentoo1 MACH_SIOGENTOO1 SIOGENTOO1 2458 -siogentoo2 MACH_SIOGENTOO2 SIOGENTOO2 2459 -sm3k MACH_SM3K SM3K 2460 -acer_tempo_f900 MACH_ACER_TEMPO_F900 ACER_TEMPO_F900 2461 -sst61vc010_dev MACH_SST61VC010_DEV SST61VC010_DEV 2462 -glittertind MACH_GLITTERTIND GLITTERTIND 2463 omap_zoom3 MACH_OMAP_ZOOM3 OMAP_ZOOM3 2464 omap_3630sdp MACH_OMAP_3630SDP OMAP_3630SDP 2465 -cybook2440 MACH_CYBOOK2440 CYBOOK2440 2466 -torino_s MACH_TORINO_S TORINO_S 2467 -havana MACH_HAVANA HAVANA 2468 -beaumont_11 MACH_BEAUMONT_11 BEAUMONT_11 2469 -vanguard MACH_VANGUARD VANGUARD 2470 -s5pc110_draco MACH_S5PC110_DRACO S5PC110_DRACO 2471 -cartesio_two MACH_CARTESIO_TWO CARTESIO_TWO 2472 -aster MACH_ASTER ASTER 2473 -voguesv210 MACH_VOGUESV210 VOGUESV210 2474 -acm500x MACH_ACM500X ACM500X 2475 -km9260 MACH_KM9260 KM9260 2476 -nideflexg1 MACH_NIDEFLEXG1 NIDEFLEXG1 2477 -ctera_plug_io MACH_CTERA_PLUG_IO CTERA_PLUG_IO 2478 smartq7 MACH_SMARTQ7 SMARTQ7 2479 -at91sam9g10ek2 MACH_AT91SAM9G10EK2 AT91SAM9G10EK2 2480 -asusp527 MACH_ASUSP527 ASUSP527 2481 -at91sam9g20mpm2 MACH_AT91SAM9G20MPM2 AT91SAM9G20MPM2 2482 -topasa900 MACH_TOPASA900 TOPASA900 2483 -electrum_100 MACH_ELECTRUM_100 ELECTRUM_100 2484 -mx51grb MACH_MX51GRB MX51GRB 2485 -xea300 MACH_XEA300 XEA300 2486 -htcstartrek MACH_HTCSTARTREK HTCSTARTREK 2487 -lima MACH_LIMA LIMA 2488 -csb740 MACH_CSB740 CSB740 2489 -usb_s8815 MACH_USB_S8815 USB_S8815 2490 -watson_efm_plugin MACH_WATSON_EFM_PLUGIN WATSON_EFM_PLUGIN 2491 -milkyway MACH_MILKYWAY MILKYWAY 2492 g4evm MACH_G4EVM G4EVM 2493 -picomod6 MACH_PICOMOD6 PICOMOD6 2494 omapl138_hawkboard MACH_OMAPL138_HAWKBOARD OMAPL138_HAWKBOARD 2495 -ip6000 MACH_IP6000 IP6000 2496 -ip6010 MACH_IP6010 IP6010 2497 -utm400 MACH_UTM400 UTM400 2498 -omap3_zybex MACH_OMAP3_ZYBEX OMAP3_ZYBEX 2499 -wireless_space MACH_WIRELESS_SPACE WIRELESS_SPACE 2500 -sx560 MACH_SX560 SX560 2501 ts41x MACH_TS41X TS41X 2502 -elphel10373 MACH_ELPHEL10373 ELPHEL10373 2503 -rhobot MACH_RHOBOT RHOBOT 2504 -mx51_refresh MACH_MX51_REFRESH MX51_REFRESH 2505 -ls9260 MACH_LS9260 LS9260 2506 -shank MACH_SHANK SHANK 2507 -qsd8x50_st1 MACH_QSD8X50_ST1 QSD8X50_ST1 2508 -at91sam9m10ekes MACH_AT91SAM9M10EKES AT91SAM9M10EKES 2509 -hiram MACH_HIRAM HIRAM 2510 phy3250 MACH_PHY3250 PHY3250 2511 -ea3250 MACH_EA3250 EA3250 2512 -fdi3250 MACH_FDI3250 FDI3250 2513 -whitestone MACH_WHITESTONE WHITESTONE 2514 -at91sam9263nit MACH_AT91SAM9263NIT AT91SAM9263NIT 2515 -ccmx51 MACH_CCMX51 CCMX51 2516 -ccmx51js MACH_CCMX51JS CCMX51JS 2517 -ccwmx51 MACH_CCWMX51 CCWMX51 2518 -ccwmx51js MACH_CCWMX51JS CCWMX51JS 2519 mini6410 MACH_MINI6410 MINI6410 2520 -tiny6410 MACH_TINY6410 TINY6410 2521 -nano6410 MACH_NANO6410 NANO6410 2522 -at572d940hfnldb MACH_AT572D940HFNLDB AT572D940HFNLDB 2523 -htcleo MACH_HTCLEO HTCLEO 2524 -avp13 MACH_AVP13 AVP13 2525 -xxsvideod MACH_XXSVIDEOD XXSVIDEOD 2526 -vpnext MACH_VPNEXT VPNEXT 2527 -swarco_itc3 MACH_SWARCO_ITC3 SWARCO_ITC3 2528 -tx51 MACH_TX51 TX51 2529 -dolby_cat1021 MACH_DOLBY_CAT1021 DOLBY_CAT1021 2530 mx28evk MACH_MX28EVK MX28EVK 2531 -phoenix260 MACH_PHOENIX260 PHOENIX260 2532 -uvaca_stork MACH_UVACA_STORK UVACA_STORK 2533 smartq5 MACH_SMARTQ5 SMARTQ5 2534 -all3078 MACH_ALL3078 ALL3078 2535 -ctera_2bay_ds MACH_CTERA_2BAY_DS CTERA_2BAY_DS 2536 -siogentoo3 MACH_SIOGENTOO3 SIOGENTOO3 2537 -epb5000 MACH_EPB5000 EPB5000 2538 -hy9263 MACH_HY9263 HY9263 2539 -acer_tempo_m900 MACH_ACER_TEMPO_M900 ACER_TEMPO_M900 2540 -acer_tempo_dx650 MACH_ACER_TEMPO_DX900 ACER_TEMPO_DX900 2541 -acer_tempo_x960 MACH_ACER_TEMPO_X960 ACER_TEMPO_X960 2542 -acer_eten_v900 MACH_ACER_ETEN_V900 ACER_ETEN_V900 2543 -acer_eten_x900 MACH_ACER_ETEN_X900 ACER_ETEN_X900 2544 -bonnell MACH_BONNELL BONNELL 2545 -oht_mx27 MACH_OHT_MX27 OHT_MX27 2546 -htcquartz MACH_HTCQUARTZ HTCQUARTZ 2547 davinci_dm6467tevm MACH_DAVINCI_DM6467TEVM DAVINCI_DM6467TEVM 2548 -c3ax03 MACH_C3AX03 C3AX03 2549 mxt_td60 MACH_MXT_TD60 MXT_TD60 2550 -esyx MACH_ESYX ESYX 2551 -dove_db2 MACH_DOVE_DB2 DOVE_DB2 2552 -bulldog MACH_BULLDOG BULLDOG 2553 -derell_me2000 MACH_DERELL_ME2000 DERELL_ME2000 2554 -bcmring_base MACH_BCMRING_BASE BCMRING_BASE 2555 -bcmring_evm MACH_BCMRING_EVM BCMRING_EVM 2556 -bcmring_evm_jazz MACH_BCMRING_EVM_JAZZ BCMRING_EVM_JAZZ 2557 -bcmring_sp MACH_BCMRING_SP BCMRING_SP 2558 -bcmring_sv MACH_BCMRING_SV BCMRING_SV 2559 -bcmring_sv_jazz MACH_BCMRING_SV_JAZZ BCMRING_SV_JAZZ 2560 -bcmring_tablet MACH_BCMRING_TABLET BCMRING_TABLET 2561 -bcmring_vp MACH_BCMRING_VP BCMRING_VP 2562 -bcmring_evm_seikor MACH_BCMRING_EVM_SEIKOR BCMRING_EVM_SEIKOR 2563 -bcmring_sp_wqvga MACH_BCMRING_SP_WQVGA BCMRING_SP_WQVGA 2564 -bcmring_custom MACH_BCMRING_CUSTOM BCMRING_CUSTOM 2565 -acer_s200 MACH_ACER_S200 ACER_S200 2566 -bt270 MACH_BT270 BT270 2567 -iseo MACH_ISEO ISEO 2568 -cezanne MACH_CEZANNE CEZANNE 2569 -lucca MACH_LUCCA LUCCA 2570 -supersmart MACH_SUPERSMART SUPERSMART 2571 -arm11_board MACH_CS_MISANO CS_MISANO 2572 -magnolia2 MACH_MAGNOLIA2 MAGNOLIA2 2573 -emxx MACH_EMXX EMXX 2574 -outlaw MACH_OUTLAW OUTLAW 2575 -riot_bei2 MACH_RIOT_BEI2 RIOT_BEI2 2576 -riot_vox MACH_RIOT_VOX RIOT_VOX 2577 -riot_x37 MACH_RIOT_X37 RIOT_X37 2578 -mega25mx MACH_MEGA25MX MEGA25MX 2579 -benzina2 MACH_BENZINA2 BENZINA2 2580 -ignite MACH_IGNITE IGNITE 2581 -foggia MACH_FOGGIA FOGGIA 2582 -arezzo MACH_AREZZO AREZZO 2583 -leica_skywalker MACH_LEICA_SKYWALKER LEICA_SKYWALKER 2584 -jacinto2_jamr MACH_JACINTO2_JAMR JACINTO2_JAMR 2585 -gts_nova MACH_GTS_NOVA GTS_NOVA 2586 -p3600 MACH_P3600 P3600 2587 -dlt2 MACH_DLT2 DLT2 2588 -df3120 MACH_DF3120 DF3120 2589 -ecucore_9g20 MACH_ECUCORE_9G20 ECUCORE_9G20 2590 -nautel_lpc3240 MACH_NAUTEL_LPC3240 NAUTEL_LPC3240 2591 -glacier MACH_GLACIER GLACIER 2592 -phrazer_bulldog MACH_PHRAZER_BULLDOG PHRAZER_BULLDOG 2593 -omap3_bulldog MACH_OMAP3_BULLDOG OMAP3_BULLDOG 2594 -pca101 MACH_PCA101 PCA101 2595 -buzzc MACH_BUZZC BUZZC 2596 -sasie2 MACH_SASIE2 SASIE2 2597 -davinci_cio MACH_DAVINCI_CIO DAVINCI_CIO 2598 -smartmeter_dl MACH_SMARTMETER_DL SMARTMETER_DL 2599 -wzl6410 MACH_WZL6410 WZL6410 2600 -wzl6410m MACH_WZL6410M WZL6410M 2601 -wzl6410f MACH_WZL6410F WZL6410F 2602 -wzl6410i MACH_WZL6410I WZL6410I 2603 -spacecom1 MACH_SPACECOM1 SPACECOM1 2604 -pingu920 MACH_PINGU920 PINGU920 2605 -bravoc MACH_BRAVOC BRAVOC 2606 -cybo2440 MACH_CYBO2440 CYBO2440 2607 -vdssw MACH_VDSSW VDSSW 2608 -romulus MACH_ROMULUS ROMULUS 2609 -omap_magic MACH_OMAP_MAGIC OMAP_MAGIC 2610 -eltd100 MACH_ELTD100 ELTD100 2611 capc7117 MACH_CAPC7117 CAPC7117 2612 -swan MACH_SWAN SWAN 2613 -veu MACH_VEU VEU 2614 -rm2 MACH_RM2 RM2 2615 -tt2100 MACH_TT2100 TT2100 2616 -venice MACH_VENICE VENICE 2617 -pc7323 MACH_PC7323 PC7323 2618 -masp MACH_MASP MASP 2619 -fujitsu_tvstbsoc0 MACH_FUJITSU_TVSTBSOC FUJITSU_TVSTBSOC 2620 -fujitsu_tvstbsoc1 MACH_FUJITSU_TVSTBSOC1 FUJITSU_TVSTBSOC1 2621 -lexikon MACH_LEXIKON LEXIKON 2622 -mini2440v2 MACH_MINI2440V2 MINI2440V2 2623 icontrol MACH_ICONTROL ICONTROL 2624 -gplugd MACH_SHEEVAD SHEEVAD 2625 -qsd8x50a_st1_1 MACH_QSD8X50A_ST1_1 QSD8X50A_ST1_1 2626 qsd8x50a_st1_5 MACH_QSD8X50A_ST1_5 QSD8X50A_ST1_5 2627 -bee MACH_BEE BEE 2628 mx23evk MACH_MX23EVK MX23EVK 2629 ap4evb MACH_AP4EVB AP4EVB 2630 -stockholm MACH_STOCKHOLM STOCKHOLM 2631 -lpc_h3131 MACH_LPC_H3131 LPC_H3131 2632 -stingray MACH_STINGRAY STINGRAY 2633 -kraken MACH_KRAKEN KRAKEN 2634 -gw2388 MACH_GW2388 GW2388 2635 -jadecpu MACH_JADECPU JADECPU 2636 -carlisle MACH_CARLISLE CARLISLE 2637 -lux_sf9 MACH_LUX_SF9 LUX_SF9 2638 -nemid_tb MACH_NEMID_TB NEMID_TB 2639 -terrier MACH_TERRIER TERRIER 2640 -turbot MACH_TURBOT TURBOT 2641 -sanddab MACH_SANDDAB SANDDAB 2642 -mx35_cicada MACH_MX35_CICADA MX35_CICADA 2643 -ghi2703d MACH_GHI2703D GHI2703D 2644 -lux_sfx9 MACH_LUX_SFX9 LUX_SFX9 2645 -lux_sf9g MACH_LUX_SF9G LUX_SF9G 2646 -lux_edk9 MACH_LUX_EDK9 LUX_EDK9 2647 -hw90240 MACH_HW90240 HW90240 2648 -dm365_leopard MACH_DM365_LEOPARD DM365_LEOPARD 2649 mityomapl138 MACH_MITYOMAPL138 MITYOMAPL138 2650 -scat110 MACH_SCAT110 SCAT110 2651 -acer_a1 MACH_ACER_A1 ACER_A1 2652 -cmcontrol MACH_CMCONTROL CMCONTROL 2653 -pelco_lamar MACH_PELCO_LAMAR PELCO_LAMAR 2654 -rfp43 MACH_RFP43 RFP43 2655 -sk86r0301 MACH_SK86R0301 SK86R0301 2656 -ctpxa MACH_CTPXA CTPXA 2657 -epb_arm9_a MACH_EPB_ARM9_A EPB_ARM9_A 2658 guruplug MACH_GURUPLUG GURUPLUG 2659 spear310 MACH_SPEAR310 SPEAR310 2660 spear320 MACH_SPEAR320 SPEAR320 2661 -robotx MACH_ROBOTX ROBOTX 2662 -lsxhl MACH_LSXHL LSXHL 2663 -smartlite MACH_SMARTLITE SMARTLITE 2664 -cws2 MACH_CWS2 CWS2 2665 -m619 MACH_M619 M619 2666 -smartview MACH_SMARTVIEW SMARTVIEW 2667 -lsa_salsa MACH_LSA_SALSA LSA_SALSA 2668 -kizbox MACH_KIZBOX KIZBOX 2669 -htccharmer MACH_HTCCHARMER HTCCHARMER 2670 -guf_neso_lt MACH_GUF_NESO_LT GUF_NESO_LT 2671 -pm9g45 MACH_PM9G45 PM9G45 2672 -htcpanther MACH_HTCPANTHER HTCPANTHER 2673 -htcpanther_cdma MACH_HTCPANTHER_CDMA HTCPANTHER_CDMA 2674 -reb01 MACH_REB01 REB01 2675 aquila MACH_AQUILA AQUILA 2676 -spark_sls_hw2 MACH_SPARK_SLS_HW2 SPARK_SLS_HW2 2677 sheeva_esata MACH_ESATA_SHEEVAPLUG ESATA_SHEEVAPLUG 2678 msm7x30_surf MACH_MSM7X30_SURF MSM7X30_SURF 2679 -micro2440 MACH_MICRO2440 MICRO2440 2680 -am2440 MACH_AM2440 AM2440 2681 -tq2440 MACH_TQ2440 TQ2440 2682 -lpc2478oem MACH_LPC2478OEM LPC2478OEM 2683 -ak880x MACH_AK880X AK880X 2684 -cobra3530 MACH_COBRA3530 COBRA3530 2685 -pmppb MACH_PMPPB PMPPB 2686 -u6715 MACH_U6715 U6715 2687 -axar1500_sender MACH_AXAR1500_SENDER AXAR1500_SENDER 2688 -g30_dvb MACH_G30_DVB G30_DVB 2689 -vc088x MACH_VC088X VC088X 2690 -mioa702 MACH_MIOA702 MIOA702 2691 -hpmin MACH_HPMIN HPMIN 2692 -ak880xak MACH_AK880XAK AK880XAK 2693 -arm926tomap850 MACH_ARM926TOMAP850 ARM926TOMAP850 2694 -lkevm MACH_LKEVM LKEVM 2695 -mw6410 MACH_MW6410 MW6410 2696 terastation_wxl MACH_TERASTATION_WXL TERASTATION_WXL 2697 -cpu8000e MACH_CPU8000E CPU8000E 2698 -catania MACH_CATANIA CATANIA 2699 -tokyo MACH_TOKYO TOKYO 2700 -msm7201a_surf MACH_MSM7201A_SURF MSM7201A_SURF 2701 -msm7201a_ffa MACH_MSM7201A_FFA MSM7201A_FFA 2702 msm7x25_surf MACH_MSM7X25_SURF MSM7X25_SURF 2703 msm7x25_ffa MACH_MSM7X25_FFA MSM7X25_FFA 2704 msm7x27_surf MACH_MSM7X27_SURF MSM7X27_SURF 2705 msm7x27_ffa MACH_MSM7X27_FFA MSM7X27_FFA 2706 msm7x30_ffa MACH_MSM7X30_FFA MSM7X30_FFA 2707 qsd8x50_surf MACH_QSD8X50_SURF QSD8X50_SURF 2708 -qsd8x50_comet MACH_QSD8X50_COMET QSD8X50_COMET 2709 -qsd8x50_ffa MACH_QSD8X50_FFA QSD8X50_FFA 2710 -qsd8x50a_surf MACH_QSD8X50A_SURF QSD8X50A_SURF 2711 -qsd8x50a_ffa MACH_QSD8X50A_FFA QSD8X50A_FFA 2712 -adx_xgcp10 MACH_ADX_XGCP10 ADX_XGCP10 2713 -mcgwumts2a MACH_MCGWUMTS2A MCGWUMTS2A 2714 -mobikt MACH_MOBIKT MOBIKT 2715 mx53_evk MACH_MX53_EVK MX53_EVK 2716 igep0030 MACH_IGEP0030 IGEP0030 2717 -axell_h40_h50_ctrl MACH_AXELL_H40_H50_CTRL AXELL_H40_H50_CTRL 2718 -dtcommod MACH_DTCOMMOD DTCOMMOD 2719 -gould MACH_GOULD GOULD 2720 -siberia MACH_SIBERIA SIBERIA 2721 sbc3530 MACH_SBC3530 SBC3530 2722 -qarm MACH_QARM QARM 2723 -mips MACH_MIPS MIPS 2724 -mx27grb MACH_MX27GRB MX27GRB 2725 -sbc8100 MACH_SBC8100 SBC8100 2726 saarb MACH_SAARB SAARB 2727 -omap3mini MACH_OMAP3MINI OMAP3MINI 2728 -cnmbook7se MACH_CNMBOOK7SE CNMBOOK7SE 2729 -catan MACH_CATAN CATAN 2730 harmony MACH_HARMONY HARMONY 2731 -tonga MACH_TONGA TONGA 2732 -cybook_orizon MACH_CYBOOK_ORIZON CYBOOK_ORIZON 2733 -htcrhodiumcdma MACH_HTCRHODIUMCDMA HTCRHODIUMCDMA 2734 -epc_g45 MACH_EPC_G45 EPC_G45 2735 -epc_lpc3250 MACH_EPC_LPC3250 EPC_LPC3250 2736 -mxc91341evb MACH_MXC91341EVB MXC91341EVB 2737 -rtw1000 MACH_RTW1000 RTW1000 2738 -bobcat MACH_BOBCAT BOBCAT 2739 -trizeps6 MACH_TRIZEPS6 TRIZEPS6 2740 msm7x30_fluid MACH_MSM7X30_FLUID MSM7X30_FLUID 2741 -nedap9263 MACH_NEDAP9263 NEDAP9263 2742 -netgear_ms2110 MACH_NETGEAR_MS2110 NETGEAR_MS2110 2743 -bmx MACH_BMX BMX 2744 -netstream MACH_NETSTREAM NETSTREAM 2745 -vpnext_rcu MACH_VPNEXT_RCU VPNEXT_RCU 2746 -vpnext_mpu MACH_VPNEXT_MPU VPNEXT_MPU 2747 -bcmring_tablet_v1 MACH_BCMRING_TABLET_V1 BCMRING_TABLET_V1 2748 -sgarm10 MACH_SGARM10 SGARM10 2749 cm_t3517 MACH_CM_T3517 CM_T3517 2750 -omap3_cps MACH_OMAP3_CPS OMAP3_CPS 2751 -axar1500_receiver MACH_AXAR1500_RECEIVER AXAR1500_RECEIVER 2752 wbd222 MACH_WBD222 WBD222 2753 -mt65xx MACH_MT65XX MT65XX 2754 msm8x60_surf MACH_MSM8X60_SURF MSM8X60_SURF 2755 msm8x60_sim MACH_MSM8X60_SIM MSM8X60_SIM 2756 -vmc300 MACH_VMC300 VMC300 2757 tcc8000_sdk MACH_TCC8000_SDK TCC8000_SDK 2758 -nanos MACH_NANOS NANOS 2759 -stamp9g10 MACH_STAMP9G10 STAMP9G10 2760 -stamp9g45 MACH_STAMP9G45 STAMP9G45 2761 -h6053 MACH_H6053 H6053 2762 -smint01 MACH_SMINT01 SMINT01 2763 -prtlvt2 MACH_PRTLVT2 PRTLVT2 2764 ap420 MACH_AP420 AP420 2765 -htcshift MACH_HTCSHIFT HTCSHIFT 2766 davinci_dm365_fc MACH_DAVINCI_DM365_FC DAVINCI_DM365_FC 2767 msm8x55_surf MACH_MSM8X55_SURF MSM8X55_SURF 2768 msm8x55_ffa MACH_MSM8X55_FFA MSM8X55_FFA 2769 @@ -2761,7 +474,6 @@ oreo_controller MACH_OREO_CONTROLLER OREO_CONTROLLER 2773 kopin_models MACH_KOPIN_MODELS KOPIN_MODELS 2774 ttc_vision2 MACH_TTC_VISION2 TTC_VISION2 2775 cns3420vb MACH_CNS3420VB CNS3420VB 2776 -lpc2 MACH_LPC2 LPC2 2777 olympus MACH_OLYMPUS OLYMPUS 2778 vortex MACH_VORTEX VORTEX 2779 s5pc200 MACH_S5PC200 S5PC200 2780 @@ -2788,7 +500,6 @@ ti8168evm MACH_TI8168EVM TI8168EVM 2800 neocoreomap MACH_NEOCOREOMAP NEOCOREOMAP 2801 withings_wbp MACH_WITHINGS_WBP WITHINGS_WBP 2802 dbps MACH_DBPS DBPS 2803 -sbc9261 MACH_SBC9261 SBC9261 2804 pcbfp0001 MACH_PCBFP0001 PCBFP0001 2805 speedy MACH_SPEEDY SPEEDY 2806 chrysaor MACH_CHRYSAOR CHRYSAOR 2807 @@ -2812,7 +523,6 @@ p565 MACH_P565 P565 2824 acer_a4 MACH_ACER_A4 ACER_A4 2825 davinci_dm368_bip MACH_DAVINCI_DM368_BIP DAVINCI_DM368_BIP 2826 eshare MACH_ESHARE ESHARE 2827 -hw_omapl138_europa MACH_HW_OMAPL138_EUROPA HW_OMAPL138_EUROPA 2828 wlbargn MACH_WLBARGN WLBARGN 2829 bm170 MACH_BM170 BM170 2830 netspace_mini_v2 MACH_NETSPACE_MINI_V2 NETSPACE_MINI_V2 2831 @@ -2879,7 +589,6 @@ davinci_picto MACH_DAVINCI_PICTO DAVINCI_PICTO 2891 mecha MACH_MECHA MECHA 2892 bubba3 MACH_BUBBA3 BUBBA3 2893 pupitre MACH_PUPITRE PUPITRE 2894 -tegra_harmony MACH_TEGRA_HARMONY TEGRA_HARMONY 2895 tegra_vogue MACH_TEGRA_VOGUE TEGRA_VOGUE 2896 tegra_e1165 MACH_TEGRA_E1165 TEGRA_E1165 2897 simplenet MACH_SIMPLENET SIMPLENET 2898 @@ -2969,7 +678,6 @@ netspace_lite_v2 MACH_NETSPACE_LITE_V2 NETSPACE_LITE_V2 2983 ssc MACH_SSC SSC 2984 premierwave_en MACH_PREMIERWAVE_EN PREMIERWAVE_EN 2985 wasabi MACH_WASABI WASABI 2986 -vivow MACH_VIVOW VIVOW 2987 mx50_rdp MACH_MX50_RDP MX50_RDP 2988 universal_c210 MACH_UNIVERSAL_C210 UNIVERSAL_C210 2989 real6410 MACH_REAL6410 REAL6410 2990 @@ -3017,12 +725,10 @@ remus MACH_REMUS REMUS 3031 at91cap7xdk MACH_AT91CAP7XDK AT91CAP7XDK 3032 at91cap7stk MACH_AT91CAP7STK AT91CAP7STK 3033 kt_sbc_sam9_1 MACH_KT_SBC_SAM9_1 KT_SBC_SAM9_1 3034 -oratisrouter MACH_ORATISROUTER ORATISROUTER 3035 armada_xp_db MACH_ARMADA_XP_DB ARMADA_XP_DB 3036 spdm MACH_SPDM SPDM 3037 gtib MACH_GTIB GTIB 3038 dgm3240 MACH_DGM3240 DGM3240 3039 -atlas_i_lpe MACH_ATLAS_I_LPE ATLAS_I_LPE 3040 htcmega MACH_HTCMEGA HTCMEGA 3041 tricorder MACH_TRICORDER TRICORDER 3042 tx28 MACH_TX28 TX28 3043 @@ -3062,7 +768,6 @@ clod MACH_CLOD CLOD 3077 rump MACH_RUMP RUMP 3078 tenderloin MACH_TENDERLOIN TENDERLOIN 3079 shortloin MACH_SHORTLOIN SHORTLOIN 3080 -crespo MACH_CRESPO CRESPO 3081 antares MACH_ANTARES ANTARES 3082 wb40n MACH_WB40N WB40N 3083 herring MACH_HERRING HERRING 3084 @@ -3111,7 +816,6 @@ smartqv3 MACH_SMARTQV3 SMARTQV3 3126 smartqv7 MACH_SMARTQV7 SMARTQV7 3127 paz00 MACH_PAZ00 PAZ00 3128 acmenetusfoxg20 MACH_ACMENETUSFOXG20 ACMENETUSFOXG20 3129 -htcwillow MACH_HTCWILLOW HTCWILLOW 3130 fwbd_0404 MACH_FWBD_0404 FWBD_0404 3131 hdgu MACH_HDGU HDGU 3132 pyramid MACH_PYRAMID PYRAMID 3133 @@ -3162,7 +866,6 @@ b5500 MACH_B5500 B5500 3177 s5500 MACH_S5500 S5500 3178 icon MACH_ICON ICON 3179 elephant MACH_ELEPHANT ELEPHANT 3180 -msm8x60_fusion MACH_MSM8X60_FUSION MSM8X60_FUSION 3181 shooter MACH_SHOOTER SHOOTER 3182 spade_lte MACH_SPADE_LTE SPADE_LTE 3183 philhwani MACH_PHILHWANI PHILHWANI 3184 @@ -3174,13 +877,11 @@ ag5evm MACH_AG5EVM AG5EVM 3189 sc575plc MACH_SC575PLC SC575PLC 3190 sc575hmi MACH_SC575IPC SC575IPC 3191 omap3_tdm3730 MACH_OMAP3_TDM3730 OMAP3_TDM3730 3192 -g7 MACH_G7 G7 3193 top9000_eval MACH_TOP9000_EVAL TOP9000_EVAL 3194 top9000_su MACH_TOP9000_SU TOP9000_SU 3195 utm300 MACH_UTM300 UTM300 3196 tsunagi MACH_TSUNAGI TSUNAGI 3197 ts75xx MACH_TS75XX TS75XX 3198 -msm8x60_fusn_ffa MACH_MSM8X60_FUSN_FFA MSM8X60_FUSN_FFA 3199 ts47xx MACH_TS47XX TS47XX 3200 da850_k5 MACH_DA850_K5 DA850_K5 3201 ax502 MACH_AX502 AX502 3202 @@ -3285,7 +986,6 @@ rfl109145_ssrv MACH_RFL109145_SSRV RFL109145_SSRV 3304 nmh MACH_NMH NMH 3305 wn802t MACH_WN802T WN802T 3306 dragonet MACH_DRAGONET DRAGONET 3307 -geneva_b MACH_GENEVA_B GENEVA_B 3308 at91sam9263desk16l MACH_AT91SAM9263DESK16L AT91SAM9263DESK16L 3309 bcmhana_sv MACH_BCMHANA_SV BCMHANA_SV 3310 bcmhana_tablet MACH_BCMHANA_TABLET BCMHANA_TABLET 3311 @@ -3316,3 +1016,86 @@ rover_g8 MACH_ROVER_G8 ROVER_G8 3335 t5388p MACH_T5388P T5388P 3336 dingo MACH_DINGO DINGO 3337 goflexhome MACH_GOFLEXHOME GOFLEXHOME 3338 +lanreadyfn511 MACH_LANREADYFN511 LANREADYFN511 3340 +omap3_baia MACH_OMAP3_BAIA OMAP3_BAIA 3341 +omap3smartdisplay MACH_OMAP3SMARTDISPLAY OMAP3SMARTDISPLAY 3342 +xilinx MACH_XILINX XILINX 3343 +a2f MACH_A2F A2F 3344 +sky25 MACH_SKY25 SKY25 3345 +ccmx53 MACH_CCMX53 CCMX53 3346 +ccmx53js MACH_CCMX53JS CCMX53JS 3347 +ccwmx53 MACH_CCWMX53 CCWMX53 3348 +ccwmx53js MACH_CCWMX53JS CCWMX53JS 3349 +frisms MACH_FRISMS FRISMS 3350 +msm7x27a_ffa MACH_MSM7X27A_FFA MSM7X27A_FFA 3351 +msm7x27a_surf MACH_MSM7X27A_SURF MSM7X27A_SURF 3352 +msm7x27a_rumi3 MACH_MSM7X27A_RUMI3 MSM7X27A_RUMI3 3353 +dimmsam9g20 MACH_DIMMSAM9G20 DIMMSAM9G20 3354 +dimm_imx28 MACH_DIMM_IMX28 DIMM_IMX28 3355 +amk_a4 MACH_AMK_A4 AMK_A4 3356 +gnet_sgme MACH_GNET_SGME GNET_SGME 3357 +shooter_u MACH_SHOOTER_U SHOOTER_U 3358 +vmx53 MACH_VMX53 VMX53 3359 +rhino MACH_RHINO RHINO 3360 +armlex4210 MACH_ARMLEX4210 ARMLEX4210 3361 +swarcoextmodem MACH_SWARCOEXTMODEM SWARCOEXTMODEM 3362 +snowball MACH_SNOWBALL SNOWBALL 3363 +pcm049 MACH_PCM049 PCM049 3364 +vigor MACH_VIGOR VIGOR 3365 +oslo_amundsen MACH_OSLO_AMUNDSEN OSLO_AMUNDSEN 3366 +gsl_diamond MACH_GSL_DIAMOND GSL_DIAMOND 3367 +cv2201 MACH_CV2201 CV2201 3368 +cv2202 MACH_CV2202 CV2202 3369 +cv2203 MACH_CV2203 CV2203 3370 +vit_ibox MACH_VIT_IBOX VIT_IBOX 3371 +dm6441_esp MACH_DM6441_ESP DM6441_ESP 3372 +at91sam9x5ek MACH_AT91SAM9X5EK AT91SAM9X5EK 3373 +libra MACH_LIBRA LIBRA 3374 +easycrrh MACH_EASYCRRH EASYCRRH 3375 +tripel MACH_TRIPEL TRIPEL 3376 +endian_mini MACH_ENDIAN_MINI ENDIAN_MINI 3377 +xilinx_ep107 MACH_XILINX_EP107 XILINX_EP107 3378 +nuri MACH_NURI NURI 3379 +janus MACH_JANUS JANUS 3380 +ddnas MACH_DDNAS DDNAS 3381 +tag MACH_TAG TAG 3382 +tagw MACH_TAGW TAGW 3383 +nitrogen_vm_imx51 MACH_NITROGEN_VM_IMX51 NITROGEN_VM_IMX51 3384 +viprinet MACH_VIPRINET VIPRINET 3385 +bockw MACH_BOCKW BOCKW 3386 +eva2000 MACH_EVA2000 EVA2000 3387 +steelyard MACH_STEELYARD STEELYARD 3388 +sdh001 MACH_MACH_SDH001 MACH_SDH001 3390 +nsslsboard MACH_NSSLSBOARD NSSLSBOARD 3392 +geneva_b5 MACH_GENEVA_B5 GENEVA_B5 3393 +spear1340 MACH_SPEAR1340 SPEAR1340 3394 +rexmas MACH_REXMAS REXMAS 3395 +msm8960_cdp MACH_MSM8960_CDP MSM8960_CDP 3396 +msm8960_mdp MACH_MSM8960_MDP MSM8960_MDP 3397 +msm8960_fluid MACH_MSM8960_FLUID MSM8960_FLUID 3398 +msm8960_apq MACH_MSM8960_APQ MSM8960_APQ 3399 +helios_v2 MACH_HELIOS_V2 HELIOS_V2 3400 +mif10p MACH_MIF10P MIF10P 3401 +iam28 MACH_IAM28 IAM28 3402 +picasso MACH_PICASSO PICASSO 3403 +mr301a MACH_MR301A MR301A 3404 +notle MACH_NOTLE NOTLE 3405 +eelx2 MACH_EELX2 EELX2 3406 +moon MACH_MOON MOON 3407 +ruby MACH_RUBY RUBY 3408 +goldengate MACH_GOLDENGATE GOLDENGATE 3409 +ctbu_gen2 MACH_CTBU_GEN2 CTBU_GEN2 3410 +kmp_am17_01 MACH_KMP_AM17_01 KMP_AM17_01 3411 +wtplug MACH_WTPLUG WTPLUG 3412 +mx27su2 MACH_MX27SU2 MX27SU2 3413 +nb31 MACH_NB31 NB31 3414 +hjsdu MACH_HJSDU HJSDU 3415 +td3_rev1 MACH_TD3_REV1 TD3_REV1 3416 +eag_ci4000 MACH_EAG_CI4000 EAG_CI4000 3417 +net5big_nand_v2 MACH_NET5BIG_NAND_V2 NET5BIG_NAND_V2 3418 +cpx2 MACH_CPX2 CPX2 3419 +net2big_nand_v2 MACH_NET2BIG_NAND_V2 NET2BIG_NAND_V2 3420 +ecuv5 MACH_ECUV5 ECUV5 3421 +hsgx6d MACH_HSGX6D HSGX6D 3422 +dawad7 MACH_DAWAD7 DAWAD7 3423 +sam9repeater MACH_SAM9REPEATER SAM9REPEATER 3424 diff --git a/arch/arm/vfp/Makefile b/arch/arm/vfp/Makefile index 39f6d8e..6de73aa 100644 --- a/arch/arm/vfp/Makefile +++ b/arch/arm/vfp/Makefile @@ -4,8 +4,8 @@ # Copyright (C) 2001 ARM Limited # -# EXTRA_CFLAGS := -DDEBUG -# EXTRA_AFLAGS := -DDEBUG +# ccflags-y := -DDEBUG +# asflags-y := -DDEBUG KBUILD_AFLAGS :=$(KBUILD_AFLAGS:-msoft-float=-Wa,-mfpu=softvfp+vfp) LDFLAGS +=--no-warn-mismatch diff --git a/arch/avr32/include/asm/bitops.h b/arch/avr32/include/asm/bitops.h index f7dd5f7..72444d9 100644 --- a/arch/avr32/include/asm/bitops.h +++ b/arch/avr32/include/asm/bitops.h @@ -299,8 +299,7 @@ static inline int ffs(unsigned long word) #include <asm-generic/bitops/hweight.h> #include <asm-generic/bitops/lock.h> -#include <asm-generic/bitops/ext2-non-atomic.h> +#include <asm-generic/bitops/le.h> #include <asm-generic/bitops/ext2-atomic.h> -#include <asm-generic/bitops/minix-le.h> #endif /* __ASM_AVR32_BITOPS_H */ diff --git a/arch/avr32/include/asm/types.h b/arch/avr32/include/asm/types.h index 9cefda6..72667a3 100644 --- a/arch/avr32/include/asm/types.h +++ b/arch/avr32/include/asm/types.h @@ -23,14 +23,6 @@ typedef unsigned short umode_t; #define BITS_PER_LONG 32 -#ifndef __ASSEMBLY__ - -/* Dma addresses are 32-bits wide. */ - -typedef u32 dma_addr_t; - -#endif /* __ASSEMBLY__ */ - #endif /* __KERNEL__ */ diff --git a/arch/avr32/kernel/avr32_ksyms.c b/arch/avr32/kernel/avr32_ksyms.c index 11e310c..d93ead0 100644 --- a/arch/avr32/kernel/avr32_ksyms.c +++ b/arch/avr32/kernel/avr32_ksyms.c @@ -58,8 +58,8 @@ EXPORT_SYMBOL(find_first_zero_bit); EXPORT_SYMBOL(find_next_zero_bit); EXPORT_SYMBOL(find_first_bit); EXPORT_SYMBOL(find_next_bit); -EXPORT_SYMBOL(generic_find_next_le_bit); -EXPORT_SYMBOL(generic_find_next_zero_le_bit); +EXPORT_SYMBOL(find_next_bit_le); +EXPORT_SYMBOL(find_next_zero_bit_le); /* I/O primitives (lib/io-*.S) */ EXPORT_SYMBOL(__raw_readsb); diff --git a/arch/avr32/lib/findbit.S b/arch/avr32/lib/findbit.S index 997b33b..b935864 100644 --- a/arch/avr32/lib/findbit.S +++ b/arch/avr32/lib/findbit.S @@ -123,7 +123,7 @@ ENTRY(find_next_bit) brgt 1b retal r11 -ENTRY(generic_find_next_le_bit) +ENTRY(find_next_bit_le) lsr r8, r10, 5 sub r9, r11, r10 retle r11 @@ -153,7 +153,7 @@ ENTRY(generic_find_next_le_bit) brgt 1b retal r11 -ENTRY(generic_find_next_zero_le_bit) +ENTRY(find_next_zero_bit_le) lsr r8, r10, 5 sub r9, r11, r10 retle r11 diff --git a/arch/avr32/mach-at32ap/at32ap700x.c b/arch/avr32/mach-at32ap/at32ap700x.c index e67c999..bfc9d07 100644 --- a/arch/avr32/mach-at32ap/at32ap700x.c +++ b/arch/avr32/mach-at32ap/at32ap700x.c @@ -2048,6 +2048,11 @@ at32_add_device_ac97c(unsigned int id, struct ac97c_platform_data *data, rx_dws->reg_width = DW_DMA_SLAVE_WIDTH_16BIT; rx_dws->cfg_hi = DWC_CFGH_SRC_PER(3); rx_dws->cfg_lo &= ~(DWC_CFGL_HS_DST_POL | DWC_CFGL_HS_SRC_POL); + rx_dws->src_master = 0; + rx_dws->dst_master = 1; + rx_dws->src_msize = DW_DMA_MSIZE_1; + rx_dws->dst_msize = DW_DMA_MSIZE_1; + rx_dws->fc = DW_DMA_FC_D_P2M; } /* Check if DMA slave interface for playback should be configured. */ @@ -2056,6 +2061,11 @@ at32_add_device_ac97c(unsigned int id, struct ac97c_platform_data *data, tx_dws->reg_width = DW_DMA_SLAVE_WIDTH_16BIT; tx_dws->cfg_hi = DWC_CFGH_DST_PER(4); tx_dws->cfg_lo &= ~(DWC_CFGL_HS_DST_POL | DWC_CFGL_HS_SRC_POL); + tx_dws->src_master = 0; + tx_dws->dst_master = 1; + tx_dws->src_msize = DW_DMA_MSIZE_1; + tx_dws->dst_msize = DW_DMA_MSIZE_1; + tx_dws->fc = DW_DMA_FC_D_M2P; } if (platform_device_add_data(pdev, data, @@ -2128,6 +2138,11 @@ at32_add_device_abdac(unsigned int id, struct atmel_abdac_pdata *data) dws->reg_width = DW_DMA_SLAVE_WIDTH_32BIT; dws->cfg_hi = DWC_CFGH_DST_PER(2); dws->cfg_lo &= ~(DWC_CFGL_HS_DST_POL | DWC_CFGL_HS_SRC_POL); + dws->src_master = 0; + dws->dst_master = 1; + dws->src_msize = DW_DMA_MSIZE_1; + dws->dst_msize = DW_DMA_MSIZE_1; + dws->fc = DW_DMA_FC_D_M2P; if (platform_device_add_data(pdev, data, sizeof(struct atmel_abdac_pdata))) diff --git a/arch/blackfin/Kconfig b/arch/blackfin/Kconfig index c09577d..672c216 100644 --- a/arch/blackfin/Kconfig +++ b/arch/blackfin/Kconfig @@ -31,8 +31,10 @@ config BLACKFIN select HAVE_OPROFILE select ARCH_WANT_OPTIONAL_GPIOLIB select HAVE_GENERIC_HARDIRQS + select GENERIC_ATOMIC64 select GENERIC_IRQ_PROBE select IRQ_PER_CPU if SMP + select GENERIC_HARDIRQS_NO_DEPRECATED config GENERIC_CSUM def_bool y @@ -690,13 +692,13 @@ endmenu menu "Blackfin Kernel Optimizations" - depends on !SMP comment "Memory Optimizations" config I_ENTRY_L1 bool "Locate interrupt entry code in L1 Memory" default y + depends on !SMP help If enabled, interrupt entry code (STORE/RESTORE CONTEXT) is linked into L1 instruction memory. (less latency) @@ -704,6 +706,7 @@ config I_ENTRY_L1 config EXCPT_IRQ_SYSC_L1 bool "Locate entire ASM lowlevel exception / interrupt - Syscall and CPLB handler code in L1 Memory" default y + depends on !SMP help If enabled, the entire ASM lowlevel exception and interrupt entry code (STORE/RESTORE CONTEXT) is linked into L1 instruction memory. @@ -712,6 +715,7 @@ config EXCPT_IRQ_SYSC_L1 config DO_IRQ_L1 bool "Locate frequently called do_irq dispatcher function in L1 Memory" default y + depends on !SMP help If enabled, the frequently called do_irq dispatcher function is linked into L1 instruction memory. (less latency) @@ -719,6 +723,7 @@ config DO_IRQ_L1 config CORE_TIMER_IRQ_L1 bool "Locate frequently called timer_interrupt() function in L1 Memory" default y + depends on !SMP help If enabled, the frequently called timer_interrupt() function is linked into L1 instruction memory. (less latency) @@ -726,6 +731,7 @@ config CORE_TIMER_IRQ_L1 config IDLE_L1 bool "Locate frequently idle function in L1 Memory" default y + depends on !SMP help If enabled, the frequently called idle function is linked into L1 instruction memory. (less latency) @@ -733,6 +739,7 @@ config IDLE_L1 config SCHEDULE_L1 bool "Locate kernel schedule function in L1 Memory" default y + depends on !SMP help If enabled, the frequently called kernel schedule is linked into L1 instruction memory. (less latency) @@ -740,6 +747,7 @@ config SCHEDULE_L1 config ARITHMETIC_OPS_L1 bool "Locate kernel owned arithmetic functions in L1 Memory" default y + depends on !SMP help If enabled, arithmetic functions are linked into L1 instruction memory. (less latency) @@ -747,6 +755,7 @@ config ARITHMETIC_OPS_L1 config ACCESS_OK_L1 bool "Locate access_ok function in L1 Memory" default y + depends on !SMP help If enabled, the access_ok function is linked into L1 instruction memory. (less latency) @@ -754,6 +763,7 @@ config ACCESS_OK_L1 config MEMSET_L1 bool "Locate memset function in L1 Memory" default y + depends on !SMP help If enabled, the memset function is linked into L1 instruction memory. (less latency) @@ -761,6 +771,7 @@ config MEMSET_L1 config MEMCPY_L1 bool "Locate memcpy function in L1 Memory" default y + depends on !SMP help If enabled, the memcpy function is linked into L1 instruction memory. (less latency) @@ -768,6 +779,7 @@ config MEMCPY_L1 config STRCMP_L1 bool "locate strcmp function in L1 Memory" default y + depends on !SMP help If enabled, the strcmp function is linked into L1 instruction memory (less latency). @@ -775,6 +787,7 @@ config STRCMP_L1 config STRNCMP_L1 bool "locate strncmp function in L1 Memory" default y + depends on !SMP help If enabled, the strncmp function is linked into L1 instruction memory (less latency). @@ -782,6 +795,7 @@ config STRNCMP_L1 config STRCPY_L1 bool "locate strcpy function in L1 Memory" default y + depends on !SMP help If enabled, the strcpy function is linked into L1 instruction memory (less latency). @@ -789,6 +803,7 @@ config STRCPY_L1 config STRNCPY_L1 bool "locate strncpy function in L1 Memory" default y + depends on !SMP help If enabled, the strncpy function is linked into L1 instruction memory (less latency). @@ -796,6 +811,7 @@ config STRNCPY_L1 config SYS_BFIN_SPINLOCK_L1 bool "Locate sys_bfin_spinlock function in L1 Memory" default y + depends on !SMP help If enabled, sys_bfin_spinlock function is linked into L1 instruction memory. (less latency) @@ -803,6 +819,7 @@ config SYS_BFIN_SPINLOCK_L1 config IP_CHECKSUM_L1 bool "Locate IP Checksum function in L1 Memory" default n + depends on !SMP help If enabled, the IP Checksum function is linked into L1 instruction memory. (less latency) @@ -811,7 +828,7 @@ config CACHELINE_ALIGNED_L1 bool "Locate cacheline_aligned data to L1 Data Memory" default y if !BF54x default n if BF54x - depends on !BF531 + depends on !SMP && !BF531 help If enabled, cacheline_aligned data is linked into L1 data memory. (less latency) @@ -819,7 +836,7 @@ config CACHELINE_ALIGNED_L1 config SYSCALL_TAB_L1 bool "Locate Syscall Table L1 Data Memory" default n - depends on !BF531 + depends on !SMP && !BF531 help If enabled, the Syscall LUT is linked into L1 data memory. (less latency) @@ -827,16 +844,16 @@ config SYSCALL_TAB_L1 config CPLB_SWITCH_TAB_L1 bool "Locate CPLB Switch Tables L1 Data Memory" default n - depends on !BF531 + depends on !SMP && !BF531 help If enabled, the CPLB Switch Tables are linked into L1 data memory. (less latency) -config CACHE_FLUSH_L1 - bool "Locate cache flush funcs in L1 Inst Memory" +config ICACHE_FLUSH_L1 + bool "Locate icache flush funcs in L1 Inst Memory" default y help - If enabled, the Blackfin cache flushing functions are linked + If enabled, the Blackfin icache flushing functions are linked into L1 instruction memory. Note that this might be required to address anomalies, but @@ -844,9 +861,18 @@ config CACHE_FLUSH_L1 If you are using a processor affected by an anomaly, the build system will double check for you and prevent it. +config DCACHE_FLUSH_L1 + bool "Locate dcache flush funcs in L1 Inst Memory" + default y + depends on !SMP + help + If enabled, the Blackfin dcache flushing functions are linked + into L1 instruction memory. + config APP_STACK_L1 bool "Support locating application stack in L1 Scratch Memory" default y + depends on !SMP help If enabled the application stack can be located in L1 scratch memory (less latency). @@ -856,7 +882,7 @@ config APP_STACK_L1 config EXCEPTION_L1_SCRATCH bool "Locate exception stack in L1 Scratch Memory" default n - depends on !APP_STACK_L1 + depends on !SMP && !APP_STACK_L1 help Whenever an exception occurs, use the L1 Scratch memory for stack storage. You cannot place the stacks of FLAT binaries @@ -868,6 +894,7 @@ comment "Speed Optimizations" config BFIN_INS_LOWOVERHEAD bool "ins[bwl] low overhead, higher interrupt latency" default y + depends on !SMP help Reads on the Blackfin are speculative. In Blackfin terms, this means they can be interrupted at any time (even after they have been issued diff --git a/arch/blackfin/configs/BF518F-EZBRD_defconfig b/arch/blackfin/configs/BF518F-EZBRD_defconfig index db8d38a..5edcb58 100644 --- a/arch/blackfin/configs/BF518F-EZBRD_defconfig +++ b/arch/blackfin/configs/BF518F-EZBRD_defconfig @@ -115,6 +115,7 @@ CONFIG_DEBUG_DOUBLEFAULT=y CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_ONE=y CONFIG_EARLY_PRINTK=y CONFIG_CPLB_INFO=y +CONFIG_BFIN_PSEUDODBG_INSNS=y CONFIG_CRYPTO=y # CONFIG_CRYPTO_ANSI_CPRNG is not set CONFIG_CRC_CCITT=m diff --git a/arch/blackfin/configs/BF526-EZBRD_defconfig b/arch/blackfin/configs/BF526-EZBRD_defconfig index 3e50d78..2e54957 100644 --- a/arch/blackfin/configs/BF526-EZBRD_defconfig +++ b/arch/blackfin/configs/BF526-EZBRD_defconfig @@ -153,6 +153,7 @@ CONFIG_DEBUG_DOUBLEFAULT=y CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_ONE=y CONFIG_EARLY_PRINTK=y CONFIG_CPLB_INFO=y +CONFIG_BFIN_PSEUDODBG_INSNS=y CONFIG_CRYPTO=y # CONFIG_CRYPTO_ANSI_CPRNG is not set CONFIG_CRC_CCITT=m diff --git a/arch/blackfin/configs/BF527-EZKIT-V2_defconfig b/arch/blackfin/configs/BF527-EZKIT-V2_defconfig index 023ff0d..95cf2ba 100644 --- a/arch/blackfin/configs/BF527-EZKIT-V2_defconfig +++ b/arch/blackfin/configs/BF527-EZKIT-V2_defconfig @@ -183,5 +183,6 @@ CONFIG_DEBUG_DOUBLEFAULT=y CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_ONE=y CONFIG_EARLY_PRINTK=y CONFIG_CPLB_INFO=y +CONFIG_BFIN_PSEUDODBG_INSNS=y CONFIG_CRYPTO=y # CONFIG_CRYPTO_ANSI_CPRNG is not set diff --git a/arch/blackfin/configs/BF527-EZKIT_defconfig b/arch/blackfin/configs/BF527-EZKIT_defconfig index 4e5a121..8be8e33 100644 --- a/arch/blackfin/configs/BF527-EZKIT_defconfig +++ b/arch/blackfin/configs/BF527-EZKIT_defconfig @@ -175,5 +175,6 @@ CONFIG_DEBUG_DOUBLEFAULT=y CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_ONE=y CONFIG_EARLY_PRINTK=y CONFIG_CPLB_INFO=y +CONFIG_BFIN_PSEUDODBG_INSNS=y CONFIG_CRYPTO=y # CONFIG_CRYPTO_ANSI_CPRNG is not set diff --git a/arch/blackfin/configs/BF533-EZKIT_defconfig b/arch/blackfin/configs/BF533-EZKIT_defconfig index 9f8fc84..a7eb54b 100644 --- a/arch/blackfin/configs/BF533-EZKIT_defconfig +++ b/arch/blackfin/configs/BF533-EZKIT_defconfig @@ -108,5 +108,6 @@ CONFIG_DEBUG_DOUBLEFAULT=y CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_ONE=y CONFIG_EARLY_PRINTK=y CONFIG_CPLB_INFO=y +CONFIG_BFIN_PSEUDODBG_INSNS=y CONFIG_CRYPTO=y # CONFIG_CRYPTO_ANSI_CPRNG is not set diff --git a/arch/blackfin/configs/BF533-STAMP_defconfig b/arch/blackfin/configs/BF533-STAMP_defconfig index ccc432b..0aafde6 100644 --- a/arch/blackfin/configs/BF533-STAMP_defconfig +++ b/arch/blackfin/configs/BF533-STAMP_defconfig @@ -122,5 +122,6 @@ CONFIG_DEBUG_DOUBLEFAULT=y CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_ONE=y CONFIG_EARLY_PRINTK=y CONFIG_CPLB_INFO=y +CONFIG_BFIN_PSEUDODBG_INSNS=y CONFIG_CRYPTO=y # CONFIG_CRYPTO_ANSI_CPRNG is not set diff --git a/arch/blackfin/configs/BF537-STAMP_defconfig b/arch/blackfin/configs/BF537-STAMP_defconfig index 5666954..c9077fb 100644 --- a/arch/blackfin/configs/BF537-STAMP_defconfig +++ b/arch/blackfin/configs/BF537-STAMP_defconfig @@ -133,5 +133,6 @@ CONFIG_DEBUG_DOUBLEFAULT=y CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_ONE=y CONFIG_EARLY_PRINTK=y CONFIG_CPLB_INFO=y +CONFIG_BFIN_PSEUDODBG_INSNS=y CONFIG_CRYPTO=y # CONFIG_CRYPTO_ANSI_CPRNG is not set diff --git a/arch/blackfin/configs/BF538-EZKIT_defconfig b/arch/blackfin/configs/BF538-EZKIT_defconfig index ac22124..6883803 100644 --- a/arch/blackfin/configs/BF538-EZKIT_defconfig +++ b/arch/blackfin/configs/BF538-EZKIT_defconfig @@ -131,5 +131,6 @@ CONFIG_DEBUG_DOUBLEFAULT=y CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_ONE=y CONFIG_EARLY_PRINTK=y CONFIG_CPLB_INFO=y +CONFIG_BFIN_PSEUDODBG_INSNS=y CONFIG_CRYPTO=y # CONFIG_CRYPTO_ANSI_CPRNG is not set diff --git a/arch/blackfin/configs/BF548-EZKIT_defconfig b/arch/blackfin/configs/BF548-EZKIT_defconfig index 944404b..56151b5 100644 --- a/arch/blackfin/configs/BF548-EZKIT_defconfig +++ b/arch/blackfin/configs/BF548-EZKIT_defconfig @@ -205,5 +205,6 @@ CONFIG_DEBUG_DOUBLEFAULT=y CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_ONE=y CONFIG_EARLY_PRINTK=y CONFIG_CPLB_INFO=y +CONFIG_BFIN_PSEUDODBG_INSNS=y CONFIG_CRYPTO=y # CONFIG_CRYPTO_ANSI_CPRNG is not set diff --git a/arch/blackfin/configs/BF561-EZKIT-SMP_defconfig b/arch/blackfin/configs/BF561-EZKIT-SMP_defconfig index 7e67ba3..f5ed34e 100644 --- a/arch/blackfin/configs/BF561-EZKIT-SMP_defconfig +++ b/arch/blackfin/configs/BF561-EZKIT-SMP_defconfig @@ -109,5 +109,6 @@ CONFIG_DEBUG_DOUBLEFAULT=y CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_ONE=y CONFIG_EARLY_PRINTK=y CONFIG_CPLB_INFO=y +CONFIG_BFIN_PSEUDODBG_INSNS=y CONFIG_CRYPTO=y # CONFIG_CRYPTO_ANSI_CPRNG is not set diff --git a/arch/blackfin/configs/BF561-EZKIT_defconfig b/arch/blackfin/configs/BF561-EZKIT_defconfig index 141e593..1c0a82a 100644 --- a/arch/blackfin/configs/BF561-EZKIT_defconfig +++ b/arch/blackfin/configs/BF561-EZKIT_defconfig @@ -111,5 +111,6 @@ CONFIG_DEBUG_DOUBLEFAULT=y CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_ONE=y CONFIG_EARLY_PRINTK=y CONFIG_CPLB_INFO=y +CONFIG_BFIN_PSEUDODBG_INSNS=y CONFIG_CRYPTO=y # CONFIG_CRYPTO_ANSI_CPRNG is not set diff --git a/arch/blackfin/include/asm/atomic.h b/arch/blackfin/include/asm/atomic.h index d27c627..e485089 100644 --- a/arch/blackfin/include/asm/atomic.h +++ b/arch/blackfin/include/asm/atomic.h @@ -121,4 +121,6 @@ static inline int atomic_test_mask(int mask, atomic_t *v) #endif +#include <asm-generic/atomic64.h> + #endif diff --git a/arch/blackfin/include/asm/bitops.h b/arch/blackfin/include/asm/bitops.h index 29f4fd8..49762c6 100644 --- a/arch/blackfin/include/asm/bitops.h +++ b/arch/blackfin/include/asm/bitops.h @@ -25,9 +25,8 @@ #include <asm-generic/bitops/const_hweight.h> #include <asm-generic/bitops/lock.h> -#include <asm-generic/bitops/ext2-non-atomic.h> +#include <asm-generic/bitops/le.h> #include <asm-generic/bitops/ext2-atomic.h> -#include <asm-generic/bitops/minix.h> #ifndef CONFIG_SMP #include <linux/irqflags.h> diff --git a/arch/blackfin/include/asm/def_LPBlackfin.h b/arch/blackfin/include/asm/def_LPBlackfin.h index e3f0f4c..7600fe0 100644 --- a/arch/blackfin/include/asm/def_LPBlackfin.h +++ b/arch/blackfin/include/asm/def_LPBlackfin.h @@ -58,14 +58,26 @@ ({ BUG(); 0; }); \ }) #define bfin_write(addr, val) \ -({ \ +do { \ switch (sizeof(*(addr))) { \ case 1: bfin_write8(addr, val); break; \ case 2: bfin_write16(addr, val); break; \ case 4: bfin_write32(addr, val); break; \ default: BUG(); \ } \ -}) +} while (0) + +#define bfin_write_or(addr, bits) \ +do { \ + void *__addr = (void *)(addr); \ + bfin_write(__addr, bfin_read(__addr) | (bits)); \ +} while (0) + +#define bfin_write_and(addr, bits) \ +do { \ + void *__addr = (void *)(addr); \ + bfin_write(__addr, bfin_read(__addr) & (bits)); \ +} while (0) #endif /* __ASSEMBLY__ */ diff --git a/arch/blackfin/include/asm/dpmc.h b/arch/blackfin/include/asm/dpmc.h index 3047120..edf2a2a 100644 --- a/arch/blackfin/include/asm/dpmc.h +++ b/arch/blackfin/include/asm/dpmc.h @@ -125,6 +125,9 @@ void unset_dram_srfs(void); #define VRPAIR(vlev, freq) (((vlev) << 16) | ((freq) >> 16)) +#ifdef CONFIG_CPU_FREQ +#define CPUFREQ_CPU 0 +#endif struct bfin_dpmc_platform_data { const unsigned int *tuple_tab; unsigned short tabsize; diff --git a/arch/blackfin/include/asm/ipipe.h b/arch/blackfin/include/asm/ipipe.h index 40f94a7..9e0cc0e 100644 --- a/arch/blackfin/include/asm/ipipe.h +++ b/arch/blackfin/include/asm/ipipe.h @@ -34,11 +34,12 @@ #include <asm/bitops.h> #include <asm/atomic.h> #include <asm/traps.h> +#include <asm/bitsperlong.h> -#define IPIPE_ARCH_STRING "1.12-00" +#define IPIPE_ARCH_STRING "1.16-01" #define IPIPE_MAJOR_NUMBER 1 -#define IPIPE_MINOR_NUMBER 12 -#define IPIPE_PATCH_NUMBER 0 +#define IPIPE_MINOR_NUMBER 16 +#define IPIPE_PATCH_NUMBER 1 #ifdef CONFIG_SMP #error "I-pipe/blackfin: SMP not implemented" @@ -55,25 +56,19 @@ do { \ #define task_hijacked(p) \ ({ \ int __x__ = __ipipe_root_domain_p; \ - __clear_bit(IPIPE_SYNC_FLAG, &ipipe_root_cpudom_var(status)); \ if (__x__) \ - hard_local_irq_enable(); \ + hard_local_irq_enable(); \ !__x__; \ }) struct ipipe_domain; struct ipipe_sysinfo { - - int ncpus; /* Number of CPUs on board */ - u64 cpufreq; /* CPU frequency (in Hz) */ - - /* Arch-dependent block */ - - struct { - unsigned tmirq; /* Timer tick IRQ */ - u64 tmfreq; /* Timer frequency */ - } archdep; + int sys_nr_cpus; /* Number of CPUs on board */ + int sys_hrtimer_irq; /* hrtimer device IRQ */ + u64 sys_hrtimer_freq; /* hrtimer device frequency */ + u64 sys_hrclock_freq; /* hrclock device frequency */ + u64 sys_cpu_freq; /* CPU frequency (Hz) */ }; #define ipipe_read_tsc(t) \ @@ -115,9 +110,19 @@ void __ipipe_enable_irqdesc(struct ipipe_domain *ipd, void __ipipe_disable_irqdesc(struct ipipe_domain *ipd, unsigned irq); -#define __ipipe_enable_irq(irq) (irq_desc[irq].chip->unmask(irq)) +#define __ipipe_enable_irq(irq) \ + do { \ + struct irq_desc *desc = irq_to_desc(irq); \ + struct irq_chip *chip = get_irq_desc_chip(desc); \ + chip->irq_unmask(&desc->irq_data); \ + } while (0) -#define __ipipe_disable_irq(irq) (irq_desc[irq].chip->mask(irq)) +#define __ipipe_disable_irq(irq) \ + do { \ + struct irq_desc *desc = irq_to_desc(irq); \ + struct irq_chip *chip = get_irq_desc_chip(desc); \ + chip->irq_mask(&desc->irq_data); \ + } while (0) static inline int __ipipe_check_tickdev(const char *devname) { @@ -128,12 +133,11 @@ void __ipipe_enable_pipeline(void); #define __ipipe_hook_critical_ipi(ipd) do { } while (0) -#define __ipipe_sync_pipeline ___ipipe_sync_pipeline -void ___ipipe_sync_pipeline(unsigned long syncmask); +void ___ipipe_sync_pipeline(void); void __ipipe_handle_irq(unsigned irq, struct pt_regs *regs); -int __ipipe_get_irq_priority(unsigned irq); +int __ipipe_get_irq_priority(unsigned int irq); void __ipipe_serial_debug(const char *fmt, ...); @@ -152,7 +156,10 @@ static inline unsigned long __ipipe_ffnz(unsigned long ul) return ffs(ul) - 1; } -#define __ipipe_run_irqtail() /* Must be a macro */ \ +#define __ipipe_do_root_xirq(ipd, irq) \ + ((ipd)->irqs[irq].handler(irq, &__raw_get_cpu_var(__ipipe_tick_regs))) + +#define __ipipe_run_irqtail(irq) /* Must be a macro */ \ do { \ unsigned long __pending; \ CSYNC(); \ @@ -164,42 +171,8 @@ static inline unsigned long __ipipe_ffnz(unsigned long ul) } \ } while (0) -#define __ipipe_run_isr(ipd, irq) \ - do { \ - if (!__ipipe_pipeline_head_p(ipd)) \ - hard_local_irq_enable(); \ - if (ipd == ipipe_root_domain) { \ - if (unlikely(ipipe_virtual_irq_p(irq))) { \ - irq_enter(); \ - ipd->irqs[irq].handler(irq, ipd->irqs[irq].cookie); \ - irq_exit(); \ - } else \ - ipd->irqs[irq].handler(irq, &__raw_get_cpu_var(__ipipe_tick_regs)); \ - } else { \ - __clear_bit(IPIPE_SYNC_FLAG, &ipipe_cpudom_var(ipd, status)); \ - ipd->irqs[irq].handler(irq, ipd->irqs[irq].cookie); \ - /* Attempt to exit the outer interrupt level before \ - * starting the deferred IRQ processing. */ \ - __ipipe_run_irqtail(); \ - __set_bit(IPIPE_SYNC_FLAG, &ipipe_cpudom_var(ipd, status)); \ - } \ - hard_local_irq_disable(); \ - } while (0) - #define __ipipe_syscall_watched_p(p, sc) \ - (((p)->flags & PF_EVNOTIFY) || (unsigned long)sc >= NR_syscalls) - -void ipipe_init_irq_threads(void); - -int ipipe_start_irq_thread(unsigned irq, struct irq_desc *desc); - -#ifdef CONFIG_TICKSOURCE_CORETMR -#define IRQ_SYSTMR IRQ_CORETMR -#define IRQ_PRIOTMR IRQ_CORETMR -#else -#define IRQ_SYSTMR IRQ_TIMER0 -#define IRQ_PRIOTMR CONFIG_IRQ_TIMER0 -#endif + (ipipe_notifier_enabled_p(p) || (unsigned long)sc >= NR_syscalls) #ifdef CONFIG_BF561 #define bfin_write_TIMER_DISABLE(val) bfin_write_TMRS8_DISABLE(val) @@ -219,11 +192,11 @@ int ipipe_start_irq_thread(unsigned irq, struct irq_desc *desc); #define task_hijacked(p) 0 #define ipipe_trap_notify(t, r) 0 +#define __ipipe_root_tick_p(regs) 1 -#define ipipe_init_irq_threads() do { } while (0) -#define ipipe_start_irq_thread(irq, desc) 0 +#endif /* !CONFIG_IPIPE */ -#ifndef CONFIG_TICKSOURCE_GPTMR0 +#ifdef CONFIG_TICKSOURCE_CORETMR #define IRQ_SYSTMR IRQ_CORETMR #define IRQ_PRIOTMR IRQ_CORETMR #else @@ -231,10 +204,6 @@ int ipipe_start_irq_thread(unsigned irq, struct irq_desc *desc); #define IRQ_PRIOTMR CONFIG_IRQ_TIMER0 #endif -#define __ipipe_root_tick_p(regs) 1 - -#endif /* !CONFIG_IPIPE */ - #define ipipe_update_tick_evtdev(evtdev) do { } while (0) #endif /* !__ASM_BLACKFIN_IPIPE_H */ diff --git a/arch/blackfin/include/asm/ipipe_base.h b/arch/blackfin/include/asm/ipipe_base.h index 0040920..84a4ffd 100644 --- a/arch/blackfin/include/asm/ipipe_base.h +++ b/arch/blackfin/include/asm/ipipe_base.h @@ -24,8 +24,10 @@ #ifdef CONFIG_IPIPE +#include <asm/bitsperlong.h> +#include <mach/irq.h> + #define IPIPE_NR_XIRQS NR_IRQS -#define IPIPE_IRQ_ISHIFT 5 /* 2^5 for 32bits arch. */ /* Blackfin-specific, per-cpu pipeline status */ #define IPIPE_SYNCDEFER_FLAG 15 @@ -42,11 +44,14 @@ #define IPIPE_EVENT_INIT (IPIPE_FIRST_EVENT + 4) #define IPIPE_EVENT_EXIT (IPIPE_FIRST_EVENT + 5) #define IPIPE_EVENT_CLEANUP (IPIPE_FIRST_EVENT + 6) -#define IPIPE_LAST_EVENT IPIPE_EVENT_CLEANUP +#define IPIPE_EVENT_RETURN (IPIPE_FIRST_EVENT + 7) +#define IPIPE_LAST_EVENT IPIPE_EVENT_RETURN #define IPIPE_NR_EVENTS (IPIPE_LAST_EVENT + 1) #define IPIPE_TIMER_IRQ IRQ_CORETMR +#define __IPIPE_FEATURE_SYSINFO_V2 1 + #ifndef __ASSEMBLY__ extern unsigned long __ipipe_root_status; /* Alias to ipipe_root_cpudom_var(status) */ @@ -63,6 +68,8 @@ void __ipipe_unlock_root(void); #endif /* !__ASSEMBLY__ */ +#define __IPIPE_FEATURE_SYSINFO_V2 1 + #endif /* CONFIG_IPIPE */ #endif /* !__ASM_BLACKFIN_IPIPE_BASE_H */ diff --git a/arch/blackfin/include/asm/irqflags.h b/arch/blackfin/include/asm/irqflags.h index 3365cb9..b4bbb75 100644 --- a/arch/blackfin/include/asm/irqflags.h +++ b/arch/blackfin/include/asm/irqflags.h @@ -89,15 +89,33 @@ static inline void __hard_local_irq_restore(unsigned long flags) #ifdef CONFIG_IPIPE #include <linux/compiler.h> -#include <linux/ipipe_base.h> #include <linux/ipipe_trace.h> +/* + * Way too many inter-deps between low-level headers in this port, so + * we redeclare the required bits we cannot pick from + * <asm/ipipe_base.h> to prevent circular dependencies. + */ +void __ipipe_stall_root(void); +void __ipipe_unstall_root(void); +unsigned long __ipipe_test_root(void); +unsigned long __ipipe_test_and_stall_root(void); +void __ipipe_restore_root(unsigned long flags); + +#ifdef CONFIG_IPIPE_DEBUG_CONTEXT +struct ipipe_domain; +extern struct ipipe_domain ipipe_root; +void ipipe_check_context(struct ipipe_domain *ipd); +#define __check_irqop_context(ipd) ipipe_check_context(&ipipe_root) +#else /* !CONFIG_IPIPE_DEBUG_CONTEXT */ +#define __check_irqop_context(ipd) do { } while (0) +#endif /* !CONFIG_IPIPE_DEBUG_CONTEXT */ /* * Interrupt pipe interface to linux/irqflags.h. */ static inline void arch_local_irq_disable(void) { - ipipe_check_context(ipipe_root_domain); + __check_irqop_context(); __ipipe_stall_root(); barrier(); } @@ -105,7 +123,7 @@ static inline void arch_local_irq_disable(void) static inline void arch_local_irq_enable(void) { barrier(); - ipipe_check_context(ipipe_root_domain); + __check_irqop_context(); __ipipe_unstall_root(); } @@ -119,16 +137,21 @@ static inline int arch_irqs_disabled_flags(unsigned long flags) return flags == bfin_no_irqs; } -static inline void arch_local_irq_save_ptr(unsigned long *_flags) +static inline unsigned long arch_local_irq_save(void) { - x = __ipipe_test_and_stall_root() ? bfin_no_irqs : bfin_irq_flags; + unsigned long flags; + + __check_irqop_context(); + flags = __ipipe_test_and_stall_root() ? bfin_no_irqs : bfin_irq_flags; barrier(); + + return flags; } -static inline unsigned long arch_local_irq_save(void) +static inline void arch_local_irq_restore(unsigned long flags) { - ipipe_check_context(ipipe_root_domain); - return __hard_local_irq_save(); + __check_irqop_context(); + __ipipe_restore_root(flags == bfin_no_irqs); } static inline unsigned long arch_mangle_irq_bits(int virt, unsigned long real) @@ -192,7 +215,10 @@ static inline void hard_local_irq_restore(unsigned long flags) # define hard_local_irq_restore(flags) __hard_local_irq_restore(flags) #endif /* !CONFIG_IPIPE_TRACE_IRQSOFF */ -#else /* CONFIG_IPIPE */ +#define hard_local_irq_save_cond() hard_local_irq_save() +#define hard_local_irq_restore_cond(flags) hard_local_irq_restore(flags) + +#else /* !CONFIG_IPIPE */ /* * Direct interface to linux/irqflags.h. @@ -212,7 +238,48 @@ static inline void hard_local_irq_restore(unsigned long flags) #define hard_local_irq_restore(flags) __hard_local_irq_restore(flags) #define hard_local_irq_enable() __hard_local_irq_enable() #define hard_local_irq_disable() __hard_local_irq_disable() - +#define hard_local_irq_save_cond() hard_local_save_flags() +#define hard_local_irq_restore_cond(flags) do { (void)(flags); } while (0) #endif /* !CONFIG_IPIPE */ + +#ifdef CONFIG_SMP +#define hard_local_irq_save_smp() hard_local_irq_save() +#define hard_local_irq_restore_smp(flags) hard_local_irq_restore(flags) +#else +#define hard_local_irq_save_smp() hard_local_save_flags() +#define hard_local_irq_restore_smp(flags) do { (void)(flags); } while (0) +#endif + +/* + * Remap the arch-neutral IRQ state manipulation macros to the + * blackfin-specific hard_local_irq_* API. + */ +#define local_irq_save_hw(flags) \ + do { \ + (flags) = hard_local_irq_save(); \ + } while (0) +#define local_irq_restore_hw(flags) \ + do { \ + hard_local_irq_restore(flags); \ + } while (0) +#define local_irq_disable_hw() \ + do { \ + hard_local_irq_disable(); \ + } while (0) +#define local_irq_enable_hw() \ + do { \ + hard_local_irq_enable(); \ + } while (0) +#define local_irq_save_hw_notrace(flags) \ + do { \ + (flags) = __hard_local_irq_save(); \ + } while (0) +#define local_irq_restore_hw_notrace(flags) \ + do { \ + __hard_local_irq_restore(flags); \ + } while (0) + +#define irqs_disabled_hw() hard_irqs_disabled() + #endif diff --git a/arch/blackfin/include/asm/smp.h b/arch/blackfin/include/asm/smp.h index f5b5379..af6c0aa 100644 --- a/arch/blackfin/include/asm/smp.h +++ b/arch/blackfin/include/asm/smp.h @@ -17,7 +17,12 @@ #define raw_smp_processor_id() blackfin_core_id() -extern char coreb_trampoline_start, coreb_trampoline_end; +extern void bfin_relocate_coreb_l1_mem(void); + +#if defined(CONFIG_SMP) && defined(CONFIG_ICACHE_FLUSH_L1) +asmlinkage void blackfin_icache_flush_range_l1(unsigned long *ptr); +extern unsigned long blackfin_iflush_l1_entry[NR_CPUS]; +#endif struct corelock_slot { int lock; @@ -34,7 +39,7 @@ extern unsigned long dcache_invld_count[NR_CPUS]; void smp_icache_flush_range_others(unsigned long start, unsigned long end); #ifdef CONFIG_HOTPLUG_CPU -void coreb_sleep(u32 sic_iwr0, u32 sic_iwr1, u32 sic_iwr2); +void coreb_die(void); void cpu_die(void); void platform_cpu_die(void); int __cpu_disable(void); diff --git a/arch/blackfin/include/asm/unistd.h b/arch/blackfin/include/asm/unistd.h index 928ae97..ff9a9f3 100644 --- a/arch/blackfin/include/asm/unistd.h +++ b/arch/blackfin/include/asm/unistd.h @@ -393,8 +393,12 @@ #define __NR_fanotify_mark 372 #define __NR_prlimit64 373 #define __NR_cacheflush 374 +#define __NR_name_to_handle_at 375 +#define __NR_open_by_handle_at 376 +#define __NR_clock_adjtime 377 +#define __NR_syncfs 378 -#define __NR_syscall 375 +#define __NR_syscall 379 #define NR_syscalls __NR_syscall /* Old optional stuff no one actually uses */ diff --git a/arch/blackfin/kernel/bfin_dma_5xx.c b/arch/blackfin/kernel/bfin_dma_5xx.c index 1e485df..6ce8dce 100644 --- a/arch/blackfin/kernel/bfin_dma_5xx.c +++ b/arch/blackfin/kernel/bfin_dma_5xx.c @@ -84,6 +84,24 @@ static int __init proc_dma_init(void) late_initcall(proc_dma_init); #endif +static void set_dma_peripheral_map(unsigned int channel, const char *device_id) +{ +#ifdef CONFIG_BF54x + unsigned int per_map; + + switch (channel) { + case CH_UART2_RX: per_map = 0xC << 12; break; + case CH_UART2_TX: per_map = 0xD << 12; break; + case CH_UART3_RX: per_map = 0xE << 12; break; + case CH_UART3_TX: per_map = 0xF << 12; break; + default: return; + } + + if (strncmp(device_id, "BFIN_UART", 9) == 0) + dma_ch[channel].regs->peripheral_map = per_map; +#endif +} + /** * request_dma - request a DMA channel * @@ -111,19 +129,7 @@ int request_dma(unsigned int channel, const char *device_id) return -EBUSY; } -#ifdef CONFIG_BF54x - if (channel >= CH_UART2_RX && channel <= CH_UART3_TX) { - unsigned int per_map; - per_map = dma_ch[channel].regs->peripheral_map & 0xFFF; - if (strncmp(device_id, "BFIN_UART", 9) == 0) - dma_ch[channel].regs->peripheral_map = per_map | - ((channel - CH_UART2_RX + 0xC)<<12); - else - dma_ch[channel].regs->peripheral_map = per_map | - ((channel - CH_UART2_RX + 0x6)<<12); - } -#endif - + set_dma_peripheral_map(channel, device_id); dma_ch[channel].device_id = device_id; dma_ch[channel].irq = 0; diff --git a/arch/blackfin/kernel/ipipe.c b/arch/blackfin/kernel/ipipe.c index 3b1da4a..f37019c 100644 --- a/arch/blackfin/kernel/ipipe.c +++ b/arch/blackfin/kernel/ipipe.c @@ -154,7 +154,7 @@ void __ipipe_handle_irq(unsigned irq, struct pt_regs *regs) * pending for it. */ if (test_bit(IPIPE_AHEAD_FLAG, &this_domain->flags) && - ipipe_head_cpudom_var(irqpend_himask) == 0) + !__ipipe_ipending_p(ipipe_head_cpudom_ptr())) goto out; __ipipe_walk_pipeline(head); @@ -185,25 +185,21 @@ void __ipipe_disable_irqdesc(struct ipipe_domain *ipd, unsigned irq) } EXPORT_SYMBOL(__ipipe_disable_irqdesc); -int __ipipe_syscall_root(struct pt_regs *regs) +asmlinkage int __ipipe_syscall_root(struct pt_regs *regs) { struct ipipe_percpu_domain_data *p; - unsigned long flags; + void (*hook)(void); int ret; + WARN_ON_ONCE(irqs_disabled_hw()); + /* - * We need to run the IRQ tail hook whenever we don't - * propagate a syscall to higher domains, because we know that - * important operations might be pending there (e.g. Xenomai - * deferred rescheduling). + * We need to run the IRQ tail hook each time we intercept a + * syscall, because we know that important operations might be + * pending there (e.g. Xenomai deferred rescheduling). */ - - if (regs->orig_p0 < NR_syscalls) { - void (*hook)(void) = (void (*)(void))__ipipe_irq_tail_hook; - hook(); - if ((current->flags & PF_EVNOTIFY) == 0) - return 0; - } + hook = (__typeof__(hook))__ipipe_irq_tail_hook; + hook(); /* * This routine either returns: @@ -214,51 +210,47 @@ int __ipipe_syscall_root(struct pt_regs *regs) * tail work has to be performed (for handling signals etc). */ - if (!__ipipe_event_monitored_p(IPIPE_EVENT_SYSCALL)) + if (!__ipipe_syscall_watched_p(current, regs->orig_p0) || + !__ipipe_event_monitored_p(IPIPE_EVENT_SYSCALL)) return 0; ret = __ipipe_dispatch_event(IPIPE_EVENT_SYSCALL, regs); - flags = hard_local_irq_save(); + hard_local_irq_disable(); - if (!__ipipe_root_domain_p) { - hard_local_irq_restore(flags); - return 1; + /* + * This is the end of the syscall path, so we may + * safely assume a valid Linux task stack here. + */ + if (current->ipipe_flags & PF_EVTRET) { + current->ipipe_flags &= ~PF_EVTRET; + __ipipe_dispatch_event(IPIPE_EVENT_RETURN, regs); } - p = ipipe_root_cpudom_ptr(); - if ((p->irqpend_himask & IPIPE_IRQMASK_VIRT) != 0) - __ipipe_sync_pipeline(IPIPE_IRQMASK_VIRT); + if (!__ipipe_root_domain_p) + ret = -1; + else { + p = ipipe_root_cpudom_ptr(); + if (__ipipe_ipending_p(p)) + __ipipe_sync_pipeline(); + } - hard_local_irq_restore(flags); + hard_local_irq_enable(); return -ret; } -unsigned long ipipe_critical_enter(void (*syncfn) (void)) -{ - unsigned long flags; - - flags = hard_local_irq_save(); - - return flags; -} - -void ipipe_critical_exit(unsigned long flags) -{ - hard_local_irq_restore(flags); -} - static void __ipipe_no_irqtail(void) { } int ipipe_get_sysinfo(struct ipipe_sysinfo *info) { - info->ncpus = num_online_cpus(); - info->cpufreq = ipipe_cpu_freq(); - info->archdep.tmirq = IPIPE_TIMER_IRQ; - info->archdep.tmfreq = info->cpufreq; + info->sys_nr_cpus = num_online_cpus(); + info->sys_cpu_freq = ipipe_cpu_freq(); + info->sys_hrtimer_irq = IPIPE_TIMER_IRQ; + info->sys_hrtimer_freq = __ipipe_core_clock; + info->sys_hrclock_freq = __ipipe_core_clock; return 0; } @@ -289,6 +281,7 @@ int ipipe_trigger_irq(unsigned irq) asmlinkage void __ipipe_sync_root(void) { void (*irq_tail_hook)(void) = (void (*)(void))__ipipe_irq_tail_hook; + struct ipipe_percpu_domain_data *p; unsigned long flags; BUG_ON(irqs_disabled()); @@ -300,19 +293,20 @@ asmlinkage void __ipipe_sync_root(void) clear_thread_flag(TIF_IRQ_SYNC); - if (ipipe_root_cpudom_var(irqpend_himask) != 0) - __ipipe_sync_pipeline(IPIPE_IRQMASK_ANY); + p = ipipe_root_cpudom_ptr(); + if (__ipipe_ipending_p(p)) + __ipipe_sync_pipeline(); hard_local_irq_restore(flags); } -void ___ipipe_sync_pipeline(unsigned long syncmask) +void ___ipipe_sync_pipeline(void) { if (__ipipe_root_domain_p && test_bit(IPIPE_SYNCDEFER_FLAG, &ipipe_root_cpudom_var(status))) return; - __ipipe_sync_stage(syncmask); + __ipipe_sync_stage(); } void __ipipe_disable_root_irqs_hw(void) diff --git a/arch/blackfin/kernel/irqchip.c b/arch/blackfin/kernel/irqchip.c index 64cff54..8f07939 100644 --- a/arch/blackfin/kernel/irqchip.c +++ b/arch/blackfin/kernel/irqchip.c @@ -39,21 +39,23 @@ int show_interrupts(struct seq_file *p, void *v) unsigned long flags; if (i < NR_IRQS) { - raw_spin_lock_irqsave(&irq_desc[i].lock, flags); - action = irq_desc[i].action; + struct irq_desc *desc = irq_to_desc(i); + + raw_spin_lock_irqsave(&desc->lock, flags); + action = desc->action; if (!action) goto skip; seq_printf(p, "%3d: ", i); for_each_online_cpu(j) seq_printf(p, "%10u ", kstat_irqs_cpu(i, j)); - seq_printf(p, " %8s", irq_desc[i].chip->name); + seq_printf(p, " %8s", get_irq_desc_chip(desc)->name); seq_printf(p, " %s", action->name); for (action = action->next; action; action = action->next) seq_printf(p, " %s", action->name); seq_putc(p, '\n'); skip: - raw_spin_unlock_irqrestore(&irq_desc[i].lock, flags); + raw_spin_unlock_irqrestore(&desc->lock, flags); } else if (i == NR_IRQS) { seq_printf(p, "NMI: "); for_each_online_cpu(j) diff --git a/arch/blackfin/kernel/kgdb.c b/arch/blackfin/kernel/kgdb.c index eb92592..b8cfe34 100644 --- a/arch/blackfin/kernel/kgdb.c +++ b/arch/blackfin/kernel/kgdb.c @@ -422,11 +422,7 @@ int kgdb_arch_handle_exception(int vector, int signo, struct kgdb_arch arch_kgdb_ops = { .gdb_bpt_instr = {0xa1}, -#ifdef CONFIG_SMP - .flags = KGDB_HW_BREAKPOINT|KGDB_THR_PROC_SWAP, -#else .flags = KGDB_HW_BREAKPOINT, -#endif .set_hw_breakpoint = bfin_set_hw_break, .remove_hw_breakpoint = bfin_remove_hw_break, .disable_hw_break = bfin_disable_hw_debug, diff --git a/arch/blackfin/kernel/setup.c b/arch/blackfin/kernel/setup.c index ac71dc1..805c613 100644 --- a/arch/blackfin/kernel/setup.c +++ b/arch/blackfin/kernel/setup.c @@ -215,11 +215,48 @@ void __init bfin_relocate_l1_mem(void) early_dma_memcpy_done(); +#if defined(CONFIG_SMP) && defined(CONFIG_ICACHE_FLUSH_L1) + blackfin_iflush_l1_entry[0] = (unsigned long)blackfin_icache_flush_range_l1; +#endif + /* if necessary, copy L2 text/data to L2 SRAM */ if (L2_LENGTH && l2_len) memcpy(_stext_l2, _l2_lma, l2_len); } +#ifdef CONFIG_SMP +void __init bfin_relocate_coreb_l1_mem(void) +{ + unsigned long text_l1_len = (unsigned long)_text_l1_len; + unsigned long data_l1_len = (unsigned long)_data_l1_len; + unsigned long data_b_l1_len = (unsigned long)_data_b_l1_len; + + blackfin_dma_early_init(); + + /* if necessary, copy L1 text to L1 instruction SRAM */ + if (L1_CODE_LENGTH && text_l1_len) + early_dma_memcpy((void *)COREB_L1_CODE_START, _text_l1_lma, + text_l1_len); + + /* if necessary, copy L1 data to L1 data bank A SRAM */ + if (L1_DATA_A_LENGTH && data_l1_len) + early_dma_memcpy((void *)COREB_L1_DATA_A_START, _data_l1_lma, + data_l1_len); + + /* if necessary, copy L1 data B to L1 data bank B SRAM */ + if (L1_DATA_B_LENGTH && data_b_l1_len) + early_dma_memcpy((void *)COREB_L1_DATA_B_START, _data_b_l1_lma, + data_b_l1_len); + + early_dma_memcpy_done(); + +#ifdef CONFIG_ICACHE_FLUSH_L1 + blackfin_iflush_l1_entry[1] = (unsigned long)blackfin_icache_flush_range_l1 - + (unsigned long)_stext_l1 + COREB_L1_CODE_START; +#endif +} +#endif + #ifdef CONFIG_ROMKERNEL void __init bfin_relocate_xip_data(void) { diff --git a/arch/blackfin/kernel/vmlinux.lds.S b/arch/blackfin/kernel/vmlinux.lds.S index c40d07f..854fa49 100644 --- a/arch/blackfin/kernel/vmlinux.lds.S +++ b/arch/blackfin/kernel/vmlinux.lds.S @@ -136,7 +136,7 @@ SECTIONS . = ALIGN(16); INIT_DATA_SECTION(16) - PERCPU(32, 4) + PERCPU(32, PAGE_SIZE) .exit.data : { @@ -176,6 +176,7 @@ SECTIONS { . = ALIGN(4); __stext_l1 = .; + *(.l1.text.head) *(.l1.text) #ifdef CONFIG_SCHEDULE_L1 SCHED_TEXT diff --git a/arch/blackfin/mach-bf518/include/mach/defBF512.h b/arch/blackfin/mach-bf518/include/mach/defBF512.h index 2728582..cb1172f 100644 --- a/arch/blackfin/mach-bf518/include/mach/defBF512.h +++ b/arch/blackfin/mach-bf518/include/mach/defBF512.h @@ -1201,25 +1201,6 @@ #define PGTE_PPI 0x0000 /* Enable PPI D15:13 */ #define PGTE_SPORT 0x0800 /* Enable DT1PRI/TFS1/TSCLK1 */ - -/* ****************** HANDSHAKE DMA (HDMA) MASKS *********************/ -/* HDMAx_CTL Masks */ -#define HMDMAEN 0x0001 /* Enable Handshake DMA 0/1 */ -#define REP 0x0002 /* HDMA Request Polarity */ -#define UTE 0x0004 /* Urgency Threshold Enable */ -#define OIE 0x0010 /* Overflow Interrupt Enable */ -#define BDIE 0x0020 /* Block Done Interrupt Enable */ -#define MBDI 0x0040 /* Mask Block Done IRQ If Pending ECNT */ -#define DRQ 0x0300 /* HDMA Request Type */ -#define DRQ_NONE 0x0000 /* No Request */ -#define DRQ_SINGLE 0x0100 /* Channels Request Single */ -#define DRQ_MULTI 0x0200 /* Channels Request Multi (Default) */ -#define DRQ_URGENT 0x0300 /* Channels Request Multi Urgent */ -#define RBC 0x1000 /* Reload BCNT With IBCNT */ -#define PS 0x2000 /* HDMA Pin Status */ -#define OI 0x4000 /* Overflow Interrupt Generated */ -#define BDI 0x8000 /* Block Done Interrupt Generated */ - /* entry addresses of the user-callable Boot ROM functions */ #define _BOOTROM_RESET 0xEF000000 diff --git a/arch/blackfin/mach-bf527/include/mach/defBF522.h b/arch/blackfin/mach-bf527/include/mach/defBF522.h index 89f5420..84ef11e 100644 --- a/arch/blackfin/mach-bf527/include/mach/defBF522.h +++ b/arch/blackfin/mach-bf527/include/mach/defBF522.h @@ -1204,25 +1204,6 @@ #define PGTE_PPI 0x0000 /* Enable PPI D15:13 */ #define PGTE_SPORT 0x0800 /* Enable DT1PRI/TFS1/TSCLK1 */ - -/* ****************** HANDSHAKE DMA (HDMA) MASKS *********************/ -/* HDMAx_CTL Masks */ -#define HMDMAEN 0x0001 /* Enable Handshake DMA 0/1 */ -#define REP 0x0002 /* HDMA Request Polarity */ -#define UTE 0x0004 /* Urgency Threshold Enable */ -#define OIE 0x0010 /* Overflow Interrupt Enable */ -#define BDIE 0x0020 /* Block Done Interrupt Enable */ -#define MBDI 0x0040 /* Mask Block Done IRQ If Pending ECNT */ -#define DRQ 0x0300 /* HDMA Request Type */ -#define DRQ_NONE 0x0000 /* No Request */ -#define DRQ_SINGLE 0x0100 /* Channels Request Single */ -#define DRQ_MULTI 0x0200 /* Channels Request Multi (Default) */ -#define DRQ_URGENT 0x0300 /* Channels Request Multi Urgent */ -#define RBC 0x1000 /* Reload BCNT With IBCNT */ -#define PS 0x2000 /* HDMA Pin Status */ -#define OI 0x4000 /* Overflow Interrupt Generated */ -#define BDI 0x8000 /* Block Done Interrupt Generated */ - /* entry addresses of the user-callable Boot ROM functions */ #define _BOOTROM_RESET 0xEF000000 diff --git a/arch/blackfin/mach-bf533/boards/ip0x.c b/arch/blackfin/mach-bf533/boards/ip0x.c index f869a37..a377d8a 100644 --- a/arch/blackfin/mach-bf533/boards/ip0x.c +++ b/arch/blackfin/mach-bf533/boards/ip0x.c @@ -289,8 +289,6 @@ static struct platform_device *ip0x_devices[] __initdata = { static int __init ip0x_init(void) { - int i; - printk(KERN_INFO "%s(): registering device resources\n", __func__); platform_add_devices(ip0x_devices, ARRAY_SIZE(ip0x_devices)); diff --git a/arch/blackfin/mach-bf537/boards/cm_bf537e.c b/arch/blackfin/mach-bf537/boards/cm_bf537e.c index 2c776e1..d582b81 100644 --- a/arch/blackfin/mach-bf537/boards/cm_bf537e.c +++ b/arch/blackfin/mach-bf537/boards/cm_bf537e.c @@ -775,7 +775,7 @@ static int __init cm_bf537e_init(void) #endif #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE) - irq_desc[PATA_INT].status |= IRQ_NOAUTOEN; + irq_set_status_flags(PATA_INT, IRQ_NOAUTOEN); #endif return 0; } diff --git a/arch/blackfin/mach-bf537/boards/cm_bf537u.c b/arch/blackfin/mach-bf537/boards/cm_bf537u.c index 0856611..cbb8098 100644 --- a/arch/blackfin/mach-bf537/boards/cm_bf537u.c +++ b/arch/blackfin/mach-bf537/boards/cm_bf537u.c @@ -740,7 +740,7 @@ static int __init cm_bf537u_init(void) #endif #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE) - irq_desc[PATA_INT].status |= IRQ_NOAUTOEN; + irq_set_status_flags(PATA_INT, IRQ_NOAUTOEN); #endif return 0; } diff --git a/arch/blackfin/mach-bf537/boards/dnp5370.c b/arch/blackfin/mach-bf537/boards/dnp5370.c index e1e9ea0..6b4ff46 100644 --- a/arch/blackfin/mach-bf537/boards/dnp5370.c +++ b/arch/blackfin/mach-bf537/boards/dnp5370.c @@ -128,30 +128,11 @@ static struct platform_device asmb_flash_device = { #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) -#define MMC_SPI_CARD_DETECT_INT IRQ_PF5 - -static int bfin_mmc_spi_init(struct device *dev, - irqreturn_t (*detect_int)(int, void *), void *data) -{ - return request_irq(MMC_SPI_CARD_DETECT_INT, detect_int, - IRQF_TRIGGER_FALLING, "mmc-spi-detect", data); -} - -static void bfin_mmc_spi_exit(struct device *dev, void *data) -{ - free_irq(MMC_SPI_CARD_DETECT_INT, data); -} - static struct bfin5xx_spi_chip mmc_spi_chip_info = { .enable_dma = 0, /* use no dma transfer with this chip*/ .bits_per_word = 8, }; -static struct mmc_spi_platform_data bfin_mmc_spi_pdata = { - .init = bfin_mmc_spi_init, - .exit = bfin_mmc_spi_exit, - .detect_delay = 100, /* msecs */ -}; #endif #if defined(CONFIG_MTD_DATAFLASH) || defined(CONFIG_MTD_DATAFLASH_MODULE) @@ -192,7 +173,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { .max_speed_hz = 20000000, .bus_num = 0, .chip_select = 1, - .platform_data = &bfin_mmc_spi_pdata, .controller_data = &mmc_spi_chip_info, .mode = SPI_MODE_3, }, diff --git a/arch/blackfin/mach-bf537/boards/tcm_bf537.c b/arch/blackfin/mach-bf537/boards/tcm_bf537.c index 0761b20..164a7e0 100644 --- a/arch/blackfin/mach-bf537/boards/tcm_bf537.c +++ b/arch/blackfin/mach-bf537/boards/tcm_bf537.c @@ -742,7 +742,7 @@ static int __init tcm_bf537_init(void) #endif #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE) - irq_desc[PATA_INT].status |= IRQ_NOAUTOEN; + irq_set_status_flags(PATA_INT, IRQ_NOAUTOEN); #endif return 0; } diff --git a/arch/blackfin/mach-bf537/include/mach/defBF534.h b/arch/blackfin/mach-bf537/include/mach/defBF534.h index 725bb35..4a031dd 100644 --- a/arch/blackfin/mach-bf537/include/mach/defBF534.h +++ b/arch/blackfin/mach-bf537/include/mach/defBF534.h @@ -1520,24 +1520,6 @@ #define PGTE_PPI 0x0000 /* Enable PPI D15:13 */ #define PGTE_SPORT 0x0800 /* Enable DT1PRI/TFS1/TSCLK1 */ -/* ****************** HANDSHAKE DMA (HDMA) MASKS *********************/ -/* HDMAx_CTL Masks */ -#define HMDMAEN 0x0001 /* Enable Handshake DMA 0/1 */ -#define REP 0x0002 /* HDMA Request Polarity */ -#define UTE 0x0004 /* Urgency Threshold Enable */ -#define OIE 0x0010 /* Overflow Interrupt Enable */ -#define BDIE 0x0020 /* Block Done Interrupt Enable */ -#define MBDI 0x0040 /* Mask Block Done IRQ If Pending ECNT */ -#define DRQ 0x0300 /* HDMA Request Type */ -#define DRQ_NONE 0x0000 /* No Request */ -#define DRQ_SINGLE 0x0100 /* Channels Request Single */ -#define DRQ_MULTI 0x0200 /* Channels Request Multi (Default) */ -#define DRQ_URGENT 0x0300 /* Channels Request Multi Urgent */ -#define RBC 0x1000 /* Reload BCNT With IBCNT */ -#define PS 0x2000 /* HDMA Pin Status */ -#define OI 0x4000 /* Overflow Interrupt Generated */ -#define BDI 0x8000 /* Block Done Interrupt Generated */ - /* entry addresses of the user-callable Boot ROM functions */ #define _BOOTROM_RESET 0xEF000000 diff --git a/arch/blackfin/mach-bf548/Kconfig b/arch/blackfin/mach-bf548/Kconfig index 70189a0..94acb58 100644 --- a/arch/blackfin/mach-bf548/Kconfig +++ b/arch/blackfin/mach-bf548/Kconfig @@ -42,6 +42,65 @@ config BF548_ATAPI_ALTERNATIVE_PORT async address or GPIO port F and G. Select y to route it to GPIO. +choice + prompt "UART2 DMA channel selection" + depends on SERIAL_BFIN_UART2 + default UART2_DMA_RX_ON_DMA18 + help + UART2 DMA channel selection + RX -> DMA18 + TX -> DMA19 + or + RX -> DMA13 + TX -> DMA14 + +config UART2_DMA_RX_ON_DMA18 + bool "UART2 DMA RX -> DMA18 TX -> DMA19" + help + UART2 DMA channel assignment + RX -> DMA18 + TX -> DMA19 + use SPORT2 default DMA channel + +config UART2_DMA_RX_ON_DMA13 + bool "UART2 DMA RX -> DMA13 TX -> DMA14" + help + UART2 DMA channel assignment + RX -> DMA13 + TX -> DMA14 + use EPPI1 EPPI2 default DMA channel +endchoice + +choice + prompt "UART3 DMA channel selection" + depends on SERIAL_BFIN_UART3 + default UART3_DMA_RX_ON_DMA20 + help + UART3 DMA channel selection + RX -> DMA20 + TX -> DMA21 + or + RX -> DMA15 + TX -> DMA16 + +config UART3_DMA_RX_ON_DMA20 + bool "UART3 DMA RX -> DMA20 TX -> DMA21" + help + UART3 DMA channel assignment + RX -> DMA20 + TX -> DMA21 + use SPORT3 default DMA channel + +config UART3_DMA_RX_ON_DMA15 + bool "UART3 DMA RX -> DMA15 TX -> DMA16" + help + UART3 DMA channel assignment + RX -> DMA15 + TX -> DMA16 + use PIXC default DMA channel + +endchoice + comment "Interrupt Priority Assignment" menu "Priority" diff --git a/arch/blackfin/mach-bf548/boards/ezkit.c b/arch/blackfin/mach-bf548/boards/ezkit.c index ce5a2bb..93e19a5 100644 --- a/arch/blackfin/mach-bf548/boards/ezkit.c +++ b/arch/blackfin/mach-bf548/boards/ezkit.c @@ -778,11 +778,12 @@ static struct platform_device bfin_sport3_uart_device = { #endif #if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE) -static unsigned short bfin_can_peripherals[] = { + +static unsigned short bfin_can0_peripherals[] = { P_CAN0_RX, P_CAN0_TX, 0 }; -static struct resource bfin_can_resources[] = { +static struct resource bfin_can0_resources[] = { { .start = 0xFFC02A00, .end = 0xFFC02FFF, @@ -805,14 +806,53 @@ static struct resource bfin_can_resources[] = { }, }; -static struct platform_device bfin_can_device = { +static struct platform_device bfin_can0_device = { .name = "bfin_can", - .num_resources = ARRAY_SIZE(bfin_can_resources), - .resource = bfin_can_resources, + .id = 0, + .num_resources = ARRAY_SIZE(bfin_can0_resources), + .resource = bfin_can0_resources, .dev = { - .platform_data = &bfin_can_peripherals, /* Passed to driver */ + .platform_data = &bfin_can0_peripherals, /* Passed to driver */ }, }; + +static unsigned short bfin_can1_peripherals[] = { + P_CAN1_RX, P_CAN1_TX, 0 +}; + +static struct resource bfin_can1_resources[] = { + { + .start = 0xFFC03200, + .end = 0xFFC037FF, + .flags = IORESOURCE_MEM, + }, + { + .start = IRQ_CAN1_RX, + .end = IRQ_CAN1_RX, + .flags = IORESOURCE_IRQ, + }, + { + .start = IRQ_CAN1_TX, + .end = IRQ_CAN1_TX, + .flags = IORESOURCE_IRQ, + }, + { + .start = IRQ_CAN1_ERROR, + .end = IRQ_CAN1_ERROR, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device bfin_can1_device = { + .name = "bfin_can", + .id = 1, + .num_resources = ARRAY_SIZE(bfin_can1_resources), + .resource = bfin_can1_resources, + .dev = { + .platform_data = &bfin_can1_peripherals, /* Passed to driver */ + }, +}; + #endif #if defined(CONFIG_PATA_BF54X) || defined(CONFIG_PATA_BF54X_MODULE) @@ -1366,7 +1406,8 @@ static struct platform_device *ezkit_devices[] __initdata = { #endif #if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE) - &bfin_can_device, + &bfin_can0_device, + &bfin_can1_device, #endif #if defined(CONFIG_PATA_BF54X) || defined(CONFIG_PATA_BF54X_MODULE) diff --git a/arch/blackfin/mach-bf548/include/mach/anomaly.h b/arch/blackfin/mach-bf548/include/mach/anomaly.h index 4070079..ffd0537 100644 --- a/arch/blackfin/mach-bf548/include/mach/anomaly.h +++ b/arch/blackfin/mach-bf548/include/mach/anomaly.h @@ -81,7 +81,11 @@ /* PLL Status Register Is Inaccurate */ #define ANOMALY_05000351 (__SILICON_REVISION__ < 1) /* bfrom_SysControl() Firmware Function Performs Improper System Reset */ -#define ANOMALY_05000353 (__SILICON_REVISION__ < 2) +/* + * Note: anomaly sheet says this is fixed with bf54x-0.2+, but testing + * shows that the fix itself does not cover all cases. + */ +#define ANOMALY_05000353 (1) /* Regulator Programming Blocked when Hibernate Wakeup Source Remains Active */ #define ANOMALY_05000355 (__SILICON_REVISION__ < 1) /* System Stalled During A Core Access To AMC While A Core Access To NFC FIFO Is Required */ diff --git a/arch/blackfin/mach-bf548/include/mach/defBF544.h b/arch/blackfin/mach-bf548/include/mach/defBF544.h index 642468c..bcccab3 100644 --- a/arch/blackfin/mach-bf548/include/mach/defBF544.h +++ b/arch/blackfin/mach-bf548/include/mach/defBF544.h @@ -657,22 +657,4 @@ /* Bit masks for EPPI0 are obtained from common base header for EPPIx (EPPI1 and EPPI2) */ -/* Bit masks for HMDMAx_CONTROL */ - -#define HMDMAEN 0x1 /* Handshake MDMA Enable */ -#define REP 0x2 /* Handshake MDMA Request Polarity */ -#define UTE 0x8 /* Urgency Threshold Enable */ -#define OIE 0x10 /* Overflow Interrupt Enable */ -#define BDIE 0x20 /* Block Done Interrupt Enable */ -#define MBDI 0x40 /* Mask Block Done Interrupt */ -#define DRQ 0x300 /* Handshake MDMA Request Type */ -#define RBC 0x1000 /* Force Reload of BCOUNT */ -#define PS 0x2000 /* Pin Status */ -#define OI 0x4000 /* Overflow Interrupt Generated */ -#define BDI 0x8000 /* Block Done Interrupt Generated */ - -/* ******************************************* */ -/* MULTI BIT MACRO ENUMERATIONS */ -/* ******************************************* */ - #endif /* _DEF_BF544_H */ diff --git a/arch/blackfin/mach-bf548/include/mach/defBF547.h b/arch/blackfin/mach-bf548/include/mach/defBF547.h index 2f3337c..1cbba11 100644 --- a/arch/blackfin/mach-bf548/include/mach/defBF547.h +++ b/arch/blackfin/mach-bf548/include/mach/defBF547.h @@ -1063,23 +1063,4 @@ #define DMA_COUNT_LOW 0xffff /* Lower 16-bits of byte count of DMA transfer for DMA master channel */ -/* Bit masks for HMDMAx_CONTROL */ - -#define HMDMAEN 0x1 /* Handshake MDMA Enable */ -#define REP 0x2 /* Handshake MDMA Request Polarity */ -#define UTE 0x8 /* Urgency Threshold Enable */ -#define OIE 0x10 /* Overflow Interrupt Enable */ -#define BDIE 0x20 /* Block Done Interrupt Enable */ -#define MBDI 0x40 /* Mask Block Done Interrupt */ -#define DRQ 0x300 /* Handshake MDMA Request Type */ -#define RBC 0x1000 /* Force Reload of BCOUNT */ -#define PS 0x2000 /* Pin Status */ -#define OI 0x4000 /* Overflow Interrupt Generated */ -#define BDI 0x8000 /* Block Done Interrupt Generated */ - -/* ******************************************* */ -/* MULTI BIT MACRO ENUMERATIONS */ -/* ******************************************* */ - - #endif /* _DEF_BF547_H */ diff --git a/arch/blackfin/mach-bf548/include/mach/dma.h b/arch/blackfin/mach-bf548/include/mach/dma.h index a30d242..1a1091b 100644 --- a/arch/blackfin/mach-bf548/include/mach/dma.h +++ b/arch/blackfin/mach-bf548/include/mach/dma.h @@ -27,17 +27,37 @@ #define CH_PIXC_OVERLAY 16 #define CH_PIXC_OUTPUT 17 #define CH_SPORT2_RX 18 -#define CH_UART2_RX 18 #define CH_SPORT2_TX 19 -#define CH_UART2_TX 19 #define CH_SPORT3_RX 20 -#define CH_UART3_RX 20 #define CH_SPORT3_TX 21 -#define CH_UART3_TX 21 #define CH_SDH 22 #define CH_NFC 22 #define CH_SPI2 23 +#if defined(CONFIG_UART2_DMA_RX_ON_DMA13) +#define CH_UART2_RX 13 +#define IRQ_UART2_RX BFIN_IRQ(37) /* UART2 RX USE EPP1 (DMA13) Interrupt */ +#define CH_UART2_TX 14 +#define IRQ_UART2_TX BFIN_IRQ(38) /* UART2 RX USE EPP1 (DMA14) Interrupt */ +#else /* Default USE SPORT2's DMA Channel */ +#define CH_UART2_RX 18 +#define IRQ_UART2_RX BFIN_IRQ(33) /* UART2 RX (DMA18) Interrupt */ +#define CH_UART2_TX 19 +#define IRQ_UART2_TX BFIN_IRQ(34) /* UART2 TX (DMA19) Interrupt */ +#endif + +#if defined(CONFIG_UART3_DMA_RX_ON_DMA15) +#define CH_UART3_RX 15 +#define IRQ_UART3_RX BFIN_IRQ(64) /* UART3 RX USE PIXC IN0 (DMA15) Interrupt */ +#define CH_UART3_TX 16 +#define IRQ_UART3_TX BFIN_IRQ(65) /* UART3 TX USE PIXC IN1 (DMA16) Interrupt */ +#else /* Default USE SPORT3's DMA Channel */ +#define CH_UART3_RX 20 +#define IRQ_UART3_RX BFIN_IRQ(35) /* UART3 RX (DMA20) Interrupt */ +#define CH_UART3_TX 21 +#define IRQ_UART3_TX BFIN_IRQ(36) /* UART3 TX (DMA21) Interrupt */ +#endif + #define CH_MEM_STREAM0_DEST 24 #define CH_MEM_STREAM0_SRC 25 #define CH_MEM_STREAM1_DEST 26 diff --git a/arch/blackfin/mach-bf548/include/mach/irq.h b/arch/blackfin/mach-bf548/include/mach/irq.h index 99fd1b2..7f87787 100644 --- a/arch/blackfin/mach-bf548/include/mach/irq.h +++ b/arch/blackfin/mach-bf548/include/mach/irq.h @@ -74,13 +74,9 @@ Events (highest priority) EMU 0 #define IRQ_UART2_ERROR BFIN_IRQ(31) /* UART2 Status (Error) Interrupt */ #define IRQ_CAN0_ERROR BFIN_IRQ(32) /* CAN0 Status (Error) Interrupt */ #define IRQ_SPORT2_RX BFIN_IRQ(33) /* SPORT2 RX (DMA18) Interrupt */ -#define IRQ_UART2_RX BFIN_IRQ(33) /* UART2 RX (DMA18) Interrupt */ #define IRQ_SPORT2_TX BFIN_IRQ(34) /* SPORT2 TX (DMA19) Interrupt */ -#define IRQ_UART2_TX BFIN_IRQ(34) /* UART2 TX (DMA19) Interrupt */ #define IRQ_SPORT3_RX BFIN_IRQ(35) /* SPORT3 RX (DMA20) Interrupt */ -#define IRQ_UART3_RX BFIN_IRQ(35) /* UART3 RX (DMA20) Interrupt */ #define IRQ_SPORT3_TX BFIN_IRQ(36) /* SPORT3 TX (DMA21) Interrupt */ -#define IRQ_UART3_TX BFIN_IRQ(36) /* UART3 TX (DMA21) Interrupt */ #define IRQ_EPPI1 BFIN_IRQ(37) /* EPP1 (DMA13) Interrupt */ #define IRQ_EPPI2 BFIN_IRQ(38) /* EPP2 (DMA14) Interrupt */ #define IRQ_SPI1 BFIN_IRQ(39) /* SPI1 (DMA5) Interrupt */ diff --git a/arch/blackfin/mach-bf561/boards/cm_bf561.c b/arch/blackfin/mach-bf561/boards/cm_bf561.c index 3b67929..87595cd 100644 --- a/arch/blackfin/mach-bf561/boards/cm_bf561.c +++ b/arch/blackfin/mach-bf561/boards/cm_bf561.c @@ -541,7 +541,7 @@ static int __init cm_bf561_init(void) #endif #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE) - irq_desc[PATA_INT].status |= IRQ_NOAUTOEN; + irq_set_status_flags(PATA_INT, IRQ_NOAUTOEN); #endif return 0; } diff --git a/arch/blackfin/mach-bf561/hotplug.c b/arch/blackfin/mach-bf561/hotplug.c index 4cd3b28..0123117 100644 --- a/arch/blackfin/mach-bf561/hotplug.c +++ b/arch/blackfin/mach-bf561/hotplug.c @@ -5,30 +5,36 @@ * Licensed under the GPL-2 or later. */ +#include <linux/smp.h> #include <asm/blackfin.h> -#include <asm/irq.h> -#include <asm/smp.h> - -#define SIC_SYSIRQ(irq) (irq - (IRQ_CORETMR + 1)) +#include <asm/cacheflush.h> +#include <mach/pll.h> int hotplug_coreb; void platform_cpu_die(void) { - unsigned long iwr[2] = {0, 0}; - unsigned long bank = SIC_SYSIRQ(IRQ_SUPPLE_0) / 32; - unsigned long bit = 1 << (SIC_SYSIRQ(IRQ_SUPPLE_0) % 32); + unsigned long iwr; hotplug_coreb = 1; - iwr[bank] = bit; + /* + * When CoreB wakes up, the code in _coreb_trampoline_start cannot + * turn off the data cache. This causes the CoreB failed to boot. + * As a workaround, we invalidate all the data cache before sleep. + */ + blackfin_invalidate_entire_dcache(); /* disable core timer */ bfin_write_TCNTL(0); - /* clear ipi interrupt IRQ_SUPPLE_0 */ + /* clear ipi interrupt IRQ_SUPPLE_0 of CoreB */ bfin_write_SICB_SYSCR(bfin_read_SICB_SYSCR() | (1 << (10 + 1))); SSYNC(); - coreb_sleep(iwr[0], iwr[1], 0); + /* set CoreB wakeup by ipi0, iwr will be discarded */ + bfin_iwr_set_sup0(&iwr, &iwr, &iwr); + SSYNC(); + + coreb_die(); } diff --git a/arch/blackfin/mach-bf561/secondary.S b/arch/blackfin/mach-bf561/secondary.S index 4624eeb..4c46283 100644 --- a/arch/blackfin/mach-bf561/secondary.S +++ b/arch/blackfin/mach-bf561/secondary.S @@ -13,7 +13,11 @@ #include <asm/asm-offsets.h> #include <asm/trace.h> -__INIT +/* + * This code must come first as CoreB is hardcoded (in hardware) + * to start at the beginning of its L1 instruction memory. + */ +.section .l1.text.head /* Lay the initial stack into the L1 scratch area of Core B */ #define INITIAL_STACK (COREB_L1_SCRATCH_START + L1_SCRATCH_LENGTH - 12) @@ -160,43 +164,34 @@ ENTRY(_coreb_trampoline_start) .LWAIT_HERE: jump .LWAIT_HERE; ENDPROC(_coreb_trampoline_start) -ENTRY(_coreb_trampoline_end) +#ifdef CONFIG_HOTPLUG_CPU .section ".text" -ENTRY(_set_sicb_iwr) - P0.H = hi(SICB_IWR0); - P0.L = lo(SICB_IWR0); - P1.H = hi(SICB_IWR1); - P1.L = lo(SICB_IWR1); - [P0] = R0; - [P1] = R1; - SSYNC; - RTS; -ENDPROC(_set_sicb_iwr) - -ENTRY(_coreb_sleep) +ENTRY(_coreb_die) sp.l = lo(INITIAL_STACK); sp.h = hi(INITIAL_STACK); fp = sp; usp = sp; - call _set_sicb_iwr; - CLI R2; SSYNC; IDLE; STI R2; R0 = IWR_DISABLE_ALL; - R1 = IWR_DISABLE_ALL; - call _set_sicb_iwr; + P0.H = hi(SYSMMR_BASE); + P0.L = lo(SYSMMR_BASE); + [P0 + (SICB_IWR0 - SYSMMR_BASE)] = R0; + [P0 + (SICB_IWR1 - SYSMMR_BASE)] = R0; + SSYNC; p0.h = hi(COREB_L1_CODE_START); p0.l = lo(COREB_L1_CODE_START); jump (p0); -ENDPROC(_coreb_sleep) +ENDPROC(_coreb_die) +#endif -__CPUINIT +__INIT ENTRY(_coreb_start) [--sp] = reti; diff --git a/arch/blackfin/mach-bf561/smp.c b/arch/blackfin/mach-bf561/smp.c index 1074a7e..5d68bf6 100644 --- a/arch/blackfin/mach-bf561/smp.c +++ b/arch/blackfin/mach-bf561/smp.c @@ -30,18 +30,11 @@ void __init platform_init_cpus(void) void __init platform_prepare_cpus(unsigned int max_cpus) { - int len; - - len = &coreb_trampoline_end - &coreb_trampoline_start + 1; - BUG_ON(len > L1_CODE_LENGTH); - - dma_memcpy((void *)COREB_L1_CODE_START, &coreb_trampoline_start, len); + bfin_relocate_coreb_l1_mem(); /* Both cores ought to be present on a bf561! */ cpu_set(0, cpu_present_map); /* CoreA */ cpu_set(1, cpu_present_map); /* CoreB */ - - printk(KERN_INFO "CoreB bootstrap code to SRAM %p via DMA.\n", (void *)COREB_L1_CODE_START); } int __init setup_profiling_timer(unsigned int multiplier) /* not supported */ @@ -161,9 +154,13 @@ void platform_clear_ipi(unsigned int cpu, int irq) void __cpuinit bfin_local_timer_setup(void) { #if defined(CONFIG_TICKSOURCE_CORETMR) + struct irq_chip *chip = get_irq_chip(IRQ_CORETMR); + struct irq_desc *desc = irq_to_desc(IRQ_CORETMR); + bfin_coretmr_init(); bfin_coretmr_clockevent_init(); - get_irq_chip(IRQ_CORETMR)->unmask(IRQ_CORETMR); + + chip->irq_unmask(&desc->irq_data); #else /* Power down the core timer, just to play safe. */ bfin_write_TCNTL(0); diff --git a/arch/blackfin/mach-common/arch_checks.c b/arch/blackfin/mach-common/arch_checks.c index bceb981..d8643fd 100644 --- a/arch/blackfin/mach-common/arch_checks.c +++ b/arch/blackfin/mach-common/arch_checks.c @@ -61,6 +61,6 @@ # error "Anomaly 05000220 does not allow you to use Write Back cache with L2 or External Memory" #endif -#if ANOMALY_05000491 && !defined(CONFIG_CACHE_FLUSH_L1) +#if ANOMALY_05000491 && !defined(CONFIG_ICACHE_FLUSH_L1) # error You need IFLUSH in L1 inst while Anomaly 05000491 applies #endif diff --git a/arch/blackfin/mach-common/cache.S b/arch/blackfin/mach-common/cache.S index ab4a925..9f4dd35 100644 --- a/arch/blackfin/mach-common/cache.S +++ b/arch/blackfin/mach-common/cache.S @@ -11,12 +11,6 @@ #include <asm/cache.h> #include <asm/page.h> -#ifdef CONFIG_CACHE_FLUSH_L1 -.section .l1.text -#else -.text -#endif - /* 05000443 - IFLUSH cannot be last instruction in hardware loop */ #if ANOMALY_05000443 # define BROK_FLUSH_INST "IFLUSH" @@ -68,11 +62,43 @@ RTS; .endm +#ifdef CONFIG_ICACHE_FLUSH_L1 +.section .l1.text +#else +.text +#endif + /* Invalidate all instruction cache lines assocoiated with this memory area */ +#ifdef CONFIG_SMP +# define _blackfin_icache_flush_range _blackfin_icache_flush_range_l1 +#endif ENTRY(_blackfin_icache_flush_range) do_flush IFLUSH ENDPROC(_blackfin_icache_flush_range) +#ifdef CONFIG_SMP +.text +# undef _blackfin_icache_flush_range +ENTRY(_blackfin_icache_flush_range) + p0.L = LO(DSPID); + p0.H = HI(DSPID); + r3 = [p0]; + r3 = r3.b (z); + p2 = r3; + p0.L = _blackfin_iflush_l1_entry; + p0.H = _blackfin_iflush_l1_entry; + p0 = p0 + (p2 << 2); + p1 = [p0]; + jump (p1); +ENDPROC(_blackfin_icache_flush_range) +#endif + +#ifdef CONFIG_DCACHE_FLUSH_L1 +.section .l1.text +#else +.text +#endif + /* Throw away all D-cached data in specified region without any obligation to * write them back. Since the Blackfin ISA does not have an "invalidate" * instruction, we use flush/invalidate. Perhaps as a speed optimization we diff --git a/arch/blackfin/mach-common/cpufreq.c b/arch/blackfin/mach-common/cpufreq.c index f4cf11d..85dc6d6 100644 --- a/arch/blackfin/mach-common/cpufreq.c +++ b/arch/blackfin/mach-common/cpufreq.c @@ -1,7 +1,7 @@ /* * Blackfin core clock scaling * - * Copyright 2008-2009 Analog Devices Inc. + * Copyright 2008-2011 Analog Devices Inc. * * Licensed under the GPL-2 or later. */ @@ -16,10 +16,8 @@ #include <asm/time.h> #include <asm/dpmc.h> -#define CPUFREQ_CPU 0 - /* this is the table of CCLK frequencies, in Hz */ -/* .index is the entry in the auxillary dpm_state_table[] */ +/* .index is the entry in the auxiliary dpm_state_table[] */ static struct cpufreq_frequency_table bfin_freq_table[] = { { .frequency = CPUFREQ_TABLE_END, @@ -46,7 +44,7 @@ static struct bfin_dpm_state { #if defined(CONFIG_CYCLES_CLOCKSOURCE) /* - * normalized to maximum frequncy offset for CYCLES, + * normalized to maximum frequency offset for CYCLES, * used in time-ts cycles clock source, but could be used * somewhere also. */ diff --git a/arch/blackfin/mach-common/dpmc.c b/arch/blackfin/mach-common/dpmc.c index 02c7efd..382099f 100644 --- a/arch/blackfin/mach-common/dpmc.c +++ b/arch/blackfin/mach-common/dpmc.c @@ -61,17 +61,63 @@ err_out: } #ifdef CONFIG_CPU_FREQ +# ifdef CONFIG_SMP +static void bfin_idle_this_cpu(void *info) +{ + unsigned long flags = 0; + unsigned long iwr0, iwr1, iwr2; + unsigned int cpu = smp_processor_id(); + + local_irq_save_hw(flags); + bfin_iwr_set_sup0(&iwr0, &iwr1, &iwr2); + + platform_clear_ipi(cpu, IRQ_SUPPLE_0); + SSYNC(); + asm("IDLE;"); + bfin_iwr_restore(iwr0, iwr1, iwr2); + + local_irq_restore_hw(flags); +} + +static void bfin_idle_cpu(void) +{ + smp_call_function(bfin_idle_this_cpu, NULL, 0); +} + +static void bfin_wakeup_cpu(void) +{ + unsigned int cpu; + unsigned int this_cpu = smp_processor_id(); + cpumask_t mask = cpu_online_map; + + cpu_clear(this_cpu, mask); + for_each_cpu_mask(cpu, mask) + platform_send_ipi_cpu(cpu, IRQ_SUPPLE_0); +} + +# else +static void bfin_idle_cpu(void) {} +static void bfin_wakeup_cpu(void) {} +# endif + static int vreg_cpufreq_notifier(struct notifier_block *nb, unsigned long val, void *data) { struct cpufreq_freqs *freq = data; + if (freq->cpu != CPUFREQ_CPU) + return 0; + if (val == CPUFREQ_PRECHANGE && freq->old < freq->new) { + bfin_idle_cpu(); bfin_set_vlev(bfin_get_vlev(freq->new)); udelay(pdata->vr_settling_time); /* Wait until Volatge settled */ - - } else if (val == CPUFREQ_POSTCHANGE && freq->old > freq->new) + bfin_wakeup_cpu(); + } else if (val == CPUFREQ_POSTCHANGE && freq->old > freq->new) { + bfin_idle_cpu(); bfin_set_vlev(bfin_get_vlev(freq->new)); + bfin_wakeup_cpu(); + } return 0; } diff --git a/arch/blackfin/mach-common/entry.S b/arch/blackfin/mach-common/entry.S index bc08c98..46ab457 100644 --- a/arch/blackfin/mach-common/entry.S +++ b/arch/blackfin/mach-common/entry.S @@ -952,8 +952,17 @@ ENDPROC(_evt_up_evt14) #ifdef CONFIG_IPIPE _resume_kernel_from_int: + r1 = LO(~0x8000) (Z); + r1 = r0 & r1; + r0 = 1; + r0 = r1 - r0; + r2 = r1 & r0; + cc = r2 == 0; + /* Sync the root stage only from the outer interrupt level. */ + if !cc jump .Lnosync; r0.l = ___ipipe_sync_root; r0.h = ___ipipe_sync_root; + [--sp] = reti; [--sp] = rets; [--sp] = ( r7:4, p5:3 ); SP += -12; @@ -961,6 +970,8 @@ _resume_kernel_from_int: SP += 12; ( r7:4, p5:3 ) = [sp++]; rets = [sp++]; + reti = [sp++]; +.Lnosync: rts #elif defined(CONFIG_PREEMPT) @@ -1738,6 +1749,10 @@ ENTRY(_sys_call_table) .long _sys_fanotify_mark .long _sys_prlimit64 .long _sys_cacheflush + .long _sys_name_to_handle_at /* 375 */ + .long _sys_open_by_handle_at + .long _sys_clock_adjtime + .long _sys_syncfs .rept NR_syscalls-(.-_sys_call_table)/4 .long _sys_ni_syscall diff --git a/arch/blackfin/mach-common/head.S b/arch/blackfin/mach-common/head.S index 4391621..581e2b0 100644 --- a/arch/blackfin/mach-common/head.S +++ b/arch/blackfin/mach-common/head.S @@ -31,6 +31,7 @@ ENDPROC(__init_clear_bss) ENTRY(__start) /* R0: argument of command line string, passed from uboot, save it */ R7 = R0; + /* Enable Cycle Counter and Nesting Of Interrupts */ #ifdef CONFIG_BFIN_SCRATCH_REG_CYCLES R0 = SYSCFG_SNEN; @@ -38,76 +39,49 @@ ENTRY(__start) R0 = SYSCFG_SNEN | SYSCFG_CCEN; #endif SYSCFG = R0; - R0 = 0; - - /* Clear Out All the data and pointer Registers */ - R1 = R0; - R2 = R0; - R3 = R0; - R4 = R0; - R5 = R0; - R6 = R0; - - P0 = R0; - P1 = R0; - P2 = R0; - P3 = R0; - P4 = R0; - P5 = R0; - - LC0 = r0; - LC1 = r0; - L0 = r0; - L1 = r0; - L2 = r0; - L3 = r0; - - /* Clear Out All the DAG Registers */ - B0 = r0; - B1 = r0; - B2 = r0; - B3 = r0; - - I0 = r0; - I1 = r0; - I2 = r0; - I3 = r0; - - M0 = r0; - M1 = r0; - M2 = r0; - M3 = r0; + + /* Optimization register tricks: keep a base value in the + * reserved P registers so we use the load/store with an + * offset syntax. R0 = [P5 + <constant>]; + * P5 - core MMR base + * R6 - 0 + */ + r6 = 0; + p5.l = 0; + p5.h = hi(COREMMR_BASE); + + /* Zero out registers required by Blackfin ABI */ + + /* Disable circular buffers */ + L0 = r6; + L1 = r6; + L2 = r6; + L3 = r6; + + /* Disable hardware loops in case we were started by 'go' */ + LC0 = r6; + LC1 = r6; /* * Clear ITEST_COMMAND and DTEST_COMMAND registers, * Leaving these as non-zero can confuse the emulator */ - p0.L = LO(DTEST_COMMAND); - p0.H = HI(DTEST_COMMAND); - [p0] = R0; - [p0 + (ITEST_COMMAND - DTEST_COMMAND)] = R0; + [p5 + (DTEST_COMMAND - COREMMR_BASE)] = r6; + [p5 + (ITEST_COMMAND - COREMMR_BASE)] = r6; CSYNC; trace_buffer_init(p0,r0); - P0 = R1; - R0 = R1; /* Turn off the icache */ - p0.l = LO(IMEM_CONTROL); - p0.h = HI(IMEM_CONTROL); - R1 = [p0]; - R0 = ~ENICPLB; - R0 = R0 & R1; - [p0] = R0; + r1 = [p5 + (IMEM_CONTROL - COREMMR_BASE)]; + BITCLR (r1, ENICPLB_P); + [p5 + (IMEM_CONTROL - COREMMR_BASE)] = r1; SSYNC; /* Turn off the dcache */ - p0.l = LO(DMEM_CONTROL); - p0.h = HI(DMEM_CONTROL); - R1 = [p0]; - R0 = ~ENDCPLB; - R0 = R0 & R1; - [p0] = R0; + r1 = [p5 + (DMEM_CONTROL - COREMMR_BASE)]; + BITCLR (r1, ENDCPLB_P); + [p5 + (DMEM_CONTROL - COREMMR_BASE)] = r1; SSYNC; /* in case of double faults, save a few things */ @@ -122,25 +96,25 @@ ENTRY(__start) * below */ GET_PDA(p0, r0); - r6 = [p0 + PDA_DF_RETX]; + r5 = [p0 + PDA_DF_RETX]; p1.l = _init_saved_retx; p1.h = _init_saved_retx; - [p1] = r6; + [p1] = r5; - r6 = [p0 + PDA_DF_DCPLB]; + r5 = [p0 + PDA_DF_DCPLB]; p1.l = _init_saved_dcplb_fault_addr; p1.h = _init_saved_dcplb_fault_addr; - [p1] = r6; + [p1] = r5; - r6 = [p0 + PDA_DF_ICPLB]; + r5 = [p0 + PDA_DF_ICPLB]; p1.l = _init_saved_icplb_fault_addr; p1.h = _init_saved_icplb_fault_addr; - [p1] = r6; + [p1] = r5; - r6 = [p0 + PDA_DF_SEQSTAT]; + r5 = [p0 + PDA_DF_SEQSTAT]; p1.l = _init_saved_seqstat; p1.h = _init_saved_seqstat; - [p1] = r6; + [p1] = r5; #endif /* Initialize stack pointer */ @@ -155,7 +129,7 @@ ENTRY(__start) sti r0; #endif - r0 = 0 (x); + r0 = r6; /* Zero out all of the fun bss regions */ #if L1_DATA_A_LENGTH > 0 r1.l = __sbss_l1; @@ -210,11 +184,9 @@ ENTRY(__start) /* EVT15 = _real_start */ - p0.l = lo(EVT15); - p0.h = hi(EVT15); p1.l = _real_start; p1.h = _real_start; - [p0] = p1; + [p5 + (EVT15 - COREMMR_BASE)] = p1; csync; #ifdef CONFIG_EARLY_PRINTK diff --git a/arch/blackfin/mach-common/interrupt.S b/arch/blackfin/mach-common/interrupt.S index 2df37db..469ce72 100644 --- a/arch/blackfin/mach-common/interrupt.S +++ b/arch/blackfin/mach-common/interrupt.S @@ -274,16 +274,16 @@ ENDPROC(_evt_system_call) * level to EVT14 to prepare the caller for a normal interrupt * return through RTI. * - * We currently use this facility in two occasions: + * We currently use this feature in two occasions: * - * - to branch to __ipipe_irq_tail_hook as requested by a high + * - before branching to __ipipe_irq_tail_hook as requested by a high * priority domain after the pipeline delivered an interrupt, * e.g. such as Xenomai, in order to start its rescheduling * procedure, since we may not switch tasks when IRQ levels are * nested on the Blackfin, so we have to fake an interrupt return * so that we may reschedule immediately. * - * - to branch to sync_root_irqs, in order to play any interrupt + * - before branching to __ipipe_sync_root(), in order to play any interrupt * pending for the root domain (i.e. the Linux kernel). This lowers * the core priority level enough so that Linux IRQ handlers may * never delay interrupts handled by high priority domains; we defer diff --git a/arch/blackfin/mach-common/ints-priority.c b/arch/blackfin/mach-common/ints-priority.c index a604f19..6cd5239 100644 --- a/arch/blackfin/mach-common/ints-priority.c +++ b/arch/blackfin/mach-common/ints-priority.c @@ -15,6 +15,7 @@ #include <linux/kernel_stat.h> #include <linux/seq_file.h> #include <linux/irq.h> +#include <linux/sched.h> #ifdef CONFIG_IPIPE #include <linux/ipipe.h> #endif @@ -124,21 +125,21 @@ static void __init search_IAR(void) * This is for core internal IRQs */ -static void bfin_ack_noop(unsigned int irq) +static void bfin_ack_noop(struct irq_data *d) { /* Dummy function. */ } -static void bfin_core_mask_irq(unsigned int irq) +static void bfin_core_mask_irq(struct irq_data *d) { - bfin_irq_flags &= ~(1 << irq); + bfin_irq_flags &= ~(1 << d->irq); if (!hard_irqs_disabled()) hard_local_irq_enable(); } -static void bfin_core_unmask_irq(unsigned int irq) +static void bfin_core_unmask_irq(struct irq_data *d) { - bfin_irq_flags |= 1 << irq; + bfin_irq_flags |= 1 << d->irq; /* * If interrupts are enabled, IMASK must contain the same value * as bfin_irq_flags. Make sure that invariant holds. If interrupts @@ -176,6 +177,11 @@ static void bfin_internal_mask_irq(unsigned int irq) hard_local_irq_restore(flags); } +static void bfin_internal_mask_irq_chip(struct irq_data *d) +{ + bfin_internal_mask_irq(d->irq); +} + #ifdef CONFIG_SMP static void bfin_internal_unmask_irq_affinity(unsigned int irq, const struct cpumask *affinity) @@ -211,19 +217,24 @@ static void bfin_internal_unmask_irq(unsigned int irq) } #ifdef CONFIG_SMP -static void bfin_internal_unmask_irq(unsigned int irq) +static void bfin_internal_unmask_irq_chip(struct irq_data *d) { - struct irq_desc *desc = irq_to_desc(irq); - bfin_internal_unmask_irq_affinity(irq, desc->affinity); + bfin_internal_unmask_irq_affinity(d->irq, d->affinity); } -static int bfin_internal_set_affinity(unsigned int irq, const struct cpumask *mask) +static int bfin_internal_set_affinity(struct irq_data *d, + const struct cpumask *mask, bool force) { - bfin_internal_mask_irq(irq); - bfin_internal_unmask_irq_affinity(irq, mask); + bfin_internal_mask_irq(d->irq); + bfin_internal_unmask_irq_affinity(d->irq, mask); return 0; } +#else +static void bfin_internal_unmask_irq_chip(struct irq_data *d) +{ + bfin_internal_unmask_irq(d->irq); +} #endif #ifdef CONFIG_PM @@ -279,28 +290,33 @@ int bfin_internal_set_wake(unsigned int irq, unsigned int state) return 0; } + +static int bfin_internal_set_wake_chip(struct irq_data *d, unsigned int state) +{ + return bfin_internal_set_wake(d->irq, state); +} #endif static struct irq_chip bfin_core_irqchip = { .name = "CORE", - .ack = bfin_ack_noop, - .mask = bfin_core_mask_irq, - .unmask = bfin_core_unmask_irq, + .irq_ack = bfin_ack_noop, + .irq_mask = bfin_core_mask_irq, + .irq_unmask = bfin_core_unmask_irq, }; static struct irq_chip bfin_internal_irqchip = { .name = "INTN", - .ack = bfin_ack_noop, - .mask = bfin_internal_mask_irq, - .unmask = bfin_internal_unmask_irq, - .mask_ack = bfin_internal_mask_irq, - .disable = bfin_internal_mask_irq, - .enable = bfin_internal_unmask_irq, + .irq_ack = bfin_ack_noop, + .irq_mask = bfin_internal_mask_irq_chip, + .irq_unmask = bfin_internal_unmask_irq_chip, + .irq_mask_ack = bfin_internal_mask_irq_chip, + .irq_disable = bfin_internal_mask_irq_chip, + .irq_enable = bfin_internal_unmask_irq_chip, #ifdef CONFIG_SMP - .set_affinity = bfin_internal_set_affinity, + .irq_set_affinity = bfin_internal_set_affinity, #endif #ifdef CONFIG_PM - .set_wake = bfin_internal_set_wake, + .irq_set_wake = bfin_internal_set_wake_chip, #endif }; @@ -312,33 +328,32 @@ static void bfin_handle_irq(unsigned irq) __ipipe_handle_irq(irq, ®s); ipipe_trace_irq_exit(irq); #else /* !CONFIG_IPIPE */ - struct irq_desc *desc = irq_desc + irq; - desc->handle_irq(irq, desc); + generic_handle_irq(irq); #endif /* !CONFIG_IPIPE */ } #ifdef BF537_GENERIC_ERROR_INT_DEMUX static int error_int_mask; -static void bfin_generic_error_mask_irq(unsigned int irq) +static void bfin_generic_error_mask_irq(struct irq_data *d) { - error_int_mask &= ~(1L << (irq - IRQ_PPI_ERROR)); + error_int_mask &= ~(1L << (d->irq - IRQ_PPI_ERROR)); if (!error_int_mask) bfin_internal_mask_irq(IRQ_GENERIC_ERROR); } -static void bfin_generic_error_unmask_irq(unsigned int irq) +static void bfin_generic_error_unmask_irq(struct irq_data *d) { bfin_internal_unmask_irq(IRQ_GENERIC_ERROR); - error_int_mask |= 1L << (irq - IRQ_PPI_ERROR); + error_int_mask |= 1L << (d->irq - IRQ_PPI_ERROR); } static struct irq_chip bfin_generic_error_irqchip = { .name = "ERROR", - .ack = bfin_ack_noop, - .mask_ack = bfin_generic_error_mask_irq, - .mask = bfin_generic_error_mask_irq, - .unmask = bfin_generic_error_unmask_irq, + .irq_ack = bfin_ack_noop, + .irq_mask_ack = bfin_generic_error_mask_irq, + .irq_mask = bfin_generic_error_mask_irq, + .irq_unmask = bfin_generic_error_unmask_irq, }; static void bfin_demux_error_irq(unsigned int int_err_irq, @@ -448,8 +463,10 @@ static void bfin_mac_status_ack_irq(unsigned int irq) } } -static void bfin_mac_status_mask_irq(unsigned int irq) +static void bfin_mac_status_mask_irq(struct irq_data *d) { + unsigned int irq = d->irq; + mac_stat_int_mask &= ~(1L << (irq - IRQ_MAC_PHYINT)); #ifdef BF537_GENERIC_ERROR_INT_DEMUX switch (irq) { @@ -466,8 +483,10 @@ static void bfin_mac_status_mask_irq(unsigned int irq) bfin_mac_status_ack_irq(irq); } -static void bfin_mac_status_unmask_irq(unsigned int irq) +static void bfin_mac_status_unmask_irq(struct irq_data *d) { + unsigned int irq = d->irq; + #ifdef BF537_GENERIC_ERROR_INT_DEMUX switch (irq) { case IRQ_MAC_PHYINT: @@ -484,7 +503,7 @@ static void bfin_mac_status_unmask_irq(unsigned int irq) } #ifdef CONFIG_PM -int bfin_mac_status_set_wake(unsigned int irq, unsigned int state) +int bfin_mac_status_set_wake(struct irq_data *d, unsigned int state) { #ifdef BF537_GENERIC_ERROR_INT_DEMUX return bfin_internal_set_wake(IRQ_GENERIC_ERROR, state); @@ -496,12 +515,12 @@ int bfin_mac_status_set_wake(unsigned int irq, unsigned int state) static struct irq_chip bfin_mac_status_irqchip = { .name = "MACST", - .ack = bfin_ack_noop, - .mask_ack = bfin_mac_status_mask_irq, - .mask = bfin_mac_status_mask_irq, - .unmask = bfin_mac_status_unmask_irq, + .irq_ack = bfin_ack_noop, + .irq_mask_ack = bfin_mac_status_mask_irq, + .irq_mask = bfin_mac_status_mask_irq, + .irq_unmask = bfin_mac_status_unmask_irq, #ifdef CONFIG_PM - .set_wake = bfin_mac_status_set_wake, + .irq_set_wake = bfin_mac_status_set_wake, #endif }; @@ -538,13 +557,9 @@ static void bfin_demux_mac_status_irq(unsigned int int_err_irq, static inline void bfin_set_irq_handler(unsigned irq, irq_flow_handler_t handle) { #ifdef CONFIG_IPIPE - _set_irq_handler(irq, handle_level_irq); -#else - struct irq_desc *desc = irq_desc + irq; - /* May not call generic set_irq_handler() due to spinlock - recursion. */ - desc->handle_irq = handle; + handle = handle_level_irq; #endif + __set_irq_handler_unlocked(irq, handle); } static DECLARE_BITMAP(gpio_enabled, MAX_BLACKFIN_GPIOS); @@ -552,17 +567,18 @@ extern void bfin_gpio_irq_prepare(unsigned gpio); #if !defined(CONFIG_BF54x) -static void bfin_gpio_ack_irq(unsigned int irq) +static void bfin_gpio_ack_irq(struct irq_data *d) { /* AFAIK ack_irq in case mask_ack is provided * get's only called for edge sense irqs */ - set_gpio_data(irq_to_gpio(irq), 0); + set_gpio_data(irq_to_gpio(d->irq), 0); } -static void bfin_gpio_mask_ack_irq(unsigned int irq) +static void bfin_gpio_mask_ack_irq(struct irq_data *d) { - struct irq_desc *desc = irq_desc + irq; + unsigned int irq = d->irq; + struct irq_desc *desc = irq_to_desc(irq); u32 gpionr = irq_to_gpio(irq); if (desc->handle_irq == handle_edge_irq) @@ -571,39 +587,40 @@ static void bfin_gpio_mask_ack_irq(unsigned int irq) set_gpio_maska(gpionr, 0); } -static void bfin_gpio_mask_irq(unsigned int irq) +static void bfin_gpio_mask_irq(struct irq_data *d) { - set_gpio_maska(irq_to_gpio(irq), 0); + set_gpio_maska(irq_to_gpio(d->irq), 0); } -static void bfin_gpio_unmask_irq(unsigned int irq) +static void bfin_gpio_unmask_irq(struct irq_data *d) { - set_gpio_maska(irq_to_gpio(irq), 1); + set_gpio_maska(irq_to_gpio(d->irq), 1); } -static unsigned int bfin_gpio_irq_startup(unsigned int irq) +static unsigned int bfin_gpio_irq_startup(struct irq_data *d) { - u32 gpionr = irq_to_gpio(irq); + u32 gpionr = irq_to_gpio(d->irq); if (__test_and_set_bit(gpionr, gpio_enabled)) bfin_gpio_irq_prepare(gpionr); - bfin_gpio_unmask_irq(irq); + bfin_gpio_unmask_irq(d); return 0; } -static void bfin_gpio_irq_shutdown(unsigned int irq) +static void bfin_gpio_irq_shutdown(struct irq_data *d) { - u32 gpionr = irq_to_gpio(irq); + u32 gpionr = irq_to_gpio(d->irq); - bfin_gpio_mask_irq(irq); + bfin_gpio_mask_irq(d); __clear_bit(gpionr, gpio_enabled); bfin_gpio_irq_free(gpionr); } -static int bfin_gpio_irq_type(unsigned int irq, unsigned int type) +static int bfin_gpio_irq_type(struct irq_data *d, unsigned int type) { + unsigned int irq = d->irq; int ret; char buf[16]; u32 gpionr = irq_to_gpio(irq); @@ -664,9 +681,9 @@ static int bfin_gpio_irq_type(unsigned int irq, unsigned int type) } #ifdef CONFIG_PM -int bfin_gpio_set_wake(unsigned int irq, unsigned int state) +int bfin_gpio_set_wake(struct irq_data *d, unsigned int state) { - return gpio_pm_wakeup_ctrl(irq_to_gpio(irq), state); + return gpio_pm_wakeup_ctrl(irq_to_gpio(d->irq), state); } #endif @@ -818,10 +835,10 @@ void init_pint_lut(void) } } -static void bfin_gpio_ack_irq(unsigned int irq) +static void bfin_gpio_ack_irq(struct irq_data *d) { - struct irq_desc *desc = irq_desc + irq; - u32 pint_val = irq2pint_lut[irq - SYS_IRQS]; + struct irq_desc *desc = irq_to_desc(d->irq); + u32 pint_val = irq2pint_lut[d->irq - SYS_IRQS]; u32 pintbit = PINT_BIT(pint_val); u32 bank = PINT_2_BANK(pint_val); @@ -835,10 +852,10 @@ static void bfin_gpio_ack_irq(unsigned int irq) } -static void bfin_gpio_mask_ack_irq(unsigned int irq) +static void bfin_gpio_mask_ack_irq(struct irq_data *d) { - struct irq_desc *desc = irq_desc + irq; - u32 pint_val = irq2pint_lut[irq - SYS_IRQS]; + struct irq_desc *desc = irq_to_desc(d->irq); + u32 pint_val = irq2pint_lut[d->irq - SYS_IRQS]; u32 pintbit = PINT_BIT(pint_val); u32 bank = PINT_2_BANK(pint_val); @@ -853,24 +870,25 @@ static void bfin_gpio_mask_ack_irq(unsigned int irq) pint[bank]->mask_clear = pintbit; } -static void bfin_gpio_mask_irq(unsigned int irq) +static void bfin_gpio_mask_irq(struct irq_data *d) { - u32 pint_val = irq2pint_lut[irq - SYS_IRQS]; + u32 pint_val = irq2pint_lut[d->irq - SYS_IRQS]; pint[PINT_2_BANK(pint_val)]->mask_clear = PINT_BIT(pint_val); } -static void bfin_gpio_unmask_irq(unsigned int irq) +static void bfin_gpio_unmask_irq(struct irq_data *d) { - u32 pint_val = irq2pint_lut[irq - SYS_IRQS]; + u32 pint_val = irq2pint_lut[d->irq - SYS_IRQS]; u32 pintbit = PINT_BIT(pint_val); u32 bank = PINT_2_BANK(pint_val); pint[bank]->mask_set = pintbit; } -static unsigned int bfin_gpio_irq_startup(unsigned int irq) +static unsigned int bfin_gpio_irq_startup(struct irq_data *d) { + unsigned int irq = d->irq; u32 gpionr = irq_to_gpio(irq); u32 pint_val = irq2pint_lut[irq - SYS_IRQS]; @@ -884,22 +902,23 @@ static unsigned int bfin_gpio_irq_startup(unsigned int irq) if (__test_and_set_bit(gpionr, gpio_enabled)) bfin_gpio_irq_prepare(gpionr); - bfin_gpio_unmask_irq(irq); + bfin_gpio_unmask_irq(d); return 0; } -static void bfin_gpio_irq_shutdown(unsigned int irq) +static void bfin_gpio_irq_shutdown(struct irq_data *d) { - u32 gpionr = irq_to_gpio(irq); + u32 gpionr = irq_to_gpio(d->irq); - bfin_gpio_mask_irq(irq); + bfin_gpio_mask_irq(d); __clear_bit(gpionr, gpio_enabled); bfin_gpio_irq_free(gpionr); } -static int bfin_gpio_irq_type(unsigned int irq, unsigned int type) +static int bfin_gpio_irq_type(struct irq_data *d, unsigned int type) { + unsigned int irq = d->irq; int ret; char buf[16]; u32 gpionr = irq_to_gpio(irq); @@ -961,10 +980,10 @@ static int bfin_gpio_irq_type(unsigned int irq, unsigned int type) u32 pint_saved_masks[NR_PINT_SYS_IRQS]; u32 pint_wakeup_masks[NR_PINT_SYS_IRQS]; -int bfin_gpio_set_wake(unsigned int irq, unsigned int state) +int bfin_gpio_set_wake(struct irq_data *d, unsigned int state) { u32 pint_irq; - u32 pint_val = irq2pint_lut[irq - SYS_IRQS]; + u32 pint_val = irq2pint_lut[d->irq - SYS_IRQS]; u32 bank = PINT_2_BANK(pint_val); u32 pintbit = PINT_BIT(pint_val); @@ -1066,17 +1085,17 @@ static void bfin_demux_gpio_irq(unsigned int inta_irq, static struct irq_chip bfin_gpio_irqchip = { .name = "GPIO", - .ack = bfin_gpio_ack_irq, - .mask = bfin_gpio_mask_irq, - .mask_ack = bfin_gpio_mask_ack_irq, - .unmask = bfin_gpio_unmask_irq, - .disable = bfin_gpio_mask_irq, - .enable = bfin_gpio_unmask_irq, - .set_type = bfin_gpio_irq_type, - .startup = bfin_gpio_irq_startup, - .shutdown = bfin_gpio_irq_shutdown, + .irq_ack = bfin_gpio_ack_irq, + .irq_mask = bfin_gpio_mask_irq, + .irq_mask_ack = bfin_gpio_mask_ack_irq, + .irq_unmask = bfin_gpio_unmask_irq, + .irq_disable = bfin_gpio_mask_irq, + .irq_enable = bfin_gpio_unmask_irq, + .irq_set_type = bfin_gpio_irq_type, + .irq_startup = bfin_gpio_irq_startup, + .irq_shutdown = bfin_gpio_irq_shutdown, #ifdef CONFIG_PM - .set_wake = bfin_gpio_set_wake, + .irq_set_wake = bfin_gpio_set_wake, #endif }; @@ -1373,7 +1392,7 @@ asmlinkage int __ipipe_grab_irq(int vec, struct pt_regs *regs) struct ipipe_domain *this_domain = __ipipe_current_domain; struct ivgx *ivg_stop = ivg7_13[vec-IVG7].istop; struct ivgx *ivg = ivg7_13[vec-IVG7].ifirst; - int irq, s; + int irq, s = 0; if (likely(vec == EVT_IVTMR_P)) irq = IRQ_CORETMR; @@ -1423,6 +1442,21 @@ asmlinkage int __ipipe_grab_irq(int vec, struct pt_regs *regs) __raw_get_cpu_var(__ipipe_tick_regs).ipend |= 0x10; } + /* + * We don't want Linux interrupt handlers to run at the + * current core priority level (i.e. < EVT15), since this + * might delay other interrupts handled by a high priority + * domain. Here is what we do instead: + * + * - we raise the SYNCDEFER bit to prevent + * __ipipe_handle_irq() to sync the pipeline for the root + * stage for the incoming interrupt. Upon return, that IRQ is + * pending in the interrupt log. + * + * - we raise the TIF_IRQ_SYNC bit for the current thread, so + * that _schedule_and_signal_from_int will eventually sync the + * pipeline from EVT15. + */ if (this_domain == ipipe_root_domain) { s = __test_and_set_bit(IPIPE_SYNCDEFER_FLAG, &p->status); barrier(); @@ -1432,6 +1466,24 @@ asmlinkage int __ipipe_grab_irq(int vec, struct pt_regs *regs) __ipipe_handle_irq(irq, regs); ipipe_trace_irq_exit(irq); + if (user_mode(regs) && + !ipipe_test_foreign_stack() && + (current->ipipe_flags & PF_EVTRET) != 0) { + /* + * Testing for user_regs() does NOT fully eliminate + * foreign stack contexts, because of the forged + * interrupt returns we do through + * __ipipe_call_irqtail. In that case, we might have + * preempted a foreign stack context in a high + * priority domain, with a single interrupt level now + * pending after the irqtail unwinding is done. In + * which case user_mode() is now true, and the event + * gets dispatched spuriously. + */ + current->ipipe_flags &= ~PF_EVTRET; + __ipipe_dispatch_event(IPIPE_EVENT_RETURN, regs); + } + if (this_domain == ipipe_root_domain) { set_thread_flag(TIF_IRQ_SYNC); if (!s) { diff --git a/arch/blackfin/mach-common/smp.c b/arch/blackfin/mach-common/smp.c index 9f25140..6e17a26 100644 --- a/arch/blackfin/mach-common/smp.c +++ b/arch/blackfin/mach-common/smp.c @@ -40,6 +40,10 @@ */ struct corelock_slot corelock __attribute__ ((__section__(".l2.bss"))); +#ifdef CONFIG_ICACHE_FLUSH_L1 +unsigned long blackfin_iflush_l1_entry[NR_CPUS]; +#endif + void __cpuinitdata *init_retx_coreb, *init_saved_retx_coreb, *init_saved_seqstat_coreb, *init_saved_icplb_fault_addr_coreb, *init_saved_dcplb_fault_addr_coreb; @@ -105,10 +109,10 @@ static void ipi_flush_icache(void *info) struct blackfin_flush_data *fdata = info; /* Invalidate the memory holding the bounds of the flushed region. */ - blackfin_dcache_invalidate_range((unsigned long)fdata, - (unsigned long)fdata + sizeof(*fdata)); + invalidate_dcache_range((unsigned long)fdata, + (unsigned long)fdata + sizeof(*fdata)); - blackfin_icache_flush_range(fdata->start, fdata->end); + flush_icache_range(fdata->start, fdata->end); } static void ipi_call_function(unsigned int cpu, struct ipi_message *msg) @@ -244,12 +248,13 @@ int smp_call_function(void (*func)(void *info), void *info, int wait) { cpumask_t callmap; + preempt_disable(); callmap = cpu_online_map; cpu_clear(smp_processor_id(), callmap); - if (cpus_empty(callmap)) - return 0; + if (!cpus_empty(callmap)) + smp_send_message(callmap, BFIN_IPI_CALL_FUNC, func, info, wait); - smp_send_message(callmap, BFIN_IPI_CALL_FUNC, func, info, wait); + preempt_enable(); return 0; } @@ -286,12 +291,13 @@ void smp_send_stop(void) { cpumask_t callmap; + preempt_disable(); callmap = cpu_online_map; cpu_clear(smp_processor_id(), callmap); - if (cpus_empty(callmap)) - return; + if (!cpus_empty(callmap)) + smp_send_message(callmap, BFIN_IPI_CPU_STOP, NULL, NULL, 0); - smp_send_message(callmap, BFIN_IPI_CPU_STOP, NULL, NULL, 0); + preempt_enable(); return; } @@ -361,8 +367,6 @@ void __cpuinit secondary_start_kernel(void) */ init_exception_vectors(); - bfin_setup_caches(cpu); - local_irq_disable(); /* Attach the new idle task to the global mm. */ @@ -381,6 +385,8 @@ void __cpuinit secondary_start_kernel(void) local_irq_enable(); + bfin_setup_caches(cpu); + /* * Calibrate loops per jiffy value. * IRQs need to be enabled here - D-cache can be invalidated diff --git a/arch/cris/include/asm/bitops.h b/arch/cris/include/asm/bitops.h index 9e69cfb..310e0de 100644 --- a/arch/cris/include/asm/bitops.h +++ b/arch/cris/include/asm/bitops.h @@ -154,12 +154,11 @@ static inline int test_and_change_bit(int nr, volatile unsigned long *addr) #include <asm-generic/bitops/find.h> #include <asm-generic/bitops/lock.h> -#include <asm-generic/bitops/ext2-non-atomic.h> +#include <asm-generic/bitops/le.h> #define ext2_set_bit_atomic(l,n,a) test_and_set_bit(n,a) #define ext2_clear_bit_atomic(l,n,a) test_and_clear_bit(n,a) -#include <asm-generic/bitops/minix.h> #include <asm-generic/bitops/sched.h> #endif /* __KERNEL__ */ diff --git a/arch/cris/include/asm/thread_info.h b/arch/cris/include/asm/thread_info.h index 9177606..29b74a1 100644 --- a/arch/cris/include/asm/thread_info.h +++ b/arch/cris/include/asm/thread_info.h @@ -68,7 +68,7 @@ struct thread_info { #define init_thread_info (init_thread_union.thread_info) /* thread information allocation */ -#define alloc_thread_info(tsk) ((struct thread_info *) __get_free_pages(GFP_KERNEL,1)) +#define alloc_thread_info(tsk, node) ((struct thread_info *) __get_free_pages(GFP_KERNEL,1)) #define free_thread_info(ti) free_pages((unsigned long) (ti), 1) #endif /* !__ASSEMBLY__ */ diff --git a/arch/cris/include/asm/types.h b/arch/cris/include/asm/types.h index 5790262..551a12c 100644 --- a/arch/cris/include/asm/types.h +++ b/arch/cris/include/asm/types.h @@ -16,15 +16,6 @@ typedef unsigned short umode_t; #define BITS_PER_LONG 32 -#ifndef __ASSEMBLY__ - -/* Dma addresses are 32-bits wide, just like our other addresses. */ - -typedef u32 dma_addr_t; -typedef u32 dma64_addr_t; - -#endif /* __ASSEMBLY__ */ - #endif /* __KERNEL__ */ #endif diff --git a/arch/frv/Kconfig b/arch/frv/Kconfig index 747499a..f6037b2 100644 --- a/arch/frv/Kconfig +++ b/arch/frv/Kconfig @@ -22,6 +22,10 @@ config GENERIC_FIND_NEXT_BIT bool default y +config GENERIC_FIND_BIT_LE + bool + default y + config GENERIC_HWEIGHT bool default y diff --git a/arch/frv/include/asm/bitops.h b/arch/frv/include/asm/bitops.h index 50ae91b..a1d00b0 100644 --- a/arch/frv/include/asm/bitops.h +++ b/arch/frv/include/asm/bitops.h @@ -401,13 +401,11 @@ int __ilog2_u64(u64 n) #include <asm-generic/bitops/hweight.h> #include <asm-generic/bitops/lock.h> -#include <asm-generic/bitops/ext2-non-atomic.h> +#include <asm-generic/bitops/le.h> #define ext2_set_bit_atomic(lock,nr,addr) test_and_set_bit ((nr) ^ 0x18, (addr)) #define ext2_clear_bit_atomic(lock,nr,addr) test_and_clear_bit((nr) ^ 0x18, (addr)) -#include <asm-generic/bitops/minix-le.h> - #endif /* __KERNEL__ */ #endif /* _ASM_BITOPS_H */ diff --git a/arch/frv/include/asm/processor.h b/arch/frv/include/asm/processor.h index 3744f2e..4b789ab 100644 --- a/arch/frv/include/asm/processor.h +++ b/arch/frv/include/asm/processor.h @@ -137,7 +137,7 @@ unsigned long get_wchan(struct task_struct *p); #define KSTK_ESP(tsk) ((tsk)->thread.frame0->sp) /* Allocation and freeing of basic task resources. */ -extern struct task_struct *alloc_task_struct(void); +extern struct task_struct *alloc_task_struct_node(int node); extern void free_task_struct(struct task_struct *p); #define cpu_relax() barrier() diff --git a/arch/frv/include/asm/thread_info.h b/arch/frv/include/asm/thread_info.h index 11f33ea..8582e9c 100644 --- a/arch/frv/include/asm/thread_info.h +++ b/arch/frv/include/asm/thread_info.h @@ -84,16 +84,11 @@ register struct thread_info *__current_thread_info asm("gr15"); /* thread information allocation */ #ifdef CONFIG_DEBUG_STACK_USAGE -#define alloc_thread_info(tsk) \ - ({ \ - struct thread_info *ret; \ - \ - ret = kzalloc(THREAD_SIZE, GFP_KERNEL); \ - \ - ret; \ - }) +#define alloc_thread_info_node(tsk, node) \ + kzalloc_node(THREAD_SIZE, GFP_KERNEL, node) #else -#define alloc_thread_info(tsk) kmalloc(THREAD_SIZE, GFP_KERNEL) +#define alloc_thread_info_node(tsk) \ + kmalloc_node(THREAD_SIZE, GFP_KERNEL, node) #endif #define free_thread_info(info) kfree(info) diff --git a/arch/frv/include/asm/types.h b/arch/frv/include/asm/types.h index 613bf1e..aa3e7fd 100644 --- a/arch/frv/include/asm/types.h +++ b/arch/frv/include/asm/types.h @@ -27,14 +27,6 @@ typedef unsigned short umode_t; #define BITS_PER_LONG 32 -#ifndef __ASSEMBLY__ - -/* Dma addresses are 32-bits wide. */ - -typedef u32 dma_addr_t; - -#endif /* __ASSEMBLY__ */ - #endif /* __KERNEL__ */ #endif /* _ASM_TYPES_H */ diff --git a/arch/frv/kernel/process.c b/arch/frv/kernel/process.c index efad120..9d35975 100644 --- a/arch/frv/kernel/process.c +++ b/arch/frv/kernel/process.c @@ -44,9 +44,10 @@ asmlinkage void ret_from_fork(void); void (*pm_power_off)(void); EXPORT_SYMBOL(pm_power_off); -struct task_struct *alloc_task_struct(void) +struct task_struct *alloc_task_struct_node(int node) { - struct task_struct *p = kmalloc(THREAD_SIZE, GFP_KERNEL); + struct task_struct *p = kmalloc_node(THREAD_SIZE, GFP_KERNEL, node); + if (p) atomic_set((atomic_t *)(p+1), 1); return p; diff --git a/arch/h8300/Kconfig b/arch/h8300/Kconfig index 6df692d..9624db1 100644 --- a/arch/h8300/Kconfig +++ b/arch/h8300/Kconfig @@ -45,6 +45,10 @@ config GENERIC_FIND_NEXT_BIT bool default y +config GENERIC_FIND_BIT_LE + bool + default y + config GENERIC_HWEIGHT bool default y diff --git a/arch/h8300/boot/compressed/Makefile b/arch/h8300/boot/compressed/Makefile index d6189e0..6745cb1 100644 --- a/arch/h8300/boot/compressed/Makefile +++ b/arch/h8300/boot/compressed/Makefile @@ -5,7 +5,7 @@ # targets := vmlinux vmlinux.bin vmlinux.bin.gz head.o misc.o piggy.o -EXTRA_AFLAGS := -traditional +asflags-y := -traditional OBJECTS = $(obj)/head.o $(obj)/misc.o diff --git a/arch/h8300/include/asm/bitops.h b/arch/h8300/include/asm/bitops.h index cb9ddf5..e856c1b 100644 --- a/arch/h8300/include/asm/bitops.h +++ b/arch/h8300/include/asm/bitops.h @@ -200,9 +200,8 @@ static __inline__ unsigned long __ffs(unsigned long word) #include <asm-generic/bitops/sched.h> #include <asm-generic/bitops/hweight.h> #include <asm-generic/bitops/lock.h> -#include <asm-generic/bitops/ext2-non-atomic.h> +#include <asm-generic/bitops/le.h> #include <asm-generic/bitops/ext2-atomic.h> -#include <asm-generic/bitops/minix.h> #endif /* __KERNEL__ */ diff --git a/arch/h8300/include/asm/types.h b/arch/h8300/include/asm/types.h index 1287519..bb2c91a 100644 --- a/arch/h8300/include/asm/types.h +++ b/arch/h8300/include/asm/types.h @@ -22,10 +22,6 @@ typedef unsigned short umode_t; #define BITS_PER_LONG 32 -/* Dma addresses are 32-bits wide. */ - -typedef u32 dma_addr_t; - #endif /* __KERNEL__ */ #endif /* __ASSEMBLY__ */ diff --git a/arch/ia64/include/asm/acpi.h b/arch/ia64/include/asm/acpi.h index 837dc82..a06dfb1 100644 --- a/arch/ia64/include/asm/acpi.h +++ b/arch/ia64/include/asm/acpi.h @@ -128,9 +128,9 @@ static inline const char *acpi_get_sysname (void) int acpi_request_vector (u32 int_type); int acpi_gsi_to_irq (u32 gsi, unsigned int *irq); -/* routines for saving/restoring kernel state */ -extern int acpi_save_state_mem(void); -extern void acpi_restore_state_mem(void); +/* Low-level suspend routine. */ +extern int acpi_suspend_lowlevel(void); + extern unsigned long acpi_wakeup_address; /* diff --git a/arch/ia64/include/asm/bitops.h b/arch/ia64/include/asm/bitops.h index 9da3df6..b76f7e0 100644 --- a/arch/ia64/include/asm/bitops.h +++ b/arch/ia64/include/asm/bitops.h @@ -456,12 +456,11 @@ static __inline__ unsigned long __arch_hweight64(unsigned long x) #ifdef __KERNEL__ -#include <asm-generic/bitops/ext2-non-atomic.h> +#include <asm-generic/bitops/le.h> #define ext2_set_bit_atomic(l,n,a) test_and_set_bit(n,a) #define ext2_clear_bit_atomic(l,n,a) test_and_clear_bit(n,a) -#include <asm-generic/bitops/minix.h> #include <asm-generic/bitops/sched.h> #endif /* __KERNEL__ */ diff --git a/arch/ia64/include/asm/thread_info.h b/arch/ia64/include/asm/thread_info.h index b6a5ba2..ff0cc84 100644 --- a/arch/ia64/include/asm/thread_info.h +++ b/arch/ia64/include/asm/thread_info.h @@ -59,11 +59,12 @@ struct thread_info { #ifndef ASM_OFFSETS_C /* how to get the thread information struct from C */ #define current_thread_info() ((struct thread_info *) ((char *) current + IA64_TASK_SIZE)) -#define alloc_thread_info(tsk) ((struct thread_info *) ((char *) (tsk) + IA64_TASK_SIZE)) +#define alloc_thread_info_node(tsk, node) \ + ((struct thread_info *) ((char *) (tsk) + IA64_TASK_SIZE)) #define task_thread_info(tsk) ((struct thread_info *) ((char *) (tsk) + IA64_TASK_SIZE)) #else #define current_thread_info() ((struct thread_info *) 0) -#define alloc_thread_info(tsk) ((struct thread_info *) 0) +#define alloc_thread_info_node(tsk, node) ((struct thread_info *) 0) #define task_thread_info(tsk) ((struct thread_info *) 0) #endif #define free_thread_info(ti) /* nothing */ @@ -84,7 +85,14 @@ struct thread_info { #define end_of_stack(p) (unsigned long *)((void *)(p) + IA64_RBS_OFFSET) #define __HAVE_ARCH_TASK_STRUCT_ALLOCATOR -#define alloc_task_struct() ((struct task_struct *)__get_free_pages(GFP_KERNEL | __GFP_COMP, KERNEL_STACK_SIZE_ORDER)) +#define alloc_task_struct_node(node) \ +({ \ + struct page *page = alloc_pages_node(node, GFP_KERNEL | __GFP_COMP, \ + KERNEL_STACK_SIZE_ORDER); \ + struct task_struct *ret = page ? page_address(page) : NULL; \ + \ + ret; \ +}) #define free_task_struct(tsk) free_pages((unsigned long) (tsk), KERNEL_STACK_SIZE_ORDER) #endif /* !__ASSEMBLY */ diff --git a/arch/ia64/include/asm/types.h b/arch/ia64/include/asm/types.h index 93773fd..82b3939 100644 --- a/arch/ia64/include/asm/types.h +++ b/arch/ia64/include/asm/types.h @@ -40,9 +40,6 @@ struct fnptr { unsigned long gp; }; -/* DMA addresses are 64-bits wide, in general. */ -typedef u64 dma_addr_t; - # endif /* __KERNEL__ */ #endif /* !__ASSEMBLY__ */ diff --git a/arch/ia64/include/asm/unistd.h b/arch/ia64/include/asm/unistd.h index 954d398..404d037 100644 --- a/arch/ia64/include/asm/unistd.h +++ b/arch/ia64/include/asm/unistd.h @@ -315,11 +315,15 @@ #define __NR_fanotify_init 1323 #define __NR_fanotify_mark 1324 #define __NR_prlimit64 1325 +#define __NR_name_to_handle_at 1326 +#define __NR_open_by_handle_at 1327 +#define __NR_clock_adjtime 1328 +#define __NR_syncfs 1329 #ifdef __KERNEL__ -#define NR_syscalls 302 /* length of syscall table */ +#define NR_syscalls 306 /* length of syscall table */ /* * The following defines stop scripts/checksyscalls.sh from complaining about diff --git a/arch/ia64/kernel/acpi.c b/arch/ia64/kernel/acpi.c index 90ebceb..3be485a 100644 --- a/arch/ia64/kernel/acpi.c +++ b/arch/ia64/kernel/acpi.c @@ -803,7 +803,7 @@ int acpi_isa_irq_to_gsi(unsigned isa_irq, u32 *gsi) * ACPI based hotplug CPU support */ #ifdef CONFIG_ACPI_HOTPLUG_CPU -static +static __cpuinit int acpi_map_cpu2node(acpi_handle handle, int cpu, int physid) { #ifdef CONFIG_ACPI_NUMA @@ -878,7 +878,7 @@ __init void prefill_possible_map(void) set_cpu_possible(i, true); } -int acpi_map_lsapic(acpi_handle handle, int *pcpu) +static int __cpuinit _acpi_map_lsapic(acpi_handle handle, int *pcpu) { struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL }; union acpi_object *obj; @@ -929,6 +929,11 @@ int acpi_map_lsapic(acpi_handle handle, int *pcpu) return (0); } +/* wrapper to silence section mismatch warning */ +int __ref acpi_map_lsapic(acpi_handle handle, int *pcpu) +{ + return _acpi_map_lsapic(handle, pcpu); +} EXPORT_SYMBOL(acpi_map_lsapic); int acpi_unmap_lsapic(int cpu) @@ -1034,18 +1039,8 @@ int acpi_unregister_ioapic(acpi_handle handle, u32 gsi_base) EXPORT_SYMBOL(acpi_unregister_ioapic); /* - * acpi_save_state_mem() - save kernel state + * acpi_suspend_lowlevel() - save kernel state and suspend. * * TBD when when IA64 starts to support suspend... */ -int acpi_save_state_mem(void) { return 0; } - -/* - * acpi_restore_state() - */ -void acpi_restore_state_mem(void) {} - -/* - * do_suspend_lowlevel() - */ -void do_suspend_lowlevel(void) {} +int acpi_suspend_lowlevel(void) { return 0; } diff --git a/arch/ia64/kernel/crash_dump.c b/arch/ia64/kernel/crash_dump.c index 23e9129..c8c9298 100644 --- a/arch/ia64/kernel/crash_dump.c +++ b/arch/ia64/kernel/crash_dump.c @@ -13,9 +13,6 @@ #include <asm/page.h> #include <asm/uaccess.h> -/* Stores the physical address of elf header of crash image. */ -unsigned long long elfcorehdr_addr = ELFCORE_ADDR_MAX; - /** * copy_oldmem_page - copy one page from "oldmem" * @pfn: page frame number to be copied diff --git a/arch/ia64/kernel/efi.c b/arch/ia64/kernel/efi.c index a0f0019..6fc03af 100644 --- a/arch/ia64/kernel/efi.c +++ b/arch/ia64/kernel/efi.c @@ -23,6 +23,7 @@ */ #include <linux/module.h> #include <linux/bootmem.h> +#include <linux/crash_dump.h> #include <linux/kernel.h> #include <linux/init.h> #include <linux/types.h> diff --git a/arch/ia64/kernel/entry.S b/arch/ia64/kernel/entry.S index 244704a..6de2e23 100644 --- a/arch/ia64/kernel/entry.S +++ b/arch/ia64/kernel/entry.S @@ -1771,6 +1771,10 @@ sys_call_table: data8 sys_fanotify_init data8 sys_fanotify_mark data8 sys_prlimit64 // 1325 + data8 sys_name_to_handle_at + data8 sys_open_by_handle_at + data8 sys_clock_adjtime + data8 sys_syncfs .org sys_call_table + 8*NR_syscalls // guard against failures to increase NR_syscalls #endif /* __IA64_ASM_PARAVIRTUALIZED_NATIVE */ diff --git a/arch/ia64/kernel/setup.c b/arch/ia64/kernel/setup.c index 911cf97..5e2c724 100644 --- a/arch/ia64/kernel/setup.c +++ b/arch/ia64/kernel/setup.c @@ -479,25 +479,7 @@ static __init int setup_nomca(char *s) } early_param("nomca", setup_nomca); -/* - * Note: elfcorehdr_addr is not just limited to vmcore. It is also used by - * is_kdump_kernel() to determine if we are booting after a panic. Hence - * ifdef it under CONFIG_CRASH_DUMP and not CONFIG_PROC_VMCORE. - */ #ifdef CONFIG_CRASH_DUMP -/* elfcorehdr= specifies the location of elf core header - * stored by the crashed kernel. - */ -static int __init parse_elfcorehdr(char *arg) -{ - if (!arg) - return -EINVAL; - - elfcorehdr_addr = memparse(arg, &arg); - return 0; -} -early_param("elfcorehdr", parse_elfcorehdr); - int __init reserve_elfcorehdr(u64 *start, u64 *end) { u64 length; diff --git a/arch/ia64/kvm/Makefile b/arch/ia64/kvm/Makefile index 1089b3e..db3d7c5 100644 --- a/arch/ia64/kvm/Makefile +++ b/arch/ia64/kvm/Makefile @@ -45,8 +45,8 @@ FORCE : $(obj)/$(offsets-file) # Makefile for Kernel-based Virtual Machine module # -EXTRA_CFLAGS += -Ivirt/kvm -Iarch/ia64/kvm/ -EXTRA_AFLAGS += -Ivirt/kvm -Iarch/ia64/kvm/ +ccflags-y := -Ivirt/kvm -Iarch/ia64/kvm/ +asflags-y := -Ivirt/kvm -Iarch/ia64/kvm/ common-objs = $(addprefix ../../../virt/kvm/, kvm_main.o ioapic.o \ coalesced_mmio.o irq_comm.o assigned-dev.o) diff --git a/arch/ia64/mm/contig.c b/arch/ia64/mm/contig.c index 54bf540..9a018cd 100644 --- a/arch/ia64/mm/contig.c +++ b/arch/ia64/mm/contig.c @@ -36,7 +36,7 @@ static unsigned long max_gap; * Shows a simple page count of reserved and used pages in the system. * For discontig machines, it does this on a per-pgdat basis. */ -void show_mem(void) +void show_mem(unsigned int filter) { int i, total_reserved = 0; int total_shared = 0, total_cached = 0; diff --git a/arch/ia64/mm/discontig.c b/arch/ia64/mm/discontig.c index 6162032..82ab1bc 100644 --- a/arch/ia64/mm/discontig.c +++ b/arch/ia64/mm/discontig.c @@ -614,7 +614,7 @@ void __cpuinit *per_cpu_init(void) * Shows a simple page count of reserved and used pages in the system. * For discontig machines, it does this on a per-pgdat basis. */ -void show_mem(void) +void show_mem(unsigned int filter) { int i, total_reserved = 0; int total_shared = 0, total_cached = 0; diff --git a/arch/ia64/sn/kernel/Makefile b/arch/ia64/sn/kernel/Makefile index 0591038..d27df1d 100644 --- a/arch/ia64/sn/kernel/Makefile +++ b/arch/ia64/sn/kernel/Makefile @@ -7,7 +7,7 @@ # Copyright (C) 1999,2001-2006,2008 Silicon Graphics, Inc. All Rights Reserved. # -EXTRA_CFLAGS += -Iarch/ia64/sn/include +ccflags-y := -Iarch/ia64/sn/include obj-y += setup.o bte.o bte_error.o irq.o mca.o idle.o \ huberror.o io_acpi_init.o io_common.o \ diff --git a/arch/ia64/sn/kernel/sn2/Makefile b/arch/ia64/sn/kernel/sn2/Makefile index 08e6565..3d09108 100644 --- a/arch/ia64/sn/kernel/sn2/Makefile +++ b/arch/ia64/sn/kernel/sn2/Makefile @@ -9,7 +9,7 @@ # sn2 specific kernel files # -EXTRA_CFLAGS += -Iarch/ia64/sn/include +ccflags-y := -Iarch/ia64/sn/include obj-y += cache.o io.o ptc_deadlock.o sn2_smp.o sn_proc_fs.o \ prominfo_proc.o timer.o timer_interrupt.o sn_hwperf.o diff --git a/arch/ia64/sn/pci/Makefile b/arch/ia64/sn/pci/Makefile index ad4ef34..df2a901 100644 --- a/arch/ia64/sn/pci/Makefile +++ b/arch/ia64/sn/pci/Makefile @@ -7,6 +7,6 @@ # # Makefile for the sn pci general routines. -EXTRA_CFLAGS += -Iarch/ia64/sn/include +ccflags-y := -Iarch/ia64/sn/include obj-y := pci_dma.o tioca_provider.o tioce_provider.o pcibr/ diff --git a/arch/ia64/sn/pci/pcibr/Makefile b/arch/ia64/sn/pci/pcibr/Makefile index 01192d3..396bcae 100644 --- a/arch/ia64/sn/pci/pcibr/Makefile +++ b/arch/ia64/sn/pci/pcibr/Makefile @@ -7,7 +7,7 @@ # # Makefile for the sn2 io routines. -EXTRA_CFLAGS += -Iarch/ia64/sn/include +ccflags-y := -Iarch/ia64/sn/include obj-y += pcibr_dma.o pcibr_reg.o \ pcibr_ate.o pcibr_provider.o diff --git a/arch/ia64/uv/kernel/Makefile b/arch/ia64/uv/kernel/Makefile index 8d92b46..124e441 100644 --- a/arch/ia64/uv/kernel/Makefile +++ b/arch/ia64/uv/kernel/Makefile @@ -7,7 +7,7 @@ # Copyright (C) 2008 Silicon Graphics, Inc. All Rights Reserved. # -EXTRA_CFLAGS += -Iarch/ia64/sn/include +ccflags-y := -Iarch/ia64/sn/include obj-y += setup.o obj-$(CONFIG_IA64_GENERIC) += machvec.o diff --git a/arch/m32r/Kconfig b/arch/m32r/Kconfig index ef4c1e4..62afe23 100644 --- a/arch/m32r/Kconfig +++ b/arch/m32r/Kconfig @@ -260,6 +260,10 @@ config GENERIC_FIND_NEXT_BIT bool default y +config GENERIC_FIND_BIT_LE + bool + default y + config GENERIC_HWEIGHT bool default y diff --git a/arch/m32r/include/asm/bitops.h b/arch/m32r/include/asm/bitops.h index aaddf0d..6300f22 100644 --- a/arch/m32r/include/asm/bitops.h +++ b/arch/m32r/include/asm/bitops.h @@ -266,9 +266,8 @@ static __inline__ int test_and_change_bit(int nr, volatile void * addr) #ifdef __KERNEL__ -#include <asm-generic/bitops/ext2-non-atomic.h> +#include <asm-generic/bitops/le.h> #include <asm-generic/bitops/ext2-atomic.h> -#include <asm-generic/bitops/minix.h> #endif /* __KERNEL__ */ diff --git a/arch/m32r/include/asm/thread_info.h b/arch/m32r/include/asm/thread_info.h index 71faff5..0227dba 100644 --- a/arch/m32r/include/asm/thread_info.h +++ b/arch/m32r/include/asm/thread_info.h @@ -96,16 +96,11 @@ static inline struct thread_info *current_thread_info(void) /* thread information allocation */ #ifdef CONFIG_DEBUG_STACK_USAGE -#define alloc_thread_info(tsk) \ - ({ \ - struct thread_info *ret; \ - \ - ret = kzalloc(THREAD_SIZE, GFP_KERNEL); \ - \ - ret; \ - }) +#define alloc_thread_info_node(tsk, node) \ + kzalloc_node(THREAD_SIZE, GFP_KERNEL, node) #else -#define alloc_thread_info(tsk) kmalloc(THREAD_SIZE, GFP_KERNEL) +#define alloc_thread_info_node(tsk, node) \ + kmalloc_node(THREAD_SIZE, GFP_KERNEL, node) #endif #define free_thread_info(info) kfree(info) diff --git a/arch/m32r/include/asm/types.h b/arch/m32r/include/asm/types.h index bc9f7ff..bd00355 100644 --- a/arch/m32r/include/asm/types.h +++ b/arch/m32r/include/asm/types.h @@ -16,15 +16,6 @@ typedef unsigned short umode_t; #define BITS_PER_LONG 32 -#ifndef __ASSEMBLY__ - -/* DMA addresses are 32-bits wide. */ - -typedef u32 dma_addr_t; -typedef u64 dma64_addr_t; - -#endif /* __ASSEMBLY__ */ - #endif /* __KERNEL__ */ #endif /* _ASM_M32R_TYPES_H */ diff --git a/arch/m68k/include/asm/bitops_mm.h b/arch/m68k/include/asm/bitops_mm.h index b4ecdaa..9d69f6e 100644 --- a/arch/m68k/include/asm/bitops_mm.h +++ b/arch/m68k/include/asm/bitops_mm.h @@ -325,58 +325,45 @@ static inline int __fls(int x) #include <asm-generic/bitops/hweight.h> #include <asm-generic/bitops/lock.h> -/* Bitmap functions for the minix filesystem */ +/* Bitmap functions for the little endian bitmap. */ -static inline int minix_find_first_zero_bit(const void *vaddr, unsigned size) +static inline void __set_bit_le(int nr, void *addr) { - const unsigned short *p = vaddr, *addr = vaddr; - int res; - unsigned short num; - - if (!size) - return 0; - - size = (size >> 4) + ((size & 15) > 0); - while (*p++ == 0xffff) - { - if (--size == 0) - return (p - addr) << 4; - } + __set_bit(nr ^ 24, addr); +} - num = ~*--p; - __asm__ __volatile__ ("bfffo %1{#16,#16},%0" - : "=d" (res) : "d" (num & -num)); - return ((p - addr) << 4) + (res ^ 31); +static inline void __clear_bit_le(int nr, void *addr) +{ + __clear_bit(nr ^ 24, addr); } -#define minix_test_and_set_bit(nr, addr) __test_and_set_bit((nr) ^ 16, (unsigned long *)(addr)) -#define minix_set_bit(nr,addr) __set_bit((nr) ^ 16, (unsigned long *)(addr)) -#define minix_test_and_clear_bit(nr, addr) __test_and_clear_bit((nr) ^ 16, (unsigned long *)(addr)) +static inline int __test_and_set_bit_le(int nr, void *addr) +{ + return __test_and_set_bit(nr ^ 24, addr); +} -static inline int minix_test_bit(int nr, const void *vaddr) +static inline int test_and_set_bit_le(int nr, void *addr) { - const unsigned short *p = vaddr; - return (p[nr >> 4] & (1U << (nr & 15))) != 0; + return test_and_set_bit(nr ^ 24, addr); } -/* Bitmap functions for the ext2 filesystem. */ +static inline int __test_and_clear_bit_le(int nr, void *addr) +{ + return __test_and_clear_bit(nr ^ 24, addr); +} -#define ext2_set_bit(nr, addr) __test_and_set_bit((nr) ^ 24, (unsigned long *)(addr)) -#define ext2_set_bit_atomic(lock, nr, addr) test_and_set_bit((nr) ^ 24, (unsigned long *)(addr)) -#define ext2_clear_bit(nr, addr) __test_and_clear_bit((nr) ^ 24, (unsigned long *)(addr)) -#define ext2_clear_bit_atomic(lock, nr, addr) test_and_clear_bit((nr) ^ 24, (unsigned long *)(addr)) -#define ext2_find_next_zero_bit(addr, size, offset) \ - generic_find_next_zero_le_bit((unsigned long *)addr, size, offset) -#define ext2_find_next_bit(addr, size, offset) \ - generic_find_next_le_bit((unsigned long *)addr, size, offset) +static inline int test_and_clear_bit_le(int nr, void *addr) +{ + return test_and_clear_bit(nr ^ 24, addr); +} -static inline int ext2_test_bit(int nr, const void *vaddr) +static inline int test_bit_le(int nr, const void *vaddr) { const unsigned char *p = vaddr; return (p[nr >> 3] & (1U << (nr & 7))) != 0; } -static inline int ext2_find_first_zero_bit(const void *vaddr, unsigned size) +static inline int find_first_zero_bit_le(const void *vaddr, unsigned size) { const unsigned long *p = vaddr, *addr = vaddr; int res; @@ -393,33 +380,36 @@ static inline int ext2_find_first_zero_bit(const void *vaddr, unsigned size) --p; for (res = 0; res < 32; res++) - if (!ext2_test_bit (res, p)) + if (!test_bit_le(res, p)) break; return (p - addr) * 32 + res; } -static inline unsigned long generic_find_next_zero_le_bit(const unsigned long *addr, +static inline unsigned long find_next_zero_bit_le(const void *addr, unsigned long size, unsigned long offset) { - const unsigned long *p = addr + (offset >> 5); + const unsigned long *p = addr; int bit = offset & 31UL, res; if (offset >= size) return size; + p += offset >> 5; + if (bit) { + offset -= bit; /* Look for zero in first longword */ for (res = bit; res < 32; res++) - if (!ext2_test_bit (res, p)) - return (p - addr) * 32 + res; + if (!test_bit_le(res, p)) + return offset + res; p++; + offset += 32; } /* No zero yet, search remaining full bytes for a zero */ - res = ext2_find_first_zero_bit (p, size - 32 * (p - addr)); - return (p - addr) * 32 + res; + return offset + find_first_zero_bit_le(p, size - offset); } -static inline int ext2_find_first_bit(const void *vaddr, unsigned size) +static inline int find_first_bit_le(const void *vaddr, unsigned size) { const unsigned long *p = vaddr, *addr = vaddr; int res; @@ -435,32 +425,42 @@ static inline int ext2_find_first_bit(const void *vaddr, unsigned size) --p; for (res = 0; res < 32; res++) - if (ext2_test_bit(res, p)) + if (test_bit_le(res, p)) break; return (p - addr) * 32 + res; } -static inline unsigned long generic_find_next_le_bit(const unsigned long *addr, +static inline unsigned long find_next_bit_le(const void *addr, unsigned long size, unsigned long offset) { - const unsigned long *p = addr + (offset >> 5); + const unsigned long *p = addr; int bit = offset & 31UL, res; if (offset >= size) return size; + p += offset >> 5; + if (bit) { + offset -= bit; /* Look for one in first longword */ for (res = bit; res < 32; res++) - if (ext2_test_bit(res, p)) - return (p - addr) * 32 + res; + if (test_bit_le(res, p)) + return offset + res; p++; + offset += 32; } /* No set bit yet, search remaining full bytes for a set bit */ - res = ext2_find_first_bit(p, size - 32 * (p - addr)); - return (p - addr) * 32 + res; + return offset + find_first_bit_le(p, size - offset); } +/* Bitmap functions for the ext2 filesystem. */ + +#define ext2_set_bit_atomic(lock, nr, addr) \ + test_and_set_bit_le(nr, addr) +#define ext2_clear_bit_atomic(lock, nr, addr) \ + test_and_clear_bit_le(nr, addr) + #endif /* __KERNEL__ */ #endif /* _M68K_BITOPS_H */ diff --git a/arch/m68k/include/asm/bitops_no.h b/arch/m68k/include/asm/bitops_no.h index 9d3cbe5..7d3779f 100644 --- a/arch/m68k/include/asm/bitops_no.h +++ b/arch/m68k/include/asm/bitops_no.h @@ -196,7 +196,19 @@ static __inline__ int __test_bit(int nr, const volatile unsigned long * addr) #include <asm-generic/bitops/hweight.h> #include <asm-generic/bitops/lock.h> -static __inline__ int ext2_set_bit(int nr, volatile void * addr) +#define BITOP_LE_SWIZZLE ((BITS_PER_LONG-1) & ~0x7) + +static inline void __set_bit_le(int nr, void *addr) +{ + __set_bit(nr ^ BITOP_LE_SWIZZLE, addr); +} + +static inline void __clear_bit_le(int nr, void *addr) +{ + __clear_bit(nr ^ BITOP_LE_SWIZZLE, addr); +} + +static inline int __test_and_set_bit_le(int nr, volatile void *addr) { char retval; @@ -215,7 +227,7 @@ static __inline__ int ext2_set_bit(int nr, volatile void * addr) return retval; } -static __inline__ int ext2_clear_bit(int nr, volatile void * addr) +static inline int __test_and_clear_bit_le(int nr, volatile void *addr) { char retval; @@ -238,7 +250,7 @@ static __inline__ int ext2_clear_bit(int nr, volatile void * addr) ({ \ int ret; \ spin_lock(lock); \ - ret = ext2_set_bit((nr), (addr)); \ + ret = __test_and_set_bit_le((nr), (addr)); \ spin_unlock(lock); \ ret; \ }) @@ -247,12 +259,12 @@ static __inline__ int ext2_clear_bit(int nr, volatile void * addr) ({ \ int ret; \ spin_lock(lock); \ - ret = ext2_clear_bit((nr), (addr)); \ + ret = __test_and_clear_bit_le((nr), (addr)); \ spin_unlock(lock); \ ret; \ }) -static __inline__ int ext2_test_bit(int nr, const volatile void * addr) +static inline int test_bit_le(int nr, const volatile void *addr) { char retval; @@ -271,10 +283,10 @@ static __inline__ int ext2_test_bit(int nr, const volatile void * addr) return retval; } -#define ext2_find_first_zero_bit(addr, size) \ - ext2_find_next_zero_bit((addr), (size), 0) +#define find_first_zero_bit_le(addr, size) \ + find_next_zero_bit_le((addr), (size), 0) -static __inline__ unsigned long ext2_find_next_zero_bit(void *addr, unsigned long size, unsigned long offset) +static inline unsigned long find_next_zero_bit_le(void *addr, unsigned long size, unsigned long offset) { unsigned long *p = ((unsigned long *) addr) + (offset >> 5); unsigned long result = offset & ~31UL; @@ -324,10 +336,6 @@ found_middle: return result + ffz(__swab32(tmp)); } -#define ext2_find_next_bit(addr, size, off) \ - generic_find_next_le_bit((unsigned long *)(addr), (size), (off)) -#include <asm-generic/bitops/minix.h> - #endif /* __KERNEL__ */ #include <asm-generic/bitops/fls.h> diff --git a/arch/m68k/include/asm/types.h b/arch/m68k/include/asm/types.h index 6441cb5..b17fd11 100644 --- a/arch/m68k/include/asm/types.h +++ b/arch/m68k/include/asm/types.h @@ -23,15 +23,6 @@ typedef unsigned short umode_t; #define BITS_PER_LONG 32 -#ifndef __ASSEMBLY__ - -/* DMA addresses are always 32-bits wide */ - -typedef u32 dma_addr_t; -typedef u32 dma64_addr_t; - -#endif /* __ASSEMBLY__ */ - #endif /* __KERNEL__ */ #endif /* _M68K_TYPES_H */ diff --git a/arch/microblaze/Kconfig b/arch/microblaze/Kconfig index 922c419..5f0cf0e 100644 --- a/arch/microblaze/Kconfig +++ b/arch/microblaze/Kconfig @@ -37,6 +37,9 @@ config ARCH_HAS_ILOG2_U64 config GENERIC_FIND_NEXT_BIT def_bool y +config GENERIC_FIND_BIT_LE + def_bool y + config GENERIC_HWEIGHT def_bool y diff --git a/arch/microblaze/kernel/cpu/Makefile b/arch/microblaze/kernel/cpu/Makefile index 59cc7bc..fceed4e 100644 --- a/arch/microblaze/kernel/cpu/Makefile +++ b/arch/microblaze/kernel/cpu/Makefile @@ -6,7 +6,7 @@ ifdef CONFIG_FUNCTION_TRACER CFLAGS_REMOVE_cache.o = -pg endif -EXTRA_CFLAGS += -DCPU_MAJOR=$(CPU_MAJOR) -DCPU_MINOR=$(CPU_MINOR) \ +ccflags-y := -DCPU_MAJOR=$(CPU_MAJOR) -DCPU_MINOR=$(CPU_MINOR) \ -DCPU_REV=$(CPU_REV) obj-y += cache.o cpuinfo.o cpuinfo-pvr-full.o cpuinfo-static.o mb.o pvr.o diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index d889835..83aa5fb 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -22,6 +22,7 @@ config MIPS select HAVE_DMA_API_DEBUG select HAVE_GENERIC_HARDIRQS select GENERIC_IRQ_PROBE + select GENERIC_IRQ_SHOW select HAVE_ARCH_JUMP_LABEL menu "Machine selection" @@ -777,6 +778,10 @@ config GENERIC_FIND_NEXT_BIT bool default y +config GENERIC_FIND_BIT_LE + bool + default y + config GENERIC_HWEIGHT bool default y @@ -858,6 +863,9 @@ config GPIO_TXX9 config CFE bool +config ARCH_DMA_ADDR_T_64BIT + def_bool (HIGHMEM && 64BIT_PHYS_ADDR) || 64BIT + config DMA_COHERENT bool @@ -2340,6 +2348,16 @@ source "drivers/pcmcia/Kconfig" source "drivers/pci/hotplug/Kconfig" +config RAPIDIO + bool "RapidIO support" + depends on PCI + default n + help + If you say Y here, the kernel will include drivers and + infrastructure code to support RapidIO interconnect devices. + +source "drivers/rapidio/Kconfig" + endmenu menu "Executable file formats" diff --git a/arch/mips/Makefile b/arch/mips/Makefile index 7c1102e..ac1d5b6 100644 --- a/arch/mips/Makefile +++ b/arch/mips/Makefile @@ -286,11 +286,11 @@ CLEAN_FILES += vmlinux.32 vmlinux.64 archprepare: ifdef CONFIG_MIPS32_N32 @echo ' Checking missing-syscalls for N32' - $(Q)$(MAKE) $(build)=. missing-syscalls EXTRA_CFLAGS="-mabi=n32" + $(Q)$(MAKE) $(build)=. missing-syscalls ccflags-y="-mabi=n32" endif ifdef CONFIG_MIPS32_O32 @echo ' Checking missing-syscalls for O32' - $(Q)$(MAKE) $(build)=. missing-syscalls EXTRA_CFLAGS="-mabi=32" + $(Q)$(MAKE) $(build)=. missing-syscalls ccflags-y="-mabi=32" endif install: diff --git a/arch/mips/alchemy/common/irq.c b/arch/mips/alchemy/common/irq.c index 9f78ada..55dd7c8 100644 --- a/arch/mips/alchemy/common/irq.c +++ b/arch/mips/alchemy/common/irq.c @@ -39,7 +39,7 @@ #include <asm/mach-pb1x00/pb1000.h> #endif -static int au1x_ic_settype(unsigned int irq, unsigned int flow_type); +static int au1x_ic_settype(struct irq_data *d, unsigned int flow_type); /* NOTE on interrupt priorities: The original writers of this code said: * @@ -218,17 +218,17 @@ struct au1xxx_irqmap au1200_irqmap[] __initdata = { }; -static void au1x_ic0_unmask(unsigned int irq_nr) +static void au1x_ic0_unmask(struct irq_data *d) { - unsigned int bit = irq_nr - AU1000_INTC0_INT_BASE; + unsigned int bit = d->irq - AU1000_INTC0_INT_BASE; au_writel(1 << bit, IC0_MASKSET); au_writel(1 << bit, IC0_WAKESET); au_sync(); } -static void au1x_ic1_unmask(unsigned int irq_nr) +static void au1x_ic1_unmask(struct irq_data *d) { - unsigned int bit = irq_nr - AU1000_INTC1_INT_BASE; + unsigned int bit = d->irq - AU1000_INTC1_INT_BASE; au_writel(1 << bit, IC1_MASKSET); au_writel(1 << bit, IC1_WAKESET); @@ -236,31 +236,31 @@ static void au1x_ic1_unmask(unsigned int irq_nr) * nowhere in the current kernel sources is it disabled. --mlau */ #if defined(CONFIG_MIPS_PB1000) - if (irq_nr == AU1000_GPIO15_INT) + if (d->irq == AU1000_GPIO15_INT) au_writel(0x4000, PB1000_MDR); /* enable int */ #endif au_sync(); } -static void au1x_ic0_mask(unsigned int irq_nr) +static void au1x_ic0_mask(struct irq_data *d) { - unsigned int bit = irq_nr - AU1000_INTC0_INT_BASE; + unsigned int bit = d->irq - AU1000_INTC0_INT_BASE; au_writel(1 << bit, IC0_MASKCLR); au_writel(1 << bit, IC0_WAKECLR); au_sync(); } -static void au1x_ic1_mask(unsigned int irq_nr) +static void au1x_ic1_mask(struct irq_data *d) { - unsigned int bit = irq_nr - AU1000_INTC1_INT_BASE; + unsigned int bit = d->irq - AU1000_INTC1_INT_BASE; au_writel(1 << bit, IC1_MASKCLR); au_writel(1 << bit, IC1_WAKECLR); au_sync(); } -static void au1x_ic0_ack(unsigned int irq_nr) +static void au1x_ic0_ack(struct irq_data *d) { - unsigned int bit = irq_nr - AU1000_INTC0_INT_BASE; + unsigned int bit = d->irq - AU1000_INTC0_INT_BASE; /* * This may assume that we don't get interrupts from @@ -271,9 +271,9 @@ static void au1x_ic0_ack(unsigned int irq_nr) au_sync(); } -static void au1x_ic1_ack(unsigned int irq_nr) +static void au1x_ic1_ack(struct irq_data *d) { - unsigned int bit = irq_nr - AU1000_INTC1_INT_BASE; + unsigned int bit = d->irq - AU1000_INTC1_INT_BASE; /* * This may assume that we don't get interrupts from @@ -284,9 +284,9 @@ static void au1x_ic1_ack(unsigned int irq_nr) au_sync(); } -static void au1x_ic0_maskack(unsigned int irq_nr) +static void au1x_ic0_maskack(struct irq_data *d) { - unsigned int bit = irq_nr - AU1000_INTC0_INT_BASE; + unsigned int bit = d->irq - AU1000_INTC0_INT_BASE; au_writel(1 << bit, IC0_WAKECLR); au_writel(1 << bit, IC0_MASKCLR); @@ -295,9 +295,9 @@ static void au1x_ic0_maskack(unsigned int irq_nr) au_sync(); } -static void au1x_ic1_maskack(unsigned int irq_nr) +static void au1x_ic1_maskack(struct irq_data *d) { - unsigned int bit = irq_nr - AU1000_INTC1_INT_BASE; + unsigned int bit = d->irq - AU1000_INTC1_INT_BASE; au_writel(1 << bit, IC1_WAKECLR); au_writel(1 << bit, IC1_MASKCLR); @@ -306,9 +306,9 @@ static void au1x_ic1_maskack(unsigned int irq_nr) au_sync(); } -static int au1x_ic1_setwake(unsigned int irq, unsigned int on) +static int au1x_ic1_setwake(struct irq_data *d, unsigned int on) { - int bit = irq - AU1000_INTC1_INT_BASE; + int bit = d->irq - AU1000_INTC1_INT_BASE; unsigned long wakemsk, flags; /* only GPIO 0-7 can act as wakeup source. Fortunately these @@ -336,28 +336,30 @@ static int au1x_ic1_setwake(unsigned int irq, unsigned int on) */ static struct irq_chip au1x_ic0_chip = { .name = "Alchemy-IC0", - .ack = au1x_ic0_ack, - .mask = au1x_ic0_mask, - .mask_ack = au1x_ic0_maskack, - .unmask = au1x_ic0_unmask, - .set_type = au1x_ic_settype, + .irq_ack = au1x_ic0_ack, + .irq_mask = au1x_ic0_mask, + .irq_mask_ack = au1x_ic0_maskack, + .irq_unmask = au1x_ic0_unmask, + .irq_set_type = au1x_ic_settype, }; static struct irq_chip au1x_ic1_chip = { .name = "Alchemy-IC1", - .ack = au1x_ic1_ack, - .mask = au1x_ic1_mask, - .mask_ack = au1x_ic1_maskack, - .unmask = au1x_ic1_unmask, - .set_type = au1x_ic_settype, - .set_wake = au1x_ic1_setwake, + .irq_ack = au1x_ic1_ack, + .irq_mask = au1x_ic1_mask, + .irq_mask_ack = au1x_ic1_maskack, + .irq_unmask = au1x_ic1_unmask, + .irq_set_type = au1x_ic_settype, + .irq_set_wake = au1x_ic1_setwake, }; -static int au1x_ic_settype(unsigned int irq, unsigned int flow_type) +static int au1x_ic_settype(struct irq_data *d, unsigned int flow_type) { struct irq_chip *chip; unsigned long icr[6]; - unsigned int bit, ic; + unsigned int bit, ic, irq = d->irq; + irq_flow_handler_t handler = NULL; + unsigned char *name = NULL; int ret; if (irq >= AU1000_INTC1_INT_BASE) { @@ -387,47 +389,47 @@ static int au1x_ic_settype(unsigned int irq, unsigned int flow_type) au_writel(1 << bit, icr[5]); au_writel(1 << bit, icr[4]); au_writel(1 << bit, icr[0]); - set_irq_chip_and_handler_name(irq, chip, - handle_edge_irq, "riseedge"); + handler = handle_edge_irq; + name = "riseedge"; break; case IRQ_TYPE_EDGE_FALLING: /* 0:1:0 */ au_writel(1 << bit, icr[5]); au_writel(1 << bit, icr[1]); au_writel(1 << bit, icr[3]); - set_irq_chip_and_handler_name(irq, chip, - handle_edge_irq, "falledge"); + handler = handle_edge_irq; + name = "falledge"; break; case IRQ_TYPE_EDGE_BOTH: /* 0:1:1 */ au_writel(1 << bit, icr[5]); au_writel(1 << bit, icr[1]); au_writel(1 << bit, icr[0]); - set_irq_chip_and_handler_name(irq, chip, - handle_edge_irq, "bothedge"); + handler = handle_edge_irq; + name = "bothedge"; break; case IRQ_TYPE_LEVEL_HIGH: /* 1:0:1 */ au_writel(1 << bit, icr[2]); au_writel(1 << bit, icr[4]); au_writel(1 << bit, icr[0]); - set_irq_chip_and_handler_name(irq, chip, - handle_level_irq, "hilevel"); + handler = handle_level_irq; + name = "hilevel"; break; case IRQ_TYPE_LEVEL_LOW: /* 1:1:0 */ au_writel(1 << bit, icr[2]); au_writel(1 << bit, icr[1]); au_writel(1 << bit, icr[3]); - set_irq_chip_and_handler_name(irq, chip, - handle_level_irq, "lowlevel"); + handler = handle_level_irq; + name = "lowlevel"; break; case IRQ_TYPE_NONE: /* 0:0:0 */ au_writel(1 << bit, icr[5]); au_writel(1 << bit, icr[4]); au_writel(1 << bit, icr[3]); - /* set at least chip so we can call set_irq_type() on it */ - set_irq_chip(irq, chip); break; default: ret = -EINVAL; } + __irq_set_chip_handler_name_locked(d->irq, chip, handler, name); + au_sync(); return ret; @@ -504,11 +506,11 @@ static void __init au1000_init_irq(struct au1xxx_irqmap *map) */ for (i = AU1000_INTC0_INT_BASE; (i < AU1000_INTC0_INT_BASE + 32); i++) - au1x_ic_settype(i, IRQ_TYPE_NONE); + au1x_ic_settype(irq_get_irq_data(i), IRQ_TYPE_NONE); for (i = AU1000_INTC1_INT_BASE; (i < AU1000_INTC1_INT_BASE + 32); i++) - au1x_ic_settype(i, IRQ_TYPE_NONE); + au1x_ic_settype(irq_get_irq_data(i), IRQ_TYPE_NONE); /* * Initialize IC0, which is fixed per processor. @@ -526,7 +528,7 @@ static void __init au1000_init_irq(struct au1xxx_irqmap *map) au_writel(1 << bit, IC0_ASSIGNSET); } - au1x_ic_settype(irq_nr, map->im_type); + au1x_ic_settype(irq_get_irq_data(irq_nr), map->im_type); ++map; } diff --git a/arch/mips/alchemy/devboards/bcsr.c b/arch/mips/alchemy/devboards/bcsr.c index c52af88..f91c43a 100644 --- a/arch/mips/alchemy/devboards/bcsr.c +++ b/arch/mips/alchemy/devboards/bcsr.c @@ -97,26 +97,26 @@ static void bcsr_csc_handler(unsigned int irq, struct irq_desc *d) * CPLD generates tons of spurious interrupts (at least on my DB1200). * -- mlau */ -static void bcsr_irq_mask(unsigned int irq_nr) +static void bcsr_irq_mask(struct irq_data *d) { - unsigned short v = 1 << (irq_nr - bcsr_csc_base); + unsigned short v = 1 << (d->irq - bcsr_csc_base); __raw_writew(v, bcsr_virt + BCSR_REG_INTCLR); __raw_writew(v, bcsr_virt + BCSR_REG_MASKCLR); wmb(); } -static void bcsr_irq_maskack(unsigned int irq_nr) +static void bcsr_irq_maskack(struct irq_data *d) { - unsigned short v = 1 << (irq_nr - bcsr_csc_base); + unsigned short v = 1 << (d->irq - bcsr_csc_base); __raw_writew(v, bcsr_virt + BCSR_REG_INTCLR); __raw_writew(v, bcsr_virt + BCSR_REG_MASKCLR); __raw_writew(v, bcsr_virt + BCSR_REG_INTSTAT); /* ack */ wmb(); } -static void bcsr_irq_unmask(unsigned int irq_nr) +static void bcsr_irq_unmask(struct irq_data *d) { - unsigned short v = 1 << (irq_nr - bcsr_csc_base); + unsigned short v = 1 << (d->irq - bcsr_csc_base); __raw_writew(v, bcsr_virt + BCSR_REG_INTSET); __raw_writew(v, bcsr_virt + BCSR_REG_MASKSET); wmb(); @@ -124,9 +124,9 @@ static void bcsr_irq_unmask(unsigned int irq_nr) static struct irq_chip bcsr_irq_type = { .name = "CPLD", - .mask = bcsr_irq_mask, - .mask_ack = bcsr_irq_maskack, - .unmask = bcsr_irq_unmask, + .irq_mask = bcsr_irq_mask, + .irq_mask_ack = bcsr_irq_maskack, + .irq_unmask = bcsr_irq_unmask, }; void __init bcsr_init_irq(int csc_start, int csc_end, int hook_irq) diff --git a/arch/mips/ar7/irq.c b/arch/mips/ar7/irq.c index 4ec2642..a6484b6 100644 --- a/arch/mips/ar7/irq.c +++ b/arch/mips/ar7/irq.c @@ -49,51 +49,51 @@ static int ar7_irq_base; -static void ar7_unmask_irq(unsigned int irq) +static void ar7_unmask_irq(struct irq_data *d) { - writel(1 << ((irq - ar7_irq_base) % 32), - REG(ESR_OFFSET(irq - ar7_irq_base))); + writel(1 << ((d->irq - ar7_irq_base) % 32), + REG(ESR_OFFSET(d->irq - ar7_irq_base))); } -static void ar7_mask_irq(unsigned int irq) +static void ar7_mask_irq(struct irq_data *d) { - writel(1 << ((irq - ar7_irq_base) % 32), - REG(ECR_OFFSET(irq - ar7_irq_base))); + writel(1 << ((d->irq - ar7_irq_base) % 32), + REG(ECR_OFFSET(d->irq - ar7_irq_base))); } -static void ar7_ack_irq(unsigned int irq) +static void ar7_ack_irq(struct irq_data *d) { - writel(1 << ((irq - ar7_irq_base) % 32), - REG(CR_OFFSET(irq - ar7_irq_base))); + writel(1 << ((d->irq - ar7_irq_base) % 32), + REG(CR_OFFSET(d->irq - ar7_irq_base))); } -static void ar7_unmask_sec_irq(unsigned int irq) +static void ar7_unmask_sec_irq(struct irq_data *d) { - writel(1 << (irq - ar7_irq_base - 40), REG(SEC_ESR_OFFSET)); + writel(1 << (d->irq - ar7_irq_base - 40), REG(SEC_ESR_OFFSET)); } -static void ar7_mask_sec_irq(unsigned int irq) +static void ar7_mask_sec_irq(struct irq_data *d) { - writel(1 << (irq - ar7_irq_base - 40), REG(SEC_ECR_OFFSET)); + writel(1 << (d->irq - ar7_irq_base - 40), REG(SEC_ECR_OFFSET)); } -static void ar7_ack_sec_irq(unsigned int irq) +static void ar7_ack_sec_irq(struct irq_data *d) { - writel(1 << (irq - ar7_irq_base - 40), REG(SEC_CR_OFFSET)); + writel(1 << (d->irq - ar7_irq_base - 40), REG(SEC_CR_OFFSET)); } static struct irq_chip ar7_irq_type = { .name = "AR7", - .unmask = ar7_unmask_irq, - .mask = ar7_mask_irq, - .ack = ar7_ack_irq + .irq_unmask = ar7_unmask_irq, + .irq_mask = ar7_mask_irq, + .irq_ack = ar7_ack_irq }; static struct irq_chip ar7_sec_irq_type = { .name = "AR7", - .unmask = ar7_unmask_sec_irq, - .mask = ar7_mask_sec_irq, - .ack = ar7_ack_sec_irq, + .irq_unmask = ar7_unmask_sec_irq, + .irq_mask = ar7_mask_sec_irq, + .irq_ack = ar7_ack_sec_irq, }; static struct irqaction ar7_cascade_action = { diff --git a/arch/mips/ath79/irq.c b/arch/mips/ath79/irq.c index 1bf7f71..7c02bc9 100644 --- a/arch/mips/ath79/irq.c +++ b/arch/mips/ath79/irq.c @@ -62,13 +62,12 @@ static void ath79_misc_irq_handler(unsigned int irq, struct irq_desc *desc) spurious_interrupt(); } -static void ar71xx_misc_irq_unmask(unsigned int irq) +static void ar71xx_misc_irq_unmask(struct irq_data *d) { + unsigned int irq = d->irq - ATH79_MISC_IRQ_BASE; void __iomem *base = ath79_reset_base; u32 t; - irq -= ATH79_MISC_IRQ_BASE; - t = __raw_readl(base + AR71XX_RESET_REG_MISC_INT_ENABLE); __raw_writel(t | (1 << irq), base + AR71XX_RESET_REG_MISC_INT_ENABLE); @@ -76,13 +75,12 @@ static void ar71xx_misc_irq_unmask(unsigned int irq) __raw_readl(base + AR71XX_RESET_REG_MISC_INT_ENABLE); } -static void ar71xx_misc_irq_mask(unsigned int irq) +static void ar71xx_misc_irq_mask(struct irq_data *d) { + unsigned int irq = d->irq - ATH79_MISC_IRQ_BASE; void __iomem *base = ath79_reset_base; u32 t; - irq -= ATH79_MISC_IRQ_BASE; - t = __raw_readl(base + AR71XX_RESET_REG_MISC_INT_ENABLE); __raw_writel(t & ~(1 << irq), base + AR71XX_RESET_REG_MISC_INT_ENABLE); @@ -90,13 +88,12 @@ static void ar71xx_misc_irq_mask(unsigned int irq) __raw_readl(base + AR71XX_RESET_REG_MISC_INT_ENABLE); } -static void ar724x_misc_irq_ack(unsigned int irq) +static void ar724x_misc_irq_ack(struct irq_data *d) { + unsigned int irq = d->irq - ATH79_MISC_IRQ_BASE; void __iomem *base = ath79_reset_base; u32 t; - irq -= ATH79_MISC_IRQ_BASE; - t = __raw_readl(base + AR71XX_RESET_REG_MISC_INT_STATUS); __raw_writel(t & ~(1 << irq), base + AR71XX_RESET_REG_MISC_INT_STATUS); @@ -106,8 +103,8 @@ static void ar724x_misc_irq_ack(unsigned int irq) static struct irq_chip ath79_misc_irq_chip = { .name = "MISC", - .unmask = ar71xx_misc_irq_unmask, - .mask = ar71xx_misc_irq_mask, + .irq_unmask = ar71xx_misc_irq_unmask, + .irq_mask = ar71xx_misc_irq_mask, }; static void __init ath79_misc_irq_init(void) @@ -119,15 +116,14 @@ static void __init ath79_misc_irq_init(void) __raw_writel(0, base + AR71XX_RESET_REG_MISC_INT_STATUS); if (soc_is_ar71xx() || soc_is_ar913x()) - ath79_misc_irq_chip.mask_ack = ar71xx_misc_irq_mask; + ath79_misc_irq_chip.irq_mask_ack = ar71xx_misc_irq_mask; else if (soc_is_ar724x()) - ath79_misc_irq_chip.ack = ar724x_misc_irq_ack; + ath79_misc_irq_chip.irq_ack = ar724x_misc_irq_ack; else BUG(); for (i = ATH79_MISC_IRQ_BASE; i < ATH79_MISC_IRQ_BASE + ATH79_MISC_IRQ_COUNT; i++) { - irq_desc[i].status = IRQ_DISABLED; set_irq_chip_and_handler(i, &ath79_misc_irq_chip, handle_level_irq); } diff --git a/arch/mips/bcm63xx/boards/Makefile b/arch/mips/bcm63xx/boards/Makefile index e5cc86d..9f64fb4 100644 --- a/arch/mips/bcm63xx/boards/Makefile +++ b/arch/mips/bcm63xx/boards/Makefile @@ -1,3 +1,3 @@ obj-$(CONFIG_BOARD_BCM963XX) += board_bcm963xx.o -EXTRA_CFLAGS += -Werror +ccflags-y := -Werror diff --git a/arch/mips/bcm63xx/irq.c b/arch/mips/bcm63xx/irq.c index 3be87f2..1691531 100644 --- a/arch/mips/bcm63xx/irq.c +++ b/arch/mips/bcm63xx/irq.c @@ -76,88 +76,80 @@ asmlinkage void plat_irq_dispatch(void) * internal IRQs operations: only mask/unmask on PERF irq mask * register. */ -static inline void bcm63xx_internal_irq_mask(unsigned int irq) +static inline void bcm63xx_internal_irq_mask(struct irq_data *d) { + unsigned int irq = d->irq - IRQ_INTERNAL_BASE; u32 mask; - irq -= IRQ_INTERNAL_BASE; mask = bcm_perf_readl(PERF_IRQMASK_REG); mask &= ~(1 << irq); bcm_perf_writel(mask, PERF_IRQMASK_REG); } -static void bcm63xx_internal_irq_unmask(unsigned int irq) +static void bcm63xx_internal_irq_unmask(struct irq_data *d) { + unsigned int irq = d->irq - IRQ_INTERNAL_BASE; u32 mask; - irq -= IRQ_INTERNAL_BASE; mask = bcm_perf_readl(PERF_IRQMASK_REG); mask |= (1 << irq); bcm_perf_writel(mask, PERF_IRQMASK_REG); } -static unsigned int bcm63xx_internal_irq_startup(unsigned int irq) -{ - bcm63xx_internal_irq_unmask(irq); - return 0; -} - /* * external IRQs operations: mask/unmask and clear on PERF external * irq control register. */ -static void bcm63xx_external_irq_mask(unsigned int irq) +static void bcm63xx_external_irq_mask(struct irq_data *d) { + unsigned int irq = d->irq - IRQ_EXT_BASE; u32 reg; - irq -= IRQ_EXT_BASE; reg = bcm_perf_readl(PERF_EXTIRQ_CFG_REG); reg &= ~EXTIRQ_CFG_MASK(irq); bcm_perf_writel(reg, PERF_EXTIRQ_CFG_REG); } -static void bcm63xx_external_irq_unmask(unsigned int irq) +static void bcm63xx_external_irq_unmask(struct irq_data *d) { + unsigned int irq = d->irq - IRQ_EXT_BASE; u32 reg; - irq -= IRQ_EXT_BASE; reg = bcm_perf_readl(PERF_EXTIRQ_CFG_REG); reg |= EXTIRQ_CFG_MASK(irq); bcm_perf_writel(reg, PERF_EXTIRQ_CFG_REG); } -static void bcm63xx_external_irq_clear(unsigned int irq) +static void bcm63xx_external_irq_clear(struct irq_data *d) { + unsigned int irq = d->irq - IRQ_EXT_BASE; u32 reg; - irq -= IRQ_EXT_BASE; reg = bcm_perf_readl(PERF_EXTIRQ_CFG_REG); reg |= EXTIRQ_CFG_CLEAR(irq); bcm_perf_writel(reg, PERF_EXTIRQ_CFG_REG); } -static unsigned int bcm63xx_external_irq_startup(unsigned int irq) +static unsigned int bcm63xx_external_irq_startup(struct irq_data *d) { - set_c0_status(0x100 << (irq - IRQ_MIPS_BASE)); + set_c0_status(0x100 << (d->irq - IRQ_MIPS_BASE)); irq_enable_hazard(); - bcm63xx_external_irq_unmask(irq); + bcm63xx_external_irq_unmask(d); return 0; } -static void bcm63xx_external_irq_shutdown(unsigned int irq) +static void bcm63xx_external_irq_shutdown(struct irq_data *d) { - bcm63xx_external_irq_mask(irq); - clear_c0_status(0x100 << (irq - IRQ_MIPS_BASE)); + bcm63xx_external_irq_mask(d); + clear_c0_status(0x100 << (d->irq - IRQ_MIPS_BASE)); irq_disable_hazard(); } -static int bcm63xx_external_irq_set_type(unsigned int irq, +static int bcm63xx_external_irq_set_type(struct irq_data *d, unsigned int flow_type) { + unsigned int irq = d->irq - IRQ_EXT_BASE; u32 reg; - struct irq_desc *desc = irq_desc + irq; - - irq -= IRQ_EXT_BASE; flow_type &= IRQ_TYPE_SENSE_MASK; @@ -199,37 +191,32 @@ static int bcm63xx_external_irq_set_type(unsigned int irq, } bcm_perf_writel(reg, PERF_EXTIRQ_CFG_REG); - if (flow_type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH)) { - desc->status |= IRQ_LEVEL; - desc->handle_irq = handle_level_irq; - } else { - desc->handle_irq = handle_edge_irq; - } + irqd_set_trigger_type(d, flow_type); + if (flow_type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH)) + __irq_set_handler_locked(d->irq, handle_level_irq); + else + __irq_set_handler_locked(d->irq, handle_edge_irq); - return 0; + return IRQ_SET_MASK_OK_NOCOPY; } static struct irq_chip bcm63xx_internal_irq_chip = { .name = "bcm63xx_ipic", - .startup = bcm63xx_internal_irq_startup, - .shutdown = bcm63xx_internal_irq_mask, - - .mask = bcm63xx_internal_irq_mask, - .mask_ack = bcm63xx_internal_irq_mask, - .unmask = bcm63xx_internal_irq_unmask, + .irq_mask = bcm63xx_internal_irq_mask, + .irq_unmask = bcm63xx_internal_irq_unmask, }; static struct irq_chip bcm63xx_external_irq_chip = { .name = "bcm63xx_epic", - .startup = bcm63xx_external_irq_startup, - .shutdown = bcm63xx_external_irq_shutdown, + .irq_startup = bcm63xx_external_irq_startup, + .irq_shutdown = bcm63xx_external_irq_shutdown, - .ack = bcm63xx_external_irq_clear, + .irq_ack = bcm63xx_external_irq_clear, - .mask = bcm63xx_external_irq_mask, - .unmask = bcm63xx_external_irq_unmask, + .irq_mask = bcm63xx_external_irq_mask, + .irq_unmask = bcm63xx_external_irq_unmask, - .set_type = bcm63xx_external_irq_set_type, + .irq_set_type = bcm63xx_external_irq_set_type, }; static struct irqaction cpu_ip2_cascade_action = { diff --git a/arch/mips/dec/ioasic-irq.c b/arch/mips/dec/ioasic-irq.c index cb41954..8d9a5fc 100644 --- a/arch/mips/dec/ioasic-irq.c +++ b/arch/mips/dec/ioasic-irq.c @@ -17,80 +17,48 @@ #include <asm/dec/ioasic_addrs.h> #include <asm/dec/ioasic_ints.h> - static int ioasic_irq_base; - -static inline void unmask_ioasic_irq(unsigned int irq) +static void unmask_ioasic_irq(struct irq_data *d) { u32 simr; simr = ioasic_read(IO_REG_SIMR); - simr |= (1 << (irq - ioasic_irq_base)); + simr |= (1 << (d->irq - ioasic_irq_base)); ioasic_write(IO_REG_SIMR, simr); } -static inline void mask_ioasic_irq(unsigned int irq) +static void mask_ioasic_irq(struct irq_data *d) { u32 simr; simr = ioasic_read(IO_REG_SIMR); - simr &= ~(1 << (irq - ioasic_irq_base)); + simr &= ~(1 << (d->irq - ioasic_irq_base)); ioasic_write(IO_REG_SIMR, simr); } -static inline void clear_ioasic_irq(unsigned int irq) +static void ack_ioasic_irq(struct irq_data *d) { - u32 sir; - - sir = ~(1 << (irq - ioasic_irq_base)); - ioasic_write(IO_REG_SIR, sir); -} - -static inline void ack_ioasic_irq(unsigned int irq) -{ - mask_ioasic_irq(irq); + mask_ioasic_irq(d); fast_iob(); } -static inline void end_ioasic_irq(unsigned int irq) -{ - if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) - unmask_ioasic_irq(irq); -} - static struct irq_chip ioasic_irq_type = { .name = "IO-ASIC", - .ack = ack_ioasic_irq, - .mask = mask_ioasic_irq, - .mask_ack = ack_ioasic_irq, - .unmask = unmask_ioasic_irq, + .irq_ack = ack_ioasic_irq, + .irq_mask = mask_ioasic_irq, + .irq_mask_ack = ack_ioasic_irq, + .irq_unmask = unmask_ioasic_irq, }; - -#define unmask_ioasic_dma_irq unmask_ioasic_irq - -#define mask_ioasic_dma_irq mask_ioasic_irq - -#define ack_ioasic_dma_irq ack_ioasic_irq - -static inline void end_ioasic_dma_irq(unsigned int irq) -{ - clear_ioasic_irq(irq); - fast_iob(); - end_ioasic_irq(irq); -} - static struct irq_chip ioasic_dma_irq_type = { .name = "IO-ASIC-DMA", - .ack = ack_ioasic_dma_irq, - .mask = mask_ioasic_dma_irq, - .mask_ack = ack_ioasic_dma_irq, - .unmask = unmask_ioasic_dma_irq, - .end = end_ioasic_dma_irq, + .irq_ack = ack_ioasic_irq, + .irq_mask = mask_ioasic_irq, + .irq_mask_ack = ack_ioasic_irq, + .irq_unmask = unmask_ioasic_irq, }; - void __init init_ioasic_irqs(int base) { int i; diff --git a/arch/mips/dec/kn02-irq.c b/arch/mips/dec/kn02-irq.c index ed90a8d..ef31d98 100644 --- a/arch/mips/dec/kn02-irq.c +++ b/arch/mips/dec/kn02-irq.c @@ -27,43 +27,40 @@ */ u32 cached_kn02_csr; - static int kn02_irq_base; - -static inline void unmask_kn02_irq(unsigned int irq) +static void unmask_kn02_irq(struct irq_data *d) { volatile u32 *csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE + KN02_CSR); - cached_kn02_csr |= (1 << (irq - kn02_irq_base + 16)); + cached_kn02_csr |= (1 << (d->irq - kn02_irq_base + 16)); *csr = cached_kn02_csr; } -static inline void mask_kn02_irq(unsigned int irq) +static void mask_kn02_irq(struct irq_data *d) { volatile u32 *csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE + KN02_CSR); - cached_kn02_csr &= ~(1 << (irq - kn02_irq_base + 16)); + cached_kn02_csr &= ~(1 << (d->irq - kn02_irq_base + 16)); *csr = cached_kn02_csr; } -static void ack_kn02_irq(unsigned int irq) +static void ack_kn02_irq(struct irq_data *d) { - mask_kn02_irq(irq); + mask_kn02_irq(d); iob(); } static struct irq_chip kn02_irq_type = { .name = "KN02-CSR", - .ack = ack_kn02_irq, - .mask = mask_kn02_irq, - .mask_ack = ack_kn02_irq, - .unmask = unmask_kn02_irq, + .irq_ack = ack_kn02_irq, + .irq_mask = mask_kn02_irq, + .irq_mask_ack = ack_kn02_irq, + .irq_unmask = unmask_kn02_irq, }; - void __init init_kn02_irqs(int base) { volatile u32 *csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE + diff --git a/arch/mips/emma/markeins/irq.c b/arch/mips/emma/markeins/irq.c index 3a96799..9b1207a 100644 --- a/arch/mips/emma/markeins/irq.c +++ b/arch/mips/emma/markeins/irq.c @@ -34,13 +34,10 @@ #include <asm/emma/emma2rh.h> -static void emma2rh_irq_enable(unsigned int irq) +static void emma2rh_irq_enable(struct irq_data *d) { - u32 reg_value; - u32 reg_bitmask; - u32 reg_index; - - irq -= EMMA2RH_IRQ_BASE; + unsigned int irq = d->irq - EMMA2RH_IRQ_BASE; + u32 reg_value, reg_bitmask, reg_index; reg_index = EMMA2RH_BHIF_INT_EN_0 + (EMMA2RH_BHIF_INT_EN_1 - EMMA2RH_BHIF_INT_EN_0) * (irq / 32); @@ -49,13 +46,10 @@ static void emma2rh_irq_enable(unsigned int irq) emma2rh_out32(reg_index, reg_value | reg_bitmask); } -static void emma2rh_irq_disable(unsigned int irq) +static void emma2rh_irq_disable(struct irq_data *d) { - u32 reg_value; - u32 reg_bitmask; - u32 reg_index; - - irq -= EMMA2RH_IRQ_BASE; + unsigned int irq = d->irq - EMMA2RH_IRQ_BASE; + u32 reg_value, reg_bitmask, reg_index; reg_index = EMMA2RH_BHIF_INT_EN_0 + (EMMA2RH_BHIF_INT_EN_1 - EMMA2RH_BHIF_INT_EN_0) * (irq / 32); @@ -66,10 +60,8 @@ static void emma2rh_irq_disable(unsigned int irq) struct irq_chip emma2rh_irq_controller = { .name = "emma2rh_irq", - .ack = emma2rh_irq_disable, - .mask = emma2rh_irq_disable, - .mask_ack = emma2rh_irq_disable, - .unmask = emma2rh_irq_enable, + .irq_mask = emma2rh_irq_disable, + .irq_unmask = emma2rh_irq_enable, }; void emma2rh_irq_init(void) @@ -82,23 +74,21 @@ void emma2rh_irq_init(void) handle_level_irq, "level"); } -static void emma2rh_sw_irq_enable(unsigned int irq) +static void emma2rh_sw_irq_enable(struct irq_data *d) { + unsigned int irq = d->irq - EMMA2RH_SW_IRQ_BASE; u32 reg; - irq -= EMMA2RH_SW_IRQ_BASE; - reg = emma2rh_in32(EMMA2RH_BHIF_SW_INT_EN); reg |= 1 << irq; emma2rh_out32(EMMA2RH_BHIF_SW_INT_EN, reg); } -static void emma2rh_sw_irq_disable(unsigned int irq) +static void emma2rh_sw_irq_disable(struct irq_data *d) { + unsigned int irq = d->irq - EMMA2RH_SW_IRQ_BASE; u32 reg; - irq -= EMMA2RH_SW_IRQ_BASE; - reg = emma2rh_in32(EMMA2RH_BHIF_SW_INT_EN); reg &= ~(1 << irq); emma2rh_out32(EMMA2RH_BHIF_SW_INT_EN, reg); @@ -106,10 +96,8 @@ static void emma2rh_sw_irq_disable(unsigned int irq) struct irq_chip emma2rh_sw_irq_controller = { .name = "emma2rh_sw_irq", - .ack = emma2rh_sw_irq_disable, - .mask = emma2rh_sw_irq_disable, - .mask_ack = emma2rh_sw_irq_disable, - .unmask = emma2rh_sw_irq_enable, + .irq_mask = emma2rh_sw_irq_disable, + .irq_unmask = emma2rh_sw_irq_enable, }; void emma2rh_sw_irq_init(void) @@ -122,39 +110,38 @@ void emma2rh_sw_irq_init(void) handle_level_irq, "level"); } -static void emma2rh_gpio_irq_enable(unsigned int irq) +static void emma2rh_gpio_irq_enable(struct irq_data *d) { + unsigned int irq = d->irq - EMMA2RH_GPIO_IRQ_BASE; u32 reg; - irq -= EMMA2RH_GPIO_IRQ_BASE; - reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK); reg |= 1 << irq; emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg); } -static void emma2rh_gpio_irq_disable(unsigned int irq) +static void emma2rh_gpio_irq_disable(struct irq_data *d) { + unsigned int irq = d->irq - EMMA2RH_GPIO_IRQ_BASE; u32 reg; - irq -= EMMA2RH_GPIO_IRQ_BASE; - reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK); reg &= ~(1 << irq); emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg); } -static void emma2rh_gpio_irq_ack(unsigned int irq) +static void emma2rh_gpio_irq_ack(struct irq_data *d) { - irq -= EMMA2RH_GPIO_IRQ_BASE; + unsigned int irq = d->irq - EMMA2RH_GPIO_IRQ_BASE; + emma2rh_out32(EMMA2RH_GPIO_INT_ST, ~(1 << irq)); } -static void emma2rh_gpio_irq_mask_ack(unsigned int irq) +static void emma2rh_gpio_irq_mask_ack(struct irq_data *d) { + unsigned int irq = d->irq - EMMA2RH_GPIO_IRQ_BASE; u32 reg; - irq -= EMMA2RH_GPIO_IRQ_BASE; emma2rh_out32(EMMA2RH_GPIO_INT_ST, ~(1 << irq)); reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK); @@ -164,10 +151,10 @@ static void emma2rh_gpio_irq_mask_ack(unsigned int irq) struct irq_chip emma2rh_gpio_irq_controller = { .name = "emma2rh_gpio_irq", - .ack = emma2rh_gpio_irq_ack, - .mask = emma2rh_gpio_irq_disable, - .mask_ack = emma2rh_gpio_irq_mask_ack, - .unmask = emma2rh_gpio_irq_enable, + .irq_ack = emma2rh_gpio_irq_ack, + .irq_mask = emma2rh_gpio_irq_disable, + .irq_mask_ack = emma2rh_gpio_irq_mask_ack, + .irq_unmask = emma2rh_gpio_irq_enable, }; void emma2rh_gpio_irq_init(void) diff --git a/arch/mips/fw/arc/Makefile b/arch/mips/fw/arc/Makefile index e0aaad4..5314b37 100644 --- a/arch/mips/fw/arc/Makefile +++ b/arch/mips/fw/arc/Makefile @@ -9,4 +9,4 @@ lib-$(CONFIG_ARC_MEMORY) += memory.o lib-$(CONFIG_ARC_CONSOLE) += arc_con.o lib-$(CONFIG_ARC_PROMLIB) += promlib.o -EXTRA_CFLAGS += -Werror +ccflags-y := -Werror diff --git a/arch/mips/include/asm/bitops.h b/arch/mips/include/asm/bitops.h index 50b4ef2..2e1ad4c 100644 --- a/arch/mips/include/asm/bitops.h +++ b/arch/mips/include/asm/bitops.h @@ -676,9 +676,8 @@ static inline int ffs(int word) #include <asm/arch_hweight.h> #include <asm-generic/bitops/const_hweight.h> -#include <asm-generic/bitops/ext2-non-atomic.h> +#include <asm-generic/bitops/le.h> #include <asm-generic/bitops/ext2-atomic.h> -#include <asm-generic/bitops/minix.h> #endif /* __KERNEL__ */ diff --git a/arch/mips/include/asm/irq.h b/arch/mips/include/asm/irq.h index b003ed5..0ec0129 100644 --- a/arch/mips/include/asm/irq.h +++ b/arch/mips/include/asm/irq.h @@ -55,9 +55,9 @@ static inline void smtc_im_ack_irq(unsigned int irq) #ifdef CONFIG_MIPS_MT_SMTC_IRQAFF #include <linux/cpumask.h> -extern int plat_set_irq_affinity(unsigned int irq, - const struct cpumask *affinity); -extern void smtc_forward_irq(unsigned int irq); +extern int plat_set_irq_affinity(struct irq_data *d, + const struct cpumask *affinity, bool force); +extern void smtc_forward_irq(struct irq_data *d); /* * IRQ affinity hook invoked at the beginning of interrupt dispatch @@ -70,51 +70,53 @@ extern void smtc_forward_irq(unsigned int irq); * cpumask implementations, this version is optimistically assuming * that cpumask.h macro overhead is reasonable during interrupt dispatch. */ -#define IRQ_AFFINITY_HOOK(irq) \ -do { \ - if (!cpumask_test_cpu(smp_processor_id(), irq_desc[irq].affinity)) {\ - smtc_forward_irq(irq); \ - irq_exit(); \ - return; \ - } \ -} while (0) +static inline int handle_on_other_cpu(unsigned int irq) +{ + struct irq_data *d = irq_get_irq_data(irq); + + if (cpumask_test_cpu(smp_processor_id(), d->affinity)) + return 0; + smtc_forward_irq(d); + return 1; +} #else /* Not doing SMTC affinity */ -#define IRQ_AFFINITY_HOOK(irq) do { } while (0) +static inline int handle_on_other_cpu(unsigned int irq) { return 0; } #endif /* CONFIG_MIPS_MT_SMTC_IRQAFF */ #ifdef CONFIG_MIPS_MT_SMTC_IM_BACKSTOP +static inline void smtc_im_backstop(unsigned int irq) +{ + if (irq_hwmask[irq] & 0x0000ff00) + write_c0_tccontext(read_c0_tccontext() & + ~(irq_hwmask[irq] & 0x0000ff00)); +} + /* * Clear interrupt mask handling "backstop" if irq_hwmask * entry so indicates. This implies that the ack() or end() * functions will take over re-enabling the low-level mask. * Otherwise it will be done on return from exception. */ -#define __DO_IRQ_SMTC_HOOK(irq) \ -do { \ - IRQ_AFFINITY_HOOK(irq); \ - if (irq_hwmask[irq] & 0x0000ff00) \ - write_c0_tccontext(read_c0_tccontext() & \ - ~(irq_hwmask[irq] & 0x0000ff00)); \ -} while (0) - -#define __NO_AFFINITY_IRQ_SMTC_HOOK(irq) \ -do { \ - if (irq_hwmask[irq] & 0x0000ff00) \ - write_c0_tccontext(read_c0_tccontext() & \ - ~(irq_hwmask[irq] & 0x0000ff00)); \ -} while (0) +static inline int smtc_handle_on_other_cpu(unsigned int irq) +{ + int ret = handle_on_other_cpu(irq); + + if (!ret) + smtc_im_backstop(irq); + return ret; +} #else -#define __DO_IRQ_SMTC_HOOK(irq) \ -do { \ - IRQ_AFFINITY_HOOK(irq); \ -} while (0) -#define __NO_AFFINITY_IRQ_SMTC_HOOK(irq) do { } while (0) +static inline void smtc_im_backstop(unsigned int irq) { } +static inline int smtc_handle_on_other_cpu(unsigned int irq) +{ + return handle_on_other_cpu(irq); +} #endif diff --git a/arch/mips/include/asm/pmc-sierra/msp71xx/cpu-feature-overrides.h b/arch/mips/include/asm/pmc-sierra/msp71xx/cpu-feature-overrides.h new file mode 100644 index 0000000..a80801b --- /dev/null +++ b/arch/mips/include/asm/pmc-sierra/msp71xx/cpu-feature-overrides.h @@ -0,0 +1,21 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 2003, 04, 07 Ralf Baechle (ralf@linux-mips.org) + */ +#ifndef __ASM_MACH_MSP71XX_CPU_FEATURE_OVERRIDES_H +#define __ASM_MACH_MSP71XX_CPU_FEATURE_OVERRIDES_H + +#define cpu_has_mips16 1 +#define cpu_has_dsp 1 +#define cpu_has_mipsmt 1 +#define cpu_has_fpu 0 + +#define cpu_has_mips32r1 0 +#define cpu_has_mips32r2 1 +#define cpu_has_mips64r1 0 +#define cpu_has_mips64r2 0 + +#endif /* __ASM_MACH_MSP71XX_CPU_FEATURE_OVERRIDES_H */ diff --git a/arch/mips/include/asm/pmc-sierra/msp71xx/msp_gpio_macros.h b/arch/mips/include/asm/pmc-sierra/msp71xx/msp_gpio_macros.h new file mode 100644 index 0000000..156f320 --- /dev/null +++ b/arch/mips/include/asm/pmc-sierra/msp71xx/msp_gpio_macros.h @@ -0,0 +1,343 @@ +/* + * + * Macros for external SMP-safe access to the PMC MSP71xx reference + * board GPIO pins + * + * Copyright 2010 PMC-Sierra, Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#ifndef __MSP_GPIO_MACROS_H__ +#define __MSP_GPIO_MACROS_H__ + +#include <msp_regops.h> +#include <msp_regs.h> + +#ifdef CONFIG_PMC_MSP7120_GW +#define MSP_NUM_GPIOS 20 +#else +#define MSP_NUM_GPIOS 28 +#endif + +/* -- GPIO Enumerations -- */ +enum msp_gpio_data { + MSP_GPIO_LO = 0, + MSP_GPIO_HI = 1, + MSP_GPIO_NONE, /* Special - Means pin is out of range */ + MSP_GPIO_TOGGLE, /* Special - Sets pin to opposite */ +}; + +enum msp_gpio_mode { + MSP_GPIO_INPUT = 0x0, + /* MSP_GPIO_ INTERRUPT = 0x1, Not supported yet */ + MSP_GPIO_UART_INPUT = 0x2, /* Only GPIO 4 or 5 */ + MSP_GPIO_OUTPUT = 0x8, + MSP_GPIO_UART_OUTPUT = 0x9, /* Only GPIO 2 or 3 */ + MSP_GPIO_PERIF_TIMERA = 0x9, /* Only GPIO 0 or 1 */ + MSP_GPIO_PERIF_TIMERB = 0xa, /* Only GPIO 0 or 1 */ + MSP_GPIO_UNKNOWN = 0xb, /* No such GPIO or mode */ +}; + +/* -- Static Tables -- */ + +/* Maps pins to data register */ +static volatile u32 * const MSP_GPIO_DATA_REGISTER[] = { + /* GPIO 0 and 1 on the first register */ + GPIO_DATA1_REG, GPIO_DATA1_REG, + /* GPIO 2, 3, 4, and 5 on the second register */ + GPIO_DATA2_REG, GPIO_DATA2_REG, GPIO_DATA2_REG, GPIO_DATA2_REG, + /* GPIO 6, 7, 8, and 9 on the third register */ + GPIO_DATA3_REG, GPIO_DATA3_REG, GPIO_DATA3_REG, GPIO_DATA3_REG, + /* GPIO 10, 11, 12, 13, 14, and 15 on the fourth register */ + GPIO_DATA4_REG, GPIO_DATA4_REG, GPIO_DATA4_REG, GPIO_DATA4_REG, + GPIO_DATA4_REG, GPIO_DATA4_REG, + /* GPIO 16 - 23 on the first strange EXTENDED register */ + EXTENDED_GPIO1_REG, EXTENDED_GPIO1_REG, EXTENDED_GPIO1_REG, + EXTENDED_GPIO1_REG, EXTENDED_GPIO1_REG, EXTENDED_GPIO1_REG, + EXTENDED_GPIO1_REG, EXTENDED_GPIO1_REG, + /* GPIO 24 - 27 on the second strange EXTENDED register */ + EXTENDED_GPIO2_REG, EXTENDED_GPIO2_REG, EXTENDED_GPIO2_REG, + EXTENDED_GPIO2_REG, +}; + +/* Maps pins to mode register */ +static volatile u32 * const MSP_GPIO_MODE_REGISTER[] = { + /* GPIO 0 and 1 on the first register */ + GPIO_CFG1_REG, GPIO_CFG1_REG, + /* GPIO 2, 3, 4, and 5 on the second register */ + GPIO_CFG2_REG, GPIO_CFG2_REG, GPIO_CFG2_REG, GPIO_CFG2_REG, + /* GPIO 6, 7, 8, and 9 on the third register */ + GPIO_CFG3_REG, GPIO_CFG3_REG, GPIO_CFG3_REG, GPIO_CFG3_REG, + /* GPIO 10, 11, 12, 13, 14, and 15 on the fourth register */ + GPIO_CFG4_REG, GPIO_CFG4_REG, GPIO_CFG4_REG, GPIO_CFG4_REG, + GPIO_CFG4_REG, GPIO_CFG4_REG, + /* GPIO 16 - 23 on the first strange EXTENDED register */ + EXTENDED_GPIO1_REG, EXTENDED_GPIO1_REG, EXTENDED_GPIO1_REG, + EXTENDED_GPIO1_REG, EXTENDED_GPIO1_REG, EXTENDED_GPIO1_REG, + EXTENDED_GPIO1_REG, EXTENDED_GPIO1_REG, + /* GPIO 24 - 27 on the second strange EXTENDED register */ + EXTENDED_GPIO2_REG, EXTENDED_GPIO2_REG, EXTENDED_GPIO2_REG, + EXTENDED_GPIO2_REG, +}; + +/* Maps 'basic' pins to relative offset from 0 per register */ +static int MSP_GPIO_OFFSET[] = { + /* GPIO 0 and 1 on the first register */ + 0, 0, + /* GPIO 2, 3, 4, and 5 on the second register */ + 2, 2, 2, 2, + /* GPIO 6, 7, 8, and 9 on the third register */ + 6, 6, 6, 6, + /* GPIO 10, 11, 12, 13, 14, and 15 on the fourth register */ + 10, 10, 10, 10, 10, 10, +}; + +/* Maps MODE to allowed pin mask */ +static unsigned int MSP_GPIO_MODE_ALLOWED[] = { + 0xffffffff, /* Mode 0 - INPUT */ + 0x00000, /* Mode 1 - INTERRUPT */ + 0x00030, /* Mode 2 - UART_INPUT (GPIO 4, 5)*/ + 0, 0, 0, 0, 0, /* Modes 3, 4, 5, 6, and 7 are reserved */ + 0xffffffff, /* Mode 8 - OUTPUT */ + 0x0000f, /* Mode 9 - UART_OUTPUT/ + PERF_TIMERA (GPIO 0, 1, 2, 3) */ + 0x00003, /* Mode a - PERF_TIMERB (GPIO 0, 1) */ + 0x00000, /* Mode b - Not really a mode! */ +}; + +/* -- Bit masks -- */ + +/* This gives you the 'register relative offset gpio' number */ +#define OFFSET_GPIO_NUMBER(gpio) (gpio - MSP_GPIO_OFFSET[gpio]) + +/* These take the 'register relative offset gpio' number */ +#define BASIC_DATA_REG_MASK(ogpio) (1 << ogpio) +#define BASIC_MODE_REG_VALUE(mode, ogpio) \ + (mode << BASIC_MODE_REG_SHIFT(ogpio)) +#define BASIC_MODE_REG_MASK(ogpio) \ + BASIC_MODE_REG_VALUE(0xf, ogpio) +#define BASIC_MODE_REG_SHIFT(ogpio) (ogpio * 4) +#define BASIC_MODE_REG_FROM_REG(data, ogpio) \ + ((data & BASIC_MODE_REG_MASK(ogpio)) >> BASIC_MODE_REG_SHIFT(ogpio)) + +/* These take the actual GPIO number (0 through 15) */ +#define BASIC_DATA_MASK(gpio) \ + BASIC_DATA_REG_MASK(OFFSET_GPIO_NUMBER(gpio)) +#define BASIC_MODE_MASK(gpio) \ + BASIC_MODE_REG_MASK(OFFSET_GPIO_NUMBER(gpio)) +#define BASIC_MODE(mode, gpio) \ + BASIC_MODE_REG_VALUE(mode, OFFSET_GPIO_NUMBER(gpio)) +#define BASIC_MODE_SHIFT(gpio) \ + BASIC_MODE_REG_SHIFT(OFFSET_GPIO_NUMBER(gpio)) +#define BASIC_MODE_FROM_REG(data, gpio) \ + BASIC_MODE_REG_FROM_REG(data, OFFSET_GPIO_NUMBER(gpio)) + +/* + * Each extended GPIO register is 32 bits long and is responsible for up to + * eight GPIOs. The least significant 16 bits contain the set and clear bit + * pair for each of the GPIOs. The most significant 16 bits contain the + * disable and enable bit pair for each of the GPIOs. For example, the + * extended GPIO reg for GPIOs 16-23 is as follows: + * + * 31: GPIO23_DISABLE + * ... + * 19: GPIO17_DISABLE + * 18: GPIO17_ENABLE + * 17: GPIO16_DISABLE + * 16: GPIO16_ENABLE + * ... + * 3: GPIO17_SET + * 2: GPIO17_CLEAR + * 1: GPIO16_SET + * 0: GPIO16_CLEAR + */ + +/* This gives the 'register relative offset gpio' number */ +#define EXTENDED_OFFSET_GPIO(gpio) (gpio < 24 ? gpio - 16 : gpio - 24) + +/* These take the 'register relative offset gpio' number */ +#define EXTENDED_REG_DISABLE(ogpio) (0x2 << ((ogpio * 2) + 16)) +#define EXTENDED_REG_ENABLE(ogpio) (0x1 << ((ogpio * 2) + 16)) +#define EXTENDED_REG_SET(ogpio) (0x2 << (ogpio * 2)) +#define EXTENDED_REG_CLR(ogpio) (0x1 << (ogpio * 2)) + +/* These take the actual GPIO number (16 through 27) */ +#define EXTENDED_DISABLE(gpio) \ + EXTENDED_REG_DISABLE(EXTENDED_OFFSET_GPIO(gpio)) +#define EXTENDED_ENABLE(gpio) \ + EXTENDED_REG_ENABLE(EXTENDED_OFFSET_GPIO(gpio)) +#define EXTENDED_SET(gpio) \ + EXTENDED_REG_SET(EXTENDED_OFFSET_GPIO(gpio)) +#define EXTENDED_CLR(gpio) \ + EXTENDED_REG_CLR(EXTENDED_OFFSET_GPIO(gpio)) + +#define EXTENDED_FULL_MASK (0xffffffff) + +/* -- API inline-functions -- */ + +/* + * Gets the current value of the specified pin + */ +static inline enum msp_gpio_data msp_gpio_pin_get(unsigned int gpio) +{ + u32 pinhi_mask = 0, pinhi_mask2 = 0; + + if (gpio >= MSP_NUM_GPIOS) + return MSP_GPIO_NONE; + + if (gpio < 16) { + pinhi_mask = BASIC_DATA_MASK(gpio); + } else { + /* + * Two cases are possible with the EXTENDED register: + * - In output mode (ENABLED flag set), check the CLR bit + * - In input mode (ENABLED flag not set), check the SET bit + */ + pinhi_mask = EXTENDED_ENABLE(gpio) | EXTENDED_CLR(gpio); + pinhi_mask2 = EXTENDED_SET(gpio); + } + if (((*MSP_GPIO_DATA_REGISTER[gpio] & pinhi_mask) == pinhi_mask) || + (*MSP_GPIO_DATA_REGISTER[gpio] & pinhi_mask2)) + return MSP_GPIO_HI; + else + return MSP_GPIO_LO; +} + +/* Sets the specified pin to the specified value */ +static inline void msp_gpio_pin_set(enum msp_gpio_data data, unsigned int gpio) +{ + if (gpio >= MSP_NUM_GPIOS) + return; + + if (gpio < 16) { + if (data == MSP_GPIO_TOGGLE) + toggle_reg32(MSP_GPIO_DATA_REGISTER[gpio], + BASIC_DATA_MASK(gpio)); + else if (data == MSP_GPIO_HI) + set_reg32(MSP_GPIO_DATA_REGISTER[gpio], + BASIC_DATA_MASK(gpio)); + else + clear_reg32(MSP_GPIO_DATA_REGISTER[gpio], + BASIC_DATA_MASK(gpio)); + } else { + if (data == MSP_GPIO_TOGGLE) { + /* Special ugly case: + * We have to read the CLR bit. + * If set, we write the CLR bit. + * If not, we write the SET bit. + */ + u32 tmpdata; + + custom_read_reg32(MSP_GPIO_DATA_REGISTER[gpio], + tmpdata); + if (tmpdata & EXTENDED_CLR(gpio)) + tmpdata = EXTENDED_CLR(gpio); + else + tmpdata = EXTENDED_SET(gpio); + custom_write_reg32(MSP_GPIO_DATA_REGISTER[gpio], + tmpdata); + } else { + u32 newdata; + + if (data == MSP_GPIO_HI) + newdata = EXTENDED_SET(gpio); + else + newdata = EXTENDED_CLR(gpio); + set_value_reg32(MSP_GPIO_DATA_REGISTER[gpio], + EXTENDED_FULL_MASK, newdata); + } + } +} + +/* Sets the specified pin to the specified value */ +static inline void msp_gpio_pin_hi(unsigned int gpio) +{ + msp_gpio_pin_set(MSP_GPIO_HI, gpio); +} + +/* Sets the specified pin to the specified value */ +static inline void msp_gpio_pin_lo(unsigned int gpio) +{ + msp_gpio_pin_set(MSP_GPIO_LO, gpio); +} + +/* Sets the specified pin to the opposite value */ +static inline void msp_gpio_pin_toggle(unsigned int gpio) +{ + msp_gpio_pin_set(MSP_GPIO_TOGGLE, gpio); +} + +/* Gets the mode of the specified pin */ +static inline enum msp_gpio_mode msp_gpio_pin_get_mode(unsigned int gpio) +{ + enum msp_gpio_mode retval = MSP_GPIO_UNKNOWN; + uint32_t data; + + if (gpio >= MSP_NUM_GPIOS) + return retval; + + data = *MSP_GPIO_MODE_REGISTER[gpio]; + + if (gpio < 16) { + retval = BASIC_MODE_FROM_REG(data, gpio); + } else { + /* Extended pins can only be either INPUT or OUTPUT */ + if (data & EXTENDED_ENABLE(gpio)) + retval = MSP_GPIO_OUTPUT; + else + retval = MSP_GPIO_INPUT; + } + + return retval; +} + +/* + * Sets the specified mode on the requested pin + * Returns 0 on success, or -1 if that mode is not allowed on this pin + */ +static inline int msp_gpio_pin_mode(enum msp_gpio_mode mode, unsigned int gpio) +{ + u32 modemask, newmode; + + if ((1 << gpio) & ~MSP_GPIO_MODE_ALLOWED[mode]) + return -1; + + if (gpio >= MSP_NUM_GPIOS) + return -1; + + if (gpio < 16) { + modemask = BASIC_MODE_MASK(gpio); + newmode = BASIC_MODE(mode, gpio); + } else { + modemask = EXTENDED_FULL_MASK; + if (mode == MSP_GPIO_INPUT) + newmode = EXTENDED_DISABLE(gpio); + else + newmode = EXTENDED_ENABLE(gpio); + } + /* Do the set atomically */ + set_value_reg32(MSP_GPIO_MODE_REGISTER[gpio], modemask, newmode); + + return 0; +} + +#endif /* __MSP_GPIO_MACROS_H__ */ diff --git a/arch/mips/include/asm/pmc-sierra/msp71xx/msp_regs.h b/arch/mips/include/asm/pmc-sierra/msp71xx/msp_regs.h index 603eb73..692c1b6 100644 --- a/arch/mips/include/asm/pmc-sierra/msp71xx/msp_regs.h +++ b/arch/mips/include/asm/pmc-sierra/msp71xx/msp_regs.h @@ -91,12 +91,10 @@ /* MAC C device registers */ #define MSP_ADSL2_BASE (MSP_MSB_BASE + 0xA80000) /* ADSL2 device registers */ -#define MSP_USB_BASE (MSP_MSB_BASE + 0xB40000) - /* USB device registers */ -#define MSP_USB_BASE_START (MSP_MSB_BASE + 0xB40100) - /* USB device registers */ -#define MSP_USB_BASE_END (MSP_MSB_BASE + 0xB401FF) - /* USB device registers */ +#define MSP_USB0_BASE (MSP_MSB_BASE + 0xB00000) + /* USB0 device registers */ +#define MSP_USB1_BASE (MSP_MSB_BASE + 0x300000) + /* USB1 device registers */ #define MSP_CPUIF_BASE (MSP_MSB_BASE + 0xC00000) /* CPU interface registers */ @@ -319,8 +317,11 @@ #define CPU_ERR2_REG regptr(MSP_SLP_BASE + 0x184) /* CPU/SLP Error status 1 */ -#define EXTENDED_GPIO_REG regptr(MSP_SLP_BASE + 0x188) - /* Extended GPIO register */ +/* Extended GPIO registers */ +#define EXTENDED_GPIO1_REG regptr(MSP_SLP_BASE + 0x188) +#define EXTENDED_GPIO2_REG regptr(MSP_SLP_BASE + 0x18c) +#define EXTENDED_GPIO_REG EXTENDED_GPIO1_REG + /* Backward-compatibility */ /* System Error registers */ #define SLP_ERR_STS_REG regptr(MSP_SLP_BASE + 0x190) diff --git a/arch/mips/include/asm/pmc-sierra/msp71xx/msp_usb.h b/arch/mips/include/asm/pmc-sierra/msp71xx/msp_usb.h new file mode 100644 index 0000000..4c9348d --- /dev/null +++ b/arch/mips/include/asm/pmc-sierra/msp71xx/msp_usb.h @@ -0,0 +1,144 @@ +/****************************************************************** + * Copyright (c) 2000-2007 PMC-Sierra INC. + * + * This program is free software; you can redistribute it + * and/or modify it under the terms of the GNU General + * Public License as published by the Free Software + * Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * This program is distributed in the hope that it will be + * useful, but WITHOUT ANY WARRANTY; without even the implied + * warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR + * PURPOSE. See the GNU General Public License for more + * details. + * + * You should have received a copy of the GNU General Public + * License along with this program; if not, write to the Free + * Software Foundation, Inc., 675 Mass Ave, Cambridge, MA + * 02139, USA. + * + * PMC-SIERRA INC. DISCLAIMS ANY LIABILITY OF ANY KIND + * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS + * SOFTWARE. + */ +#ifndef MSP_USB_H_ +#define MSP_USB_H_ + +#ifdef CONFIG_MSP_HAS_DUAL_USB +#define NUM_USB_DEVS 2 +#else +#define NUM_USB_DEVS 1 +#endif + +/* Register spaces for USB host 0 */ +#define MSP_USB0_MAB_START (MSP_USB0_BASE + 0x0) +#define MSP_USB0_MAB_END (MSP_USB0_BASE + 0x17) +#define MSP_USB0_ID_START (MSP_USB0_BASE + 0x40000) +#define MSP_USB0_ID_END (MSP_USB0_BASE + 0x4008f) +#define MSP_USB0_HS_START (MSP_USB0_BASE + 0x40100) +#define MSP_USB0_HS_END (MSP_USB0_BASE + 0x401FF) + +/* Register spaces for USB host 1 */ +#define MSP_USB1_MAB_START (MSP_USB1_BASE + 0x0) +#define MSP_USB1_MAB_END (MSP_USB1_BASE + 0x17) +#define MSP_USB1_ID_START (MSP_USB1_BASE + 0x40000) +#define MSP_USB1_ID_END (MSP_USB1_BASE + 0x4008f) +#define MSP_USB1_HS_START (MSP_USB1_BASE + 0x40100) +#define MSP_USB1_HS_END (MSP_USB1_BASE + 0x401ff) + +/* USB Identification registers */ +struct msp_usbid_regs { + u32 id; /* 0x0: Identification register */ + u32 hwgen; /* 0x4: General HW params */ + u32 hwhost; /* 0x8: Host HW params */ + u32 hwdev; /* 0xc: Device HW params */ + u32 hwtxbuf; /* 0x10: Tx buffer HW params */ + u32 hwrxbuf; /* 0x14: Rx buffer HW params */ + u32 reserved[26]; + u32 timer0_load; /* 0x80: General-purpose timer 0 load*/ + u32 timer0_ctrl; /* 0x84: General-purpose timer 0 control */ + u32 timer1_load; /* 0x88: General-purpose timer 1 load*/ + u32 timer1_ctrl; /* 0x8c: General-purpose timer 1 control */ +}; + +/* MSBus to AMBA registers */ +struct msp_mab_regs { + u32 isr; /* 0x0: Interrupt status */ + u32 imr; /* 0x4: Interrupt mask */ + u32 thcr0; /* 0x8: Transaction header capture 0 */ + u32 thcr1; /* 0xc: Transaction header capture 1 */ + u32 int_stat; /* 0x10: Interrupt status summary */ + u32 phy_cfg; /* 0x14: USB phy config */ +}; + +/* EHCI registers */ +struct msp_usbhs_regs { + u32 hciver; /* 0x0: Version and offset to operational regs */ + u32 hcsparams; /* 0x4: Host control structural parameters */ + u32 hccparams; /* 0x8: Host control capability parameters */ + u32 reserved0[5]; + u32 dciver; /* 0x20: Device interface version */ + u32 dccparams; /* 0x24: Device control capability parameters */ + u32 reserved1[6]; + u32 cmd; /* 0x40: USB command */ + u32 sts; /* 0x44: USB status */ + u32 int_ena; /* 0x48: USB interrupt enable */ + u32 frindex; /* 0x4c: Frame index */ + u32 reserved3; + union { + struct { + u32 flb_addr; /* 0x54: Frame list base address */ + u32 next_async_addr; /* 0x58: next asynchronous addr */ + u32 ttctrl; /* 0x5c: embedded transaction translator + async buffer status */ + u32 burst_size; /* 0x60: Controller burst size */ + u32 tx_fifo_ctrl; /* 0x64: Tx latency FIFO tuning */ + u32 reserved0[4]; + u32 endpt_nak; /* 0x78: Endpoint NAK */ + u32 endpt_nak_ena; /* 0x7c: Endpoint NAK enable */ + u32 cfg_flag; /* 0x80: Config flag */ + u32 port_sc1; /* 0x84: Port status & control 1 */ + u32 reserved1[7]; + u32 otgsc; /* 0xa4: OTG status & control */ + u32 mode; /* 0xa8: USB controller mode */ + } host; + + struct { + u32 dev_addr; /* 0x54: Device address */ + u32 endpt_list_addr; /* 0x58: Endpoint list address */ + u32 reserved0[7]; + u32 endpt_nak; /* 0x74 */ + u32 endpt_nak_ctrl; /* 0x78 */ + u32 cfg_flag; /* 0x80 */ + u32 port_sc1; /* 0x84: Port status & control 1 */ + u32 reserved[7]; + u32 otgsc; /* 0xa4: OTG status & control */ + u32 mode; /* 0xa8: USB controller mode */ + u32 endpt_setup_stat; /* 0xac */ + u32 endpt_prime; /* 0xb0 */ + u32 endpt_flush; /* 0xb4 */ + u32 endpt_stat; /* 0xb8 */ + u32 endpt_complete; /* 0xbc */ + u32 endpt_ctrl0; /* 0xc0 */ + u32 endpt_ctrl1; /* 0xc4 */ + u32 endpt_ctrl2; /* 0xc8 */ + u32 endpt_ctrl3; /* 0xcc */ + } device; + } u; +}; +/* + * Container for the more-generic platform_device. + * This exists mainly as a way to map the non-standard register + * spaces and make them accessible to the USB ISR. + */ +struct mspusb_device { + struct msp_mab_regs __iomem *mab_regs; + struct msp_usbid_regs __iomem *usbid_regs; + struct msp_usbhs_regs __iomem *usbhs_regs; + struct platform_device dev; +}; + +#define to_mspusb_device(x) container_of((x), struct mspusb_device, dev) +#define TO_HOST_ID(x) ((x) & 0x3) +#endif /*MSP_USB_H_*/ diff --git a/arch/mips/include/asm/spinlock.h b/arch/mips/include/asm/spinlock.h index 396e402..ca61e84 100644 --- a/arch/mips/include/asm/spinlock.h +++ b/arch/mips/include/asm/spinlock.h @@ -245,16 +245,16 @@ static inline void arch_read_lock(arch_rwlock_t *rw) __asm__ __volatile__( " .set noreorder # arch_read_lock \n" "1: ll %1, %2 \n" - " bltz %1, 2f \n" + " bltz %1, 3f \n" " addu %1, 1 \n" - " sc %1, %0 \n" + "2: sc %1, %0 \n" " beqz %1, 1b \n" " nop \n" " .subsection 2 \n" - "2: ll %1, %2 \n" - " bltz %1, 2b \n" + "3: ll %1, %2 \n" + " bltz %1, 3b \n" " addu %1, 1 \n" - " b 1b \n" + " b 2b \n" " nop \n" " .previous \n" " .set reorder \n" @@ -324,16 +324,16 @@ static inline void arch_write_lock(arch_rwlock_t *rw) __asm__ __volatile__( " .set noreorder # arch_write_lock \n" "1: ll %1, %2 \n" - " bnez %1, 2f \n" + " bnez %1, 3f \n" " lui %1, 0x8000 \n" - " sc %1, %0 \n" - " beqz %1, 2f \n" + "2: sc %1, %0 \n" + " beqz %1, 3f \n" " nop \n" " .subsection 2 \n" - "2: ll %1, %2 \n" - " bnez %1, 2b \n" + "3: ll %1, %2 \n" + " bnez %1, 3b \n" " lui %1, 0x8000 \n" - " b 1b \n" + " b 2b \n" " nop \n" " .previous \n" " .set reorder \n" diff --git a/arch/mips/include/asm/thread_info.h b/arch/mips/include/asm/thread_info.h index d309556..d71160d 100644 --- a/arch/mips/include/asm/thread_info.h +++ b/arch/mips/include/asm/thread_info.h @@ -88,9 +88,11 @@ register struct thread_info *__current_thread_info __asm__("$28"); #define __HAVE_ARCH_THREAD_INFO_ALLOCATOR #ifdef CONFIG_DEBUG_STACK_USAGE -#define alloc_thread_info(tsk) kzalloc(THREAD_SIZE, GFP_KERNEL) +#define alloc_thread_info_node(tsk, node) \ + kzalloc_node(THREAD_SIZE, GFP_KERNEL, node) #else -#define alloc_thread_info(tsk) kmalloc(THREAD_SIZE, GFP_KERNEL) +#define alloc_thread_info_node(tsk, node) \ + kmalloc_node(THREAD_SIZE, GFP_KERNEL, node) #endif #define free_thread_info(info) kfree(info) diff --git a/arch/mips/include/asm/types.h b/arch/mips/include/asm/types.h index 544a285..533812b 100644 --- a/arch/mips/include/asm/types.h +++ b/arch/mips/include/asm/types.h @@ -33,14 +33,6 @@ typedef unsigned short umode_t; #ifdef __KERNEL__ #ifndef __ASSEMBLY__ -#if (defined(CONFIG_HIGHMEM) && defined(CONFIG_64BIT_PHYS_ADDR)) \ - || defined(CONFIG_64BIT) -typedef u64 dma_addr_t; -#else -typedef u32 dma_addr_t; -#endif -typedef u64 dma64_addr_t; - /* * Don't use phys_t. You've been warned. */ diff --git a/arch/mips/include/asm/unistd.h b/arch/mips/include/asm/unistd.h index 550725b..dae22c1 100644 --- a/arch/mips/include/asm/unistd.h +++ b/arch/mips/include/asm/unistd.h @@ -359,16 +359,20 @@ #define __NR_fanotify_init (__NR_Linux + 336) #define __NR_fanotify_mark (__NR_Linux + 337) #define __NR_prlimit64 (__NR_Linux + 338) +#define __NR_name_to_handle_at (__NR_Linux + 339) +#define __NR_open_by_handle_at (__NR_Linux + 340) +#define __NR_clock_adjtime (__NR_Linux + 341) +#define __NR_syncfs (__NR_Linux + 342) /* * Offset of the last Linux o32 flavoured syscall */ -#define __NR_Linux_syscalls 338 +#define __NR_Linux_syscalls 342 #endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */ #define __NR_O32_Linux 4000 -#define __NR_O32_Linux_syscalls 338 +#define __NR_O32_Linux_syscalls 342 #if _MIPS_SIM == _MIPS_SIM_ABI64 @@ -674,16 +678,20 @@ #define __NR_fanotify_init (__NR_Linux + 295) #define __NR_fanotify_mark (__NR_Linux + 296) #define __NR_prlimit64 (__NR_Linux + 297) +#define __NR_name_to_handle_at (__NR_Linux + 298) +#define __NR_open_by_handle_at (__NR_Linux + 299) +#define __NR_clock_adjtime (__NR_Linux + 300) +#define __NR_syncfs (__NR_Linux + 301) /* * Offset of the last Linux 64-bit flavoured syscall */ -#define __NR_Linux_syscalls 297 +#define __NR_Linux_syscalls 301 #endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */ #define __NR_64_Linux 5000 -#define __NR_64_Linux_syscalls 297 +#define __NR_64_Linux_syscalls 301 #if _MIPS_SIM == _MIPS_SIM_NABI32 @@ -994,16 +1002,20 @@ #define __NR_fanotify_init (__NR_Linux + 300) #define __NR_fanotify_mark (__NR_Linux + 301) #define __NR_prlimit64 (__NR_Linux + 302) +#define __NR_name_to_handle_at (__NR_Linux + 303) +#define __NR_open_by_handle_at (__NR_Linux + 304) +#define __NR_clock_adjtime (__NR_Linux + 305) +#define __NR_clock_adjtime (__NR_Linux + 306) /* * Offset of the last N32 flavoured syscall */ -#define __NR_Linux_syscalls 302 +#define __NR_Linux_syscalls 306 #endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */ #define __NR_N32_Linux 6000 -#define __NR_N32_Linux_syscalls 302 +#define __NR_N32_Linux_syscalls 306 #ifdef __KERNEL__ diff --git a/arch/mips/jazz/irq.c b/arch/mips/jazz/irq.c index 35b3e2f..40f7c6b 100644 --- a/arch/mips/jazz/irq.c +++ b/arch/mips/jazz/irq.c @@ -23,9 +23,9 @@ static DEFINE_RAW_SPINLOCK(r4030_lock); -static void enable_r4030_irq(unsigned int irq) +static void enable_r4030_irq(struct irq_data *d) { - unsigned int mask = 1 << (irq - JAZZ_IRQ_START); + unsigned int mask = 1 << (d->irq - JAZZ_IRQ_START); unsigned long flags; raw_spin_lock_irqsave(&r4030_lock, flags); @@ -34,9 +34,9 @@ static void enable_r4030_irq(unsigned int irq) raw_spin_unlock_irqrestore(&r4030_lock, flags); } -void disable_r4030_irq(unsigned int irq) +void disable_r4030_irq(struct irq_data *d) { - unsigned int mask = ~(1 << (irq - JAZZ_IRQ_START)); + unsigned int mask = ~(1 << (d->irq - JAZZ_IRQ_START)); unsigned long flags; raw_spin_lock_irqsave(&r4030_lock, flags); @@ -47,10 +47,8 @@ void disable_r4030_irq(unsigned int irq) static struct irq_chip r4030_irq_type = { .name = "R4030", - .ack = disable_r4030_irq, - .mask = disable_r4030_irq, - .mask_ack = disable_r4030_irq, - .unmask = enable_r4030_irq, + .irq_mask = disable_r4030_irq, + .irq_unmask = enable_r4030_irq, }; void __init init_r4030_ints(void) diff --git a/arch/mips/jz4740/Makefile b/arch/mips/jz4740/Makefile index a604eae..a9dff33 100644 --- a/arch/mips/jz4740/Makefile +++ b/arch/mips/jz4740/Makefile @@ -17,4 +17,4 @@ obj-$(CONFIG_JZ4740_QI_LB60) += board-qi_lb60.o obj-$(CONFIG_PM) += pm.o -EXTRA_CFLAGS += -Werror -Wall +ccflags-y := -Werror -Wall diff --git a/arch/mips/jz4740/board-qi_lb60.c b/arch/mips/jz4740/board-qi_lb60.c index 2c0e107..bc18daa 100644 --- a/arch/mips/jz4740/board-qi_lb60.c +++ b/arch/mips/jz4740/board-qi_lb60.c @@ -23,6 +23,7 @@ #include <linux/spi/spi_gpio.h> #include <linux/power_supply.h> #include <linux/power/jz4740-battery.h> +#include <linux/power/gpio-charger.h> #include <asm/mach-jz4740/jz4740_fb.h> #include <asm/mach-jz4740/jz4740_mmc.h> @@ -49,14 +50,14 @@ static bool is_avt2; /* NAND */ static struct nand_ecclayout qi_lb60_ecclayout_1gb = { -/* .eccbytes = 36, + .eccbytes = 36, .eccpos = { 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41 - },*/ + }, .oobfree = { { .offset = 2, .length = 4 }, { .offset = 42, .length = 22 } @@ -85,7 +86,7 @@ static struct mtd_partition qi_lb60_partitions_1gb[] = { }; static struct nand_ecclayout qi_lb60_ecclayout_2gb = { -/* .eccbytes = 72, + .eccbytes = 72, .eccpos = { 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, @@ -96,7 +97,7 @@ static struct nand_ecclayout qi_lb60_ecclayout_2gb = { 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83 - },*/ + }, .oobfree = { { .offset = 2, .length = 10 }, { .offset = 84, .length = 44 }, @@ -396,6 +397,28 @@ static struct platform_device qi_lb60_pwm_beeper = { }, }; +/* charger */ +static char *qi_lb60_batteries[] = { + "battery", +}; + +static struct gpio_charger_platform_data qi_lb60_charger_pdata = { + .name = "usb", + .type = POWER_SUPPLY_TYPE_USB, + .gpio = JZ_GPIO_PORTD(28), + .gpio_active_low = 1, + .supplied_to = qi_lb60_batteries, + .num_supplicants = ARRAY_SIZE(qi_lb60_batteries), +}; + +static struct platform_device qi_lb60_charger_device = { + .name = "gpio-charger", + .dev = { + .platform_data = &qi_lb60_charger_pdata, + }, +}; + + static struct platform_device *jz_platform_devices[] __initdata = { &jz4740_udc_device, &jz4740_mmc_device, @@ -410,6 +433,7 @@ static struct platform_device *jz_platform_devices[] __initdata = { &jz4740_adc_device, &qi_lb60_gpio_keys, &qi_lb60_pwm_beeper, + &qi_lb60_charger_device, }; static void __init board_gpio_setup(void) diff --git a/arch/mips/jz4740/gpio.c b/arch/mips/jz4740/gpio.c index 88e6aed..bd2fc29 100644 --- a/arch/mips/jz4740/gpio.c +++ b/arch/mips/jz4740/gpio.c @@ -86,7 +86,6 @@ struct jz_gpio_chip { spinlock_t lock; struct gpio_chip gpio_chip; - struct irq_chip irq_chip; struct sys_device sysdev; }; @@ -102,9 +101,9 @@ static inline struct jz_gpio_chip *gpio_chip_to_jz_gpio_chip(struct gpio_chip *g return container_of(gpio_chip, struct jz_gpio_chip, gpio_chip); } -static inline struct jz_gpio_chip *irq_to_jz_gpio_chip(unsigned int irq) +static inline struct jz_gpio_chip *irq_to_jz_gpio_chip(struct irq_data *data) { - return get_irq_chip_data(irq); + return irq_data_get_irq_chip_data(data); } static inline void jz_gpio_write_bit(unsigned int gpio, unsigned int reg) @@ -325,62 +324,52 @@ static void jz_gpio_irq_demux_handler(unsigned int irq, struct irq_desc *desc) generic_handle_irq(gpio_irq); }; -static inline void jz_gpio_set_irq_bit(unsigned int irq, unsigned int reg) +static inline void jz_gpio_set_irq_bit(struct irq_data *data, unsigned int reg) { - struct jz_gpio_chip *chip = irq_to_jz_gpio_chip(irq); - writel(IRQ_TO_BIT(irq), chip->base + reg); + struct jz_gpio_chip *chip = irq_to_jz_gpio_chip(data); + writel(IRQ_TO_BIT(data->irq), chip->base + reg); } -static void jz_gpio_irq_mask(unsigned int irq) +static void jz_gpio_irq_mask(struct irq_data *data) { - jz_gpio_set_irq_bit(irq, JZ_REG_GPIO_MASK_SET); + jz_gpio_set_irq_bit(data, JZ_REG_GPIO_MASK_SET); }; -static void jz_gpio_irq_unmask(unsigned int irq) +static void jz_gpio_irq_unmask(struct irq_data *data) { - struct jz_gpio_chip *chip = irq_to_jz_gpio_chip(irq); + struct jz_gpio_chip *chip = irq_to_jz_gpio_chip(data); - jz_gpio_check_trigger_both(chip, irq); + jz_gpio_check_trigger_both(chip, data->irq); - jz_gpio_set_irq_bit(irq, JZ_REG_GPIO_MASK_CLEAR); + jz_gpio_set_irq_bit(data, JZ_REG_GPIO_MASK_CLEAR); }; /* TODO: Check if function is gpio */ -static unsigned int jz_gpio_irq_startup(unsigned int irq) +static unsigned int jz_gpio_irq_startup(struct irq_data *data) { - struct irq_desc *desc = irq_to_desc(irq); - - jz_gpio_set_irq_bit(irq, JZ_REG_GPIO_SELECT_SET); - - desc->status &= ~IRQ_MASKED; - jz_gpio_irq_unmask(irq); - + jz_gpio_set_irq_bit(data, JZ_REG_GPIO_SELECT_SET); + jz_gpio_irq_unmask(data); return 0; } -static void jz_gpio_irq_shutdown(unsigned int irq) +static void jz_gpio_irq_shutdown(struct irq_data *data) { - struct irq_desc *desc = irq_to_desc(irq); - - jz_gpio_irq_mask(irq); - desc->status |= IRQ_MASKED; + jz_gpio_irq_mask(data); /* Set direction to input */ - jz_gpio_set_irq_bit(irq, JZ_REG_GPIO_DIRECTION_CLEAR); - jz_gpio_set_irq_bit(irq, JZ_REG_GPIO_SELECT_CLEAR); + jz_gpio_set_irq_bit(data, JZ_REG_GPIO_DIRECTION_CLEAR); + jz_gpio_set_irq_bit(data, JZ_REG_GPIO_SELECT_CLEAR); } -static void jz_gpio_irq_ack(unsigned int irq) +static void jz_gpio_irq_ack(struct irq_data *data) { - jz_gpio_set_irq_bit(irq, JZ_REG_GPIO_FLAG_CLEAR); + jz_gpio_set_irq_bit(data, JZ_REG_GPIO_FLAG_CLEAR); }; -static int jz_gpio_irq_set_type(unsigned int irq, unsigned int flow_type) +static int jz_gpio_irq_set_type(struct irq_data *data, unsigned int flow_type) { - struct jz_gpio_chip *chip = irq_to_jz_gpio_chip(irq); - struct irq_desc *desc = irq_to_desc(irq); - - jz_gpio_irq_mask(irq); + struct jz_gpio_chip *chip = irq_to_jz_gpio_chip(data); + unsigned int irq = data->irq; if (flow_type == IRQ_TYPE_EDGE_BOTH) { uint32_t value = readl(chip->base + JZ_REG_GPIO_PIN); @@ -395,45 +384,54 @@ static int jz_gpio_irq_set_type(unsigned int irq, unsigned int flow_type) switch (flow_type) { case IRQ_TYPE_EDGE_RISING: - jz_gpio_set_irq_bit(irq, JZ_REG_GPIO_DIRECTION_SET); - jz_gpio_set_irq_bit(irq, JZ_REG_GPIO_TRIGGER_SET); + jz_gpio_set_irq_bit(data, JZ_REG_GPIO_DIRECTION_SET); + jz_gpio_set_irq_bit(data, JZ_REG_GPIO_TRIGGER_SET); break; case IRQ_TYPE_EDGE_FALLING: - jz_gpio_set_irq_bit(irq, JZ_REG_GPIO_DIRECTION_CLEAR); - jz_gpio_set_irq_bit(irq, JZ_REG_GPIO_TRIGGER_SET); + jz_gpio_set_irq_bit(data, JZ_REG_GPIO_DIRECTION_CLEAR); + jz_gpio_set_irq_bit(data, JZ_REG_GPIO_TRIGGER_SET); break; case IRQ_TYPE_LEVEL_HIGH: - jz_gpio_set_irq_bit(irq, JZ_REG_GPIO_DIRECTION_SET); - jz_gpio_set_irq_bit(irq, JZ_REG_GPIO_TRIGGER_CLEAR); + jz_gpio_set_irq_bit(data, JZ_REG_GPIO_DIRECTION_SET); + jz_gpio_set_irq_bit(data, JZ_REG_GPIO_TRIGGER_CLEAR); break; case IRQ_TYPE_LEVEL_LOW: - jz_gpio_set_irq_bit(irq, JZ_REG_GPIO_DIRECTION_CLEAR); - jz_gpio_set_irq_bit(irq, JZ_REG_GPIO_TRIGGER_CLEAR); + jz_gpio_set_irq_bit(data, JZ_REG_GPIO_DIRECTION_CLEAR); + jz_gpio_set_irq_bit(data, JZ_REG_GPIO_TRIGGER_CLEAR); break; default: return -EINVAL; } - if (!(desc->status & IRQ_MASKED)) - jz_gpio_irq_unmask(irq); - return 0; } -static int jz_gpio_irq_set_wake(unsigned int irq, unsigned int on) +static int jz_gpio_irq_set_wake(struct irq_data *data, unsigned int on) { - struct jz_gpio_chip *chip = irq_to_jz_gpio_chip(irq); + struct jz_gpio_chip *chip = irq_to_jz_gpio_chip(data); spin_lock(&chip->lock); if (on) - chip->wakeup |= IRQ_TO_BIT(irq); + chip->wakeup |= IRQ_TO_BIT(data->irq); else - chip->wakeup &= ~IRQ_TO_BIT(irq); + chip->wakeup &= ~IRQ_TO_BIT(data->irq); spin_unlock(&chip->lock); set_irq_wake(chip->irq, on); return 0; } +static struct irq_chip jz_gpio_irq_chip = { + .name = "GPIO", + .irq_mask = jz_gpio_irq_mask, + .irq_unmask = jz_gpio_irq_unmask, + .irq_ack = jz_gpio_irq_ack, + .irq_startup = jz_gpio_irq_startup, + .irq_shutdown = jz_gpio_irq_shutdown, + .irq_set_type = jz_gpio_irq_set_type, + .irq_set_wake = jz_gpio_irq_set_wake, + .flags = IRQCHIP_SET_TYPE_MASKED, +}; + /* * This lock class tells lockdep that GPIO irqs are in a different * category than their parents, so it won't report false recursion. @@ -452,16 +450,6 @@ static struct lock_class_key gpio_lock_class; .base = JZ4740_GPIO_BASE_ ## _bank, \ .ngpio = JZ4740_GPIO_NUM_ ## _bank, \ }, \ - .irq_chip = { \ - .name = "GPIO Bank " # _bank, \ - .mask = jz_gpio_irq_mask, \ - .unmask = jz_gpio_irq_unmask, \ - .ack = jz_gpio_irq_ack, \ - .startup = jz_gpio_irq_startup, \ - .shutdown = jz_gpio_irq_shutdown, \ - .set_type = jz_gpio_irq_set_type, \ - .set_wake = jz_gpio_irq_set_wake, \ - }, \ } static struct jz_gpio_chip jz4740_gpio_chips[] = { @@ -526,9 +514,10 @@ static int jz4740_gpio_chip_init(struct jz_gpio_chip *chip, unsigned int id) set_irq_chained_handler(chip->irq, jz_gpio_irq_demux_handler); for (irq = chip->irq_base; irq < chip->irq_base + chip->gpio_chip.ngpio; ++irq) { - lockdep_set_class(&irq_desc[irq].lock, &gpio_lock_class); + irq_set_lockdep_class(irq, &gpio_lock_class); set_irq_chip_data(irq, chip); - set_irq_chip_and_handler(irq, &chip->irq_chip, handle_level_irq); + set_irq_chip_and_handler(irq, &jz_gpio_irq_chip, + handle_level_irq); } return 0; diff --git a/arch/mips/jz4740/irq.c b/arch/mips/jz4740/irq.c index 7d33ff8..dcc5593 100644 --- a/arch/mips/jz4740/irq.c +++ b/arch/mips/jz4740/irq.c @@ -43,32 +43,37 @@ static uint32_t jz_intc_saved; #define IRQ_BIT(x) BIT((x) - JZ4740_IRQ_BASE) -static void intc_irq_unmask(unsigned int irq) +static inline unsigned long intc_irq_bit(struct irq_data *data) { - writel(IRQ_BIT(irq), jz_intc_base + JZ_REG_INTC_CLEAR_MASK); + return (unsigned long)irq_data_get_irq_chip_data(data); } -static void intc_irq_mask(unsigned int irq) +static void intc_irq_unmask(struct irq_data *data) { - writel(IRQ_BIT(irq), jz_intc_base + JZ_REG_INTC_SET_MASK); + writel(intc_irq_bit(data), jz_intc_base + JZ_REG_INTC_CLEAR_MASK); } -static int intc_irq_set_wake(unsigned int irq, unsigned int on) +static void intc_irq_mask(struct irq_data *data) +{ + writel(intc_irq_bit(data), jz_intc_base + JZ_REG_INTC_SET_MASK); +} + +static int intc_irq_set_wake(struct irq_data *data, unsigned int on) { if (on) - jz_intc_wakeup |= IRQ_BIT(irq); + jz_intc_wakeup |= intc_irq_bit(data); else - jz_intc_wakeup &= ~IRQ_BIT(irq); + jz_intc_wakeup &= ~intc_irq_bit(data); return 0; } static struct irq_chip intc_irq_type = { .name = "INTC", - .mask = intc_irq_mask, - .mask_ack = intc_irq_mask, - .unmask = intc_irq_unmask, - .set_wake = intc_irq_set_wake, + .irq_mask = intc_irq_mask, + .irq_mask_ack = intc_irq_mask, + .irq_unmask = intc_irq_unmask, + .irq_set_wake = intc_irq_set_wake, }; static irqreturn_t jz4740_cascade(int irq, void *data) @@ -95,8 +100,11 @@ void __init arch_init_irq(void) jz_intc_base = ioremap(JZ4740_INTC_BASE_ADDR, 0x14); + /* Mask all irqs */ + writel(0xffffffff, jz_intc_base + JZ_REG_INTC_SET_MASK); + for (i = JZ4740_IRQ_BASE; i < JZ4740_IRQ_BASE + 32; i++) { - intc_irq_mask(i); + set_irq_chip_data(i, (void *)IRQ_BIT(i)); set_irq_chip_and_handler(i, &intc_irq_type, handle_level_irq); } diff --git a/arch/mips/kernel/i8259.c b/arch/mips/kernel/i8259.c index c58176c..e221662 100644 --- a/arch/mips/kernel/i8259.c +++ b/arch/mips/kernel/i8259.c @@ -31,19 +31,19 @@ static int i8259A_auto_eoi = -1; DEFINE_RAW_SPINLOCK(i8259A_lock); -static void disable_8259A_irq(unsigned int irq); -static void enable_8259A_irq(unsigned int irq); -static void mask_and_ack_8259A(unsigned int irq); +static void disable_8259A_irq(struct irq_data *d); +static void enable_8259A_irq(struct irq_data *d); +static void mask_and_ack_8259A(struct irq_data *d); static void init_8259A(int auto_eoi); static struct irq_chip i8259A_chip = { - .name = "XT-PIC", - .mask = disable_8259A_irq, - .disable = disable_8259A_irq, - .unmask = enable_8259A_irq, - .mask_ack = mask_and_ack_8259A, + .name = "XT-PIC", + .irq_mask = disable_8259A_irq, + .irq_disable = disable_8259A_irq, + .irq_unmask = enable_8259A_irq, + .irq_mask_ack = mask_and_ack_8259A, #ifdef CONFIG_MIPS_MT_SMTC_IRQAFF - .set_affinity = plat_set_irq_affinity, + .irq_set_affinity = plat_set_irq_affinity, #endif /* CONFIG_MIPS_MT_SMTC_IRQAFF */ }; @@ -59,12 +59,11 @@ static unsigned int cached_irq_mask = 0xffff; #define cached_master_mask (cached_irq_mask) #define cached_slave_mask (cached_irq_mask >> 8) -static void disable_8259A_irq(unsigned int irq) +static void disable_8259A_irq(struct irq_data *d) { - unsigned int mask; + unsigned int mask, irq = d->irq - I8259A_IRQ_BASE; unsigned long flags; - irq -= I8259A_IRQ_BASE; mask = 1 << irq; raw_spin_lock_irqsave(&i8259A_lock, flags); cached_irq_mask |= mask; @@ -75,12 +74,11 @@ static void disable_8259A_irq(unsigned int irq) raw_spin_unlock_irqrestore(&i8259A_lock, flags); } -static void enable_8259A_irq(unsigned int irq) +static void enable_8259A_irq(struct irq_data *d) { - unsigned int mask; + unsigned int mask, irq = d->irq - I8259A_IRQ_BASE; unsigned long flags; - irq -= I8259A_IRQ_BASE; mask = ~(1 << irq); raw_spin_lock_irqsave(&i8259A_lock, flags); cached_irq_mask &= mask; @@ -145,12 +143,11 @@ static inline int i8259A_irq_real(unsigned int irq) * first, _then_ send the EOI, and the order of EOI * to the two 8259s is important! */ -static void mask_and_ack_8259A(unsigned int irq) +static void mask_and_ack_8259A(struct irq_data *d) { - unsigned int irqmask; + unsigned int irqmask, irq = d->irq - I8259A_IRQ_BASE; unsigned long flags; - irq -= I8259A_IRQ_BASE; irqmask = 1 << irq; raw_spin_lock_irqsave(&i8259A_lock, flags); /* @@ -290,9 +287,9 @@ static void init_8259A(int auto_eoi) * In AEOI mode we just have to mask the interrupt * when acking. */ - i8259A_chip.mask_ack = disable_8259A_irq; + i8259A_chip.irq_mask_ack = disable_8259A_irq; else - i8259A_chip.mask_ack = mask_and_ack_8259A; + i8259A_chip.irq_mask_ack = mask_and_ack_8259A; udelay(100); /* wait for 8259A to initialize */ diff --git a/arch/mips/kernel/irq-gic.c b/arch/mips/kernel/irq-gic.c index 1774271..43cd962 100644 --- a/arch/mips/kernel/irq-gic.c +++ b/arch/mips/kernel/irq-gic.c @@ -87,17 +87,10 @@ unsigned int gic_get_int(void) return i; } -static unsigned int gic_irq_startup(unsigned int irq) +static void gic_irq_ack(struct irq_data *d) { - irq -= _irqbase; - pr_debug("CPU%d: %s: irq%d\n", smp_processor_id(), __func__, irq); - GIC_SET_INTR_MASK(irq); - return 0; -} + unsigned int irq = d->irq - _irqbase; -static void gic_irq_ack(unsigned int irq) -{ - irq -= _irqbase; pr_debug("CPU%d: %s: irq%d\n", smp_processor_id(), __func__, irq); GIC_CLR_INTR_MASK(irq); @@ -105,16 +98,16 @@ static void gic_irq_ack(unsigned int irq) GICWRITE(GIC_REG(SHARED, GIC_SH_WEDGE), irq); } -static void gic_mask_irq(unsigned int irq) +static void gic_mask_irq(struct irq_data *d) { - irq -= _irqbase; + unsigned int irq = d->irq - _irqbase; pr_debug("CPU%d: %s: irq%d\n", smp_processor_id(), __func__, irq); GIC_CLR_INTR_MASK(irq); } -static void gic_unmask_irq(unsigned int irq) +static void gic_unmask_irq(struct irq_data *d) { - irq -= _irqbase; + unsigned int irq = d->irq - _irqbase; pr_debug("CPU%d: %s: irq%d\n", smp_processor_id(), __func__, irq); GIC_SET_INTR_MASK(irq); } @@ -123,13 +116,14 @@ static void gic_unmask_irq(unsigned int irq) static DEFINE_SPINLOCK(gic_lock); -static int gic_set_affinity(unsigned int irq, const struct cpumask *cpumask) +static int gic_set_affinity(struct irq_data *d, const struct cpumask *cpumask, + bool force) { + unsigned int irq = d->irq - _irqbase; cpumask_t tmp = CPU_MASK_NONE; unsigned long flags; int i; - irq -= _irqbase; pr_debug("%s(%d) called\n", __func__, irq); cpumask_and(&tmp, cpumask, cpu_online_mask); if (cpus_empty(tmp)) @@ -147,23 +141,22 @@ static int gic_set_affinity(unsigned int irq, const struct cpumask *cpumask) set_bit(irq, pcpu_masks[first_cpu(tmp)].pcpu_mask); } - cpumask_copy(irq_desc[irq].affinity, cpumask); + cpumask_copy(d->affinity, cpumask); spin_unlock_irqrestore(&gic_lock, flags); - return 0; + return IRQ_SET_MASK_OK_NOCOPY; } #endif static struct irq_chip gic_irq_controller = { - .name = "MIPS GIC", - .startup = gic_irq_startup, - .ack = gic_irq_ack, - .mask = gic_mask_irq, - .mask_ack = gic_mask_irq, - .unmask = gic_unmask_irq, - .eoi = gic_unmask_irq, + .name = "MIPS GIC", + .irq_ack = gic_irq_ack, + .irq_mask = gic_mask_irq, + .irq_mask_ack = gic_mask_irq, + .irq_unmask = gic_unmask_irq, + .irq_eoi = gic_unmask_irq, #ifdef CONFIG_SMP - .set_affinity = gic_set_affinity, + .irq_set_affinity = gic_set_affinity, #endif }; diff --git a/arch/mips/kernel/irq-gt641xx.c b/arch/mips/kernel/irq-gt641xx.c index 42ef814..7fd176f 100644 --- a/arch/mips/kernel/irq-gt641xx.c +++ b/arch/mips/kernel/irq-gt641xx.c @@ -29,64 +29,64 @@ static DEFINE_RAW_SPINLOCK(gt641xx_irq_lock); -static void ack_gt641xx_irq(unsigned int irq) +static void ack_gt641xx_irq(struct irq_data *d) { unsigned long flags; u32 cause; raw_spin_lock_irqsave(>641xx_irq_lock, flags); cause = GT_READ(GT_INTRCAUSE_OFS); - cause &= ~GT641XX_IRQ_TO_BIT(irq); + cause &= ~GT641XX_IRQ_TO_BIT(d->irq); GT_WRITE(GT_INTRCAUSE_OFS, cause); raw_spin_unlock_irqrestore(>641xx_irq_lock, flags); } -static void mask_gt641xx_irq(unsigned int irq) +static void mask_gt641xx_irq(struct irq_data *d) { unsigned long flags; u32 mask; raw_spin_lock_irqsave(>641xx_irq_lock, flags); mask = GT_READ(GT_INTRMASK_OFS); - mask &= ~GT641XX_IRQ_TO_BIT(irq); + mask &= ~GT641XX_IRQ_TO_BIT(d->irq); GT_WRITE(GT_INTRMASK_OFS, mask); raw_spin_unlock_irqrestore(>641xx_irq_lock, flags); } -static void mask_ack_gt641xx_irq(unsigned int irq) +static void mask_ack_gt641xx_irq(struct irq_data *d) { unsigned long flags; u32 cause, mask; raw_spin_lock_irqsave(>641xx_irq_lock, flags); mask = GT_READ(GT_INTRMASK_OFS); - mask &= ~GT641XX_IRQ_TO_BIT(irq); + mask &= ~GT641XX_IRQ_TO_BIT(d->irq); GT_WRITE(GT_INTRMASK_OFS, mask); cause = GT_READ(GT_INTRCAUSE_OFS); - cause &= ~GT641XX_IRQ_TO_BIT(irq); + cause &= ~GT641XX_IRQ_TO_BIT(d->irq); GT_WRITE(GT_INTRCAUSE_OFS, cause); raw_spin_unlock_irqrestore(>641xx_irq_lock, flags); } -static void unmask_gt641xx_irq(unsigned int irq) +static void unmask_gt641xx_irq(struct irq_data *d) { unsigned long flags; u32 mask; raw_spin_lock_irqsave(>641xx_irq_lock, flags); mask = GT_READ(GT_INTRMASK_OFS); - mask |= GT641XX_IRQ_TO_BIT(irq); + mask |= GT641XX_IRQ_TO_BIT(d->irq); GT_WRITE(GT_INTRMASK_OFS, mask); raw_spin_unlock_irqrestore(>641xx_irq_lock, flags); } static struct irq_chip gt641xx_irq_chip = { .name = "GT641xx", - .ack = ack_gt641xx_irq, - .mask = mask_gt641xx_irq, - .mask_ack = mask_ack_gt641xx_irq, - .unmask = unmask_gt641xx_irq, + .irq_ack = ack_gt641xx_irq, + .irq_mask = mask_gt641xx_irq, + .irq_mask_ack = mask_ack_gt641xx_irq, + .irq_unmask = unmask_gt641xx_irq, }; void gt641xx_irq_dispatch(void) diff --git a/arch/mips/kernel/irq-msc01.c b/arch/mips/kernel/irq-msc01.c index 6a8cd28..fc800cd 100644 --- a/arch/mips/kernel/irq-msc01.c +++ b/arch/mips/kernel/irq-msc01.c @@ -28,8 +28,10 @@ static unsigned long _icctrl_msc; static unsigned int irq_base; /* mask off an interrupt */ -static inline void mask_msc_irq(unsigned int irq) +static inline void mask_msc_irq(struct irq_data *d) { + unsigned int irq = d->irq; + if (irq < (irq_base + 32)) MSCIC_WRITE(MSC01_IC_DISL, 1<<(irq - irq_base)); else @@ -37,8 +39,10 @@ static inline void mask_msc_irq(unsigned int irq) } /* unmask an interrupt */ -static inline void unmask_msc_irq(unsigned int irq) +static inline void unmask_msc_irq(struct irq_data *d) { + unsigned int irq = d->irq; + if (irq < (irq_base + 32)) MSCIC_WRITE(MSC01_IC_ENAL, 1<<(irq - irq_base)); else @@ -48,9 +52,11 @@ static inline void unmask_msc_irq(unsigned int irq) /* * Masks and ACKs an IRQ */ -static void level_mask_and_ack_msc_irq(unsigned int irq) +static void level_mask_and_ack_msc_irq(struct irq_data *d) { - mask_msc_irq(irq); + unsigned int irq = d->irq; + + mask_msc_irq(d); if (!cpu_has_veic) MSCIC_WRITE(MSC01_IC_EOI, 0); /* This actually needs to be a call into platform code */ @@ -60,9 +66,11 @@ static void level_mask_and_ack_msc_irq(unsigned int irq) /* * Masks and ACKs an IRQ */ -static void edge_mask_and_ack_msc_irq(unsigned int irq) +static void edge_mask_and_ack_msc_irq(struct irq_data *d) { - mask_msc_irq(irq); + unsigned int irq = d->irq; + + mask_msc_irq(d); if (!cpu_has_veic) MSCIC_WRITE(MSC01_IC_EOI, 0); else { @@ -75,15 +83,6 @@ static void edge_mask_and_ack_msc_irq(unsigned int irq) } /* - * End IRQ processing - */ -static void end_msc_irq(unsigned int irq) -{ - if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) - unmask_msc_irq(irq); -} - -/* * Interrupt handler for interrupts coming from SOC-it. */ void ll_msc_irq(void) @@ -107,22 +106,20 @@ static void msc_bind_eic_interrupt(int irq, int set) static struct irq_chip msc_levelirq_type = { .name = "SOC-it-Level", - .ack = level_mask_and_ack_msc_irq, - .mask = mask_msc_irq, - .mask_ack = level_mask_and_ack_msc_irq, - .unmask = unmask_msc_irq, - .eoi = unmask_msc_irq, - .end = end_msc_irq, + .irq_ack = level_mask_and_ack_msc_irq, + .irq_mask = mask_msc_irq, + .irq_mask_ack = level_mask_and_ack_msc_irq, + .irq_unmask = unmask_msc_irq, + .irq_eoi = unmask_msc_irq, }; static struct irq_chip msc_edgeirq_type = { .name = "SOC-it-Edge", - .ack = edge_mask_and_ack_msc_irq, - .mask = mask_msc_irq, - .mask_ack = edge_mask_and_ack_msc_irq, - .unmask = unmask_msc_irq, - .eoi = unmask_msc_irq, - .end = end_msc_irq, + .irq_ack = edge_mask_and_ack_msc_irq, + .irq_mask = mask_msc_irq, + .irq_mask_ack = edge_mask_and_ack_msc_irq, + .irq_unmask = unmask_msc_irq, + .irq_eoi = unmask_msc_irq, }; diff --git a/arch/mips/kernel/irq-rm7000.c b/arch/mips/kernel/irq-rm7000.c index 9731e8b4..fd24fd9 100644 --- a/arch/mips/kernel/irq-rm7000.c +++ b/arch/mips/kernel/irq-rm7000.c @@ -18,23 +18,23 @@ #include <asm/mipsregs.h> #include <asm/system.h> -static inline void unmask_rm7k_irq(unsigned int irq) +static inline void unmask_rm7k_irq(struct irq_data *d) { - set_c0_intcontrol(0x100 << (irq - RM7K_CPU_IRQ_BASE)); + set_c0_intcontrol(0x100 << (d->irq - RM7K_CPU_IRQ_BASE)); } -static inline void mask_rm7k_irq(unsigned int irq) +static inline void mask_rm7k_irq(struct irq_data *d) { - clear_c0_intcontrol(0x100 << (irq - RM7K_CPU_IRQ_BASE)); + clear_c0_intcontrol(0x100 << (d->irq - RM7K_CPU_IRQ_BASE)); } static struct irq_chip rm7k_irq_controller = { .name = "RM7000", - .ack = mask_rm7k_irq, - .mask = mask_rm7k_irq, - .mask_ack = mask_rm7k_irq, - .unmask = unmask_rm7k_irq, - .eoi = unmask_rm7k_irq + .irq_ack = mask_rm7k_irq, + .irq_mask = mask_rm7k_irq, + .irq_mask_ack = mask_rm7k_irq, + .irq_unmask = unmask_rm7k_irq, + .irq_eoi = unmask_rm7k_irq }; void __init rm7k_cpu_irq_init(void) diff --git a/arch/mips/kernel/irq-rm9000.c b/arch/mips/kernel/irq-rm9000.c index b7e4025..ca463ec 100644 --- a/arch/mips/kernel/irq-rm9000.c +++ b/arch/mips/kernel/irq-rm9000.c @@ -19,22 +19,22 @@ #include <asm/mipsregs.h> #include <asm/system.h> -static inline void unmask_rm9k_irq(unsigned int irq) +static inline void unmask_rm9k_irq(struct irq_data *d) { - set_c0_intcontrol(0x1000 << (irq - RM9K_CPU_IRQ_BASE)); + set_c0_intcontrol(0x1000 << (d->irq - RM9K_CPU_IRQ_BASE)); } -static inline void mask_rm9k_irq(unsigned int irq) +static inline void mask_rm9k_irq(struct irq_data *d) { - clear_c0_intcontrol(0x1000 << (irq - RM9K_CPU_IRQ_BASE)); + clear_c0_intcontrol(0x1000 << (d->irq - RM9K_CPU_IRQ_BASE)); } -static inline void rm9k_cpu_irq_enable(unsigned int irq) +static inline void rm9k_cpu_irq_enable(struct irq_data *d) { unsigned long flags; local_irq_save(flags); - unmask_rm9k_irq(irq); + unmask_rm9k_irq(d); local_irq_restore(flags); } @@ -43,50 +43,47 @@ static inline void rm9k_cpu_irq_enable(unsigned int irq) */ static void local_rm9k_perfcounter_irq_startup(void *args) { - unsigned int irq = (unsigned int) args; - - rm9k_cpu_irq_enable(irq); + rm9k_cpu_irq_enable(args); } -static unsigned int rm9k_perfcounter_irq_startup(unsigned int irq) +static unsigned int rm9k_perfcounter_irq_startup(struct irq_data *d) { - on_each_cpu(local_rm9k_perfcounter_irq_startup, (void *) irq, 1); + on_each_cpu(local_rm9k_perfcounter_irq_startup, d, 1); return 0; } static void local_rm9k_perfcounter_irq_shutdown(void *args) { - unsigned int irq = (unsigned int) args; unsigned long flags; local_irq_save(flags); - mask_rm9k_irq(irq); + mask_rm9k_irq(args); local_irq_restore(flags); } -static void rm9k_perfcounter_irq_shutdown(unsigned int irq) +static void rm9k_perfcounter_irq_shutdown(struct irq_data *d) { - on_each_cpu(local_rm9k_perfcounter_irq_shutdown, (void *) irq, 1); + on_each_cpu(local_rm9k_perfcounter_irq_shutdown, d, 1); } static struct irq_chip rm9k_irq_controller = { .name = "RM9000", - .ack = mask_rm9k_irq, - .mask = mask_rm9k_irq, - .mask_ack = mask_rm9k_irq, - .unmask = unmask_rm9k_irq, - .eoi = unmask_rm9k_irq + .irq_ack = mask_rm9k_irq, + .irq_mask = mask_rm9k_irq, + .irq_mask_ack = mask_rm9k_irq, + .irq_unmask = unmask_rm9k_irq, + .irq_eoi = unmask_rm9k_irq }; static struct irq_chip rm9k_perfcounter_irq = { .name = "RM9000", - .startup = rm9k_perfcounter_irq_startup, - .shutdown = rm9k_perfcounter_irq_shutdown, - .ack = mask_rm9k_irq, - .mask = mask_rm9k_irq, - .mask_ack = mask_rm9k_irq, - .unmask = unmask_rm9k_irq, + .irq_startup = rm9k_perfcounter_irq_startup, + .irq_shutdown = rm9k_perfcounter_irq_shutdown, + .irq_ack = mask_rm9k_irq, + .irq_mask = mask_rm9k_irq, + .irq_mask_ack = mask_rm9k_irq, + .irq_unmask = unmask_rm9k_irq, }; unsigned int rm9000_perfcount_irq; diff --git a/arch/mips/kernel/irq.c b/arch/mips/kernel/irq.c index 4f93db5..1b68ebe 100644 --- a/arch/mips/kernel/irq.c +++ b/arch/mips/kernel/irq.c @@ -81,48 +81,9 @@ void ack_bad_irq(unsigned int irq) atomic_t irq_err_count; -/* - * Generic, controller-independent functions: - */ - -int show_interrupts(struct seq_file *p, void *v) +int arch_show_interrupts(struct seq_file *p, int prec) { - int i = *(loff_t *) v, j; - struct irqaction * action; - unsigned long flags; - - if (i == 0) { - seq_printf(p, " "); - for_each_online_cpu(j) - seq_printf(p, "CPU%d ", j); - seq_putc(p, '\n'); - } - - if (i < NR_IRQS) { - raw_spin_lock_irqsave(&irq_desc[i].lock, flags); - action = irq_desc[i].action; - if (!action) - goto skip; - seq_printf(p, "%3d: ", i); -#ifndef CONFIG_SMP - seq_printf(p, "%10u ", kstat_irqs(i)); -#else - for_each_online_cpu(j) - seq_printf(p, "%10u ", kstat_irqs_cpu(i, j)); -#endif - seq_printf(p, " %14s", irq_desc[i].chip->name); - seq_printf(p, " %s", action->name); - - for (action=action->next; action; action = action->next) - seq_printf(p, ", %s", action->name); - - seq_putc(p, '\n'); -skip: - raw_spin_unlock_irqrestore(&irq_desc[i].lock, flags); - } else if (i == NR_IRQS) { - seq_putc(p, '\n'); - seq_printf(p, "ERR: %10u\n", atomic_read(&irq_err_count)); - } + seq_printf(p, "%*s: %10u\n", prec, "ERR", atomic_read(&irq_err_count)); return 0; } @@ -183,8 +144,8 @@ void __irq_entry do_IRQ(unsigned int irq) { irq_enter(); check_stack_overflow(); - __DO_IRQ_SMTC_HOOK(irq); - generic_handle_irq(irq); + if (!smtc_handle_on_other_cpu(irq)) + generic_handle_irq(irq); irq_exit(); } @@ -197,7 +158,7 @@ void __irq_entry do_IRQ(unsigned int irq) void __irq_entry do_IRQ_no_affinity(unsigned int irq) { irq_enter(); - __NO_AFFINITY_IRQ_SMTC_HOOK(irq); + smtc_im_backstop(irq); generic_handle_irq(irq); irq_exit(); } diff --git a/arch/mips/kernel/irq_cpu.c b/arch/mips/kernel/irq_cpu.c index 0262abe..fd945c5 100644 --- a/arch/mips/kernel/irq_cpu.c +++ b/arch/mips/kernel/irq_cpu.c @@ -37,42 +37,38 @@ #include <asm/mipsmtregs.h> #include <asm/system.h> -static inline void unmask_mips_irq(unsigned int irq) +static inline void unmask_mips_irq(struct irq_data *d) { - set_c0_status(0x100 << (irq - MIPS_CPU_IRQ_BASE)); + set_c0_status(0x100 << (d->irq - MIPS_CPU_IRQ_BASE)); irq_enable_hazard(); } -static inline void mask_mips_irq(unsigned int irq) +static inline void mask_mips_irq(struct irq_data *d) { - clear_c0_status(0x100 << (irq - MIPS_CPU_IRQ_BASE)); + clear_c0_status(0x100 << (d->irq - MIPS_CPU_IRQ_BASE)); irq_disable_hazard(); } static struct irq_chip mips_cpu_irq_controller = { .name = "MIPS", - .ack = mask_mips_irq, - .mask = mask_mips_irq, - .mask_ack = mask_mips_irq, - .unmask = unmask_mips_irq, - .eoi = unmask_mips_irq, + .irq_ack = mask_mips_irq, + .irq_mask = mask_mips_irq, + .irq_mask_ack = mask_mips_irq, + .irq_unmask = unmask_mips_irq, + .irq_eoi = unmask_mips_irq, }; /* * Basically the same as above but taking care of all the MT stuff */ -#define unmask_mips_mt_irq unmask_mips_irq -#define mask_mips_mt_irq mask_mips_irq - -static unsigned int mips_mt_cpu_irq_startup(unsigned int irq) +static unsigned int mips_mt_cpu_irq_startup(struct irq_data *d) { unsigned int vpflags = dvpe(); - clear_c0_cause(0x100 << (irq - MIPS_CPU_IRQ_BASE)); + clear_c0_cause(0x100 << (d->irq - MIPS_CPU_IRQ_BASE)); evpe(vpflags); - unmask_mips_mt_irq(irq); - + unmask_mips_irq(d); return 0; } @@ -80,22 +76,22 @@ static unsigned int mips_mt_cpu_irq_startup(unsigned int irq) * While we ack the interrupt interrupts are disabled and thus we don't need * to deal with concurrency issues. Same for mips_cpu_irq_end. */ -static void mips_mt_cpu_irq_ack(unsigned int irq) +static void mips_mt_cpu_irq_ack(struct irq_data *d) { unsigned int vpflags = dvpe(); - clear_c0_cause(0x100 << (irq - MIPS_CPU_IRQ_BASE)); + clear_c0_cause(0x100 << (d->irq - MIPS_CPU_IRQ_BASE)); evpe(vpflags); - mask_mips_mt_irq(irq); + mask_mips_irq(d); } static struct irq_chip mips_mt_cpu_irq_controller = { .name = "MIPS", - .startup = mips_mt_cpu_irq_startup, - .ack = mips_mt_cpu_irq_ack, - .mask = mask_mips_mt_irq, - .mask_ack = mips_mt_cpu_irq_ack, - .unmask = unmask_mips_mt_irq, - .eoi = unmask_mips_mt_irq, + .irq_startup = mips_mt_cpu_irq_startup, + .irq_ack = mips_mt_cpu_irq_ack, + .irq_mask = mask_mips_irq, + .irq_mask_ack = mips_mt_cpu_irq_ack, + .irq_unmask = unmask_mips_irq, + .irq_eoi = unmask_mips_irq, }; void __init mips_cpu_irq_init(void) diff --git a/arch/mips/kernel/irq_txx9.c b/arch/mips/kernel/irq_txx9.c index 95a96f6..526e158 100644 --- a/arch/mips/kernel/irq_txx9.c +++ b/arch/mips/kernel/irq_txx9.c @@ -63,9 +63,9 @@ static struct { unsigned char mode; } txx9irq[TXx9_MAX_IR] __read_mostly; -static void txx9_irq_unmask(unsigned int irq) +static void txx9_irq_unmask(struct irq_data *d) { - unsigned int irq_nr = irq - TXX9_IRQ_BASE; + unsigned int irq_nr = d->irq - TXX9_IRQ_BASE; u32 __iomem *ilrp = &txx9_ircptr->ilr[(irq_nr % 16 ) / 2]; int ofs = irq_nr / 16 * 16 + (irq_nr & 1) * 8; @@ -79,9 +79,9 @@ static void txx9_irq_unmask(unsigned int irq) #endif } -static inline void txx9_irq_mask(unsigned int irq) +static inline void txx9_irq_mask(struct irq_data *d) { - unsigned int irq_nr = irq - TXX9_IRQ_BASE; + unsigned int irq_nr = d->irq - TXX9_IRQ_BASE; u32 __iomem *ilrp = &txx9_ircptr->ilr[(irq_nr % 16) / 2]; int ofs = irq_nr / 16 * 16 + (irq_nr & 1) * 8; @@ -99,19 +99,19 @@ static inline void txx9_irq_mask(unsigned int irq) #endif } -static void txx9_irq_mask_ack(unsigned int irq) +static void txx9_irq_mask_ack(struct irq_data *d) { - unsigned int irq_nr = irq - TXX9_IRQ_BASE; + unsigned int irq_nr = d->irq - TXX9_IRQ_BASE; - txx9_irq_mask(irq); + txx9_irq_mask(d); /* clear edge detection */ if (unlikely(TXx9_IRCR_EDGE(txx9irq[irq_nr].mode))) __raw_writel(TXx9_IRSCR_EIClrE | irq_nr, &txx9_ircptr->scr); } -static int txx9_irq_set_type(unsigned int irq, unsigned int flow_type) +static int txx9_irq_set_type(struct irq_data *d, unsigned int flow_type) { - unsigned int irq_nr = irq - TXX9_IRQ_BASE; + unsigned int irq_nr = d->irq - TXX9_IRQ_BASE; u32 cr; u32 __iomem *crp; int ofs; @@ -139,11 +139,11 @@ static int txx9_irq_set_type(unsigned int irq, unsigned int flow_type) static struct irq_chip txx9_irq_chip = { .name = "TXX9", - .ack = txx9_irq_mask_ack, - .mask = txx9_irq_mask, - .mask_ack = txx9_irq_mask_ack, - .unmask = txx9_irq_unmask, - .set_type = txx9_irq_set_type, + .irq_ack = txx9_irq_mask_ack, + .irq_mask = txx9_irq_mask, + .irq_mask_ack = txx9_irq_mask_ack, + .irq_unmask = txx9_irq_unmask, + .irq_set_type = txx9_irq_set_type, }; void __init txx9_irq_init(unsigned long baseaddr) diff --git a/arch/mips/kernel/scall32-o32.S b/arch/mips/kernel/scall32-o32.S index fbaabad..7f5468b 100644 --- a/arch/mips/kernel/scall32-o32.S +++ b/arch/mips/kernel/scall32-o32.S @@ -586,6 +586,10 @@ einval: li v0, -ENOSYS sys sys_fanotify_init 2 sys sys_fanotify_mark 6 sys sys_prlimit64 4 + sys sys_name_to_handle_at 5 + sys sys_open_by_handle_at 3 /* 4340 */ + sys sys_clock_adjtime 2 + sys sys_syncfs 1 .endm /* We pre-compute the number of _instruction_ bytes needed to diff --git a/arch/mips/kernel/scall64-64.S b/arch/mips/kernel/scall64-64.S index 3f41792..a2e1fcb 100644 --- a/arch/mips/kernel/scall64-64.S +++ b/arch/mips/kernel/scall64-64.S @@ -425,4 +425,8 @@ sys_call_table: PTR sys_fanotify_init /* 5295 */ PTR sys_fanotify_mark PTR sys_prlimit64 + PTR sys_name_to_handle_at + PTR sys_open_by_handle_at + PTR sys_clock_adjtime /* 5300 */ + PTR sys_syncfs .size sys_call_table,.-sys_call_table diff --git a/arch/mips/kernel/scall64-n32.S b/arch/mips/kernel/scall64-n32.S index f08ece6..b2c7624 100644 --- a/arch/mips/kernel/scall64-n32.S +++ b/arch/mips/kernel/scall64-n32.S @@ -425,4 +425,8 @@ EXPORT(sysn32_call_table) PTR sys_fanotify_init /* 6300 */ PTR sys_fanotify_mark PTR sys_prlimit64 + PTR sys_name_to_handle_at + PTR sys_open_by_handle_at + PTR compat_sys_clock_adjtime /* 6305 */ + PTR sys_syncfs .size sysn32_call_table,.-sysn32_call_table diff --git a/arch/mips/kernel/scall64-o32.S b/arch/mips/kernel/scall64-o32.S index 78d768a..049a9c8 100644 --- a/arch/mips/kernel/scall64-o32.S +++ b/arch/mips/kernel/scall64-o32.S @@ -543,4 +543,8 @@ sys_call_table: PTR sys_fanotify_init PTR sys_32_fanotify_mark PTR sys_prlimit64 + PTR sys_name_to_handle_at + PTR compat_sys_open_by_handle_at /* 4340 */ + PTR compat_sys_clock_adjtime + PTR sys_syncfs .size sys_call_table,.-sys_call_table diff --git a/arch/mips/kernel/smtc.c b/arch/mips/kernel/smtc.c index 39c0825..f7e2c78 100644 --- a/arch/mips/kernel/smtc.c +++ b/arch/mips/kernel/smtc.c @@ -677,8 +677,9 @@ void smtc_set_irq_affinity(unsigned int irq, cpumask_t affinity) */ } -void smtc_forward_irq(unsigned int irq) +void smtc_forward_irq(struct irq_data *d) { + unsigned int irq = d->irq; int target; /* @@ -692,7 +693,7 @@ void smtc_forward_irq(unsigned int irq) * and efficiency, we just pick the easiest one to find. */ - target = cpumask_first(irq_desc[irq].affinity); + target = cpumask_first(d->affinity); /* * We depend on the platform code to have correctly processed @@ -707,12 +708,10 @@ void smtc_forward_irq(unsigned int irq) */ /* If no one is eligible, service locally */ - if (target >= NR_CPUS) { + if (target >= NR_CPUS) do_IRQ_no_affinity(irq); - return; - } - - smtc_send_ipi(target, IRQ_AFFINITY_IPI, irq); + else + smtc_send_ipi(target, IRQ_AFFINITY_IPI, irq); } #endif /* CONFIG_MIPS_MT_SMTC_IRQAFF */ diff --git a/arch/mips/lasat/interrupt.c b/arch/mips/lasat/interrupt.c index 1353fb1..670e3e7 100644 --- a/arch/mips/lasat/interrupt.c +++ b/arch/mips/lasat/interrupt.c @@ -32,24 +32,24 @@ static volatile int *lasat_int_status; static volatile int *lasat_int_mask; static volatile int lasat_int_mask_shift; -void disable_lasat_irq(unsigned int irq_nr) +void disable_lasat_irq(struct irq_data *d) { - irq_nr -= LASAT_IRQ_BASE; + unsigned int irq_nr = d->irq - LASAT_IRQ_BASE; + *lasat_int_mask &= ~(1 << irq_nr) << lasat_int_mask_shift; } -void enable_lasat_irq(unsigned int irq_nr) +void enable_lasat_irq(struct irq_data *d) { - irq_nr -= LASAT_IRQ_BASE; + unsigned int irq_nr = d->irq - LASAT_IRQ_BASE; + *lasat_int_mask |= (1 << irq_nr) << lasat_int_mask_shift; } static struct irq_chip lasat_irq_type = { .name = "Lasat", - .ack = disable_lasat_irq, - .mask = disable_lasat_irq, - .mask_ack = disable_lasat_irq, - .unmask = enable_lasat_irq, + .irq_mask = disable_lasat_irq, + .irq_unmask = enable_lasat_irq, }; static inline int ls1bit32(unsigned int x) diff --git a/arch/mips/loongson/common/bonito-irq.c b/arch/mips/loongson/common/bonito-irq.c index 2dc2a4c..1549361 100644 --- a/arch/mips/loongson/common/bonito-irq.c +++ b/arch/mips/loongson/common/bonito-irq.c @@ -16,24 +16,22 @@ #include <loongson.h> -static inline void bonito_irq_enable(unsigned int irq) +static inline void bonito_irq_enable(struct irq_data *d) { - LOONGSON_INTENSET = (1 << (irq - LOONGSON_IRQ_BASE)); + LOONGSON_INTENSET = (1 << (d->irq - LOONGSON_IRQ_BASE)); mmiowb(); } -static inline void bonito_irq_disable(unsigned int irq) +static inline void bonito_irq_disable(struct irq_data *d) { - LOONGSON_INTENCLR = (1 << (irq - LOONGSON_IRQ_BASE)); + LOONGSON_INTENCLR = (1 << (d->irq - LOONGSON_IRQ_BASE)); mmiowb(); } static struct irq_chip bonito_irq_type = { - .name = "bonito_irq", - .ack = bonito_irq_disable, - .mask = bonito_irq_disable, - .mask_ack = bonito_irq_disable, - .unmask = bonito_irq_enable, + .name = "bonito_irq", + .irq_mask = bonito_irq_disable, + .irq_unmask = bonito_irq_enable, }; static struct irqaction __maybe_unused dma_timeout_irqaction = { diff --git a/arch/mips/mipssim/sim_smtc.c b/arch/mips/mipssim/sim_smtc.c index 5da30b6..30df472 100644 --- a/arch/mips/mipssim/sim_smtc.c +++ b/arch/mips/mipssim/sim_smtc.c @@ -27,6 +27,7 @@ #include <asm/atomic.h> #include <asm/cpu.h> #include <asm/processor.h> +#include <asm/smtc.h> #include <asm/system.h> #include <asm/mmu_context.h> #include <asm/smtc_ipi.h> @@ -57,8 +58,6 @@ static inline void ssmtc_send_ipi_mask(const struct cpumask *mask, */ static void __cpuinit ssmtc_init_secondary(void) { - void smtc_init_secondary(void); - smtc_init_secondary(); } diff --git a/arch/mips/mti-malta/malta-smtc.c b/arch/mips/mti-malta/malta-smtc.c index 192cfd2..e678915 100644 --- a/arch/mips/mti-malta/malta-smtc.c +++ b/arch/mips/mti-malta/malta-smtc.c @@ -34,7 +34,6 @@ static void msmtc_send_ipi_mask(const struct cpumask *mask, unsigned int action) */ static void __cpuinit msmtc_init_secondary(void) { - void smtc_init_secondary(void); int myvpe; /* Don't enable Malta I/O interrupts (IP2) for secondary VPEs */ @@ -114,7 +113,8 @@ struct plat_smp_ops msmtc_smp_ops = { */ -int plat_set_irq_affinity(unsigned int irq, const struct cpumask *affinity) +int plat_set_irq_affinity(struct irq_data *d, const struct cpumask *affinity, + bool force) { cpumask_t tmask; int cpu = 0; @@ -144,7 +144,7 @@ int plat_set_irq_affinity(unsigned int irq, const struct cpumask *affinity) if ((cpu_data[cpu].vpe_id != 0) || !cpu_online(cpu)) cpu_clear(cpu, tmask); } - cpumask_copy(irq_desc[irq].affinity, &tmask); + cpumask_copy(d->affinity, &tmask); if (cpus_empty(tmask)) /* @@ -155,8 +155,8 @@ int plat_set_irq_affinity(unsigned int irq, const struct cpumask *affinity) "IRQ affinity leaves no legal CPU for IRQ %d\n", irq); /* Do any generic SMTC IRQ affinity setup */ - smtc_set_irq_affinity(irq, tmask); + smtc_set_irq_affinity(d->irq, tmask); - return 0; + return IRQ_SET_MASK_OK_NOCOPY; } #endif /* CONFIG_MIPS_MT_SMTC_IRQAFF */ diff --git a/arch/mips/oprofile/Makefile b/arch/mips/oprofile/Makefile index 02cc65e..4b9d704 100644 --- a/arch/mips/oprofile/Makefile +++ b/arch/mips/oprofile/Makefile @@ -1,4 +1,4 @@ -EXTRA_CFLAGS := -Werror +ccflags-y := -Werror obj-$(CONFIG_OPROFILE) += oprofile.o diff --git a/arch/mips/pmc-sierra/Kconfig b/arch/mips/pmc-sierra/Kconfig index 8d79849..bbd7608 100644 --- a/arch/mips/pmc-sierra/Kconfig +++ b/arch/mips/pmc-sierra/Kconfig @@ -23,6 +23,8 @@ config PMC_MSP7120_GW select SYS_SUPPORTS_MULTITHREADING select IRQ_MSP_CIC select HW_HAS_PCI + select MSP_HAS_USB + select MSP_ETH config PMC_MSP7120_FPGA bool "PMC-Sierra MSP7120 FPGA" @@ -35,3 +37,16 @@ endchoice config HYPERTRANSPORT bool "Hypertransport Support for PMC-Sierra Yosemite" depends on PMC_YOSEMITE + +config MSP_HAS_USB + boolean + depends on PMC_MSP + +config MSP_ETH + boolean + select MSP_HAS_MAC + depends on PMC_MSP + +config MSP_HAS_MAC + boolean + depends on PMC_MSP diff --git a/arch/mips/pmc-sierra/msp71xx/Makefile b/arch/mips/pmc-sierra/msp71xx/Makefile index e107f79..cefba77 100644 --- a/arch/mips/pmc-sierra/msp71xx/Makefile +++ b/arch/mips/pmc-sierra/msp71xx/Makefile @@ -6,7 +6,9 @@ obj-y += msp_prom.o msp_setup.o msp_irq.o \ obj-$(CONFIG_HAVE_GPIO_LIB) += gpio.o gpio_extended.o obj-$(CONFIG_PMC_MSP7120_GW) += msp_hwbutton.o obj-$(CONFIG_IRQ_MSP_SLP) += msp_irq_slp.o -obj-$(CONFIG_IRQ_MSP_CIC) += msp_irq_cic.o +obj-$(CONFIG_IRQ_MSP_CIC) += msp_irq_cic.o msp_irq_per.o obj-$(CONFIG_PCI) += msp_pci.o -obj-$(CONFIG_MSPETH) += msp_eth.o -obj-$(CONFIG_USB_MSP71XX) += msp_usb.o +obj-$(CONFIG_MSP_HAS_MAC) += msp_eth.o +obj-$(CONFIG_MSP_HAS_USB) += msp_usb.o +obj-$(CONFIG_MIPS_MT_SMP) += msp_smp.o +obj-$(CONFIG_MIPS_MT_SMTC) += msp_smtc.o diff --git a/arch/mips/pmc-sierra/msp71xx/msp_eth.c b/arch/mips/pmc-sierra/msp71xx/msp_eth.c new file mode 100644 index 0000000..c584df3 --- /dev/null +++ b/arch/mips/pmc-sierra/msp71xx/msp_eth.c @@ -0,0 +1,187 @@ +/* + * The setup file for ethernet related hardware on PMC-Sierra MSP processors. + * + * Copyright 2010 PMC-Sierra, Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include <linux/init.h> +#include <linux/kernel.h> +#include <linux/ioport.h> +#include <linux/platform_device.h> +#include <linux/delay.h> +#include <msp_regs.h> +#include <msp_int.h> +#include <msp_gpio_macros.h> + + +#define MSP_ETHERNET_GPIO0 14 +#define MSP_ETHERNET_GPIO1 15 +#define MSP_ETHERNET_GPIO2 16 + +#ifdef CONFIG_MSP_HAS_TSMAC +#define MSP_TSMAC_SIZE 0x10020 +#define MSP_TSMAC_ID "pmc_tsmac" + +static struct resource msp_tsmac0_resources[] = { + [0] = { + .start = MSP_MAC0_BASE, + .end = MSP_MAC0_BASE + MSP_TSMAC_SIZE - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = MSP_INT_MAC0, + .end = MSP_INT_MAC0, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct resource msp_tsmac1_resources[] = { + [0] = { + .start = MSP_MAC1_BASE, + .end = MSP_MAC1_BASE + MSP_TSMAC_SIZE - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = MSP_INT_MAC1, + .end = MSP_INT_MAC1, + .flags = IORESOURCE_IRQ, + }, +}; +static struct resource msp_tsmac2_resources[] = { + [0] = { + .start = MSP_MAC2_BASE, + .end = MSP_MAC2_BASE + MSP_TSMAC_SIZE - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = MSP_INT_SAR, + .end = MSP_INT_SAR, + .flags = IORESOURCE_IRQ, + }, +}; + + +static struct platform_device tsmac_device[] = { + [0] = { + .name = MSP_TSMAC_ID, + .id = 0, + .num_resources = ARRAY_SIZE(msp_tsmac0_resources), + .resource = msp_tsmac0_resources, + }, + [1] = { + .name = MSP_TSMAC_ID, + .id = 1, + .num_resources = ARRAY_SIZE(msp_tsmac1_resources), + .resource = msp_tsmac1_resources, + }, + [2] = { + .name = MSP_TSMAC_ID, + .id = 2, + .num_resources = ARRAY_SIZE(msp_tsmac2_resources), + .resource = msp_tsmac2_resources, + }, +}; +#define msp_eth_devs tsmac_device + +#else +/* If it is not TSMAC assume MSP_ETH (100Mbps) */ +#define MSP_ETH_ID "pmc_mspeth" +#define MSP_ETH_SIZE 0xE0 +static struct resource msp_eth0_resources[] = { + [0] = { + .start = MSP_MAC0_BASE, + .end = MSP_MAC0_BASE + MSP_ETH_SIZE - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = MSP_INT_MAC0, + .end = MSP_INT_MAC0, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct resource msp_eth1_resources[] = { + [0] = { + .start = MSP_MAC1_BASE, + .end = MSP_MAC1_BASE + MSP_ETH_SIZE - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = MSP_INT_MAC1, + .end = MSP_INT_MAC1, + .flags = IORESOURCE_IRQ, + }, +}; + + + +static struct platform_device mspeth_device[] = { + [0] = { + .name = MSP_ETH_ID, + .id = 0, + .num_resources = ARRAY_SIZE(msp_eth0_resources), + .resource = msp_eth0_resources, + }, + [1] = { + .name = MSP_ETH_ID, + .id = 1, + .num_resources = ARRAY_SIZE(msp_eth1_resources), + .resource = msp_eth1_resources, + }, + +}; +#define msp_eth_devs mspeth_device + +#endif +int __init msp_eth_setup(void) +{ + int i, ret = 0; + + /* Configure the GPIO and take the ethernet PHY out of reset */ + msp_gpio_pin_mode(MSP_GPIO_OUTPUT, MSP_ETHERNET_GPIO0); + msp_gpio_pin_hi(MSP_ETHERNET_GPIO0); + +#ifdef CONFIG_MSP_HAS_TSMAC + /* 3 phys on boards with TSMAC */ + msp_gpio_pin_mode(MSP_GPIO_OUTPUT, MSP_ETHERNET_GPIO1); + msp_gpio_pin_hi(MSP_ETHERNET_GPIO1); + + msp_gpio_pin_mode(MSP_GPIO_OUTPUT, MSP_ETHERNET_GPIO2); + msp_gpio_pin_hi(MSP_ETHERNET_GPIO2); +#endif + for (i = 0; i < ARRAY_SIZE(msp_eth_devs); i++) { + ret = platform_device_register(&msp_eth_devs[i]); + printk(KERN_INFO "device: %d, return value = %d\n", i, ret); + if (ret) { + platform_device_unregister(&msp_eth_devs[i]); + break; + } + } + + if (ret) + printk(KERN_WARNING "Could not initialize " + "MSPETH device structures.\n"); + + return ret; +} +subsys_initcall(msp_eth_setup); diff --git a/arch/mips/pmc-sierra/msp71xx/msp_irq.c b/arch/mips/pmc-sierra/msp71xx/msp_irq.c index 734d598..4531c4a 100644 --- a/arch/mips/pmc-sierra/msp71xx/msp_irq.c +++ b/arch/mips/pmc-sierra/msp71xx/msp_irq.c @@ -19,8 +19,6 @@ #include <msp_int.h> -extern void msp_int_handle(void); - /* SLP bases systems */ extern void msp_slp_irq_init(void); extern void msp_slp_irq_dispatch(void); @@ -29,6 +27,18 @@ extern void msp_slp_irq_dispatch(void); extern void msp_cic_irq_init(void); extern void msp_cic_irq_dispatch(void); +/* VSMP support init */ +extern void msp_vsmp_int_init(void); + +/* vectored interrupt implementation */ + +/* SW0/1 interrupts are used for SMP/SMTC */ +static inline void mac0_int_dispatch(void) { do_IRQ(MSP_INT_MAC0); } +static inline void mac1_int_dispatch(void) { do_IRQ(MSP_INT_MAC1); } +static inline void mac2_int_dispatch(void) { do_IRQ(MSP_INT_SAR); } +static inline void usb_int_dispatch(void) { do_IRQ(MSP_INT_USB); } +static inline void sec_int_dispatch(void) { do_IRQ(MSP_INT_SEC); } + /* * The PMC-Sierra MSP interrupts are arranged in a 3 level cascaded * hierarchical system. The first level are the direct MIPS interrupts @@ -96,29 +106,57 @@ asmlinkage void plat_irq_dispatch(struct pt_regs *regs) do_IRQ(MSP_INT_SW1); } -static struct irqaction cascade_msp = { +static struct irqaction cic_cascade_msp = { .handler = no_action, - .name = "MSP cascade" + .name = "MSP CIC cascade" }; +static struct irqaction per_cascade_msp = { + .handler = no_action, + .name = "MSP PER cascade" +}; void __init arch_init_irq(void) { + /* assume we'll be using vectored interrupt mode except in UP mode*/ +#ifdef CONFIG_MIPS_MT + BUG_ON(!cpu_has_vint); +#endif /* initialize the 1st-level CPU based interrupt controller */ mips_cpu_irq_init(); #ifdef CONFIG_IRQ_MSP_CIC msp_cic_irq_init(); - +#ifdef CONFIG_MIPS_MT + set_vi_handler(MSP_INT_CIC, msp_cic_irq_dispatch); + set_vi_handler(MSP_INT_MAC0, mac0_int_dispatch); + set_vi_handler(MSP_INT_MAC1, mac1_int_dispatch); + set_vi_handler(MSP_INT_SAR, mac2_int_dispatch); + set_vi_handler(MSP_INT_USB, usb_int_dispatch); + set_vi_handler(MSP_INT_SEC, sec_int_dispatch); +#ifdef CONFIG_MIPS_MT_SMP + msp_vsmp_int_init(); +#elif defined CONFIG_MIPS_MT_SMTC + /*Set hwmask for all platform devices */ + irq_hwmask[MSP_INT_MAC0] = C_IRQ0; + irq_hwmask[MSP_INT_MAC1] = C_IRQ1; + irq_hwmask[MSP_INT_USB] = C_IRQ2; + irq_hwmask[MSP_INT_SAR] = C_IRQ3; + irq_hwmask[MSP_INT_SEC] = C_IRQ5; + +#endif /* CONFIG_MIPS_MT_SMP */ +#endif /* CONFIG_MIPS_MT */ /* setup the cascaded interrupts */ - setup_irq(MSP_INT_CIC, &cascade_msp); - setup_irq(MSP_INT_PER, &cascade_msp); + setup_irq(MSP_INT_CIC, &cic_cascade_msp); + setup_irq(MSP_INT_PER, &per_cascade_msp); + #else /* setup the 2nd-level SLP register based interrupt controller */ + /* VSMP /SMTC support support is not enabled for SLP */ msp_slp_irq_init(); /* setup the cascaded SLP/PER interrupts */ - setup_irq(MSP_INT_SLP, &cascade_msp); - setup_irq(MSP_INT_PER, &cascade_msp); + setup_irq(MSP_INT_SLP, &cic_cascade_msp); + setup_irq(MSP_INT_PER, &per_cascade_msp); #endif } diff --git a/arch/mips/pmc-sierra/msp71xx/msp_irq_cic.c b/arch/mips/pmc-sierra/msp71xx/msp_irq_cic.c index 07e71ff..352f29d 100644 --- a/arch/mips/pmc-sierra/msp71xx/msp_irq_cic.c +++ b/arch/mips/pmc-sierra/msp71xx/msp_irq_cic.c @@ -1,8 +1,7 @@ /* - * This file define the irq handler for MSP SLM subsystem interrupts. + * Copyright 2010 PMC-Sierra, Inc, derived from irq_cpu.c * - * Copyright 2005-2007 PMC-Sierra, Inc, derived from irq_cpu.c - * Author: Andrew Hughes, Andrew_Hughes@pmc-sierra.com + * This file define the irq handler for MSP CIC subsystem interrupts. * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the @@ -16,119 +15,203 @@ #include <linux/bitops.h> #include <linux/irq.h> +#include <asm/mipsregs.h> #include <asm/system.h> #include <msp_cic_int.h> #include <msp_regs.h> /* - * NOTE: We are only enabling support for VPE0 right now. + * External API */ +extern void msp_per_irq_init(void); +extern void msp_per_irq_dispatch(void); -static inline void unmask_msp_cic_irq(unsigned int irq) + +/* + * Convenience Macro. Should be somewhere generic. + */ +#define get_current_vpe() \ + ((read_c0_tcbind() >> TCBIND_CURVPE_SHIFT) & TCBIND_CURVPE) + +#ifdef CONFIG_SMP + +#define LOCK_VPE(flags, mtflags) \ +do { \ + local_irq_save(flags); \ + mtflags = dmt(); \ +} while (0) + +#define UNLOCK_VPE(flags, mtflags) \ +do { \ + emt(mtflags); \ + local_irq_restore(flags);\ +} while (0) + +#define LOCK_CORE(flags, mtflags) \ +do { \ + local_irq_save(flags); \ + mtflags = dvpe(); \ +} while (0) + +#define UNLOCK_CORE(flags, mtflags) \ +do { \ + evpe(mtflags); \ + local_irq_restore(flags);\ +} while (0) + +#else + +#define LOCK_VPE(flags, mtflags) +#define UNLOCK_VPE(flags, mtflags) +#endif + +/* ensure writes to cic are completed */ +static inline void cic_wmb(void) { + const volatile void __iomem *cic_mem = CIC_VPE0_MSK_REG; + volatile u32 dummy_read; - /* check for PER interrupt range */ - if (irq < MSP_PER_INTBASE) - *CIC_VPE0_MSK_REG |= (1 << (irq - MSP_CIC_INTBASE)); - else - *PER_INT_MSK_REG |= (1 << (irq - MSP_PER_INTBASE)); + wmb(); + dummy_read = __raw_readl(cic_mem); + dummy_read++; } -static inline void mask_msp_cic_irq(unsigned int irq) +static void unmask_cic_irq(struct irq_data *d) { - /* check for PER interrupt range */ - if (irq < MSP_PER_INTBASE) - *CIC_VPE0_MSK_REG &= ~(1 << (irq - MSP_CIC_INTBASE)); - else - *PER_INT_MSK_REG &= ~(1 << (irq - MSP_PER_INTBASE)); + volatile u32 *cic_msk_reg = CIC_VPE0_MSK_REG; + int vpe; +#ifdef CONFIG_SMP + unsigned int mtflags; + unsigned long flags; + + /* + * Make sure we have IRQ affinity. It may have changed while + * we were processing the IRQ. + */ + if (!cpumask_test_cpu(smp_processor_id(), d->affinity)) + return; +#endif + + vpe = get_current_vpe(); + LOCK_VPE(flags, mtflags); + cic_msk_reg[vpe] |= (1 << (d->irq - MSP_CIC_INTBASE)); + UNLOCK_VPE(flags, mtflags); + cic_wmb(); } -/* - * While we ack the interrupt interrupts are disabled and thus we don't need - * to deal with concurrency issues. Same for msp_cic_irq_end. - */ -static inline void ack_msp_cic_irq(unsigned int irq) +static void mask_cic_irq(struct irq_data *d) { - mask_msp_cic_irq(irq); - + volatile u32 *cic_msk_reg = CIC_VPE0_MSK_REG; + int vpe = get_current_vpe(); +#ifdef CONFIG_SMP + unsigned long flags, mtflags; +#endif + LOCK_VPE(flags, mtflags); + cic_msk_reg[vpe] &= ~(1 << (d->irq - MSP_CIC_INTBASE)); + UNLOCK_VPE(flags, mtflags); + cic_wmb(); +} +static void msp_cic_irq_ack(struct irq_data *d) +{ + mask_cic_irq(d); /* - * only really necessary for 18, 16-14 and sometimes 3:0 (since - * these can be edge sensitive) but it doesn't hurt for the others. - */ - - /* check for PER interrupt range */ - if (irq < MSP_PER_INTBASE) - *CIC_STS_REG = (1 << (irq - MSP_CIC_INTBASE)); - else - *PER_INT_STS_REG = (1 << (irq - MSP_PER_INTBASE)); + * Only really necessary for 18, 16-14 and sometimes 3:0 + * (since these can be edge sensitive) but it doesn't + * hurt for the others + */ + *CIC_STS_REG = (1 << (d->irq - MSP_CIC_INTBASE)); + smtc_im_ack_irq(d->irq); } +/*Note: Limiting to VSMP . Not tested in SMTC */ + +#ifdef CONFIG_MIPS_MT_SMP +static int msp_cic_irq_set_affinity(struct irq_data *d, + const struct cpumask *cpumask, bool force) +{ + int cpu; + unsigned long flags; + unsigned int mtflags; + unsigned long imask = (1 << (irq - MSP_CIC_INTBASE)); + volatile u32 *cic_mask = (volatile u32 *)CIC_VPE0_MSK_REG; + + /* timer balancing should be disabled in kernel code */ + BUG_ON(irq == MSP_INT_VPE0_TIMER || irq == MSP_INT_VPE1_TIMER); + + LOCK_CORE(flags, mtflags); + /* enable if any of each VPE's TCs require this IRQ */ + for_each_online_cpu(cpu) { + if (cpumask_test_cpu(cpu, cpumask)) + cic_mask[cpu] |= imask; + else + cic_mask[cpu] &= ~imask; + + } + + UNLOCK_CORE(flags, mtflags); + return 0; + +} +#endif + static struct irq_chip msp_cic_irq_controller = { .name = "MSP_CIC", - .ack = ack_msp_cic_irq, - .mask = ack_msp_cic_irq, - .mask_ack = ack_msp_cic_irq, - .unmask = unmask_msp_cic_irq, + .irq_mask = mask_cic_irq, + .irq_mask_ack = msp_cic_irq_ack, + .irq_unmask = unmask_cic_irq, + .irq_ack = msp_cic_irq_ack, +#ifdef CONFIG_MIPS_MT_SMP + .irq_set_affinity = msp_cic_irq_set_affinity, +#endif }; - void __init msp_cic_irq_init(void) { int i; - /* Mask/clear interrupts. */ *CIC_VPE0_MSK_REG = 0x00000000; - *PER_INT_MSK_REG = 0x00000000; + *CIC_VPE1_MSK_REG = 0x00000000; *CIC_STS_REG = 0xFFFFFFFF; - *PER_INT_STS_REG = 0xFFFFFFFF; - -#if defined(CONFIG_PMC_MSP7120_GW) || \ - defined(CONFIG_PMC_MSP7120_EVAL) /* - * The MSP7120 RG and EVBD boards use IRQ[6:4] for PCI. - * These inputs map to EXT_INT_POL[6:4] inside the CIC. - * They are to be active low, level sensitive. - */ + * The MSP7120 RG and EVBD boards use IRQ[6:4] for PCI. + * These inputs map to EXT_INT_POL[6:4] inside the CIC. + * They are to be active low, level sensitive. + */ *CIC_EXT_CFG_REG &= 0xFFFF8F8F; -#endif /* initialize all the IRQ descriptors */ - for (i = MSP_CIC_INTBASE; i < MSP_PER_INTBASE + 32; i++) + for (i = MSP_CIC_INTBASE ; i < MSP_CIC_INTBASE + 32 ; i++) { set_irq_chip_and_handler(i, &msp_cic_irq_controller, handle_level_irq); +#ifdef CONFIG_MIPS_MT_SMTC + /* Mask of CIC interrupt */ + irq_hwmask[i] = C_IRQ4; +#endif + } + + /* Initialize the PER interrupt sub-system */ + msp_per_irq_init(); } +/* CIC masked by CIC vector processing before dispatch called */ void msp_cic_irq_dispatch(void) { - u32 pending; - int intbase; - - intbase = MSP_CIC_INTBASE; - pending = *CIC_STS_REG & *CIC_VPE0_MSK_REG; - - /* check for PER interrupt */ - if (pending == (1 << (MSP_INT_PER - MSP_CIC_INTBASE))) { - intbase = MSP_PER_INTBASE; - pending = *PER_INT_STS_REG & *PER_INT_MSK_REG; - } - - /* check for spurious interrupt */ - if (pending == 0x00000000) { - printk(KERN_ERR - "Spurious %s interrupt? status %08x, mask %08x\n", - (intbase == MSP_CIC_INTBASE) ? "CIC" : "PER", - (intbase == MSP_CIC_INTBASE) ? - *CIC_STS_REG : *PER_INT_STS_REG, - (intbase == MSP_CIC_INTBASE) ? - *CIC_VPE0_MSK_REG : *PER_INT_MSK_REG); - return; - } - - /* check for the timer and dispatch it first */ - if ((intbase == MSP_CIC_INTBASE) && - (pending & (1 << (MSP_INT_VPE0_TIMER - MSP_CIC_INTBASE)))) + volatile u32 *cic_msk_reg = (volatile u32 *)CIC_VPE0_MSK_REG; + u32 cic_mask; + u32 pending; + int cic_status = *CIC_STS_REG; + cic_mask = cic_msk_reg[get_current_vpe()]; + pending = cic_status & cic_mask; + if (pending & (1 << (MSP_INT_VPE0_TIMER - MSP_CIC_INTBASE))) { do_IRQ(MSP_INT_VPE0_TIMER); - else - do_IRQ(ffs(pending) + intbase - 1); + } else if (pending & (1 << (MSP_INT_VPE1_TIMER - MSP_CIC_INTBASE))) { + do_IRQ(MSP_INT_VPE1_TIMER); + } else if (pending & (1 << (MSP_INT_PER - MSP_CIC_INTBASE))) { + msp_per_irq_dispatch(); + } else if (pending) { + do_IRQ(ffs(pending) + MSP_CIC_INTBASE - 1); + } else{ + spurious_interrupt(); + } } diff --git a/arch/mips/pmc-sierra/msp71xx/msp_irq_per.c b/arch/mips/pmc-sierra/msp71xx/msp_irq_per.c new file mode 100644 index 0000000..f9b9dcd --- /dev/null +++ b/arch/mips/pmc-sierra/msp71xx/msp_irq_per.c @@ -0,0 +1,135 @@ +/* + * Copyright 2010 PMC-Sierra, Inc, derived from irq_cpu.c + * + * This file define the irq handler for MSP PER subsystem interrupts. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#include <linux/init.h> +#include <linux/interrupt.h> +#include <linux/kernel.h> +#include <linux/spinlock.h> +#include <linux/bitops.h> + +#include <asm/mipsregs.h> +#include <asm/system.h> + +#include <msp_cic_int.h> +#include <msp_regs.h> + + +/* + * Convenience Macro. Should be somewhere generic. + */ +#define get_current_vpe() \ + ((read_c0_tcbind() >> TCBIND_CURVPE_SHIFT) & TCBIND_CURVPE) + +#ifdef CONFIG_SMP +/* + * The PER registers must be protected from concurrent access. + */ + +static DEFINE_SPINLOCK(per_lock); +#endif + +/* ensure writes to per are completed */ + +static inline void per_wmb(void) +{ + const volatile void __iomem *per_mem = PER_INT_MSK_REG; + volatile u32 dummy_read; + + wmb(); + dummy_read = __raw_readl(per_mem); + dummy_read++; +} + +static inline void unmask_per_irq(struct irq_data *d) +{ +#ifdef CONFIG_SMP + unsigned long flags; + spin_lock_irqsave(&per_lock, flags); + *PER_INT_MSK_REG |= (1 << (d->irq - MSP_PER_INTBASE)); + spin_unlock_irqrestore(&per_lock, flags); +#else + *PER_INT_MSK_REG |= (1 << (d->irq - MSP_PER_INTBASE)); +#endif + per_wmb(); +} + +static inline void mask_per_irq(struct irq_data *d) +{ +#ifdef CONFIG_SMP + unsigned long flags; + spin_lock_irqsave(&per_lock, flags); + *PER_INT_MSK_REG &= ~(1 << (d->irq - MSP_PER_INTBASE)); + spin_unlock_irqrestore(&per_lock, flags); +#else + *PER_INT_MSK_REG &= ~(1 << (d->irq - MSP_PER_INTBASE)); +#endif + per_wmb(); +} + +static inline void msp_per_irq_ack(struct irq_data *d) +{ + mask_per_irq(d); + /* + * In the PER interrupt controller, only bits 11 and 10 + * are write-to-clear, (SPI TX complete, SPI RX complete). + * It does nothing for any others. + */ + *PER_INT_STS_REG = (1 << (d->irq - MSP_PER_INTBASE)); +} + +#ifdef CONFIG_SMP +static int msp_per_irq_set_affinity(struct irq_data *d, + const struct cpumask *affinity, bool force) +{ + /* WTF is this doing ????? */ + unmask_per_irq(d); + return 0; +} +#endif + +static struct irq_chip msp_per_irq_controller = { + .name = "MSP_PER", + .irq_enable = unmask_per_irq. + .irq_disable = mask_per_irq, + .irq_ack = msp_per_irq_ack, +#ifdef CONFIG_SMP + .irq_set_affinity = msp_per_irq_set_affinity, +#endif +}; + +void __init msp_per_irq_init(void) +{ + int i; + /* Mask/clear interrupts. */ + *PER_INT_MSK_REG = 0x00000000; + *PER_INT_STS_REG = 0xFFFFFFFF; + /* initialize all the IRQ descriptors */ + for (i = MSP_PER_INTBASE; i < MSP_PER_INTBASE + 32; i++) { + irq_set_chip(i, &msp_per_irq_controller); +#ifdef CONFIG_MIPS_MT_SMTC + irq_hwmask[i] = C_IRQ4; +#endif + } +} + +void msp_per_irq_dispatch(void) +{ + u32 per_mask = *PER_INT_MSK_REG; + u32 per_status = *PER_INT_STS_REG; + u32 pending; + + pending = per_status & per_mask; + if (pending) { + do_IRQ(ffs(pending) + MSP_PER_INTBASE - 1); + } else { + spurious_interrupt(); + } +} diff --git a/arch/mips/pmc-sierra/msp71xx/msp_irq_slp.c b/arch/mips/pmc-sierra/msp71xx/msp_irq_slp.c index 61f3902..8f51e4a 100644 --- a/arch/mips/pmc-sierra/msp71xx/msp_irq_slp.c +++ b/arch/mips/pmc-sierra/msp71xx/msp_irq_slp.c @@ -21,8 +21,10 @@ #include <msp_slp_int.h> #include <msp_regs.h> -static inline void unmask_msp_slp_irq(unsigned int irq) +static inline void unmask_msp_slp_irq(struct irq_data *d) { + unsigned int irq = d->irq; + /* check for PER interrupt range */ if (irq < MSP_PER_INTBASE) *SLP_INT_MSK_REG |= (1 << (irq - MSP_SLP_INTBASE)); @@ -30,8 +32,10 @@ static inline void unmask_msp_slp_irq(unsigned int irq) *PER_INT_MSK_REG |= (1 << (irq - MSP_PER_INTBASE)); } -static inline void mask_msp_slp_irq(unsigned int irq) +static inline void mask_msp_slp_irq(struct irq_data *d) { + unsigned int irq = d->irq; + /* check for PER interrupt range */ if (irq < MSP_PER_INTBASE) *SLP_INT_MSK_REG &= ~(1 << (irq - MSP_SLP_INTBASE)); @@ -43,8 +47,10 @@ static inline void mask_msp_slp_irq(unsigned int irq) * While we ack the interrupt interrupts are disabled and thus we don't need * to deal with concurrency issues. Same for msp_slp_irq_end. */ -static inline void ack_msp_slp_irq(unsigned int irq) +static inline void ack_msp_slp_irq(struct irq_data *d) { + unsigned int irq = d->irq; + /* check for PER interrupt range */ if (irq < MSP_PER_INTBASE) *SLP_INT_STS_REG = (1 << (irq - MSP_SLP_INTBASE)); @@ -54,9 +60,9 @@ static inline void ack_msp_slp_irq(unsigned int irq) static struct irq_chip msp_slp_irq_controller = { .name = "MSP_SLP", - .ack = ack_msp_slp_irq, - .mask = mask_msp_slp_irq, - .unmask = unmask_msp_slp_irq, + .irq_ack = ack_msp_slp_irq, + .irq_mask = mask_msp_slp_irq, + .irq_unmask = unmask_msp_slp_irq, }; void __init msp_slp_irq_init(void) diff --git a/arch/mips/pmc-sierra/msp71xx/msp_setup.c b/arch/mips/pmc-sierra/msp71xx/msp_setup.c index a54e85b..fb37a10 100644 --- a/arch/mips/pmc-sierra/msp71xx/msp_setup.c +++ b/arch/mips/pmc-sierra/msp71xx/msp_setup.c @@ -146,6 +146,8 @@ void __init plat_mem_setup(void) pm_power_off = msp_power_off; } +extern struct plat_smp_ops msp_smtc_smp_ops; + void __init prom_init(void) { unsigned long family; @@ -226,6 +228,14 @@ void __init prom_init(void) */ msp_serial_setup(); +#ifdef CONFIG_MIPS_MT_SMP + register_smp_ops(&vsmp_smp_ops); +#endif + +#ifdef CONFIG_MIPS_MT_SMTC + register_smp_ops(&msp_smtc_smp_ops); +#endif + #ifdef CONFIG_PMCTWILED /* * Setup LED states before the subsys_initcall loads other diff --git a/arch/mips/pmc-sierra/msp71xx/msp_smp.c b/arch/mips/pmc-sierra/msp71xx/msp_smp.c new file mode 100644 index 0000000..43a9e26 --- /dev/null +++ b/arch/mips/pmc-sierra/msp71xx/msp_smp.c @@ -0,0 +1,77 @@ +/* + * Copyright (C) 2000, 2001, 2004 MIPS Technologies, Inc. + * Copyright (C) 2001 Ralf Baechle + * Copyright (C) 2010 PMC-Sierra, Inc. + * + * VSMP support for MSP platforms . Derived from malta vsmp support. + * + * This program is free software; you can distribute it and/or modify it + * under the terms of the GNU General Public License (Version 2) as + * published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + * for more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. + * + */ +#include <linux/smp.h> +#include <linux/interrupt.h> + +#ifdef CONFIG_MIPS_MT_SMP +#define MIPS_CPU_IPI_RESCHED_IRQ 0 /* SW int 0 for resched */ +#define MIPS_CPU_IPI_CALL_IRQ 1 /* SW int 1 for call */ + + +static void ipi_resched_dispatch(void) +{ + do_IRQ(MIPS_CPU_IPI_RESCHED_IRQ); +} + +static void ipi_call_dispatch(void) +{ + do_IRQ(MIPS_CPU_IPI_CALL_IRQ); +} + +static irqreturn_t ipi_resched_interrupt(int irq, void *dev_id) +{ + return IRQ_HANDLED; +} + +static irqreturn_t ipi_call_interrupt(int irq, void *dev_id) +{ + smp_call_function_interrupt(); + + return IRQ_HANDLED; +} + +static struct irqaction irq_resched = { + .handler = ipi_resched_interrupt, + .flags = IRQF_DISABLED | IRQF_PERCPU, + .name = "IPI_resched" +}; + +static struct irqaction irq_call = { + .handler = ipi_call_interrupt, + .flags = IRQF_DISABLED | IRQF_PERCPU, + .name = "IPI_call" +}; + +void __init arch_init_ipiirq(int irq, struct irqaction *action) +{ + setup_irq(irq, action); + set_irq_handler(irq, handle_percpu_irq); +} + +void __init msp_vsmp_int_init(void) +{ + set_vi_handler(MIPS_CPU_IPI_RESCHED_IRQ, ipi_resched_dispatch); + set_vi_handler(MIPS_CPU_IPI_CALL_IRQ, ipi_call_dispatch); + arch_init_ipiirq(MIPS_CPU_IPI_RESCHED_IRQ, &irq_resched); + arch_init_ipiirq(MIPS_CPU_IPI_CALL_IRQ, &irq_call); +} +#endif /* CONFIG_MIPS_MT_SMP */ diff --git a/arch/mips/pmc-sierra/msp71xx/msp_smtc.c b/arch/mips/pmc-sierra/msp71xx/msp_smtc.c new file mode 100644 index 0000000..c8dcc1c --- /dev/null +++ b/arch/mips/pmc-sierra/msp71xx/msp_smtc.c @@ -0,0 +1,105 @@ +/* + * MSP71xx Platform-specific hooks for SMP operation + */ +#include <linux/irq.h> +#include <linux/init.h> + +#include <asm/mipsmtregs.h> +#include <asm/mipsregs.h> +#include <asm/smtc.h> +#include <asm/smtc_ipi.h> + +/* VPE/SMP Prototype implements platform interfaces directly */ + +/* + * Cause the specified action to be performed on a targeted "CPU" + */ + +static void msp_smtc_send_ipi_single(int cpu, unsigned int action) +{ + /* "CPU" may be TC of same VPE, VPE of same CPU, or different CPU */ + smtc_send_ipi(cpu, LINUX_SMP_IPI, action); +} + +static void msp_smtc_send_ipi_mask(const struct cpumask *mask, + unsigned int action) +{ + unsigned int i; + + for_each_cpu(i, mask) + msp_smtc_send_ipi_single(i, action); +} + +/* + * Post-config but pre-boot cleanup entry point + */ +static void __cpuinit msp_smtc_init_secondary(void) +{ + int myvpe; + + /* Don't enable Malta I/O interrupts (IP2) for secondary VPEs */ + myvpe = read_c0_tcbind() & TCBIND_CURVPE; + if (myvpe > 0) + change_c0_status(ST0_IM, STATUSF_IP0 | STATUSF_IP1 | + STATUSF_IP6 | STATUSF_IP7); + smtc_init_secondary(); +} + +/* + * Platform "CPU" startup hook + */ +static void __cpuinit msp_smtc_boot_secondary(int cpu, + struct task_struct *idle) +{ + smtc_boot_secondary(cpu, idle); +} + +/* + * SMP initialization finalization entry point + */ +static void __cpuinit msp_smtc_smp_finish(void) +{ + smtc_smp_finish(); +} + +/* + * Hook for after all CPUs are online + */ + +static void msp_smtc_cpus_done(void) +{ +} + +/* + * Platform SMP pre-initialization + * + * As noted above, we can assume a single CPU for now + * but it may be multithreaded. + */ + +static void __init msp_smtc_smp_setup(void) +{ + /* + * we won't get the definitive value until + * we've run smtc_prepare_cpus later, but + */ + + if (read_c0_config3() & (1 << 2)) + smp_num_siblings = smtc_build_cpu_map(0); +} + +static void __init msp_smtc_prepare_cpus(unsigned int max_cpus) +{ + smtc_prepare_cpus(max_cpus); +} + +struct plat_smp_ops msp_smtc_smp_ops = { + .send_ipi_single = msp_smtc_send_ipi_single, + .send_ipi_mask = msp_smtc_send_ipi_mask, + .init_secondary = msp_smtc_init_secondary, + .smp_finish = msp_smtc_smp_finish, + .cpus_done = msp_smtc_cpus_done, + .boot_secondary = msp_smtc_boot_secondary, + .smp_setup = msp_smtc_smp_setup, + .prepare_cpus = msp_smtc_prepare_cpus, +}; diff --git a/arch/mips/pmc-sierra/msp71xx/msp_time.c b/arch/mips/pmc-sierra/msp71xx/msp_time.c index 01df84c..8b42f30 100644 --- a/arch/mips/pmc-sierra/msp71xx/msp_time.c +++ b/arch/mips/pmc-sierra/msp71xx/msp_time.c @@ -29,6 +29,7 @@ #include <linux/module.h> #include <linux/ptrace.h> +#include <asm/cevt-r4k.h> #include <asm/mipsregs.h> #include <asm/time.h> @@ -36,6 +37,12 @@ #include <msp_int.h> #include <msp_regs.h> +#define get_current_vpe() \ + ((read_c0_tcbind() >> TCBIND_CURVPE_SHIFT) & TCBIND_CURVPE) + +static struct irqaction timer_vpe1; +static int tim_installed; + void __init plat_time_init(void) { char *endp, *s; @@ -83,5 +90,12 @@ void __init plat_time_init(void) unsigned int __cpuinit get_c0_compare_int(void) { - return MSP_INT_VPE0_TIMER; + /* MIPS_MT modes may want timer for second VPE */ + if ((get_current_vpe()) && !tim_installed) { + memcpy(&timer_vpe1, &c0_compare_irqaction, sizeof(timer_vpe1)); + setup_irq(MSP_INT_VPE1_TIMER, &timer_vpe1); + tim_installed++; + } + + return get_current_vpe() ? MSP_INT_VPE1_TIMER : MSP_INT_VPE0_TIMER; } diff --git a/arch/mips/pmc-sierra/msp71xx/msp_usb.c b/arch/mips/pmc-sierra/msp71xx/msp_usb.c index 0ee01e3..9a1aef8 100644 --- a/arch/mips/pmc-sierra/msp71xx/msp_usb.c +++ b/arch/mips/pmc-sierra/msp71xx/msp_usb.c @@ -1,7 +1,7 @@ /* * The setup file for USB related hardware on PMC-Sierra MSP processors. * - * Copyright 2006-2007 PMC-Sierra, Inc. + * Copyright 2006 PMC-Sierra, Inc. * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the @@ -23,8 +23,8 @@ * with this program; if not, write to the Free Software Foundation, Inc., * 675 Mass Ave, Cambridge, MA 02139, USA. */ +#if defined(CONFIG_USB_EHCI_HCD) || defined(CONFIG_USB_GADGET) -#include <linux/dma-mapping.h> #include <linux/init.h> #include <linux/ioport.h> #include <linux/platform_device.h> @@ -34,40 +34,56 @@ #include <msp_regs.h> #include <msp_int.h> #include <msp_prom.h> +#include <msp_usb.h> + #if defined(CONFIG_USB_EHCI_HCD) -static struct resource msp_usbhost_resources [] = { - [0] = { - .start = MSP_USB_BASE_START, - .end = MSP_USB_BASE_END, - .flags = IORESOURCE_MEM, +static struct resource msp_usbhost0_resources[] = { + [0] = { /* EHCI-HS operational and capabilities registers */ + .start = MSP_USB0_HS_START, + .end = MSP_USB0_HS_END, + .flags = IORESOURCE_MEM, }, [1] = { - .start = MSP_INT_USB, - .end = MSP_INT_USB, - .flags = IORESOURCE_IRQ, + .start = MSP_INT_USB, + .end = MSP_INT_USB, + .flags = IORESOURCE_IRQ, + }, + [2] = { /* MSBus-to-AMBA bridge register space */ + .start = MSP_USB0_MAB_START, + .end = MSP_USB0_MAB_END, + .flags = IORESOURCE_MEM, + }, + [3] = { /* Identification and general hardware parameters */ + .start = MSP_USB0_ID_START, + .end = MSP_USB0_ID_END, + .flags = IORESOURCE_MEM, }, }; -static u64 msp_usbhost_dma_mask = DMA_BIT_MASK(32); +static u64 msp_usbhost0_dma_mask = 0xffffffffUL; -static struct platform_device msp_usbhost_device = { - .name = "pmcmsp-ehci", - .id = 0, +static struct mspusb_device msp_usbhost0_device = { .dev = { - .dma_mask = &msp_usbhost_dma_mask, - .coherent_dma_mask = DMA_BIT_MASK(32), + .name = "pmcmsp-ehci", + .id = 0, + .dev = { + .dma_mask = &msp_usbhost0_dma_mask, + .coherent_dma_mask = 0xffffffffUL, + }, + .num_resources = ARRAY_SIZE(msp_usbhost0_resources), + .resource = msp_usbhost0_resources, }, - .num_resources = ARRAY_SIZE(msp_usbhost_resources), - .resource = msp_usbhost_resources, }; -#endif /* CONFIG_USB_EHCI_HCD */ -#if defined(CONFIG_USB_GADGET) -static struct resource msp_usbdev_resources [] = { - [0] = { - .start = MSP_USB_BASE, - .end = MSP_USB_BASE_END, +/* MSP7140/MSP82XX has two USB2 hosts. */ +#ifdef CONFIG_MSP_HAS_DUAL_USB +static u64 msp_usbhost1_dma_mask = 0xffffffffUL; + +static struct resource msp_usbhost1_resources[] = { + [0] = { /* EHCI-HS operational and capabilities registers */ + .start = MSP_USB1_HS_START, + .end = MSP_USB1_HS_END, .flags = IORESOURCE_MEM, }, [1] = { @@ -75,76 +91,173 @@ static struct resource msp_usbdev_resources [] = { .end = MSP_INT_USB, .flags = IORESOURCE_IRQ, }, + [2] = { /* MSBus-to-AMBA bridge register space */ + .start = MSP_USB1_MAB_START, + .end = MSP_USB1_MAB_END, + .flags = IORESOURCE_MEM, + }, + [3] = { /* Identification and general hardware parameters */ + .start = MSP_USB1_ID_START, + .end = MSP_USB1_ID_END, + .flags = IORESOURCE_MEM, + }, +}; + +static struct mspusb_device msp_usbhost1_device = { + .dev = { + .name = "pmcmsp-ehci", + .id = 1, + .dev = { + .dma_mask = &msp_usbhost1_dma_mask, + .coherent_dma_mask = 0xffffffffUL, + }, + .num_resources = ARRAY_SIZE(msp_usbhost1_resources), + .resource = msp_usbhost1_resources, + }, }; +#endif /* CONFIG_MSP_HAS_DUAL_USB */ +#endif /* CONFIG_USB_EHCI_HCD */ -static u64 msp_usbdev_dma_mask = DMA_BIT_MASK(32); +#if defined(CONFIG_USB_GADGET) +static struct resource msp_usbdev0_resources[] = { + [0] = { /* EHCI-HS operational and capabilities registers */ + .start = MSP_USB0_HS_START, + .end = MSP_USB0_HS_END, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = MSP_INT_USB, + .end = MSP_INT_USB, + .flags = IORESOURCE_IRQ, + }, + [2] = { /* MSBus-to-AMBA bridge register space */ + .start = MSP_USB0_MAB_START, + .end = MSP_USB0_MAB_END, + .flags = IORESOURCE_MEM, + }, + [3] = { /* Identification and general hardware parameters */ + .start = MSP_USB0_ID_START, + .end = MSP_USB0_ID_END, + .flags = IORESOURCE_MEM, + }, +}; -static struct platform_device msp_usbdev_device = { - .name = "msp71xx_udc", - .id = 0, +static u64 msp_usbdev_dma_mask = 0xffffffffUL; + +/* This may need to be converted to a mspusb_device, too. */ +static struct mspusb_device msp_usbdev0_device = { .dev = { - .dma_mask = &msp_usbdev_dma_mask, - .coherent_dma_mask = DMA_BIT_MASK(32), + .name = "msp71xx_udc", + .id = 0, + .dev = { + .dma_mask = &msp_usbdev_dma_mask, + .coherent_dma_mask = 0xffffffffUL, + }, + .num_resources = ARRAY_SIZE(msp_usbdev0_resources), + .resource = msp_usbdev0_resources, }, - .num_resources = ARRAY_SIZE(msp_usbdev_resources), - .resource = msp_usbdev_resources, }; -#endif /* CONFIG_USB_GADGET */ -#if defined(CONFIG_USB_EHCI_HCD) || defined(CONFIG_USB_GADGET) -static struct platform_device *msp_devs[1]; -#endif +#ifdef CONFIG_MSP_HAS_DUAL_USB +static struct resource msp_usbdev1_resources[] = { + [0] = { /* EHCI-HS operational and capabilities registers */ + .start = MSP_USB1_HS_START, + .end = MSP_USB1_HS_END, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = MSP_INT_USB, + .end = MSP_INT_USB, + .flags = IORESOURCE_IRQ, + }, + [2] = { /* MSBus-to-AMBA bridge register space */ + .start = MSP_USB1_MAB_START, + .end = MSP_USB1_MAB_END, + .flags = IORESOURCE_MEM, + }, + [3] = { /* Identification and general hardware parameters */ + .start = MSP_USB1_ID_START, + .end = MSP_USB1_ID_END, + .flags = IORESOURCE_MEM, + }, +}; +/* This may need to be converted to a mspusb_device, too. */ +static struct mspusb_device msp_usbdev1_device = { + .dev = { + .name = "msp71xx_udc", + .id = 0, + .dev = { + .dma_mask = &msp_usbdev_dma_mask, + .coherent_dma_mask = 0xffffffffUL, + }, + .num_resources = ARRAY_SIZE(msp_usbdev1_resources), + .resource = msp_usbdev1_resources, + }, +}; + +#endif /* CONFIG_MSP_HAS_DUAL_USB */ +#endif /* CONFIG_USB_GADGET */ static int __init msp_usb_setup(void) { -#if defined(CONFIG_USB_EHCI_HCD) || defined(CONFIG_USB_GADGET) - char *strp; - char envstr[32]; - unsigned int val = 0; - int result = 0; + char *strp; + char envstr[32]; + struct platform_device *msp_devs[NUM_USB_DEVS]; + unsigned int val; + /* construct environment name usbmode */ + /* set usbmode <host/device> as pmon environment var */ /* - * construct environment name usbmode - * set usbmode <host/device> as pmon environment var + * Could this perhaps be integrated into the "features" env var? + * Use the features key "U", and follow with "H" for host-mode, + * "D" for device-mode. If it works for Ethernet, why not USB... + * -- hammtrev, 2007/03/22 */ snprintf((char *)&envstr[0], sizeof(envstr), "usbmode"); -#if defined(CONFIG_USB_EHCI_HCD) - /* default to host mode */ + /* set default host mode */ val = 1; -#endif /* get environment string */ strp = prom_getenv((char *)&envstr[0]); if (strp) { + /* compare string */ if (!strcmp(strp, "device")) val = 0; } if (val) { #if defined(CONFIG_USB_EHCI_HCD) - /* get host mode device */ - msp_devs[0] = &msp_usbhost_device; - ppfinit("platform add USB HOST done %s.\n", - msp_devs[0]->name); - - result = platform_add_devices(msp_devs, ARRAY_SIZE(msp_devs)); -#endif /* CONFIG_USB_EHCI_HCD */ - } + msp_devs[0] = &msp_usbhost0_device.dev; + ppfinit("platform add USB HOST done %s.\n", msp_devs[0]->name); +#ifdef CONFIG_MSP_HAS_DUAL_USB + msp_devs[1] = &msp_usbhost1_device.dev; + ppfinit("platform add USB HOST done %s.\n", msp_devs[1]->name); +#endif +#else + ppfinit("%s: echi_hcd not supported\n", __FILE__); +#endif /* CONFIG_USB_EHCI_HCD */ + } else { #if defined(CONFIG_USB_GADGET) - else { /* get device mode structure */ - msp_devs[0] = &msp_usbdev_device; - ppfinit("platform add USB DEVICE done %s.\n", - msp_devs[0]->name); - - result = platform_add_devices(msp_devs, ARRAY_SIZE(msp_devs)); + msp_devs[0] = &msp_usbdev0_device.dev; + ppfinit("platform add USB DEVICE done %s.\n" + , msp_devs[0]->name); +#ifdef CONFIG_MSP_HAS_DUAL_USB + msp_devs[1] = &msp_usbdev1_device.dev; + ppfinit("platform add USB DEVICE done %s.\n" + , msp_devs[1]->name); +#endif +#else + ppfinit("%s: usb_gadget not supported\n", __FILE__); +#endif /* CONFIG_USB_GADGET */ } -#endif /* CONFIG_USB_GADGET */ -#endif /* CONFIG_USB_EHCI_HCD || CONFIG_USB_GADGET */ + /* add device */ + platform_add_devices(msp_devs, ARRAY_SIZE(msp_devs)); - return result; + return 0; } subsys_initcall(msp_usb_setup); +#endif /* CONFIG_USB_EHCI_HCD || CONFIG_USB_GADGET */ diff --git a/arch/mips/pmc-sierra/yosemite/Makefile b/arch/mips/pmc-sierra/yosemite/Makefile index b16f95c..02f5fb9 100644 --- a/arch/mips/pmc-sierra/yosemite/Makefile +++ b/arch/mips/pmc-sierra/yosemite/Makefile @@ -6,4 +6,4 @@ obj-y += irq.o prom.o py-console.o setup.o obj-$(CONFIG_SMP) += smp.o -EXTRA_CFLAGS += -Werror +ccflags-y := -Werror diff --git a/arch/mips/pnx833x/common/interrupts.c b/arch/mips/pnx833x/common/interrupts.c index 941916f..b226bcb 100644 --- a/arch/mips/pnx833x/common/interrupts.c +++ b/arch/mips/pnx833x/common/interrupts.c @@ -152,10 +152,6 @@ static inline void pnx833x_hard_disable_pic_irq(unsigned int irq) PNX833X_PIC_INT_REG(irq) = 0; } -static int irqflags[PNX833X_PIC_NUM_IRQ]; /* initialized by zeroes */ -#define IRQFLAG_STARTED 1 -#define IRQFLAG_DISABLED 2 - static DEFINE_RAW_SPINLOCK(pnx833x_irq_lock); static unsigned int pnx833x_startup_pic_irq(unsigned int irq) @@ -164,108 +160,54 @@ static unsigned int pnx833x_startup_pic_irq(unsigned int irq) unsigned int pic_irq = irq - PNX833X_PIC_IRQ_BASE; raw_spin_lock_irqsave(&pnx833x_irq_lock, flags); - - irqflags[pic_irq] = IRQFLAG_STARTED; /* started, not disabled */ pnx833x_hard_enable_pic_irq(pic_irq); - raw_spin_unlock_irqrestore(&pnx833x_irq_lock, flags); return 0; } -static void pnx833x_shutdown_pic_irq(unsigned int irq) -{ - unsigned long flags; - unsigned int pic_irq = irq - PNX833X_PIC_IRQ_BASE; - - raw_spin_lock_irqsave(&pnx833x_irq_lock, flags); - - irqflags[pic_irq] = 0; /* not started */ - pnx833x_hard_disable_pic_irq(pic_irq); - - raw_spin_unlock_irqrestore(&pnx833x_irq_lock, flags); -} - -static void pnx833x_enable_pic_irq(unsigned int irq) +static void pnx833x_enable_pic_irq(struct irq_data *d) { unsigned long flags; - unsigned int pic_irq = irq - PNX833X_PIC_IRQ_BASE; + unsigned int pic_irq = d->irq - PNX833X_PIC_IRQ_BASE; raw_spin_lock_irqsave(&pnx833x_irq_lock, flags); - - irqflags[pic_irq] &= ~IRQFLAG_DISABLED; - if (irqflags[pic_irq] == IRQFLAG_STARTED) - pnx833x_hard_enable_pic_irq(pic_irq); - + pnx833x_hard_enable_pic_irq(pic_irq); raw_spin_unlock_irqrestore(&pnx833x_irq_lock, flags); } -static void pnx833x_disable_pic_irq(unsigned int irq) +static void pnx833x_disable_pic_irq(struct irq_data *d) { unsigned long flags; - unsigned int pic_irq = irq - PNX833X_PIC_IRQ_BASE; + unsigned int pic_irq = d->irq - PNX833X_PIC_IRQ_BASE; raw_spin_lock_irqsave(&pnx833x_irq_lock, flags); - - irqflags[pic_irq] |= IRQFLAG_DISABLED; pnx833x_hard_disable_pic_irq(pic_irq); - raw_spin_unlock_irqrestore(&pnx833x_irq_lock, flags); } -static void pnx833x_ack_pic_irq(unsigned int irq) -{ -} - -static void pnx833x_end_pic_irq(unsigned int irq) -{ -} - static DEFINE_RAW_SPINLOCK(pnx833x_gpio_pnx833x_irq_lock); -static unsigned int pnx833x_startup_gpio_irq(unsigned int irq) -{ - int pin = irq - PNX833X_GPIO_IRQ_BASE; - unsigned long flags; - raw_spin_lock_irqsave(&pnx833x_gpio_pnx833x_irq_lock, flags); - pnx833x_gpio_enable_irq(pin); - raw_spin_unlock_irqrestore(&pnx833x_gpio_pnx833x_irq_lock, flags); - return 0; -} - -static void pnx833x_enable_gpio_irq(unsigned int irq) +static void pnx833x_enable_gpio_irq(struct irq_data *d) { - int pin = irq - PNX833X_GPIO_IRQ_BASE; + int pin = d->irq - PNX833X_GPIO_IRQ_BASE; unsigned long flags; raw_spin_lock_irqsave(&pnx833x_gpio_pnx833x_irq_lock, flags); pnx833x_gpio_enable_irq(pin); raw_spin_unlock_irqrestore(&pnx833x_gpio_pnx833x_irq_lock, flags); } -static void pnx833x_disable_gpio_irq(unsigned int irq) +static void pnx833x_disable_gpio_irq(struct irq_data *d) { - int pin = irq - PNX833X_GPIO_IRQ_BASE; + int pin = d->irq - PNX833X_GPIO_IRQ_BASE; unsigned long flags; raw_spin_lock_irqsave(&pnx833x_gpio_pnx833x_irq_lock, flags); pnx833x_gpio_disable_irq(pin); raw_spin_unlock_irqrestore(&pnx833x_gpio_pnx833x_irq_lock, flags); } -static void pnx833x_ack_gpio_irq(unsigned int irq) -{ -} - -static void pnx833x_end_gpio_irq(unsigned int irq) -{ - int pin = irq - PNX833X_GPIO_IRQ_BASE; - unsigned long flags; - raw_spin_lock_irqsave(&pnx833x_gpio_pnx833x_irq_lock, flags); - pnx833x_gpio_clear_irq(pin); - raw_spin_unlock_irqrestore(&pnx833x_gpio_pnx833x_irq_lock, flags); -} - -static int pnx833x_set_type_gpio_irq(unsigned int irq, unsigned int flow_type) +static int pnx833x_set_type_gpio_irq(struct irq_data *d, unsigned int flow_type) { - int pin = irq - PNX833X_GPIO_IRQ_BASE; + int pin = d->irq - PNX833X_GPIO_IRQ_BASE; int gpio_mode; switch (flow_type) { @@ -296,23 +238,15 @@ static int pnx833x_set_type_gpio_irq(unsigned int irq, unsigned int flow_type) static struct irq_chip pnx833x_pic_irq_type = { .name = "PNX-PIC", - .startup = pnx833x_startup_pic_irq, - .shutdown = pnx833x_shutdown_pic_irq, - .enable = pnx833x_enable_pic_irq, - .disable = pnx833x_disable_pic_irq, - .ack = pnx833x_ack_pic_irq, - .end = pnx833x_end_pic_irq + .irq_enable = pnx833x_enable_pic_irq, + .irq_disable = pnx833x_disable_pic_irq, }; static struct irq_chip pnx833x_gpio_irq_type = { .name = "PNX-GPIO", - .startup = pnx833x_startup_gpio_irq, - .shutdown = pnx833x_disable_gpio_irq, - .enable = pnx833x_enable_gpio_irq, - .disable = pnx833x_disable_gpio_irq, - .ack = pnx833x_ack_gpio_irq, - .end = pnx833x_end_gpio_irq, - .set_type = pnx833x_set_type_gpio_irq + .irq_enable = pnx833x_enable_gpio_irq, + .irq_disable = pnx833x_disable_gpio_irq, + .irq_set_type = pnx833x_set_type_gpio_irq, }; void __init arch_init_irq(void) diff --git a/arch/mips/pnx8550/common/int.c b/arch/mips/pnx8550/common/int.c index cfed505..dbdc35c 100644 --- a/arch/mips/pnx8550/common/int.c +++ b/arch/mips/pnx8550/common/int.c @@ -114,8 +114,10 @@ static inline void unmask_gic_int(unsigned int irq_nr) PNX8550_GIC_REQ(irq_nr) = (1<<26 | 1<<16) | (1<<28) | gic_prio[irq_nr]; } -static inline void mask_irq(unsigned int irq_nr) +static inline void mask_irq(struct irq_data *d) { + unsigned int irq_nr = d->irq; + if ((PNX8550_INT_CP0_MIN <= irq_nr) && (irq_nr <= PNX8550_INT_CP0_MAX)) { modify_cp0_intmask(1 << irq_nr, 0); } else if ((PNX8550_INT_GIC_MIN <= irq_nr) && @@ -129,8 +131,10 @@ static inline void mask_irq(unsigned int irq_nr) } } -static inline void unmask_irq(unsigned int irq_nr) +static inline void unmask_irq(struct irq_data *d) { + unsigned int irq_nr = d->irq; + if ((PNX8550_INT_CP0_MIN <= irq_nr) && (irq_nr <= PNX8550_INT_CP0_MAX)) { modify_cp0_intmask(0, 1 << irq_nr); } else if ((PNX8550_INT_GIC_MIN <= irq_nr) && @@ -157,10 +161,8 @@ int pnx8550_set_gic_priority(int irq, int priority) static struct irq_chip level_irq_type = { .name = "PNX Level IRQ", - .ack = mask_irq, - .mask = mask_irq, - .mask_ack = mask_irq, - .unmask = unmask_irq, + .irq_mask = mask_irq, + .irq_unmask = unmask_irq, }; static struct irqaction gic_action = { @@ -180,10 +182,8 @@ void __init arch_init_irq(void) int i; int configPR; - for (i = 0; i < PNX8550_INT_CP0_TOTINT; i++) { + for (i = 0; i < PNX8550_INT_CP0_TOTINT; i++) set_irq_chip_and_handler(i, &level_irq_type, handle_level_irq); - mask_irq(i); /* mask the irq just in case */ - } /* init of GIC/IPC interrupts */ /* should be done before cp0 since cp0 init enables the GIC int */ diff --git a/arch/mips/powertv/Makefile b/arch/mips/powertv/Makefile index baf6e90..348d2e8 100644 --- a/arch/mips/powertv/Makefile +++ b/arch/mips/powertv/Makefile @@ -28,4 +28,4 @@ obj-y += init.o ioremap.o memory.o powertv_setup.o reset.o time.o \ obj-$(CONFIG_USB) += powertv-usb.o -EXTRA_CFLAGS += -Wall +ccflags-y := -Wall diff --git a/arch/mips/powertv/asic/Makefile b/arch/mips/powertv/asic/Makefile index f0e95dc..d810a33 100644 --- a/arch/mips/powertv/asic/Makefile +++ b/arch/mips/powertv/asic/Makefile @@ -20,4 +20,4 @@ obj-y += asic-calliope.o asic-cronus.o asic-gaia.o asic-zeus.o \ asic_devices.o asic_int.o irq_asic.o prealloc-calliope.o \ prealloc-cronus.o prealloc-cronuslite.o prealloc-gaia.o prealloc-zeus.o -EXTRA_CFLAGS += -Wall -Werror +ccflags-y := -Wall -Werror diff --git a/arch/mips/powertv/asic/irq_asic.c b/arch/mips/powertv/asic/irq_asic.c index e553824..6f1c8ef 100644 --- a/arch/mips/powertv/asic/irq_asic.c +++ b/arch/mips/powertv/asic/irq_asic.c @@ -21,9 +21,10 @@ #include <asm/mach-powertv/asic_regs.h> -static inline void unmask_asic_irq(unsigned int irq) +static inline void unmask_asic_irq(struct irq_data *d) { unsigned long enable_bit; + unsigned int irq = d->irq; enable_bit = (1 << (irq & 0x1f)); @@ -45,9 +46,10 @@ static inline void unmask_asic_irq(unsigned int irq) } } -static inline void mask_asic_irq(unsigned int irq) +static inline void mask_asic_irq(struct irq_data *d) { unsigned long disable_mask; + unsigned int irq = d->irq; disable_mask = ~(1 << (irq & 0x1f)); @@ -71,11 +73,8 @@ static inline void mask_asic_irq(unsigned int irq) static struct irq_chip asic_irq_chip = { .name = "ASIC Level", - .ack = mask_asic_irq, - .mask = mask_asic_irq, - .mask_ack = mask_asic_irq, - .unmask = unmask_asic_irq, - .eoi = unmask_asic_irq, + .irq_mask = mask_asic_irq, + .irq_unmask = unmask_asic_irq, }; void __init asic_irq_init(void) diff --git a/arch/mips/powertv/pci/Makefile b/arch/mips/powertv/pci/Makefile index f5c6246..5783201 100644 --- a/arch/mips/powertv/pci/Makefile +++ b/arch/mips/powertv/pci/Makefile @@ -18,4 +18,4 @@ obj-$(CONFIG_PCI) += fixup-powertv.o -EXTRA_CFLAGS += -Wall -Werror +ccflags-y := -Wall -Werror diff --git a/arch/mips/rb532/irq.c b/arch/mips/rb532/irq.c index ea6cec3c..b32a768 100644 --- a/arch/mips/rb532/irq.c +++ b/arch/mips/rb532/irq.c @@ -111,10 +111,10 @@ static inline void ack_local_irq(unsigned int ip) clear_c0_cause(ipnum); } -static void rb532_enable_irq(unsigned int irq_nr) +static void rb532_enable_irq(struct irq_data *d) { + unsigned int group, intr_bit, irq_nr = d->irq; int ip = irq_nr - GROUP0_IRQ_BASE; - unsigned int group, intr_bit; volatile unsigned int *addr; if (ip < 0) @@ -132,10 +132,10 @@ static void rb532_enable_irq(unsigned int irq_nr) } } -static void rb532_disable_irq(unsigned int irq_nr) +static void rb532_disable_irq(struct irq_data *d) { + unsigned int group, intr_bit, mask, irq_nr = d->irq; int ip = irq_nr - GROUP0_IRQ_BASE; - unsigned int group, intr_bit, mask; volatile unsigned int *addr; if (ip < 0) { @@ -163,18 +163,18 @@ static void rb532_disable_irq(unsigned int irq_nr) } } -static void rb532_mask_and_ack_irq(unsigned int irq_nr) +static void rb532_mask_and_ack_irq(struct irq_data *d) { - rb532_disable_irq(irq_nr); - ack_local_irq(group_to_ip(irq_to_group(irq_nr))); + rb532_disable_irq(d); + ack_local_irq(group_to_ip(irq_to_group(d->irq))); } -static int rb532_set_type(unsigned int irq_nr, unsigned type) +static int rb532_set_type(struct irq_data *d, unsigned type) { - int gpio = irq_nr - GPIO_MAPPED_IRQ_BASE; - int group = irq_to_group(irq_nr); + int gpio = d->irq - GPIO_MAPPED_IRQ_BASE; + int group = irq_to_group(d->irq); - if (group != GPIO_MAPPED_IRQ_GROUP || irq_nr > (GROUP4_IRQ_BASE + 13)) + if (group != GPIO_MAPPED_IRQ_GROUP || d->irq > (GROUP4_IRQ_BASE + 13)) return (type == IRQ_TYPE_LEVEL_HIGH) ? 0 : -EINVAL; switch (type) { @@ -193,11 +193,11 @@ static int rb532_set_type(unsigned int irq_nr, unsigned type) static struct irq_chip rc32434_irq_type = { .name = "RB532", - .ack = rb532_disable_irq, - .mask = rb532_disable_irq, - .mask_ack = rb532_mask_and_ack_irq, - .unmask = rb532_enable_irq, - .set_type = rb532_set_type, + .irq_ack = rb532_disable_irq, + .irq_mask = rb532_disable_irq, + .irq_mask_ack = rb532_mask_and_ack_irq, + .irq_unmask = rb532_enable_irq, + .irq_set_type = rb532_set_type, }; void __init arch_init_irq(void) diff --git a/arch/mips/sgi-ip22/ip22-int.c b/arch/mips/sgi-ip22/ip22-int.c index 383f11d..e6e6475 100644 --- a/arch/mips/sgi-ip22/ip22-int.c +++ b/arch/mips/sgi-ip22/ip22-int.c @@ -31,88 +31,80 @@ static char lc3msk_to_irqnr[256]; extern int ip22_eisa_init(void); -static void enable_local0_irq(unsigned int irq) +static void enable_local0_irq(struct irq_data *d) { /* don't allow mappable interrupt to be enabled from setup_irq, * we have our own way to do so */ - if (irq != SGI_MAP_0_IRQ) - sgint->imask0 |= (1 << (irq - SGINT_LOCAL0)); + if (d->irq != SGI_MAP_0_IRQ) + sgint->imask0 |= (1 << (d->irq - SGINT_LOCAL0)); } -static void disable_local0_irq(unsigned int irq) +static void disable_local0_irq(struct irq_data *d) { - sgint->imask0 &= ~(1 << (irq - SGINT_LOCAL0)); + sgint->imask0 &= ~(1 << (d->irq - SGINT_LOCAL0)); } static struct irq_chip ip22_local0_irq_type = { .name = "IP22 local 0", - .ack = disable_local0_irq, - .mask = disable_local0_irq, - .mask_ack = disable_local0_irq, - .unmask = enable_local0_irq, + .irq_mask = disable_local0_irq, + .irq_unmask = enable_local0_irq, }; -static void enable_local1_irq(unsigned int irq) +static void enable_local1_irq(struct irq_data *d) { /* don't allow mappable interrupt to be enabled from setup_irq, * we have our own way to do so */ - if (irq != SGI_MAP_1_IRQ) - sgint->imask1 |= (1 << (irq - SGINT_LOCAL1)); + if (d->irq != SGI_MAP_1_IRQ) + sgint->imask1 |= (1 << (d->irq - SGINT_LOCAL1)); } -static void disable_local1_irq(unsigned int irq) +static void disable_local1_irq(struct irq_data *d) { - sgint->imask1 &= ~(1 << (irq - SGINT_LOCAL1)); + sgint->imask1 &= ~(1 << (d->irq - SGINT_LOCAL1)); } static struct irq_chip ip22_local1_irq_type = { .name = "IP22 local 1", - .ack = disable_local1_irq, - .mask = disable_local1_irq, - .mask_ack = disable_local1_irq, - .unmask = enable_local1_irq, + .irq_mask = disable_local1_irq, + .irq_unmask = enable_local1_irq, }; -static void enable_local2_irq(unsigned int irq) +static void enable_local2_irq(struct irq_data *d) { sgint->imask0 |= (1 << (SGI_MAP_0_IRQ - SGINT_LOCAL0)); - sgint->cmeimask0 |= (1 << (irq - SGINT_LOCAL2)); + sgint->cmeimask0 |= (1 << (d->irq - SGINT_LOCAL2)); } -static void disable_local2_irq(unsigned int irq) +static void disable_local2_irq(struct irq_data *d) { - sgint->cmeimask0 &= ~(1 << (irq - SGINT_LOCAL2)); + sgint->cmeimask0 &= ~(1 << (d->irq - SGINT_LOCAL2)); if (!sgint->cmeimask0) sgint->imask0 &= ~(1 << (SGI_MAP_0_IRQ - SGINT_LOCAL0)); } static struct irq_chip ip22_local2_irq_type = { .name = "IP22 local 2", - .ack = disable_local2_irq, - .mask = disable_local2_irq, - .mask_ack = disable_local2_irq, - .unmask = enable_local2_irq, + .irq_mask = disable_local2_irq, + .irq_unmask = enable_local2_irq, }; -static void enable_local3_irq(unsigned int irq) +static void enable_local3_irq(struct irq_data *d) { sgint->imask1 |= (1 << (SGI_MAP_1_IRQ - SGINT_LOCAL1)); - sgint->cmeimask1 |= (1 << (irq - SGINT_LOCAL3)); + sgint->cmeimask1 |= (1 << (d->irq - SGINT_LOCAL3)); } -static void disable_local3_irq(unsigned int irq) +static void disable_local3_irq(struct irq_data *d) { - sgint->cmeimask1 &= ~(1 << (irq - SGINT_LOCAL3)); + sgint->cmeimask1 &= ~(1 << (d->irq - SGINT_LOCAL3)); if (!sgint->cmeimask1) sgint->imask1 &= ~(1 << (SGI_MAP_1_IRQ - SGINT_LOCAL1)); } static struct irq_chip ip22_local3_irq_type = { .name = "IP22 local 3", - .ack = disable_local3_irq, - .mask = disable_local3_irq, - .mask_ack = disable_local3_irq, - .unmask = enable_local3_irq, + .irq_mask = disable_local3_irq, + .irq_unmask = enable_local3_irq, }; static void indy_local0_irqdispatch(void) diff --git a/arch/mips/sgi-ip27/ip27-irq.c b/arch/mips/sgi-ip27/ip27-irq.c index 6a123ea..f2d09d7 100644 --- a/arch/mips/sgi-ip27/ip27-irq.c +++ b/arch/mips/sgi-ip27/ip27-irq.c @@ -240,7 +240,7 @@ static int intr_disconnect_level(int cpu, int bit) } /* Startup one of the (PCI ...) IRQs routes over a bridge. */ -static unsigned int startup_bridge_irq(unsigned int irq) +static unsigned int startup_bridge_irq(struct irq_data *d) { struct bridge_controller *bc; bridgereg_t device; @@ -248,16 +248,16 @@ static unsigned int startup_bridge_irq(unsigned int irq) int pin, swlevel; cpuid_t cpu; - pin = SLOT_FROM_PCI_IRQ(irq); - bc = IRQ_TO_BRIDGE(irq); + pin = SLOT_FROM_PCI_IRQ(d->irq); + bc = IRQ_TO_BRIDGE(d->irq); bridge = bc->base; - pr_debug("bridge_startup(): irq= 0x%x pin=%d\n", irq, pin); + pr_debug("bridge_startup(): irq= 0x%x pin=%d\n", d->irq, pin); /* * "map" irq to a swlevel greater than 6 since the first 6 bits * of INT_PEND0 are taken */ - swlevel = find_level(&cpu, irq); + swlevel = find_level(&cpu, d->irq); bridge->b_int_addr[pin].addr = (0x20000 | swlevel | (bc->nasid << 8)); bridge->b_int_enable |= (1 << pin); bridge->b_int_enable |= 0x7ffffe00; /* more stuff in int_enable */ @@ -288,53 +288,51 @@ static unsigned int startup_bridge_irq(unsigned int irq) } /* Shutdown one of the (PCI ...) IRQs routes over a bridge. */ -static void shutdown_bridge_irq(unsigned int irq) +static void shutdown_bridge_irq(struct irq_data *d) { - struct bridge_controller *bc = IRQ_TO_BRIDGE(irq); + struct bridge_controller *bc = IRQ_TO_BRIDGE(d->irq); bridge_t *bridge = bc->base; int pin, swlevel; cpuid_t cpu; - pr_debug("bridge_shutdown: irq 0x%x\n", irq); - pin = SLOT_FROM_PCI_IRQ(irq); + pr_debug("bridge_shutdown: irq 0x%x\n", d->irq); + pin = SLOT_FROM_PCI_IRQ(d->irq); /* * map irq to a swlevel greater than 6 since the first 6 bits * of INT_PEND0 are taken */ - swlevel = find_level(&cpu, irq); + swlevel = find_level(&cpu, d->irq); intr_disconnect_level(cpu, swlevel); bridge->b_int_enable &= ~(1 << pin); bridge->b_wid_tflush; } -static inline void enable_bridge_irq(unsigned int irq) +static inline void enable_bridge_irq(struct irq_data *d) { cpuid_t cpu; int swlevel; - swlevel = find_level(&cpu, irq); /* Criminal offence */ + swlevel = find_level(&cpu, d->irq); /* Criminal offence */ intr_connect_level(cpu, swlevel); } -static inline void disable_bridge_irq(unsigned int irq) +static inline void disable_bridge_irq(struct irq_data *d) { cpuid_t cpu; int swlevel; - swlevel = find_level(&cpu, irq); /* Criminal offence */ + swlevel = find_level(&cpu, d->irq); /* Criminal offence */ intr_disconnect_level(cpu, swlevel); } static struct irq_chip bridge_irq_type = { .name = "bridge", - .startup = startup_bridge_irq, - .shutdown = shutdown_bridge_irq, - .ack = disable_bridge_irq, - .mask = disable_bridge_irq, - .mask_ack = disable_bridge_irq, - .unmask = enable_bridge_irq, + .irq_startup = startup_bridge_irq, + .irq_shutdown = shutdown_bridge_irq, + .irq_mask = disable_bridge_irq, + .irq_unmask = enable_bridge_irq, }; void __devinit register_bridge_irq(unsigned int irq) diff --git a/arch/mips/sgi-ip27/ip27-timer.c b/arch/mips/sgi-ip27/ip27-timer.c index d6802d6..c01f558 100644 --- a/arch/mips/sgi-ip27/ip27-timer.c +++ b/arch/mips/sgi-ip27/ip27-timer.c @@ -36,21 +36,18 @@ #include <asm/sn/sn0/hubio.h> #include <asm/pci/bridge.h> -static void enable_rt_irq(unsigned int irq) +static void enable_rt_irq(struct irq_data *d) { } -static void disable_rt_irq(unsigned int irq) +static void disable_rt_irq(struct irq_data *d) { } static struct irq_chip rt_irq_type = { .name = "SN HUB RT timer", - .ack = disable_rt_irq, - .mask = disable_rt_irq, - .mask_ack = disable_rt_irq, - .unmask = enable_rt_irq, - .eoi = enable_rt_irq, + .irq_mask = disable_rt_irq, + .irq_unmask = enable_rt_irq, }; static int rt_next_event(unsigned long delta, struct clock_event_device *evt) diff --git a/arch/mips/sgi-ip32/ip32-irq.c b/arch/mips/sgi-ip32/ip32-irq.c index eb40824..e0a3ce4 100644 --- a/arch/mips/sgi-ip32/ip32-irq.c +++ b/arch/mips/sgi-ip32/ip32-irq.c @@ -130,70 +130,48 @@ static struct irqaction cpuerr_irq = { static uint64_t crime_mask; -static inline void crime_enable_irq(unsigned int irq) +static inline void crime_enable_irq(struct irq_data *d) { - unsigned int bit = irq - CRIME_IRQ_BASE; + unsigned int bit = d->irq - CRIME_IRQ_BASE; crime_mask |= 1 << bit; crime->imask = crime_mask; } -static inline void crime_disable_irq(unsigned int irq) +static inline void crime_disable_irq(struct irq_data *d) { - unsigned int bit = irq - CRIME_IRQ_BASE; + unsigned int bit = d->irq - CRIME_IRQ_BASE; crime_mask &= ~(1 << bit); crime->imask = crime_mask; flush_crime_bus(); } -static void crime_level_mask_and_ack_irq(unsigned int irq) -{ - crime_disable_irq(irq); -} - -static void crime_level_end_irq(unsigned int irq) -{ - if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) - crime_enable_irq(irq); -} - static struct irq_chip crime_level_interrupt = { .name = "IP32 CRIME", - .ack = crime_level_mask_and_ack_irq, - .mask = crime_disable_irq, - .mask_ack = crime_level_mask_and_ack_irq, - .unmask = crime_enable_irq, - .end = crime_level_end_irq, + .irq_mask = crime_disable_irq, + .irq_unmask = crime_enable_irq, }; -static void crime_edge_mask_and_ack_irq(unsigned int irq) +static void crime_edge_mask_and_ack_irq(struct irq_data *d) { - unsigned int bit = irq - CRIME_IRQ_BASE; + unsigned int bit = d->irq - CRIME_IRQ_BASE; uint64_t crime_int; /* Edge triggered interrupts must be cleared. */ - crime_int = crime->hard_int; crime_int &= ~(1 << bit); crime->hard_int = crime_int; - crime_disable_irq(irq); -} - -static void crime_edge_end_irq(unsigned int irq) -{ - if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) - crime_enable_irq(irq); + crime_disable_irq(d); } static struct irq_chip crime_edge_interrupt = { .name = "IP32 CRIME", - .ack = crime_edge_mask_and_ack_irq, - .mask = crime_disable_irq, - .mask_ack = crime_edge_mask_and_ack_irq, - .unmask = crime_enable_irq, - .end = crime_edge_end_irq, + .irq_ack = crime_edge_mask_and_ack_irq, + .irq_mask = crime_disable_irq, + .irq_mask_ack = crime_edge_mask_and_ack_irq, + .irq_unmask = crime_enable_irq, }; /* @@ -204,37 +182,28 @@ static struct irq_chip crime_edge_interrupt = { static unsigned long macepci_mask; -static void enable_macepci_irq(unsigned int irq) +static void enable_macepci_irq(struct irq_data *d) { - macepci_mask |= MACEPCI_CONTROL_INT(irq - MACEPCI_SCSI0_IRQ); + macepci_mask |= MACEPCI_CONTROL_INT(d->irq - MACEPCI_SCSI0_IRQ); mace->pci.control = macepci_mask; - crime_mask |= 1 << (irq - CRIME_IRQ_BASE); + crime_mask |= 1 << (d->irq - CRIME_IRQ_BASE); crime->imask = crime_mask; } -static void disable_macepci_irq(unsigned int irq) +static void disable_macepci_irq(struct irq_data *d) { - crime_mask &= ~(1 << (irq - CRIME_IRQ_BASE)); + crime_mask &= ~(1 << (d->irq - CRIME_IRQ_BASE)); crime->imask = crime_mask; flush_crime_bus(); - macepci_mask &= ~MACEPCI_CONTROL_INT(irq - MACEPCI_SCSI0_IRQ); + macepci_mask &= ~MACEPCI_CONTROL_INT(d->irq - MACEPCI_SCSI0_IRQ); mace->pci.control = macepci_mask; flush_mace_bus(); } -static void end_macepci_irq(unsigned int irq) -{ - if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) - enable_macepci_irq(irq); -} - static struct irq_chip ip32_macepci_interrupt = { .name = "IP32 MACE PCI", - .ack = disable_macepci_irq, - .mask = disable_macepci_irq, - .mask_ack = disable_macepci_irq, - .unmask = enable_macepci_irq, - .end = end_macepci_irq, + .irq_mask = disable_macepci_irq, + .irq_unmask = enable_macepci_irq, }; /* This is used for MACE ISA interrupts. That means bits 4-6 in the @@ -276,13 +245,13 @@ static struct irq_chip ip32_macepci_interrupt = { static unsigned long maceisa_mask; -static void enable_maceisa_irq(unsigned int irq) +static void enable_maceisa_irq(struct irq_data *d) { unsigned int crime_int = 0; - pr_debug("maceisa enable: %u\n", irq); + pr_debug("maceisa enable: %u\n", d->irq); - switch (irq) { + switch (d->irq) { case MACEISA_AUDIO_SW_IRQ ... MACEISA_AUDIO3_MERR_IRQ: crime_int = MACE_AUDIO_INT; break; @@ -296,15 +265,15 @@ static void enable_maceisa_irq(unsigned int irq) pr_debug("crime_int %08x enabled\n", crime_int); crime_mask |= crime_int; crime->imask = crime_mask; - maceisa_mask |= 1 << (irq - MACEISA_AUDIO_SW_IRQ); + maceisa_mask |= 1 << (d->irq - MACEISA_AUDIO_SW_IRQ); mace->perif.ctrl.imask = maceisa_mask; } -static void disable_maceisa_irq(unsigned int irq) +static void disable_maceisa_irq(struct irq_data *d) { unsigned int crime_int = 0; - maceisa_mask &= ~(1 << (irq - MACEISA_AUDIO_SW_IRQ)); + maceisa_mask &= ~(1 << (d->irq - MACEISA_AUDIO_SW_IRQ)); if (!(maceisa_mask & MACEISA_AUDIO_INT)) crime_int |= MACE_AUDIO_INT; if (!(maceisa_mask & MACEISA_MISC_INT)) @@ -318,76 +287,57 @@ static void disable_maceisa_irq(unsigned int irq) flush_mace_bus(); } -static void mask_and_ack_maceisa_irq(unsigned int irq) +static void mask_and_ack_maceisa_irq(struct irq_data *d) { unsigned long mace_int; /* edge triggered */ mace_int = mace->perif.ctrl.istat; - mace_int &= ~(1 << (irq - MACEISA_AUDIO_SW_IRQ)); + mace_int &= ~(1 << (d->irq - MACEISA_AUDIO_SW_IRQ)); mace->perif.ctrl.istat = mace_int; - disable_maceisa_irq(irq); -} - -static void end_maceisa_irq(unsigned irq) -{ - if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) - enable_maceisa_irq(irq); + disable_maceisa_irq(d); } static struct irq_chip ip32_maceisa_level_interrupt = { .name = "IP32 MACE ISA", - .ack = disable_maceisa_irq, - .mask = disable_maceisa_irq, - .mask_ack = disable_maceisa_irq, - .unmask = enable_maceisa_irq, - .end = end_maceisa_irq, + .irq_mask = disable_maceisa_irq, + .irq_unmask = enable_maceisa_irq, }; static struct irq_chip ip32_maceisa_edge_interrupt = { .name = "IP32 MACE ISA", - .ack = mask_and_ack_maceisa_irq, - .mask = disable_maceisa_irq, - .mask_ack = mask_and_ack_maceisa_irq, - .unmask = enable_maceisa_irq, - .end = end_maceisa_irq, + .irq_ack = mask_and_ack_maceisa_irq, + .irq_mask = disable_maceisa_irq, + .irq_mask_ack = mask_and_ack_maceisa_irq, + .irq_unmask = enable_maceisa_irq, }; /* This is used for regular non-ISA, non-PCI MACE interrupts. That means * bits 0-3 and 7 in the CRIME register. */ -static void enable_mace_irq(unsigned int irq) +static void enable_mace_irq(struct irq_data *d) { - unsigned int bit = irq - CRIME_IRQ_BASE; + unsigned int bit = d->irq - CRIME_IRQ_BASE; crime_mask |= (1 << bit); crime->imask = crime_mask; } -static void disable_mace_irq(unsigned int irq) +static void disable_mace_irq(struct irq_data *d) { - unsigned int bit = irq - CRIME_IRQ_BASE; + unsigned int bit = d->irq - CRIME_IRQ_BASE; crime_mask &= ~(1 << bit); crime->imask = crime_mask; flush_crime_bus(); } -static void end_mace_irq(unsigned int irq) -{ - if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) - enable_mace_irq(irq); -} - static struct irq_chip ip32_mace_interrupt = { .name = "IP32 MACE", - .ack = disable_mace_irq, - .mask = disable_mace_irq, - .mask_ack = disable_mace_irq, - .unmask = enable_mace_irq, - .end = end_mace_irq, + .irq_mask = disable_mace_irq, + .irq_unmask = enable_mace_irq, }; static void ip32_unknown_interrupt(void) diff --git a/arch/mips/sibyte/bcm1480/irq.c b/arch/mips/sibyte/bcm1480/irq.c index 044bbe4..89e8188 100644 --- a/arch/mips/sibyte/bcm1480/irq.c +++ b/arch/mips/sibyte/bcm1480/irq.c @@ -44,31 +44,10 @@ * for interrupt lines */ - -static void end_bcm1480_irq(unsigned int irq); -static void enable_bcm1480_irq(unsigned int irq); -static void disable_bcm1480_irq(unsigned int irq); -static void ack_bcm1480_irq(unsigned int irq); -#ifdef CONFIG_SMP -static int bcm1480_set_affinity(unsigned int irq, const struct cpumask *mask); -#endif - #ifdef CONFIG_PCI extern unsigned long ht_eoi_space; #endif -static struct irq_chip bcm1480_irq_type = { - .name = "BCM1480-IMR", - .ack = ack_bcm1480_irq, - .mask = disable_bcm1480_irq, - .mask_ack = ack_bcm1480_irq, - .unmask = enable_bcm1480_irq, - .end = end_bcm1480_irq, -#ifdef CONFIG_SMP - .set_affinity = bcm1480_set_affinity -#endif -}; - /* Store the CPU id (not the logical number) */ int bcm1480_irq_owner[BCM1480_NR_IRQS]; @@ -109,12 +88,13 @@ void bcm1480_unmask_irq(int cpu, int irq) } #ifdef CONFIG_SMP -static int bcm1480_set_affinity(unsigned int irq, const struct cpumask *mask) +static int bcm1480_set_affinity(struct irq_data *d, const struct cpumask *mask, + bool force) { + unsigned int irq_dirty, irq = d->irq; int i = 0, old_cpu, cpu, int_on, k; u64 cur_ints; unsigned long flags; - unsigned int irq_dirty; i = cpumask_first(mask); @@ -156,21 +136,25 @@ static int bcm1480_set_affinity(unsigned int irq, const struct cpumask *mask) /*****************************************************************************/ -static void disable_bcm1480_irq(unsigned int irq) +static void disable_bcm1480_irq(struct irq_data *d) { + unsigned int irq = d->irq; + bcm1480_mask_irq(bcm1480_irq_owner[irq], irq); } -static void enable_bcm1480_irq(unsigned int irq) +static void enable_bcm1480_irq(struct irq_data *d) { + unsigned int irq = d->irq; + bcm1480_unmask_irq(bcm1480_irq_owner[irq], irq); } -static void ack_bcm1480_irq(unsigned int irq) +static void ack_bcm1480_irq(struct irq_data *d) { + unsigned int irq_dirty, irq = d->irq; u64 pending; - unsigned int irq_dirty; int k; /* @@ -217,14 +201,15 @@ static void ack_bcm1480_irq(unsigned int irq) bcm1480_mask_irq(bcm1480_irq_owner[irq], irq); } - -static void end_bcm1480_irq(unsigned int irq) -{ - if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) { - bcm1480_unmask_irq(bcm1480_irq_owner[irq], irq); - } -} - +static struct irq_chip bcm1480_irq_type = { + .name = "BCM1480-IMR", + .irq_mask_ack = ack_bcm1480_irq, + .irq_mask = disable_bcm1480_irq, + .irq_unmask = enable_bcm1480_irq, +#ifdef CONFIG_SMP + .irq_set_affinity = bcm1480_set_affinity +#endif +}; void __init init_bcm1480_irqs(void) { diff --git a/arch/mips/sibyte/sb1250/irq.c b/arch/mips/sibyte/sb1250/irq.c index 12ac04a..fd269ea 100644 --- a/arch/mips/sibyte/sb1250/irq.c +++ b/arch/mips/sibyte/sb1250/irq.c @@ -43,31 +43,10 @@ * for interrupt lines */ - -static void end_sb1250_irq(unsigned int irq); -static void enable_sb1250_irq(unsigned int irq); -static void disable_sb1250_irq(unsigned int irq); -static void ack_sb1250_irq(unsigned int irq); -#ifdef CONFIG_SMP -static int sb1250_set_affinity(unsigned int irq, const struct cpumask *mask); -#endif - #ifdef CONFIG_SIBYTE_HAS_LDT extern unsigned long ldt_eoi_space; #endif -static struct irq_chip sb1250_irq_type = { - .name = "SB1250-IMR", - .ack = ack_sb1250_irq, - .mask = disable_sb1250_irq, - .mask_ack = ack_sb1250_irq, - .unmask = enable_sb1250_irq, - .end = end_sb1250_irq, -#ifdef CONFIG_SMP - .set_affinity = sb1250_set_affinity -#endif -}; - /* Store the CPU id (not the logical number) */ int sb1250_irq_owner[SB1250_NR_IRQS]; @@ -102,9 +81,11 @@ void sb1250_unmask_irq(int cpu, int irq) } #ifdef CONFIG_SMP -static int sb1250_set_affinity(unsigned int irq, const struct cpumask *mask) +static int sb1250_set_affinity(struct irq_data *d, const struct cpumask *mask, + bool force) { int i = 0, old_cpu, cpu, int_on; + unsigned int irq = d->irq; u64 cur_ints; unsigned long flags; @@ -142,21 +123,17 @@ static int sb1250_set_affinity(unsigned int irq, const struct cpumask *mask) } #endif -/*****************************************************************************/ - -static void disable_sb1250_irq(unsigned int irq) +static void enable_sb1250_irq(struct irq_data *d) { - sb1250_mask_irq(sb1250_irq_owner[irq], irq); -} + unsigned int irq = d->irq; -static void enable_sb1250_irq(unsigned int irq) -{ sb1250_unmask_irq(sb1250_irq_owner[irq], irq); } -static void ack_sb1250_irq(unsigned int irq) +static void ack_sb1250_irq(struct irq_data *d) { + unsigned int irq = d->irq; #ifdef CONFIG_SIBYTE_HAS_LDT u64 pending; @@ -199,14 +176,14 @@ static void ack_sb1250_irq(unsigned int irq) sb1250_mask_irq(sb1250_irq_owner[irq], irq); } - -static void end_sb1250_irq(unsigned int irq) -{ - if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) { - sb1250_unmask_irq(sb1250_irq_owner[irq], irq); - } -} - +static struct irq_chip sb1250_irq_type = { + .name = "SB1250-IMR", + .irq_mask_ack = ack_sb1250_irq, + .irq_unmask = enable_sb1250_irq, +#ifdef CONFIG_SMP + .irq_set_affinity = sb1250_set_affinity +#endif +}; void __init init_sb1250_irqs(void) { diff --git a/arch/mips/sni/a20r.c b/arch/mips/sni/a20r.c index bbe7187..72b9415 100644 --- a/arch/mips/sni/a20r.c +++ b/arch/mips/sni/a20r.c @@ -168,33 +168,22 @@ static u32 a20r_ack_hwint(void) return status; } -static inline void unmask_a20r_irq(unsigned int irq) +static inline void unmask_a20r_irq(struct irq_data *d) { - set_c0_status(0x100 << (irq - SNI_A20R_IRQ_BASE)); + set_c0_status(0x100 << (d->irq - SNI_A20R_IRQ_BASE)); irq_enable_hazard(); } -static inline void mask_a20r_irq(unsigned int irq) +static inline void mask_a20r_irq(struct irq_data *d) { - clear_c0_status(0x100 << (irq - SNI_A20R_IRQ_BASE)); + clear_c0_status(0x100 << (d->irq - SNI_A20R_IRQ_BASE)); irq_disable_hazard(); } -static void end_a20r_irq(unsigned int irq) -{ - if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) { - a20r_ack_hwint(); - unmask_a20r_irq(irq); - } -} - static struct irq_chip a20r_irq_type = { .name = "A20R", - .ack = mask_a20r_irq, - .mask = mask_a20r_irq, - .mask_ack = mask_a20r_irq, - .unmask = unmask_a20r_irq, - .end = end_a20r_irq, + .irq_mask = mask_a20r_irq, + .irq_unmask = unmask_a20r_irq, }; /* diff --git a/arch/mips/sni/pcimt.c b/arch/mips/sni/pcimt.c index 8c92c73..cfcc68a 100644 --- a/arch/mips/sni/pcimt.c +++ b/arch/mips/sni/pcimt.c @@ -194,33 +194,24 @@ static struct pci_controller sni_controller = { .io_map_base = SNI_PORT_BASE }; -static void enable_pcimt_irq(unsigned int irq) +static void enable_pcimt_irq(struct irq_data *d) { - unsigned int mask = 1 << (irq - PCIMT_IRQ_INT2); + unsigned int mask = 1 << (d->irq - PCIMT_IRQ_INT2); *(volatile u8 *) PCIMT_IRQSEL |= mask; } -void disable_pcimt_irq(unsigned int irq) +void disable_pcimt_irq(struct irq_data *d) { - unsigned int mask = ~(1 << (irq - PCIMT_IRQ_INT2)); + unsigned int mask = ~(1 << (d->irq - PCIMT_IRQ_INT2)); *(volatile u8 *) PCIMT_IRQSEL &= mask; } -static void end_pcimt_irq(unsigned int irq) -{ - if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) - enable_pcimt_irq(irq); -} - static struct irq_chip pcimt_irq_type = { .name = "PCIMT", - .ack = disable_pcimt_irq, - .mask = disable_pcimt_irq, - .mask_ack = disable_pcimt_irq, - .unmask = enable_pcimt_irq, - .end = end_pcimt_irq, + .irq_mask = disable_pcimt_irq, + .irq_unmask = enable_pcimt_irq, }; /* diff --git a/arch/mips/sni/pcit.c b/arch/mips/sni/pcit.c index dc98745..0846e99 100644 --- a/arch/mips/sni/pcit.c +++ b/arch/mips/sni/pcit.c @@ -156,33 +156,24 @@ static struct pci_controller sni_pcit_controller = { .io_map_base = SNI_PORT_BASE }; -static void enable_pcit_irq(unsigned int irq) +static void enable_pcit_irq(struct irq_data *d) { - u32 mask = 1 << (irq - SNI_PCIT_INT_START + 24); + u32 mask = 1 << (d->irq - SNI_PCIT_INT_START + 24); *(volatile u32 *)SNI_PCIT_INT_REG |= mask; } -void disable_pcit_irq(unsigned int irq) +void disable_pcit_irq(struct irq_data *d) { - u32 mask = 1 << (irq - SNI_PCIT_INT_START + 24); + u32 mask = 1 << (d->irq - SNI_PCIT_INT_START + 24); *(volatile u32 *)SNI_PCIT_INT_REG &= ~mask; } -void end_pcit_irq(unsigned int irq) -{ - if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) - enable_pcit_irq(irq); -} - static struct irq_chip pcit_irq_type = { .name = "PCIT", - .ack = disable_pcit_irq, - .mask = disable_pcit_irq, - .mask_ack = disable_pcit_irq, - .unmask = enable_pcit_irq, - .end = end_pcit_irq, + .irq_mask = disable_pcit_irq, + .irq_unmask = enable_pcit_irq, }; static void pcit_hwint1(void) diff --git a/arch/mips/sni/rm200.c b/arch/mips/sni/rm200.c index 0e6f42c..f05d8e5 100644 --- a/arch/mips/sni/rm200.c +++ b/arch/mips/sni/rm200.c @@ -155,12 +155,11 @@ static __iomem u8 *rm200_pic_slave; #define cached_master_mask (rm200_cached_irq_mask) #define cached_slave_mask (rm200_cached_irq_mask >> 8) -static void sni_rm200_disable_8259A_irq(unsigned int irq) +static void sni_rm200_disable_8259A_irq(struct irq_data *d) { - unsigned int mask; + unsigned int mask, irq = d->irq - RM200_I8259A_IRQ_BASE; unsigned long flags; - irq -= RM200_I8259A_IRQ_BASE; mask = 1 << irq; raw_spin_lock_irqsave(&sni_rm200_i8259A_lock, flags); rm200_cached_irq_mask |= mask; @@ -171,12 +170,11 @@ static void sni_rm200_disable_8259A_irq(unsigned int irq) raw_spin_unlock_irqrestore(&sni_rm200_i8259A_lock, flags); } -static void sni_rm200_enable_8259A_irq(unsigned int irq) +static void sni_rm200_enable_8259A_irq(struct irq_data *d) { - unsigned int mask; + unsigned int mask, irq = d->irq - RM200_I8259A_IRQ_BASE; unsigned long flags; - irq -= RM200_I8259A_IRQ_BASE; mask = ~(1 << irq); raw_spin_lock_irqsave(&sni_rm200_i8259A_lock, flags); rm200_cached_irq_mask &= mask; @@ -210,12 +208,11 @@ static inline int sni_rm200_i8259A_irq_real(unsigned int irq) * first, _then_ send the EOI, and the order of EOI * to the two 8259s is important! */ -void sni_rm200_mask_and_ack_8259A(unsigned int irq) +void sni_rm200_mask_and_ack_8259A(struct irq_data *d) { - unsigned int irqmask; + unsigned int irqmask, irq = d->irq - RM200_I8259A_IRQ_BASE; unsigned long flags; - irq -= RM200_I8259A_IRQ_BASE; irqmask = 1 << irq; raw_spin_lock_irqsave(&sni_rm200_i8259A_lock, flags); /* @@ -285,9 +282,9 @@ spurious_8259A_irq: static struct irq_chip sni_rm200_i8259A_chip = { .name = "RM200-XT-PIC", - .mask = sni_rm200_disable_8259A_irq, - .unmask = sni_rm200_enable_8259A_irq, - .mask_ack = sni_rm200_mask_and_ack_8259A, + .irq_mask = sni_rm200_disable_8259A_irq, + .irq_unmask = sni_rm200_enable_8259A_irq, + .irq_mask_ack = sni_rm200_mask_and_ack_8259A, }; /* @@ -429,33 +426,24 @@ void __init sni_rm200_i8259_irqs(void) #define SNI_RM200_INT_START 24 #define SNI_RM200_INT_END 28 -static void enable_rm200_irq(unsigned int irq) +static void enable_rm200_irq(struct irq_data *d) { - unsigned int mask = 1 << (irq - SNI_RM200_INT_START); + unsigned int mask = 1 << (d->irq - SNI_RM200_INT_START); *(volatile u8 *)SNI_RM200_INT_ENA_REG &= ~mask; } -void disable_rm200_irq(unsigned int irq) +void disable_rm200_irq(struct irq_data *d) { - unsigned int mask = 1 << (irq - SNI_RM200_INT_START); + unsigned int mask = 1 << (d->irq - SNI_RM200_INT_START); *(volatile u8 *)SNI_RM200_INT_ENA_REG |= mask; } -void end_rm200_irq(unsigned int irq) -{ - if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) - enable_rm200_irq(irq); -} - static struct irq_chip rm200_irq_type = { .name = "RM200", - .ack = disable_rm200_irq, - .mask = disable_rm200_irq, - .mask_ack = disable_rm200_irq, - .unmask = enable_rm200_irq, - .end = end_rm200_irq, + .irq_mask = disable_rm200_irq, + .irq_unmask = enable_rm200_irq, }; static void sni_rm200_hwint(void) diff --git a/arch/mips/txx9/generic/irq_tx4939.c b/arch/mips/txx9/generic/irq_tx4939.c index 3886ad7..93b6edb 100644 --- a/arch/mips/txx9/generic/irq_tx4939.c +++ b/arch/mips/txx9/generic/irq_tx4939.c @@ -50,9 +50,9 @@ static struct { unsigned char mode; } tx4939irq[TX4939_NUM_IR] __read_mostly; -static void tx4939_irq_unmask(unsigned int irq) +static void tx4939_irq_unmask(struct irq_data *d) { - unsigned int irq_nr = irq - TXX9_IRQ_BASE; + unsigned int irq_nr = d->irq - TXX9_IRQ_BASE; u32 __iomem *lvlp; int ofs; if (irq_nr < 32) { @@ -68,9 +68,9 @@ static void tx4939_irq_unmask(unsigned int irq) lvlp); } -static inline void tx4939_irq_mask(unsigned int irq) +static inline void tx4939_irq_mask(struct irq_data *d) { - unsigned int irq_nr = irq - TXX9_IRQ_BASE; + unsigned int irq_nr = d->irq - TXX9_IRQ_BASE; u32 __iomem *lvlp; int ofs; if (irq_nr < 32) { @@ -87,11 +87,11 @@ static inline void tx4939_irq_mask(unsigned int irq) mmiowb(); } -static void tx4939_irq_mask_ack(unsigned int irq) +static void tx4939_irq_mask_ack(struct irq_data *d) { - unsigned int irq_nr = irq - TXX9_IRQ_BASE; + unsigned int irq_nr = d->irq - TXX9_IRQ_BASE; - tx4939_irq_mask(irq); + tx4939_irq_mask(d); if (TXx9_IRCR_EDGE(tx4939irq[irq_nr].mode)) { irq_nr--; /* clear edge detection */ @@ -101,9 +101,9 @@ static void tx4939_irq_mask_ack(unsigned int irq) } } -static int tx4939_irq_set_type(unsigned int irq, unsigned int flow_type) +static int tx4939_irq_set_type(struct irq_data *d, unsigned int flow_type) { - unsigned int irq_nr = irq - TXX9_IRQ_BASE; + unsigned int irq_nr = d->irq - TXX9_IRQ_BASE; u32 cr; u32 __iomem *crp; int ofs; @@ -145,11 +145,11 @@ static int tx4939_irq_set_type(unsigned int irq, unsigned int flow_type) static struct irq_chip tx4939_irq_chip = { .name = "TX4939", - .ack = tx4939_irq_mask_ack, - .mask = tx4939_irq_mask, - .mask_ack = tx4939_irq_mask_ack, - .unmask = tx4939_irq_unmask, - .set_type = tx4939_irq_set_type, + .irq_ack = tx4939_irq_mask_ack, + .irq_mask = tx4939_irq_mask, + .irq_mask_ack = tx4939_irq_mask_ack, + .irq_unmask = tx4939_irq_unmask, + .irq_set_type = tx4939_irq_set_type, }; static int tx4939_irq_set_pri(int irc_irq, int new_pri) diff --git a/arch/mips/txx9/jmr3927/irq.c b/arch/mips/txx9/jmr3927/irq.c index 0a7f8e3..92a5c1b 100644 --- a/arch/mips/txx9/jmr3927/irq.c +++ b/arch/mips/txx9/jmr3927/irq.c @@ -47,20 +47,20 @@ * CP0_STATUS is a thread's resource (saved/restored on context switch). * So disable_irq/enable_irq MUST handle IOC/IRC registers. */ -static void mask_irq_ioc(unsigned int irq) +static void mask_irq_ioc(struct irq_data *d) { /* 0: mask */ - unsigned int irq_nr = irq - JMR3927_IRQ_IOC; + unsigned int irq_nr = d->irq - JMR3927_IRQ_IOC; unsigned char imask = jmr3927_ioc_reg_in(JMR3927_IOC_INTM_ADDR); unsigned int bit = 1 << irq_nr; jmr3927_ioc_reg_out(imask & ~bit, JMR3927_IOC_INTM_ADDR); /* flush write buffer */ (void)jmr3927_ioc_reg_in(JMR3927_IOC_REV_ADDR); } -static void unmask_irq_ioc(unsigned int irq) +static void unmask_irq_ioc(struct irq_data *d) { /* 0: mask */ - unsigned int irq_nr = irq - JMR3927_IRQ_IOC; + unsigned int irq_nr = d->irq - JMR3927_IRQ_IOC; unsigned char imask = jmr3927_ioc_reg_in(JMR3927_IOC_INTM_ADDR); unsigned int bit = 1 << irq_nr; jmr3927_ioc_reg_out(imask | bit, JMR3927_IOC_INTM_ADDR); @@ -95,10 +95,8 @@ static int jmr3927_irq_dispatch(int pending) static struct irq_chip jmr3927_irq_ioc = { .name = "jmr3927_ioc", - .ack = mask_irq_ioc, - .mask = mask_irq_ioc, - .mask_ack = mask_irq_ioc, - .unmask = unmask_irq_ioc, + .irq_mask = mask_irq_ioc, + .irq_unmask = unmask_irq_ioc, }; void __init jmr3927_irq_setup(void) diff --git a/arch/mips/txx9/rbtx4927/irq.c b/arch/mips/txx9/rbtx4927/irq.c index c4b54d2..7c0a048 100644 --- a/arch/mips/txx9/rbtx4927/irq.c +++ b/arch/mips/txx9/rbtx4927/irq.c @@ -117,18 +117,6 @@ #include <asm/txx9/generic.h> #include <asm/txx9/rbtx4927.h> -static void toshiba_rbtx4927_irq_ioc_enable(unsigned int irq); -static void toshiba_rbtx4927_irq_ioc_disable(unsigned int irq); - -#define TOSHIBA_RBTX4927_IOC_NAME "RBTX4927-IOC" -static struct irq_chip toshiba_rbtx4927_irq_ioc_type = { - .name = TOSHIBA_RBTX4927_IOC_NAME, - .ack = toshiba_rbtx4927_irq_ioc_disable, - .mask = toshiba_rbtx4927_irq_ioc_disable, - .mask_ack = toshiba_rbtx4927_irq_ioc_disable, - .unmask = toshiba_rbtx4927_irq_ioc_enable, -}; - static int toshiba_rbtx4927_irq_nested(int sw_irq) { u8 level3; @@ -139,41 +127,47 @@ static int toshiba_rbtx4927_irq_nested(int sw_irq) return RBTX4927_IRQ_IOC + __fls8(level3); } -static void __init toshiba_rbtx4927_irq_ioc_init(void) -{ - int i; - - /* mask all IOC interrupts */ - writeb(0, rbtx4927_imask_addr); - /* clear SoftInt interrupts */ - writeb(0, rbtx4927_softint_addr); - - for (i = RBTX4927_IRQ_IOC; - i < RBTX4927_IRQ_IOC + RBTX4927_NR_IRQ_IOC; i++) - set_irq_chip_and_handler(i, &toshiba_rbtx4927_irq_ioc_type, - handle_level_irq); - set_irq_chained_handler(RBTX4927_IRQ_IOCINT, handle_simple_irq); -} - -static void toshiba_rbtx4927_irq_ioc_enable(unsigned int irq) +static void toshiba_rbtx4927_irq_ioc_enable(struct irq_data *d) { unsigned char v; v = readb(rbtx4927_imask_addr); - v |= (1 << (irq - RBTX4927_IRQ_IOC)); + v |= (1 << (d->irq - RBTX4927_IRQ_IOC)); writeb(v, rbtx4927_imask_addr); } -static void toshiba_rbtx4927_irq_ioc_disable(unsigned int irq) +static void toshiba_rbtx4927_irq_ioc_disable(struct irq_data *d) { unsigned char v; v = readb(rbtx4927_imask_addr); - v &= ~(1 << (irq - RBTX4927_IRQ_IOC)); + v &= ~(1 << (d->irq - RBTX4927_IRQ_IOC)); writeb(v, rbtx4927_imask_addr); mmiowb(); } +#define TOSHIBA_RBTX4927_IOC_NAME "RBTX4927-IOC" +static struct irq_chip toshiba_rbtx4927_irq_ioc_type = { + .name = TOSHIBA_RBTX4927_IOC_NAME, + .irq_mask = toshiba_rbtx4927_irq_ioc_disable, + .irq_unmask = toshiba_rbtx4927_irq_ioc_enable, +}; + +static void __init toshiba_rbtx4927_irq_ioc_init(void) +{ + int i; + + /* mask all IOC interrupts */ + writeb(0, rbtx4927_imask_addr); + /* clear SoftInt interrupts */ + writeb(0, rbtx4927_softint_addr); + + for (i = RBTX4927_IRQ_IOC; + i < RBTX4927_IRQ_IOC + RBTX4927_NR_IRQ_IOC; i++) + set_irq_chip_and_handler(i, &toshiba_rbtx4927_irq_ioc_type, + handle_level_irq); + set_irq_chained_handler(RBTX4927_IRQ_IOCINT, handle_simple_irq); +} static int rbtx4927_irq_dispatch(int pending) { diff --git a/arch/mips/txx9/rbtx4938/irq.c b/arch/mips/txx9/rbtx4938/irq.c index 67a73a8..2ec4fe1 100644 --- a/arch/mips/txx9/rbtx4938/irq.c +++ b/arch/mips/txx9/rbtx4938/irq.c @@ -69,18 +69,6 @@ #include <asm/txx9/generic.h> #include <asm/txx9/rbtx4938.h> -static void toshiba_rbtx4938_irq_ioc_enable(unsigned int irq); -static void toshiba_rbtx4938_irq_ioc_disable(unsigned int irq); - -#define TOSHIBA_RBTX4938_IOC_NAME "RBTX4938-IOC" -static struct irq_chip toshiba_rbtx4938_irq_ioc_type = { - .name = TOSHIBA_RBTX4938_IOC_NAME, - .ack = toshiba_rbtx4938_irq_ioc_disable, - .mask = toshiba_rbtx4938_irq_ioc_disable, - .mask_ack = toshiba_rbtx4938_irq_ioc_disable, - .unmask = toshiba_rbtx4938_irq_ioc_enable, -}; - static int toshiba_rbtx4938_irq_nested(int sw_irq) { u8 level3; @@ -92,41 +80,33 @@ static int toshiba_rbtx4938_irq_nested(int sw_irq) return RBTX4938_IRQ_IOC + __fls8(level3); } -static void __init -toshiba_rbtx4938_irq_ioc_init(void) -{ - int i; - - for (i = RBTX4938_IRQ_IOC; - i < RBTX4938_IRQ_IOC + RBTX4938_NR_IRQ_IOC; i++) - set_irq_chip_and_handler(i, &toshiba_rbtx4938_irq_ioc_type, - handle_level_irq); - - set_irq_chained_handler(RBTX4938_IRQ_IOCINT, handle_simple_irq); -} - -static void -toshiba_rbtx4938_irq_ioc_enable(unsigned int irq) +static void toshiba_rbtx4938_irq_ioc_enable(struct irq_data *d) { unsigned char v; v = readb(rbtx4938_imask_addr); - v |= (1 << (irq - RBTX4938_IRQ_IOC)); + v |= (1 << (d->irq - RBTX4938_IRQ_IOC)); writeb(v, rbtx4938_imask_addr); mmiowb(); } -static void -toshiba_rbtx4938_irq_ioc_disable(unsigned int irq) +static void toshiba_rbtx4938_irq_ioc_disable(struct irq_data *d) { unsigned char v; v = readb(rbtx4938_imask_addr); - v &= ~(1 << (irq - RBTX4938_IRQ_IOC)); + v &= ~(1 << (d->irq - RBTX4938_IRQ_IOC)); writeb(v, rbtx4938_imask_addr); mmiowb(); } +#define TOSHIBA_RBTX4938_IOC_NAME "RBTX4938-IOC" +static struct irq_chip toshiba_rbtx4938_irq_ioc_type = { + .name = TOSHIBA_RBTX4938_IOC_NAME, + .irq_mask = toshiba_rbtx4938_irq_ioc_disable, + .irq_unmask = toshiba_rbtx4938_irq_ioc_enable, +}; + static int rbtx4938_irq_dispatch(int pending) { int irq; @@ -146,6 +126,18 @@ static int rbtx4938_irq_dispatch(int pending) return irq; } +static void __init toshiba_rbtx4938_irq_ioc_init(void) +{ + int i; + + for (i = RBTX4938_IRQ_IOC; + i < RBTX4938_IRQ_IOC + RBTX4938_NR_IRQ_IOC; i++) + set_irq_chip_and_handler(i, &toshiba_rbtx4938_irq_ioc_type, + handle_level_irq); + + set_irq_chained_handler(RBTX4938_IRQ_IOCINT, handle_simple_irq); +} + void __init rbtx4938_irq_setup(void) { txx9_irq_dispatch = rbtx4938_irq_dispatch; diff --git a/arch/mips/txx9/rbtx4939/irq.c b/arch/mips/txx9/rbtx4939/irq.c index 57fa740..7007463 100644 --- a/arch/mips/txx9/rbtx4939/irq.c +++ b/arch/mips/txx9/rbtx4939/irq.c @@ -19,16 +19,16 @@ * RBTX4939 IOC controller definition */ -static void rbtx4939_ioc_irq_unmask(unsigned int irq) +static void rbtx4939_ioc_irq_unmask(struct irq_data *d) { - int ioc_nr = irq - RBTX4939_IRQ_IOC; + int ioc_nr = d->irq - RBTX4939_IRQ_IOC; writeb(readb(rbtx4939_ien_addr) | (1 << ioc_nr), rbtx4939_ien_addr); } -static void rbtx4939_ioc_irq_mask(unsigned int irq) +static void rbtx4939_ioc_irq_mask(struct irq_data *d) { - int ioc_nr = irq - RBTX4939_IRQ_IOC; + int ioc_nr = d->irq - RBTX4939_IRQ_IOC; writeb(readb(rbtx4939_ien_addr) & ~(1 << ioc_nr), rbtx4939_ien_addr); mmiowb(); @@ -36,10 +36,8 @@ static void rbtx4939_ioc_irq_mask(unsigned int irq) static struct irq_chip rbtx4939_ioc_irq_chip = { .name = "IOC", - .ack = rbtx4939_ioc_irq_mask, - .mask = rbtx4939_ioc_irq_mask, - .mask_ack = rbtx4939_ioc_irq_mask, - .unmask = rbtx4939_ioc_irq_unmask, + .irq_mask = rbtx4939_ioc_irq_mask, + .irq_unmask = rbtx4939_ioc_irq_unmask, }; diff --git a/arch/mips/vr41xx/common/icu.c b/arch/mips/vr41xx/common/icu.c index 6153b6a..f53156b 100644 --- a/arch/mips/vr41xx/common/icu.c +++ b/arch/mips/vr41xx/common/icu.c @@ -154,7 +154,7 @@ static inline uint16_t icu2_clear(uint8_t offset, uint16_t clear) void vr41xx_enable_piuint(uint16_t mask) { - struct irq_desc *desc = irq_desc + PIU_IRQ; + struct irq_desc *desc = irq_to_desc(PIU_IRQ); unsigned long flags; if (current_cpu_type() == CPU_VR4111 || @@ -169,7 +169,7 @@ EXPORT_SYMBOL(vr41xx_enable_piuint); void vr41xx_disable_piuint(uint16_t mask) { - struct irq_desc *desc = irq_desc + PIU_IRQ; + struct irq_desc *desc = irq_to_desc(PIU_IRQ); unsigned long flags; if (current_cpu_type() == CPU_VR4111 || @@ -184,7 +184,7 @@ EXPORT_SYMBOL(vr41xx_disable_piuint); void vr41xx_enable_aiuint(uint16_t mask) { - struct irq_desc *desc = irq_desc + AIU_IRQ; + struct irq_desc *desc = irq_to_desc(AIU_IRQ); unsigned long flags; if (current_cpu_type() == CPU_VR4111 || @@ -199,7 +199,7 @@ EXPORT_SYMBOL(vr41xx_enable_aiuint); void vr41xx_disable_aiuint(uint16_t mask) { - struct irq_desc *desc = irq_desc + AIU_IRQ; + struct irq_desc *desc = irq_to_desc(AIU_IRQ); unsigned long flags; if (current_cpu_type() == CPU_VR4111 || @@ -214,7 +214,7 @@ EXPORT_SYMBOL(vr41xx_disable_aiuint); void vr41xx_enable_kiuint(uint16_t mask) { - struct irq_desc *desc = irq_desc + KIU_IRQ; + struct irq_desc *desc = irq_to_desc(KIU_IRQ); unsigned long flags; if (current_cpu_type() == CPU_VR4111 || @@ -229,7 +229,7 @@ EXPORT_SYMBOL(vr41xx_enable_kiuint); void vr41xx_disable_kiuint(uint16_t mask) { - struct irq_desc *desc = irq_desc + KIU_IRQ; + struct irq_desc *desc = irq_to_desc(KIU_IRQ); unsigned long flags; if (current_cpu_type() == CPU_VR4111 || @@ -244,7 +244,7 @@ EXPORT_SYMBOL(vr41xx_disable_kiuint); void vr41xx_enable_macint(uint16_t mask) { - struct irq_desc *desc = irq_desc + ETHERNET_IRQ; + struct irq_desc *desc = irq_to_desc(ETHERNET_IRQ); unsigned long flags; raw_spin_lock_irqsave(&desc->lock, flags); @@ -256,7 +256,7 @@ EXPORT_SYMBOL(vr41xx_enable_macint); void vr41xx_disable_macint(uint16_t mask) { - struct irq_desc *desc = irq_desc + ETHERNET_IRQ; + struct irq_desc *desc = irq_to_desc(ETHERNET_IRQ); unsigned long flags; raw_spin_lock_irqsave(&desc->lock, flags); @@ -268,7 +268,7 @@ EXPORT_SYMBOL(vr41xx_disable_macint); void vr41xx_enable_dsiuint(uint16_t mask) { - struct irq_desc *desc = irq_desc + DSIU_IRQ; + struct irq_desc *desc = irq_to_desc(DSIU_IRQ); unsigned long flags; raw_spin_lock_irqsave(&desc->lock, flags); @@ -280,7 +280,7 @@ EXPORT_SYMBOL(vr41xx_enable_dsiuint); void vr41xx_disable_dsiuint(uint16_t mask) { - struct irq_desc *desc = irq_desc + DSIU_IRQ; + struct irq_desc *desc = irq_to_desc(DSIU_IRQ); unsigned long flags; raw_spin_lock_irqsave(&desc->lock, flags); @@ -292,7 +292,7 @@ EXPORT_SYMBOL(vr41xx_disable_dsiuint); void vr41xx_enable_firint(uint16_t mask) { - struct irq_desc *desc = irq_desc + FIR_IRQ; + struct irq_desc *desc = irq_to_desc(FIR_IRQ); unsigned long flags; raw_spin_lock_irqsave(&desc->lock, flags); @@ -304,7 +304,7 @@ EXPORT_SYMBOL(vr41xx_enable_firint); void vr41xx_disable_firint(uint16_t mask) { - struct irq_desc *desc = irq_desc + FIR_IRQ; + struct irq_desc *desc = irq_to_desc(FIR_IRQ); unsigned long flags; raw_spin_lock_irqsave(&desc->lock, flags); @@ -316,7 +316,7 @@ EXPORT_SYMBOL(vr41xx_disable_firint); void vr41xx_enable_pciint(void) { - struct irq_desc *desc = irq_desc + PCI_IRQ; + struct irq_desc *desc = irq_to_desc(PCI_IRQ); unsigned long flags; if (current_cpu_type() == CPU_VR4122 || @@ -332,7 +332,7 @@ EXPORT_SYMBOL(vr41xx_enable_pciint); void vr41xx_disable_pciint(void) { - struct irq_desc *desc = irq_desc + PCI_IRQ; + struct irq_desc *desc = irq_to_desc(PCI_IRQ); unsigned long flags; if (current_cpu_type() == CPU_VR4122 || @@ -348,7 +348,7 @@ EXPORT_SYMBOL(vr41xx_disable_pciint); void vr41xx_enable_scuint(void) { - struct irq_desc *desc = irq_desc + SCU_IRQ; + struct irq_desc *desc = irq_to_desc(SCU_IRQ); unsigned long flags; if (current_cpu_type() == CPU_VR4122 || @@ -364,7 +364,7 @@ EXPORT_SYMBOL(vr41xx_enable_scuint); void vr41xx_disable_scuint(void) { - struct irq_desc *desc = irq_desc + SCU_IRQ; + struct irq_desc *desc = irq_to_desc(SCU_IRQ); unsigned long flags; if (current_cpu_type() == CPU_VR4122 || @@ -380,7 +380,7 @@ EXPORT_SYMBOL(vr41xx_disable_scuint); void vr41xx_enable_csiint(uint16_t mask) { - struct irq_desc *desc = irq_desc + CSI_IRQ; + struct irq_desc *desc = irq_to_desc(CSI_IRQ); unsigned long flags; if (current_cpu_type() == CPU_VR4122 || @@ -396,7 +396,7 @@ EXPORT_SYMBOL(vr41xx_enable_csiint); void vr41xx_disable_csiint(uint16_t mask) { - struct irq_desc *desc = irq_desc + CSI_IRQ; + struct irq_desc *desc = irq_to_desc(CSI_IRQ); unsigned long flags; if (current_cpu_type() == CPU_VR4122 || @@ -412,7 +412,7 @@ EXPORT_SYMBOL(vr41xx_disable_csiint); void vr41xx_enable_bcuint(void) { - struct irq_desc *desc = irq_desc + BCU_IRQ; + struct irq_desc *desc = irq_to_desc(BCU_IRQ); unsigned long flags; if (current_cpu_type() == CPU_VR4122 || @@ -428,7 +428,7 @@ EXPORT_SYMBOL(vr41xx_enable_bcuint); void vr41xx_disable_bcuint(void) { - struct irq_desc *desc = irq_desc + BCU_IRQ; + struct irq_desc *desc = irq_to_desc(BCU_IRQ); unsigned long flags; if (current_cpu_type() == CPU_VR4122 || @@ -442,45 +442,41 @@ void vr41xx_disable_bcuint(void) EXPORT_SYMBOL(vr41xx_disable_bcuint); -static void disable_sysint1_irq(unsigned int irq) +static void disable_sysint1_irq(struct irq_data *d) { - icu1_clear(MSYSINT1REG, 1 << SYSINT1_IRQ_TO_PIN(irq)); + icu1_clear(MSYSINT1REG, 1 << SYSINT1_IRQ_TO_PIN(d->irq)); } -static void enable_sysint1_irq(unsigned int irq) +static void enable_sysint1_irq(struct irq_data *d) { - icu1_set(MSYSINT1REG, 1 << SYSINT1_IRQ_TO_PIN(irq)); + icu1_set(MSYSINT1REG, 1 << SYSINT1_IRQ_TO_PIN(d->irq)); } static struct irq_chip sysint1_irq_type = { .name = "SYSINT1", - .ack = disable_sysint1_irq, - .mask = disable_sysint1_irq, - .mask_ack = disable_sysint1_irq, - .unmask = enable_sysint1_irq, + .irq_mask = disable_sysint1_irq, + .irq_unmask = enable_sysint1_irq, }; -static void disable_sysint2_irq(unsigned int irq) +static void disable_sysint2_irq(struct irq_data *d) { - icu2_clear(MSYSINT2REG, 1 << SYSINT2_IRQ_TO_PIN(irq)); + icu2_clear(MSYSINT2REG, 1 << SYSINT2_IRQ_TO_PIN(d->irq)); } -static void enable_sysint2_irq(unsigned int irq) +static void enable_sysint2_irq(struct irq_data *d) { - icu2_set(MSYSINT2REG, 1 << SYSINT2_IRQ_TO_PIN(irq)); + icu2_set(MSYSINT2REG, 1 << SYSINT2_IRQ_TO_PIN(d->irq)); } static struct irq_chip sysint2_irq_type = { .name = "SYSINT2", - .ack = disable_sysint2_irq, - .mask = disable_sysint2_irq, - .mask_ack = disable_sysint2_irq, - .unmask = enable_sysint2_irq, + .irq_mask = disable_sysint2_irq, + .irq_unmask = enable_sysint2_irq, }; static inline int set_sysint1_assign(unsigned int irq, unsigned char assign) { - struct irq_desc *desc = irq_desc + irq; + struct irq_desc *desc = irq_to_desc(irq); uint16_t intassign0, intassign1; unsigned int pin; @@ -540,7 +536,7 @@ static inline int set_sysint1_assign(unsigned int irq, unsigned char assign) static inline int set_sysint2_assign(unsigned int irq, unsigned char assign) { - struct irq_desc *desc = irq_desc + irq; + struct irq_desc *desc = irq_to_desc(irq); uint16_t intassign2, intassign3; unsigned int pin; diff --git a/arch/mips/vr41xx/common/irq.c b/arch/mips/vr41xx/common/irq.c index 0975eb7..9ff7f39 100644 --- a/arch/mips/vr41xx/common/irq.c +++ b/arch/mips/vr41xx/common/irq.c @@ -62,7 +62,6 @@ EXPORT_SYMBOL_GPL(cascade_irq); static void irq_dispatch(unsigned int irq) { irq_cascade_t *cascade; - struct irq_desc *desc; if (irq >= NR_IRQS) { atomic_inc(&irq_err_count); @@ -71,14 +70,16 @@ static void irq_dispatch(unsigned int irq) cascade = irq_cascade + irq; if (cascade->get_irq != NULL) { - unsigned int source_irq = irq; + struct irq_desc *desc = irq_to_desc(irq); + struct irq_data *idata = irq_desc_get_irq_data(desc); + struct irq_chip *chip = irq_desc_get_chip(desc); int ret; - desc = irq_desc + source_irq; - if (desc->chip->mask_ack) - desc->chip->mask_ack(source_irq); + + if (chip->irq_mask_ack) + chip->irq_mask_ack(idata); else { - desc->chip->mask(source_irq); - desc->chip->ack(source_irq); + chip->irq_mask(idata); + chip->irq_ack(idata); } ret = cascade->get_irq(irq); irq = ret; @@ -86,8 +87,8 @@ static void irq_dispatch(unsigned int irq) atomic_inc(&irq_err_count); else irq_dispatch(irq); - if (!(desc->status & IRQ_DISABLED) && desc->chip->unmask) - desc->chip->unmask(source_irq); + if (!(desc->status & IRQ_DISABLED) && chip->irq_unmask) + chip->irq_unmask(idata); } else do_IRQ(irq); } diff --git a/arch/mn10300/Kconfig b/arch/mn10300/Kconfig index 243bfa2..d8ab97a 100644 --- a/arch/mn10300/Kconfig +++ b/arch/mn10300/Kconfig @@ -1,7 +1,10 @@ config MN10300 def_bool y select HAVE_OPROFILE - select GENERIC_HARDIRQS + select HAVE_GENERIC_HARDIRQS + select GENERIC_HARDIRQS_NO_DEPRECATED + select HAVE_ARCH_TRACEHOOK + select HAVE_ARCH_KGDB config AM33_2 def_bool n @@ -53,21 +56,6 @@ config GENERIC_TIME config GENERIC_CLOCKEVENTS def_bool y -config GENERIC_CLOCKEVENTS_BUILD - def_bool y - depends on GENERIC_CLOCKEVENTS - -config GENERIC_CLOCKEVENTS_BROADCAST - bool - -config CEVT_MN10300 - def_bool y - depends on GENERIC_CLOCKEVENTS - -config CSRC_MN10300 - def_bool y - depends on GENERIC_TIME - config GENERIC_BUG def_bool y @@ -415,9 +403,9 @@ comment "[!] NOTE: A lower number/level indicates a higher priority (0 is highes comment "____Non-maskable interrupt levels____" comment "The following must be set to a higher priority than local_irq_disable() and on-chip serial" -config GDBSTUB_IRQ_LEVEL - int "GDBSTUB interrupt priority" - depends on GDBSTUB +config DEBUGGER_IRQ_LEVEL + int "DEBUGGER interrupt priority" + depends on KERNEL_DEBUGGER range 0 1 if LINUX_CLI_LEVEL = 2 range 0 2 if LINUX_CLI_LEVEL = 3 range 0 3 if LINUX_CLI_LEVEL = 4 @@ -451,7 +439,7 @@ config LINUX_CLI_LEVEL EPSW.IM from 7. Any interrupt is permitted for which the level is lower than EPSW.IM. - Certain interrupts, such as GDBSTUB and virtual MN10300 on-chip + Certain interrupts, such as DEBUGGER and virtual MN10300 on-chip serial DMA interrupts are allowed to interrupt normal disabled sections. diff --git a/arch/mn10300/Kconfig.debug b/arch/mn10300/Kconfig.debug index ce83c74..bdbfd44 100644 --- a/arch/mn10300/Kconfig.debug +++ b/arch/mn10300/Kconfig.debug @@ -36,7 +36,7 @@ config KPROBES config GDBSTUB bool "Remote GDB kernel debugging" - depends on DEBUG_KERNEL + depends on DEBUG_KERNEL && DEPRECATED select DEBUG_INFO select FRAME_POINTER help @@ -46,6 +46,9 @@ config GDBSTUB RAM to avoid excessive linking time. This is only useful for kernel hackers. If unsure, say N. + This is deprecated in favour of KGDB and will be removed in a later + version. + config GDBSTUB_IMMEDIATE bool "Break into GDB stub immediately" depends on GDBSTUB @@ -54,6 +57,14 @@ config GDBSTUB_IMMEDIATE possible, leaving the program counter at the beginning of start_kernel() in init/main.c. +config GDBSTUB_ALLOW_SINGLE_STEP + bool "Allow software single-stepping in GDB stub" + depends on GDBSTUB && !SMP && !PREEMPT + help + Allow GDB stub to perform software single-stepping through the + kernel. This doesn't work very well on SMP or preemptible kernels as + it uses temporary breakpoints to emulate single-stepping. + config GDB_CONSOLE bool "Console output to GDB" depends on GDBSTUB @@ -142,3 +153,7 @@ config GDBSTUB_ON_TTYSx default y endmenu + +config KERNEL_DEBUGGER + def_bool y + depends on GDBSTUB || KGDB diff --git a/arch/mn10300/include/asm/bitops.h b/arch/mn10300/include/asm/bitops.h index 3b8a8681..0939462 100644 --- a/arch/mn10300/include/asm/bitops.h +++ b/arch/mn10300/include/asm/bitops.h @@ -233,8 +233,7 @@ int ffs(int x) #define ext2_clear_bit_atomic(lock, nr, addr) \ test_and_clear_bit((nr), (addr)) -#include <asm-generic/bitops/ext2-non-atomic.h> -#include <asm-generic/bitops/minix-le.h> +#include <asm-generic/bitops/le.h> #endif /* __KERNEL__ */ #endif /* __ASM_BITOPS_H */ diff --git a/arch/mn10300/include/asm/debugger.h b/arch/mn10300/include/asm/debugger.h new file mode 100644 index 0000000..e1d3b08 --- /dev/null +++ b/arch/mn10300/include/asm/debugger.h @@ -0,0 +1,43 @@ +/* Kernel debugger for MN10300 + * + * Copyright (C) 2011 Red Hat, Inc. All Rights Reserved. + * Written by David Howells (dhowells@redhat.com) + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public Licence + * as published by the Free Software Foundation; either version + * 2 of the Licence, or (at your option) any later version. + */ + +#ifndef _ASM_DEBUGGER_H +#define _ASM_DEBUGGER_H + +#if defined(CONFIG_KERNEL_DEBUGGER) + +extern int debugger_intercept(enum exception_code, int, int, struct pt_regs *); +extern int at_debugger_breakpoint(struct pt_regs *); + +#ifndef CONFIG_MN10300_DEBUGGER_CACHE_NO_FLUSH +extern void debugger_local_cache_flushinv(void); +extern void debugger_local_cache_flushinv_one(u8 *); +#else +static inline void debugger_local_cache_flushinv(void) {} +static inline void debugger_local_cache_flushinv_one(u8 *addr) {} +#endif + +#else /* CONFIG_KERNEL_DEBUGGER */ + +static inline int debugger_intercept(enum exception_code excep, + int signo, int si_code, + struct pt_regs *regs) +{ + return 0; +} + +static inline int at_debugger_breakpoint(struct pt_regs *regs) +{ + return 0; +} + +#endif /* CONFIG_KERNEL_DEBUGGER */ +#endif /* _ASM_DEBUGGER_H */ diff --git a/arch/mn10300/include/asm/div64.h b/arch/mn10300/include/asm/div64.h index 34dcb8e..503efab 100644 --- a/arch/mn10300/include/asm/div64.h +++ b/arch/mn10300/include/asm/div64.h @@ -16,6 +16,19 @@ extern void ____unhandled_size_in_do_div___(void); /* + * Beginning with gcc 4.6, the MDR register is represented explicitly. We + * must, therefore, at least explicitly clobber the register when we make + * changes to it. The following assembly fragments *could* be rearranged in + * order to leave the moves to/from the MDR register to the compiler, but the + * gains would be minimal at best. + */ +#if __GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 6) +# define CLOBBER_MDR_CC "mdr", "cc" +#else +# define CLOBBER_MDR_CC "cc" +#endif + +/* * divide n by base, leaving the result in n and returning the remainder * - we can do this quite efficiently on the MN10300 by cascading the divides * through the MDR register @@ -29,7 +42,7 @@ extern void ____unhandled_size_in_do_div___(void); "mov mdr,%1 \n" \ : "+r"(n), "=d"(__rem) \ : "r"(base), "1"(__rem) \ - : "cc" \ + : CLOBBER_MDR_CC \ ); \ } else if (sizeof(n) <= 8) { \ union { \ @@ -48,7 +61,7 @@ extern void ____unhandled_size_in_do_div___(void); : "=d"(__rem), "=r"(__quot.w[1]), "=r"(__quot.w[0]) \ : "r"(base), "0"(__rem), "1"(__quot.w[1]), \ "2"(__quot.w[0]) \ - : "cc" \ + : CLOBBER_MDR_CC \ ); \ n = __quot.l; \ } else { \ @@ -72,7 +85,7 @@ unsigned __muldiv64u(unsigned val, unsigned mult, unsigned div) * MDR = MDR:val%div */ : "=r"(result) : "0"(val), "ir"(mult), "r"(div) - : "cc" + : CLOBBER_MDR_CC ); return result; @@ -93,7 +106,7 @@ signed __muldiv64s(signed val, signed mult, signed div) * MDR = MDR:val%div */ : "=r"(result) : "0"(val), "ir"(mult), "r"(div) - : "cc" + : CLOBBER_MDR_CC ); return result; diff --git a/arch/mn10300/include/asm/fpu.h b/arch/mn10300/include/asm/fpu.h index b7625de..738ff72 100644 --- a/arch/mn10300/include/asm/fpu.h +++ b/arch/mn10300/include/asm/fpu.h @@ -55,7 +55,6 @@ static inline void clear_using_fpu(struct task_struct *tsk) extern asmlinkage void fpu_kill_state(struct task_struct *); extern asmlinkage void fpu_exception(struct pt_regs *, enum exception_code); -extern asmlinkage void fpu_invalid_op(struct pt_regs *, enum exception_code); extern asmlinkage void fpu_init_state(void); extern asmlinkage void fpu_save(struct fpu_state_struct *); extern int fpu_setup_sigcontext(struct fpucontext *buf); @@ -113,7 +112,6 @@ static inline void flush_fpu(void) extern asmlinkage void unexpected_fpu_exception(struct pt_regs *, enum exception_code); -#define fpu_invalid_op unexpected_fpu_exception #define fpu_exception unexpected_fpu_exception struct task_struct; diff --git a/arch/mn10300/include/asm/intctl-regs.h b/arch/mn10300/include/asm/intctl-regs.h index 585b708..d65bbee 100644 --- a/arch/mn10300/include/asm/intctl-regs.h +++ b/arch/mn10300/include/asm/intctl-regs.h @@ -60,11 +60,6 @@ #ifndef __ASSEMBLY__ extern void set_intr_level(int irq, u16 level); -extern void mn10300_intc_set_level(unsigned int irq, unsigned int level); -extern void mn10300_intc_clear(unsigned int irq); -extern void mn10300_intc_set(unsigned int irq); -extern void mn10300_intc_enable(unsigned int irq); -extern void mn10300_intc_disable(unsigned int irq); extern void mn10300_set_lateack_irq_type(int irq); #endif diff --git a/arch/mn10300/include/asm/irqflags.h b/arch/mn10300/include/asm/irqflags.h index 7a7ae12..678f68d 100644 --- a/arch/mn10300/include/asm/irqflags.h +++ b/arch/mn10300/include/asm/irqflags.h @@ -20,7 +20,7 @@ /* * interrupt control * - "disabled": run in IM1/2 - * - level 0 - GDB stub + * - level 0 - kernel debugger * - level 1 - virtual serial DMA (if present) * - level 5 - normal interrupt priority * - level 6 - timer interrupt diff --git a/arch/mn10300/include/asm/kgdb.h b/arch/mn10300/include/asm/kgdb.h new file mode 100644 index 0000000..eb245f1 --- /dev/null +++ b/arch/mn10300/include/asm/kgdb.h @@ -0,0 +1,81 @@ +/* Kernel debugger for MN10300 + * + * Copyright (C) 2010 Red Hat, Inc. All Rights Reserved. + * Written by David Howells (dhowells@redhat.com) + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public Licence + * as published by the Free Software Foundation; either version + * 2 of the Licence, or (at your option) any later version. + */ + +#ifndef _ASM_KGDB_H +#define _ASM_KGDB_H + +/* + * BUFMAX defines the maximum number of characters in inbound/outbound + * buffers at least NUMREGBYTES*2 are needed for register packets + * Longer buffer is needed to list all threads + */ +#define BUFMAX 1024 + +/* + * Note that this register image is in a different order than the register + * image that Linux produces at interrupt time. + */ +enum regnames { + GDB_FR_D0 = 0, + GDB_FR_D1 = 1, + GDB_FR_D2 = 2, + GDB_FR_D3 = 3, + GDB_FR_A0 = 4, + GDB_FR_A1 = 5, + GDB_FR_A2 = 6, + GDB_FR_A3 = 7, + + GDB_FR_SP = 8, + GDB_FR_PC = 9, + GDB_FR_MDR = 10, + GDB_FR_EPSW = 11, + GDB_FR_LIR = 12, + GDB_FR_LAR = 13, + GDB_FR_MDRQ = 14, + + GDB_FR_E0 = 15, + GDB_FR_E1 = 16, + GDB_FR_E2 = 17, + GDB_FR_E3 = 18, + GDB_FR_E4 = 19, + GDB_FR_E5 = 20, + GDB_FR_E6 = 21, + GDB_FR_E7 = 22, + + GDB_FR_SSP = 23, + GDB_FR_MSP = 24, + GDB_FR_USP = 25, + GDB_FR_MCRH = 26, + GDB_FR_MCRL = 27, + GDB_FR_MCVF = 28, + + GDB_FR_FPCR = 29, + GDB_FR_DUMMY0 = 30, + GDB_FR_DUMMY1 = 31, + + GDB_FR_FS0 = 32, + + GDB_FR_SIZE = 64, +}; + +#define GDB_ORIG_D0 41 +#define NUMREGBYTES (GDB_FR_SIZE*4) + +static inline void arch_kgdb_breakpoint(void) +{ + asm(".globl __arch_kgdb_breakpoint; __arch_kgdb_breakpoint: break"); +} +extern u8 __arch_kgdb_breakpoint; + +#define BREAK_INSTR_SIZE 1 +#define CACHE_FLUSH_IS_SAFE 1 + +#endif /* _ASM_KGDB_H */ diff --git a/arch/mn10300/include/asm/smp.h b/arch/mn10300/include/asm/smp.h index a3930e4..6745dbe 100644 --- a/arch/mn10300/include/asm/smp.h +++ b/arch/mn10300/include/asm/smp.h @@ -34,7 +34,7 @@ #define LOCAL_TIMER_IPI 193 #define FLUSH_CACHE_IPI 194 #define CALL_FUNCTION_NMI_IPI 195 -#define GDB_NMI_IPI 196 +#define DEBUGGER_NMI_IPI 196 #define SMP_BOOT_IRQ 195 @@ -43,6 +43,7 @@ #define LOCAL_TIMER_GxICR_LV GxICR_LEVEL_4 #define FLUSH_CACHE_GxICR_LV GxICR_LEVEL_0 #define SMP_BOOT_GxICR_LV GxICR_LEVEL_0 +#define DEBUGGER_GxICR_LV CONFIG_DEBUGGER_IRQ_LEVEL #define TIME_OUT_COUNT_BOOT_IPI 100 #define DELAY_TIME_BOOT_IPI 75000 @@ -61,8 +62,9 @@ * An alternate way of dealing with this could be to use the EPSW.S bits to * cache this information for systems with up to four CPUs. */ +#define arch_smp_processor_id() (CPUID) #if 0 -#define raw_smp_processor_id() (CPUID) +#define raw_smp_processor_id() (arch_smp_processor_id()) #else #define raw_smp_processor_id() (current_thread_info()->cpu) #endif diff --git a/arch/mn10300/include/asm/thread_info.h b/arch/mn10300/include/asm/thread_info.h index aa07a4a..87c2130 100644 --- a/arch/mn10300/include/asm/thread_info.h +++ b/arch/mn10300/include/asm/thread_info.h @@ -124,12 +124,18 @@ static inline unsigned long current_stack_pointer(void) /* thread information allocation */ #ifdef CONFIG_DEBUG_STACK_USAGE -#define alloc_thread_info(tsk) kzalloc(THREAD_SIZE, GFP_KERNEL) +#define alloc_thread_info_node(tsk, node) \ + kzalloc_node(THREAD_SIZE, GFP_KERNEL, node) #else -#define alloc_thread_info(tsk) kmalloc(THREAD_SIZE, GFP_KERNEL) +#define alloc_thread_info_node(tsk, node) \ + kmalloc_node(THREAD_SIZE, GFP_KERNEL, node) #endif +#ifndef CONFIG_KGDB #define free_thread_info(ti) kfree((ti)) +#else +extern void free_thread_info(struct thread_info *); +#endif #define get_thread_info(ti) get_task_struct((ti)->task) #define put_thread_info(ti) put_task_struct((ti)->task) diff --git a/arch/mn10300/include/asm/types.h b/arch/mn10300/include/asm/types.h index 7b9f010..c1833eb 100644 --- a/arch/mn10300/include/asm/types.h +++ b/arch/mn10300/include/asm/types.h @@ -26,13 +26,6 @@ typedef unsigned short umode_t; #define BITS_PER_LONG 32 -#ifndef __ASSEMBLY__ - -/* Dma addresses are 32-bits wide. */ -typedef u32 dma_addr_t; - -#endif /* __ASSEMBLY__ */ - #endif /* __KERNEL__ */ #endif /* _ASM_TYPES_H */ diff --git a/arch/mn10300/kernel/Makefile b/arch/mn10300/kernel/Makefile index 8f5f1e8..47ed30f 100644 --- a/arch/mn10300/kernel/Makefile +++ b/arch/mn10300/kernel/Makefile @@ -8,7 +8,8 @@ fpu-obj-$(CONFIG_FPU) := fpu.o fpu-low.o obj-y := process.o signal.o entry.o traps.o irq.o \ ptrace.o setup.o time.o sys_mn10300.o io.o kthread.o \ - switch_to.o mn10300_ksyms.o kernel_execve.o $(fpu-obj-y) + switch_to.o mn10300_ksyms.o kernel_execve.o $(fpu-obj-y) \ + csrc-mn10300.o cevt-mn10300.o obj-$(CONFIG_SMP) += smp.o smp-low.o @@ -20,13 +21,8 @@ obj-$(CONFIG_GDBSTUB) += gdb-stub.o gdb-low.o obj-$(CONFIG_GDBSTUB_ON_TTYSx) += gdb-io-serial.o gdb-io-serial-low.o obj-$(CONFIG_GDBSTUB_ON_TTYSMx) += gdb-io-ttysm.o gdb-io-ttysm-low.o -ifeq ($(CONFIG_MN10300_CACHE_ENABLED),y) -obj-$(CONFIG_GDBSTUB) += gdb-cache.o -endif - obj-$(CONFIG_MN10300_RTC) += rtc.o obj-$(CONFIG_PROFILE) += profile.o profile-low.o obj-$(CONFIG_MODULES) += module.o obj-$(CONFIG_KPROBES) += kprobes.o -obj-$(CONFIG_CSRC_MN10300) += csrc-mn10300.o -obj-$(CONFIG_CEVT_MN10300) += cevt-mn10300.o +obj-$(CONFIG_KGDB) += kgdb.o diff --git a/arch/mn10300/kernel/cevt-mn10300.c b/arch/mn10300/kernel/cevt-mn10300.c index d4cb535..69cae02 100644 --- a/arch/mn10300/kernel/cevt-mn10300.c +++ b/arch/mn10300/kernel/cevt-mn10300.c @@ -89,9 +89,10 @@ int __init init_clockevents(void) cd->name = "Timestamp"; cd->features = CLOCK_EVT_FEAT_ONESHOT; - /* Calculate the min / max delta */ - clockevent_set_clock(cd, MN10300_JCCLK); + /* Calculate shift/mult. We want to spawn at least 1 second */ + clockevents_calc_mult_shift(cd, MN10300_JCCLK, 1); + /* Calculate the min / max delta */ cd->max_delta_ns = clockevent_delta2ns(TMJCBR_MAX, cd); cd->min_delta_ns = clockevent_delta2ns(100, cd); @@ -110,9 +111,9 @@ int __init init_clockevents(void) #if defined(CONFIG_SMP) && !defined(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST) /* setup timer irq affinity so it only runs on this cpu */ { - struct irq_desc *desc; - desc = irq_to_desc(cd->irq); - cpumask_copy(desc->affinity, cpumask_of(cpu)); + struct irq_data *data; + data = irq_get_irq_data(cd->irq); + cpumask_copy(data->affinity, cpumask_of(cpu)); iact->flags |= IRQF_NOBALANCING; } #endif diff --git a/arch/mn10300/kernel/csrc-mn10300.c b/arch/mn10300/kernel/csrc-mn10300.c index ba2f0c4..45644cf 100644 --- a/arch/mn10300/kernel/csrc-mn10300.c +++ b/arch/mn10300/kernel/csrc-mn10300.c @@ -29,7 +29,6 @@ static struct clocksource clocksource_mn10300 = { int __init init_clocksource(void) { startup_timestamp_counter(); - clocksource_set_clock(&clocksource_mn10300, MN10300_TSCCLK); - clocksource_register(&clocksource_mn10300); + clocksource_register_hz(&clocksource_mn10300, MN10300_TSCCLK); return 0; } diff --git a/arch/mn10300/kernel/entry.S b/arch/mn10300/kernel/entry.S index f00b9baf..fb93ad7 100644 --- a/arch/mn10300/kernel/entry.S +++ b/arch/mn10300/kernel/entry.S @@ -266,7 +266,11 @@ ENTRY(raw_bus_error) ############################################################################### # -# Miscellaneous exception entry points +# NMI exception entry points +# +# This is used by ordinary interrupt channels that have the GxICR_NMI bit set +# in addition to the main NMI and Watchdog channels. SMP NMI IPIs use this +# facility. # ############################################################################### ENTRY(nmi_handler) @@ -281,7 +285,7 @@ ENTRY(nmi_handler) and NMIAGR_GN,d0 lsr 0x2,d0 cmp CALL_FUNCTION_NMI_IPI,d0 - bne 5f # if not call function, jump + bne nmi_not_smp_callfunc # if not call function, jump # function call nmi ipi add 4,sp # no need to store TBR @@ -295,59 +299,38 @@ ENTRY(nmi_handler) call smp_nmi_call_function_interrupt[],0 RESTORE_ALL -5: -#ifdef CONFIG_GDBSTUB - cmp GDB_NMI_IPI,d0 - bne 3f # if not gdb nmi ipi, jump +nmi_not_smp_callfunc: +#ifdef CONFIG_KERNEL_DEBUGGER + cmp DEBUGGER_NMI_IPI,d0 + bne nmi_not_debugger # if not kernel debugger NMI IPI, jump - # gdb nmi ipi + # kernel debugger NMI IPI add 4,sp # no need to store TBR mov GxICR_DETECT,d0 # clear NMI - movbu d0,(GxICR(GDB_NMI_IPI)) - movhu (GxICR(GDB_NMI_IPI)),d0 + movbu d0,(GxICR(DEBUGGER_NMI_IPI)) + movhu (GxICR(DEBUGGER_NMI_IPI)),d0 and ~EPSW_NMID,epsw # enable NMI -#ifdef CONFIG_MN10300_CACHE_ENABLED - mov (gdbstub_nmi_opr_type),d0 - cmp GDBSTUB_NMI_CACHE_PURGE,d0 - bne 4f # if not gdb cache purge, jump - - # gdb cache purge nmi ipi - add -20,sp - mov d1,(4,sp) - mov a0,(8,sp) - mov a1,(12,sp) - mov mdr,d0 - mov d0,(16,sp) - call gdbstub_local_purge_cache[],0 - mov 0x1,d0 - mov (CPUID),d1 - asl d1,d0 - mov gdbstub_nmi_cpumask,a0 - bclr d0,(a0) - mov (4,sp),d1 - mov (8,sp),a0 - mov (12,sp),a1 - mov (16,sp),d0 - mov d0,mdr - add 20,sp - mov (sp),d0 - add 4,sp - rti -4: -#endif /* CONFIG_MN10300_CACHE_ENABLED */ - # gdb wait nmi ipi + mov (sp),d0 SAVE_ALL - call gdbstub_nmi_wait[],0 + mov fp,d0 # arg 0: stacked register file + mov a2,d1 # arg 1: exception number + call debugger_nmi_interrupt[],0 RESTORE_ALL -3: -#endif /* CONFIG_GDBSTUB */ + +nmi_not_debugger: +#endif /* CONFIG_KERNEL_DEBUGGER */ mov (sp),d0 # restore TBR to d0 add 4,sp #endif /* CONFIG_SMP */ bra __common_exception_nonmi +############################################################################### +# +# General exception entry point +# +############################################################################### ENTRY(__common_exception) add -4,sp mov d0,(sp) diff --git a/arch/mn10300/kernel/fpu.c b/arch/mn10300/kernel/fpu.c index 5f9c3fa..bb5fa7d 100644 --- a/arch/mn10300/kernel/fpu.c +++ b/arch/mn10300/kernel/fpu.c @@ -70,24 +70,6 @@ asmlinkage void fpu_exception(struct pt_regs *regs, enum exception_code code) } /* - * handle an FPU invalid_op exception - * - Derived from DO_EINFO() macro in arch/mn10300/kernel/traps.c - */ -asmlinkage void fpu_invalid_op(struct pt_regs *regs, enum exception_code code) -{ - siginfo_t info; - - if (!user_mode(regs)) - die_if_no_fixup("FPU invalid opcode", regs, code); - - info.si_signo = SIGILL; - info.si_errno = 0; - info.si_code = ILL_COPROC; - info.si_addr = (void *) regs->pc; - force_sig_info(info.si_signo, &info, current); -} - -/* * save the FPU state to a signal context */ int fpu_setup_sigcontext(struct fpucontext *fpucontext) diff --git a/arch/mn10300/kernel/gdb-cache.S b/arch/mn10300/kernel/gdb-cache.S deleted file mode 100644 index 1108bad..0000000 --- a/arch/mn10300/kernel/gdb-cache.S +++ /dev/null @@ -1,105 +0,0 @@ -############################################################################### -# -# MN10300 Low-level cache purging routines for gdbstub -# -# Copyright (C) 2007 Red Hat, Inc. All Rights Reserved. -# Written by David Howells (dhowells@redhat.com) -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public Licence -# as published by the Free Software Foundation; either version -# 2 of the Licence, or (at your option) any later version. -# -############################################################################### -#include <linux/sys.h> -#include <linux/linkage.h> -#include <asm/smp.h> -#include <asm/cache.h> -#include <asm/cpu-regs.h> -#include <asm/exceptions.h> -#include <asm/frame.inc> -#include <asm/serial-regs.h> - - .text - -############################################################################### -# -# GDB stub cache purge -# -############################################################################### - .type gdbstub_purge_cache,@function -ENTRY(gdbstub_purge_cache) - ####################################################################### - # read the addresses tagged in the cache's tag RAM and attempt to flush - # those addresses specifically - # - we rely on the hardware to filter out invalid tag entry addresses - mov DCACHE_TAG(0,0),a0 # dcache tag RAM access address - mov DCACHE_PURGE(0,0),a1 # dcache purge request address - mov L1_CACHE_NWAYS*L1_CACHE_NENTRIES,d1 # total number of entries - -mn10300_dcache_flush_loop: - mov (a0),d0 - and L1_CACHE_TAG_ADDRESS|L1_CACHE_TAG_ENTRY,d0 - or L1_CACHE_TAG_VALID,d0 # retain valid entries in the - # cache - mov d0,(a1) # conditional purge - -mn10300_dcache_flush_skip: - add L1_CACHE_BYTES,a0 - add L1_CACHE_BYTES,a1 - add -1,d1 - bne mn10300_dcache_flush_loop - -;; # unconditionally flush and invalidate the dcache -;; mov DCACHE_PURGE(0,0),a1 # dcache purge request address -;; mov L1_CACHE_NWAYS*L1_CACHE_NENTRIES,d1 # total number of -;; # entries -;; -;; gdbstub_purge_cache__dcache_loop: -;; mov (a1),d0 # unconditional purge -;; -;; add L1_CACHE_BYTES,a1 -;; add -1,d1 -;; bne gdbstub_purge_cache__dcache_loop - - ####################################################################### - # now invalidate the icache - mov CHCTR,a0 - movhu (a0),a1 - - mov epsw,d1 - and ~EPSW_IE,epsw - nop - nop - - # disable the icache - and ~CHCTR_ICEN,d0 - movhu d0,(a0) - - # and wait for it to calm down - setlb - movhu (a0),d0 - btst CHCTR_ICBUSY,d0 - lne - - # invalidate - or CHCTR_ICINV,d0 - movhu d0,(a0) - - # wait for the cache to finish - mov CHCTR,a0 - setlb - movhu (a0),d0 - btst CHCTR_ICBUSY,d0 - lne - - # and reenable it - movhu a1,(a0) - movhu (a0),d0 # read back to flush - # (SIGILLs all over without this) - - mov d1,epsw - - ret [],0 - - .size gdbstub_purge_cache,.-gdbstub_purge_cache diff --git a/arch/mn10300/kernel/gdb-io-ttysm.c b/arch/mn10300/kernel/gdb-io-ttysm.c index abdeea1..c859cac 100644 --- a/arch/mn10300/kernel/gdb-io-ttysm.c +++ b/arch/mn10300/kernel/gdb-io-ttysm.c @@ -59,10 +59,10 @@ void __init gdbstub_io_init(void) /* we want to get serial receive interrupts */ set_intr_level(gdbstub_port->rx_irq, - NUM2GxICR_LEVEL(CONFIG_GDBSTUB_IRQ_LEVEL)); + NUM2GxICR_LEVEL(CONFIG_DEBUGGER_IRQ_LEVEL)); set_intr_level(gdbstub_port->tx_irq, - NUM2GxICR_LEVEL(CONFIG_GDBSTUB_IRQ_LEVEL)); - set_intr_stub(NUM2EXCEP_IRQ_LEVEL(CONFIG_GDBSTUB_IRQ_LEVEL), + NUM2GxICR_LEVEL(CONFIG_DEBUGGER_IRQ_LEVEL)); + set_intr_stub(NUM2EXCEP_IRQ_LEVEL(CONFIG_DEBUGGER_IRQ_LEVEL), gdbstub_io_rx_handler); *gdbstub_port->rx_icr |= GxICR_ENABLE; @@ -88,7 +88,7 @@ void __init gdbstub_io_init(void) /* permit level 0 IRQs only */ arch_local_change_intr_mask_level( - NUM2EPSW_IM(CONFIG_GDBSTUB_IRQ_LEVEL + 1)); + NUM2EPSW_IM(CONFIG_DEBUGGER_IRQ_LEVEL + 1)); } /* diff --git a/arch/mn10300/kernel/gdb-stub.c b/arch/mn10300/kernel/gdb-stub.c index b169d99..538266b 100644 --- a/arch/mn10300/kernel/gdb-stub.c +++ b/arch/mn10300/kernel/gdb-stub.c @@ -133,7 +133,7 @@ #include <asm/system.h> #include <asm/gdb-stub.h> #include <asm/exceptions.h> -#include <asm/cacheflush.h> +#include <asm/debugger.h> #include <asm/serial-regs.h> #include <asm/busctl-regs.h> #include <unit/leds.h> @@ -405,6 +405,7 @@ static int hexToInt(char **ptr, int *intValue) return (numChars); } +#ifdef CONFIG_GDBSTUB_ALLOW_SINGLE_STEP /* * We single-step by setting breakpoints. When an exception * is handled, we need to restore the instructions hoisted @@ -729,6 +730,7 @@ static int gdbstub_single_step(struct pt_regs *regs) __gdbstub_restore_bp(); return -EFAULT; } +#endif /* CONFIG_GDBSTUB_ALLOW_SINGLE_STEP */ #ifdef CONFIG_GDBSTUB_CONSOLE @@ -1171,7 +1173,7 @@ int gdbstub_clear_breakpoint(u8 *addr, int len) /* * This function does all command processing for interfacing to gdb - * - returns 1 if the exception should be skipped, 0 otherwise. + * - returns 0 if the exception should be skipped, -ERROR otherwise. */ static int gdbstub(struct pt_regs *regs, enum exception_code excep) { @@ -1186,7 +1188,7 @@ static int gdbstub(struct pt_regs *regs, enum exception_code excep) int loop; if (excep == EXCEP_FPU_DISABLED) - return 0; + return -ENOTSUPP; gdbstub_flush_caches = 0; @@ -1195,7 +1197,7 @@ static int gdbstub(struct pt_regs *regs, enum exception_code excep) asm volatile("mov mdr,%0" : "=d"(mdr)); local_save_flags(epsw); arch_local_change_intr_mask_level( - NUM2EPSW_IM(CONFIG_GDBSTUB_IRQ_LEVEL + 1)); + NUM2EPSW_IM(CONFIG_DEBUGGER_IRQ_LEVEL + 1)); gdbstub_store_fpu(); @@ -1208,11 +1210,13 @@ static int gdbstub(struct pt_regs *regs, enum exception_code excep) /* if we were single stepping, restore the opcodes hoisted for the * breakpoint[s] */ broke = 0; +#ifdef CONFIG_GDBSTUB_ALLOW_SINGLE_STEP if ((step_bp[0].addr && step_bp[0].addr == (u8 *) regs->pc) || (step_bp[1].addr && step_bp[1].addr == (u8 *) regs->pc)) broke = 1; __gdbstub_restore_bp(); +#endif if (gdbstub_rx_unget) { sigval = SIGINT; @@ -1548,17 +1552,21 @@ packet_waiting: * Step to next instruction */ case 's': - /* - * using the T flag doesn't seem to perform single + /* Using the T flag doesn't seem to perform single * stepping (it seems to wind up being caught by the * JTAG unit), so we have to use breakpoints and * continue instead. */ +#ifdef CONFIG_GDBSTUB_ALLOW_SINGLE_STEP if (gdbstub_single_step(regs) < 0) /* ignore any fault error for now */ gdbstub_printk("unable to set single-step" " bp\n"); goto done; +#else + gdbstub_strcpy(output_buffer, "E01"); + break; +#endif /* * Set baud rate (bBB) @@ -1657,7 +1665,7 @@ done: * NB: We flush both caches, just to be sure... */ if (gdbstub_flush_caches) - gdbstub_purge_cache(); + debugger_local_cache_flushinv(); gdbstub_load_fpu(); mn10300_set_gdbleds(0); @@ -1667,14 +1675,23 @@ done: touch_softlockup_watchdog(); local_irq_restore(epsw); - return 1; + return 0; +} + +/* + * Determine if we hit a debugger special breakpoint that needs skipping over + * automatically. + */ +int at_debugger_breakpoint(struct pt_regs *regs) +{ + return 0; } /* * handle event interception */ -asmlinkage int gdbstub_intercept(struct pt_regs *regs, - enum exception_code excep) +asmlinkage int debugger_intercept(enum exception_code excep, + int signo, int si_code, struct pt_regs *regs) { static u8 notfirst = 1; int ret; @@ -1688,7 +1705,7 @@ asmlinkage int gdbstub_intercept(struct pt_regs *regs, asm("mov mdr,%0" : "=d"(mdr)); gdbstub_entry( - "--> gdbstub_intercept(%p,%04x) [MDR=%lx PC=%lx]\n", + "--> debugger_intercept(%p,%04x) [MDR=%lx PC=%lx]\n", regs, excep, mdr, regs->pc); gdbstub_entry( @@ -1722,7 +1739,7 @@ asmlinkage int gdbstub_intercept(struct pt_regs *regs, ret = gdbstub(regs, excep); - gdbstub_entry("<-- gdbstub_intercept()\n"); + gdbstub_entry("<-- debugger_intercept()\n"); gdbstub_busy = 0; return ret; } diff --git a/arch/mn10300/kernel/internal.h b/arch/mn10300/kernel/internal.h index 6a064ab..a5ac755 100644 --- a/arch/mn10300/kernel/internal.h +++ b/arch/mn10300/kernel/internal.h @@ -30,16 +30,13 @@ extern void mn10300_low_ipi_handler(void); #endif /* - * time.c + * smp.c */ -extern irqreturn_t local_timer_interrupt(void); +#ifdef CONFIG_SMP +extern void smp_jump_to_debugger(void); +#endif /* * time.c */ -#ifdef CONFIG_CEVT_MN10300 -extern void clockevent_set_clock(struct clock_event_device *, unsigned int); -#endif -#ifdef CONFIG_CSRC_MN10300 -extern void clocksource_set_clock(struct clocksource *, unsigned int); -#endif +extern irqreturn_t local_timer_interrupt(void); diff --git a/arch/mn10300/kernel/irq.c b/arch/mn10300/kernel/irq.c index ac11754..5f7fc3e 100644 --- a/arch/mn10300/kernel/irq.c +++ b/arch/mn10300/kernel/irq.c @@ -37,8 +37,9 @@ atomic_t irq_err_count; /* * MN10300 interrupt controller operations */ -static void mn10300_cpupic_ack(unsigned int irq) +static void mn10300_cpupic_ack(struct irq_data *d) { + unsigned int irq = d->irq; unsigned long flags; u16 tmp; @@ -61,13 +62,14 @@ static void __mask_and_set_icr(unsigned int irq, arch_local_irq_restore(flags); } -static void mn10300_cpupic_mask(unsigned int irq) +static void mn10300_cpupic_mask(struct irq_data *d) { - __mask_and_set_icr(irq, GxICR_LEVEL, 0); + __mask_and_set_icr(d->irq, GxICR_LEVEL, 0); } -static void mn10300_cpupic_mask_ack(unsigned int irq) +static void mn10300_cpupic_mask_ack(struct irq_data *d) { + unsigned int irq = d->irq; #ifdef CONFIG_SMP unsigned long flags; u16 tmp; @@ -85,7 +87,7 @@ static void mn10300_cpupic_mask_ack(unsigned int irq) tmp2 = GxICR(irq); irq_affinity_online[irq] = - any_online_cpu(*irq_desc[irq].affinity); + any_online_cpu(*d->affinity); CROSS_GxICR(irq, irq_affinity_online[irq]) = (tmp & (GxICR_LEVEL | GxICR_ENABLE)) | GxICR_DETECT; tmp = CROSS_GxICR(irq, irq_affinity_online[irq]); @@ -97,13 +99,14 @@ static void mn10300_cpupic_mask_ack(unsigned int irq) #endif /* CONFIG_SMP */ } -static void mn10300_cpupic_unmask(unsigned int irq) +static void mn10300_cpupic_unmask(struct irq_data *d) { - __mask_and_set_icr(irq, GxICR_LEVEL, GxICR_ENABLE); + __mask_and_set_icr(d->irq, GxICR_LEVEL, GxICR_ENABLE); } -static void mn10300_cpupic_unmask_clear(unsigned int irq) +static void mn10300_cpupic_unmask_clear(struct irq_data *d) { + unsigned int irq = d->irq; /* the MN10300 PIC latches its interrupt request bit, even after the * device has ceased to assert its interrupt line and the interrupt * channel has been disabled in the PIC, so for level-triggered @@ -121,7 +124,7 @@ static void mn10300_cpupic_unmask_clear(unsigned int irq) } else { tmp = GxICR(irq); - irq_affinity_online[irq] = any_online_cpu(*irq_desc[irq].affinity); + irq_affinity_online[irq] = any_online_cpu(*d->affinity); CROSS_GxICR(irq, irq_affinity_online[irq]) = (tmp & GxICR_LEVEL) | GxICR_ENABLE | GxICR_DETECT; tmp = CROSS_GxICR(irq, irq_affinity_online[irq]); } @@ -134,7 +137,8 @@ static void mn10300_cpupic_unmask_clear(unsigned int irq) #ifdef CONFIG_SMP static int -mn10300_cpupic_setaffinity(unsigned int irq, const struct cpumask *mask) +mn10300_cpupic_setaffinity(struct irq_data *d, const struct cpumask *mask, + bool force) { unsigned long flags; int err; @@ -142,14 +146,14 @@ mn10300_cpupic_setaffinity(unsigned int irq, const struct cpumask *mask) flags = arch_local_cli_save(); /* check irq no */ - switch (irq) { + switch (d->irq) { case TMJCIRQ: case RESCHEDULE_IPI: case CALL_FUNC_SINGLE_IPI: case LOCAL_TIMER_IPI: case FLUSH_CACHE_IPI: case CALL_FUNCTION_NMI_IPI: - case GDB_NMI_IPI: + case DEBUGGER_NMI_IPI: #ifdef CONFIG_MN10300_TTYSM0 case SC0RXIRQ: case SC0TXIRQ: @@ -181,7 +185,7 @@ mn10300_cpupic_setaffinity(unsigned int irq, const struct cpumask *mask) break; default: - set_bit(irq, irq_affinity_request); + set_bit(d->irq, irq_affinity_request); err = 0; break; } @@ -202,15 +206,15 @@ mn10300_cpupic_setaffinity(unsigned int irq, const struct cpumask *mask) * mask_ack() is provided), and mask_ack() just masks. */ static struct irq_chip mn10300_cpu_pic_level = { - .name = "cpu_l", - .disable = mn10300_cpupic_mask, - .enable = mn10300_cpupic_unmask_clear, - .ack = NULL, - .mask = mn10300_cpupic_mask, - .mask_ack = mn10300_cpupic_mask, - .unmask = mn10300_cpupic_unmask_clear, + .name = "cpu_l", + .irq_disable = mn10300_cpupic_mask, + .irq_enable = mn10300_cpupic_unmask_clear, + .irq_ack = NULL, + .irq_mask = mn10300_cpupic_mask, + .irq_mask_ack = mn10300_cpupic_mask, + .irq_unmask = mn10300_cpupic_unmask_clear, #ifdef CONFIG_SMP - .set_affinity = mn10300_cpupic_setaffinity, + .irq_set_affinity = mn10300_cpupic_setaffinity, #endif }; @@ -220,15 +224,15 @@ static struct irq_chip mn10300_cpu_pic_level = { * We use the latch clearing function of the PIC as the 'ACK' function. */ static struct irq_chip mn10300_cpu_pic_edge = { - .name = "cpu_e", - .disable = mn10300_cpupic_mask, - .enable = mn10300_cpupic_unmask, - .ack = mn10300_cpupic_ack, - .mask = mn10300_cpupic_mask, - .mask_ack = mn10300_cpupic_mask_ack, - .unmask = mn10300_cpupic_unmask, + .name = "cpu_e", + .irq_disable = mn10300_cpupic_mask, + .irq_enable = mn10300_cpupic_unmask, + .irq_ack = mn10300_cpupic_ack, + .irq_mask = mn10300_cpupic_mask, + .irq_mask_ack = mn10300_cpupic_mask_ack, + .irq_unmask = mn10300_cpupic_unmask, #ifdef CONFIG_SMP - .set_affinity = mn10300_cpupic_setaffinity, + .irq_set_affinity = mn10300_cpupic_setaffinity, #endif }; @@ -252,31 +256,6 @@ void set_intr_level(int irq, u16 level) __mask_and_set_icr(irq, GxICR_ENABLE, level); } -void mn10300_intc_set_level(unsigned int irq, unsigned int level) -{ - set_intr_level(irq, NUM2GxICR_LEVEL(level) & GxICR_LEVEL); -} - -void mn10300_intc_clear(unsigned int irq) -{ - __mask_and_set_icr(irq, GxICR_LEVEL | GxICR_ENABLE, GxICR_DETECT); -} - -void mn10300_intc_set(unsigned int irq) -{ - __mask_and_set_icr(irq, 0, GxICR_REQUEST | GxICR_DETECT); -} - -void mn10300_intc_enable(unsigned int irq) -{ - mn10300_cpupic_unmask(irq); -} - -void mn10300_intc_disable(unsigned int irq) -{ - mn10300_cpupic_mask(irq); -} - /* * mark an interrupt to be ACK'd after interrupt handlers have been run rather * than before @@ -296,7 +275,7 @@ void __init init_IRQ(void) int irq; for (irq = 0; irq < NR_IRQS; irq++) - if (irq_desc[irq].chip == &no_irq_chip) + if (get_irq_chip(irq) == &no_irq_chip) /* due to the PIC latching interrupt requests, even * when the IRQ is disabled, IRQ_PENDING is superfluous * and we can use handle_level_irq() for edge-triggered @@ -384,12 +363,12 @@ int show_interrupts(struct seq_file *p, void *v) if (i < NR_CPU_IRQS) seq_printf(p, " %14s.%u", - irq_desc[i].chip->name, + irq_desc[i].irq_data.chip->name, (GxICR(i) & GxICR_LEVEL) >> GxICR_LEVEL_SHIFT); else seq_printf(p, " %14s", - irq_desc[i].chip->name); + irq_desc[i].irq_data.chip->name); seq_printf(p, " %s", action->name); diff --git a/arch/mn10300/kernel/kgdb.c b/arch/mn10300/kernel/kgdb.c new file mode 100644 index 0000000..f6c981d --- /dev/null +++ b/arch/mn10300/kernel/kgdb.c @@ -0,0 +1,502 @@ +/* kgdb support for MN10300 + * + * Copyright (C) 2010 Red Hat, Inc. All Rights Reserved. + * Written by David Howells (dhowells@redhat.com) + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public Licence + * as published by the Free Software Foundation; either version + * 2 of the Licence, or (at your option) any later version. + */ + +#include <linux/slab.h> +#include <linux/ptrace.h> +#include <linux/kgdb.h> +#include <linux/uaccess.h> +#include <unit/leds.h> +#include <unit/serial.h> +#include <asm/debugger.h> +#include <asm/serial-regs.h> +#include "internal.h" + +/* + * Software single-stepping breakpoint save (used by __switch_to()) + */ +static struct thread_info *kgdb_sstep_thread; +u8 *kgdb_sstep_bp_addr[2]; +u8 kgdb_sstep_bp[2]; + +/* + * Copy kernel exception frame registers to the GDB register file + */ +void pt_regs_to_gdb_regs(unsigned long *gdb_regs, struct pt_regs *regs) +{ + unsigned long ssp = (unsigned long) (regs + 1); + + gdb_regs[GDB_FR_D0] = regs->d0; + gdb_regs[GDB_FR_D1] = regs->d1; + gdb_regs[GDB_FR_D2] = regs->d2; + gdb_regs[GDB_FR_D3] = regs->d3; + gdb_regs[GDB_FR_A0] = regs->a0; + gdb_regs[GDB_FR_A1] = regs->a1; + gdb_regs[GDB_FR_A2] = regs->a2; + gdb_regs[GDB_FR_A3] = regs->a3; + gdb_regs[GDB_FR_SP] = (regs->epsw & EPSW_nSL) ? regs->sp : ssp; + gdb_regs[GDB_FR_PC] = regs->pc; + gdb_regs[GDB_FR_MDR] = regs->mdr; + gdb_regs[GDB_FR_EPSW] = regs->epsw; + gdb_regs[GDB_FR_LIR] = regs->lir; + gdb_regs[GDB_FR_LAR] = regs->lar; + gdb_regs[GDB_FR_MDRQ] = regs->mdrq; + gdb_regs[GDB_FR_E0] = regs->e0; + gdb_regs[GDB_FR_E1] = regs->e1; + gdb_regs[GDB_FR_E2] = regs->e2; + gdb_regs[GDB_FR_E3] = regs->e3; + gdb_regs[GDB_FR_E4] = regs->e4; + gdb_regs[GDB_FR_E5] = regs->e5; + gdb_regs[GDB_FR_E6] = regs->e6; + gdb_regs[GDB_FR_E7] = regs->e7; + gdb_regs[GDB_FR_SSP] = ssp; + gdb_regs[GDB_FR_MSP] = 0; + gdb_regs[GDB_FR_USP] = regs->sp; + gdb_regs[GDB_FR_MCRH] = regs->mcrh; + gdb_regs[GDB_FR_MCRL] = regs->mcrl; + gdb_regs[GDB_FR_MCVF] = regs->mcvf; + gdb_regs[GDB_FR_DUMMY0] = 0; + gdb_regs[GDB_FR_DUMMY1] = 0; + gdb_regs[GDB_FR_FS0] = 0; +} + +/* + * Extracts kernel SP/PC values understandable by gdb from the values + * saved by switch_to(). + */ +void sleeping_thread_to_gdb_regs(unsigned long *gdb_regs, struct task_struct *p) +{ + gdb_regs[GDB_FR_SSP] = p->thread.sp; + gdb_regs[GDB_FR_PC] = p->thread.pc; + gdb_regs[GDB_FR_A3] = p->thread.a3; + gdb_regs[GDB_FR_USP] = p->thread.usp; + gdb_regs[GDB_FR_FPCR] = p->thread.fpu_state.fpcr; +} + +/* + * Fill kernel exception frame registers from the GDB register file + */ +void gdb_regs_to_pt_regs(unsigned long *gdb_regs, struct pt_regs *regs) +{ + regs->d0 = gdb_regs[GDB_FR_D0]; + regs->d1 = gdb_regs[GDB_FR_D1]; + regs->d2 = gdb_regs[GDB_FR_D2]; + regs->d3 = gdb_regs[GDB_FR_D3]; + regs->a0 = gdb_regs[GDB_FR_A0]; + regs->a1 = gdb_regs[GDB_FR_A1]; + regs->a2 = gdb_regs[GDB_FR_A2]; + regs->a3 = gdb_regs[GDB_FR_A3]; + regs->sp = gdb_regs[GDB_FR_SP]; + regs->pc = gdb_regs[GDB_FR_PC]; + regs->mdr = gdb_regs[GDB_FR_MDR]; + regs->epsw = gdb_regs[GDB_FR_EPSW]; + regs->lir = gdb_regs[GDB_FR_LIR]; + regs->lar = gdb_regs[GDB_FR_LAR]; + regs->mdrq = gdb_regs[GDB_FR_MDRQ]; + regs->e0 = gdb_regs[GDB_FR_E0]; + regs->e1 = gdb_regs[GDB_FR_E1]; + regs->e2 = gdb_regs[GDB_FR_E2]; + regs->e3 = gdb_regs[GDB_FR_E3]; + regs->e4 = gdb_regs[GDB_FR_E4]; + regs->e5 = gdb_regs[GDB_FR_E5]; + regs->e6 = gdb_regs[GDB_FR_E6]; + regs->e7 = gdb_regs[GDB_FR_E7]; + regs->sp = gdb_regs[GDB_FR_SSP]; + /* gdb_regs[GDB_FR_MSP]; */ + // regs->usp = gdb_regs[GDB_FR_USP]; + regs->mcrh = gdb_regs[GDB_FR_MCRH]; + regs->mcrl = gdb_regs[GDB_FR_MCRL]; + regs->mcvf = gdb_regs[GDB_FR_MCVF]; + /* gdb_regs[GDB_FR_DUMMY0]; */ + /* gdb_regs[GDB_FR_DUMMY1]; */ + + // regs->fpcr = gdb_regs[GDB_FR_FPCR]; + // regs->fs0 = gdb_regs[GDB_FR_FS0]; +} + +struct kgdb_arch arch_kgdb_ops = { + .gdb_bpt_instr = { 0xff }, + .flags = KGDB_HW_BREAKPOINT, +}; + +static const unsigned char mn10300_kgdb_insn_sizes[256] = +{ + /* 1 2 3 4 5 6 7 8 9 a b c d e f */ + 1, 3, 3, 3, 1, 3, 3, 3, 1, 3, 3, 3, 1, 3, 3, 3, /* 0 */ + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, /* 1 */ + 2, 2, 2, 2, 3, 3, 3, 3, 2, 2, 2, 2, 3, 3, 3, 3, /* 2 */ + 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, /* 3 */ + 1, 1, 2, 2, 1, 1, 2, 2, 1, 1, 2, 2, 1, 1, 2, 2, /* 4 */ + 1, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, 2, 2, 2, 2, 2, /* 5 */ + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, /* 6 */ + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, /* 7 */ + 2, 1, 1, 1, 1, 2, 1, 1, 1, 1, 2, 1, 1, 1, 1, 2, /* 8 */ + 2, 1, 1, 1, 1, 2, 1, 1, 1, 1, 2, 1, 1, 1, 1, 2, /* 9 */ + 2, 1, 1, 1, 1, 2, 1, 1, 1, 1, 2, 1, 1, 1, 1, 2, /* a */ + 2, 1, 1, 1, 1, 2, 1, 1, 1, 1, 2, 1, 1, 1, 1, 2, /* b */ + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 2, 2, /* c */ + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* d */ + 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, /* e */ + 0, 2, 2, 2, 2, 2, 2, 4, 0, 3, 0, 4, 0, 6, 7, 1 /* f */ +}; + +/* + * Attempt to emulate single stepping by means of breakpoint instructions. + * Although there is a single-step trace flag in EPSW, its use is not + * sufficiently documented and is only intended for use with the JTAG debugger. + */ +static int kgdb_arch_do_singlestep(struct pt_regs *regs) +{ + unsigned long arg; + unsigned size; + u8 *pc = (u8 *)regs->pc, *sp = (u8 *)(regs + 1), cur; + u8 *x = NULL, *y = NULL; + int ret; + + ret = probe_kernel_read(&cur, pc, 1); + if (ret < 0) + return ret; + + size = mn10300_kgdb_insn_sizes[cur]; + if (size > 0) { + x = pc + size; + goto set_x; + } + + switch (cur) { + /* Bxx (d8,PC) */ + case 0xc0 ... 0xca: + ret = probe_kernel_read(&arg, pc + 1, 1); + if (ret < 0) + return ret; + x = pc + 2; + if (arg >= 0 && arg <= 2) + goto set_x; + y = pc + (s8)arg; + goto set_x_and_y; + + /* LXX (d8,PC) */ + case 0xd0 ... 0xda: + x = pc + 1; + if (regs->pc == regs->lar) + goto set_x; + y = (u8 *)regs->lar; + goto set_x_and_y; + + /* SETLB - loads the next four bytes into the LIR register + * (which mustn't include a breakpoint instruction) */ + case 0xdb: + x = pc + 5; + goto set_x; + + /* JMP (d16,PC) or CALL (d16,PC) */ + case 0xcc: + case 0xcd: + ret = probe_kernel_read(&arg, pc + 1, 2); + if (ret < 0) + return ret; + x = pc + (s16)arg; + goto set_x; + + /* JMP (d32,PC) or CALL (d32,PC) */ + case 0xdc: + case 0xdd: + ret = probe_kernel_read(&arg, pc + 1, 4); + if (ret < 0) + return ret; + x = pc + (s32)arg; + goto set_x; + + /* RETF */ + case 0xde: + x = (u8 *)regs->mdr; + goto set_x; + + /* RET */ + case 0xdf: + ret = probe_kernel_read(&arg, pc + 2, 1); + if (ret < 0) + return ret; + ret = probe_kernel_read(&x, sp + (s8)arg, 4); + if (ret < 0) + return ret; + goto set_x; + + case 0xf0: + ret = probe_kernel_read(&cur, pc + 1, 1); + if (ret < 0) + return ret; + + if (cur >= 0xf0 && cur <= 0xf7) { + /* JMP (An) / CALLS (An) */ + switch (cur & 3) { + case 0: x = (u8 *)regs->a0; break; + case 1: x = (u8 *)regs->a1; break; + case 2: x = (u8 *)regs->a2; break; + case 3: x = (u8 *)regs->a3; break; + } + goto set_x; + } else if (cur == 0xfc) { + /* RETS */ + ret = probe_kernel_read(&x, sp, 4); + if (ret < 0) + return ret; + goto set_x; + } else if (cur == 0xfd) { + /* RTI */ + ret = probe_kernel_read(&x, sp + 4, 4); + if (ret < 0) + return ret; + goto set_x; + } else { + x = pc + 2; + goto set_x; + } + break; + + /* potential 3-byte conditional branches */ + case 0xf8: + ret = probe_kernel_read(&cur, pc + 1, 1); + if (ret < 0) + return ret; + x = pc + 3; + + if (cur >= 0xe8 && cur <= 0xeb) { + ret = probe_kernel_read(&arg, pc + 2, 1); + if (ret < 0) + return ret; + if (arg >= 0 && arg <= 3) + goto set_x; + y = pc + (s8)arg; + goto set_x_and_y; + } + goto set_x; + + case 0xfa: + ret = probe_kernel_read(&cur, pc + 1, 1); + if (ret < 0) + return ret; + + if (cur == 0xff) { + /* CALLS (d16,PC) */ + ret = probe_kernel_read(&arg, pc + 2, 2); + if (ret < 0) + return ret; + x = pc + (s16)arg; + goto set_x; + } + + x = pc + 4; + goto set_x; + + case 0xfc: + ret = probe_kernel_read(&cur, pc + 1, 1); + if (ret < 0) + return ret; + + if (cur == 0xff) { + /* CALLS (d32,PC) */ + ret = probe_kernel_read(&arg, pc + 2, 4); + if (ret < 0) + return ret; + x = pc + (s32)arg; + goto set_x; + } + + x = pc + 6; + goto set_x; + } + + return 0; + +set_x: + kgdb_sstep_bp_addr[0] = x; + kgdb_sstep_bp_addr[1] = NULL; + ret = probe_kernel_read(&kgdb_sstep_bp[0], x, 1); + if (ret < 0) + return ret; + ret = probe_kernel_write(x, &arch_kgdb_ops.gdb_bpt_instr, 1); + if (ret < 0) + return ret; + kgdb_sstep_thread = current_thread_info(); + debugger_local_cache_flushinv_one(x); + return ret; + +set_x_and_y: + kgdb_sstep_bp_addr[0] = x; + kgdb_sstep_bp_addr[1] = y; + ret = probe_kernel_read(&kgdb_sstep_bp[0], x, 1); + if (ret < 0) + return ret; + ret = probe_kernel_read(&kgdb_sstep_bp[1], y, 1); + if (ret < 0) + return ret; + ret = probe_kernel_write(x, &arch_kgdb_ops.gdb_bpt_instr, 1); + if (ret < 0) + return ret; + ret = probe_kernel_write(y, &arch_kgdb_ops.gdb_bpt_instr, 1); + if (ret < 0) { + probe_kernel_write(kgdb_sstep_bp_addr[0], + &kgdb_sstep_bp[0], 1); + } else { + kgdb_sstep_thread = current_thread_info(); + } + debugger_local_cache_flushinv_one(x); + debugger_local_cache_flushinv_one(y); + return ret; +} + +/* + * Remove emplaced single-step breakpoints, returning true if we hit one of + * them. + */ +static bool kgdb_arch_undo_singlestep(struct pt_regs *regs) +{ + bool hit = false; + u8 *x = kgdb_sstep_bp_addr[0], *y = kgdb_sstep_bp_addr[1]; + u8 opcode; + + if (kgdb_sstep_thread == current_thread_info()) { + if (x) { + if (x == (u8 *)regs->pc) + hit = true; + if (probe_kernel_read(&opcode, x, + 1) < 0 || + opcode != 0xff) + BUG(); + probe_kernel_write(x, &kgdb_sstep_bp[0], 1); + debugger_local_cache_flushinv_one(x); + } + if (y) { + if (y == (u8 *)regs->pc) + hit = true; + if (probe_kernel_read(&opcode, y, + 1) < 0 || + opcode != 0xff) + BUG(); + probe_kernel_write(y, &kgdb_sstep_bp[1], 1); + debugger_local_cache_flushinv_one(y); + } + } + + kgdb_sstep_bp_addr[0] = NULL; + kgdb_sstep_bp_addr[1] = NULL; + kgdb_sstep_thread = NULL; + return hit; +} + +/* + * Catch a single-step-pending thread being deleted and make sure the global + * single-step state is cleared. At this point the breakpoints should have + * been removed by __switch_to(). + */ +void free_thread_info(struct thread_info *ti) +{ + if (kgdb_sstep_thread == ti) { + kgdb_sstep_thread = NULL; + + /* However, we may now be running in degraded mode, with most + * of the CPUs disabled until such a time as KGDB is reentered, + * so force immediate reentry */ + kgdb_breakpoint(); + } + kfree(ti); +} + +/* + * Handle unknown packets and [CcsDk] packets + * - at this point breakpoints have been installed + */ +int kgdb_arch_handle_exception(int vector, int signo, int err_code, + char *remcom_in_buffer, char *remcom_out_buffer, + struct pt_regs *regs) +{ + long addr; + char *ptr; + + switch (remcom_in_buffer[0]) { + case 'c': + case 's': + /* try to read optional parameter, pc unchanged if no parm */ + ptr = &remcom_in_buffer[1]; + if (kgdb_hex2long(&ptr, &addr)) + regs->pc = addr; + case 'D': + case 'k': + atomic_set(&kgdb_cpu_doing_single_step, -1); + + if (remcom_in_buffer[0] == 's') { + kgdb_arch_do_singlestep(regs); + kgdb_single_step = 1; + atomic_set(&kgdb_cpu_doing_single_step, + raw_smp_processor_id()); + } + return 0; + } + return -1; /* this means that we do not want to exit from the handler */ +} + +/* + * Handle event interception + * - returns 0 if the exception should be skipped, -ERROR otherwise. + */ +int debugger_intercept(enum exception_code excep, int signo, int si_code, + struct pt_regs *regs) +{ + int ret; + + if (kgdb_arch_undo_singlestep(regs)) { + excep = EXCEP_TRAP; + signo = SIGTRAP; + si_code = TRAP_TRACE; + } + + ret = kgdb_handle_exception(excep, signo, si_code, regs); + + debugger_local_cache_flushinv(); + + return ret; +} + +/* + * Determine if we've hit a debugger special breakpoint + */ +int at_debugger_breakpoint(struct pt_regs *regs) +{ + return regs->pc == (unsigned long)&__arch_kgdb_breakpoint; +} + +/* + * Initialise kgdb + */ +int kgdb_arch_init(void) +{ + return 0; +} + +/* + * Do something, perhaps, but don't know what. + */ +void kgdb_arch_exit(void) +{ +} + +#ifdef CONFIG_SMP +void debugger_nmi_interrupt(struct pt_regs *regs, enum exception_code code) +{ + kgdb_nmicallback(arch_smp_processor_id(), regs); + debugger_local_cache_flushinv(); +} + +void kgdb_roundup_cpus(unsigned long flags) +{ + smp_jump_to_debugger(); +} +#endif diff --git a/arch/mn10300/kernel/mn10300-serial.c b/arch/mn10300/kernel/mn10300-serial.c index 996384d..efca426 100644 --- a/arch/mn10300/kernel/mn10300-serial.c +++ b/arch/mn10300/kernel/mn10300-serial.c @@ -119,6 +119,10 @@ static int mn10300_serial_request_port(struct uart_port *); static void mn10300_serial_config_port(struct uart_port *, int); static int mn10300_serial_verify_port(struct uart_port *, struct serial_struct *); +#ifdef CONFIG_CONSOLE_POLL +static void mn10300_serial_poll_put_char(struct uart_port *, unsigned char); +static int mn10300_serial_poll_get_char(struct uart_port *); +#endif static const struct uart_ops mn10300_serial_ops = { .tx_empty = mn10300_serial_tx_empty, @@ -138,6 +142,10 @@ static const struct uart_ops mn10300_serial_ops = { .request_port = mn10300_serial_request_port, .config_port = mn10300_serial_config_port, .verify_port = mn10300_serial_verify_port, +#ifdef CONFIG_CONSOLE_POLL + .poll_put_char = mn10300_serial_poll_put_char, + .poll_get_char = mn10300_serial_poll_get_char, +#endif }; static irqreturn_t mn10300_serial_interrupt(int irq, void *dev_id); @@ -384,17 +392,21 @@ static void mn10300_serial_mask_ack(unsigned int irq) arch_local_irq_restore(flags); } -static void mn10300_serial_nop(unsigned int irq) +static void mn10300_serial_chip_mask_ack(struct irq_data *d) +{ + mn10300_serial_mask_ack(d->irq); +} + +static void mn10300_serial_nop(struct irq_data *d) { } static struct irq_chip mn10300_serial_pic = { .name = "mnserial", - .ack = mn10300_serial_mask_ack, - .mask = mn10300_serial_mask_ack, - .mask_ack = mn10300_serial_mask_ack, - .unmask = mn10300_serial_nop, - .end = mn10300_serial_nop, + .irq_ack = mn10300_serial_chip_mask_ack, + .irq_mask = mn10300_serial_chip_mask_ack, + .irq_mask_ack = mn10300_serial_chip_mask_ack, + .irq_unmask = mn10300_serial_nop, }; @@ -1630,3 +1642,70 @@ static int __init mn10300_serial_console_init(void) console_initcall(mn10300_serial_console_init); #endif + +#ifdef CONFIG_CONSOLE_POLL +/* + * Polled character reception for the kernel debugger + */ +static int mn10300_serial_poll_get_char(struct uart_port *_port) +{ + struct mn10300_serial_port *port = + container_of(_port, struct mn10300_serial_port, uart); + unsigned ix; + u8 st, ch; + + _enter("%s", port->name); + + do { + /* pull chars out of the hat */ + ix = port->rx_outp; + if (ix == port->rx_inp) + return NO_POLL_CHAR; + + ch = port->rx_buffer[ix++]; + st = port->rx_buffer[ix++]; + smp_rmb(); + port->rx_outp = ix & (MNSC_BUFFER_SIZE - 1); + + } while (st & (SC01STR_FEF | SC01STR_PEF | SC01STR_OEF)); + + return ch; +} + + +/* + * Polled character transmission for the kernel debugger + */ +static void mn10300_serial_poll_put_char(struct uart_port *_port, + unsigned char ch) +{ + struct mn10300_serial_port *port = + container_of(_port, struct mn10300_serial_port, uart); + u8 intr, tmp; + + /* wait for the transmitter to finish anything it might be doing (and + * this includes the virtual DMA handler, so it might take a while) */ + while (*port->_status & (SC01STR_TBF | SC01STR_TXF)) + continue; + + /* disable the Tx ready interrupt */ + intr = *port->_intr; + *port->_intr = intr & ~SC01ICR_TI; + tmp = *port->_intr; + + if (ch == 0x0a) { + *(u8 *) port->_txb = 0x0d; + while (*port->_status & SC01STR_TBF) + continue; + } + + *(u8 *) port->_txb = ch; + while (*port->_status & SC01STR_TBF) + continue; + + /* restore the Tx interrupt flag */ + *port->_intr = intr; + tmp = *port->_intr; +} + +#endif /* CONFIG_CONSOLE_POLL */ diff --git a/arch/mn10300/kernel/process.c b/arch/mn10300/kernel/process.c index e1b14a6..28eec31 100644 --- a/arch/mn10300/kernel/process.c +++ b/arch/mn10300/kernel/process.c @@ -135,7 +135,7 @@ void release_segments(struct mm_struct *mm) void machine_restart(char *cmd) { -#ifdef CONFIG_GDBSTUB +#ifdef CONFIG_KERNEL_DEBUGGER gdbstub_exit(0); #endif @@ -148,14 +148,14 @@ void machine_restart(char *cmd) void machine_halt(void) { -#ifdef CONFIG_GDBSTUB +#ifdef CONFIG_KERNEL_DEBUGGER gdbstub_exit(0); #endif } void machine_power_off(void) { -#ifdef CONFIG_GDBSTUB +#ifdef CONFIG_KERNEL_DEBUGGER gdbstub_exit(0); #endif } diff --git a/arch/mn10300/kernel/smp.c b/arch/mn10300/kernel/smp.c index 0dcd1c6..51c02f9 100644 --- a/arch/mn10300/kernel/smp.c +++ b/arch/mn10300/kernel/smp.c @@ -113,15 +113,17 @@ static void init_ipi(void); */ static void mn10300_ipi_disable(unsigned int irq); static void mn10300_ipi_enable(unsigned int irq); -static void mn10300_ipi_ack(unsigned int irq); -static void mn10300_ipi_nop(unsigned int irq); +static void mn10300_ipi_chip_disable(struct irq_data *d); +static void mn10300_ipi_chip_enable(struct irq_data *d); +static void mn10300_ipi_ack(struct irq_data *d); +static void mn10300_ipi_nop(struct irq_data *d); static struct irq_chip mn10300_ipi_type = { .name = "cpu_ipi", - .disable = mn10300_ipi_disable, - .enable = mn10300_ipi_enable, - .ack = mn10300_ipi_ack, - .eoi = mn10300_ipi_nop + .irq_disable = mn10300_ipi_chip_disable, + .irq_enable = mn10300_ipi_chip_enable, + .irq_ack = mn10300_ipi_ack, + .irq_eoi = mn10300_ipi_nop }; static irqreturn_t smp_reschedule_interrupt(int irq, void *dev_id); @@ -236,6 +238,11 @@ static void mn10300_ipi_enable(unsigned int irq) arch_local_irq_restore(flags); } +static void mn10300_ipi_chip_enable(struct irq_data *d) +{ + mn10300_ipi_enable(d->irq); +} + /** * mn10300_ipi_disable - Disable an IPI * @irq: The IPI to be disabled. @@ -254,6 +261,12 @@ static void mn10300_ipi_disable(unsigned int irq) arch_local_irq_restore(flags); } +static void mn10300_ipi_chip_disable(struct irq_data *d) +{ + mn10300_ipi_disable(d->irq); +} + + /** * mn10300_ipi_ack - Acknowledge an IPI interrupt in the PIC * @irq: The IPI to be acknowledged. @@ -261,8 +274,9 @@ static void mn10300_ipi_disable(unsigned int irq) * Clear the interrupt detection flag for the IPI on the appropriate interrupt * channel in the PIC. */ -static void mn10300_ipi_ack(unsigned int irq) +static void mn10300_ipi_ack(struct irq_data *d) { + unsigned int irq = d->irq; unsigned long flags; u16 tmp; @@ -276,7 +290,7 @@ static void mn10300_ipi_ack(unsigned int irq) * mn10300_ipi_nop - Dummy IPI action * @irq: The IPI to be acted upon. */ -static void mn10300_ipi_nop(unsigned int irq) +static void mn10300_ipi_nop(struct irq_data *d) { } @@ -426,6 +440,22 @@ int smp_nmi_call_function(smp_call_func_t func, void *info, int wait) } /** + * smp_jump_to_debugger - Make other CPUs enter the debugger by sending an IPI + * + * Send a non-maskable request to all other CPUs in the system, instructing + * them to jump into the debugger. The caller is responsible for checking that + * the other CPUs responded to the instruction. + * + * The caller should make sure that this CPU's debugger IPI is disabled. + */ +void smp_jump_to_debugger(void) +{ + if (num_online_cpus() > 1) + /* Send a message to all other CPUs */ + send_IPI_allbutself(DEBUGGER_NMI_IPI); +} + +/** * stop_this_cpu - Callback to stop a CPU. * @unused: Callback context (ignored). */ @@ -589,7 +619,7 @@ static void __init smp_cpu_init(void) /** * smp_prepare_cpu_init - Initialise CPU in startup_secondary * - * Set interrupt level 0-6 setting and init ICR of gdbstub. + * Set interrupt level 0-6 setting and init ICR of the kernel debugger. */ void smp_prepare_cpu_init(void) { @@ -608,15 +638,15 @@ void smp_prepare_cpu_init(void) for (loop = 0; loop < GxICR_NUM_IRQS; loop++) GxICR(loop) = GxICR_LEVEL_6 | GxICR_DETECT; -#ifdef CONFIG_GDBSTUB - /* initialise GDB-stub */ +#ifdef CONFIG_KERNEL_DEBUGGER + /* initialise the kernel debugger interrupt */ do { unsigned long flags; u16 tmp16; flags = arch_local_cli_save(); - GxICR(GDB_NMI_IPI) = GxICR_NMI | GxICR_ENABLE | GxICR_DETECT; - tmp16 = GxICR(GDB_NMI_IPI); + GxICR(DEBUGGER_NMI_IPI) = GxICR_NMI | GxICR_ENABLE | GxICR_DETECT; + tmp16 = GxICR(DEBUGGER_NMI_IPI); arch_local_irq_restore(flags); } while (0); #endif diff --git a/arch/mn10300/kernel/switch_to.S b/arch/mn10300/kernel/switch_to.S index 9074d0f..de3e74f 100644 --- a/arch/mn10300/kernel/switch_to.S +++ b/arch/mn10300/kernel/switch_to.S @@ -39,11 +39,17 @@ ENTRY(__switch_to) # save prev context mov __switch_back,d0 - mov d0,(THREAD_PC,a0) mov sp,a2 mov a2,(THREAD_SP,a0) mov a3,(THREAD_A3,a0) +#ifdef CONFIG_KGDB + btst 0xff,(kgdb_single_step) + bne __switch_to__lift_sstep_bp +__switch_to__continue: +#endif + mov d0,(THREAD_PC,a0) + mov (THREAD_A3,a1),a3 mov (THREAD_SP,a1),a2 @@ -68,3 +74,106 @@ ENTRY(__switch_to) __switch_back: and ~EPSW_NMID,epsw ret [d2,d3,a2,a3,exreg1],32 + +#ifdef CONFIG_KGDB +############################################################################### +# +# Lift the single-step breakpoints when the task being traced is switched out +# A0 = prev +# A1 = next +# +############################################################################### +__switch_to__lift_sstep_bp: + add -12,sp + mov a0,e4 + mov a1,e5 + + # Clear the single-step flag to prevent us coming this way until we get + # switched back in + bclr 0xff,(kgdb_single_step) + + # Remove first breakpoint + mov (kgdb_sstep_bp_addr),a2 + cmp 0,a2 + beq 1f + movbu (kgdb_sstep_bp),d0 + movbu d0,(a2) +#if defined(CONFIG_MN10300_CACHE_FLUSH_ICACHE) || defined(CONFIG_MN10300_CACHE_INV_ICACHE) + mov a2,d0 + mov a2,d1 + add 1,d1 + calls flush_icache_range +#endif +1: + + # Remove second breakpoint + mov (kgdb_sstep_bp_addr+4),a2 + cmp 0,a2 + beq 2f + movbu (kgdb_sstep_bp+1),d0 + movbu d0,(a2) +#if defined(CONFIG_MN10300_CACHE_FLUSH_ICACHE) || defined(CONFIG_MN10300_CACHE_INV_ICACHE) + mov a2,d0 + mov a2,d1 + add 1,d1 + calls flush_icache_range +#endif +2: + + # Change the resumption address and return + mov __switch_back__reinstall_sstep_bp,d0 + mov e4,a0 + mov e5,a1 + add 12,sp + bra __switch_to__continue + +############################################################################### +# +# Reinstall the single-step breakpoints when the task being traced is switched +# back in (A1 points to the new thread_struct). +# +############################################################################### +__switch_back__reinstall_sstep_bp: + add -12,sp + mov a0,e4 # save the return value + mov 0xff,d3 + + # Reinstall first breakpoint + mov (kgdb_sstep_bp_addr),a2 + cmp 0,a2 + beq 1f + movbu (a2),d0 + movbu d0,(kgdb_sstep_bp) + movbu d3,(a2) +#if defined(CONFIG_MN10300_CACHE_FLUSH_ICACHE) || defined(CONFIG_MN10300_CACHE_INV_ICACHE) + mov a2,d0 + mov a2,d1 + add 1,d1 + calls flush_icache_range +#endif +1: + + # Reinstall second breakpoint + mov (kgdb_sstep_bp_addr+4),a2 + cmp 0,a2 + beq 2f + movbu (a2),d0 + movbu d0,(kgdb_sstep_bp+1) + movbu d3,(a2) +#if defined(CONFIG_MN10300_CACHE_FLUSH_ICACHE) || defined(CONFIG_MN10300_CACHE_INV_ICACHE) + mov a2,d0 + mov a2,d1 + add 1,d1 + calls flush_icache_range +#endif +2: + + mov d3,(kgdb_single_step) + + # Restore the return value (the previous thread_struct pointer) + mov e4,a0 + mov a0,d0 + add 12,sp + bra __switch_back + +#endif /* CONFIG_KGDB */ diff --git a/arch/mn10300/kernel/time.c b/arch/mn10300/kernel/time.c index 5b95500..67c6416 100644 --- a/arch/mn10300/kernel/time.c +++ b/arch/mn10300/kernel/time.c @@ -93,79 +93,6 @@ irqreturn_t local_timer_interrupt(void) return IRQ_HANDLED; } -#ifndef CONFIG_GENERIC_TIME -/* - * advance the kernel's time keeping clocks (xtime and jiffies) - * - we use Timer 0 & 1 cascaded as a clock to nudge us the next time - * there's a need to update - */ -static irqreturn_t timer_interrupt(int irq, void *dev_id) -{ - unsigned tsc, elapse; - irqreturn_t ret; - - while (tsc = get_cycles(), - elapse = tsc - mn10300_last_tsc, /* time elapsed since last - * tick */ - elapse > MN10300_TSC_PER_HZ - ) { - mn10300_last_tsc += MN10300_TSC_PER_HZ; - - /* advance the kernel's time tracking system */ - xtime_update(1); - } - - ret = local_timer_interrupt(); -#ifdef CONFIG_SMP - send_IPI_allbutself(LOCAL_TIMER_IPI); -#endif - return ret; -} - -static struct irqaction timer_irq = { - .handler = timer_interrupt, - .flags = IRQF_DISABLED | IRQF_SHARED | IRQF_TIMER, - .name = "timer", -}; -#endif /* CONFIG_GENERIC_TIME */ - -#ifdef CONFIG_CSRC_MN10300 -void __init clocksource_set_clock(struct clocksource *cs, unsigned int clock) -{ - u64 temp; - u32 shift; - - /* Find a shift value */ - for (shift = 32; shift > 0; shift--) { - temp = (u64) NSEC_PER_SEC << shift; - do_div(temp, clock); - if ((temp >> 32) == 0) - break; - } - cs->shift = shift; - cs->mult = (u32) temp; -} -#endif - -#if CONFIG_CEVT_MN10300 -void __cpuinit clockevent_set_clock(struct clock_event_device *cd, - unsigned int clock) -{ - u64 temp; - u32 shift; - - /* Find a shift value */ - for (shift = 32; shift > 0; shift--) { - temp = (u64) clock << shift; - do_div(temp, NSEC_PER_SEC); - if ((temp >> 32) == 0) - break; - } - cd->shift = shift; - cd->mult = (u32) temp; -} -#endif - /* * initialise the various timers used by the main part of the kernel */ @@ -177,11 +104,7 @@ void __init time_init(void) */ TMPSCNT |= TMPSCNT_ENABLE; -#ifdef CONFIG_GENERIC_TIME init_clocksource(); -#else - startup_timestamp_counter(); -#endif printk(KERN_INFO "timestamp counter I/O clock running at %lu.%02lu" @@ -190,12 +113,7 @@ void __init time_init(void) mn10300_last_tsc = read_timestamp_counter(); -#ifdef CONFIG_GENERIC_CLOCKEVENTS init_clockevents(); -#else - reload_jiffies_counter(MN10300_JC_PER_HZ - 1); - setup_jiffies_interrupt(TMJCIRQ, &timer_irq, CONFIG_TIMER_IRQ_LEVEL); -#endif #ifdef CONFIG_MN10300_WD_TIMER /* start the watchdog timer */ diff --git a/arch/mn10300/kernel/traps.c b/arch/mn10300/kernel/traps.c index b90c3f1..f03cb27 100644 --- a/arch/mn10300/kernel/traps.c +++ b/arch/mn10300/kernel/traps.c @@ -38,8 +38,9 @@ #include <asm/busctl-regs.h> #include <unit/leds.h> #include <asm/fpu.h> -#include <asm/gdb-stub.h> #include <asm/sections.h> +#include <asm/debugger.h> +#include "internal.h" #if (CONFIG_INTERRUPT_VECTOR_BASE & 0xffffff) #error "INTERRUPT_VECTOR_BASE not aligned to 16MiB boundary!" @@ -49,63 +50,169 @@ int kstack_depth_to_print = 24; spinlock_t die_lock = __SPIN_LOCK_UNLOCKED(die_lock); -ATOMIC_NOTIFIER_HEAD(mn10300_die_chain); +struct exception_to_signal_map { + u8 signo; + u32 si_code; +}; + +static const struct exception_to_signal_map exception_to_signal_map[256] = { + /* MMU exceptions */ + [EXCEP_ITLBMISS >> 3] = { 0, 0 }, + [EXCEP_DTLBMISS >> 3] = { 0, 0 }, + [EXCEP_IAERROR >> 3] = { 0, 0 }, + [EXCEP_DAERROR >> 3] = { 0, 0 }, + + /* system exceptions */ + [EXCEP_TRAP >> 3] = { SIGTRAP, TRAP_BRKPT }, + [EXCEP_ISTEP >> 3] = { SIGTRAP, TRAP_TRACE }, /* Monitor */ + [EXCEP_IBREAK >> 3] = { SIGTRAP, TRAP_HWBKPT }, /* Monitor */ + [EXCEP_OBREAK >> 3] = { SIGTRAP, TRAP_HWBKPT }, /* Monitor */ + [EXCEP_PRIVINS >> 3] = { SIGILL, ILL_PRVOPC }, + [EXCEP_UNIMPINS >> 3] = { SIGILL, ILL_ILLOPC }, + [EXCEP_UNIMPEXINS >> 3] = { SIGILL, ILL_ILLOPC }, + [EXCEP_MEMERR >> 3] = { SIGSEGV, SEGV_ACCERR }, + [EXCEP_MISALIGN >> 3] = { SIGBUS, BUS_ADRALN }, + [EXCEP_BUSERROR >> 3] = { SIGBUS, BUS_ADRERR }, + [EXCEP_ILLINSACC >> 3] = { SIGSEGV, SEGV_ACCERR }, + [EXCEP_ILLDATACC >> 3] = { SIGSEGV, SEGV_ACCERR }, + [EXCEP_IOINSACC >> 3] = { SIGSEGV, SEGV_ACCERR }, + [EXCEP_PRIVINSACC >> 3] = { SIGSEGV, SEGV_ACCERR }, /* userspace */ + [EXCEP_PRIVDATACC >> 3] = { SIGSEGV, SEGV_ACCERR }, /* userspace */ + [EXCEP_DATINSACC >> 3] = { SIGSEGV, SEGV_ACCERR }, + [EXCEP_DOUBLE_FAULT >> 3] = { SIGILL, ILL_BADSTK }, + + /* FPU exceptions */ + [EXCEP_FPU_DISABLED >> 3] = { SIGILL, ILL_COPROC }, + [EXCEP_FPU_UNIMPINS >> 3] = { SIGILL, ILL_COPROC }, + [EXCEP_FPU_OPERATION >> 3] = { SIGFPE, FPE_INTDIV }, + + /* interrupts */ + [EXCEP_WDT >> 3] = { SIGALRM, 0 }, + [EXCEP_NMI >> 3] = { SIGQUIT, 0 }, + [EXCEP_IRQ_LEVEL0 >> 3] = { SIGINT, 0 }, + [EXCEP_IRQ_LEVEL1 >> 3] = { 0, 0 }, + [EXCEP_IRQ_LEVEL2 >> 3] = { 0, 0 }, + [EXCEP_IRQ_LEVEL3 >> 3] = { 0, 0 }, + [EXCEP_IRQ_LEVEL4 >> 3] = { 0, 0 }, + [EXCEP_IRQ_LEVEL5 >> 3] = { 0, 0 }, + [EXCEP_IRQ_LEVEL6 >> 3] = { 0, 0 }, + + /* system calls */ + [EXCEP_SYSCALL0 >> 3] = { 0, 0 }, + [EXCEP_SYSCALL1 >> 3] = { SIGILL, ILL_ILLTRP }, + [EXCEP_SYSCALL2 >> 3] = { SIGILL, ILL_ILLTRP }, + [EXCEP_SYSCALL3 >> 3] = { SIGILL, ILL_ILLTRP }, + [EXCEP_SYSCALL4 >> 3] = { SIGILL, ILL_ILLTRP }, + [EXCEP_SYSCALL5 >> 3] = { SIGILL, ILL_ILLTRP }, + [EXCEP_SYSCALL6 >> 3] = { SIGILL, ILL_ILLTRP }, + [EXCEP_SYSCALL7 >> 3] = { SIGILL, ILL_ILLTRP }, + [EXCEP_SYSCALL8 >> 3] = { SIGILL, ILL_ILLTRP }, + [EXCEP_SYSCALL9 >> 3] = { SIGILL, ILL_ILLTRP }, + [EXCEP_SYSCALL10 >> 3] = { SIGILL, ILL_ILLTRP }, + [EXCEP_SYSCALL11 >> 3] = { SIGILL, ILL_ILLTRP }, + [EXCEP_SYSCALL12 >> 3] = { SIGILL, ILL_ILLTRP }, + [EXCEP_SYSCALL13 >> 3] = { SIGILL, ILL_ILLTRP }, + [EXCEP_SYSCALL14 >> 3] = { SIGILL, ILL_ILLTRP }, + [EXCEP_SYSCALL15 >> 3] = { SIGABRT, 0 }, +}; /* - * These constants are for searching for possible module text - * segments. MODULE_RANGE is a guess of how much space is likely - * to be vmalloced. + * Handle kernel exceptions. + * + * See if there's a fixup handler we can force a jump to when an exception + * happens due to something kernel code did */ -#define MODULE_RANGE (8 * 1024 * 1024) - -#define DO_ERROR(signr, prologue, str, name) \ -asmlinkage void name(struct pt_regs *regs, u32 intcode) \ -{ \ - prologue; \ - if (die_if_no_fixup(str, regs, intcode)) \ - return; \ - force_sig(signr, current); \ -} +int die_if_no_fixup(const char *str, struct pt_regs *regs, + enum exception_code code) +{ + u8 opcode; + int signo, si_code; + + if (user_mode(regs)) + return 0; + + peripheral_leds_display_exception(code); + + signo = exception_to_signal_map[code >> 3].signo; + si_code = exception_to_signal_map[code >> 3].si_code; + + switch (code) { + /* see if we can fixup the kernel accessing memory */ + case EXCEP_ITLBMISS: + case EXCEP_DTLBMISS: + case EXCEP_IAERROR: + case EXCEP_DAERROR: + case EXCEP_MEMERR: + case EXCEP_MISALIGN: + case EXCEP_BUSERROR: + case EXCEP_ILLDATACC: + case EXCEP_IOINSACC: + case EXCEP_PRIVINSACC: + case EXCEP_PRIVDATACC: + case EXCEP_DATINSACC: + if (fixup_exception(regs)) + return 1; + break; -#define DO_EINFO(signr, prologue, str, name, sicode) \ -asmlinkage void name(struct pt_regs *regs, u32 intcode) \ -{ \ - siginfo_t info; \ - prologue; \ - if (die_if_no_fixup(str, regs, intcode)) \ - return; \ - info.si_signo = signr; \ - if (signr == SIGILL && sicode == ILL_ILLOPC) { \ - uint8_t opcode; \ - if (get_user(opcode, (uint8_t __user *)regs->pc) == 0) \ - if (opcode == 0xff) \ - info.si_signo = SIGTRAP; \ - } \ - info.si_errno = 0; \ - info.si_code = sicode; \ - info.si_addr = (void *) regs->pc; \ - force_sig_info(info.si_signo, &info, current); \ + case EXCEP_TRAP: + case EXCEP_UNIMPINS: + if (get_user(opcode, (uint8_t __user *)regs->pc) != 0) + break; + if (opcode == 0xff) { + if (notify_die(DIE_BREAKPOINT, str, regs, code, 0, 0)) + return 1; + if (at_debugger_breakpoint(regs)) + regs->pc++; + signo = SIGTRAP; + si_code = TRAP_BRKPT; + } + break; + + case EXCEP_SYSCALL1 ... EXCEP_SYSCALL14: + /* syscall return addr is _after_ the instruction */ + regs->pc -= 2; + break; + + case EXCEP_SYSCALL15: + if (report_bug(regs->pc, regs) == BUG_TRAP_TYPE_WARN) + return 1; + + /* syscall return addr is _after_ the instruction */ + regs->pc -= 2; + break; + + default: + break; + } + + if (debugger_intercept(code, signo, si_code, regs) == 0) + return 1; + + if (notify_die(DIE_GPF, str, regs, code, 0, 0)) + return 1; + + /* make the process die as the last resort */ + die(str, regs, code); } -DO_ERROR(SIGTRAP, {}, "trap", trap); -DO_ERROR(SIGSEGV, {}, "ibreak", ibreak); -DO_ERROR(SIGSEGV, {}, "obreak", obreak); -DO_EINFO(SIGSEGV, {}, "access error", access_error, SEGV_ACCERR); -DO_EINFO(SIGSEGV, {}, "insn access error", insn_acc_error, SEGV_ACCERR); -DO_EINFO(SIGSEGV, {}, "data access error", data_acc_error, SEGV_ACCERR); -DO_EINFO(SIGILL, {}, "privileged opcode", priv_op, ILL_PRVOPC); -DO_EINFO(SIGILL, {}, "invalid opcode", invalid_op, ILL_ILLOPC); -DO_EINFO(SIGILL, {}, "invalid ex opcode", invalid_exop, ILL_ILLOPC); -DO_EINFO(SIGBUS, {}, "invalid address", mem_error, BUS_ADRERR); -DO_EINFO(SIGBUS, {}, "bus error", bus_error, BUS_ADRERR); - -DO_ERROR(SIGTRAP, -#ifndef CONFIG_MN10300_USING_JTAG - DCR &= ~0x0001, -#else - {}, -#endif - "single step", istep); +/* + * General exception handler + */ +asmlinkage void handle_exception(struct pt_regs *regs, u32 intcode) +{ + siginfo_t info; + + /* deal with kernel exceptions here */ + if (die_if_no_fixup(NULL, regs, intcode)) + return; + + /* otherwise it's a userspace exception */ + info.si_signo = exception_to_signal_map[intcode >> 3].signo; + info.si_code = exception_to_signal_map[intcode >> 3].si_code; + info.si_errno = 0; + info.si_addr = (void *) regs->pc; + force_sig_info(info.si_signo, &info, current); +} /* * handle NMI @@ -113,10 +220,8 @@ DO_ERROR(SIGTRAP, asmlinkage void nmi(struct pt_regs *regs, enum exception_code code) { /* see if gdbstub wants to deal with it */ -#ifdef CONFIG_GDBSTUB - if (gdbstub_intercept(regs, code)) + if (debugger_intercept(code, SIGQUIT, 0, regs)) return; -#endif printk(KERN_WARNING "--- Register Dump ---\n"); show_registers(regs); @@ -128,29 +233,36 @@ asmlinkage void nmi(struct pt_regs *regs, enum exception_code code) */ void show_trace(unsigned long *sp) { - unsigned long *stack, addr, module_start, module_end; - int i; - - printk(KERN_EMERG "\nCall Trace:"); - - stack = sp; - i = 0; - module_start = VMALLOC_START; - module_end = VMALLOC_END; + unsigned long bottom, stack, addr, fp, raslot; + + printk(KERN_EMERG "\nCall Trace:\n"); + + //stack = (unsigned long)sp; + asm("mov sp,%0" : "=a"(stack)); + asm("mov a3,%0" : "=r"(fp)); + + raslot = ULONG_MAX; + bottom = (stack + THREAD_SIZE) & ~(THREAD_SIZE - 1); + for (; stack < bottom; stack += sizeof(addr)) { + addr = *(unsigned long *)stack; + if (stack == fp) { + if (addr > stack && addr < bottom) { + fp = addr; + raslot = stack + sizeof(addr); + continue; + } + fp = 0; + raslot = ULONG_MAX; + } - while (((long) stack & (THREAD_SIZE - 1)) != 0) { - addr = *stack++; if (__kernel_text_address(addr)) { -#if 1 printk(" [<%08lx>]", addr); + if (stack >= raslot) + raslot = ULONG_MAX; + else + printk(" ?"); print_symbol(" %s", addr); printk("\n"); -#else - if ((i % 6) == 0) - printk(KERN_EMERG " "); - printk("[<%08lx>] ", addr); - i++; -#endif } } @@ -323,86 +435,6 @@ void die(const char *str, struct pt_regs *regs, enum exception_code code) } /* - * see if there's a fixup handler we can force a jump to when an exception - * happens due to something kernel code did - */ -int die_if_no_fixup(const char *str, struct pt_regs *regs, - enum exception_code code) -{ - if (user_mode(regs)) - return 0; - - peripheral_leds_display_exception(code); - - switch (code) { - /* see if we can fixup the kernel accessing memory */ - case EXCEP_ITLBMISS: - case EXCEP_DTLBMISS: - case EXCEP_IAERROR: - case EXCEP_DAERROR: - case EXCEP_MEMERR: - case EXCEP_MISALIGN: - case EXCEP_BUSERROR: - case EXCEP_ILLDATACC: - case EXCEP_IOINSACC: - case EXCEP_PRIVINSACC: - case EXCEP_PRIVDATACC: - case EXCEP_DATINSACC: - if (fixup_exception(regs)) - return 1; - case EXCEP_UNIMPINS: - if (regs->pc && *(uint8_t *)regs->pc == 0xff) - if (notify_die(DIE_BREAKPOINT, str, regs, code, 0, 0)) - return 1; - break; - default: - break; - } - - /* see if gdbstub wants to deal with it */ -#ifdef CONFIG_GDBSTUB - if (gdbstub_intercept(regs, code)) - return 1; -#endif - - if (notify_die(DIE_GPF, str, regs, code, 0, 0)) - return 1; - - /* make the process die as the last resort */ - die(str, regs, code); -} - -/* - * handle unsupported syscall instructions (syscall 1-15) - */ -static asmlinkage void unsupported_syscall(struct pt_regs *regs, - enum exception_code code) -{ - struct task_struct *tsk = current; - siginfo_t info; - - /* catch a kernel BUG() */ - if (code == EXCEP_SYSCALL15 && !user_mode(regs)) { - if (report_bug(regs->pc, regs) == BUG_TRAP_TYPE_BUG) { -#ifdef CONFIG_GDBSTUB - gdbstub_intercept(regs, code); -#endif - } - } - - regs->pc -= 2; /* syscall return addr is _after_ the instruction */ - - die_if_no_fixup("An unsupported syscall insn was used by the kernel\n", - regs, code); - - info.si_signo = SIGILL; - info.si_errno = ENOSYS; - info.si_code = ILL_ILLTRP; - info.si_addr = (void *) regs->pc; - force_sig_info(SIGILL, &info, tsk); -} - -/* * display the register file when the stack pointer gets clobbered */ asmlinkage void do_double_fault(struct pt_regs *regs) @@ -481,10 +513,8 @@ asmlinkage void uninitialised_exception(struct pt_regs *regs, { /* see if gdbstub wants to deal with it */ -#ifdef CONFIG_GDBSTUB - if (gdbstub_intercept(regs, code)) + if (debugger_intercept(code, SIGSYS, 0, regs) == 0) return; -#endif peripheral_leds_display_exception(code); printk(KERN_EMERG "Uninitialised Exception 0x%04x\n", code & 0xFFFF); @@ -549,43 +579,43 @@ void __init set_intr_stub(enum exception_code code, void *handler) */ void __init trap_init(void) { - set_excp_vector(EXCEP_TRAP, trap); - set_excp_vector(EXCEP_ISTEP, istep); - set_excp_vector(EXCEP_IBREAK, ibreak); - set_excp_vector(EXCEP_OBREAK, obreak); - - set_excp_vector(EXCEP_PRIVINS, priv_op); - set_excp_vector(EXCEP_UNIMPINS, invalid_op); - set_excp_vector(EXCEP_UNIMPEXINS, invalid_exop); - set_excp_vector(EXCEP_MEMERR, mem_error); + set_excp_vector(EXCEP_TRAP, handle_exception); + set_excp_vector(EXCEP_ISTEP, handle_exception); + set_excp_vector(EXCEP_IBREAK, handle_exception); + set_excp_vector(EXCEP_OBREAK, handle_exception); + + set_excp_vector(EXCEP_PRIVINS, handle_exception); + set_excp_vector(EXCEP_UNIMPINS, handle_exception); + set_excp_vector(EXCEP_UNIMPEXINS, handle_exception); + set_excp_vector(EXCEP_MEMERR, handle_exception); set_excp_vector(EXCEP_MISALIGN, misalignment); - set_excp_vector(EXCEP_BUSERROR, bus_error); - set_excp_vector(EXCEP_ILLINSACC, insn_acc_error); - set_excp_vector(EXCEP_ILLDATACC, data_acc_error); - set_excp_vector(EXCEP_IOINSACC, insn_acc_error); - set_excp_vector(EXCEP_PRIVINSACC, insn_acc_error); - set_excp_vector(EXCEP_PRIVDATACC, data_acc_error); - set_excp_vector(EXCEP_DATINSACC, insn_acc_error); - set_excp_vector(EXCEP_FPU_UNIMPINS, fpu_invalid_op); + set_excp_vector(EXCEP_BUSERROR, handle_exception); + set_excp_vector(EXCEP_ILLINSACC, handle_exception); + set_excp_vector(EXCEP_ILLDATACC, handle_exception); + set_excp_vector(EXCEP_IOINSACC, handle_exception); + set_excp_vector(EXCEP_PRIVINSACC, handle_exception); + set_excp_vector(EXCEP_PRIVDATACC, handle_exception); + set_excp_vector(EXCEP_DATINSACC, handle_exception); + set_excp_vector(EXCEP_FPU_UNIMPINS, handle_exception); set_excp_vector(EXCEP_FPU_OPERATION, fpu_exception); set_excp_vector(EXCEP_NMI, nmi); - set_excp_vector(EXCEP_SYSCALL1, unsupported_syscall); - set_excp_vector(EXCEP_SYSCALL2, unsupported_syscall); - set_excp_vector(EXCEP_SYSCALL3, unsupported_syscall); - set_excp_vector(EXCEP_SYSCALL4, unsupported_syscall); - set_excp_vector(EXCEP_SYSCALL5, unsupported_syscall); - set_excp_vector(EXCEP_SYSCALL6, unsupported_syscall); - set_excp_vector(EXCEP_SYSCALL7, unsupported_syscall); - set_excp_vector(EXCEP_SYSCALL8, unsupported_syscall); - set_excp_vector(EXCEP_SYSCALL9, unsupported_syscall); - set_excp_vector(EXCEP_SYSCALL10, unsupported_syscall); - set_excp_vector(EXCEP_SYSCALL11, unsupported_syscall); - set_excp_vector(EXCEP_SYSCALL12, unsupported_syscall); - set_excp_vector(EXCEP_SYSCALL13, unsupported_syscall); - set_excp_vector(EXCEP_SYSCALL14, unsupported_syscall); - set_excp_vector(EXCEP_SYSCALL15, unsupported_syscall); + set_excp_vector(EXCEP_SYSCALL1, handle_exception); + set_excp_vector(EXCEP_SYSCALL2, handle_exception); + set_excp_vector(EXCEP_SYSCALL3, handle_exception); + set_excp_vector(EXCEP_SYSCALL4, handle_exception); + set_excp_vector(EXCEP_SYSCALL5, handle_exception); + set_excp_vector(EXCEP_SYSCALL6, handle_exception); + set_excp_vector(EXCEP_SYSCALL7, handle_exception); + set_excp_vector(EXCEP_SYSCALL8, handle_exception); + set_excp_vector(EXCEP_SYSCALL9, handle_exception); + set_excp_vector(EXCEP_SYSCALL10, handle_exception); + set_excp_vector(EXCEP_SYSCALL11, handle_exception); + set_excp_vector(EXCEP_SYSCALL12, handle_exception); + set_excp_vector(EXCEP_SYSCALL13, handle_exception); + set_excp_vector(EXCEP_SYSCALL14, handle_exception); + set_excp_vector(EXCEP_SYSCALL15, handle_exception); } /* diff --git a/arch/mn10300/mm/Kconfig.cache b/arch/mn10300/mm/Kconfig.cache index c4fd923..bfbe526 100644 --- a/arch/mn10300/mm/Kconfig.cache +++ b/arch/mn10300/mm/Kconfig.cache @@ -99,3 +99,49 @@ config MN10300_CACHE_INV_ICACHE help Set if we need the icache to be invalidated, even if the dcache is in write-through mode and doesn't need flushing. + +# +# The kernel debugger gets its own separate cache flushing functions +# +config MN10300_DEBUGGER_CACHE_FLUSH_BY_TAG + def_bool y if KERNEL_DEBUGGER && \ + MN10300_CACHE_WBACK && \ + !MN10300_CACHE_SNOOP && \ + MN10300_CACHE_MANAGE_BY_TAG + help + Set if the debugger needs to flush the dcache and invalidate the + icache using the cache tag registers to make breakpoints work. + +config MN10300_DEBUGGER_CACHE_FLUSH_BY_REG + def_bool y if KERNEL_DEBUGGER && \ + MN10300_CACHE_WBACK && \ + !MN10300_CACHE_SNOOP && \ + MN10300_CACHE_MANAGE_BY_REG + help + Set if the debugger needs to flush the dcache and invalidate the + icache using automatic purge registers to make breakpoints work. + +config MN10300_DEBUGGER_CACHE_INV_BY_TAG + def_bool y if KERNEL_DEBUGGER && \ + MN10300_CACHE_WTHRU && \ + !MN10300_CACHE_SNOOP && \ + MN10300_CACHE_MANAGE_BY_TAG + help + Set if the debugger needs to invalidate the icache using the cache + tag registers to make breakpoints work. + +config MN10300_DEBUGGER_CACHE_INV_BY_REG + def_bool y if KERNEL_DEBUGGER && \ + MN10300_CACHE_WTHRU && \ + !MN10300_CACHE_SNOOP && \ + MN10300_CACHE_MANAGE_BY_REG + help + Set if the debugger needs to invalidate the icache using automatic + purge registers to make breakpoints work. + +config MN10300_DEBUGGER_CACHE_NO_FLUSH + def_bool y if KERNEL_DEBUGGER && \ + (MN10300_CACHE_DISABLED || MN10300_CACHE_SNOOP) + help + Set if the debugger does not need to flush the dcache and/or + invalidate the icache to make breakpoints work. diff --git a/arch/mn10300/mm/Makefile b/arch/mn10300/mm/Makefile index 203fee2..11f3846 100644 --- a/arch/mn10300/mm/Makefile +++ b/arch/mn10300/mm/Makefile @@ -13,6 +13,15 @@ cacheflush-$(CONFIG_MN10300_CACHE_INV_BY_REG) += cache-inv-by-reg.o cacheflush-$(CONFIG_MN10300_CACHE_FLUSH_BY_TAG) += cache-flush-by-tag.o cacheflush-$(CONFIG_MN10300_CACHE_FLUSH_BY_REG) += cache-flush-by-reg.o +cacheflush-$(CONFIG_MN10300_DEBUGGER_CACHE_FLUSH_BY_TAG) += \ + cache-dbg-flush-by-tag.o cache-dbg-inv-by-tag.o +cacheflush-$(CONFIG_MN10300_DEBUGGER_CACHE_FLUSH_BY_REG) += \ + cache-dbg-flush-by-reg.o +cacheflush-$(CONFIG_MN10300_DEBUGGER_CACHE_INV_BY_TAG) += \ + cache-dbg-inv-by-tag.o cache-dbg-inv.o +cacheflush-$(CONFIG_MN10300_DEBUGGER_CACHE_INV_BY_REG) += \ + cache-dbg-inv-by-reg.o cache-dbg-inv.o + cacheflush-$(CONFIG_MN10300_CACHE_DISABLED) := cache-disabled.o obj-y := \ diff --git a/arch/mn10300/mm/cache-dbg-flush-by-reg.S b/arch/mn10300/mm/cache-dbg-flush-by-reg.S new file mode 100644 index 0000000..665919f --- /dev/null +++ b/arch/mn10300/mm/cache-dbg-flush-by-reg.S @@ -0,0 +1,160 @@ +/* MN10300 CPU cache invalidation routines, using automatic purge registers + * + * Copyright (C) 2011 Red Hat, Inc. All Rights Reserved. + * Written by David Howells (dhowells@redhat.com) + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public Licence + * as published by the Free Software Foundation; either version + * 2 of the Licence, or (at your option) any later version. + */ +#include <linux/sys.h> +#include <linux/linkage.h> +#include <asm/smp.h> +#include <asm/page.h> +#include <asm/cache.h> +#include <asm/irqflags.h> +#include <asm/cacheflush.h> +#include "cache.inc" + + .am33_2 + +############################################################################### +# +# void debugger_local_cache_flushinv(void) +# Flush the entire data cache back to RAM and invalidate the icache +# +############################################################################### + ALIGN + .globl debugger_local_cache_flushinv + .type debugger_local_cache_flushinv,@function +debugger_local_cache_flushinv: + # + # firstly flush the dcache + # + movhu (CHCTR),d0 + btst CHCTR_DCEN|CHCTR_ICEN,d0 + beq debugger_local_cache_flushinv_end + + mov DCPGCR,a0 + + mov epsw,d1 + and ~EPSW_IE,epsw + or EPSW_NMID,epsw + nop + + btst CHCTR_DCEN,d0 + beq debugger_local_cache_flushinv_no_dcache + + # wait for busy bit of area purge + setlb + mov (a0),d0 + btst DCPGCR_DCPGBSY,d0 + lne + + # set mask + clr d0 + mov d0,(DCPGMR) + + # area purge + # + # DCPGCR = DCPGCR_DCP + # + mov DCPGCR_DCP,d0 + mov d0,(a0) + + # wait for busy bit of area purge + setlb + mov (a0),d0 + btst DCPGCR_DCPGBSY,d0 + lne + +debugger_local_cache_flushinv_no_dcache: + # + # secondly, invalidate the icache if it is enabled + # + mov CHCTR,a0 + movhu (a0),d0 + btst CHCTR_ICEN,d0 + beq debugger_local_cache_flushinv_done + + invalidate_icache 0 + +debugger_local_cache_flushinv_done: + mov d1,epsw + +debugger_local_cache_flushinv_end: + ret [],0 + .size debugger_local_cache_flushinv,.-debugger_local_cache_flushinv + +############################################################################### +# +# void debugger_local_cache_flushinv_one(u8 *addr) +# +# Invalidate one particular cacheline if it's in the icache +# +############################################################################### + ALIGN + .globl debugger_local_cache_flushinv_one + .type debugger_local_cache_flushinv_one,@function +debugger_local_cache_flushinv_one: + movhu (CHCTR),d1 + btst CHCTR_DCEN|CHCTR_ICEN,d1 + beq debugger_local_cache_flushinv_one_end + btst CHCTR_DCEN,d1 + beq debugger_local_cache_flushinv_one_no_dcache + + # round cacheline addr down + and L1_CACHE_TAG_MASK,d0 + mov d0,a1 + mov d0,d1 + + # determine the dcache purge control reg address + mov DCACHE_PURGE(0,0),a0 + and L1_CACHE_TAG_ENTRY,d0 + add d0,a0 + + # retain valid entries in the cache + or L1_CACHE_TAG_VALID,d1 + + # conditionally purge this line in all ways + mov d1,(L1_CACHE_WAYDISP*0,a0) + +debugger_local_cache_flushinv_no_dcache: + # + # now try to flush the icache + # + mov CHCTR,a0 + movhu (a0),d0 + btst CHCTR_ICEN,d0 + beq mn10300_local_icache_inv_range_reg_end + + LOCAL_CLI_SAVE(d1) + + mov ICIVCR,a0 + + # wait for the invalidator to quiesce + setlb + mov (a0),d0 + btst ICIVCR_ICIVBSY,d0 + lne + + # set the mask + mov L1_CACHE_TAG_MASK,d0 + mov d0,(ICIVMR) + + # invalidate the cache line at the given address + or ICIVCR_ICI,a1 + mov a1,(a0) + + # wait for the invalidator to quiesce again + setlb + mov (a0),d0 + btst ICIVCR_ICIVBSY,d0 + lne + + LOCAL_IRQ_RESTORE(d1) + +debugger_local_cache_flushinv_one_end: + ret [],0 + .size debugger_local_cache_flushinv_one,.-debugger_local_cache_flushinv_one diff --git a/arch/mn10300/mm/cache-dbg-flush-by-tag.S b/arch/mn10300/mm/cache-dbg-flush-by-tag.S new file mode 100644 index 0000000..bf56930 --- /dev/null +++ b/arch/mn10300/mm/cache-dbg-flush-by-tag.S @@ -0,0 +1,114 @@ +/* MN10300 CPU cache invalidation routines, using direct tag flushing + * + * Copyright (C) 2011 Red Hat, Inc. All Rights Reserved. + * Written by David Howells (dhowells@redhat.com) + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public Licence + * as published by the Free Software Foundation; either version + * 2 of the Licence, or (at your option) any later version. + */ +#include <linux/sys.h> +#include <linux/linkage.h> +#include <asm/smp.h> +#include <asm/page.h> +#include <asm/cache.h> +#include <asm/irqflags.h> +#include <asm/cacheflush.h> +#include "cache.inc" + + .am33_2 + +############################################################################### +# +# void debugger_local_cache_flushinv(void) +# +# Flush the entire data cache back to RAM and invalidate the icache +# +############################################################################### + ALIGN + .globl debugger_local_cache_flushinv + .type debugger_local_cache_flushinv,@function +debugger_local_cache_flushinv: + # + # firstly flush the dcache + # + movhu (CHCTR),d0 + btst CHCTR_DCEN|CHCTR_ICEN,d0 + beq debugger_local_cache_flushinv_end + + btst CHCTR_DCEN,d0 + beq debugger_local_cache_flushinv_no_dcache + + # read the addresses tagged in the cache's tag RAM and attempt to flush + # those addresses specifically + # - we rely on the hardware to filter out invalid tag entry addresses + mov DCACHE_TAG(0,0),a0 # dcache tag RAM access address + mov DCACHE_PURGE(0,0),a1 # dcache purge request address + mov L1_CACHE_NWAYS*L1_CACHE_NENTRIES,e0 # total number of entries + +mn10300_local_dcache_flush_loop: + mov (a0),d0 + and L1_CACHE_TAG_MASK,d0 + or L1_CACHE_TAG_VALID,d0 # retain valid entries in the + # cache + mov d0,(a1) # conditional purge + + add L1_CACHE_BYTES,a0 + add L1_CACHE_BYTES,a1 + add -1,e0 + bne mn10300_local_dcache_flush_loop + +debugger_local_cache_flushinv_no_dcache: + # + # secondly, invalidate the icache if it is enabled + # + mov CHCTR,a0 + movhu (a0),d0 + btst CHCTR_ICEN,d0 + beq debugger_local_cache_flushinv_end + + invalidate_icache 1 + +debugger_local_cache_flushinv_end: + ret [],0 + .size debugger_local_cache_flushinv,.-debugger_local_cache_flushinv + +############################################################################### +# +# void debugger_local_cache_flushinv_one(u8 *addr) +# +# Invalidate one particular cacheline if it's in the icache +# +############################################################################### + ALIGN + .globl debugger_local_cache_flushinv_one + .type debugger_local_cache_flushinv_one,@function +debugger_local_cache_flushinv_one: + movhu (CHCTR),d1 + btst CHCTR_DCEN|CHCTR_ICEN,d1 + beq debugger_local_cache_flushinv_one_end + btst CHCTR_DCEN,d1 + beq debugger_local_cache_flushinv_one_icache + + # round cacheline addr down + and L1_CACHE_TAG_MASK,d0 + mov d0,a1 + + # determine the dcache purge control reg address + mov DCACHE_PURGE(0,0),a0 + and L1_CACHE_TAG_ENTRY,d0 + add d0,a0 + + # retain valid entries in the cache + or L1_CACHE_TAG_VALID,a1 + + # conditionally purge this line in all ways + mov a1,(L1_CACHE_WAYDISP*0,a0) + + # now go and do the icache + bra debugger_local_cache_flushinv_one_icache + +debugger_local_cache_flushinv_one_end: + ret [],0 + .size debugger_local_cache_flushinv_one,.-debugger_local_cache_flushinv_one diff --git a/arch/mn10300/mm/cache-dbg-inv-by-reg.S b/arch/mn10300/mm/cache-dbg-inv-by-reg.S new file mode 100644 index 0000000..c4e6252 --- /dev/null +++ b/arch/mn10300/mm/cache-dbg-inv-by-reg.S @@ -0,0 +1,69 @@ +/* MN10300 CPU cache invalidation routines, using automatic purge registers + * + * Copyright (C) 2011 Red Hat, Inc. All Rights Reserved. + * Written by David Howells (dhowells@redhat.com) + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public Licence + * as published by the Free Software Foundation; either version + * 2 of the Licence, or (at your option) any later version. + */ +#include <linux/sys.h> +#include <linux/linkage.h> +#include <asm/cache.h> +#include <asm/irqflags.h> +#include <asm/cacheflush.h> +#include "cache.inc" + + .am33_2 + + .globl debugger_local_cache_flushinv_one + +############################################################################### +# +# void debugger_local_cache_flushinv_one(u8 *addr) +# +# Invalidate one particular cacheline if it's in the icache +# +############################################################################### + ALIGN + .globl debugger_local_cache_flushinv_one + .type debugger_local_cache_flushinv_one,@function +debugger_local_cache_flushinv_one: + mov d0,a1 + + mov CHCTR,a0 + movhu (a0),d0 + btst CHCTR_ICEN,d0 + beq mn10300_local_icache_inv_range_reg_end + + LOCAL_CLI_SAVE(d1) + + mov ICIVCR,a0 + + # wait for the invalidator to quiesce + setlb + mov (a0),d0 + btst ICIVCR_ICIVBSY,d0 + lne + + # set the mask + mov ~L1_CACHE_TAG_MASK,d0 + mov d0,(ICIVMR) + + # invalidate the cache line at the given address + and ~L1_CACHE_TAG_MASK,a1 + or ICIVCR_ICI,a1 + mov a1,(a0) + + # wait for the invalidator to quiesce again + setlb + mov (a0),d0 + btst ICIVCR_ICIVBSY,d0 + lne + + LOCAL_IRQ_RESTORE(d1) + +mn10300_local_icache_inv_range_reg_end: + ret [],0 + .size debugger_local_cache_flushinv_one,.-debugger_local_cache_flushinv_one diff --git a/arch/mn10300/mm/cache-dbg-inv-by-tag.S b/arch/mn10300/mm/cache-dbg-inv-by-tag.S new file mode 100644 index 0000000..d8ec821 --- /dev/null +++ b/arch/mn10300/mm/cache-dbg-inv-by-tag.S @@ -0,0 +1,120 @@ +/* MN10300 CPU cache invalidation routines, using direct tag flushing + * + * Copyright (C) 2011 Red Hat, Inc. All Rights Reserved. + * Written by David Howells (dhowells@redhat.com) + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public Licence + * as published by the Free Software Foundation; either version + * 2 of the Licence, or (at your option) any later version. + */ +#include <linux/sys.h> +#include <linux/linkage.h> +#include <asm/smp.h> +#include <asm/page.h> +#include <asm/cache.h> +#include <asm/irqflags.h> +#include <asm/cacheflush.h> +#include "cache.inc" + + .am33_2 + + .globl debugger_local_cache_flushinv_one_icache + +############################################################################### +# +# void debugger_local_cache_flushinv_one(u8 *addr) +# +# Invalidate one particular cacheline if it's in the icache +# +############################################################################### + ALIGN + .globl debugger_local_cache_flushinv_one_icache + .type debugger_local_cache_flushinv_one_icache,@function +debugger_local_cache_flushinv_one_icache: + movm [d3,a2],(sp) + + mov CHCTR,a2 + movhu (a2),d0 + btst CHCTR_ICEN,d0 + beq debugger_local_cache_flushinv_one_icache_end + + mov d0,a1 + and L1_CACHE_TAG_MASK,a1 + + # read the tags from the tag RAM, and if they indicate a matching valid + # cache line then we invalidate that line + mov ICACHE_TAG(0,0),a0 + mov a1,d0 + and L1_CACHE_TAG_ENTRY,d0 + add d0,a0 # starting icache tag RAM + # access address + + and ~(L1_CACHE_DISPARITY-1),a1 # determine comparator base + or L1_CACHE_TAG_VALID,a1 + mov L1_CACHE_TAG_ADDRESS|L1_CACHE_TAG_VALID,d1 + + LOCAL_CLI_SAVE(d3) + + # disable the icache + movhu (a2),d0 + and ~CHCTR_ICEN,d0 + movhu d0,(a2) + + # and wait for it to calm down + setlb + movhu (a2),d0 + btst CHCTR_ICBUSY,d0 + lne + + # check all the way tags for this cache entry + mov (a0),d0 # read the tag in the way 0 slot + xor a1,d0 + and d1,d0 + beq debugger_local_icache_kill # jump if matched + + add L1_CACHE_WAYDISP,a0 + mov (a0),d0 # read the tag in the way 1 slot + xor a1,d0 + and d1,d0 + beq debugger_local_icache_kill # jump if matched + + add L1_CACHE_WAYDISP,a0 + mov (a0),d0 # read the tag in the way 2 slot + xor a1,d0 + and d1,d0 + beq debugger_local_icache_kill # jump if matched + + add L1_CACHE_WAYDISP,a0 + mov (a0),d0 # read the tag in the way 3 slot + xor a1,d0 + and d1,d0 + bne debugger_local_icache_finish # jump if not matched + +debugger_local_icache_kill: + mov d0,(a0) # kill the tag (D0 is 0 at this point) + +debugger_local_icache_finish: + # wait for the cache to finish what it's doing + setlb + movhu (a2),d0 + btst CHCTR_ICBUSY,d0 + lne + + # and reenable it + or CHCTR_ICEN,d0 + movhu d0,(a2) + movhu (a2),d0 + + # re-enable interrupts + LOCAL_IRQ_RESTORE(d3) + +debugger_local_cache_flushinv_one_icache_end: + ret [d3,a2],8 + .size debugger_local_cache_flushinv_one_icache,.-debugger_local_cache_flushinv_one_icache + +#ifdef CONFIG_MN10300_DEBUGGER_CACHE_INV_BY_TAG + .globl debugger_local_cache_flushinv_one + .type debugger_local_cache_flushinv_one,@function +debugger_local_cache_flushinv_one = debugger_local_cache_flushinv_one_icache +#endif diff --git a/arch/mn10300/mm/cache-dbg-inv.S b/arch/mn10300/mm/cache-dbg-inv.S new file mode 100644 index 0000000..eba2d6d --- /dev/null +++ b/arch/mn10300/mm/cache-dbg-inv.S @@ -0,0 +1,47 @@ +/* MN10300 CPU cache invalidation routines + * + * Copyright (C) 2011 Red Hat, Inc. All Rights Reserved. + * Written by David Howells (dhowells@redhat.com) + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public Licence + * as published by the Free Software Foundation; either version + * 2 of the Licence, or (at your option) any later version. + */ +#include <linux/sys.h> +#include <linux/linkage.h> +#include <asm/smp.h> +#include <asm/page.h> +#include <asm/cache.h> +#include <asm/irqflags.h> +#include <asm/cacheflush.h> +#include "cache.inc" + + .am33_2 + + .globl debugger_local_cache_flushinv + +############################################################################### +# +# void debugger_local_cache_flushinv(void) +# +# Invalidate the entire icache +# +############################################################################### + ALIGN + .globl debugger_local_cache_flushinv + .type debugger_local_cache_flushinv,@function +debugger_local_cache_flushinv: + # + # we only need to invalidate the icache in this cache mode + # + mov CHCTR,a0 + movhu (a0),d0 + btst CHCTR_ICEN,d0 + beq debugger_local_cache_flushinv_end + + invalidate_icache 1 + +debugger_local_cache_flushinv_end: + ret [],0 + .size debugger_local_cache_flushinv,.-debugger_local_cache_flushinv diff --git a/arch/mn10300/mm/cache-flush-by-tag.S b/arch/mn10300/mm/cache-flush-by-tag.S index 5cd6a27..1ddc068 100644 --- a/arch/mn10300/mm/cache-flush-by-tag.S +++ b/arch/mn10300/mm/cache-flush-by-tag.S @@ -62,7 +62,7 @@ mn10300_local_dcache_flush: mn10300_local_dcache_flush_loop: mov (a0),d0 - and L1_CACHE_TAG_ADDRESS|L1_CACHE_TAG_ENTRY,d0 + and L1_CACHE_TAG_MASK,d0 or L1_CACHE_TAG_VALID,d0 # retain valid entries in the # cache mov d0,(a1) # conditional purge @@ -112,11 +112,11 @@ mn10300_local_dcache_flush_range: 1: # round start addr down - and L1_CACHE_TAG_ADDRESS|L1_CACHE_TAG_ENTRY,d0 + and L1_CACHE_TAG_MASK,d0 mov d0,a1 add L1_CACHE_BYTES,d1 # round end addr up - and L1_CACHE_TAG_ADDRESS|L1_CACHE_TAG_ENTRY,d1 + and L1_CACHE_TAG_MASK,d1 # write a request to flush all instances of an address from the cache mov DCACHE_PURGE(0,0),a0 @@ -215,12 +215,11 @@ mn10300_local_dcache_flush_inv_range: bra mn10300_local_dcache_flush_inv 1: - and L1_CACHE_TAG_ADDRESS|L1_CACHE_TAG_ENTRY,d0 # round start - # addr down + and L1_CACHE_TAG_MASK,d0 # round start addr down mov d0,a1 - add L1_CACHE_BYTES,d1 # round end addr up - and L1_CACHE_TAG_ADDRESS|L1_CACHE_TAG_ENTRY,d1 + add L1_CACHE_BYTES,d1 # round end addr up + and L1_CACHE_TAG_MASK,d1 # write a request to flush and invalidate all instances of an address # from the cache diff --git a/arch/mn10300/mm/cache-inv-by-reg.S b/arch/mn10300/mm/cache-inv-by-reg.S index c895086..a60825b 100644 --- a/arch/mn10300/mm/cache-inv-by-reg.S +++ b/arch/mn10300/mm/cache-inv-by-reg.S @@ -15,6 +15,7 @@ #include <asm/cache.h> #include <asm/irqflags.h> #include <asm/cacheflush.h> +#include "cache.inc" #define mn10300_local_dcache_inv_range_intr_interval \ +((1 << MN10300_DCACHE_INV_RANGE_INTR_LOG2_INTERVAL) - 1) @@ -62,10 +63,7 @@ mn10300_local_icache_inv: btst CHCTR_ICEN,d0 beq mn10300_local_icache_inv_end - # invalidate - or CHCTR_ICINV,d0 - movhu d0,(a0) - movhu (a0),d0 + invalidate_icache 1 mn10300_local_icache_inv_end: ret [],0 @@ -87,11 +85,8 @@ mn10300_local_dcache_inv: btst CHCTR_DCEN,d0 beq mn10300_local_dcache_inv_end - # invalidate - or CHCTR_DCINV,d0 - movhu d0,(a0) - movhu (a0),d0 - + invalidate_dcache 1 + mn10300_local_dcache_inv_end: ret [],0 .size mn10300_local_dcache_inv,.-mn10300_local_dcache_inv @@ -121,9 +116,9 @@ mn10300_local_dcache_inv_range: # and if they're not cacheline-aligned, we must flush any bits outside # the range that share cachelines with stuff inside the range #ifdef CONFIG_MN10300_CACHE_WBACK - btst ~(L1_CACHE_BYTES-1),d0 + btst ~L1_CACHE_TAG_MASK,d0 bne 1f - btst ~(L1_CACHE_BYTES-1),d1 + btst ~L1_CACHE_TAG_MASK,d1 beq 2f 1: bra mn10300_local_dcache_flush_inv_range @@ -141,12 +136,11 @@ mn10300_local_dcache_inv_range: # writeback mode, in which case we would be in flush and invalidate by # now #ifndef CONFIG_MN10300_CACHE_WBACK - and L1_CACHE_TAG_ADDRESS|L1_CACHE_TAG_ENTRY,d0 # round start - # addr down + and L1_CACHE_TAG_MASK,d0 # round start addr down mov L1_CACHE_BYTES-1,d2 add d2,d1 - and L1_CACHE_TAG_ADDRESS|L1_CACHE_TAG_ENTRY,d1 # round end addr up + and L1_CACHE_TAG_MASK,d1 # round end addr up #endif /* !CONFIG_MN10300_CACHE_WBACK */ sub d0,d1,d2 # calculate the total size diff --git a/arch/mn10300/mm/cache-inv-by-tag.S b/arch/mn10300/mm/cache-inv-by-tag.S index e9713b4..ccedce9 100644 --- a/arch/mn10300/mm/cache-inv-by-tag.S +++ b/arch/mn10300/mm/cache-inv-by-tag.S @@ -15,6 +15,7 @@ #include <asm/cache.h> #include <asm/irqflags.h> #include <asm/cacheflush.h> +#include "cache.inc" #define mn10300_local_dcache_inv_range_intr_interval \ +((1 << MN10300_DCACHE_INV_RANGE_INTR_LOG2_INTERVAL) - 1) @@ -70,43 +71,7 @@ mn10300_local_icache_inv: btst CHCTR_ICEN,d0 beq mn10300_local_icache_inv_end -#if defined(CONFIG_AM33_2) || defined(CONFIG_AM33_3) - LOCAL_CLI_SAVE(d1) - - # disable the icache - and ~CHCTR_ICEN,d0 - movhu d0,(a0) - - # and wait for it to calm down - setlb - movhu (a0),d0 - btst CHCTR_ICBUSY,d0 - lne - - # invalidate - or CHCTR_ICINV,d0 - movhu d0,(a0) - - # wait for the cache to finish - mov CHCTR,a0 - setlb - movhu (a0),d0 - btst CHCTR_ICBUSY,d0 - lne - - # and reenable it - and ~CHCTR_ICINV,d0 - or CHCTR_ICEN,d0 - movhu d0,(a0) - movhu (a0),d0 - - LOCAL_IRQ_RESTORE(d1) -#else /* CONFIG_AM33_2 || CONFIG_AM33_3 */ - # invalidate - or CHCTR_ICINV,d0 - movhu d0,(a0) - movhu (a0),d0 -#endif /* CONFIG_AM33_2 || CONFIG_AM33_3 */ + invalidate_icache 1 mn10300_local_icache_inv_end: ret [],0 @@ -128,43 +93,7 @@ mn10300_local_dcache_inv: btst CHCTR_DCEN,d0 beq mn10300_local_dcache_inv_end -#if defined(CONFIG_AM33_2) || defined(CONFIG_AM33_3) - LOCAL_CLI_SAVE(d1) - - # disable the dcache - and ~CHCTR_DCEN,d0 - movhu d0,(a0) - - # and wait for it to calm down - setlb - movhu (a0),d0 - btst CHCTR_DCBUSY,d0 - lne - - # invalidate - or CHCTR_DCINV,d0 - movhu d0,(a0) - - # wait for the cache to finish - mov CHCTR,a0 - setlb - movhu (a0),d0 - btst CHCTR_DCBUSY,d0 - lne - - # and reenable it - and ~CHCTR_DCINV,d0 - or CHCTR_DCEN,d0 - movhu d0,(a0) - movhu (a0),d0 - - LOCAL_IRQ_RESTORE(d1) -#else /* CONFIG_AM33_2 || CONFIG_AM33_3 */ - # invalidate - or CHCTR_DCINV,d0 - movhu d0,(a0) - movhu (a0),d0 -#endif /* CONFIG_AM33_2 || CONFIG_AM33_3 */ + invalidate_dcache 1 mn10300_local_dcache_inv_end: ret [],0 @@ -195,9 +124,9 @@ mn10300_local_dcache_inv_range: # and if they're not cacheline-aligned, we must flush any bits outside # the range that share cachelines with stuff inside the range #ifdef CONFIG_MN10300_CACHE_WBACK - btst ~(L1_CACHE_BYTES-1),d0 + btst ~L1_CACHE_TAG_MASK,d0 bne 1f - btst ~(L1_CACHE_BYTES-1),d1 + btst ~L1_CACHE_TAG_MASK,d1 beq 2f 1: bra mn10300_local_dcache_flush_inv_range @@ -212,11 +141,10 @@ mn10300_local_dcache_inv_range: beq mn10300_local_dcache_inv_range_end #ifndef CONFIG_MN10300_CACHE_WBACK - and L1_CACHE_TAG_ADDRESS|L1_CACHE_TAG_ENTRY,d0 # round start - # addr down + and L1_CACHE_TAG_MASK,d0 # round start addr down add L1_CACHE_BYTES,d1 # round end addr up - and L1_CACHE_TAG_ADDRESS|L1_CACHE_TAG_ENTRY,d1 + and L1_CACHE_TAG_MASK,d1 #endif /* !CONFIG_MN10300_CACHE_WBACK */ mov d0,a1 diff --git a/arch/mn10300/mm/cache.inc b/arch/mn10300/mm/cache.inc new file mode 100644 index 0000000..394a119 --- /dev/null +++ b/arch/mn10300/mm/cache.inc @@ -0,0 +1,133 @@ +/* MN10300 CPU core caching macros -*- asm -*- + * + * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved. + * Written by David Howells (dhowells@redhat.com) + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public Licence + * as published by the Free Software Foundation; either version + * 2 of the Licence, or (at your option) any later version. + */ + + +############################################################################### +# +# Invalidate the instruction cache. +# A0: Should hold CHCTR +# D0: Should have been read from CHCTR +# D1: Will be clobbered +# +# On some cores it is necessary to disable the icache whilst we do this. +# +############################################################################### + .macro invalidate_icache,disable_irq + +#if defined(CONFIG_AM33_2) || defined(CONFIG_AM33_3) + .if \disable_irq + # don't want an interrupt routine seeing a disabled cache + mov epsw,d1 + and ~EPSW_IE,epsw + or EPSW_NMID,epsw + nop + nop + .endif + + # disable the icache + and ~CHCTR_ICEN,d0 + movhu d0,(a0) + + # and wait for it to calm down + setlb + movhu (a0),d0 + btst CHCTR_ICBUSY,d0 + lne + + # invalidate + or CHCTR_ICINV,d0 + movhu d0,(a0) + + # wait for the cache to finish + setlb + movhu (a0),d0 + btst CHCTR_ICBUSY,d0 + lne + + # and reenable it + or CHCTR_ICEN,d0 + movhu d0,(a0) + movhu (a0),d0 + + .if \disable_irq + LOCAL_IRQ_RESTORE(d1) + .endif + +#else /* CONFIG_AM33_2 || CONFIG_AM33_3 */ + + # invalidate + or CHCTR_ICINV,d0 + movhu d0,(a0) + movhu (a0),d0 + +#endif /* CONFIG_AM33_2 || CONFIG_AM33_3 */ + .endm + +############################################################################### +# +# Invalidate the data cache. +# A0: Should hold CHCTR +# D0: Should have been read from CHCTR +# D1: Will be clobbered +# +# On some cores it is necessary to disable the dcache whilst we do this. +# +############################################################################### + .macro invalidate_dcache,disable_irq + +#if defined(CONFIG_AM33_2) || defined(CONFIG_AM33_3) + .if \disable_irq + # don't want an interrupt routine seeing a disabled cache + mov epsw,d1 + and ~EPSW_IE,epsw + or EPSW_NMID,epsw + nop + nop + .endif + + # disable the dcache + and ~CHCTR_DCEN,d0 + movhu d0,(a0) + + # and wait for it to calm down + setlb + movhu (a0),d0 + btst CHCTR_DCBUSY,d0 + lne + + # invalidate + or CHCTR_DCINV,d0 + movhu d0,(a0) + + # wait for the cache to finish + setlb + movhu (a0),d0 + btst CHCTR_DCBUSY,d0 + lne + + # and reenable it + or CHCTR_DCEN,d0 + movhu d0,(a0) + movhu (a0),d0 + + .if \disable_irq + LOCAL_IRQ_RESTORE(d1) + .endif + +#else /* CONFIG_AM33_2 || CONFIG_AM33_3 */ + + # invalidate + or CHCTR_DCINV,d0 + movhu d0,(a0) + movhu (a0),d0 + +#endif /* CONFIG_AM33_2 || CONFIG_AM33_3 */ + .endm diff --git a/arch/mn10300/mm/fault.c b/arch/mn10300/mm/fault.c index 59c3da4..0945409 100644 --- a/arch/mn10300/mm/fault.c +++ b/arch/mn10300/mm/fault.c @@ -28,8 +28,9 @@ #include <asm/uaccess.h> #include <asm/pgalloc.h> #include <asm/hardirq.h> -#include <asm/gdb-stub.h> #include <asm/cpu-regs.h> +#include <asm/debugger.h> +#include <asm/gdb-stub.h> /* * Unlock any spinlocks which will prevent us from getting the @@ -306,10 +307,8 @@ no_context: printk(" printing pc:\n"); printk(KERN_ALERT "%08lx\n", regs->pc); -#ifdef CONFIG_GDBSTUB - gdbstub_intercept( - regs, fault_code & 0x00010000 ? EXCEP_IAERROR : EXCEP_DAERROR); -#endif + debugger_intercept(fault_code & 0x00010000 ? EXCEP_IAERROR : EXCEP_DAERROR, + SIGSEGV, SEGV_ACCERR, regs); page = PTBR; page = ((unsigned long *) __va(page))[address >> 22]; diff --git a/arch/mn10300/proc-mn103e010/include/proc/cache.h b/arch/mn10300/proc-mn103e010/include/proc/cache.h index c152800..967d144 100644 --- a/arch/mn10300/proc-mn103e010/include/proc/cache.h +++ b/arch/mn10300/proc-mn103e010/include/proc/cache.h @@ -23,6 +23,7 @@ #define L1_CACHE_TAG_DIRTY 0x00000008 /* data cache tag dirty bit */ #define L1_CACHE_TAG_ENTRY 0x00000ff0 /* cache tag entry address mask */ #define L1_CACHE_TAG_ADDRESS 0xfffff000 /* cache tag line address mask */ +#define L1_CACHE_TAG_MASK +(L1_CACHE_TAG_ADDRESS|L1_CACHE_TAG_ENTRY) /* * specification of the interval between interrupt checking intervals whilst diff --git a/arch/mn10300/proc-mn2ws0050/include/proc/cache.h b/arch/mn10300/proc-mn2ws0050/include/proc/cache.h index cafd7b5..bcb5df2 100644 --- a/arch/mn10300/proc-mn2ws0050/include/proc/cache.h +++ b/arch/mn10300/proc-mn2ws0050/include/proc/cache.h @@ -29,6 +29,7 @@ #define L1_CACHE_TAG_DIRTY 0x00000008 /* data cache tag dirty bit */ #define L1_CACHE_TAG_ENTRY 0x00000fe0 /* cache tag entry address mask */ #define L1_CACHE_TAG_ADDRESS 0xfffff000 /* cache tag line address mask */ +#define L1_CACHE_TAG_MASK +(L1_CACHE_TAG_ADDRESS|L1_CACHE_TAG_ENTRY) /* * specification of the interval between interrupt checking intervals whilst diff --git a/arch/mn10300/unit-asb2364/include/unit/fpga-regs.h b/arch/mn10300/unit-asb2364/include/unit/fpga-regs.h index 7cf1205..33f100f 100644 --- a/arch/mn10300/unit-asb2364/include/unit/fpga-regs.h +++ b/arch/mn10300/unit-asb2364/include/unit/fpga-regs.h @@ -14,7 +14,7 @@ #define ASB2364_FPGA_REG_RESET_USB __SYSREG(0xa900130c, u16) #define ASB2364_FPGA_REG_RESET_AV __SYSREG(0xa9001310, u16) -#define ASB2364_FPGA_REG_IRQ(X) __SYSREG(0xa9001590+((X)*4), u16) +#define ASB2364_FPGA_REG_IRQ(X) __SYSREG(0xa9001510+((X)*4), u16) #define ASB2364_FPGA_REG_IRQ_LAN ASB2364_FPGA_REG_IRQ(0) #define ASB2364_FPGA_REG_IRQ_UART ASB2364_FPGA_REG_IRQ(1) #define ASB2364_FPGA_REG_IRQ_I2C ASB2364_FPGA_REG_IRQ(2) diff --git a/arch/mn10300/unit-asb2364/include/unit/serial.h b/arch/mn10300/unit-asb2364/include/unit/serial.h index 7f048bb..92f224a 100644 --- a/arch/mn10300/unit-asb2364/include/unit/serial.h +++ b/arch/mn10300/unit-asb2364/include/unit/serial.h @@ -59,18 +59,18 @@ static inline void __debug_to_serial(const char *p, int n) #define SERIAL_PORT_DFNS /* stolen by gdb-stub */ #if defined(CONFIG_GDBSTUB_ON_TTYS0) -#define GDBPORT_SERIAL_RX __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_RX * 4, u8) -#define GDBPORT_SERIAL_TX __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_TX * 4, u8) -#define GDBPORT_SERIAL_DLL __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_DLL * 4, u8) -#define GDBPORT_SERIAL_DLM __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_DLM * 4, u8) -#define GDBPORT_SERIAL_IER __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_IER * 4, u8) -#define GDBPORT_SERIAL_IIR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_IIR * 4, u8) -#define GDBPORT_SERIAL_FCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_FCR * 4, u8) -#define GDBPORT_SERIAL_LCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_LCR * 4, u8) -#define GDBPORT_SERIAL_MCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_MCR * 4, u8) -#define GDBPORT_SERIAL_LSR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_LSR * 4, u8) -#define GDBPORT_SERIAL_MSR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_MSR * 4, u8) -#define GDBPORT_SERIAL_SCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_SCR * 4, u8) +#define GDBPORT_SERIAL_RX __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_RX * 2, u8) +#define GDBPORT_SERIAL_TX __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_TX * 2, u8) +#define GDBPORT_SERIAL_DLL __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_DLL * 2, u8) +#define GDBPORT_SERIAL_DLM __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_DLM * 2, u8) +#define GDBPORT_SERIAL_IER __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_IER * 2, u8) +#define GDBPORT_SERIAL_IIR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_IIR * 2, u8) +#define GDBPORT_SERIAL_FCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_FCR * 2, u8) +#define GDBPORT_SERIAL_LCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_LCR * 2, u8) +#define GDBPORT_SERIAL_MCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_MCR * 2, u8) +#define GDBPORT_SERIAL_LSR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_LSR * 2, u8) +#define GDBPORT_SERIAL_MSR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_MSR * 2, u8) +#define GDBPORT_SERIAL_SCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_SCR * 2, u8) #define GDBPORT_SERIAL_IRQ SERIAL_IRQ #elif defined(CONFIG_GDBSTUB_ON_TTYS1) diff --git a/arch/mn10300/unit-asb2364/irq-fpga.c b/arch/mn10300/unit-asb2364/irq-fpga.c index fcf2975..ee84e62 100644 --- a/arch/mn10300/unit-asb2364/irq-fpga.c +++ b/arch/mn10300/unit-asb2364/irq-fpga.c @@ -17,38 +17,38 @@ /* * FPGA PIC operations */ -static void asb2364_fpga_mask(unsigned int irq) +static void asb2364_fpga_mask(struct irq_data *d) { - ASB2364_FPGA_REG_MASK(irq - NR_CPU_IRQS) = 0x0001; + ASB2364_FPGA_REG_MASK(d->irq - NR_CPU_IRQS) = 0x0001; SyncExBus(); } -static void asb2364_fpga_ack(unsigned int irq) +static void asb2364_fpga_ack(struct irq_data *d) { - ASB2364_FPGA_REG_IRQ(irq - NR_CPU_IRQS) = 0x0001; + ASB2364_FPGA_REG_IRQ(d->irq - NR_CPU_IRQS) = 0x0001; SyncExBus(); } -static void asb2364_fpga_mask_ack(unsigned int irq) +static void asb2364_fpga_mask_ack(struct irq_data *d) { - ASB2364_FPGA_REG_MASK(irq - NR_CPU_IRQS) = 0x0001; + ASB2364_FPGA_REG_MASK(d->irq - NR_CPU_IRQS) = 0x0001; SyncExBus(); - ASB2364_FPGA_REG_IRQ(irq - NR_CPU_IRQS) = 0x0001; + ASB2364_FPGA_REG_IRQ(d->irq - NR_CPU_IRQS) = 0x0001; SyncExBus(); } -static void asb2364_fpga_unmask(unsigned int irq) +static void asb2364_fpga_unmask(struct irq_data *d) { - ASB2364_FPGA_REG_MASK(irq - NR_CPU_IRQS) = 0x0000; + ASB2364_FPGA_REG_MASK(d->irq - NR_CPU_IRQS) = 0x0000; SyncExBus(); } static struct irq_chip asb2364_fpga_pic = { .name = "fpga", - .ack = asb2364_fpga_ack, - .mask = asb2364_fpga_mask, - .mask_ack = asb2364_fpga_mask_ack, - .unmask = asb2364_fpga_unmask, + .irq_ack = asb2364_fpga_ack, + .irq_mask = asb2364_fpga_mask, + .irq_mask_ack = asb2364_fpga_mask_ack, + .irq_unmask = asb2364_fpga_unmask, }; /* @@ -88,6 +88,17 @@ void __init irq_fpga_init(void) { int irq; + ASB2364_FPGA_REG_MASK_LAN = 0x0001; + SyncExBus(); + ASB2364_FPGA_REG_MASK_UART = 0x0001; + SyncExBus(); + ASB2364_FPGA_REG_MASK_I2C = 0x0001; + SyncExBus(); + ASB2364_FPGA_REG_MASK_USB = 0x0001; + SyncExBus(); + ASB2364_FPGA_REG_MASK_FPGA = 0x0001; + SyncExBus(); + for (irq = NR_CPU_IRQS; irq < NR_IRQS; irq++) set_irq_chip_and_handler(irq, &asb2364_fpga_pic, handle_level_irq); diff --git a/arch/mn10300/unit-asb2364/unit-init.c b/arch/mn10300/unit-asb2364/unit-init.c index 1144080..6359b41 100644 --- a/arch/mn10300/unit-asb2364/unit-init.c +++ b/arch/mn10300/unit-asb2364/unit-init.c @@ -20,13 +20,41 @@ #include <asm/processor.h> #include <asm/irq.h> #include <asm/intctl-regs.h> +#include <asm/serial-regs.h> #include <unit/fpga-regs.h> +#include <unit/serial.h> +#include <unit/smsc911x.h> + +#define TTYS0_SERIAL_IER __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_IER * 2, u8) +#define LAN_IRQ_CFG __SYSREG(SMSC911X_BASE + 0x54, u32) +#define LAN_INT_EN __SYSREG(SMSC911X_BASE + 0x5c, u32) /* * initialise some of the unit hardware before gdbstub is set up */ asmlinkage void __init unit_init(void) { + /* Make sure we aren't going to get unexpected interrupts */ + TTYS0_SERIAL_IER = 0; + SC0RXICR = 0; + SC0TXICR = 0; + SC1RXICR = 0; + SC1TXICR = 0; + SC2RXICR = 0; + SC2TXICR = 0; + + /* Attempt to reset the FPGA attached peripherals */ + ASB2364_FPGA_REG_RESET_LAN = 0x0000; + SyncExBus(); + ASB2364_FPGA_REG_RESET_UART = 0x0000; + SyncExBus(); + ASB2364_FPGA_REG_RESET_I2C = 0x0000; + SyncExBus(); + ASB2364_FPGA_REG_RESET_USB = 0x0000; + SyncExBus(); + ASB2364_FPGA_REG_RESET_AV = 0x0000; + SyncExBus(); + /* set up the external interrupts */ /* XIRQ[0]: NAND RXBY */ @@ -56,7 +84,23 @@ asmlinkage void __init unit_init(void) */ asmlinkage void __init unit_setup(void) { + /* Release the reset on the SMSC911X so that it is ready by the time we + * need it */ + ASB2364_FPGA_REG_RESET_LAN = 0x0001; + SyncExBus(); + ASB2364_FPGA_REG_RESET_UART = 0x0001; + SyncExBus(); + ASB2364_FPGA_REG_RESET_I2C = 0x0001; + SyncExBus(); + ASB2364_FPGA_REG_RESET_USB = 0x0001; + SyncExBus(); + ASB2364_FPGA_REG_RESET_AV = 0x0001; + SyncExBus(); + /* Make sure the ethernet chipset isn't going to give us an interrupt + * storm from stuff it was doing pre-reset */ + LAN_IRQ_CFG = 0; + LAN_INT_EN = 0; } /* diff --git a/arch/parisc/Kconfig b/arch/parisc/Kconfig index fed2946..9b1f427 100644 --- a/arch/parisc/Kconfig +++ b/arch/parisc/Kconfig @@ -15,6 +15,7 @@ config PARISC select HAVE_GENERIC_HARDIRQS select GENERIC_IRQ_PROBE select IRQ_PER_CPU + select GENERIC_HARDIRQS_NO_DEPRECATED help The PA-RISC microprocessor is designed by Hewlett-Packard and used @@ -51,6 +52,10 @@ config GENERIC_FIND_NEXT_BIT bool default y +config GENERIC_FIND_BIT_LE + bool + default y + config GENERIC_BUG bool default y diff --git a/arch/parisc/include/asm/bitops.h b/arch/parisc/include/asm/bitops.h index 7a6ea10..43c516f 100644 --- a/arch/parisc/include/asm/bitops.h +++ b/arch/parisc/include/asm/bitops.h @@ -222,7 +222,7 @@ static __inline__ int fls(int x) #ifdef __KERNEL__ -#include <asm-generic/bitops/ext2-non-atomic.h> +#include <asm-generic/bitops/le.h> /* '3' is bits per byte */ #define LE_BYTE_ADDR ((sizeof(unsigned long) - 1) << 3) @@ -234,6 +234,4 @@ static __inline__ int fls(int x) #endif /* __KERNEL__ */ -#include <asm-generic/bitops/minix-le.h> - #endif /* _PARISC_BITOPS_H */ diff --git a/arch/parisc/include/asm/cacheflush.h b/arch/parisc/include/asm/cacheflush.h index f388a85..d18328b 100644 --- a/arch/parisc/include/asm/cacheflush.h +++ b/arch/parisc/include/asm/cacheflush.h @@ -26,8 +26,6 @@ void flush_user_dcache_range_asm(unsigned long, unsigned long); void flush_kernel_dcache_range_asm(unsigned long, unsigned long); void flush_kernel_dcache_page_asm(void *); void flush_kernel_icache_page(void *); -void flush_user_dcache_page(unsigned long); -void flush_user_icache_page(unsigned long); void flush_user_dcache_range(unsigned long, unsigned long); void flush_user_icache_range(unsigned long, unsigned long); @@ -37,6 +35,13 @@ void flush_cache_all_local(void); void flush_cache_all(void); void flush_cache_mm(struct mm_struct *mm); +#define ARCH_HAS_FLUSH_KERNEL_DCACHE_PAGE +void flush_kernel_dcache_page_addr(void *addr); +static inline void flush_kernel_dcache_page(struct page *page) +{ + flush_kernel_dcache_page_addr(page_address(page)); +} + #define flush_kernel_dcache_range(start,size) \ flush_kernel_dcache_range_asm((start), (start)+(size)); /* vmap range flushes and invalidates. Architecturally, we don't need @@ -50,6 +55,16 @@ static inline void flush_kernel_vmap_range(void *vaddr, int size) } static inline void invalidate_kernel_vmap_range(void *vaddr, int size) { + unsigned long start = (unsigned long)vaddr; + void *cursor = vaddr; + + for ( ; cursor < vaddr + size; cursor += PAGE_SIZE) { + struct page *page = vmalloc_to_page(cursor); + + if (test_and_clear_bit(PG_dcache_dirty, &page->flags)) + flush_kernel_dcache_page(page); + } + flush_kernel_dcache_range_asm(start, start + size); } #define flush_cache_vmap(start, end) flush_cache_all() @@ -90,19 +105,15 @@ void flush_cache_page(struct vm_area_struct *vma, unsigned long vmaddr, unsigned void flush_cache_range(struct vm_area_struct *vma, unsigned long start, unsigned long end); +/* defined in pacache.S exported in cache.c used by flush_anon_page */ +void flush_dcache_page_asm(unsigned long phys_addr, unsigned long vaddr); + #define ARCH_HAS_FLUSH_ANON_PAGE static inline void flush_anon_page(struct vm_area_struct *vma, struct page *page, unsigned long vmaddr) { if (PageAnon(page)) - flush_user_dcache_page(vmaddr); -} - -#define ARCH_HAS_FLUSH_KERNEL_DCACHE_PAGE -void flush_kernel_dcache_page_addr(void *addr); -static inline void flush_kernel_dcache_page(struct page *page) -{ - flush_kernel_dcache_page_addr(page_address(page)); + flush_dcache_page_asm(page_to_phys(page), vmaddr); } #ifdef CONFIG_DEBUG_RODATA diff --git a/arch/parisc/include/asm/irq.h b/arch/parisc/include/asm/irq.h index c67dccf..1073599 100644 --- a/arch/parisc/include/asm/irq.h +++ b/arch/parisc/include/asm/irq.h @@ -32,15 +32,10 @@ static __inline__ int irq_canonicalize(int irq) } struct irq_chip; +struct irq_data; -/* - * Some useful "we don't have to do anything here" handlers. Should - * probably be provided by the generic code. - */ -void no_ack_irq(unsigned int irq); -void no_end_irq(unsigned int irq); -void cpu_ack_irq(unsigned int irq); -void cpu_eoi_irq(unsigned int irq); +void cpu_ack_irq(struct irq_data *d); +void cpu_eoi_irq(struct irq_data *d); extern int txn_alloc_irq(unsigned int nbits); extern int txn_claim_irq(int); @@ -49,7 +44,7 @@ extern unsigned long txn_alloc_addr(unsigned int); extern unsigned long txn_affinity_addr(unsigned int irq, int cpu); extern int cpu_claim_irq(unsigned int irq, struct irq_chip *, void *); -extern int cpu_check_affinity(unsigned int irq, const struct cpumask *dest); +extern int cpu_check_affinity(struct irq_data *d, const struct cpumask *dest); /* soft power switch support (power.c) */ extern struct tasklet_struct power_tasklet; diff --git a/arch/parisc/include/asm/pgtable.h b/arch/parisc/include/asm/pgtable.h index 6f1f65d..5d7b8ce 100644 --- a/arch/parisc/include/asm/pgtable.h +++ b/arch/parisc/include/asm/pgtable.h @@ -138,8 +138,7 @@ struct vm_area_struct; #define _PAGE_NO_CACHE_BIT 24 /* (0x080) Uncached Page (U bit) */ #define _PAGE_ACCESSED_BIT 23 /* (0x100) Software: Page Accessed */ #define _PAGE_PRESENT_BIT 22 /* (0x200) Software: translation valid */ -#define _PAGE_FLUSH_BIT 21 /* (0x400) Software: translation valid */ - /* for cache flushing only */ +/* bit 21 was formerly the FLUSH bit but is now unused */ #define _PAGE_USER_BIT 20 /* (0x800) Software: User accessible page */ /* N.B. The bits are defined in terms of a 32 bit word above, so the */ @@ -173,7 +172,6 @@ struct vm_area_struct; #define _PAGE_NO_CACHE (1 << xlate_pabit(_PAGE_NO_CACHE_BIT)) #define _PAGE_ACCESSED (1 << xlate_pabit(_PAGE_ACCESSED_BIT)) #define _PAGE_PRESENT (1 << xlate_pabit(_PAGE_PRESENT_BIT)) -#define _PAGE_FLUSH (1 << xlate_pabit(_PAGE_FLUSH_BIT)) #define _PAGE_USER (1 << xlate_pabit(_PAGE_USER_BIT)) #define _PAGE_FILE (1 << xlate_pabit(_PAGE_FILE_BIT)) @@ -213,7 +211,6 @@ struct vm_area_struct; #define PAGE_KERNEL_RO __pgprot(_PAGE_KERNEL & ~_PAGE_WRITE) #define PAGE_KERNEL_UNC __pgprot(_PAGE_KERNEL | _PAGE_NO_CACHE) #define PAGE_GATEWAY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED | _PAGE_GATEWAY| _PAGE_READ) -#define PAGE_FLUSH __pgprot(_PAGE_FLUSH) /* @@ -261,7 +258,7 @@ extern unsigned long *empty_zero_page; #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page)) -#define pte_none(x) ((pte_val(x) == 0) || (pte_val(x) & _PAGE_FLUSH)) +#define pte_none(x) (pte_val(x) == 0) #define pte_present(x) (pte_val(x) & _PAGE_PRESENT) #define pte_clear(mm,addr,xp) do { pte_val(*(xp)) = 0; } while (0) @@ -444,13 +441,10 @@ struct mm_struct; static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep) { pte_t old_pte; - pte_t pte; spin_lock(&pa_dbit_lock); - pte = old_pte = *ptep; - pte_val(pte) &= ~_PAGE_PRESENT; - pte_val(pte) |= _PAGE_FLUSH; - set_pte_at(mm,addr,ptep,pte); + old_pte = *ptep; + pte_clear(mm,addr,ptep); spin_unlock(&pa_dbit_lock); return old_pte; diff --git a/arch/parisc/include/asm/types.h b/arch/parisc/include/asm/types.h index 20135cc..80e415c 100644 --- a/arch/parisc/include/asm/types.h +++ b/arch/parisc/include/asm/types.h @@ -9,20 +9,4 @@ typedef unsigned short umode_t; #endif /* __ASSEMBLY__ */ -/* - * These aren't exported outside the kernel to avoid name space clashes - */ -#ifdef __KERNEL__ - -#ifndef __ASSEMBLY__ - -/* Dma addresses are 32-bits wide. */ - -typedef u32 dma_addr_t; -typedef u64 dma64_addr_t; - -#endif /* __ASSEMBLY__ */ - -#endif /* __KERNEL__ */ - #endif diff --git a/arch/parisc/kernel/cache.c b/arch/parisc/kernel/cache.c index d054f3d..3f11331 100644 --- a/arch/parisc/kernel/cache.c +++ b/arch/parisc/kernel/cache.c @@ -27,12 +27,17 @@ #include <asm/pgalloc.h> #include <asm/processor.h> #include <asm/sections.h> +#include <asm/shmparam.h> int split_tlb __read_mostly; int dcache_stride __read_mostly; int icache_stride __read_mostly; EXPORT_SYMBOL(dcache_stride); +void flush_dcache_page_asm(unsigned long phys_addr, unsigned long vaddr); +EXPORT_SYMBOL(flush_dcache_page_asm); +void flush_icache_page_asm(unsigned long phys_addr, unsigned long vaddr); + /* On some machines (e.g. ones with the Merced bus), there can be * only a single PxTLB broadcast at a time; this must be guaranteed @@ -259,81 +264,13 @@ void disable_sr_hashing(void) panic("SpaceID hashing is still on!\n"); } -/* Simple function to work out if we have an existing address translation - * for a user space vma. */ -static inline int translation_exists(struct vm_area_struct *vma, - unsigned long addr, unsigned long pfn) -{ - pgd_t *pgd = pgd_offset(vma->vm_mm, addr); - pmd_t *pmd; - pte_t pte; - - if(pgd_none(*pgd)) - return 0; - - pmd = pmd_offset(pgd, addr); - if(pmd_none(*pmd) || pmd_bad(*pmd)) - return 0; - - /* We cannot take the pte lock here: flush_cache_page is usually - * called with pte lock already held. Whereas flush_dcache_page - * takes flush_dcache_mmap_lock, which is lower in the hierarchy: - * the vma itself is secure, but the pte might come or go racily. - */ - pte = *pte_offset_map(pmd, addr); - /* But pte_unmap() does nothing on this architecture */ - - /* Filter out coincidental file entries and swap entries */ - if (!(pte_val(pte) & (_PAGE_FLUSH|_PAGE_PRESENT))) - return 0; - - return pte_pfn(pte) == pfn; -} - -/* Private function to flush a page from the cache of a non-current - * process. cr25 contains the Page Directory of the current user - * process; we're going to hijack both it and the user space %sr3 to - * temporarily make the non-current process current. We have to do - * this because cache flushing may cause a non-access tlb miss which - * the handlers have to fill in from the pgd of the non-current - * process. */ static inline void -flush_user_cache_page_non_current(struct vm_area_struct *vma, - unsigned long vmaddr) +__flush_cache_page(struct vm_area_struct *vma, unsigned long vmaddr, + unsigned long physaddr) { - /* save the current process space and pgd */ - unsigned long space = mfsp(3), pgd = mfctl(25); - - /* we don't mind taking interrupts since they may not - * do anything with user space, but we can't - * be preempted here */ - preempt_disable(); - - /* make us current */ - mtctl(__pa(vma->vm_mm->pgd), 25); - mtsp(vma->vm_mm->context, 3); - - flush_user_dcache_page(vmaddr); - if(vma->vm_flags & VM_EXEC) - flush_user_icache_page(vmaddr); - - /* put the old current process back */ - mtsp(space, 3); - mtctl(pgd, 25); - preempt_enable(); -} - - -static inline void -__flush_cache_page(struct vm_area_struct *vma, unsigned long vmaddr) -{ - if (likely(vma->vm_mm->context == mfsp(3))) { - flush_user_dcache_page(vmaddr); - if (vma->vm_flags & VM_EXEC) - flush_user_icache_page(vmaddr); - } else { - flush_user_cache_page_non_current(vma, vmaddr); - } + flush_dcache_page_asm(physaddr, vmaddr); + if (vma->vm_flags & VM_EXEC) + flush_icache_page_asm(physaddr, vmaddr); } void flush_dcache_page(struct page *page) @@ -342,10 +279,8 @@ void flush_dcache_page(struct page *page) struct vm_area_struct *mpnt; struct prio_tree_iter iter; unsigned long offset; - unsigned long addr; + unsigned long addr, old_addr = 0; pgoff_t pgoff; - unsigned long pfn = page_to_pfn(page); - if (mapping && !mapping_mapped(mapping)) { set_bit(PG_dcache_dirty, &page->flags); @@ -369,20 +304,11 @@ void flush_dcache_page(struct page *page) offset = (pgoff - mpnt->vm_pgoff) << PAGE_SHIFT; addr = mpnt->vm_start + offset; - /* Flush instructions produce non access tlb misses. - * On PA, we nullify these instructions rather than - * taking a page fault if the pte doesn't exist. - * This is just for speed. If the page translation - * isn't there, there's no point exciting the - * nadtlb handler into a nullification frenzy. - * - * Make sure we really have this page: the private - * mappings may cover this area but have COW'd this - * particular page. - */ - if (translation_exists(mpnt, addr, pfn)) { - __flush_cache_page(mpnt, addr); - break; + if (old_addr == 0 || (old_addr & (SHMLBA - 1)) != (addr & (SHMLBA - 1))) { + __flush_cache_page(mpnt, addr, page_to_phys(page)); + if (old_addr) + printk(KERN_ERR "INEQUIVALENT ALIASES 0x%lx and 0x%lx in file %s\n", old_addr, addr, mpnt->vm_file ? mpnt->vm_file->f_path.dentry->d_name.name : "(null)"); + old_addr = addr; } } flush_dcache_mmap_unlock(mapping); @@ -573,7 +499,6 @@ flush_cache_page(struct vm_area_struct *vma, unsigned long vmaddr, unsigned long { BUG_ON(!vma->vm_mm->context); - if (likely(translation_exists(vma, vmaddr, pfn))) - __flush_cache_page(vma, vmaddr); + __flush_cache_page(vma, vmaddr, page_to_phys(pfn_to_page(pfn))); } diff --git a/arch/parisc/kernel/entry.S b/arch/parisc/kernel/entry.S index 6337ade..e547709 100644 --- a/arch/parisc/kernel/entry.S +++ b/arch/parisc/kernel/entry.S @@ -225,22 +225,13 @@ #ifndef CONFIG_64BIT /* * naitlb miss interruption handler (parisc 1.1 - 32 bit) - * - * Note: naitlb misses will be treated - * as an ordinary itlb miss for now. - * However, note that naitlb misses - * have the faulting address in the - * IOR/ISR. */ .macro naitlb_11 code mfctl %isr,spc - b itlb_miss_11 + b naitlb_miss_11 mfctl %ior,va - /* FIXME: If user causes a naitlb miss, the priv level may not be in - * lower bits of va, where the itlb miss handler is expecting them - */ .align 32 .endm @@ -248,26 +239,17 @@ /* * naitlb miss interruption handler (parisc 2.0) - * - * Note: naitlb misses will be treated - * as an ordinary itlb miss for now. - * However, note that naitlb misses - * have the faulting address in the - * IOR/ISR. */ .macro naitlb_20 code mfctl %isr,spc #ifdef CONFIG_64BIT - b itlb_miss_20w + b naitlb_miss_20w #else - b itlb_miss_20 + b naitlb_miss_20 #endif mfctl %ior,va - /* FIXME: If user causes a naitlb miss, the priv level may not be in - * lower bits of va, where the itlb miss handler is expecting them - */ .align 32 .endm @@ -581,7 +563,24 @@ copy \va,\tmp1 depi 0,31,23,\tmp1 cmpb,COND(<>),n \tmp,\tmp1,\fault - ldi (_PAGE_DIRTY|_PAGE_WRITE|_PAGE_READ),\prot + mfctl %cr19,\tmp /* iir */ + /* get the opcode (first six bits) into \tmp */ + extrw,u \tmp,5,6,\tmp + /* + * Only setting the T bit prevents data cache movein + * Setting access rights to zero prevents instruction cache movein + * + * Note subtlety here: _PAGE_GATEWAY, _PAGE_EXEC and _PAGE_WRITE go + * to type field and _PAGE_READ goes to top bit of PL1 + */ + ldi (_PAGE_REFTRAP|_PAGE_READ|_PAGE_WRITE),\prot + /* + * so if the opcode is one (i.e. this is a memory management + * instruction) nullify the next load so \prot is only T. + * Otherwise this is a normal data operation + */ + cmpiclr,= 0x01,\tmp,%r0 + ldi (_PAGE_DIRTY|_PAGE_READ|_PAGE_WRITE),\prot depd,z \prot,8,7,\prot /* * OK, it is in the temp alias region, check whether "from" or "to". @@ -631,11 +630,7 @@ ENTRY(fault_vector_20) def 13 def 14 dtlb_20 15 -#if 0 naitlb_20 16 -#else - def 16 -#endif nadtlb_20 17 def 18 def 19 @@ -678,11 +673,7 @@ ENTRY(fault_vector_11) def 13 def 14 dtlb_11 15 -#if 0 naitlb_11 16 -#else - def 16 -#endif nadtlb_11 17 def 18 def 19 @@ -1203,7 +1194,7 @@ nadtlb_miss_20w: get_pgd spc,ptp space_check spc,t0,nadtlb_fault - L3_ptep ptp,pte,t0,va,nadtlb_check_flush_20w + L3_ptep ptp,pte,t0,va,nadtlb_check_alias_20w update_ptep ptp,pte,t0,t1 @@ -1214,16 +1205,8 @@ nadtlb_miss_20w: rfir nop -nadtlb_check_flush_20w: - bb,>=,n pte,_PAGE_FLUSH_BIT,nadtlb_emulate - - /* Insert a "flush only" translation */ - - depdi,z 7,7,3,prot - depdi 1,10,1,prot - - /* Drop prot bits from pte and convert to page addr for idtlbt */ - convert_for_tlb_insert20 pte +nadtlb_check_alias_20w: + do_alias spc,t0,t1,va,pte,prot,nadtlb_emulate idtlbt pte,prot @@ -1255,25 +1238,7 @@ dtlb_miss_11: nop dtlb_check_alias_11: - - /* Check to see if fault is in the temporary alias region */ - - cmpib,<>,n 0,spc,dtlb_fault /* forward */ - ldil L%(TMPALIAS_MAP_START),t0 - copy va,t1 - depwi 0,31,23,t1 - cmpb,<>,n t0,t1,dtlb_fault /* forward */ - ldi (_PAGE_DIRTY|_PAGE_WRITE|_PAGE_READ),prot - depw,z prot,8,7,prot - - /* - * OK, it is in the temp alias region, check whether "from" or "to". - * Check "subtle" note in pacache.S re: r23/r26. - */ - - extrw,u,= va,9,1,r0 - or,tr %r23,%r0,pte /* If "from" use "from" page */ - or %r26,%r0,pte /* else "to", use "to" page */ + do_alias spc,t0,t1,va,pte,prot,dtlb_fault idtlba pte,(va) idtlbp prot,(va) @@ -1286,7 +1251,7 @@ nadtlb_miss_11: space_check spc,t0,nadtlb_fault - L2_ptep ptp,pte,t0,va,nadtlb_check_flush_11 + L2_ptep ptp,pte,t0,va,nadtlb_check_alias_11 update_ptep ptp,pte,t0,t1 @@ -1304,26 +1269,11 @@ nadtlb_miss_11: rfir nop -nadtlb_check_flush_11: - bb,>=,n pte,_PAGE_FLUSH_BIT,nadtlb_emulate - - /* Insert a "flush only" translation */ - - zdepi 7,7,3,prot - depi 1,10,1,prot +nadtlb_check_alias_11: + do_alias spc,t0,t1,va,pte,prot,nadtlb_emulate - /* Get rid of prot bits and convert to page addr for idtlba */ - - depi 0,31,ASM_PFN_PTE_SHIFT,pte - SHRREG pte,(ASM_PFN_PTE_SHIFT-(31-26)),pte - - mfsp %sr1,t0 /* Save sr1 so we can use it in tlb inserts */ - mtsp spc,%sr1 - - idtlba pte,(%sr1,va) - idtlbp prot,(%sr1,va) - - mtsp t0, %sr1 /* Restore sr1 */ + idtlba pte,(va) + idtlbp prot,(va) rfir nop @@ -1359,7 +1309,7 @@ nadtlb_miss_20: space_check spc,t0,nadtlb_fault - L2_ptep ptp,pte,t0,va,nadtlb_check_flush_20 + L2_ptep ptp,pte,t0,va,nadtlb_check_alias_20 update_ptep ptp,pte,t0,t1 @@ -1372,21 +1322,14 @@ nadtlb_miss_20: rfir nop -nadtlb_check_flush_20: - bb,>=,n pte,_PAGE_FLUSH_BIT,nadtlb_emulate - - /* Insert a "flush only" translation */ - - depdi,z 7,7,3,prot - depdi 1,10,1,prot - - /* Drop prot bits from pte and convert to page addr for idtlbt */ - convert_for_tlb_insert20 pte +nadtlb_check_alias_20: + do_alias spc,t0,t1,va,pte,prot,nadtlb_emulate idtlbt pte,prot rfir nop + #endif nadtlb_emulate: @@ -1484,6 +1427,36 @@ itlb_miss_20w: rfir nop +naitlb_miss_20w: + + /* + * I miss is a little different, since we allow users to fault + * on the gateway page which is in the kernel address space. + */ + + space_adjust spc,va,t0 + get_pgd spc,ptp + space_check spc,t0,naitlb_fault + + L3_ptep ptp,pte,t0,va,naitlb_check_alias_20w + + update_ptep ptp,pte,t0,t1 + + make_insert_tlb spc,pte,prot + + iitlbt pte,prot + + rfir + nop + +naitlb_check_alias_20w: + do_alias spc,t0,t1,va,pte,prot,naitlb_fault + + iitlbt pte,prot + + rfir + nop + #else itlb_miss_11: @@ -1508,6 +1481,38 @@ itlb_miss_11: rfir nop +naitlb_miss_11: + get_pgd spc,ptp + + space_check spc,t0,naitlb_fault + + L2_ptep ptp,pte,t0,va,naitlb_check_alias_11 + + update_ptep ptp,pte,t0,t1 + + make_insert_tlb_11 spc,pte,prot + + mfsp %sr1,t0 /* Save sr1 so we can use it in tlb inserts */ + mtsp spc,%sr1 + + iitlba pte,(%sr1,va) + iitlbp prot,(%sr1,va) + + mtsp t0, %sr1 /* Restore sr1 */ + + rfir + nop + +naitlb_check_alias_11: + do_alias spc,t0,t1,va,pte,prot,itlb_fault + + iitlba pte,(%sr0, va) + iitlbp prot,(%sr0, va) + + rfir + nop + + itlb_miss_20: get_pgd spc,ptp @@ -1526,6 +1531,32 @@ itlb_miss_20: rfir nop +naitlb_miss_20: + get_pgd spc,ptp + + space_check spc,t0,naitlb_fault + + L2_ptep ptp,pte,t0,va,naitlb_check_alias_20 + + update_ptep ptp,pte,t0,t1 + + make_insert_tlb spc,pte,prot + + f_extend pte,t0 + + iitlbt pte,prot + + rfir + nop + +naitlb_check_alias_20: + do_alias spc,t0,t1,va,pte,prot,naitlb_fault + + iitlbt pte,prot + + rfir + nop + #endif #ifdef CONFIG_64BIT @@ -1662,6 +1693,10 @@ nadtlb_fault: b intr_save ldi 17,%r8 +naitlb_fault: + b intr_save + ldi 16,%r8 + dtlb_fault: b intr_save ldi 15,%r8 diff --git a/arch/parisc/kernel/irq.c b/arch/parisc/kernel/irq.c index d7d94b8..cb450e1 100644 --- a/arch/parisc/kernel/irq.c +++ b/arch/parisc/kernel/irq.c @@ -52,9 +52,9 @@ static volatile unsigned long cpu_eiem = 0; */ static DEFINE_PER_CPU(unsigned long, local_ack_eiem) = ~0UL; -static void cpu_mask_irq(unsigned int irq) +static void cpu_mask_irq(struct irq_data *d) { - unsigned long eirr_bit = EIEM_MASK(irq); + unsigned long eirr_bit = EIEM_MASK(d->irq); cpu_eiem &= ~eirr_bit; /* Do nothing on the other CPUs. If they get this interrupt, @@ -63,7 +63,7 @@ static void cpu_mask_irq(unsigned int irq) * then gets disabled */ } -static void cpu_unmask_irq(unsigned int irq) +static void __cpu_unmask_irq(unsigned int irq) { unsigned long eirr_bit = EIEM_MASK(irq); @@ -75,9 +75,14 @@ static void cpu_unmask_irq(unsigned int irq) smp_send_all_nop(); } -void cpu_ack_irq(unsigned int irq) +static void cpu_unmask_irq(struct irq_data *d) +{ + __cpu_unmask_irq(d->irq); +} + +void cpu_ack_irq(struct irq_data *d) { - unsigned long mask = EIEM_MASK(irq); + unsigned long mask = EIEM_MASK(d->irq); int cpu = smp_processor_id(); /* Clear in EIEM so we can no longer process */ @@ -90,9 +95,9 @@ void cpu_ack_irq(unsigned int irq) mtctl(mask, 23); } -void cpu_eoi_irq(unsigned int irq) +void cpu_eoi_irq(struct irq_data *d) { - unsigned long mask = EIEM_MASK(irq); + unsigned long mask = EIEM_MASK(d->irq); int cpu = smp_processor_id(); /* set it in the eiems---it's no longer in process */ @@ -103,15 +108,16 @@ void cpu_eoi_irq(unsigned int irq) } #ifdef CONFIG_SMP -int cpu_check_affinity(unsigned int irq, const struct cpumask *dest) +int cpu_check_affinity(struct irq_data *d, const struct cpumask *dest) { int cpu_dest; /* timer and ipi have to always be received on all CPUs */ - if (CHECK_IRQ_PER_CPU(irq)) { + if (CHECK_IRQ_PER_CPU(irq_to_desc(d->irq)->status)) { /* Bad linux design decision. The mask has already - * been set; we must reset it */ - cpumask_setall(irq_desc[irq].affinity); + * been set; we must reset it. Will fix - tglx + */ + cpumask_setall(d->affinity); return -EINVAL; } @@ -121,33 +127,34 @@ int cpu_check_affinity(unsigned int irq, const struct cpumask *dest) return cpu_dest; } -static int cpu_set_affinity_irq(unsigned int irq, const struct cpumask *dest) +static int cpu_set_affinity_irq(struct irq_data *d, const struct cpumask *dest, + bool force) { int cpu_dest; - cpu_dest = cpu_check_affinity(irq, dest); + cpu_dest = cpu_check_affinity(d, dest); if (cpu_dest < 0) return -1; - cpumask_copy(irq_desc[irq].affinity, dest); + cpumask_copy(d->affinity, dest); return 0; } #endif static struct irq_chip cpu_interrupt_type = { - .name = "CPU", - .mask = cpu_mask_irq, - .unmask = cpu_unmask_irq, - .ack = cpu_ack_irq, - .eoi = cpu_eoi_irq, + .name = "CPU", + .irq_mask = cpu_mask_irq, + .irq_unmask = cpu_unmask_irq, + .irq_ack = cpu_ack_irq, + .irq_eoi = cpu_eoi_irq, #ifdef CONFIG_SMP - .set_affinity = cpu_set_affinity_irq, + .irq_set_affinity = cpu_set_affinity_irq, #endif /* XXX: Needs to be written. We managed without it so far, but * we really ought to write it. */ - .retrigger = NULL, + .irq_retrigger = NULL, }; int show_interrupts(struct seq_file *p, void *v) @@ -181,7 +188,7 @@ int show_interrupts(struct seq_file *p, void *v) seq_printf(p, "%10u ", kstat_irqs(i)); #endif - seq_printf(p, " %14s", irq_desc[i].chip->name); + seq_printf(p, " %14s", irq_desc[i].irq_data.chip->name); #ifndef PARISC_IRQ_CR16_COUNTS seq_printf(p, " %s", action->name); @@ -233,14 +240,14 @@ int cpu_claim_irq(unsigned int irq, struct irq_chip *type, void *data) { if (irq_desc[irq].action) return -EBUSY; - if (irq_desc[irq].chip != &cpu_interrupt_type) + if (get_irq_chip(irq) != &cpu_interrupt_type) return -EBUSY; /* for iosapic interrupts */ if (type) { set_irq_chip_and_handler(irq, type, handle_percpu_irq); set_irq_chip_data(irq, data); - cpu_unmask_irq(irq); + __cpu_unmask_irq(irq); } return 0; } @@ -289,7 +296,8 @@ int txn_alloc_irq(unsigned int bits_wide) unsigned long txn_affinity_addr(unsigned int irq, int cpu) { #ifdef CONFIG_SMP - cpumask_copy(irq_desc[irq].affinity, cpumask_of(cpu)); + struct irq_data *d = irq_get_irq_data(irq); + cpumask_copy(d->affinity, cpumask_of(cpu)); #endif return per_cpu(cpu_data, cpu).txn_addr; @@ -333,6 +341,7 @@ void do_cpu_irq_mask(struct pt_regs *regs) unsigned long eirr_val; int irq, cpu = smp_processor_id(); #ifdef CONFIG_SMP + struct irq_desc *desc; cpumask_t dest; #endif @@ -346,8 +355,9 @@ void do_cpu_irq_mask(struct pt_regs *regs) irq = eirr_to_irq(eirr_val); #ifdef CONFIG_SMP - cpumask_copy(&dest, irq_desc[irq].affinity); - if (CHECK_IRQ_PER_CPU(irq_desc[irq].status) && + desc = irq_to_desc(irq); + cpumask_copy(&dest, desc->irq_data.affinity); + if (CHECK_IRQ_PER_CPU(desc->status) && !cpu_isset(smp_processor_id(), dest)) { int cpu = first_cpu(dest); diff --git a/arch/parisc/kernel/pacache.S b/arch/parisc/kernel/pacache.S index 09b77b2..a858236 100644 --- a/arch/parisc/kernel/pacache.S +++ b/arch/parisc/kernel/pacache.S @@ -608,93 +608,131 @@ ENTRY(__clear_user_page_asm) .procend ENDPROC(__clear_user_page_asm) -ENTRY(flush_kernel_dcache_page_asm) +ENTRY(flush_dcache_page_asm) .proc .callinfo NO_CALLS .entry + ldil L%(TMPALIAS_MAP_START), %r28 +#ifdef CONFIG_64BIT +#if (TMPALIAS_MAP_START >= 0x80000000) + depdi 0, 31,32, %r28 /* clear any sign extension */ + /* FIXME: page size dependend */ +#endif + extrd,u %r26, 56,32, %r26 /* convert phys addr to tlb insert format */ + depd %r25, 63,22, %r28 /* Form aliased virtual address 'to' */ + depdi 0, 63,12, %r28 /* Clear any offset bits */ +#else + extrw,u %r26, 24,25, %r26 /* convert phys addr to tlb insert format */ + depw %r25, 31,22, %r28 /* Form aliased virtual address 'to' */ + depwi 0, 31,12, %r28 /* Clear any offset bits */ +#endif + + /* Purge any old translation */ + + pdtlb 0(%r28) + ldil L%dcache_stride, %r1 - ldw R%dcache_stride(%r1), %r23 + ldw R%dcache_stride(%r1), %r1 #ifdef CONFIG_64BIT depdi,z 1, 63-PAGE_SHIFT,1, %r25 #else depwi,z 1, 31-PAGE_SHIFT,1, %r25 #endif - add %r26, %r25, %r25 - sub %r25, %r23, %r25 - - -1: fdc,m %r23(%r26) - fdc,m %r23(%r26) - fdc,m %r23(%r26) - fdc,m %r23(%r26) - fdc,m %r23(%r26) - fdc,m %r23(%r26) - fdc,m %r23(%r26) - fdc,m %r23(%r26) - fdc,m %r23(%r26) - fdc,m %r23(%r26) - fdc,m %r23(%r26) - fdc,m %r23(%r26) - fdc,m %r23(%r26) - fdc,m %r23(%r26) - fdc,m %r23(%r26) - cmpb,COND(<<) %r26, %r25,1b - fdc,m %r23(%r26) + add %r28, %r25, %r25 + sub %r25, %r1, %r25 + + +1: fdc,m %r1(%r28) + fdc,m %r1(%r28) + fdc,m %r1(%r28) + fdc,m %r1(%r28) + fdc,m %r1(%r28) + fdc,m %r1(%r28) + fdc,m %r1(%r28) + fdc,m %r1(%r28) + fdc,m %r1(%r28) + fdc,m %r1(%r28) + fdc,m %r1(%r28) + fdc,m %r1(%r28) + fdc,m %r1(%r28) + fdc,m %r1(%r28) + fdc,m %r1(%r28) + cmpb,COND(<<) %r28, %r25,1b + fdc,m %r1(%r28) sync bv %r0(%r2) - nop + pdtlb (%r25) .exit .procend -ENDPROC(flush_kernel_dcache_page_asm) - -ENTRY(flush_user_dcache_page) +ENDPROC(flush_dcache_page_asm) + +ENTRY(flush_icache_page_asm) .proc .callinfo NO_CALLS .entry - ldil L%dcache_stride, %r1 - ldw R%dcache_stride(%r1), %r23 - + ldil L%(TMPALIAS_MAP_START), %r28 #ifdef CONFIG_64BIT - depdi,z 1,63-PAGE_SHIFT,1, %r25 +#if (TMPALIAS_MAP_START >= 0x80000000) + depdi 0, 31,32, %r28 /* clear any sign extension */ + /* FIXME: page size dependend */ +#endif + extrd,u %r26, 56,32, %r26 /* convert phys addr to tlb insert format */ + depd %r25, 63,22, %r28 /* Form aliased virtual address 'to' */ + depdi 0, 63,12, %r28 /* Clear any offset bits */ #else - depwi,z 1,31-PAGE_SHIFT,1, %r25 + extrw,u %r26, 24,25, %r26 /* convert phys addr to tlb insert format */ + depw %r25, 31,22, %r28 /* Form aliased virtual address 'to' */ + depwi 0, 31,12, %r28 /* Clear any offset bits */ #endif - add %r26, %r25, %r25 - sub %r25, %r23, %r25 + /* Purge any old translation */ -1: fdc,m %r23(%sr3, %r26) - fdc,m %r23(%sr3, %r26) - fdc,m %r23(%sr3, %r26) - fdc,m %r23(%sr3, %r26) - fdc,m %r23(%sr3, %r26) - fdc,m %r23(%sr3, %r26) - fdc,m %r23(%sr3, %r26) - fdc,m %r23(%sr3, %r26) - fdc,m %r23(%sr3, %r26) - fdc,m %r23(%sr3, %r26) - fdc,m %r23(%sr3, %r26) - fdc,m %r23(%sr3, %r26) - fdc,m %r23(%sr3, %r26) - fdc,m %r23(%sr3, %r26) - fdc,m %r23(%sr3, %r26) - cmpb,COND(<<) %r26, %r25,1b - fdc,m %r23(%sr3, %r26) + pitlb (%sr0,%r28) + + ldil L%icache_stride, %r1 + ldw R%icache_stride(%r1), %r1 + +#ifdef CONFIG_64BIT + depdi,z 1, 63-PAGE_SHIFT,1, %r25 +#else + depwi,z 1, 31-PAGE_SHIFT,1, %r25 +#endif + add %r28, %r25, %r25 + sub %r25, %r1, %r25 + + +1: fic,m %r1(%r28) + fic,m %r1(%r28) + fic,m %r1(%r28) + fic,m %r1(%r28) + fic,m %r1(%r28) + fic,m %r1(%r28) + fic,m %r1(%r28) + fic,m %r1(%r28) + fic,m %r1(%r28) + fic,m %r1(%r28) + fic,m %r1(%r28) + fic,m %r1(%r28) + fic,m %r1(%r28) + fic,m %r1(%r28) + fic,m %r1(%r28) + cmpb,COND(<<) %r28, %r25,1b + fic,m %r1(%r28) sync bv %r0(%r2) - nop + pitlb (%sr0,%r25) .exit .procend -ENDPROC(flush_user_dcache_page) +ENDPROC(flush_icache_page_asm) -ENTRY(flush_user_icache_page) +ENTRY(flush_kernel_dcache_page_asm) .proc .callinfo NO_CALLS .entry @@ -711,23 +749,23 @@ ENTRY(flush_user_icache_page) sub %r25, %r23, %r25 -1: fic,m %r23(%sr3, %r26) - fic,m %r23(%sr3, %r26) - fic,m %r23(%sr3, %r26) - fic,m %r23(%sr3, %r26) - fic,m %r23(%sr3, %r26) - fic,m %r23(%sr3, %r26) - fic,m %r23(%sr3, %r26) - fic,m %r23(%sr3, %r26) - fic,m %r23(%sr3, %r26) - fic,m %r23(%sr3, %r26) - fic,m %r23(%sr3, %r26) - fic,m %r23(%sr3, %r26) - fic,m %r23(%sr3, %r26) - fic,m %r23(%sr3, %r26) - fic,m %r23(%sr3, %r26) +1: fdc,m %r23(%r26) + fdc,m %r23(%r26) + fdc,m %r23(%r26) + fdc,m %r23(%r26) + fdc,m %r23(%r26) + fdc,m %r23(%r26) + fdc,m %r23(%r26) + fdc,m %r23(%r26) + fdc,m %r23(%r26) + fdc,m %r23(%r26) + fdc,m %r23(%r26) + fdc,m %r23(%r26) + fdc,m %r23(%r26) + fdc,m %r23(%r26) + fdc,m %r23(%r26) cmpb,COND(<<) %r26, %r25,1b - fic,m %r23(%sr3, %r26) + fdc,m %r23(%r26) sync bv %r0(%r2) @@ -735,8 +773,7 @@ ENTRY(flush_user_icache_page) .exit .procend -ENDPROC(flush_user_icache_page) - +ENDPROC(flush_kernel_dcache_page_asm) ENTRY(purge_kernel_dcache_page) .proc @@ -780,69 +817,6 @@ ENTRY(purge_kernel_dcache_page) .procend ENDPROC(purge_kernel_dcache_page) -#if 0 - /* Currently not used, but it still is a possible alternate - * solution. - */ - -ENTRY(flush_alias_page) - .proc - .callinfo NO_CALLS - .entry - - tophys_r1 %r26 - - ldil L%(TMPALIAS_MAP_START), %r28 -#ifdef CONFIG_64BIT - extrd,u %r26, 56,32, %r26 /* convert phys addr to tlb insert format */ - depd %r25, 63,22, %r28 /* Form aliased virtual address 'to' */ - depdi 0, 63,12, %r28 /* Clear any offset bits */ -#else - extrw,u %r26, 24,25, %r26 /* convert phys addr to tlb insert format */ - depw %r25, 31,22, %r28 /* Form aliased virtual address 'to' */ - depwi 0, 31,12, %r28 /* Clear any offset bits */ -#endif - - /* Purge any old translation */ - - pdtlb 0(%r28) - - ldil L%dcache_stride, %r1 - ldw R%dcache_stride(%r1), %r23 - -#ifdef CONFIG_64BIT - depdi,z 1, 63-PAGE_SHIFT,1, %r29 -#else - depwi,z 1, 31-PAGE_SHIFT,1, %r29 -#endif - add %r28, %r29, %r29 - sub %r29, %r23, %r29 - -1: fdc,m %r23(%r28) - fdc,m %r23(%r28) - fdc,m %r23(%r28) - fdc,m %r23(%r28) - fdc,m %r23(%r28) - fdc,m %r23(%r28) - fdc,m %r23(%r28) - fdc,m %r23(%r28) - fdc,m %r23(%r28) - fdc,m %r23(%r28) - fdc,m %r23(%r28) - fdc,m %r23(%r28) - fdc,m %r23(%r28) - fdc,m %r23(%r28) - fdc,m %r23(%r28) - cmpb,COND(<<) %r28, %r29, 1b - fdc,m %r23(%r28) - - sync - bv %r0(%r2) - nop - .exit - - .procend -#endif .export flush_user_dcache_range_asm @@ -865,7 +839,6 @@ flush_user_dcache_range_asm: .exit .procend -ENDPROC(flush_alias_page) ENTRY(flush_kernel_dcache_range_asm) .proc diff --git a/arch/parisc/mm/init.c b/arch/parisc/mm/init.c index f4f4d70..b7ed8d7 100644 --- a/arch/parisc/mm/init.c +++ b/arch/parisc/mm/init.c @@ -544,7 +544,7 @@ void __init mem_init(void) unsigned long *empty_zero_page __read_mostly; EXPORT_SYMBOL(empty_zero_page); -void show_mem(void) +void show_mem(unsigned int filter) { int i,free = 0,total = 0,reserved = 0; int shared = 0, cached = 0; diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig index 71ba047..3584e4d 100644 --- a/arch/powerpc/Kconfig +++ b/arch/powerpc/Kconfig @@ -95,6 +95,10 @@ config GENERIC_FIND_NEXT_BIT bool default y +config GENERIC_FIND_BIT_LE + bool + default y + config GENERIC_GPIO bool help @@ -768,11 +772,19 @@ config HAS_RAPIDIO config RAPIDIO bool "RapidIO support" - depends on HAS_RAPIDIO + depends on HAS_RAPIDIO || PCI help If you say Y here, the kernel will include drivers and infrastructure code to support RapidIO interconnect devices. +config FSL_RIO + bool "Freescale Embedded SRIO Controller support" + depends on RAPIDIO && HAS_RAPIDIO + default "n" + ---help--- + Include support for RapidIO controller on Freescale embedded + processors (MPC8548, MPC8641, etc). + source "drivers/rapidio/Kconfig" endmenu diff --git a/arch/powerpc/include/asm/bitops.h b/arch/powerpc/include/asm/bitops.h index 8a7e9314..2e56187 100644 --- a/arch/powerpc/include/asm/bitops.h +++ b/arch/powerpc/include/asm/bitops.h @@ -281,68 +281,56 @@ unsigned long __arch_hweight64(__u64 w); /* Little-endian versions */ -static __inline__ int test_le_bit(unsigned long nr, - __const__ unsigned long *addr) +static __inline__ int test_bit_le(unsigned long nr, + __const__ void *addr) { __const__ unsigned char *tmp = (__const__ unsigned char *) addr; return (tmp[nr >> 3] >> (nr & 7)) & 1; } -#define __set_le_bit(nr, addr) \ - __set_bit((nr) ^ BITOP_LE_SWIZZLE, (addr)) -#define __clear_le_bit(nr, addr) \ - __clear_bit((nr) ^ BITOP_LE_SWIZZLE, (addr)) +static inline void __set_bit_le(int nr, void *addr) +{ + __set_bit(nr ^ BITOP_LE_SWIZZLE, addr); +} + +static inline void __clear_bit_le(int nr, void *addr) +{ + __clear_bit(nr ^ BITOP_LE_SWIZZLE, addr); +} + +static inline int test_and_set_bit_le(int nr, void *addr) +{ + return test_and_set_bit(nr ^ BITOP_LE_SWIZZLE, addr); +} -#define test_and_set_le_bit(nr, addr) \ - test_and_set_bit((nr) ^ BITOP_LE_SWIZZLE, (addr)) -#define test_and_clear_le_bit(nr, addr) \ - test_and_clear_bit((nr) ^ BITOP_LE_SWIZZLE, (addr)) +static inline int test_and_clear_bit_le(int nr, void *addr) +{ + return test_and_clear_bit(nr ^ BITOP_LE_SWIZZLE, addr); +} + +static inline int __test_and_set_bit_le(int nr, void *addr) +{ + return __test_and_set_bit(nr ^ BITOP_LE_SWIZZLE, addr); +} -#define __test_and_set_le_bit(nr, addr) \ - __test_and_set_bit((nr) ^ BITOP_LE_SWIZZLE, (addr)) -#define __test_and_clear_le_bit(nr, addr) \ - __test_and_clear_bit((nr) ^ BITOP_LE_SWIZZLE, (addr)) +static inline int __test_and_clear_bit_le(int nr, void *addr) +{ + return __test_and_clear_bit(nr ^ BITOP_LE_SWIZZLE, addr); +} -#define find_first_zero_le_bit(addr, size) generic_find_next_zero_le_bit((addr), (size), 0) -unsigned long generic_find_next_zero_le_bit(const unsigned long *addr, +#define find_first_zero_bit_le(addr, size) \ + find_next_zero_bit_le((addr), (size), 0) +unsigned long find_next_zero_bit_le(const void *addr, unsigned long size, unsigned long offset); -unsigned long generic_find_next_le_bit(const unsigned long *addr, +unsigned long find_next_bit_le(const void *addr, unsigned long size, unsigned long offset); /* Bitmap functions for the ext2 filesystem */ -#define ext2_set_bit(nr,addr) \ - __test_and_set_le_bit((nr), (unsigned long*)addr) -#define ext2_clear_bit(nr, addr) \ - __test_and_clear_le_bit((nr), (unsigned long*)addr) - #define ext2_set_bit_atomic(lock, nr, addr) \ - test_and_set_le_bit((nr), (unsigned long*)addr) + test_and_set_bit_le((nr), (unsigned long*)addr) #define ext2_clear_bit_atomic(lock, nr, addr) \ - test_and_clear_le_bit((nr), (unsigned long*)addr) - -#define ext2_test_bit(nr, addr) test_le_bit((nr),(unsigned long*)addr) - -#define ext2_find_first_zero_bit(addr, size) \ - find_first_zero_le_bit((unsigned long*)addr, size) -#define ext2_find_next_zero_bit(addr, size, off) \ - generic_find_next_zero_le_bit((unsigned long*)addr, size, off) - -#define ext2_find_next_bit(addr, size, off) \ - generic_find_next_le_bit((unsigned long *)addr, size, off) -/* Bitmap functions for the minix filesystem. */ - -#define minix_test_and_set_bit(nr,addr) \ - __test_and_set_le_bit(nr, (unsigned long *)addr) -#define minix_set_bit(nr,addr) \ - __set_le_bit(nr, (unsigned long *)addr) -#define minix_test_and_clear_bit(nr,addr) \ - __test_and_clear_le_bit(nr, (unsigned long *)addr) -#define minix_test_bit(nr,addr) \ - test_le_bit(nr, (unsigned long *)addr) - -#define minix_find_first_zero_bit(addr,size) \ - find_first_zero_le_bit((unsigned long *)addr, size) + test_and_clear_bit_le((nr), (unsigned long*)addr) #include <asm-generic/bitops/sched.h> diff --git a/arch/powerpc/include/asm/mpic.h b/arch/powerpc/include/asm/mpic.h index 946ec49..7005ee0 100644 --- a/arch/powerpc/include/asm/mpic.h +++ b/arch/powerpc/include/asm/mpic.h @@ -367,6 +367,10 @@ struct mpic #define MPIC_SINGLE_DEST_CPU 0x00001000 /* Enable CoreInt delivery of interrupts */ #define MPIC_ENABLE_COREINT 0x00002000 +/* Disable resetting of the MPIC. + * NOTE: This flag trumps MPIC_WANTS_RESET. + */ +#define MPIC_NO_RESET 0x00004000 /* MPIC HW modification ID */ #define MPIC_REGSET_MASK 0xf0000000 diff --git a/arch/powerpc/include/asm/ptrace.h b/arch/powerpc/include/asm/ptrace.h index 0175a67..48223f9 100644 --- a/arch/powerpc/include/asm/ptrace.h +++ b/arch/powerpc/include/asm/ptrace.h @@ -125,8 +125,10 @@ extern int ptrace_put_reg(struct task_struct *task, int regno, #endif /* ! __powerpc64__ */ #define TRAP(regs) ((regs)->trap & ~0xF) #ifdef __powerpc64__ +#define NV_REG_POISON 0xdeadbeefdeadbeefUL #define CHECK_FULL_REGS(regs) BUG_ON(regs->trap & 1) #else +#define NV_REG_POISON 0xdeadbeef #define CHECK_FULL_REGS(regs) \ do { \ if ((regs)->trap & 1) \ diff --git a/arch/powerpc/include/asm/thread_info.h b/arch/powerpc/include/asm/thread_info.h index 65eb859..d8529ef 100644 --- a/arch/powerpc/include/asm/thread_info.h +++ b/arch/powerpc/include/asm/thread_info.h @@ -72,7 +72,7 @@ struct thread_info { #define __HAVE_ARCH_THREAD_INFO_ALLOCATOR -extern struct thread_info *alloc_thread_info(struct task_struct *tsk); +extern struct thread_info *alloc_thread_info_node(struct task_struct *tsk, int node); extern void free_thread_info(struct thread_info *ti); #endif /* THREAD_SHIFT < PAGE_SHIFT */ diff --git a/arch/powerpc/include/asm/types.h b/arch/powerpc/include/asm/types.h index a5aea0c..8947b98 100644 --- a/arch/powerpc/include/asm/types.h +++ b/arch/powerpc/include/asm/types.h @@ -44,13 +44,6 @@ typedef struct { typedef __vector128 vector128; -#if defined(__powerpc64__) || defined(CONFIG_PHYS_64BIT) -typedef u64 dma_addr_t; -#else -typedef u32 dma_addr_t; -#endif -typedef u64 dma64_addr_t; - typedef struct { unsigned long entry; unsigned long toc; diff --git a/arch/powerpc/kernel/cpu_setup_fsl_booke.S b/arch/powerpc/kernel/cpu_setup_fsl_booke.S index 5c518ad..9136111 100644 --- a/arch/powerpc/kernel/cpu_setup_fsl_booke.S +++ b/arch/powerpc/kernel/cpu_setup_fsl_booke.S @@ -64,7 +64,7 @@ _GLOBAL(__setup_cpu_e500v2) bl __e500_icache_setup bl __e500_dcache_setup bl __setup_e500_ivors -#ifdef CONFIG_RAPIDIO +#ifdef CONFIG_FSL_RIO /* Ensure that RFXE is set */ mfspr r3,SPRN_HID1 oris r3,r3,HID1_RFXE@h diff --git a/arch/powerpc/kernel/crash_dump.c b/arch/powerpc/kernel/crash_dump.c index 0a2af50..424afb6 100644 --- a/arch/powerpc/kernel/crash_dump.c +++ b/arch/powerpc/kernel/crash_dump.c @@ -28,9 +28,6 @@ #define DBG(fmt...) #endif -/* Stores the physical address of elf header of crash image. */ -unsigned long long elfcorehdr_addr = ELFCORE_ADDR_MAX; - #ifndef CONFIG_RELOCATABLE void __init reserve_kdump_trampoline(void) { @@ -72,20 +69,6 @@ void __init setup_kdump_trampoline(void) } #endif /* CONFIG_RELOCATABLE */ -/* - * Note: elfcorehdr_addr is not just limited to vmcore. It is also used by - * is_kdump_kernel() to determine if we are booting after a panic. Hence - * ifdef it under CONFIG_CRASH_DUMP and not CONFIG_PROC_VMCORE. - */ -static int __init parse_elfcorehdr(char *p) -{ - if (p) - elfcorehdr_addr = memparse(p, &p); - - return 1; -} -__setup("elfcorehdr=", parse_elfcorehdr); - static int __init parse_savemaxmem(char *p) { if (p) diff --git a/arch/powerpc/kernel/pci_dn.c b/arch/powerpc/kernel/pci_dn.c index 2985268..d225d99 100644 --- a/arch/powerpc/kernel/pci_dn.c +++ b/arch/powerpc/kernel/pci_dn.c @@ -176,11 +176,14 @@ static void *is_devfn_node(struct device_node *dn, void *data) */ struct device_node *fetch_dev_dn(struct pci_dev *dev) { - struct device_node *orig_dn = dev->dev.of_node; + struct pci_controller *phb = dev->sysdata; struct device_node *dn; unsigned long searchval = (dev->bus->number << 8) | dev->devfn; - dn = traverse_pci_devices(orig_dn, is_devfn_node, (void *)searchval); + if (WARN_ON(!phb)) + return NULL; + + dn = traverse_pci_devices(phb->dn, is_devfn_node, (void *)searchval); if (dn) dev->dev.of_node = dn; return dn; diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c index 8303a6c..f74f355 100644 --- a/arch/powerpc/kernel/process.c +++ b/arch/powerpc/kernel/process.c @@ -1218,11 +1218,11 @@ void __ppc64_runlatch_off(void) static struct kmem_cache *thread_info_cache; -struct thread_info *alloc_thread_info(struct task_struct *tsk) +struct thread_info *alloc_thread_info_node(struct task_struct *tsk, int node) { struct thread_info *ti; - ti = kmem_cache_alloc(thread_info_cache, GFP_KERNEL); + ti = kmem_cache_alloc_node(thread_info_cache, GFP_KERNEL, node); if (unlikely(ti == NULL)) return NULL; #ifdef CONFIG_DEBUG_STACK_USAGE diff --git a/arch/powerpc/kernel/ptrace.c b/arch/powerpc/kernel/ptrace.c index 9065369..895b082 100644 --- a/arch/powerpc/kernel/ptrace.c +++ b/arch/powerpc/kernel/ptrace.c @@ -229,12 +229,16 @@ static int gpr_get(struct task_struct *target, const struct user_regset *regset, unsigned int pos, unsigned int count, void *kbuf, void __user *ubuf) { - int ret; + int i, ret; if (target->thread.regs == NULL) return -EIO; - CHECK_FULL_REGS(target->thread.regs); + if (!FULL_REGS(target->thread.regs)) { + /* We have a partial register set. Fill 14-31 with bogus values */ + for (i = 14; i < 32; i++) + target->thread.regs->gpr[i] = NV_REG_POISON; + } ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, target->thread.regs, @@ -641,11 +645,16 @@ static int gpr32_get(struct task_struct *target, compat_ulong_t *k = kbuf; compat_ulong_t __user *u = ubuf; compat_ulong_t reg; + int i; if (target->thread.regs == NULL) return -EIO; - CHECK_FULL_REGS(target->thread.regs); + if (!FULL_REGS(target->thread.regs)) { + /* We have a partial register set. Fill 14-31 with bogus values */ + for (i = 14; i < 32; i++) + target->thread.regs->gpr[i] = NV_REG_POISON; + } pos /= sizeof(reg); count /= sizeof(reg); diff --git a/arch/powerpc/kernel/vdso.c b/arch/powerpc/kernel/vdso.c index fd87287..142ab10 100644 --- a/arch/powerpc/kernel/vdso.c +++ b/arch/powerpc/kernel/vdso.c @@ -820,17 +820,17 @@ static int __init vdso_init(void) } arch_initcall(vdso_init); -int in_gate_area_no_task(unsigned long addr) +int in_gate_area_no_mm(unsigned long addr) { return 0; } -int in_gate_area(struct task_struct *task, unsigned long addr) +int in_gate_area(struct mm_struct *mm, unsigned long addr) { return 0; } -struct vm_area_struct *get_gate_vma(struct task_struct *tsk) +struct vm_area_struct *get_gate_vma(struct mm_struct *mm) { return NULL; } diff --git a/arch/powerpc/sysdev/Makefile b/arch/powerpc/sysdev/Makefile index 9c29734..1e0c933 100644 --- a/arch/powerpc/sysdev/Makefile +++ b/arch/powerpc/sysdev/Makefile @@ -20,7 +20,7 @@ obj-$(CONFIG_FSL_GTM) += fsl_gtm.o obj-$(CONFIG_MPC8xxx_GPIO) += mpc8xxx_gpio.o obj-$(CONFIG_FSL_85XX_CACHE_SRAM) += fsl_85xx_l2ctlr.o fsl_85xx_cache_sram.o obj-$(CONFIG_SIMPLE_GPIO) += simple_gpio.o -obj-$(CONFIG_RAPIDIO) += fsl_rio.o +obj-$(CONFIG_FSL_RIO) += fsl_rio.o obj-$(CONFIG_TSI108_BRIDGE) += tsi108_pci.o tsi108_dev.o obj-$(CONFIG_QUICC_ENGINE) += qe_lib/ obj-$(CONFIG_PPC_BESTCOMM) += bestcomm/ diff --git a/arch/powerpc/sysdev/fsl_rio.c b/arch/powerpc/sysdev/fsl_rio.c index 3eff2c3..14232d5 100644 --- a/arch/powerpc/sysdev/fsl_rio.c +++ b/arch/powerpc/sysdev/fsl_rio.c @@ -482,7 +482,7 @@ fsl_rio_config_write(struct rio_mport *mport, int index, u16 destid, } /** - * rio_hw_add_outb_message - Add message to the MPC85xx outbound message queue + * fsl_add_outb_message - Add message to the MPC85xx outbound message queue * @mport: Master port with outbound message queue * @rdev: Target of outbound message * @mbox: Outbound mailbox @@ -492,8 +492,8 @@ fsl_rio_config_write(struct rio_mport *mport, int index, u16 destid, * Adds the @buffer message to the MPC85xx outbound message queue. Returns * %0 on success or %-EINVAL on failure. */ -int -rio_hw_add_outb_message(struct rio_mport *mport, struct rio_dev *rdev, int mbox, +static int +fsl_add_outb_message(struct rio_mport *mport, struct rio_dev *rdev, int mbox, void *buffer, size_t len) { struct rio_priv *priv = mport->priv; @@ -502,9 +502,8 @@ rio_hw_add_outb_message(struct rio_mport *mport, struct rio_dev *rdev, int mbox, + priv->msg_tx_ring.tx_slot; int ret = 0; - pr_debug - ("RIO: rio_hw_add_outb_message(): destid %4.4x mbox %d buffer %8.8x len %8.8x\n", - rdev->destid, mbox, (int)buffer, len); + pr_debug("RIO: fsl_add_outb_message(): destid %4.4x mbox %d buffer " \ + "%8.8x len %8.8x\n", rdev->destid, mbox, (int)buffer, len); if ((len < 8) || (len > RIO_MAX_MSG_SIZE)) { ret = -EINVAL; @@ -554,8 +553,6 @@ rio_hw_add_outb_message(struct rio_mport *mport, struct rio_dev *rdev, int mbox, return ret; } -EXPORT_SYMBOL_GPL(rio_hw_add_outb_message); - /** * fsl_rio_tx_handler - MPC85xx outbound message interrupt handler * @irq: Linux interrupt number @@ -600,7 +597,7 @@ fsl_rio_tx_handler(int irq, void *dev_instance) } /** - * rio_open_outb_mbox - Initialize MPC85xx outbound mailbox + * fsl_open_outb_mbox - Initialize MPC85xx outbound mailbox * @mport: Master port implementing the outbound message unit * @dev_id: Device specific pointer to pass on event * @mbox: Mailbox to open @@ -610,7 +607,8 @@ fsl_rio_tx_handler(int irq, void *dev_instance) * and enables the outbound message unit. Returns %0 on success and * %-EINVAL or %-ENOMEM on failure. */ -int rio_open_outb_mbox(struct rio_mport *mport, void *dev_id, int mbox, int entries) +static int +fsl_open_outb_mbox(struct rio_mport *mport, void *dev_id, int mbox, int entries) { int i, j, rc = 0; struct rio_priv *priv = mport->priv; @@ -706,14 +704,14 @@ int rio_open_outb_mbox(struct rio_mport *mport, void *dev_id, int mbox, int entr } /** - * rio_close_outb_mbox - Shut down MPC85xx outbound mailbox + * fsl_close_outb_mbox - Shut down MPC85xx outbound mailbox * @mport: Master port implementing the outbound message unit * @mbox: Mailbox to close * * Disables the outbound message unit, free all buffers, and * frees the outbound message interrupt. */ -void rio_close_outb_mbox(struct rio_mport *mport, int mbox) +static void fsl_close_outb_mbox(struct rio_mport *mport, int mbox) { struct rio_priv *priv = mport->priv; /* Disable inbound message unit */ @@ -770,7 +768,7 @@ fsl_rio_rx_handler(int irq, void *dev_instance) } /** - * rio_open_inb_mbox - Initialize MPC85xx inbound mailbox + * fsl_open_inb_mbox - Initialize MPC85xx inbound mailbox * @mport: Master port implementing the inbound message unit * @dev_id: Device specific pointer to pass on event * @mbox: Mailbox to open @@ -780,7 +778,8 @@ fsl_rio_rx_handler(int irq, void *dev_instance) * and enables the inbound message unit. Returns %0 on success * and %-EINVAL or %-ENOMEM on failure. */ -int rio_open_inb_mbox(struct rio_mport *mport, void *dev_id, int mbox, int entries) +static int +fsl_open_inb_mbox(struct rio_mport *mport, void *dev_id, int mbox, int entries) { int i, rc = 0; struct rio_priv *priv = mport->priv; @@ -844,14 +843,14 @@ int rio_open_inb_mbox(struct rio_mport *mport, void *dev_id, int mbox, int entri } /** - * rio_close_inb_mbox - Shut down MPC85xx inbound mailbox + * fsl_close_inb_mbox - Shut down MPC85xx inbound mailbox * @mport: Master port implementing the inbound message unit * @mbox: Mailbox to close * * Disables the inbound message unit, free all buffers, and * frees the inbound message interrupt. */ -void rio_close_inb_mbox(struct rio_mport *mport, int mbox) +static void fsl_close_inb_mbox(struct rio_mport *mport, int mbox) { struct rio_priv *priv = mport->priv; /* Disable inbound message unit */ @@ -866,7 +865,7 @@ void rio_close_inb_mbox(struct rio_mport *mport, int mbox) } /** - * rio_hw_add_inb_buffer - Add buffer to the MPC85xx inbound message queue + * fsl_add_inb_buffer - Add buffer to the MPC85xx inbound message queue * @mport: Master port implementing the inbound message unit * @mbox: Inbound mailbox number * @buf: Buffer to add to inbound queue @@ -874,12 +873,12 @@ void rio_close_inb_mbox(struct rio_mport *mport, int mbox) * Adds the @buf buffer to the MPC85xx inbound message queue. Returns * %0 on success or %-EINVAL on failure. */ -int rio_hw_add_inb_buffer(struct rio_mport *mport, int mbox, void *buf) +static int fsl_add_inb_buffer(struct rio_mport *mport, int mbox, void *buf) { int rc = 0; struct rio_priv *priv = mport->priv; - pr_debug("RIO: rio_hw_add_inb_buffer(), msg_rx_ring.rx_slot %d\n", + pr_debug("RIO: fsl_add_inb_buffer(), msg_rx_ring.rx_slot %d\n", priv->msg_rx_ring.rx_slot); if (priv->msg_rx_ring.virt_buffer[priv->msg_rx_ring.rx_slot]) { @@ -898,17 +897,15 @@ int rio_hw_add_inb_buffer(struct rio_mport *mport, int mbox, void *buf) return rc; } -EXPORT_SYMBOL_GPL(rio_hw_add_inb_buffer); - /** - * rio_hw_get_inb_message - Fetch inbound message from the MPC85xx message unit + * fsl_get_inb_message - Fetch inbound message from the MPC85xx message unit * @mport: Master port implementing the inbound message unit * @mbox: Inbound mailbox number * * Gets the next available inbound message from the inbound message queue. * A pointer to the message is returned on success or NULL on failure. */ -void *rio_hw_get_inb_message(struct rio_mport *mport, int mbox) +static void *fsl_get_inb_message(struct rio_mport *mport, int mbox) { struct rio_priv *priv = mport->priv; u32 phys_buf, virt_buf; @@ -945,8 +942,6 @@ void *rio_hw_get_inb_message(struct rio_mport *mport, int mbox) return buf; } -EXPORT_SYMBOL_GPL(rio_hw_get_inb_message); - /** * fsl_rio_dbell_handler - MPC85xx doorbell interrupt handler * @irq: Linux interrupt number @@ -1293,28 +1288,6 @@ err_out: return rc; } -static char *cmdline = NULL; - -static int fsl_rio_get_hdid(int index) -{ - /* XXX Need to parse multiple entries in some format */ - if (!cmdline) - return -1; - - return simple_strtol(cmdline, NULL, 0); -} - -static int fsl_rio_get_cmdline(char *s) -{ - if (!s) - return 0; - - cmdline = s; - return 1; -} - -__setup("riohdid=", fsl_rio_get_cmdline); - static inline void fsl_rio_info(struct device *dev, u32 ccsr) { const char *str; @@ -1431,13 +1404,19 @@ int fsl_rio_setup(struct platform_device *dev) ops->cwrite = fsl_rio_config_write; ops->dsend = fsl_rio_doorbell_send; ops->pwenable = fsl_rio_pw_enable; + ops->open_outb_mbox = fsl_open_outb_mbox; + ops->open_inb_mbox = fsl_open_inb_mbox; + ops->close_outb_mbox = fsl_close_outb_mbox; + ops->close_inb_mbox = fsl_close_inb_mbox; + ops->add_outb_message = fsl_add_outb_message; + ops->add_inb_buffer = fsl_add_inb_buffer; + ops->get_inb_message = fsl_get_inb_message; port = kzalloc(sizeof(struct rio_mport), GFP_KERNEL); if (!port) { rc = -ENOMEM; goto err_port; } - port->id = 0; port->index = 0; priv = kzalloc(sizeof(struct rio_priv), GFP_KERNEL); @@ -1453,6 +1432,14 @@ int fsl_rio_setup(struct platform_device *dev) port->iores.flags = IORESOURCE_MEM; port->iores.name = "rio_io_win"; + if (request_resource(&iomem_resource, &port->iores) < 0) { + dev_err(&dev->dev, "RIO: Error requesting master port region" + " 0x%016llx-0x%016llx\n", + (u64)port->iores.start, (u64)port->iores.end); + rc = -ENOMEM; + goto err_res; + } + priv->pwirq = irq_of_parse_and_map(dev->dev.of_node, 0); priv->bellirq = irq_of_parse_and_map(dev->dev.of_node, 2); priv->txirq = irq_of_parse_and_map(dev->dev.of_node, 3); @@ -1468,8 +1455,6 @@ int fsl_rio_setup(struct platform_device *dev) priv->dev = &dev->dev; port->ops = ops; - port->host_deviceid = fsl_rio_get_hdid(port->id); - port->priv = priv; port->phys_efptr = 0x100; rio_register_mport(port); @@ -1559,6 +1544,7 @@ int fsl_rio_setup(struct platform_device *dev) return 0; err: iounmap(priv->regs_win); +err_res: kfree(priv); err_priv: kfree(port); @@ -1572,18 +1558,10 @@ err_ops: */ static int __devinit fsl_of_rio_rpn_probe(struct platform_device *dev) { - int rc; printk(KERN_INFO "Setting up RapidIO peer-to-peer network %s\n", dev->dev.of_node->full_name); - rc = fsl_rio_setup(dev); - if (rc) - goto out; - - /* Enumerate all registered ports */ - rc = rio_init_mports(); -out: - return rc; + return fsl_rio_setup(dev); }; static const struct of_device_id fsl_of_rio_rpn_ids[] = { diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c index eb70218..0f7c671 100644 --- a/arch/powerpc/sysdev/mpic.c +++ b/arch/powerpc/sysdev/mpic.c @@ -147,6 +147,16 @@ static u32 mpic_infos[][MPIC_IDX_END] = { #endif /* CONFIG_MPIC_WEIRD */ +static inline unsigned int mpic_processor_id(struct mpic *mpic) +{ + unsigned int cpu = 0; + + if (mpic->flags & MPIC_PRIMARY) + cpu = hard_smp_processor_id(); + + return cpu; +} + /* * Register accessor functions */ @@ -210,19 +220,14 @@ static inline void _mpic_ipi_write(struct mpic *mpic, unsigned int ipi, u32 valu static inline u32 _mpic_cpu_read(struct mpic *mpic, unsigned int reg) { - unsigned int cpu = 0; + unsigned int cpu = mpic_processor_id(mpic); - if (mpic->flags & MPIC_PRIMARY) - cpu = hard_smp_processor_id(); return _mpic_read(mpic->reg_type, &mpic->cpuregs[cpu], reg); } static inline void _mpic_cpu_write(struct mpic *mpic, unsigned int reg, u32 value) { - unsigned int cpu = 0; - - if (mpic->flags & MPIC_PRIMARY) - cpu = hard_smp_processor_id(); + unsigned int cpu = mpic_processor_id(mpic); _mpic_write(mpic->reg_type, &mpic->cpuregs[cpu], reg, value); } @@ -913,6 +918,20 @@ void mpic_set_vector(unsigned int virq, unsigned int vector) mpic_irq_write(src, MPIC_INFO(IRQ_VECTOR_PRI), vecpri); } +void mpic_set_destination(unsigned int virq, unsigned int cpuid) +{ + struct mpic *mpic = mpic_from_irq(virq); + unsigned int src = mpic_irq_to_hw(virq); + + DBG("mpic: set_destination(mpic:@%p,virq:%d,src:%d,cpuid:0x%x)\n", + mpic, virq, src, cpuid); + + if (src >= mpic->irq_count) + return; + + mpic_irq_write(src, MPIC_INFO(IRQ_DESTINATION), 1 << cpuid); +} + static struct irq_chip mpic_irq_chip = { .irq_mask = mpic_mask_irq, .irq_unmask = mpic_unmask_irq, @@ -993,6 +1012,16 @@ static int mpic_host_map(struct irq_host *h, unsigned int virq, /* Set default irq type */ set_irq_type(virq, IRQ_TYPE_NONE); + /* If the MPIC was reset, then all vectors have already been + * initialized. Otherwise, a per source lazy initialization + * is done here. + */ + if (!mpic_is_ipi(mpic, hw) && (mpic->flags & MPIC_NO_RESET)) { + mpic_set_vector(virq, hw); + mpic_set_destination(virq, mpic_processor_id(mpic)); + mpic_irq_set_priority(virq, 8); + } + return 0; } @@ -1040,6 +1069,11 @@ static struct irq_host_ops mpic_host_ops = { .xlate = mpic_host_xlate, }; +static int mpic_reset_prohibited(struct device_node *node) +{ + return node && of_get_property(node, "pic-no-reset", NULL); +} + /* * Exported functions */ @@ -1160,7 +1194,15 @@ struct mpic * __init mpic_alloc(struct device_node *node, mpic_map(mpic, node, paddr, &mpic->tmregs, MPIC_INFO(TIMER_BASE), 0x1000); /* Reset */ - if (flags & MPIC_WANTS_RESET) { + + /* When using a device-node, reset requests are only honored if the MPIC + * is allowed to reset. + */ + if (mpic_reset_prohibited(node)) + mpic->flags |= MPIC_NO_RESET; + + if ((flags & MPIC_WANTS_RESET) && !(mpic->flags & MPIC_NO_RESET)) { + printk(KERN_DEBUG "mpic: Resetting\n"); mpic_write(mpic->gregs, MPIC_INFO(GREG_GLOBAL_CONF_0), mpic_read(mpic->gregs, MPIC_INFO(GREG_GLOBAL_CONF_0)) | MPIC_GREG_GCONF_RESET); @@ -1320,22 +1362,21 @@ void __init mpic_init(struct mpic *mpic) mpic_pasemi_msi_init(mpic); - if (mpic->flags & MPIC_PRIMARY) - cpu = hard_smp_processor_id(); - else - cpu = 0; + cpu = mpic_processor_id(mpic); - for (i = 0; i < mpic->num_sources; i++) { - /* start with vector = source number, and masked */ - u32 vecpri = MPIC_VECPRI_MASK | i | - (8 << MPIC_VECPRI_PRIORITY_SHIFT); + if (!(mpic->flags & MPIC_NO_RESET)) { + for (i = 0; i < mpic->num_sources; i++) { + /* start with vector = source number, and masked */ + u32 vecpri = MPIC_VECPRI_MASK | i | + (8 << MPIC_VECPRI_PRIORITY_SHIFT); - /* check if protected */ - if (mpic->protected && test_bit(i, mpic->protected)) - continue; - /* init hw */ - mpic_irq_write(i, MPIC_INFO(IRQ_VECTOR_PRI), vecpri); - mpic_irq_write(i, MPIC_INFO(IRQ_DESTINATION), 1 << cpu); + /* check if protected */ + if (mpic->protected && test_bit(i, mpic->protected)) + continue; + /* init hw */ + mpic_irq_write(i, MPIC_INFO(IRQ_VECTOR_PRI), vecpri); + mpic_irq_write(i, MPIC_INFO(IRQ_DESTINATION), 1 << cpu); + } } /* Init spurious vector */ diff --git a/arch/powerpc/xmon/xmon.c b/arch/powerpc/xmon/xmon.c index d17d04c..33794c1 100644 --- a/arch/powerpc/xmon/xmon.c +++ b/arch/powerpc/xmon/xmon.c @@ -821,7 +821,7 @@ cmds(struct pt_regs *excp) memzcan(); break; case 'i': - show_mem(); + show_mem(0); break; default: termch = cmd; diff --git a/arch/s390/boot/Makefile b/arch/s390/boot/Makefile index 8800cf09..635d677 100644 --- a/arch/s390/boot/Makefile +++ b/arch/s390/boot/Makefile @@ -6,7 +6,7 @@ COMPILE_VERSION := __linux_compile_version_id__`hostname | \ tr -c '[0-9A-Za-z]' '_'`__`date | \ tr -c '[0-9A-Za-z]' '_'`_t -EXTRA_CFLAGS := -DCOMPILE_VERSION=$(COMPILE_VERSION) -gstabs -I. +ccflags-y := -DCOMPILE_VERSION=$(COMPILE_VERSION) -gstabs -I. targets := image targets += bzImage diff --git a/arch/s390/include/asm/bitops.h b/arch/s390/include/asm/bitops.h index 2e05972..e1c8f3a 100644 --- a/arch/s390/include/asm/bitops.h +++ b/arch/s390/include/asm/bitops.h @@ -742,18 +742,42 @@ static inline int sched_find_first_bit(unsigned long *b) * 23 22 21 20 19 18 17 16 31 30 29 28 27 26 25 24 */ -#define ext2_set_bit(nr, addr) \ - __test_and_set_bit((nr)^(__BITOPS_WORDSIZE - 8), (unsigned long *)addr) -#define ext2_set_bit_atomic(lock, nr, addr) \ - test_and_set_bit((nr)^(__BITOPS_WORDSIZE - 8), (unsigned long *)addr) -#define ext2_clear_bit(nr, addr) \ - __test_and_clear_bit((nr)^(__BITOPS_WORDSIZE - 8), (unsigned long *)addr) -#define ext2_clear_bit_atomic(lock, nr, addr) \ - test_and_clear_bit((nr)^(__BITOPS_WORDSIZE - 8), (unsigned long *)addr) -#define ext2_test_bit(nr, addr) \ - test_bit((nr)^(__BITOPS_WORDSIZE - 8), (unsigned long *)addr) - -static inline int ext2_find_first_zero_bit(void *vaddr, unsigned int size) +static inline void __set_bit_le(unsigned long nr, void *addr) +{ + __set_bit(nr ^ (__BITOPS_WORDSIZE - 8), addr); +} + +static inline void __clear_bit_le(unsigned long nr, void *addr) +{ + __clear_bit(nr ^ (__BITOPS_WORDSIZE - 8), addr); +} + +static inline int __test_and_set_bit_le(unsigned long nr, void *addr) +{ + return __test_and_set_bit(nr ^ (__BITOPS_WORDSIZE - 8), addr); +} + +static inline int test_and_set_bit_le(unsigned long nr, void *addr) +{ + return test_and_set_bit(nr ^ (__BITOPS_WORDSIZE - 8), addr); +} + +static inline int __test_and_clear_bit_le(unsigned long nr, void *addr) +{ + return __test_and_clear_bit(nr ^ (__BITOPS_WORDSIZE - 8), addr); +} + +static inline int test_and_clear_bit_le(unsigned long nr, void *addr) +{ + return test_and_clear_bit(nr ^ (__BITOPS_WORDSIZE - 8), addr); +} + +static inline int test_bit_le(unsigned long nr, const void *addr) +{ + return test_bit(nr ^ (__BITOPS_WORDSIZE - 8), addr); +} + +static inline int find_first_zero_bit_le(void *vaddr, unsigned int size) { unsigned long bytes, bits; @@ -764,7 +788,7 @@ static inline int ext2_find_first_zero_bit(void *vaddr, unsigned int size) return (bits < size) ? bits : size; } -static inline int ext2_find_next_zero_bit(void *vaddr, unsigned long size, +static inline int find_next_zero_bit_le(void *vaddr, unsigned long size, unsigned long offset) { unsigned long *addr = vaddr, *p; @@ -790,11 +814,10 @@ static inline int ext2_find_next_zero_bit(void *vaddr, unsigned long size, size -= __BITOPS_WORDSIZE; p++; } - return offset + ext2_find_first_zero_bit(p, size); + return offset + find_first_zero_bit_le(p, size); } -static inline unsigned long ext2_find_first_bit(void *vaddr, - unsigned long size) +static inline unsigned long find_first_bit_le(void *vaddr, unsigned long size) { unsigned long bytes, bits; @@ -805,7 +828,7 @@ static inline unsigned long ext2_find_first_bit(void *vaddr, return (bits < size) ? bits : size; } -static inline int ext2_find_next_bit(void *vaddr, unsigned long size, +static inline int find_next_bit_le(void *vaddr, unsigned long size, unsigned long offset) { unsigned long *addr = vaddr, *p; @@ -831,10 +854,14 @@ static inline int ext2_find_next_bit(void *vaddr, unsigned long size, size -= __BITOPS_WORDSIZE; p++; } - return offset + ext2_find_first_bit(p, size); + return offset + find_first_bit_le(p, size); } -#include <asm-generic/bitops/minix.h> +#define ext2_set_bit_atomic(lock, nr, addr) \ + test_and_set_bit_le(nr, addr) +#define ext2_clear_bit_atomic(lock, nr, addr) \ + test_and_clear_bit_le(nr, addr) + #endif /* __KERNEL__ */ diff --git a/arch/s390/include/asm/ccwdev.h b/arch/s390/include/asm/ccwdev.h index ff6f62e..623f2fb 100644 --- a/arch/s390/include/asm/ccwdev.h +++ b/arch/s390/include/asm/ccwdev.h @@ -112,7 +112,6 @@ enum uc_todo { /** * struct ccw driver - device driver for channel attached devices - * @owner: owning module * @ids: ids supported by this driver * @probe: function called on probe * @remove: function called on remove @@ -128,10 +127,8 @@ enum uc_todo { * @restore: callback for restoring after hibernation * @uc_handler: callback for unit check handler * @driver: embedded device driver structure - * @name: device driver name */ struct ccw_driver { - struct module *owner; struct ccw_device_id *ids; int (*probe) (struct ccw_device *); void (*remove) (struct ccw_device *); @@ -147,7 +144,6 @@ struct ccw_driver { int (*restore)(struct ccw_device *); enum uc_todo (*uc_handler) (struct ccw_device *, struct irb *); struct device_driver driver; - char *name; }; extern struct ccw_device *get_ccwdev_by_busid(struct ccw_driver *cdrv, diff --git a/arch/s390/include/asm/ccwgroup.h b/arch/s390/include/asm/ccwgroup.h index c79c1e7..f2ea2c5 100644 --- a/arch/s390/include/asm/ccwgroup.h +++ b/arch/s390/include/asm/ccwgroup.h @@ -29,8 +29,6 @@ struct ccwgroup_device { /** * struct ccwgroup_driver - driver for ccw group devices - * @owner: driver owner - * @name: driver name * @max_slaves: maximum number of slave devices * @driver_id: unique id * @probe: function called on probe @@ -46,8 +44,6 @@ struct ccwgroup_device { * @driver: embedded driver structure */ struct ccwgroup_driver { - struct module *owner; - char *name; int max_slaves; unsigned long driver_id; diff --git a/arch/s390/include/asm/cmpxchg.h b/arch/s390/include/asm/cmpxchg.h new file mode 100644 index 0000000..7488e52 --- /dev/null +++ b/arch/s390/include/asm/cmpxchg.h @@ -0,0 +1,225 @@ +/* + * Copyright IBM Corp. 1999, 2011 + * + * Author(s): Martin Schwidefsky <schwidefsky@de.ibm.com>, + */ + +#ifndef __ASM_CMPXCHG_H +#define __ASM_CMPXCHG_H + +#include <linux/types.h> + +extern void __xchg_called_with_bad_pointer(void); + +static inline unsigned long __xchg(unsigned long x, void *ptr, int size) +{ + unsigned long addr, old; + int shift; + + switch (size) { + case 1: + addr = (unsigned long) ptr; + shift = (3 ^ (addr & 3)) << 3; + addr ^= addr & 3; + asm volatile( + " l %0,%4\n" + "0: lr 0,%0\n" + " nr 0,%3\n" + " or 0,%2\n" + " cs %0,0,%4\n" + " jl 0b\n" + : "=&d" (old), "=Q" (*(int *) addr) + : "d" (x << shift), "d" (~(255 << shift)), + "Q" (*(int *) addr) : "memory", "cc", "0"); + return old >> shift; + case 2: + addr = (unsigned long) ptr; + shift = (2 ^ (addr & 2)) << 3; + addr ^= addr & 2; + asm volatile( + " l %0,%4\n" + "0: lr 0,%0\n" + " nr 0,%3\n" + " or 0,%2\n" + " cs %0,0,%4\n" + " jl 0b\n" + : "=&d" (old), "=Q" (*(int *) addr) + : "d" (x << shift), "d" (~(65535 << shift)), + "Q" (*(int *) addr) : "memory", "cc", "0"); + return old >> shift; + case 4: + asm volatile( + " l %0,%3\n" + "0: cs %0,%2,%3\n" + " jl 0b\n" + : "=&d" (old), "=Q" (*(int *) ptr) + : "d" (x), "Q" (*(int *) ptr) + : "memory", "cc"); + return old; +#ifdef CONFIG_64BIT + case 8: + asm volatile( + " lg %0,%3\n" + "0: csg %0,%2,%3\n" + " jl 0b\n" + : "=&d" (old), "=m" (*(long *) ptr) + : "d" (x), "Q" (*(long *) ptr) + : "memory", "cc"); + return old; +#endif /* CONFIG_64BIT */ + } + __xchg_called_with_bad_pointer(); + return x; +} + +#define xchg(ptr, x) \ +({ \ + __typeof__(*(ptr)) __ret; \ + __ret = (__typeof__(*(ptr))) \ + __xchg((unsigned long)(x), (void *)(ptr), sizeof(*(ptr)));\ + __ret; \ +}) + +/* + * Atomic compare and exchange. Compare OLD with MEM, if identical, + * store NEW in MEM. Return the initial value in MEM. Success is + * indicated by comparing RETURN with OLD. + */ + +#define __HAVE_ARCH_CMPXCHG + +extern void __cmpxchg_called_with_bad_pointer(void); + +static inline unsigned long __cmpxchg(void *ptr, unsigned long old, + unsigned long new, int size) +{ + unsigned long addr, prev, tmp; + int shift; + + switch (size) { + case 1: + addr = (unsigned long) ptr; + shift = (3 ^ (addr & 3)) << 3; + addr ^= addr & 3; + asm volatile( + " l %0,%2\n" + "0: nr %0,%5\n" + " lr %1,%0\n" + " or %0,%3\n" + " or %1,%4\n" + " cs %0,%1,%2\n" + " jnl 1f\n" + " xr %1,%0\n" + " nr %1,%5\n" + " jnz 0b\n" + "1:" + : "=&d" (prev), "=&d" (tmp), "=Q" (*(int *) ptr) + : "d" (old << shift), "d" (new << shift), + "d" (~(255 << shift)), "Q" (*(int *) ptr) + : "memory", "cc"); + return prev >> shift; + case 2: + addr = (unsigned long) ptr; + shift = (2 ^ (addr & 2)) << 3; + addr ^= addr & 2; + asm volatile( + " l %0,%2\n" + "0: nr %0,%5\n" + " lr %1,%0\n" + " or %0,%3\n" + " or %1,%4\n" + " cs %0,%1,%2\n" + " jnl 1f\n" + " xr %1,%0\n" + " nr %1,%5\n" + " jnz 0b\n" + "1:" + : "=&d" (prev), "=&d" (tmp), "=Q" (*(int *) ptr) + : "d" (old << shift), "d" (new << shift), + "d" (~(65535 << shift)), "Q" (*(int *) ptr) + : "memory", "cc"); + return prev >> shift; + case 4: + asm volatile( + " cs %0,%3,%1\n" + : "=&d" (prev), "=Q" (*(int *) ptr) + : "0" (old), "d" (new), "Q" (*(int *) ptr) + : "memory", "cc"); + return prev; +#ifdef CONFIG_64BIT + case 8: + asm volatile( + " csg %0,%3,%1\n" + : "=&d" (prev), "=Q" (*(long *) ptr) + : "0" (old), "d" (new), "Q" (*(long *) ptr) + : "memory", "cc"); + return prev; +#endif /* CONFIG_64BIT */ + } + __cmpxchg_called_with_bad_pointer(); + return old; +} + +#define cmpxchg(ptr, o, n) \ + ((__typeof__(*(ptr)))__cmpxchg((ptr), (unsigned long)(o), \ + (unsigned long)(n), sizeof(*(ptr)))) + +#ifdef CONFIG_64BIT +#define cmpxchg64(ptr, o, n) \ +({ \ + BUILD_BUG_ON(sizeof(*(ptr)) != 8); \ + cmpxchg((ptr), (o), (n)); \ +}) +#else /* CONFIG_64BIT */ +static inline unsigned long long __cmpxchg64(void *ptr, + unsigned long long old, + unsigned long long new) +{ + register_pair rp_old = {.pair = old}; + register_pair rp_new = {.pair = new}; + + asm volatile( + " cds %0,%2,%1" + : "+&d" (rp_old), "=Q" (ptr) + : "d" (rp_new), "Q" (ptr) + : "cc"); + return rp_old.pair; +} +#define cmpxchg64(ptr, o, n) \ + ((__typeof__(*(ptr)))__cmpxchg64((ptr), \ + (unsigned long long)(o), \ + (unsigned long long)(n))) +#endif /* CONFIG_64BIT */ + +#include <asm-generic/cmpxchg-local.h> + +static inline unsigned long __cmpxchg_local(void *ptr, + unsigned long old, + unsigned long new, int size) +{ + switch (size) { + case 1: + case 2: + case 4: +#ifdef CONFIG_64BIT + case 8: +#endif + return __cmpxchg(ptr, old, new, size); + default: + return __cmpxchg_local_generic(ptr, old, new, size); + } + + return old; +} + +/* + * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make + * them available. + */ +#define cmpxchg_local(ptr, o, n) \ + ((__typeof__(*(ptr)))__cmpxchg_local((ptr), (unsigned long)(o), \ + (unsigned long)(n), sizeof(*(ptr)))) + +#define cmpxchg64_local(ptr, o, n) cmpxchg64((ptr), (o), (n)) + +#endif /* __ASM_CMPXCHG_H */ diff --git a/arch/s390/include/asm/system.h b/arch/s390/include/asm/system.h index 8f8d759..d382629 100644 --- a/arch/s390/include/asm/system.h +++ b/arch/s390/include/asm/system.h @@ -14,6 +14,7 @@ #include <asm/setup.h> #include <asm/processor.h> #include <asm/lowcore.h> +#include <asm/cmpxchg.h> #ifdef __KERNEL__ @@ -120,161 +121,6 @@ extern int memcpy_real(void *, void *, size_t); #define nop() asm volatile("nop") -#define xchg(ptr,x) \ -({ \ - __typeof__(*(ptr)) __ret; \ - __ret = (__typeof__(*(ptr))) \ - __xchg((unsigned long)(x), (void *)(ptr),sizeof(*(ptr))); \ - __ret; \ -}) - -extern void __xchg_called_with_bad_pointer(void); - -static inline unsigned long __xchg(unsigned long x, void * ptr, int size) -{ - unsigned long addr, old; - int shift; - - switch (size) { - case 1: - addr = (unsigned long) ptr; - shift = (3 ^ (addr & 3)) << 3; - addr ^= addr & 3; - asm volatile( - " l %0,%4\n" - "0: lr 0,%0\n" - " nr 0,%3\n" - " or 0,%2\n" - " cs %0,0,%4\n" - " jl 0b\n" - : "=&d" (old), "=Q" (*(int *) addr) - : "d" (x << shift), "d" (~(255 << shift)), - "Q" (*(int *) addr) : "memory", "cc", "0"); - return old >> shift; - case 2: - addr = (unsigned long) ptr; - shift = (2 ^ (addr & 2)) << 3; - addr ^= addr & 2; - asm volatile( - " l %0,%4\n" - "0: lr 0,%0\n" - " nr 0,%3\n" - " or 0,%2\n" - " cs %0,0,%4\n" - " jl 0b\n" - : "=&d" (old), "=Q" (*(int *) addr) - : "d" (x << shift), "d" (~(65535 << shift)), - "Q" (*(int *) addr) : "memory", "cc", "0"); - return old >> shift; - case 4: - asm volatile( - " l %0,%3\n" - "0: cs %0,%2,%3\n" - " jl 0b\n" - : "=&d" (old), "=Q" (*(int *) ptr) - : "d" (x), "Q" (*(int *) ptr) - : "memory", "cc"); - return old; -#ifdef __s390x__ - case 8: - asm volatile( - " lg %0,%3\n" - "0: csg %0,%2,%3\n" - " jl 0b\n" - : "=&d" (old), "=m" (*(long *) ptr) - : "d" (x), "Q" (*(long *) ptr) - : "memory", "cc"); - return old; -#endif /* __s390x__ */ - } - __xchg_called_with_bad_pointer(); - return x; -} - -/* - * Atomic compare and exchange. Compare OLD with MEM, if identical, - * store NEW in MEM. Return the initial value in MEM. Success is - * indicated by comparing RETURN with OLD. - */ - -#define __HAVE_ARCH_CMPXCHG 1 - -#define cmpxchg(ptr, o, n) \ - ((__typeof__(*(ptr)))__cmpxchg((ptr), (unsigned long)(o), \ - (unsigned long)(n), sizeof(*(ptr)))) - -extern void __cmpxchg_called_with_bad_pointer(void); - -static inline unsigned long -__cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size) -{ - unsigned long addr, prev, tmp; - int shift; - - switch (size) { - case 1: - addr = (unsigned long) ptr; - shift = (3 ^ (addr & 3)) << 3; - addr ^= addr & 3; - asm volatile( - " l %0,%2\n" - "0: nr %0,%5\n" - " lr %1,%0\n" - " or %0,%3\n" - " or %1,%4\n" - " cs %0,%1,%2\n" - " jnl 1f\n" - " xr %1,%0\n" - " nr %1,%5\n" - " jnz 0b\n" - "1:" - : "=&d" (prev), "=&d" (tmp), "=Q" (*(int *) ptr) - : "d" (old << shift), "d" (new << shift), - "d" (~(255 << shift)), "Q" (*(int *) ptr) - : "memory", "cc"); - return prev >> shift; - case 2: - addr = (unsigned long) ptr; - shift = (2 ^ (addr & 2)) << 3; - addr ^= addr & 2; - asm volatile( - " l %0,%2\n" - "0: nr %0,%5\n" - " lr %1,%0\n" - " or %0,%3\n" - " or %1,%4\n" - " cs %0,%1,%2\n" - " jnl 1f\n" - " xr %1,%0\n" - " nr %1,%5\n" - " jnz 0b\n" - "1:" - : "=&d" (prev), "=&d" (tmp), "=Q" (*(int *) ptr) - : "d" (old << shift), "d" (new << shift), - "d" (~(65535 << shift)), "Q" (*(int *) ptr) - : "memory", "cc"); - return prev >> shift; - case 4: - asm volatile( - " cs %0,%3,%1\n" - : "=&d" (prev), "=Q" (*(int *) ptr) - : "0" (old), "d" (new), "Q" (*(int *) ptr) - : "memory", "cc"); - return prev; -#ifdef __s390x__ - case 8: - asm volatile( - " csg %0,%3,%1\n" - : "=&d" (prev), "=Q" (*(long *) ptr) - : "0" (old), "d" (new), "Q" (*(long *) ptr) - : "memory", "cc"); - return prev; -#endif /* __s390x__ */ - } - __cmpxchg_called_with_bad_pointer(); - return old; -} - /* * Force strict CPU ordering. * And yes, this is required on UP too when we're talking @@ -353,46 +199,6 @@ __cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size) __ctl_load(__dummy, cr, cr); \ }) -#include <linux/irqflags.h> - -#include <asm-generic/cmpxchg-local.h> - -static inline unsigned long __cmpxchg_local(volatile void *ptr, - unsigned long old, - unsigned long new, int size) -{ - switch (size) { - case 1: - case 2: - case 4: -#ifdef __s390x__ - case 8: -#endif - return __cmpxchg(ptr, old, new, size); - default: - return __cmpxchg_local_generic(ptr, old, new, size); - } - - return old; -} - -/* - * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make - * them available. - */ -#define cmpxchg_local(ptr, o, n) \ - ((__typeof__(*(ptr)))__cmpxchg_local((ptr), (unsigned long)(o), \ - (unsigned long)(n), sizeof(*(ptr)))) -#ifdef __s390x__ -#define cmpxchg64_local(ptr, o, n) \ - ({ \ - BUILD_BUG_ON(sizeof(*(ptr)) != 8); \ - cmpxchg_local((ptr), (o), (n)); \ - }) -#else -#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n)) -#endif - /* * Use to set psw mask except for the first byte which * won't be changed by this function. diff --git a/arch/s390/include/asm/types.h b/arch/s390/include/asm/types.h index 04d6b95..eeb52cc 100644 --- a/arch/s390/include/asm/types.h +++ b/arch/s390/include/asm/types.h @@ -30,14 +30,6 @@ typedef __signed__ long saddr_t; #ifndef __ASSEMBLY__ -typedef u64 dma64_addr_t; -#ifdef __s390x__ -/* DMA addresses come in 32-bit and 64-bit flavours. */ -typedef u64 dma_addr_t; -#else -typedef u32 dma_addr_t; -#endif - #ifndef __s390x__ typedef union { unsigned long long pair; diff --git a/arch/s390/include/asm/unistd.h b/arch/s390/include/asm/unistd.h index 1049ef2..e821525 100644 --- a/arch/s390/include/asm/unistd.h +++ b/arch/s390/include/asm/unistd.h @@ -272,7 +272,11 @@ #define __NR_fanotify_init 332 #define __NR_fanotify_mark 333 #define __NR_prlimit64 334 -#define NR_syscalls 335 +#define __NR_name_to_handle_at 335 +#define __NR_open_by_handle_at 336 +#define __NR_clock_adjtime 337 +#define __NR_syncfs 338 +#define NR_syscalls 339 /* * There are some system calls that are not present on 64 bit, some diff --git a/arch/s390/kernel/compat_wrapper.S b/arch/s390/kernel/compat_wrapper.S index 8e60fb2..1dc96ea 100644 --- a/arch/s390/kernel/compat_wrapper.S +++ b/arch/s390/kernel/compat_wrapper.S @@ -1877,3 +1877,30 @@ sys_prlimit64_wrapper: llgtr %r4,%r4 # const struct rlimit64 __user * llgtr %r5,%r5 # struct rlimit64 __user * jg sys_prlimit64 # branch to system call + + .globl sys_name_to_handle_at_wrapper +sys_name_to_handle_at_wrapper: + lgfr %r2,%r2 # int + llgtr %r3,%r3 # const char __user * + llgtr %r4,%r4 # struct file_handle __user * + llgtr %r5,%r5 # int __user * + lgfr %r6,%r6 # int + jg sys_name_to_handle_at + + .globl compat_sys_open_by_handle_at_wrapper +compat_sys_open_by_handle_at_wrapper: + lgfr %r2,%r2 # int + llgtr %r3,%r3 # struct file_handle __user * + lgfr %r4,%r4 # int + jg compat_sys_open_by_handle_at + + .globl compat_sys_clock_adjtime_wrapper +compat_sys_clock_adjtime_wrapper: + lgfr %r2,%r2 # clockid_t (int) + llgtr %r3,%r3 # struct compat_timex __user * + jg compat_sys_clock_adjtime + + .globl sys_syncfs_wrapper +sys_syncfs_wrapper: + lgfr %r2,%r2 # int + jg sys_syncfs diff --git a/arch/s390/kernel/early.c b/arch/s390/kernel/early.c index 3b7e7dd..068f846 100644 --- a/arch/s390/kernel/early.c +++ b/arch/s390/kernel/early.c @@ -94,6 +94,7 @@ static noinline __init void create_kernel_nss(void) unsigned int sinitrd_pfn, einitrd_pfn; #endif int response; + int hlen; size_t len; char *savesys_ptr; char defsys_cmd[DEFSYS_CMD_SIZE]; @@ -124,24 +125,27 @@ static noinline __init void create_kernel_nss(void) end_pfn = PFN_UP(__pa(&_end)); min_size = end_pfn << 2; - sprintf(defsys_cmd, "DEFSYS %s 00000-%.5X EW %.5X-%.5X SR %.5X-%.5X", - kernel_nss_name, stext_pfn - 1, stext_pfn, eshared_pfn - 1, - eshared_pfn, end_pfn); + hlen = snprintf(defsys_cmd, DEFSYS_CMD_SIZE, + "DEFSYS %s 00000-%.5X EW %.5X-%.5X SR %.5X-%.5X", + kernel_nss_name, stext_pfn - 1, stext_pfn, + eshared_pfn - 1, eshared_pfn, end_pfn); #ifdef CONFIG_BLK_DEV_INITRD if (INITRD_START && INITRD_SIZE) { sinitrd_pfn = PFN_DOWN(__pa(INITRD_START)); einitrd_pfn = PFN_UP(__pa(INITRD_START + INITRD_SIZE)); min_size = einitrd_pfn << 2; - sprintf(defsys_cmd, "%s EW %.5X-%.5X", defsys_cmd, - sinitrd_pfn, einitrd_pfn); + hlen += snprintf(defsys_cmd + hlen, DEFSYS_CMD_SIZE - hlen, + " EW %.5X-%.5X", sinitrd_pfn, einitrd_pfn); } #endif - sprintf(defsys_cmd, "%s EW MINSIZE=%.7iK PARMREGS=0-13", - defsys_cmd, min_size); - sprintf(savesys_cmd, "SAVESYS %s \n IPL %s", - kernel_nss_name, kernel_nss_name); + snprintf(defsys_cmd + hlen, DEFSYS_CMD_SIZE - hlen, + " EW MINSIZE=%.7iK PARMREGS=0-13", min_size); + defsys_cmd[DEFSYS_CMD_SIZE - 1] = '\0'; + snprintf(savesys_cmd, SAVESYS_CMD_SIZE, "SAVESYS %s \n IPL %s", + kernel_nss_name, kernel_nss_name); + savesys_cmd[SAVESYS_CMD_SIZE - 1] = '\0'; __cpcmd(defsys_cmd, NULL, 0, &response); diff --git a/arch/s390/kernel/setup.c b/arch/s390/kernel/setup.c index 6f63508..ed183c2 100644 --- a/arch/s390/kernel/setup.c +++ b/arch/s390/kernel/setup.c @@ -102,16 +102,6 @@ EXPORT_SYMBOL(lowcore_ptr); #include <asm/setup.h> -static struct resource code_resource = { - .name = "Kernel code", - .flags = IORESOURCE_BUSY | IORESOURCE_MEM, -}; - -static struct resource data_resource = { - .name = "Kernel data", - .flags = IORESOURCE_BUSY | IORESOURCE_MEM, -}; - /* * condev= and conmode= setup parameter. */ @@ -436,21 +426,43 @@ setup_lowcore(void) lowcore_ptr[0] = lc; } -static void __init -setup_resources(void) +static struct resource code_resource = { + .name = "Kernel code", + .flags = IORESOURCE_BUSY | IORESOURCE_MEM, +}; + +static struct resource data_resource = { + .name = "Kernel data", + .flags = IORESOURCE_BUSY | IORESOURCE_MEM, +}; + +static struct resource bss_resource = { + .name = "Kernel bss", + .flags = IORESOURCE_BUSY | IORESOURCE_MEM, +}; + +static struct resource __initdata *standard_resources[] = { + &code_resource, + &data_resource, + &bss_resource, +}; + +static void __init setup_resources(void) { - struct resource *res, *sub_res; - int i; + struct resource *res, *std_res, *sub_res; + int i, j; code_resource.start = (unsigned long) &_text; code_resource.end = (unsigned long) &_etext - 1; data_resource.start = (unsigned long) &_etext; data_resource.end = (unsigned long) &_edata - 1; + bss_resource.start = (unsigned long) &__bss_start; + bss_resource.end = (unsigned long) &__bss_stop - 1; for (i = 0; i < MEMORY_CHUNKS; i++) { if (!memory_chunk[i].size) continue; - res = alloc_bootmem_low(sizeof(struct resource)); + res = alloc_bootmem_low(sizeof(*res)); res->flags = IORESOURCE_BUSY | IORESOURCE_MEM; switch (memory_chunk[i].type) { case CHUNK_READ_WRITE: @@ -464,40 +476,24 @@ setup_resources(void) res->name = "reserved"; } res->start = memory_chunk[i].addr; - res->end = memory_chunk[i].addr + memory_chunk[i].size - 1; + res->end = res->start + memory_chunk[i].size - 1; request_resource(&iomem_resource, res); - if (code_resource.start >= res->start && - code_resource.start <= res->end && - code_resource.end > res->end) { - sub_res = alloc_bootmem_low(sizeof(struct resource)); - memcpy(sub_res, &code_resource, - sizeof(struct resource)); - sub_res->end = res->end; - code_resource.start = res->end + 1; - request_resource(res, sub_res); - } - - if (code_resource.start >= res->start && - code_resource.start <= res->end && - code_resource.end <= res->end) - request_resource(res, &code_resource); - - if (data_resource.start >= res->start && - data_resource.start <= res->end && - data_resource.end > res->end) { - sub_res = alloc_bootmem_low(sizeof(struct resource)); - memcpy(sub_res, &data_resource, - sizeof(struct resource)); - sub_res->end = res->end; - data_resource.start = res->end + 1; - request_resource(res, sub_res); + for (j = 0; j < ARRAY_SIZE(standard_resources); j++) { + std_res = standard_resources[j]; + if (std_res->start < res->start || + std_res->start > res->end) + continue; + if (std_res->end > res->end) { + sub_res = alloc_bootmem_low(sizeof(*sub_res)); + *sub_res = *std_res; + sub_res->end = res->end; + std_res->start = res->end + 1; + request_resource(res, sub_res); + } else { + request_resource(res, std_res); + } } - - if (data_resource.start >= res->start && - data_resource.start <= res->end && - data_resource.end <= res->end) - request_resource(res, &data_resource); } } diff --git a/arch/s390/kernel/syscalls.S b/arch/s390/kernel/syscalls.S index a8fee1b..9c65fd4 100644 --- a/arch/s390/kernel/syscalls.S +++ b/arch/s390/kernel/syscalls.S @@ -343,3 +343,7 @@ SYSCALL(sys_perf_event_open,sys_perf_event_open,sys_perf_event_open_wrapper) SYSCALL(sys_fanotify_init,sys_fanotify_init,sys_fanotify_init_wrapper) SYSCALL(sys_fanotify_mark,sys_fanotify_mark,sys_fanotify_mark_wrapper) SYSCALL(sys_prlimit64,sys_prlimit64,sys_prlimit64_wrapper) +SYSCALL(sys_name_to_handle_at,sys_name_to_handle_at,sys_name_to_handle_at_wrapper) /* 335 */ +SYSCALL(sys_open_by_handle_at,sys_open_by_handle_at,compat_sys_open_by_handle_at_wrapper) +SYSCALL(sys_clock_adjtime,sys_clock_adjtime,compat_sys_clock_adjtime_wrapper) +SYSCALL(sys_syncfs,sys_syncfs,sys_syncfs_wrapper) diff --git a/arch/s390/kernel/vdso.c b/arch/s390/kernel/vdso.c index f438d74..d73630b 100644 --- a/arch/s390/kernel/vdso.c +++ b/arch/s390/kernel/vdso.c @@ -337,17 +337,17 @@ static int __init vdso_init(void) } arch_initcall(vdso_init); -int in_gate_area_no_task(unsigned long addr) +int in_gate_area_no_mm(unsigned long addr) { return 0; } -int in_gate_area(struct task_struct *task, unsigned long addr) +int in_gate_area(struct mm_struct *mm, unsigned long addr) { return 0; } -struct vm_area_struct *get_gate_vma(struct task_struct *tsk) +struct vm_area_struct *get_gate_vma(struct mm_struct *mm) { return NULL; } diff --git a/arch/s390/kvm/Makefile b/arch/s390/kvm/Makefile index e5221ec..860d265 100644 --- a/arch/s390/kvm/Makefile +++ b/arch/s390/kvm/Makefile @@ -8,7 +8,7 @@ common-objs = $(addprefix ../../../virt/kvm/, kvm_main.o) -EXTRA_CFLAGS += -Ivirt/kvm -Iarch/s390/kvm +ccflags-y := -Ivirt/kvm -Iarch/s390/kvm kvm-objs := $(common-objs) kvm-s390.o sie64a.o intercept.o interrupt.o priv.o sigp.o diag.o obj-$(CONFIG_KVM) += kvm.o diff --git a/arch/s390/math-emu/Makefile b/arch/s390/math-emu/Makefile index c848903..51d3995 100644 --- a/arch/s390/math-emu/Makefile +++ b/arch/s390/math-emu/Makefile @@ -4,4 +4,4 @@ obj-$(CONFIG_MATHEMU) := math.o -EXTRA_CFLAGS := -I$(src) -Iinclude/math-emu -w +ccflags-y := -I$(src) -Iinclude/math-emu -w diff --git a/arch/s390/oprofile/Makefile b/arch/s390/oprofile/Makefile index d698cdd..524c4b61 100644 --- a/arch/s390/oprofile/Makefile +++ b/arch/s390/oprofile/Makefile @@ -6,4 +6,5 @@ DRIVER_OBJS = $(addprefix ../../../drivers/oprofile/, \ oprofilefs.o oprofile_stats.o \ timer_int.o ) -oprofile-y := $(DRIVER_OBJS) init.o backtrace.o hwsampler.o +oprofile-y := $(DRIVER_OBJS) init.o backtrace.o +oprofile-$(CONFIG_64BIT) += hwsampler.o diff --git a/arch/s390/oprofile/init.c b/arch/s390/oprofile/init.c index 16c76de..c63d7e5 100644 --- a/arch/s390/oprofile/init.c +++ b/arch/s390/oprofile/init.c @@ -18,6 +18,11 @@ #include <linux/fs.h> #include "../../../drivers/oprofile/oprof.h" + +extern void s390_backtrace(struct pt_regs * const regs, unsigned int depth); + +#ifdef CONFIG_64BIT + #include "hwsampler.h" #define DEFAULT_INTERVAL 4096 @@ -37,8 +42,6 @@ static int hwsampler_running; /* start_mutex must be held to change */ static struct oprofile_operations timer_ops; -extern void s390_backtrace(struct pt_regs * const regs, unsigned int depth); - static int oprofile_hwsampler_start(void) { int retval; @@ -172,14 +175,22 @@ static void oprofile_hwsampler_exit(void) hwsampler_shutdown(); } +#endif /* CONFIG_64BIT */ + int __init oprofile_arch_init(struct oprofile_operations *ops) { ops->backtrace = s390_backtrace; +#ifdef CONFIG_64BIT return oprofile_hwsampler_init(ops); +#else + return -ENODEV; +#endif } void oprofile_arch_exit(void) { +#ifdef CONFIG_64BIT oprofile_hwsampler_exit(); +#endif } diff --git a/arch/score/include/asm/thread_info.h b/arch/score/include/asm/thread_info.h index 8570d08..2205c62 100644 --- a/arch/score/include/asm/thread_info.h +++ b/arch/score/include/asm/thread_info.h @@ -71,7 +71,7 @@ struct thread_info { register struct thread_info *__current_thread_info __asm__("r28"); #define current_thread_info() __current_thread_info -#define alloc_thread_info(tsk) kmalloc(THREAD_SIZE, GFP_KERNEL) +#define alloc_thread_info_node(tsk, node) kmalloc_node(THREAD_SIZE, GFP_KERNEL, node) #define free_thread_info(info) kfree(info) #endif /* !__ASSEMBLY__ */ diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig index 2d264fa..9af3c8d 100644 --- a/arch/sh/Kconfig +++ b/arch/sh/Kconfig @@ -23,8 +23,7 @@ config SUPERH select HAVE_SPARSE_IRQ select RTC_LIB select GENERIC_ATOMIC64 - # Support the deprecated APIs until MFD and GPIOLIB catch up. - select GENERIC_HARDIRQS_NO_DEPRECATED if !MFD_SUPPORT && !GPIOLIB + select GENERIC_HARDIRQS_NO_DEPRECATED select GENERIC_IRQ_SHOW help The SuperH is a RISC processor targeted for use in embedded systems @@ -75,6 +74,9 @@ config GENERIC_CSUM config GENERIC_FIND_NEXT_BIT def_bool y +config GENERIC_FIND_BIT_LE + def_bool y + config GENERIC_HWEIGHT def_bool y diff --git a/arch/sh/boards/board-edosk7760.c b/arch/sh/boards/board-edosk7760.c index f47ac82..e9656a2 100644 --- a/arch/sh/boards/board-edosk7760.c +++ b/arch/sh/boards/board-edosk7760.c @@ -56,7 +56,7 @@ static struct mtd_partition edosk7760_nor_flash_partitions[] = { }, { .name = "fs", .offset = MTDPART_OFS_APPEND, - .size = SZ_26M, + .size = (26 << 20), }, { .name = "other", .offset = MTDPART_OFS_APPEND, diff --git a/arch/sh/boot/romimage/mmcif-sh7724.c b/arch/sh/boot/romimage/mmcif-sh7724.c index c84e783..16b1225 100644 --- a/arch/sh/boot/romimage/mmcif-sh7724.c +++ b/arch/sh/boot/romimage/mmcif-sh7724.c @@ -9,6 +9,7 @@ */ #include <linux/mmc/sh_mmcif.h> +#include <linux/mmc/boot.h> #include <mach/romimage.h> #define MMCIF_BASE (void __iomem *)0xa4ca0000 @@ -29,7 +30,7 @@ */ asmlinkage void mmcif_loader(unsigned char *buf, unsigned long no_bytes) { - mmcif_update_progress(MMCIF_PROGRESS_ENTER); + mmcif_update_progress(MMC_PROGRESS_ENTER); /* enable clock to the MMCIF hardware block */ __raw_writel(__raw_readl(MSTPCR2) & ~0x20000000, MSTPCR2); @@ -52,12 +53,12 @@ asmlinkage void mmcif_loader(unsigned char *buf, unsigned long no_bytes) /* high drive capability for MMC pins */ __raw_writew(__raw_readw(DRVCRA) | 0x3000, DRVCRA); - mmcif_update_progress(MMCIF_PROGRESS_INIT); + mmcif_update_progress(MMC_PROGRESS_INIT); /* setup MMCIF hardware */ sh_mmcif_boot_init(MMCIF_BASE); - mmcif_update_progress(MMCIF_PROGRESS_LOAD); + mmcif_update_progress(MMC_PROGRESS_LOAD); /* load kernel via MMCIF interface */ sh_mmcif_boot_do_read(MMCIF_BASE, 512, @@ -67,5 +68,5 @@ asmlinkage void mmcif_loader(unsigned char *buf, unsigned long no_bytes) /* disable clock to the MMCIF hardware block */ __raw_writel(__raw_readl(MSTPCR2) | 0x20000000, MSTPCR2); - mmcif_update_progress(MMCIF_PROGRESS_DONE); + mmcif_update_progress(MMC_PROGRESS_DONE); } diff --git a/arch/sh/include/asm/bitops.h b/arch/sh/include/asm/bitops.h index 98511e4..90fa3e4 100644 --- a/arch/sh/include/asm/bitops.h +++ b/arch/sh/include/asm/bitops.h @@ -94,9 +94,8 @@ static inline unsigned long ffz(unsigned long word) #include <asm-generic/bitops/hweight.h> #include <asm-generic/bitops/lock.h> #include <asm-generic/bitops/sched.h> -#include <asm-generic/bitops/ext2-non-atomic.h> +#include <asm-generic/bitops/le.h> #include <asm-generic/bitops/ext2-atomic.h> -#include <asm-generic/bitops/minix.h> #include <asm-generic/bitops/fls.h> #include <asm-generic/bitops/__fls.h> #include <asm-generic/bitops/fls64.h> diff --git a/arch/sh/include/asm/sizes.h b/arch/sh/include/asm/sizes.h index 0b9fe2d..dd248c2 100644 --- a/arch/sh/include/asm/sizes.h +++ b/arch/sh/include/asm/sizes.h @@ -1,62 +1 @@ -/* - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -/* DO NOT EDIT!! - this file automatically generated - * from .s file by awk -f s2h.awk - */ -/* Size definitions - * Copyright (C) ARM Limited 1998. All rights reserved. - */ - -#ifndef __sizes_h -#define __sizes_h 1 - -/* handy sizes */ -#define SZ_16 0x00000010 -#define SZ_32 0x00000020 -#define SZ_64 0x00000040 -#define SZ_128 0x00000080 -#define SZ_256 0x00000100 -#define SZ_512 0x00000200 - -#define SZ_1K 0x00000400 -#define SZ_2K 0x00000800 -#define SZ_4K 0x00001000 -#define SZ_8K 0x00002000 -#define SZ_16K 0x00004000 -#define SZ_32K 0x00008000 -#define SZ_64K 0x00010000 -#define SZ_128K 0x00020000 -#define SZ_256K 0x00040000 -#define SZ_512K 0x00080000 - -#define SZ_1M 0x00100000 -#define SZ_2M 0x00200000 -#define SZ_4M 0x00400000 -#define SZ_8M 0x00800000 -#define SZ_16M 0x01000000 -#define SZ_26M 0x01a00000 -#define SZ_32M 0x02000000 -#define SZ_64M 0x04000000 -#define SZ_128M 0x08000000 -#define SZ_256M 0x10000000 -#define SZ_512M 0x20000000 - -#define SZ_1G 0x40000000 -#define SZ_2G 0x80000000 - -#endif - -/* END */ +#include <asm-generic/sizes.h> diff --git a/arch/sh/include/asm/thread_info.h b/arch/sh/include/asm/thread_info.h index c2289469..ea2d508 100644 --- a/arch/sh/include/asm/thread_info.h +++ b/arch/sh/include/asm/thread_info.h @@ -95,7 +95,7 @@ static inline struct thread_info *current_thread_info(void) #endif -extern struct thread_info *alloc_thread_info(struct task_struct *tsk); +extern struct thread_info *alloc_thread_info_node(struct task_struct *tsk, int node); extern void free_thread_info(struct thread_info *ti); extern void arch_task_cache_init(void); #define arch_task_cache_init arch_task_cache_init diff --git a/arch/sh/include/asm/unistd_32.h b/arch/sh/include/asm/unistd_32.h index b5a74e8..ca7765e 100644 --- a/arch/sh/include/asm/unistd_32.h +++ b/arch/sh/include/asm/unistd_32.h @@ -372,8 +372,9 @@ #define __NR_name_to_handle_at 359 #define __NR_open_by_handle_at 360 #define __NR_clock_adjtime 361 +#define __NR_syncfs 362 -#define NR_syscalls 362 +#define NR_syscalls 363 #ifdef __KERNEL__ diff --git a/arch/sh/include/asm/unistd_64.h b/arch/sh/include/asm/unistd_64.h index 953da4a..a694009 100644 --- a/arch/sh/include/asm/unistd_64.h +++ b/arch/sh/include/asm/unistd_64.h @@ -393,10 +393,11 @@ #define __NR_name_to_handle_at 370 #define __NR_open_by_handle_at 371 #define __NR_clock_adjtime 372 +#define __NR_syncfs 373 #ifdef __KERNEL__ -#define NR_syscalls 373 +#define NR_syscalls 374 #define __ARCH_WANT_IPC_PARSE_VERSION #define __ARCH_WANT_OLD_READDIR diff --git a/arch/sh/kernel/crash_dump.c b/arch/sh/kernel/crash_dump.c index 37c97d4..569e7b1 100644 --- a/arch/sh/kernel/crash_dump.c +++ b/arch/sh/kernel/crash_dump.c @@ -9,28 +9,6 @@ #include <linux/io.h> #include <asm/uaccess.h> -/* Stores the physical address of elf header of crash image. */ -unsigned long long elfcorehdr_addr = ELFCORE_ADDR_MAX; - -/* - * Note: elfcorehdr_addr is not just limited to vmcore. It is also used by - * is_kdump_kernel() to determine if we are booting after a panic. Hence - * ifdef it under CONFIG_CRASH_DUMP and not CONFIG_PROC_VMCORE. - * - * elfcorehdr= specifies the location of elf core header - * stored by the crashed kernel. - */ -static int __init parse_elfcorehdr(char *arg) -{ - if (!arg) - return -EINVAL; - - elfcorehdr_addr = memparse(arg, &arg); - - return 0; -} -early_param("elfcorehdr", parse_elfcorehdr); - /** * copy_oldmem_page - copy one page from "oldmem" * @pfn: page frame number to be copied diff --git a/arch/sh/kernel/process.c b/arch/sh/kernel/process.c index dcb126d..325f98b 100644 --- a/arch/sh/kernel/process.c +++ b/arch/sh/kernel/process.c @@ -32,16 +32,16 @@ void free_thread_xstate(struct task_struct *tsk) #if THREAD_SHIFT < PAGE_SHIFT static struct kmem_cache *thread_info_cache; -struct thread_info *alloc_thread_info(struct task_struct *tsk) +struct thread_info *alloc_thread_info_node(struct task_struct *tsk, int node) { struct thread_info *ti; - - ti = kmem_cache_alloc(thread_info_cache, GFP_KERNEL); - if (unlikely(ti == NULL)) - return NULL; #ifdef CONFIG_DEBUG_STACK_USAGE - memset(ti, 0, THREAD_SIZE); + gfp_t mask = GFP_KERNEL | __GFP_ZERO; +#else + gfp_t mask = GFP_KERNEL; #endif + + ti = kmem_cache_alloc_node(thread_info_cache, mask, node); return ti; } @@ -57,14 +57,16 @@ void thread_info_cache_init(void) THREAD_SIZE, SLAB_PANIC, NULL); } #else -struct thread_info *alloc_thread_info(struct task_struct *tsk) +struct thread_info *alloc_thread_info_node(struct task_struct *tsk, int node) { #ifdef CONFIG_DEBUG_STACK_USAGE gfp_t mask = GFP_KERNEL | __GFP_ZERO; #else gfp_t mask = GFP_KERNEL; #endif - return (struct thread_info *)__get_free_pages(mask, THREAD_SIZE_ORDER); + struct page *page = alloc_pages_node(node, mask, THREAD_SIZE_ORDER); + + return page ? page_address(page) : NULL; } void free_thread_info(struct thread_info *ti) diff --git a/arch/sh/kernel/ptrace_32.c b/arch/sh/kernel/ptrace_32.c index 90a15d2..2130ca6 100644 --- a/arch/sh/kernel/ptrace_32.c +++ b/arch/sh/kernel/ptrace_32.c @@ -101,6 +101,8 @@ static int set_single_step(struct task_struct *tsk, unsigned long addr) attr = bp->attr; attr.bp_addr = addr; + /* reenable breakpoint */ + attr.disabled = false; err = modify_user_hw_breakpoint(bp, &attr); if (unlikely(err)) return err; @@ -392,6 +394,9 @@ long arch_ptrace(struct task_struct *child, long request, tmp = 0; } else { unsigned long index; + ret = init_fpu(child); + if (ret) + break; index = addr - offsetof(struct user, fpu); tmp = ((unsigned long *)child->thread.xstate) [index >> 2]; @@ -423,6 +428,9 @@ long arch_ptrace(struct task_struct *child, long request, else if (addr >= offsetof(struct user, fpu) && addr < offsetof(struct user, u_fpvalid)) { unsigned long index; + ret = init_fpu(child); + if (ret) + break; index = addr - offsetof(struct user, fpu); set_stopped_child_used_math(child); ((unsigned long *)child->thread.xstate) diff --git a/arch/sh/kernel/ptrace_64.c b/arch/sh/kernel/ptrace_64.c index 4436eac..c8f9764 100644 --- a/arch/sh/kernel/ptrace_64.c +++ b/arch/sh/kernel/ptrace_64.c @@ -403,6 +403,9 @@ long arch_ptrace(struct task_struct *child, long request, else if ((addr >= offsetof(struct user, fpu)) && (addr < offsetof(struct user, u_fpvalid))) { unsigned long index; + ret = init_fpu(child); + if (ret) + break; index = addr - offsetof(struct user, fpu); tmp = get_fpu_long(child, index); } else if (addr == offsetof(struct user, u_fpvalid)) { @@ -442,6 +445,9 @@ long arch_ptrace(struct task_struct *child, long request, else if ((addr >= offsetof(struct user, fpu)) && (addr < offsetof(struct user, u_fpvalid))) { unsigned long index; + ret = init_fpu(child); + if (ret) + break; index = addr - offsetof(struct user, fpu); ret = put_fpu_long(child, index, data); } diff --git a/arch/sh/kernel/syscalls_32.S b/arch/sh/kernel/syscalls_32.S index 768fb33..030966a 100644 --- a/arch/sh/kernel/syscalls_32.S +++ b/arch/sh/kernel/syscalls_32.S @@ -379,3 +379,4 @@ ENTRY(sys_call_table) .long sys_name_to_handle_at .long sys_open_by_handle_at /* 360 */ .long sys_clock_adjtime + .long sys_syncfs diff --git a/arch/sh/kernel/syscalls_64.S b/arch/sh/kernel/syscalls_64.S index 44e7b00..ca0a614 100644 --- a/arch/sh/kernel/syscalls_64.S +++ b/arch/sh/kernel/syscalls_64.S @@ -399,3 +399,4 @@ sys_call_table: .long sys_name_to_handle_at /* 370 */ .long sys_open_by_handle_at .long sys_clock_adjtime + .long sys_syncfs diff --git a/arch/sh/kernel/vsyscall/vsyscall.c b/arch/sh/kernel/vsyscall/vsyscall.c index 242117c..1d6d51a 100644 --- a/arch/sh/kernel/vsyscall/vsyscall.c +++ b/arch/sh/kernel/vsyscall/vsyscall.c @@ -94,17 +94,17 @@ const char *arch_vma_name(struct vm_area_struct *vma) return NULL; } -struct vm_area_struct *get_gate_vma(struct task_struct *task) +struct vm_area_struct *get_gate_vma(struct mm_struct *mm) { return NULL; } -int in_gate_area(struct task_struct *task, unsigned long address) +int in_gate_area(struct mm_struct *mm, unsigned long address) { return 0; } -int in_gate_area_no_task(unsigned long address) +int in_gate_area_no_mm(unsigned long address) { return 0; } diff --git a/arch/sh/mm/pmb.c b/arch/sh/mm/pmb.c index b20b1b3..fad52f1 100644 --- a/arch/sh/mm/pmb.c +++ b/arch/sh/mm/pmb.c @@ -3,7 +3,7 @@ * * Privileged Space Mapping Buffer (PMB) Support. * - * Copyright (C) 2005 - 2010 Paul Mundt + * Copyright (C) 2005 - 2011 Paul Mundt * Copyright (C) 2010 Matt Fleming * * This file is subject to the terms and conditions of the GNU General Public @@ -12,7 +12,7 @@ */ #include <linux/init.h> #include <linux/kernel.h> -#include <linux/sysdev.h> +#include <linux/syscore_ops.h> #include <linux/cpu.h> #include <linux/module.h> #include <linux/bitops.h> @@ -874,46 +874,31 @@ static int __init pmb_debugfs_init(void) subsys_initcall(pmb_debugfs_init); #ifdef CONFIG_PM -static int pmb_sysdev_suspend(struct sys_device *dev, pm_message_t state) +static void pmb_syscore_resume(void) { - static pm_message_t prev_state; + struct pmb_entry *pmbe; int i; - /* Restore the PMB after a resume from hibernation */ - if (state.event == PM_EVENT_ON && - prev_state.event == PM_EVENT_FREEZE) { - struct pmb_entry *pmbe; - - read_lock(&pmb_rwlock); + read_lock(&pmb_rwlock); - for (i = 0; i < ARRAY_SIZE(pmb_entry_list); i++) { - if (test_bit(i, pmb_map)) { - pmbe = &pmb_entry_list[i]; - set_pmb_entry(pmbe); - } + for (i = 0; i < ARRAY_SIZE(pmb_entry_list); i++) { + if (test_bit(i, pmb_map)) { + pmbe = &pmb_entry_list[i]; + set_pmb_entry(pmbe); } - - read_unlock(&pmb_rwlock); } - prev_state = state; - - return 0; -} - -static int pmb_sysdev_resume(struct sys_device *dev) -{ - return pmb_sysdev_suspend(dev, PMSG_ON); + read_unlock(&pmb_rwlock); } -static struct sysdev_driver pmb_sysdev_driver = { - .suspend = pmb_sysdev_suspend, - .resume = pmb_sysdev_resume, +static struct syscore_ops pmb_syscore_ops = { + .resume = pmb_syscore_resume, }; static int __init pmb_sysdev_init(void) { - return sysdev_driver_register(&cpu_sysdev_class, &pmb_sysdev_driver); + register_syscore_ops(&pmb_syscore_ops); + return 0; } subsys_initcall(pmb_sysdev_init); #endif diff --git a/arch/sparc/Kconfig b/arch/sparc/Kconfig index e48f471..f766e6b 100644 --- a/arch/sparc/Kconfig +++ b/arch/sparc/Kconfig @@ -192,6 +192,10 @@ config GENERIC_FIND_NEXT_BIT bool default y +config GENERIC_FIND_BIT_LE + bool + default y + config GENERIC_HWEIGHT bool default y if !ULTRA_HAS_POPULATION_COUNT diff --git a/arch/sparc/include/asm/bitops_32.h b/arch/sparc/include/asm/bitops_32.h index 9cf4ae0..25a6766 100644 --- a/arch/sparc/include/asm/bitops_32.h +++ b/arch/sparc/include/asm/bitops_32.h @@ -103,9 +103,8 @@ static inline void change_bit(unsigned long nr, volatile unsigned long *addr) #include <asm-generic/bitops/hweight.h> #include <asm-generic/bitops/lock.h> #include <asm-generic/bitops/find.h> -#include <asm-generic/bitops/ext2-non-atomic.h> +#include <asm-generic/bitops/le.h> #include <asm-generic/bitops/ext2-atomic.h> -#include <asm-generic/bitops/minix.h> #endif /* __KERNEL__ */ diff --git a/arch/sparc/include/asm/bitops_64.h b/arch/sparc/include/asm/bitops_64.h index 766121a..38e9aa1 100644 --- a/arch/sparc/include/asm/bitops_64.h +++ b/arch/sparc/include/asm/bitops_64.h @@ -89,15 +89,13 @@ static inline unsigned int __arch_hweight8(unsigned int w) #ifdef __KERNEL__ -#include <asm-generic/bitops/ext2-non-atomic.h> +#include <asm-generic/bitops/le.h> #define ext2_set_bit_atomic(lock,nr,addr) \ test_and_set_bit((nr) ^ 0x38,(unsigned long *)(addr)) #define ext2_clear_bit_atomic(lock,nr,addr) \ test_and_clear_bit((nr) ^ 0x38,(unsigned long *)(addr)) -#include <asm-generic/bitops/minix.h> - #endif /* __KERNEL__ */ #endif /* defined(_SPARC64_BITOPS_H) */ diff --git a/arch/sparc/include/asm/thread_info_32.h b/arch/sparc/include/asm/thread_info_32.h index 9dd0318..fa57532 100644 --- a/arch/sparc/include/asm/thread_info_32.h +++ b/arch/sparc/include/asm/thread_info_32.h @@ -82,8 +82,8 @@ register struct thread_info *current_thread_info_reg asm("g6"); #define __HAVE_ARCH_THREAD_INFO_ALLOCATOR -BTFIXUPDEF_CALL(struct thread_info *, alloc_thread_info, void) -#define alloc_thread_info(tsk) BTFIXUP_CALL(alloc_thread_info)() +BTFIXUPDEF_CALL(struct thread_info *, alloc_thread_info_node, int) +#define alloc_thread_info_node(tsk, node) BTFIXUP_CALL(alloc_thread_info_node)(node) BTFIXUPDEF_CALL(void, free_thread_info, struct thread_info *) #define free_thread_info(ti) BTFIXUP_CALL(free_thread_info)(ti) @@ -92,7 +92,7 @@ BTFIXUPDEF_CALL(void, free_thread_info, struct thread_info *) /* * Size of kernel stack for each process. - * Observe the order of get_free_pages() in alloc_thread_info(). + * Observe the order of get_free_pages() in alloc_thread_info_node(). * The sun4 has 8K stack too, because it's short on memory, and 16K is a waste. */ #define THREAD_SIZE 8192 diff --git a/arch/sparc/include/asm/thread_info_64.h b/arch/sparc/include/asm/thread_info_64.h index fb2ea77..60d86be 100644 --- a/arch/sparc/include/asm/thread_info_64.h +++ b/arch/sparc/include/asm/thread_info_64.h @@ -146,21 +146,21 @@ register struct thread_info *current_thread_info_reg asm("g6"); #define __HAVE_ARCH_THREAD_INFO_ALLOCATOR #ifdef CONFIG_DEBUG_STACK_USAGE -#define alloc_thread_info(tsk) \ -({ \ - struct thread_info *ret; \ - \ - ret = (struct thread_info *) \ - __get_free_pages(GFP_KERNEL, __THREAD_INFO_ORDER); \ - if (ret) \ - memset(ret, 0, PAGE_SIZE<<__THREAD_INFO_ORDER); \ - ret; \ -}) +#define THREAD_FLAGS (GFP_KERNEL | __GFP_ZERO) #else -#define alloc_thread_info(tsk) \ - ((struct thread_info *)__get_free_pages(GFP_KERNEL, __THREAD_INFO_ORDER)) +#define THREAD_FLAGS (GFP_KERNEL) #endif +#define alloc_thread_info_node(tsk, node) \ +({ \ + struct page *page = alloc_pages_node(node, THREAD_FLAGS, \ + __THREAD_INFO_ORDER); \ + struct thread_info *ret; \ + \ + ret = page ? page_address(page) : NULL; \ + ret; \ +}) + #define free_thread_info(ti) \ free_pages((unsigned long)(ti),__THREAD_INFO_ORDER) diff --git a/arch/sparc/include/asm/types.h b/arch/sparc/include/asm/types.h index 09c79a9..91e5a03 100644 --- a/arch/sparc/include/asm/types.h +++ b/arch/sparc/include/asm/types.h @@ -18,28 +18,6 @@ typedef unsigned short umode_t; #endif /* __ASSEMBLY__ */ -#ifdef __KERNEL__ - -#ifndef __ASSEMBLY__ - -/* Dma addresses come in generic and 64-bit flavours. */ - -typedef u32 dma_addr_t; - -#if defined(__arch64__) - -/*** SPARC 64 bit ***/ -typedef u64 dma64_addr_t; -#else -/*** SPARC 32 bit ***/ -typedef u32 dma64_addr_t; - -#endif /* defined(__arch64__) */ - -#endif /* __ASSEMBLY__ */ - -#endif /* __KERNEL__ */ - #endif /* defined(__sparc__) */ #endif /* defined(_SPARC_TYPES_H) */ diff --git a/arch/sparc/mm/init_32.c b/arch/sparc/mm/init_32.c index 6d0e02c..4c31e2b 100644 --- a/arch/sparc/mm/init_32.c +++ b/arch/sparc/mm/init_32.c @@ -75,7 +75,7 @@ void __init kmap_init(void) kmap_prot = __pgprot(SRMMU_ET_PTE | SRMMU_PRIV | SRMMU_CACHE); } -void show_mem(void) +void show_mem(unsigned int filter) { printk("Mem-info:\n"); show_free_areas(); diff --git a/arch/sparc/mm/srmmu.c b/arch/sparc/mm/srmmu.c index 92319aa..fe09fd8 100644 --- a/arch/sparc/mm/srmmu.c +++ b/arch/sparc/mm/srmmu.c @@ -650,7 +650,7 @@ static void srmmu_unmapiorange(unsigned long virt_addr, unsigned int len) * mappings on the kernel stack without any special code as we did * need on the sun4c. */ -static struct thread_info *srmmu_alloc_thread_info(void) +static struct thread_info *srmmu_alloc_thread_info_node(int node) { struct thread_info *ret; @@ -2271,7 +2271,7 @@ void __init ld_mmu_srmmu(void) BTFIXUPSET_CALL(mmu_info, srmmu_mmu_info, BTFIXUPCALL_NORM); - BTFIXUPSET_CALL(alloc_thread_info, srmmu_alloc_thread_info, BTFIXUPCALL_NORM); + BTFIXUPSET_CALL(alloc_thread_info_node, srmmu_alloc_thread_info_node, BTFIXUPCALL_NORM); BTFIXUPSET_CALL(free_thread_info, srmmu_free_thread_info, BTFIXUPCALL_NORM); BTFIXUPSET_CALL(pte_to_pgoff, srmmu_pte_to_pgoff, BTFIXUPCALL_NORM); diff --git a/arch/sparc/mm/sun4c.c b/arch/sparc/mm/sun4c.c index b5137cc..a2350b5 100644 --- a/arch/sparc/mm/sun4c.c +++ b/arch/sparc/mm/sun4c.c @@ -922,7 +922,7 @@ static inline void garbage_collect(int entry) free_locked_segment(BUCKET_ADDR(entry)); } -static struct thread_info *sun4c_alloc_thread_info(void) +static struct thread_info *sun4c_alloc_thread_info_node(int node) { unsigned long addr, pages; int entry; @@ -2155,7 +2155,7 @@ void __init ld_mmu_sun4c(void) BTFIXUPSET_CALL(__swp_offset, sun4c_swp_offset, BTFIXUPCALL_NORM); BTFIXUPSET_CALL(__swp_entry, sun4c_swp_entry, BTFIXUPCALL_NORM); - BTFIXUPSET_CALL(alloc_thread_info, sun4c_alloc_thread_info, BTFIXUPCALL_NORM); + BTFIXUPSET_CALL(alloc_thread_info_node, sun4c_alloc_thread_info_node, BTFIXUPCALL_NORM); BTFIXUPSET_CALL(free_thread_info, sun4c_free_thread_info, BTFIXUPCALL_NORM); BTFIXUPSET_CALL(mmu_info, sun4c_mmu_info, BTFIXUPCALL_NORM); diff --git a/arch/tile/include/asm/bitops.h b/arch/tile/include/asm/bitops.h index 6d4f0ff..132e6bb 100644 --- a/arch/tile/include/asm/bitops.h +++ b/arch/tile/include/asm/bitops.h @@ -122,7 +122,6 @@ static inline unsigned long __arch_hweight64(__u64 w) #include <asm-generic/bitops/lock.h> #include <asm-generic/bitops/find.h> #include <asm-generic/bitops/sched.h> -#include <asm-generic/bitops/ext2-non-atomic.h> -#include <asm-generic/bitops/minix.h> +#include <asm-generic/bitops/le.h> #endif /* _ASM_TILE_BITOPS_H */ diff --git a/arch/tile/include/asm/thread_info.h b/arch/tile/include/asm/thread_info.h index 9e8e9c4..3405b52 100644 --- a/arch/tile/include/asm/thread_info.h +++ b/arch/tile/include/asm/thread_info.h @@ -84,7 +84,7 @@ register unsigned long stack_pointer __asm__("sp"); ((struct thread_info *)(stack_pointer & -THREAD_SIZE)) #define __HAVE_ARCH_THREAD_INFO_ALLOCATOR -extern struct thread_info *alloc_thread_info(struct task_struct *task); +extern struct thread_info *alloc_thread_info_node(struct task_struct *task, int node); extern void free_thread_info(struct thread_info *info); /* Sit on a nap instruction until interrupted. */ diff --git a/arch/tile/kernel/process.c b/arch/tile/kernel/process.c index b9cd962..d006510 100644 --- a/arch/tile/kernel/process.c +++ b/arch/tile/kernel/process.c @@ -109,7 +109,7 @@ void cpu_idle(void) } } -struct thread_info *alloc_thread_info(struct task_struct *task) +struct thread_info *alloc_thread_info_node(struct task_struct *task, int node) { struct page *page; gfp_t flags = GFP_KERNEL; @@ -118,7 +118,7 @@ struct thread_info *alloc_thread_info(struct task_struct *task) flags |= __GFP_ZERO; #endif - page = alloc_pages(flags, THREAD_SIZE_ORDER); + page = alloc_pages_node(node, flags, THREAD_SIZE_ORDER); if (!page) return NULL; diff --git a/arch/tile/lib/atomic_32.c b/arch/tile/lib/atomic_32.c index f02040d..4657021 100644 --- a/arch/tile/lib/atomic_32.c +++ b/arch/tile/lib/atomic_32.c @@ -202,32 +202,32 @@ static inline int *__futex_setup(int __user *v) return __atomic_hashed_lock((int __force *)v); } -struct __get_user futex_set(int __user *v, int i) +struct __get_user futex_set(u32 __user *v, int i) { return __atomic_xchg((int __force *)v, __futex_setup(v), i); } -struct __get_user futex_add(int __user *v, int n) +struct __get_user futex_add(u32 __user *v, int n) { return __atomic_xchg_add((int __force *)v, __futex_setup(v), n); } -struct __get_user futex_or(int __user *v, int n) +struct __get_user futex_or(u32 __user *v, int n) { return __atomic_or((int __force *)v, __futex_setup(v), n); } -struct __get_user futex_andn(int __user *v, int n) +struct __get_user futex_andn(u32 __user *v, int n) { return __atomic_andn((int __force *)v, __futex_setup(v), n); } -struct __get_user futex_xor(int __user *v, int n) +struct __get_user futex_xor(u32 __user *v, int n) { return __atomic_xor((int __force *)v, __futex_setup(v), n); } -struct __get_user futex_cmpxchg(int __user *v, int o, int n) +struct __get_user futex_cmpxchg(u32 __user *v, int o, int n) { return __atomic_cmpxchg((int __force *)v, __futex_setup(v), o, n); } diff --git a/arch/tile/mm/pgtable.c b/arch/tile/mm/pgtable.c index 1a2b36f..de7d8e2 100644 --- a/arch/tile/mm/pgtable.c +++ b/arch/tile/mm/pgtable.c @@ -41,7 +41,7 @@ * The normal show_free_areas() is too verbose on Tile, with dozens * of processors and often four NUMA zones each with high and lowmem. */ -void show_mem(void) +void show_mem(unsigned int filter) { struct zone *zone; diff --git a/arch/um/drivers/line.c b/arch/um/drivers/line.c index 050e4dd..35dd0b8 100644 --- a/arch/um/drivers/line.c +++ b/arch/um/drivers/line.c @@ -255,8 +255,8 @@ static const struct { { KDSIGACCEPT, KERN_INFO, "KDSIGACCEPT" }, }; -int line_ioctl(struct tty_struct *tty, struct file * file, - unsigned int cmd, unsigned long arg) +int line_ioctl(struct tty_struct *tty, unsigned int cmd, + unsigned long arg) { int ret; int i; diff --git a/arch/um/include/asm/processor-generic.h b/arch/um/include/asm/processor-generic.h index bed6688..d1d1b0d 100644 --- a/arch/um/include/asm/processor-generic.h +++ b/arch/um/include/asm/processor-generic.h @@ -66,7 +66,7 @@ struct thread_struct { .request = { 0 } \ } -extern struct task_struct *alloc_task_struct(void); +extern struct task_struct *alloc_task_struct_node(int node); static inline void release_thread(struct task_struct *task) { diff --git a/arch/um/include/shared/line.h b/arch/um/include/shared/line.h index 311a0d3..72f4f25 100644 --- a/arch/um/include/shared/line.h +++ b/arch/um/include/shared/line.h @@ -77,8 +77,8 @@ extern int line_chars_in_buffer(struct tty_struct *tty); extern void line_flush_buffer(struct tty_struct *tty); extern void line_flush_chars(struct tty_struct *tty); extern int line_write_room(struct tty_struct *tty); -extern int line_ioctl(struct tty_struct *tty, struct file * file, - unsigned int cmd, unsigned long arg); +extern int line_ioctl(struct tty_struct *tty, unsigned int cmd, + unsigned long arg); extern void line_throttle(struct tty_struct *tty); extern void line_unthrottle(struct tty_struct *tty); diff --git a/arch/um/sys-i386/asm/elf.h b/arch/um/sys-i386/asm/elf.h index a979a22..d964a41 100644 --- a/arch/um/sys-i386/asm/elf.h +++ b/arch/um/sys-i386/asm/elf.h @@ -75,6 +75,8 @@ typedef struct user_i387_struct elf_fpregset_t; pr_reg[16] = PT_REGS_SS(regs); \ } while (0); +#define task_pt_regs(t) (&(t)->thread.regs) + struct task_struct; extern int elf_core_copy_fpregs(struct task_struct *t, elf_fpregset_t *fpu); diff --git a/arch/um/sys-ppc/Makefile b/arch/um/sys-ppc/Makefile index b8bc844..20d363b 100644 --- a/arch/um/sys-ppc/Makefile +++ b/arch/um/sys-ppc/Makefile @@ -6,7 +6,7 @@ OBJ = built-in.o OBJS = ptrace.o sigcontext.o checksum.o miscthings.o misc.o \ ptrace_user.o sysrq.o -EXTRA_AFLAGS := -DCONFIG_PPC32 -I. -I$(srctree)/arch/ppc/kernel +asflags-y := -DCONFIG_PPC32 -I. -I$(srctree)/arch/ppc/kernel all: $(OBJ) @@ -15,10 +15,10 @@ $(OBJ): $(OBJS) $(LD) $(LINKFLAGS) --start-group $^ --end-group -o $@ ptrace_user.o: ptrace_user.c - $(CC) -D__KERNEL__ $(USER_CFLAGS) $(EXTRA_CFLAGS) -c -o $@ $< + $(CC) -D__KERNEL__ $(USER_CFLAGS) $(ccflags-y) -c -o $@ $< sigcontext.o: sigcontext.c - $(CC) $(USER_CFLAGS) $(EXTRA_CFLAGS) -c -o $@ $< + $(CC) $(USER_CFLAGS) $(ccflags-y) -c -o $@ $< checksum.S: rm -f $@ @@ -53,13 +53,13 @@ ppc_defs.h: mk_defs.c ppc_defs.head \ checksum.o: checksum.S rm -f asm ln -s $(srctree)/include/asm-ppc asm - $(CC) $(EXTRA_AFLAGS) $(KBUILD_AFLAGS) -D__ASSEMBLY__ -D__UM_PPC__ -c $< -o $*.o + $(CC) $(asflags-y) $(KBUILD_AFLAGS) -D__ASSEMBLY__ -D__UM_PPC__ -c $< -o $*.o rm -f asm misc.o: misc.S ppc_defs.h rm -f asm ln -s $(srctree)/include/asm-ppc asm - $(CC) $(EXTRA_AFLAGS) $(KBUILD_AFLAGS) -D__ASSEMBLY__ -D__UM_PPC__ -c $< -o $*.o + $(CC) $(asflags-y) $(KBUILD_AFLAGS) -D__ASSEMBLY__ -D__UM_PPC__ -c $< -o $*.o rm -f asm clean-files := $(OBJS) ppc_defs.h checksum.S mk_defs.c diff --git a/arch/um/sys-x86_64/asm/elf.h b/arch/um/sys-x86_64/asm/elf.h index d760967f..d6d5af3 100644 --- a/arch/um/sys-x86_64/asm/elf.h +++ b/arch/um/sys-x86_64/asm/elf.h @@ -95,6 +95,8 @@ typedef struct user_i387_struct elf_fpregset_t; (pr_reg)[25] = 0; \ (pr_reg)[26] = 0; +#define task_pt_regs(t) (&(t)->thread.regs) + struct task_struct; extern int elf_core_copy_fpregs(struct task_struct *t, elf_fpregset_t *fpu); diff --git a/arch/unicore32/mm/init.c b/arch/unicore32/mm/init.c index 3dbe370..1fc0263 100644 --- a/arch/unicore32/mm/init.c +++ b/arch/unicore32/mm/init.c @@ -55,7 +55,7 @@ early_param("initrd", early_initrd); */ struct meminfo meminfo; -void show_mem(void) +void show_mem(unsigned int filter) { int free = 0, total = 0, reserved = 0; int shared = 0, cached = 0, slab = 0, i; diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index e1f65c4..140e254 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -123,7 +123,7 @@ config NEED_SG_DMA_LENGTH def_bool y config GENERIC_ISA_DMA - def_bool y + def_bool ISA_DMA_API config GENERIC_IOMAP def_bool y @@ -143,7 +143,7 @@ config GENERIC_GPIO bool config ARCH_MAY_HAVE_PC_FDC - def_bool y + def_bool ISA_DMA_API config RWSEM_GENERIC_SPINLOCK def_bool !X86_XADD @@ -2002,9 +2002,13 @@ source "drivers/pci/pcie/Kconfig" source "drivers/pci/Kconfig" -# x86_64 have no ISA slots, but do have ISA-style DMA. +# x86_64 have no ISA slots, but can have ISA-style DMA. config ISA_DMA_API - def_bool y + bool "ISA-style DMA support" if (X86_64 && EXPERT) + default y + help + Enables ISA-style DMA support for devices requiring such controllers. + If unsure, say Y. if X86_32 @@ -2092,6 +2096,16 @@ source "drivers/pcmcia/Kconfig" source "drivers/pci/hotplug/Kconfig" +config RAPIDIO + bool "RapidIO support" + depends on PCI + default n + help + If you say Y here, the kernel will include drivers and + infrastructure code to support RapidIO interconnect devices. + +source "drivers/rapidio/Kconfig" + endmenu diff --git a/arch/x86/ia32/ia32_aout.c b/arch/x86/ia32/ia32_aout.c index 2d93bdb..fd84387 100644 --- a/arch/x86/ia32/ia32_aout.c +++ b/arch/x86/ia32/ia32_aout.c @@ -298,6 +298,7 @@ static int load_aout_binary(struct linux_binprm *bprm, struct pt_regs *regs) /* OK, This is the point of no return */ set_personality(PER_LINUX); set_thread_flag(TIF_IA32); + current->mm->context.ia32_compat = 1; setup_new_exec(bprm); diff --git a/arch/x86/ia32/ia32entry.S b/arch/x86/ia32/ia32entry.S index 430312b..849a9d2 100644 --- a/arch/x86/ia32/ia32entry.S +++ b/arch/x86/ia32/ia32entry.S @@ -847,4 +847,5 @@ ia32_sys_call_table: .quad sys_name_to_handle_at .quad compat_sys_open_by_handle_at .quad compat_sys_clock_adjtime + .quad sys_syncfs ia32_syscall_end: diff --git a/arch/x86/include/asm/acpi.h b/arch/x86/include/asm/acpi.h index 448d73a..12e0e7d 100644 --- a/arch/x86/include/asm/acpi.h +++ b/arch/x86/include/asm/acpi.h @@ -114,9 +114,8 @@ static inline void acpi_disable_pci(void) acpi_noirq_set(); } -/* routines for saving/restoring kernel state */ -extern int acpi_save_state_mem(void); -extern void acpi_restore_state_mem(void); +/* Low-level suspend routine. */ +extern int acpi_suspend_lowlevel(void); extern const unsigned char acpi_wakeup_code[]; #define acpi_wakeup_address (__pa(TRAMPOLINE_SYM(acpi_wakeup_code))) diff --git a/arch/x86/include/asm/bitops.h b/arch/x86/include/asm/bitops.h index 903683b0..69d5813 100644 --- a/arch/x86/include/asm/bitops.h +++ b/arch/x86/include/asm/bitops.h @@ -456,14 +456,12 @@ static inline int fls(int x) #ifdef __KERNEL__ -#include <asm-generic/bitops/ext2-non-atomic.h> +#include <asm-generic/bitops/le.h> #define ext2_set_bit_atomic(lock, nr, addr) \ test_and_set_bit((nr), (unsigned long *)(addr)) #define ext2_clear_bit_atomic(lock, nr, addr) \ test_and_clear_bit((nr), (unsigned long *)(addr)) -#include <asm-generic/bitops/minix.h> - #endif /* __KERNEL__ */ #endif /* _ASM_X86_BITOPS_H */ diff --git a/arch/x86/include/asm/dma.h b/arch/x86/include/asm/dma.h index ca1098a..97b6d81 100644 --- a/arch/x86/include/asm/dma.h +++ b/arch/x86/include/asm/dma.h @@ -151,6 +151,7 @@ #define DMA_AUTOINIT 0x10 +#ifdef CONFIG_ISA_DMA_API extern spinlock_t dma_spin_lock; static inline unsigned long claim_dma_lock(void) @@ -164,6 +165,7 @@ static inline void release_dma_lock(unsigned long flags) { spin_unlock_irqrestore(&dma_spin_lock, flags); } +#endif /* CONFIG_ISA_DMA_API */ /* enable/disable a specific DMA channel */ static inline void enable_dma(unsigned int dmanr) @@ -303,9 +305,11 @@ static inline int get_dma_residue(unsigned int dmanr) } -/* These are in kernel/dma.c: */ +/* These are in kernel/dma.c because x86 uses CONFIG_GENERIC_ISA_DMA */ +#ifdef CONFIG_ISA_DMA_API extern int request_dma(unsigned int dmanr, const char *device_id); extern void free_dma(unsigned int dmanr); +#endif /* From PCI */ diff --git a/arch/x86/include/asm/mmu.h b/arch/x86/include/asm/mmu.h index 80a1dee..aeff3e8 100644 --- a/arch/x86/include/asm/mmu.h +++ b/arch/x86/include/asm/mmu.h @@ -13,6 +13,12 @@ typedef struct { int size; struct mutex lock; void *vdso; + +#ifdef CONFIG_X86_64 + /* True if mm supports a task running in 32 bit compatibility mode. */ + unsigned short ia32_compat; +#endif + } mm_context_t; #ifdef CONFIG_SMP diff --git a/arch/x86/include/asm/thread_info.h b/arch/x86/include/asm/thread_info.h index f0b6e5d..1f2e61e 100644 --- a/arch/x86/include/asm/thread_info.h +++ b/arch/x86/include/asm/thread_info.h @@ -161,8 +161,14 @@ struct thread_info { #define __HAVE_ARCH_THREAD_INFO_ALLOCATOR -#define alloc_thread_info(tsk) \ - ((struct thread_info *)__get_free_pages(THREAD_FLAGS, THREAD_ORDER)) +#define alloc_thread_info_node(tsk, node) \ +({ \ + struct page *page = alloc_pages_node(node, THREAD_FLAGS, \ + THREAD_ORDER); \ + struct thread_info *ret = page ? page_address(page) : NULL; \ + \ + ret; \ +}) #ifdef CONFIG_X86_32 diff --git a/arch/x86/include/asm/types.h b/arch/x86/include/asm/types.h index df1da20..8e8c23f 100644 --- a/arch/x86/include/asm/types.h +++ b/arch/x86/include/asm/types.h @@ -1,22 +1,6 @@ #ifndef _ASM_X86_TYPES_H #define _ASM_X86_TYPES_H -#define dma_addr_t dma_addr_t - #include <asm-generic/types.h> -#ifdef __KERNEL__ -#ifndef __ASSEMBLY__ - -typedef u64 dma64_addr_t; -#if defined(CONFIG_X86_64) || defined(CONFIG_HIGHMEM64G) -/* DMA addresses come in 32-bit and 64-bit flavours. */ -typedef u64 dma_addr_t; -#else -typedef u32 dma_addr_t; -#endif - -#endif /* __ASSEMBLY__ */ -#endif /* __KERNEL__ */ - #endif /* _ASM_X86_TYPES_H */ diff --git a/arch/x86/include/asm/unistd_32.h b/arch/x86/include/asm/unistd_32.h index ffaf183..a755ef5 100644 --- a/arch/x86/include/asm/unistd_32.h +++ b/arch/x86/include/asm/unistd_32.h @@ -349,10 +349,11 @@ #define __NR_name_to_handle_at 341 #define __NR_open_by_handle_at 342 #define __NR_clock_adjtime 343 +#define __NR_syncfs 344 #ifdef __KERNEL__ -#define NR_syscalls 344 +#define NR_syscalls 345 #define __ARCH_WANT_IPC_PARSE_VERSION #define __ARCH_WANT_OLD_READDIR diff --git a/arch/x86/include/asm/unistd_64.h b/arch/x86/include/asm/unistd_64.h index 5466bea..160fa76 100644 --- a/arch/x86/include/asm/unistd_64.h +++ b/arch/x86/include/asm/unistd_64.h @@ -675,6 +675,8 @@ __SYSCALL(__NR_name_to_handle_at, sys_name_to_handle_at) __SYSCALL(__NR_open_by_handle_at, sys_open_by_handle_at) #define __NR_clock_adjtime 305 __SYSCALL(__NR_clock_adjtime, sys_clock_adjtime) +#define __NR_syncfs 306 +__SYSCALL(__NR_syncfs, sys_syncfs) #ifndef __NO_STUBS #define __ARCH_WANT_OLD_READDIR diff --git a/arch/x86/kernel/Makefile b/arch/x86/kernel/Makefile index 743642f..7338ef2 100644 --- a/arch/x86/kernel/Makefile +++ b/arch/x86/kernel/Makefile @@ -41,7 +41,7 @@ obj-$(CONFIG_X86_32) += sys_i386_32.o i386_ksyms_32.o obj-$(CONFIG_X86_64) += sys_x86_64.o x8664_ksyms_64.o obj-$(CONFIG_X86_64) += syscall_64.o vsyscall_64.o obj-y += bootflag.o e820.o -obj-y += pci-dma.o quirks.o i8237.o topology.o kdebugfs.o +obj-y += pci-dma.o quirks.o topology.o kdebugfs.o obj-y += alternative.o i8253.o pci-nommu.o hw_breakpoint.o obj-y += tsc.o io_delay.o rtc.o obj-y += pci-iommu_table.o @@ -55,6 +55,7 @@ obj-$(CONFIG_X86_32) += tls.o obj-$(CONFIG_IA32_EMULATION) += tls.o obj-y += step.o obj-$(CONFIG_INTEL_TXT) += tboot.o +obj-$(CONFIG_ISA_DMA_API) += i8237.o obj-$(CONFIG_STACKTRACE) += stacktrace.o obj-y += cpu/ obj-y += acpi/ diff --git a/arch/x86/kernel/acpi/sleep.c b/arch/x86/kernel/acpi/sleep.c index 4572c58..ff93bc1 100644 --- a/arch/x86/kernel/acpi/sleep.c +++ b/arch/x86/kernel/acpi/sleep.c @@ -25,12 +25,12 @@ static char temp_stack[4096]; #endif /** - * acpi_save_state_mem - save kernel state + * acpi_suspend_lowlevel - save kernel state * * Create an identity mapped page table and copy the wakeup routine to * low memory. */ -int acpi_save_state_mem(void) +int acpi_suspend_lowlevel(void) { struct wakeup_header *header; /* address in low memory of the wakeup routine. */ @@ -96,16 +96,10 @@ int acpi_save_state_mem(void) saved_magic = 0x123456789abcdef0L; #endif /* CONFIG_64BIT */ + do_suspend_lowlevel(); return 0; } -/* - * acpi_restore_state - undo effects of acpi_save_state_mem - */ -void acpi_restore_state_mem(void) -{ -} - static int __init acpi_sleep_setup(char *str) { while ((str != NULL) && (*str != '\0')) { diff --git a/arch/x86/kernel/acpi/sleep.h b/arch/x86/kernel/acpi/sleep.h index 86ba1c8..416d4be 100644 --- a/arch/x86/kernel/acpi/sleep.h +++ b/arch/x86/kernel/acpi/sleep.h @@ -11,3 +11,5 @@ extern int wakeup_pmode_return; extern unsigned long acpi_copy_wakeup_routine(unsigned long); extern void wakeup_long64(void); + +extern void do_suspend_lowlevel(void); diff --git a/arch/x86/kernel/cpu/mcheck/mce-apei.c b/arch/x86/kernel/cpu/mcheck/mce-apei.c index 8209472..83930de 100644 --- a/arch/x86/kernel/cpu/mcheck/mce-apei.c +++ b/arch/x86/kernel/cpu/mcheck/mce-apei.c @@ -106,24 +106,34 @@ int apei_write_mce(struct mce *m) ssize_t apei_read_mce(struct mce *m, u64 *record_id) { struct cper_mce_record rcd; - ssize_t len; - - len = erst_read_next(&rcd.hdr, sizeof(rcd)); - if (len <= 0) - return len; - /* Can not skip other records in storage via ERST unless clear them */ - else if (len != sizeof(rcd) || - uuid_le_cmp(rcd.hdr.creator_id, CPER_CREATOR_MCE)) { - if (printk_ratelimit()) - pr_warning( - "MCE-APEI: Can not skip the unknown record in ERST"); - return -EIO; - } - + int rc, pos; + + rc = erst_get_record_id_begin(&pos); + if (rc) + return rc; +retry: + rc = erst_get_record_id_next(&pos, record_id); + if (rc) + goto out; + /* no more record */ + if (*record_id == APEI_ERST_INVALID_RECORD_ID) + goto out; + rc = erst_read(*record_id, &rcd.hdr, sizeof(rcd)); + /* someone else has cleared the record, try next one */ + if (rc == -ENOENT) + goto retry; + else if (rc < 0) + goto out; + /* try to skip other type records in storage */ + else if (rc != sizeof(rcd) || + uuid_le_cmp(rcd.hdr.creator_id, CPER_CREATOR_MCE)) + goto retry; memcpy(m, &rcd.mce, sizeof(*m)); - *record_id = rcd.hdr.record_id; + rc = sizeof(*m); +out: + erst_get_record_id_end(); - return sizeof(*m); + return rc; } /* Check whether there is record in ERST */ diff --git a/arch/x86/kernel/crash_dump_32.c b/arch/x86/kernel/crash_dump_32.c index d5cd139..642f75a 100644 --- a/arch/x86/kernel/crash_dump_32.c +++ b/arch/x86/kernel/crash_dump_32.c @@ -14,9 +14,6 @@ static void *kdump_buf_page; -/* Stores the physical address of elf header of crash image. */ -unsigned long long elfcorehdr_addr = ELFCORE_ADDR_MAX; - static inline bool is_crashed_pfn_valid(unsigned long pfn) { #ifndef CONFIG_X86_PAE diff --git a/arch/x86/kernel/crash_dump_64.c b/arch/x86/kernel/crash_dump_64.c index 9948288..afa64ad 100644 --- a/arch/x86/kernel/crash_dump_64.c +++ b/arch/x86/kernel/crash_dump_64.c @@ -10,9 +10,6 @@ #include <linux/uaccess.h> #include <linux/io.h> -/* Stores the physical address of elf header of crash image. */ -unsigned long long elfcorehdr_addr = ELFCORE_ADDR_MAX; - /** * copy_oldmem_page - copy one page from "oldmem" * @pfn: page frame number to be copied diff --git a/arch/x86/kernel/dumpstack.c b/arch/x86/kernel/dumpstack.c index 999e279..81ac6c7 100644 --- a/arch/x86/kernel/dumpstack.c +++ b/arch/x86/kernel/dumpstack.c @@ -322,16 +322,6 @@ void die(const char *str, struct pt_regs *regs, long err) oops_end(flags, regs, sig); } -static int __init oops_setup(char *s) -{ - if (!s) - return -EINVAL; - if (!strcmp(s, "panic")) - panic_on_oops = 1; - return 0; -} -early_param("oops", oops_setup); - static int __init kstack_setup(char *s) { if (!s) diff --git a/arch/x86/kernel/e820.c b/arch/x86/kernel/e820.c index cdf5bfd..3e2ef84 100644 --- a/arch/x86/kernel/e820.c +++ b/arch/x86/kernel/e820.c @@ -11,6 +11,7 @@ #include <linux/kernel.h> #include <linux/types.h> #include <linux/init.h> +#include <linux/crash_dump.h> #include <linux/bootmem.h> #include <linux/pfn.h> #include <linux/suspend.h> diff --git a/arch/x86/kernel/head64.c b/arch/x86/kernel/head64.c index 2d2673c..5655c22 100644 --- a/arch/x86/kernel/head64.c +++ b/arch/x86/kernel/head64.c @@ -77,9 +77,6 @@ void __init x86_64_start_kernel(char * real_mode_data) /* Make NULL pointers segfault */ zap_identity_mappings(); - /* Cleanup the over mapped high alias */ - cleanup_highmap(); - max_pfn_mapped = KERNEL_IMAGE_SIZE >> PAGE_SHIFT; for (i = 0; i < NUM_EXCEPTION_VECTORS; i++) { diff --git a/arch/x86/kernel/process_64.c b/arch/x86/kernel/process_64.c index bd387e8..6c9dd92 100644 --- a/arch/x86/kernel/process_64.c +++ b/arch/x86/kernel/process_64.c @@ -501,6 +501,10 @@ void set_personality_64bit(void) /* Make sure to be in 64bit mode */ clear_thread_flag(TIF_IA32); + /* Ensure the corresponding mm is not marked. */ + if (current->mm) + current->mm->context.ia32_compat = 0; + /* TBD: overwrites user setup. Should have two bits. But 64bit processes have always behaved this way, so it's not too bad. The main problem is just that @@ -516,6 +520,10 @@ void set_personality_ia32(void) set_thread_flag(TIF_IA32); current->personality |= force_personality32; + /* Mark the associated mm as containing 32-bit tasks. */ + if (current->mm) + current->mm->context.ia32_compat = 1; + /* Prepare the first "return" to user space */ current_thread_info()->status |= TS_COMPAT; } diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c index 9d43b28..5a0484a 100644 --- a/arch/x86/kernel/setup.c +++ b/arch/x86/kernel/setup.c @@ -294,30 +294,11 @@ static void __init init_gbpages(void) else direct_gbpages = 0; } - -static void __init cleanup_highmap_brk_end(void) -{ - pud_t *pud; - pmd_t *pmd; - - mmu_cr4_features = read_cr4(); - - /* - * _brk_end cannot change anymore, but it and _end may be - * located on different 2M pages. cleanup_highmap(), however, - * can only consider _end when it runs, so destroy any - * mappings beyond _brk_end here. - */ - pud = pud_offset(pgd_offset_k(_brk_end), _brk_end); - pmd = pmd_offset(pud, _brk_end - 1); - while (++pmd <= pmd_offset(pud, (unsigned long)_end - 1)) - pmd_clear(pmd); -} #else static inline void init_gbpages(void) { } -static inline void cleanup_highmap_brk_end(void) +static void __init cleanup_highmap(void) { } #endif @@ -330,8 +311,6 @@ static void __init reserve_brk(void) /* Mark brk area as locked down and no longer taking any new allocations */ _brk_start = 0; - - cleanup_highmap_brk_end(); } #ifdef CONFIG_BLK_DEV_INITRD @@ -640,28 +619,6 @@ void __init reserve_standard_io_resources(void) } -/* - * Note: elfcorehdr_addr is not just limited to vmcore. It is also used by - * is_kdump_kernel() to determine if we are booting after a panic. Hence - * ifdef it under CONFIG_CRASH_DUMP and not CONFIG_PROC_VMCORE. - */ - -#ifdef CONFIG_CRASH_DUMP -/* elfcorehdr= specifies the location of elf core header - * stored by the crashed kernel. This option will be passed - * by kexec loader to the capture kernel. - */ -static int __init setup_elfcorehdr(char *arg) -{ - char *end; - if (!arg) - return -EINVAL; - elfcorehdr_addr = memparse(arg, &end); - return end > arg ? 0 : -EINVAL; -} -early_param("elfcorehdr", setup_elfcorehdr); -#endif - static __init void reserve_ibft_region(void) { unsigned long addr, size = 0; @@ -950,6 +907,8 @@ void __init setup_arch(char **cmdline_p) */ reserve_brk(); + cleanup_highmap(); + memblock.current_limit = get_max_mapped(); memblock_x86_fill(); diff --git a/arch/x86/kernel/syscall_table_32.S b/arch/x86/kernel/syscall_table_32.S index 5f18174..abce34d 100644 --- a/arch/x86/kernel/syscall_table_32.S +++ b/arch/x86/kernel/syscall_table_32.S @@ -343,3 +343,4 @@ ENTRY(sys_call_table) .long sys_name_to_handle_at .long sys_open_by_handle_at .long sys_clock_adjtime + .long sys_syncfs diff --git a/arch/x86/mm/init_64.c b/arch/x86/mm/init_64.c index 0aa3466..7942335 100644 --- a/arch/x86/mm/init_64.c +++ b/arch/x86/mm/init_64.c @@ -52,6 +52,7 @@ #include <asm/cacheflush.h> #include <asm/init.h> #include <asm/uv/uv.h> +#include <asm/setup.h> static int __init parse_direct_gbpages_off(char *arg) { @@ -294,18 +295,18 @@ void __init init_extra_mapping_uc(unsigned long phys, unsigned long size) * to the compile time generated pmds. This results in invalid pmds up * to the point where we hit the physaddr 0 mapping. * - * We limit the mappings to the region from _text to _end. _end is - * rounded up to the 2MB boundary. This catches the invalid pmds as + * We limit the mappings to the region from _text to _brk_end. _brk_end + * is rounded up to the 2MB boundary. This catches the invalid pmds as * well, as they are located before _text: */ void __init cleanup_highmap(void) { unsigned long vaddr = __START_KERNEL_map; - unsigned long end = roundup((unsigned long)_end, PMD_SIZE) - 1; + unsigned long vaddr_end = __START_KERNEL_map + (max_pfn_mapped << PAGE_SHIFT); + unsigned long end = roundup((unsigned long)_brk_end, PMD_SIZE) - 1; pmd_t *pmd = level2_kernel_pgt; - pmd_t *last_pmd = pmd + PTRS_PER_PMD; - for (; pmd < last_pmd; pmd++, vaddr += PMD_SIZE) { + for (; vaddr + PMD_SIZE - 1 < vaddr_end; pmd++, vaddr += PMD_SIZE) { if (pmd_none(*pmd)) continue; if (vaddr < (unsigned long) _text || vaddr > end) @@ -861,18 +862,18 @@ static struct vm_area_struct gate_vma = { .vm_flags = VM_READ | VM_EXEC }; -struct vm_area_struct *get_gate_vma(struct task_struct *tsk) +struct vm_area_struct *get_gate_vma(struct mm_struct *mm) { #ifdef CONFIG_IA32_EMULATION - if (test_tsk_thread_flag(tsk, TIF_IA32)) + if (!mm || mm->context.ia32_compat) return NULL; #endif return &gate_vma; } -int in_gate_area(struct task_struct *task, unsigned long addr) +int in_gate_area(struct mm_struct *mm, unsigned long addr) { - struct vm_area_struct *vma = get_gate_vma(task); + struct vm_area_struct *vma = get_gate_vma(mm); if (!vma) return 0; @@ -881,11 +882,11 @@ int in_gate_area(struct task_struct *task, unsigned long addr) } /* - * Use this when you have no reliable task/vma, typically from interrupt - * context. It is less reliable than using the task's vma and may give - * false positives: + * Use this when you have no reliable mm, typically from interrupt + * context. It is less reliable than using a task's mm and may give + * false positives. */ -int in_gate_area_no_task(unsigned long addr) +int in_gate_area_no_mm(unsigned long addr) { return (addr >= VSYSCALL_START) && (addr < VSYSCALL_END); } diff --git a/arch/x86/platform/olpc/olpc-xo1.c b/arch/x86/platform/olpc/olpc-xo1.c index 1277756..9951364 100644 --- a/arch/x86/platform/olpc/olpc-xo1.c +++ b/arch/x86/platform/olpc/olpc-xo1.c @@ -15,6 +15,7 @@ #include <linux/module.h> #include <linux/platform_device.h> #include <linux/pm.h> +#include <linux/mfd/core.h> #include <asm/io.h> #include <asm/olpc.h> @@ -56,25 +57,24 @@ static void xo1_power_off(void) static int __devinit olpc_xo1_probe(struct platform_device *pdev) { struct resource *res; + int err; /* don't run on non-XOs */ if (!machine_is_olpc()) return -ENODEV; + err = mfd_cell_enable(pdev); + if (err) + return err; + res = platform_get_resource(pdev, IORESOURCE_IO, 0); if (!res) { dev_err(&pdev->dev, "can't fetch device resource info\n"); return -EIO; } - - if (!request_region(res->start, resource_size(res), DRV_NAME)) { - dev_err(&pdev->dev, "can't request region\n"); - return -EIO; - } - - if (strcmp(pdev->name, "cs5535-pms") == 0) + if (strcmp(pdev->name, "olpc-xo1-pms") == 0) pms_base = res->start; - else if (strcmp(pdev->name, "cs5535-acpi") == 0) + else if (strcmp(pdev->name, "olpc-xo1-ac-acpi") == 0) acpi_base = res->start; /* If we have both addresses, we can override the poweroff hook */ @@ -88,14 +88,11 @@ static int __devinit olpc_xo1_probe(struct platform_device *pdev) static int __devexit olpc_xo1_remove(struct platform_device *pdev) { - struct resource *r; - - r = platform_get_resource(pdev, IORESOURCE_IO, 0); - release_region(r->start, resource_size(r)); + mfd_cell_disable(pdev); - if (strcmp(pdev->name, "cs5535-pms") == 0) + if (strcmp(pdev->name, "olpc-xo1-pms") == 0) pms_base = 0; - else if (strcmp(pdev->name, "cs5535-acpi") == 0) + else if (strcmp(pdev->name, "olpc-xo1-acpi") == 0) acpi_base = 0; pm_power_off = NULL; @@ -104,7 +101,7 @@ static int __devexit olpc_xo1_remove(struct platform_device *pdev) static struct platform_driver cs5535_pms_drv = { .driver = { - .name = "cs5535-pms", + .name = "olpc-xo1-pms", .owner = THIS_MODULE, }, .probe = olpc_xo1_probe, @@ -113,7 +110,7 @@ static struct platform_driver cs5535_pms_drv = { static struct platform_driver cs5535_acpi_drv = { .driver = { - .name = "cs5535-acpi", + .name = "olpc-xo1-acpi", .owner = THIS_MODULE, }, .probe = olpc_xo1_probe, @@ -124,26 +121,27 @@ static int __init olpc_xo1_init(void) { int r; - r = platform_driver_register(&cs5535_pms_drv); + r = mfd_shared_platform_driver_register(&cs5535_pms_drv, "cs5535-pms"); if (r) return r; - r = platform_driver_register(&cs5535_acpi_drv); + r = mfd_shared_platform_driver_register(&cs5535_acpi_drv, + "cs5535-acpi"); if (r) - platform_driver_unregister(&cs5535_pms_drv); + mfd_shared_platform_driver_unregister(&cs5535_pms_drv); return r; } static void __exit olpc_xo1_exit(void) { - platform_driver_unregister(&cs5535_acpi_drv); - platform_driver_unregister(&cs5535_pms_drv); + mfd_shared_platform_driver_unregister(&cs5535_acpi_drv); + mfd_shared_platform_driver_unregister(&cs5535_pms_drv); } MODULE_AUTHOR("Daniel Drake <dsd@laptop.org>"); MODULE_LICENSE("GPL"); -MODULE_ALIAS("platform:olpc-xo1"); +MODULE_ALIAS("platform:cs5535-pms"); module_init(olpc_xo1_init); module_exit(olpc_xo1_exit); diff --git a/arch/x86/vdso/vdso32-setup.c b/arch/x86/vdso/vdso32-setup.c index 36df991..468d591 100644 --- a/arch/x86/vdso/vdso32-setup.c +++ b/arch/x86/vdso/vdso32-setup.c @@ -417,24 +417,25 @@ const char *arch_vma_name(struct vm_area_struct *vma) return NULL; } -struct vm_area_struct *get_gate_vma(struct task_struct *tsk) +struct vm_area_struct *get_gate_vma(struct mm_struct *mm) { - struct mm_struct *mm = tsk->mm; - - /* Check to see if this task was created in compat vdso mode */ + /* + * Check to see if the corresponding task was created in compat vdso + * mode. + */ if (mm && mm->context.vdso == (void *)VDSO_HIGH_BASE) return &gate_vma; return NULL; } -int in_gate_area(struct task_struct *task, unsigned long addr) +int in_gate_area(struct mm_struct *mm, unsigned long addr) { - const struct vm_area_struct *vma = get_gate_vma(task); + const struct vm_area_struct *vma = get_gate_vma(mm); return vma && addr >= vma->vm_start && addr < vma->vm_end; } -int in_gate_area_no_task(unsigned long addr) +int in_gate_area_no_mm(unsigned long addr) { return 0; } diff --git a/arch/x86/xen/mmu.c b/arch/x86/xen/mmu.c index 39ee718..c82df6c 100644 --- a/arch/x86/xen/mmu.c +++ b/arch/x86/xen/mmu.c @@ -1487,10 +1487,12 @@ static __init pte_t mask_rw_pte(pte_t *ptep, pte_t pte) /* * If the new pfn is within the range of the newly allocated * kernel pagetable, and it isn't being mapped into an - * early_ioremap fixmap slot, make sure it is RO. + * early_ioremap fixmap slot as a freshly allocated page, make sure + * it is RO. */ - if (!is_early_ioremap_ptep(ptep) && - pfn >= pgt_buf_start && pfn < pgt_buf_end) + if (((!is_early_ioremap_ptep(ptep) && + pfn >= pgt_buf_start && pfn < pgt_buf_end)) || + (is_early_ioremap_ptep(ptep) && pfn != (pgt_buf_end - 1))) pte = pte_wrprotect(pte); return pte; @@ -1700,9 +1702,6 @@ static __init void xen_map_identity_early(pmd_t *pmd, unsigned long max_pfn) for (pteidx = 0; pteidx < PTRS_PER_PTE; pteidx++, pfn++) { pte_t pte; - if (pfn > max_pfn_mapped) - max_pfn_mapped = pfn; - if (!pte_none(pte_page[pteidx])) continue; @@ -1760,6 +1759,12 @@ __init pgd_t *xen_setup_kernel_pagetable(pgd_t *pgd, pud_t *l3; pmd_t *l2; + /* max_pfn_mapped is the last pfn mapped in the initial memory + * mappings. Considering that on Xen after the kernel mappings we + * have the mappings of some pages that don't exist in pfn space, we + * set max_pfn_mapped to the last real pfn mapped. */ + max_pfn_mapped = PFN_DOWN(__pa(xen_start_info->mfn_list)); + /* Zap identity mapping */ init_level4_pgt[0] = __pgd(0); @@ -1864,9 +1869,7 @@ __init pgd_t *xen_setup_kernel_pagetable(pgd_t *pgd, initial_kernel_pmd = extend_brk(sizeof(pmd_t) * PTRS_PER_PMD, PAGE_SIZE); - max_pfn_mapped = PFN_DOWN(__pa(xen_start_info->pt_base) + - xen_start_info->nr_pt_frames * PAGE_SIZE + - 512*1024); + max_pfn_mapped = PFN_DOWN(__pa(xen_start_info->mfn_list)); kernel_pmd = m2v(pgd[KERNEL_PGD_BOUNDARY].pgd); memcpy(initial_kernel_pmd, kernel_pmd, sizeof(pmd_t) * PTRS_PER_PMD); diff --git a/arch/xtensa/Kconfig b/arch/xtensa/Kconfig index d373d15..7283919 100644 --- a/arch/xtensa/Kconfig +++ b/arch/xtensa/Kconfig @@ -21,6 +21,9 @@ config RWSEM_XCHGADD_ALGORITHM config GENERIC_FIND_NEXT_BIT def_bool y +config GENERIC_FIND_BIT_LE + def_bool y + config GENERIC_HWEIGHT def_bool y diff --git a/arch/xtensa/boot/Makefile b/arch/xtensa/boot/Makefile index 40aa55b..70fd145 100644 --- a/arch/xtensa/boot/Makefile +++ b/arch/xtensa/boot/Makefile @@ -14,7 +14,7 @@ HOSTFLAGS += -Iarch/$(ARCH)/boot/include BIG_ENDIAN := $(shell echo -e __XTENSA_EB__ | $(CC) -E - | grep -v "\#") -export EXTRA_CFLAGS +export ccflags-y export BIG_ENDIAN subdir-y := lib diff --git a/arch/xtensa/boot/lib/Makefile b/arch/xtensa/boot/lib/Makefile index d3d2aa2..ad8952e 100644 --- a/arch/xtensa/boot/lib/Makefile +++ b/arch/xtensa/boot/lib/Makefile @@ -6,7 +6,7 @@ zlib := inffast.c inflate.c inftrees.c lib-y += $(zlib:.c=.o) zmem.o -EXTRA_CFLAGS += -Ilib/zlib_inflate +ccflags-y := -Ilib/zlib_inflate quiet_cmd_copy_zlib = COPY $@ cmd_copy_zlib = cat $< > $@ diff --git a/arch/xtensa/include/asm/bitops.h b/arch/xtensa/include/asm/bitops.h index 6c39303..c8fac8d 100644 --- a/arch/xtensa/include/asm/bitops.h +++ b/arch/xtensa/include/asm/bitops.h @@ -106,7 +106,7 @@ static inline unsigned long __fls(unsigned long word) #include <asm-generic/bitops/fls64.h> #include <asm-generic/bitops/find.h> -#include <asm-generic/bitops/ext2-non-atomic.h> +#include <asm-generic/bitops/le.h> #ifdef __XTENSA_EL__ # define ext2_set_bit_atomic(lock,nr,addr) \ @@ -125,7 +125,6 @@ static inline unsigned long __fls(unsigned long word) #include <asm-generic/bitops/hweight.h> #include <asm-generic/bitops/lock.h> #include <asm-generic/bitops/sched.h> -#include <asm-generic/bitops/minix.h> #endif /* __KERNEL__ */ diff --git a/arch/xtensa/include/asm/types.h b/arch/xtensa/include/asm/types.h index c89569a..b1c981e 100644 --- a/arch/xtensa/include/asm/types.h +++ b/arch/xtensa/include/asm/types.h @@ -32,10 +32,6 @@ typedef unsigned short umode_t; #define BITS_PER_LONG 32 -/* Dma addresses are 32-bits wide. */ - -typedef u32 dma_addr_t; - #endif /* __KERNEL__ */ #endif |
