diff options
Diffstat (limited to 'arch/powerpc/platforms')
| -rw-r--r-- | arch/powerpc/platforms/83xx/mpc834x_itx.c | 4 | ||||
| -rw-r--r-- | arch/powerpc/platforms/85xx/Kconfig | 21 | ||||
| -rw-r--r-- | arch/powerpc/platforms/85xx/Makefile | 1 | ||||
| -rw-r--r-- | arch/powerpc/platforms/85xx/mpc85xx_ads.c | 120 | ||||
| -rw-r--r-- | arch/powerpc/platforms/85xx/mpc85xx_ads.h | 61 | ||||
| -rw-r--r-- | arch/powerpc/platforms/cell/spu_base.c | 4 | ||||
| -rw-r--r-- | arch/powerpc/platforms/cell/spufs/file.c | 2 | ||||
| -rw-r--r-- | arch/powerpc/platforms/cell/spufs/hw_ops.c | 4 | ||||
| -rw-r--r-- | arch/powerpc/platforms/maple/pci.c | 60 | ||||
| -rw-r--r-- | arch/powerpc/platforms/pseries/eeh.c | 7 | ||||
| -rw-r--r-- | arch/powerpc/platforms/pseries/setup.c | 24 |
11 files changed, 252 insertions, 56 deletions
diff --git a/arch/powerpc/platforms/83xx/mpc834x_itx.c b/arch/powerpc/platforms/83xx/mpc834x_itx.c index 969fbb6d..8c676d7 100644 --- a/arch/powerpc/platforms/83xx/mpc834x_itx.c +++ b/arch/powerpc/platforms/83xx/mpc834x_itx.c @@ -109,6 +109,10 @@ static int __init mpc834x_itx_probe(void) return 1; } +#ifdef CONFIG_RTC_CLASS +late_initcall(rtc_class_hookup); +#endif + define_machine(mpc834x_itx) { .name = "MPC834x ITX", .probe = mpc834x_itx_probe, diff --git a/arch/powerpc/platforms/85xx/Kconfig b/arch/powerpc/platforms/85xx/Kconfig index c3268d9..0584f3c 100644 --- a/arch/powerpc/platforms/85xx/Kconfig +++ b/arch/powerpc/platforms/85xx/Kconfig @@ -11,6 +11,12 @@ config MPC8540_ADS help This option enables support for the MPC 8540 ADS board +config MPC8560_ADS + bool "Freescale MPC8560 ADS" + select DEFAULT_UIMAGE + help + This option enables support for the MPC 8560 ADS board + config MPC85xx_CDS bool "Freescale MPC85xx CDS" select DEFAULT_UIMAGE @@ -25,6 +31,11 @@ config MPC8540 select PPC_INDIRECT_PCI default y if MPC8540_ADS || MPC85xx_CDS +config MPC8560 + bool + select PPC_INDIRECT_PCI + default y if MPC8560_ADS + config PPC_INDIRECT_PCI_BE bool depends on PPC_85xx @@ -34,4 +45,14 @@ config MPIC bool default y +config CPM2 + bool + depends on MPC8560 + default y + help + The CPM2 (Communications Processor Module) is a coprocessor on + embedded CPUs made by Motorola. Selecting this option means that + you wish to build a kernel for a machine with a CPM2 coprocessor + on it. + endmenu diff --git a/arch/powerpc/platforms/85xx/Makefile b/arch/powerpc/platforms/85xx/Makefile index 7615aa5..282f5d0 100644 --- a/arch/powerpc/platforms/85xx/Makefile +++ b/arch/powerpc/platforms/85xx/Makefile @@ -3,4 +3,5 @@ # obj-$(CONFIG_PPC_85xx) += misc.o pci.o obj-$(CONFIG_MPC8540_ADS) += mpc85xx_ads.o +obj-$(CONFIG_MPC8560_ADS) += mpc85xx_ads.o obj-$(CONFIG_MPC85xx_CDS) += mpc85xx_cds.o diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ads.c b/arch/powerpc/platforms/85xx/mpc85xx_ads.c index cae6b73..28070e7 100644 --- a/arch/powerpc/platforms/85xx/mpc85xx_ads.c +++ b/arch/powerpc/platforms/85xx/mpc85xx_ads.c @@ -32,6 +32,13 @@ #include <sysdev/fsl_soc.h> #include "mpc85xx.h" +#ifdef CONFIG_CPM2 +#include <linux/fs_enet_pd.h> +#include <asm/cpm2.h> +#include <sysdev/cpm2_pic.h> +#include <asm/fs_pd.h> +#endif + #ifndef CONFIG_PCI unsigned long isa_io_base = 0; unsigned long isa_mem_base = 0; @@ -57,12 +64,29 @@ mpc85xx_pcibios_fixup(void) } #endif /* CONFIG_PCI */ +#ifdef CONFIG_CPM2 + +static void cpm2_cascade(unsigned int irq, struct irq_desc *desc, + struct pt_regs *regs) +{ + int cascade_irq; + + while ((cascade_irq = cpm2_get_irq(regs)) >= 0) { + generic_handle_irq(cascade_irq, regs); + } + desc->chip->eoi(irq); +} + +#endif /* CONFIG_CPM2 */ void __init mpc85xx_ads_pic_init(void) { struct mpic *mpic; struct resource r; struct device_node *np = NULL; +#ifdef CONFIG_CPM2 + int irq; +#endif np = of_find_node_by_type(np, "open-pic"); @@ -104,11 +128,103 @@ void __init mpc85xx_ads_pic_init(void) mpic_assign_isu(mpic, 14, r.start + 0x10100); mpic_init(mpic); + +#ifdef CONFIG_CPM2 + /* Setup CPM2 PIC */ + np = of_find_node_by_type(NULL, "cpm-pic"); + if (np == NULL) { + printk(KERN_ERR "PIC init: can not find cpm-pic node\n"); + return; + } + irq = irq_of_parse_and_map(np, 0); + + cpm2_pic_init(np); + set_irq_chained_handler(irq, cpm2_cascade); +#endif } /* * Setup the architecture */ +#ifdef CONFIG_CPM2 +void init_fcc_ioports(struct fs_platform_info *fpi) +{ + struct io_port *io = cpm2_map(im_ioport); + int fcc_no = fs_get_fcc_index(fpi->fs_no); + int target; + u32 tempval; + + switch(fcc_no) { + case 1: + tempval = in_be32(&io->iop_pdirb); + tempval &= ~PB2_DIRB0; + tempval |= PB2_DIRB1; + out_be32(&io->iop_pdirb, tempval); + + tempval = in_be32(&io->iop_psorb); + tempval &= ~PB2_PSORB0; + tempval |= PB2_PSORB1; + out_be32(&io->iop_psorb, tempval); + + tempval = in_be32(&io->iop_pparb); + tempval |= (PB2_DIRB0 | PB2_DIRB1); + out_be32(&io->iop_pparb, tempval); + + target = CPM_CLK_FCC2; + break; + case 2: + tempval = in_be32(&io->iop_pdirb); + tempval &= ~PB3_DIRB0; + tempval |= PB3_DIRB1; + out_be32(&io->iop_pdirb, tempval); + + tempval = in_be32(&io->iop_psorb); + tempval &= ~PB3_PSORB0; + tempval |= PB3_PSORB1; + out_be32(&io->iop_psorb, tempval); + + tempval = in_be32(&io->iop_pparb); + tempval |= (PB3_DIRB0 | PB3_DIRB1); + out_be32(&io->iop_pparb, tempval); + + tempval = in_be32(&io->iop_pdirc); + tempval |= PC3_DIRC1; + out_be32(&io->iop_pdirc, tempval); + + tempval = in_be32(&io->iop_pparc); + tempval |= PC3_DIRC1; + out_be32(&io->iop_pparc, tempval); + + target = CPM_CLK_FCC3; + break; + default: + printk(KERN_ERR "init_fcc_ioports: invalid FCC number\n"); + return; + } + + /* Port C has clocks...... */ + tempval = in_be32(&io->iop_psorc); + tempval &= ~(PC_CLK(fpi->clk_rx - 8) | PC_CLK(fpi->clk_tx - 8)); + out_be32(&io->iop_psorc, tempval); + + tempval = in_be32(&io->iop_pdirc); + tempval &= ~(PC_CLK(fpi->clk_rx - 8) | PC_CLK(fpi->clk_tx - 8)); + out_be32(&io->iop_pdirc, tempval); + tempval = in_be32(&io->iop_pparc); + tempval |= (PC_CLK(fpi->clk_rx - 8) | PC_CLK(fpi->clk_tx - 8)); + out_be32(&io->iop_pparc, tempval); + + cpm2_unmap(io); + + /* Configure Serial Interface clock routing. + * First, clear FCC bits to zero, + * then set the ones we want. + */ + cpm2_clk_setup(target, fpi->clk_rx, CPM_CLK_RX); + cpm2_clk_setup(target, fpi->clk_tx, CPM_CLK_TX); +} +#endif + static void __init mpc85xx_ads_setup_arch(void) { struct device_node *cpu; @@ -131,6 +247,10 @@ static void __init mpc85xx_ads_setup_arch(void) of_node_put(cpu); } +#ifdef CONFIG_CPM2 + cpm2_reset(); +#endif + #ifdef CONFIG_PCI for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;) add_bridge(np); diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ads.h b/arch/powerpc/platforms/85xx/mpc85xx_ads.h new file mode 100644 index 0000000..effcbf7 --- /dev/null +++ b/arch/powerpc/platforms/85xx/mpc85xx_ads.h @@ -0,0 +1,61 @@ +/* + * MPC85xx ADS board definitions + * + * Maintainer: Kumar Gala <galak@kernel.crashing.org> + * + * Copyright 2004 Freescale Semiconductor Inc. + * + * 2006 (c) MontaVista Software, Inc. + * Vitaly Bordug <vbordug@ru.mvista.com> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + */ + +#ifndef __MACH_MPC85XXADS_H +#define __MACH_MPC85XXADS_H + +#include <linux/config.h> +#include <linux/initrd.h> +#include <sysdev/fsl_soc.h> + +#define BCSR_ADDR ((uint)0xf8000000) +#define BCSR_SIZE ((uint)(32 * 1024)) + +#ifdef CONFIG_CPM2 + +#define MPC85xx_CPM_OFFSET (0x80000) + +#define CPM_MAP_ADDR (get_immrbase() + MPC85xx_CPM_OFFSET) +#define CPM_IRQ_OFFSET 60 + +#define SIU_INT_SMC1 ((uint)0x04+CPM_IRQ_OFFSET) +#define SIU_INT_SMC2 ((uint)0x05+CPM_IRQ_OFFSET) +#define SIU_INT_SCC1 ((uint)0x28+CPM_IRQ_OFFSET) +#define SIU_INT_SCC2 ((uint)0x29+CPM_IRQ_OFFSET) +#define SIU_INT_SCC3 ((uint)0x2a+CPM_IRQ_OFFSET) +#define SIU_INT_SCC4 ((uint)0x2b+CPM_IRQ_OFFSET) + +/* FCC1 Clock Source Configuration. These can be + * redefined in the board specific file. + * Can only choose from CLK9-12 */ +#define F1_RXCLK 12 +#define F1_TXCLK 11 + +/* FCC2 Clock Source Configuration. These can be + * redefined in the board specific file. + * Can only choose from CLK13-16 */ +#define F2_RXCLK 13 +#define F2_TXCLK 14 + +/* FCC3 Clock Source Configuration. These can be + * redefined in the board specific file. + * Can only choose from CLK13-16 */ +#define F3_RXCLK 15 +#define F3_TXCLK 16 + +#endif /* CONFIG_CPM2 */ +#endif /* __MACH_MPC85XXADS_H */ diff --git a/arch/powerpc/platforms/cell/spu_base.c b/arch/powerpc/platforms/cell/spu_base.c index 3bd36d4..0f5c8eb 100644 --- a/arch/powerpc/platforms/cell/spu_base.c +++ b/arch/powerpc/platforms/cell/spu_base.c @@ -538,7 +538,7 @@ static void __iomem * __init map_spe_prop(struct spu *spu, const void *p; int proplen; - void* ret = NULL; + void __iomem *ret = NULL; int err = 0; p = get_property(n, name, &proplen); @@ -562,7 +562,7 @@ static void spu_unmap(struct spu *spu) iounmap(spu->priv2); iounmap(spu->priv1); iounmap(spu->problem); - iounmap((u8 __iomem *)spu->local_store); + iounmap((__force u8 __iomem *)spu->local_store); } /* This function shall be abstracted for HV platforms */ diff --git a/arch/powerpc/platforms/cell/spufs/file.c b/arch/powerpc/platforms/cell/spufs/file.c index 58e794f..51fd197 100644 --- a/arch/powerpc/platforms/cell/spufs/file.c +++ b/arch/powerpc/platforms/cell/spufs/file.c @@ -1342,7 +1342,7 @@ static u64 spufs_id_get(void *data) return num; } -DEFINE_SIMPLE_ATTRIBUTE(spufs_id_ops, spufs_id_get, 0, "0x%llx\n") +DEFINE_SIMPLE_ATTRIBUTE(spufs_id_ops, spufs_id_get, NULL, "0x%llx\n") struct tree_descr spufs_dir_contents[] = { { "mem", &spufs_mem_fops, 0666, }, diff --git a/arch/powerpc/platforms/cell/spufs/hw_ops.c b/arch/powerpc/platforms/cell/spufs/hw_ops.c index c8670f5..efc452e 100644 --- a/arch/powerpc/platforms/cell/spufs/hw_ops.c +++ b/arch/powerpc/platforms/cell/spufs/hw_ops.c @@ -234,7 +234,7 @@ static void spu_hw_runcntl_stop(struct spu_context *ctx) static int spu_hw_set_mfc_query(struct spu_context * ctx, u32 mask, u32 mode) { - struct spu_problem *prob = ctx->spu->problem; + struct spu_problem __iomem *prob = ctx->spu->problem; int ret; spin_lock_irq(&ctx->spu->register_lock); @@ -263,7 +263,7 @@ static int spu_hw_send_mfc_command(struct spu_context *ctx, struct mfc_dma_command *cmd) { u32 status; - struct spu_problem *prob = ctx->spu->problem; + struct spu_problem __iomem *prob = ctx->spu->problem; spin_lock_irq(&ctx->spu->register_lock); out_be32(&prob->mfc_lsa_W, cmd->lsa); diff --git a/arch/powerpc/platforms/maple/pci.c b/arch/powerpc/platforms/maple/pci.c index c3aa46b..1b82761 100644 --- a/arch/powerpc/platforms/maple/pci.c +++ b/arch/powerpc/platforms/maple/pci.c @@ -96,14 +96,14 @@ static unsigned long u3_agp_cfa1(u8 bus, u8 devfn, u8 off) 1UL; } -static unsigned long u3_agp_cfg_access(struct pci_controller* hose, +static volatile void __iomem *u3_agp_cfg_access(struct pci_controller* hose, u8 bus, u8 dev_fn, u8 offset) { unsigned int caddr; if (bus == hose->first_busno) { if (dev_fn < (11 << 3)) - return 0; + return NULL; caddr = u3_agp_cfa0(dev_fn, offset); } else caddr = u3_agp_cfa1(bus, dev_fn, offset); @@ -114,14 +114,14 @@ static unsigned long u3_agp_cfg_access(struct pci_controller* hose, } while (in_le32(hose->cfg_addr) != caddr); offset &= 0x07; - return ((unsigned long)hose->cfg_data) + offset; + return hose->cfg_data + offset; } static int u3_agp_read_config(struct pci_bus *bus, unsigned int devfn, int offset, int len, u32 *val) { struct pci_controller *hose; - unsigned long addr; + volatile void __iomem *addr; hose = pci_bus_to_host(bus); if (hose == NULL) @@ -136,13 +136,13 @@ static int u3_agp_read_config(struct pci_bus *bus, unsigned int devfn, */ switch (len) { case 1: - *val = in_8((u8 *)addr); + *val = in_8(addr); break; case 2: - *val = in_le16((u16 *)addr); + *val = in_le16(addr); break; default: - *val = in_le32((u32 *)addr); + *val = in_le32(addr); break; } return PCIBIOS_SUCCESSFUL; @@ -152,7 +152,7 @@ static int u3_agp_write_config(struct pci_bus *bus, unsigned int devfn, int offset, int len, u32 val) { struct pci_controller *hose; - unsigned long addr; + volatile void __iomem *addr; hose = pci_bus_to_host(bus); if (hose == NULL) @@ -167,16 +167,16 @@ static int u3_agp_write_config(struct pci_bus *bus, unsigned int devfn, */ switch (len) { case 1: - out_8((u8 *)addr, val); - (void) in_8((u8 *)addr); + out_8(addr, val); + (void) in_8(addr); break; case 2: - out_le16((u16 *)addr, val); - (void) in_le16((u16 *)addr); + out_le16(addr, val); + (void) in_le16(addr); break; default: - out_le32((u32 *)addr, val); - (void) in_le32((u32 *)addr); + out_le32(addr, val); + (void) in_le32(addr); break; } return PCIBIOS_SUCCESSFUL; @@ -198,22 +198,22 @@ static unsigned long u3_ht_cfa1(u8 bus, u8 devfn, u8 off) return u3_ht_cfa0(devfn, off) + (bus << 16) + 0x01000000UL; } -static unsigned long u3_ht_cfg_access(struct pci_controller* hose, +static volatile void __iomem *u3_ht_cfg_access(struct pci_controller* hose, u8 bus, u8 devfn, u8 offset) { if (bus == hose->first_busno) { if (PCI_SLOT(devfn) == 0) - return 0; - return ((unsigned long)hose->cfg_data) + u3_ht_cfa0(devfn, offset); + return NULL; + return hose->cfg_data + u3_ht_cfa0(devfn, offset); } else - return ((unsigned long)hose->cfg_data) + u3_ht_cfa1(bus, devfn, offset); + return hose->cfg_data + u3_ht_cfa1(bus, devfn, offset); } static int u3_ht_read_config(struct pci_bus *bus, unsigned int devfn, int offset, int len, u32 *val) { struct pci_controller *hose; - unsigned long addr; + volatile void __iomem *addr; hose = pci_bus_to_host(bus); if (hose == NULL) @@ -232,13 +232,13 @@ static int u3_ht_read_config(struct pci_bus *bus, unsigned int devfn, */ switch (len) { case 1: - *val = in_8((u8 *)addr); + *val = in_8(addr); break; case 2: - *val = in_le16((u16 *)addr); + *val = in_le16(addr); break; default: - *val = in_le32((u32 *)addr); + *val = in_le32(addr); break; } return PCIBIOS_SUCCESSFUL; @@ -248,7 +248,7 @@ static int u3_ht_write_config(struct pci_bus *bus, unsigned int devfn, int offset, int len, u32 val) { struct pci_controller *hose; - unsigned long addr; + volatile void __iomem *addr; hose = pci_bus_to_host(bus); if (hose == NULL) @@ -266,16 +266,16 @@ static int u3_ht_write_config(struct pci_bus *bus, unsigned int devfn, */ switch (len) { case 1: - out_8((u8 *)addr, val); - (void) in_8((u8 *)addr); + out_8(addr, val); + (void) in_8(addr); break; case 2: - out_le16((u16 *)addr, val); - (void) in_le16((u16 *)addr); + out_le16(addr, val); + (void) in_le16(addr); break; default: - out_le32((u32 *)addr, val); - (void) in_le32((u32 *)addr); + out_le32(addr, val); + (void) in_le32(addr); break; } return PCIBIOS_SUCCESSFUL; @@ -315,7 +315,7 @@ static void __init setup_u3_ht(struct pci_controller* hose) * the reg address cell, we shall fix that by killing struct * reg_property and using some accessor functions instead */ - hose->cfg_data = (volatile unsigned char *)ioremap(0xf2000000, 0x02000000); + hose->cfg_data = ioremap(0xf2000000, 0x02000000); hose->first_busno = 0; hose->last_busno = 0xef; diff --git a/arch/powerpc/platforms/pseries/eeh.c b/arch/powerpc/platforms/pseries/eeh.c index 84bc8f7..3c2d63e 100644 --- a/arch/powerpc/platforms/pseries/eeh.c +++ b/arch/powerpc/platforms/pseries/eeh.c @@ -225,6 +225,7 @@ static void __eeh_mark_slot (struct device_node *dn, int mode_flag) void eeh_mark_slot (struct device_node *dn, int mode_flag) { + struct pci_dev *dev; dn = find_device_pe (dn); /* Back up one, since config addrs might be shared */ @@ -232,6 +233,12 @@ void eeh_mark_slot (struct device_node *dn, int mode_flag) dn = dn->parent; PCI_DN(dn)->eeh_mode |= mode_flag; + + /* Mark the pci device too */ + dev = PCI_DN(dn)->pcidev; + if (dev) + dev->error_state = pci_channel_io_frozen; + __eeh_mark_slot (dn->child, mode_flag); } diff --git a/arch/powerpc/platforms/pseries/setup.c b/arch/powerpc/platforms/pseries/setup.c index 4f0097f..43dbf73 100644 --- a/arch/powerpc/platforms/pseries/setup.c +++ b/arch/powerpc/platforms/pseries/setup.c @@ -477,7 +477,6 @@ static void pseries_dedicated_idle_sleep(void) { unsigned int cpu = smp_processor_id(); unsigned long start_snooze; - unsigned long *smt_snooze_delay = &__get_cpu_var(smt_snooze_delay); /* * Indicate to the HV that we are idle. Now would be @@ -490,9 +489,9 @@ static void pseries_dedicated_idle_sleep(void) * has been checked recently. If we should poll for a little * while, do so. */ - if (*smt_snooze_delay) { + if (__get_cpu_var(smt_snooze_delay)) { start_snooze = get_tb() + - *smt_snooze_delay * tb_ticks_per_usec; + __get_cpu_var(smt_snooze_delay) * tb_ticks_per_usec; local_irq_enable(); set_thread_flag(TIF_POLLING_NRFLAG); @@ -512,24 +511,7 @@ static void pseries_dedicated_idle_sleep(void) goto out; } - /* - * If not SMT, cede processor. If CPU is running SMT - * cede if the other thread is not idle, so that it can - * go single-threaded. If the other thread is idle, - * we ask the hypervisor if it has pending work it - * wants to do and cede if it does. Otherwise we keep - * polling in order to reduce interrupt latency. - * - * Doing the cede when the other thread is active will - * result in this thread going dormant, meaning the other - * thread gets to run in single-threaded (ST) mode, which - * is slightly faster than SMT mode with this thread at - * very low priority. The cede enables interrupts, which - * doesn't matter here. - */ - if (!cpu_has_feature(CPU_FTR_SMT) || !lppaca[cpu ^ 1].idle - || poll_pending() == H_PENDING) - cede_processor(); + cede_processor(); out: HMT_medium(); |
