diff options
Diffstat (limited to 'arch/powerpc/platforms/powermac/smp.c')
| -rw-r--r-- | arch/powerpc/platforms/powermac/smp.c | 21 |
1 files changed, 11 insertions, 10 deletions
diff --git a/arch/powerpc/platforms/powermac/smp.c b/arch/powerpc/platforms/powermac/smp.c index b40c22d..c95215f 100644 --- a/arch/powerpc/platforms/powermac/smp.c +++ b/arch/powerpc/platforms/powermac/smp.c @@ -53,6 +53,8 @@ #include <asm/pmac_low_i2c.h> #include <asm/pmac_pfunc.h> +#include "pmac.h" + #undef DEBUG #ifdef DEBUG @@ -315,7 +317,7 @@ static int __init smp_psurge_probe(void) /* This is necessary because OF doesn't know about the * secondary cpu(s), and thus there aren't nodes in the * device tree for them, and smp_setup_cpu_maps hasn't - * set their bits in cpu_present_map. + * set their bits in cpu_present_mask. */ if (ncpus > NR_CPUS) ncpus = NR_CPUS; @@ -693,9 +695,9 @@ static void __init smp_core99_setup(int ncpus) #ifdef CONFIG_PPC64 /* i2c based HW sync on some G5s */ - if (machine_is_compatible("PowerMac7,2") || - machine_is_compatible("PowerMac7,3") || - machine_is_compatible("RackMac3,1")) + if (of_machine_is_compatible("PowerMac7,2") || + of_machine_is_compatible("PowerMac7,3") || + of_machine_is_compatible("RackMac3,1")) smp_core99_setup_i2c_hwsync(ncpus); /* pfunc based HW sync on recent G5s */ @@ -713,7 +715,7 @@ static void __init smp_core99_setup(int ncpus) #else /* CONFIG_PPC64 */ /* GPIO based HW sync on ppc32 Core99 */ - if (pmac_tb_freeze == NULL && !machine_is_compatible("MacRISC4")) { + if (pmac_tb_freeze == NULL && !of_machine_is_compatible("MacRISC4")) { struct device_node *cpu; const u32 *tbprop = NULL; @@ -750,7 +752,7 @@ static void __init smp_core99_setup(int ncpus) #endif /* 32 bits SMP can't NAP */ - if (!machine_is_compatible("MacRISC4")) + if (!of_machine_is_compatible("MacRISC4")) powersave_nap = 0; } @@ -852,7 +854,7 @@ static void __devinit smp_core99_setup_cpu(int cpu_nr) /* If we didn't start the second CPU, we must take * it off the bus */ - if (machine_is_compatible("MacRISC4") && + if (of_machine_is_compatible("MacRISC4") && num_online_cpus() < 2) g5_phy_disable_cpu1(); #endif /* CONFIG_PPC64 */ @@ -878,10 +880,9 @@ int smp_core99_cpu_disable(void) return 0; } -extern void low_cpu_die(void) __attribute__((noreturn)); /* in sleep.S */ static int cpu_dead[NR_CPUS]; -void cpu_die(void) +void pmac32_cpu_die(void) { local_irq_disable(); cpu_dead[smp_processor_id()] = 1; @@ -944,7 +945,7 @@ void __init pmac_setup_smp(void) } #ifdef CONFIG_PPC32 else { - /* We have to set bits in cpu_possible_map here since the + /* We have to set bits in cpu_possible_mask here since the * secondary CPU(s) aren't in the device tree. Various * things won't be initialized for CPUs not in the possible * map, so we really need to fix it up here. |
