diff options
Diffstat (limited to 'arch/powerpc/platforms/83xx')
| -rw-r--r-- | arch/powerpc/platforms/83xx/mpc837x_rdb.c | 23 | ||||
| -rw-r--r-- | arch/powerpc/platforms/83xx/mpc83xx.h | 4 |
2 files changed, 27 insertions, 0 deletions
diff --git a/arch/powerpc/platforms/83xx/mpc837x_rdb.c b/arch/powerpc/platforms/83xx/mpc837x_rdb.c index 91d19ab..a1908d2 100644 --- a/arch/powerpc/platforms/83xx/mpc837x_rdb.c +++ b/arch/powerpc/platforms/83xx/mpc837x_rdb.c @@ -17,10 +17,32 @@ #include <asm/time.h> #include <asm/ipic.h> #include <asm/udbg.h> +#include <sysdev/fsl_soc.h> #include <sysdev/fsl_pci.h> #include "mpc83xx.h" +static void mpc837x_rdb_sd_cfg(void) +{ + void __iomem *im; + + im = ioremap(get_immrbase(), 0x1000); + if (!im) { + WARN_ON(1); + return; + } + + /* + * On RDB boards (in contrast to MDS) USBB pins are used for SD only, + * so we can safely mux them away from the USB block. + */ + clrsetbits_be32(im + MPC83XX_SICRL_OFFS, MPC837X_SICRL_USBB_MASK, + MPC837X_SICRL_SD); + clrsetbits_be32(im + MPC83XX_SICRH_OFFS, MPC837X_SICRH_SPI_MASK, + MPC837X_SICRH_SD); + iounmap(im); +} + /* ************************************************************************ * * Setup the architecture @@ -42,6 +64,7 @@ static void __init mpc837x_rdb_setup_arch(void) mpc83xx_add_bridge(np); #endif mpc837x_usb_cfg(); + mpc837x_rdb_sd_cfg(); } static struct of_device_id mpc837x_ids[] = { diff --git a/arch/powerpc/platforms/83xx/mpc83xx.h b/arch/powerpc/platforms/83xx/mpc83xx.h index d1dc5b0..0fea881 100644 --- a/arch/powerpc/platforms/83xx/mpc83xx.h +++ b/arch/powerpc/platforms/83xx/mpc83xx.h @@ -30,6 +30,8 @@ #define MPC8315_SICRL_USB_ULPI 0x00000054 #define MPC837X_SICRL_USB_MASK 0xf0000000 #define MPC837X_SICRL_USB_ULPI 0x50000000 +#define MPC837X_SICRL_USBB_MASK 0x30000000 +#define MPC837X_SICRL_SD 0x20000000 /* system i/o configuration register high */ #define MPC83XX_SICRH_OFFS 0x118 @@ -38,6 +40,8 @@ #define MPC831X_SICRH_USB_ULPI 0x000000a0 #define MPC8315_SICRH_USB_MASK 0x0000ff00 #define MPC8315_SICRH_USB_ULPI 0x00000000 +#define MPC837X_SICRH_SPI_MASK 0x00000003 +#define MPC837X_SICRH_SD 0x00000001 /* USB Control Register */ #define FSL_USB2_CONTROL_OFFS 0x500 |
