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-rw-r--r--arch/powerpc/boot/dts/sbc8548.dts94
1 files changed, 94 insertions, 0 deletions
diff --git a/arch/powerpc/boot/dts/sbc8548.dts b/arch/powerpc/boot/dts/sbc8548.dts
index b86e65d..22d9671 100644
--- a/arch/powerpc/boot/dts/sbc8548.dts
+++ b/arch/powerpc/boot/dts/sbc8548.dts
@@ -52,6 +52,99 @@
reg = <0x00000000 0x10000000>;
};
+ localbus@e0000000 {
+ #address-cells = <2>;
+ #size-cells = <1>;
+ compatible = "simple-bus";
+ reg = <0xe0000000 0x5000>;
+ interrupt-parent = <&mpic>;
+
+ ranges = <0x0 0x0 0xff800000 0x00800000 /*8MB Flash*/
+ 0x3 0x0 0xf0000000 0x04000000 /*64MB SDRAM*/
+ 0x4 0x0 0xf4000000 0x04000000 /*64MB SDRAM*/
+ 0x5 0x0 0xf8000000 0x00b10000 /* EPLD */
+ 0x6 0x0 0xfb800000 0x04000000>; /*64MB Flash*/
+
+
+ flash@0,0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "cfi-flash";
+ reg = <0x0 0x0 0x800000>;
+ bank-width = <1>;
+ device-width = <1>;
+ partition@0x0 {
+ label = "space";
+ reg = <0x00000000 0x00100000>;
+ };
+ partition@0x100000 {
+ label = "bootloader";
+ reg = <0x00100000 0x00700000>;
+ read-only;
+ };
+ };
+
+ epld@5,0 {
+ compatible = "wrs,epld-localbus";
+ #address-cells = <2>;
+ #size-cells = <1>;
+ reg = <0x5 0x0 0x00b10000>;
+ ranges = <
+ 0x0 0x0 0x5 0x000000 0x1fff /* LED */
+ 0x1 0x0 0x5 0x100000 0x1fff /* Switches */
+ 0x3 0x0 0x5 0x300000 0x1fff /* HW Rev. */
+ 0xb 0x0 0x5 0xb00000 0x1fff /* EEPROM */
+ >;
+
+ led@0,0 {
+ compatible = "led";
+ reg = <0x0 0x0 0x1fff>;
+ };
+
+ switches@1,0 {
+ compatible = "switches";
+ reg = <0x1 0x0 0x1fff>;
+ };
+
+ hw-rev@3,0 {
+ compatible = "hw-rev";
+ reg = <0x3 0x0 0x1fff>;
+ };
+
+ eeprom@b,0 {
+ compatible = "eeprom";
+ reg = <0xb 0 0x1fff>;
+ };
+
+ };
+
+ alt-flash@6,0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0x6 0x0 0x04000000>;
+ compatible = "cfi-flash";
+ bank-width = <4>;
+ device-width = <1>;
+ partition@0x0 {
+ label = "bootloader";
+ reg = <0x00000000 0x00100000>;
+ read-only;
+ };
+ partition@0x00100000 {
+ label = "file-system";
+ reg = <0x00100000 0x01f00000>;
+ };
+ partition@0x02000000 {
+ label = "boot-config";
+ reg = <0x02000000 0x00100000>;
+ };
+ partition@0x02100000 {
+ label = "space";
+ reg = <0x02100000 0x01f00000>;
+ };
+ };
+ };
+
soc8548@e0000000 {
#address-cells = <1>;
#size-cells = <1>;
@@ -59,6 +152,7 @@
ranges = <0x00000000 0xe0000000 0x00100000>;
reg = <0xe0000000 0x00001000>; // CCSRBAR
bus-frequency = <0>;
+ compatible = "simple-bus";
memory-controller@2000 {
compatible = "fsl,8548-memory-controller";
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