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-rw-r--r--arch/mn10300/Kconfig2
-rw-r--r--arch/mn10300/include/asm/cpu-regs.h2
-rw-r--r--arch/mn10300/kernel/irq.c85
-rw-r--r--arch/mn10300/kernel/mn10300-serial.c2
-rw-r--r--arch/mn10300/kernel/smp.c17
-rw-r--r--arch/mn10300/unit-asb2364/irq-fpga.c3
6 files changed, 30 insertions, 81 deletions
diff --git a/arch/mn10300/Kconfig b/arch/mn10300/Kconfig
index d8ab97a..feaf09c 100644
--- a/arch/mn10300/Kconfig
+++ b/arch/mn10300/Kconfig
@@ -2,7 +2,7 @@ config MN10300
def_bool y
select HAVE_OPROFILE
select HAVE_GENERIC_HARDIRQS
- select GENERIC_HARDIRQS_NO_DEPRECATED
+ select GENERIC_IRQ_SHOW
select HAVE_ARCH_TRACEHOOK
select HAVE_ARCH_KGDB
diff --git a/arch/mn10300/include/asm/cpu-regs.h b/arch/mn10300/include/asm/cpu-regs.h
index 90ed4a3..c54effa 100644
--- a/arch/mn10300/include/asm/cpu-regs.h
+++ b/arch/mn10300/include/asm/cpu-regs.h
@@ -49,7 +49,7 @@ asm(" .am33_2\n");
#define EPSW_IM_6 0x00000600 /* interrupt mode 6 */
#define EPSW_IM_7 0x00000700 /* interrupt mode 7 */
#define EPSW_IE 0x00000800 /* interrupt enable */
-#define EPSW_S 0x00003000 /* software auxilliary bits */
+#define EPSW_S 0x00003000 /* software auxiliary bits */
#define EPSW_T 0x00008000 /* trace enable */
#define EPSW_nSL 0x00010000 /* not supervisor level */
#define EPSW_NMID 0x00020000 /* nonmaskable interrupt disable */
diff --git a/arch/mn10300/kernel/irq.c b/arch/mn10300/kernel/irq.c
index 5f7fc3e..86af0d7 100644
--- a/arch/mn10300/kernel/irq.c
+++ b/arch/mn10300/kernel/irq.c
@@ -263,7 +263,7 @@ void set_intr_level(int irq, u16 level)
*/
void mn10300_set_lateack_irq_type(int irq)
{
- set_irq_chip_and_handler(irq, &mn10300_cpu_pic_level,
+ irq_set_chip_and_handler(irq, &mn10300_cpu_pic_level,
handle_level_irq);
}
@@ -275,12 +275,12 @@ void __init init_IRQ(void)
int irq;
for (irq = 0; irq < NR_IRQS; irq++)
- if (get_irq_chip(irq) == &no_irq_chip)
+ if (irq_get_chip(irq) == &no_irq_chip)
/* due to the PIC latching interrupt requests, even
* when the IRQ is disabled, IRQ_PENDING is superfluous
* and we can use handle_level_irq() for edge-triggered
* interrupts */
- set_irq_chip_and_handler(irq, &mn10300_cpu_pic_edge,
+ irq_set_chip_and_handler(irq, &mn10300_cpu_pic_edge,
handle_level_irq);
unit_init_IRQ();
@@ -335,91 +335,42 @@ asmlinkage void do_IRQ(void)
/*
* Display interrupt management information through /proc/interrupts
*/
-int show_interrupts(struct seq_file *p, void *v)
+int arch_show_interrupts(struct seq_file *p, int prec)
{
- int i = *(loff_t *) v, j, cpu;
- struct irqaction *action;
- unsigned long flags;
-
- switch (i) {
- /* display column title bar naming CPUs */
- case 0:
- seq_printf(p, " ");
- for (j = 0; j < NR_CPUS; j++)
- if (cpu_online(j))
- seq_printf(p, "CPU%d ", j);
- seq_putc(p, '\n');
- break;
-
- /* display information rows, one per active CPU */
- case 1 ... NR_IRQS - 1:
- raw_spin_lock_irqsave(&irq_desc[i].lock, flags);
-
- action = irq_desc[i].action;
- if (action) {
- seq_printf(p, "%3d: ", i);
- for_each_present_cpu(cpu)
- seq_printf(p, "%10u ", kstat_irqs_cpu(i, cpu));
-
- if (i < NR_CPU_IRQS)
- seq_printf(p, " %14s.%u",
- irq_desc[i].irq_data.chip->name,
- (GxICR(i) & GxICR_LEVEL) >>
- GxICR_LEVEL_SHIFT);
- else
- seq_printf(p, " %14s",
- irq_desc[i].irq_data.chip->name);
-
- seq_printf(p, " %s", action->name);
-
- for (action = action->next;
- action;
- action = action->next)
- seq_printf(p, ", %s", action->name);
-
- seq_putc(p, '\n');
- }
-
- raw_spin_unlock_irqrestore(&irq_desc[i].lock, flags);
- break;
-
- /* polish off with NMI and error counters */
- case NR_IRQS:
#ifdef CONFIG_MN10300_WD_TIMER
- seq_printf(p, "NMI: ");
- for (j = 0; j < NR_CPUS; j++)
- if (cpu_online(j))
- seq_printf(p, "%10u ", nmi_count(j));
- seq_putc(p, '\n');
-#endif
+ int j;
- seq_printf(p, "ERR: %10u\n", atomic_read(&irq_err_count));
- break;
- }
+ seq_printf(p, "%*s: ", prec, "NMI");
+ for (j = 0; j < NR_CPUS; j++)
+ if (cpu_online(j))
+ seq_printf(p, "%10u ", nmi_count(j));
+ seq_putc(p, '\n');
+#endif
+ seq_printf(p, "%*s: ", prec, "ERR");
+ seq_printf(p, "%10u\n", atomic_read(&irq_err_count));
return 0;
}
#ifdef CONFIG_HOTPLUG_CPU
void migrate_irqs(void)
{
- irq_desc_t *desc;
int irq;
unsigned int self, new;
unsigned long flags;
self = smp_processor_id();
for (irq = 0; irq < NR_IRQS; irq++) {
- desc = irq_desc + irq;
+ struct irq_data *data = irq_get_irq_data(irq);
- if (desc->status == IRQ_PER_CPU)
+ if (irqd_is_per_cpu(data))
continue;
- if (cpu_isset(self, irq_desc[irq].affinity) &&
+ if (cpu_isset(self, data->affinity) &&
!cpus_intersects(irq_affinity[irq], cpu_online_map)) {
int cpu_id;
cpu_id = first_cpu(cpu_online_map);
- cpu_set(cpu_id, irq_desc[irq].affinity);
+ cpu_set(cpu_id, data->affinity);
}
/* We need to operate irq_affinity_online atomically. */
arch_local_cli_save(flags);
@@ -430,7 +381,7 @@ void migrate_irqs(void)
GxICR(irq) = x & GxICR_LEVEL;
tmp = GxICR(irq);
- new = any_online_cpu(irq_desc[irq].affinity);
+ new = any_online_cpu(data->affinity);
irq_affinity_online[irq] = new;
CROSS_GxICR(irq, new) =
diff --git a/arch/mn10300/kernel/mn10300-serial.c b/arch/mn10300/kernel/mn10300-serial.c
index efca426..94901c5 100644
--- a/arch/mn10300/kernel/mn10300-serial.c
+++ b/arch/mn10300/kernel/mn10300-serial.c
@@ -933,7 +933,7 @@ static int mn10300_serial_startup(struct uart_port *_port)
NUM2GxICR_LEVEL(CONFIG_MN10300_SERIAL_IRQ_LEVEL));
set_intr_level(port->tx_irq,
NUM2GxICR_LEVEL(CONFIG_MN10300_SERIAL_IRQ_LEVEL));
- set_irq_chip(port->tm_irq, &mn10300_serial_pic);
+ irq_set_chip(port->tm_irq, &mn10300_serial_pic);
if (request_irq(port->rx_irq, mn10300_serial_interrupt,
IRQF_DISABLED, port->rx_name, port) < 0)
diff --git a/arch/mn10300/kernel/smp.c b/arch/mn10300/kernel/smp.c
index 51c02f9..83fb279 100644
--- a/arch/mn10300/kernel/smp.c
+++ b/arch/mn10300/kernel/smp.c
@@ -156,15 +156,15 @@ static void init_ipi(void)
u16 tmp16;
/* set up the reschedule IPI */
- set_irq_chip_and_handler(RESCHEDULE_IPI,
- &mn10300_ipi_type, handle_percpu_irq);
+ irq_set_chip_and_handler(RESCHEDULE_IPI, &mn10300_ipi_type,
+ handle_percpu_irq);
setup_irq(RESCHEDULE_IPI, &reschedule_ipi);
set_intr_level(RESCHEDULE_IPI, RESCHEDULE_GxICR_LV);
mn10300_ipi_enable(RESCHEDULE_IPI);
/* set up the call function IPI */
- set_irq_chip_and_handler(CALL_FUNC_SINGLE_IPI,
- &mn10300_ipi_type, handle_percpu_irq);
+ irq_set_chip_and_handler(CALL_FUNC_SINGLE_IPI, &mn10300_ipi_type,
+ handle_percpu_irq);
setup_irq(CALL_FUNC_SINGLE_IPI, &call_function_ipi);
set_intr_level(CALL_FUNC_SINGLE_IPI, CALL_FUNCTION_GxICR_LV);
mn10300_ipi_enable(CALL_FUNC_SINGLE_IPI);
@@ -172,8 +172,8 @@ static void init_ipi(void)
/* set up the local timer IPI */
#if !defined(CONFIG_GENERIC_CLOCKEVENTS) || \
defined(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST)
- set_irq_chip_and_handler(LOCAL_TIMER_IPI,
- &mn10300_ipi_type, handle_percpu_irq);
+ irq_set_chip_and_handler(LOCAL_TIMER_IPI, &mn10300_ipi_type,
+ handle_percpu_irq);
setup_irq(LOCAL_TIMER_IPI, &local_timer_ipi);
set_intr_level(LOCAL_TIMER_IPI, LOCAL_TIMER_GxICR_LV);
mn10300_ipi_enable(LOCAL_TIMER_IPI);
@@ -494,14 +494,11 @@ void smp_send_stop(void)
* @irq: The interrupt number.
* @dev_id: The device ID.
*
- * We need do nothing here, since the scheduling will be effected on our way
- * back through entry.S.
- *
* Returns IRQ_HANDLED to indicate we handled the interrupt successfully.
*/
static irqreturn_t smp_reschedule_interrupt(int irq, void *dev_id)
{
- /* do nothing */
+ scheduler_ipi();
return IRQ_HANDLED;
}
diff --git a/arch/mn10300/unit-asb2364/irq-fpga.c b/arch/mn10300/unit-asb2364/irq-fpga.c
index ee84e62..e16c216 100644
--- a/arch/mn10300/unit-asb2364/irq-fpga.c
+++ b/arch/mn10300/unit-asb2364/irq-fpga.c
@@ -100,7 +100,8 @@ void __init irq_fpga_init(void)
SyncExBus();
for (irq = NR_CPU_IRQS; irq < NR_IRQS; irq++)
- set_irq_chip_and_handler(irq, &asb2364_fpga_pic, handle_level_irq);
+ irq_set_chip_and_handler(irq, &asb2364_fpga_pic,
+ handle_level_irq);
/* the FPGA drives the XIRQ1 input on the CPU PIC */
setup_irq(XIRQ1, &fpga_irq[0]);
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