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-rw-r--r--arch/mips/jazz/setup.c1
-rw-r--r--arch/mips/kernel/setup.c7
-rw-r--r--arch/mips/pci/pci-bcm1480.c2
-rw-r--r--arch/mips/pci/pci-sb1250.c3
-rw-r--r--arch/mips/sni/setup.c1
5 files changed, 0 insertions, 14 deletions
diff --git a/arch/mips/jazz/setup.c b/arch/mips/jazz/setup.c
index a794719..f136c8a 100644
--- a/arch/mips/jazz/setup.c
+++ b/arch/mips/jazz/setup.c
@@ -79,7 +79,6 @@ void __init plat_mem_setup(void)
if (mips_machtype == MACH_MIPS_MAGNUM_4000)
EISA_bus = 1;
#endif
- isa_slot_offset = 0xe3000000;
/* request I/O space for devices used on all i[345]86 PCs */
for (i = 0; i < ARRAY_SIZE(jazz_io_resources); i++)
diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c
index c6a063b..c04e4e3 100644
--- a/arch/mips/kernel/setup.c
+++ b/arch/mips/kernel/setup.c
@@ -68,13 +68,6 @@ static char command_line[CL_SIZE];
const unsigned long mips_io_port_base __read_mostly = -1;
EXPORT_SYMBOL(mips_io_port_base);
-/*
- * isa_slot_offset is the address where E(ISA) busaddress 0 is mapped
- * for the processor.
- */
-unsigned long isa_slot_offset;
-EXPORT_SYMBOL(isa_slot_offset);
-
static struct resource code_resource = { .name = "Kernel code", };
static struct resource data_resource = { .name = "Kernel data", };
diff --git a/arch/mips/pci/pci-bcm1480.c b/arch/mips/pci/pci-bcm1480.c
index 87e2c8f..d19d262 100644
--- a/arch/mips/pci/pci-bcm1480.c
+++ b/arch/mips/pci/pci-bcm1480.c
@@ -254,8 +254,6 @@ static int __init bcm1480_pcibios_init(void)
ioremap(A_BCM1480_PHYS_PCI_IO_MATCH_BYTES, 65536);
bcm1480_controller.io_map_base -= bcm1480_controller.io_offset;
set_io_port_base(bcm1480_controller.io_map_base);
- isa_slot_offset = (unsigned long)
- ioremap(A_BCM1480_PHYS_PCI_MEM_MATCH_BYTES, 1024*1024);
register_pci_controller(&bcm1480_controller);
diff --git a/arch/mips/pci/pci-sb1250.c b/arch/mips/pci/pci-sb1250.c
index 2a09ad9..9bc102a 100644
--- a/arch/mips/pci/pci-sb1250.c
+++ b/arch/mips/pci/pci-sb1250.c
@@ -254,9 +254,6 @@ static int __init sb1250_pcibios_init(void)
* works correctly with most of Linux's drivers.
* XXX ehs: Should this happen in PCI Device mode?
*/
- isa_slot_offset = (unsigned long)
- ioremap(A_PHYS_LDTPCI_IO_MATCH_BYTES_32, 1024 * 1024);
-
io_map_base = ioremap(A_PHYS_LDTPCI_IO_MATCH_BYTES, 1024 * 1024);
sb1250_controller.io_map_base = io_map_base;
set_io_port_base((unsigned long)io_map_base);
diff --git a/arch/mips/sni/setup.c b/arch/mips/sni/setup.c
index 5484e1c..a49272c 100644
--- a/arch/mips/sni/setup.c
+++ b/arch/mips/sni/setup.c
@@ -116,7 +116,6 @@ void __init plat_mem_setup(void)
/*
* Setup (E)ISA I/O memory access stuff
*/
- isa_slot_offset = CKSEG1ADDR(0xb0000000);
#ifdef CONFIG_EISA
EISA_bus = 1;
#endif
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