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-rw-r--r--arch/mips/pci/Makefile2
-rw-r--r--arch/mips/pci/fixup-yosemite.c41
-rw-r--r--arch/mips/pci/ops-bridge.c24
-rw-r--r--arch/mips/pci/ops-titan-ht.c124
-rw-r--r--arch/mips/pci/ops-titan.c111
-rw-r--r--arch/mips/pci/pci-bcm63xx.c34
-rw-r--r--arch/mips/pci/pci-octeon.c5
-rw-r--r--arch/mips/pci/pci-xlr.c69
-rw-r--r--arch/mips/pci/pci-yosemite.c67
9 files changed, 67 insertions, 410 deletions
diff --git a/arch/mips/pci/Makefile b/arch/mips/pci/Makefile
index e13a71c..ce995d3 100644
--- a/arch/mips/pci/Makefile
+++ b/arch/mips/pci/Makefile
@@ -34,8 +34,6 @@ obj-$(CONFIG_MIPS_MALTA) += fixup-malta.o
obj-$(CONFIG_PMC_MSP7120_GW) += fixup-pmcmsp.o ops-pmcmsp.o
obj-$(CONFIG_PMC_MSP7120_EVAL) += fixup-pmcmsp.o ops-pmcmsp.o
obj-$(CONFIG_PMC_MSP7120_FPGA) += fixup-pmcmsp.o ops-pmcmsp.o
-obj-$(CONFIG_PMC_YOSEMITE) += fixup-yosemite.o ops-titan.o ops-titan-ht.o \
- pci-yosemite.o
obj-$(CONFIG_SGI_IP27) += ops-bridge.o pci-ip27.o
obj-$(CONFIG_SGI_IP32) += fixup-ip32.o ops-mace.o pci-ip32.o
obj-$(CONFIG_SIBYTE_SB1250) += fixup-sb1250.o pci-sb1250.o
diff --git a/arch/mips/pci/fixup-yosemite.c b/arch/mips/pci/fixup-yosemite.c
deleted file mode 100644
index fdafb13..0000000
--- a/arch/mips/pci/fixup-yosemite.c
+++ /dev/null
@@ -1,41 +0,0 @@
-/*
- * Copyright 2003 PMC-Sierra
- * Author: Manish Lachwani (lachwani@pmc-sierra.com)
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/pci.h>
-
-int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
-{
- if (pin == 0)
- return -1;
-
- return 3; /* Everything goes to one irq bit */
-}
-
-/* Do platform specific device initialization at pci_enable_device() time */
-int pcibios_plat_dev_init(struct pci_dev *dev)
-{
- return 0;
-}
diff --git a/arch/mips/pci/ops-bridge.c b/arch/mips/pci/ops-bridge.c
index b46b3e2..4383194 100644
--- a/arch/mips/pci/ops-bridge.c
+++ b/arch/mips/pci/ops-bridge.c
@@ -56,7 +56,7 @@ static int pci_conf0_read_config(struct pci_bus *bus, unsigned int devfn,
return PCIBIOS_DEVICE_NOT_FOUND;
/*
- * IOC3 is fucked fucked beyond believe ... Don't even give the
+ * IOC3 is fucking fucked beyond belief ... Don't even give the
* generic PCI code a chance to look at it for real ...
*/
if (cf == (PCI_VENDOR_ID_SGI | (PCI_DEVICE_ID_SGI_IOC3 << 16)))
@@ -76,7 +76,7 @@ static int pci_conf0_read_config(struct pci_bus *bus, unsigned int devfn,
oh_my_gawd:
/*
- * IOC3 is fucked fucked beyond believe ... Don't even give the
+ * IOC3 is fucking fucked beyond belief ... Don't even give the
* generic PCI code a chance to look at the wrong register.
*/
if ((where >= 0x14 && where < 0x40) || (where >= 0x48)) {
@@ -85,7 +85,7 @@ oh_my_gawd:
}
/*
- * IOC3 is fucked fucked beyond believe ... Don't try to access
+ * IOC3 is fucking fucked beyond belief ... Don't try to access
* anything but 32-bit words ...
*/
addr = &bridge->b_type0_cfg_dev[slot].f[fn].l[where >> 2];
@@ -118,7 +118,7 @@ static int pci_conf1_read_config(struct pci_bus *bus, unsigned int devfn,
return PCIBIOS_DEVICE_NOT_FOUND;
/*
- * IOC3 is fucked fucked beyond believe ... Don't even give the
+ * IOC3 is fucking fucked beyond belief ... Don't even give the
* generic PCI code a chance to look at it for real ...
*/
if (cf == (PCI_VENDOR_ID_SGI | (PCI_DEVICE_ID_SGI_IOC3 << 16)))
@@ -139,7 +139,7 @@ static int pci_conf1_read_config(struct pci_bus *bus, unsigned int devfn,
oh_my_gawd:
/*
- * IOC3 is fucked fucked beyond believe ... Don't even give the
+ * IOC3 is fucking fucked beyond belief ... Don't even give the
* generic PCI code a chance to look at the wrong register.
*/
if ((where >= 0x14 && where < 0x40) || (where >= 0x48)) {
@@ -148,7 +148,7 @@ oh_my_gawd:
}
/*
- * IOC3 is fucked fucked beyond believe ... Don't try to access
+ * IOC3 is fucking fucked beyond belief ... Don't try to access
* anything but 32-bit words ...
*/
bridge->b_pci_cfg = (busno << 16) | (slot << 11);
@@ -189,7 +189,7 @@ static int pci_conf0_write_config(struct pci_bus *bus, unsigned int devfn,
return PCIBIOS_DEVICE_NOT_FOUND;
/*
- * IOC3 is fucked fucked beyond believe ... Don't even give the
+ * IOC3 is fucking fucked beyond belief ... Don't even give the
* generic PCI code a chance to look at it for real ...
*/
if (cf == (PCI_VENDOR_ID_SGI | (PCI_DEVICE_ID_SGI_IOC3 << 16)))
@@ -213,14 +213,14 @@ static int pci_conf0_write_config(struct pci_bus *bus, unsigned int devfn,
oh_my_gawd:
/*
- * IOC3 is fucked fucked beyond believe ... Don't even give the
+ * IOC3 is fucking fucked beyond belief ... Don't even give the
* generic PCI code a chance to touch the wrong register.
*/
if ((where >= 0x14 && where < 0x40) || (where >= 0x48))
return PCIBIOS_SUCCESSFUL;
/*
- * IOC3 is fucked fucked beyond believe ... Don't try to access
+ * IOC3 is fucking fucked beyond belief ... Don't try to access
* anything but 32-bit words ...
*/
addr = &bridge->b_type0_cfg_dev[slot].f[fn].l[where >> 2];
@@ -257,7 +257,7 @@ static int pci_conf1_write_config(struct pci_bus *bus, unsigned int devfn,
return PCIBIOS_DEVICE_NOT_FOUND;
/*
- * IOC3 is fucked fucked beyond believe ... Don't even give the
+ * IOC3 is fucking fucked beyond belief ... Don't even give the
* generic PCI code a chance to look at it for real ...
*/
if (cf == (PCI_VENDOR_ID_SGI | (PCI_DEVICE_ID_SGI_IOC3 << 16)))
@@ -281,14 +281,14 @@ static int pci_conf1_write_config(struct pci_bus *bus, unsigned int devfn,
oh_my_gawd:
/*
- * IOC3 is fucked fucked beyond believe ... Don't even give the
+ * IOC3 is fucking fucked beyond belief ... Don't even give the
* generic PCI code a chance to touch the wrong register.
*/
if ((where >= 0x14 && where < 0x40) || (where >= 0x48))
return PCIBIOS_SUCCESSFUL;
/*
- * IOC3 is fucked fucked beyond believe ... Don't try to access
+ * IOC3 is fucking fucked beyond belief ... Don't try to access
* anything but 32-bit words ...
*/
addr = &bridge->b_type0_cfg_dev[slot].f[fn].l[where >> 2];
diff --git a/arch/mips/pci/ops-titan-ht.c b/arch/mips/pci/ops-titan-ht.c
deleted file mode 100644
index 57d54ad..0000000
--- a/arch/mips/pci/ops-titan-ht.c
+++ /dev/null
@@ -1,124 +0,0 @@
-/*
- * Copyright 2003 PMC-Sierra
- * Author: Manish Lachwani (lachwani@pmc-sierra.com)
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#include <linux/types.h>
-#include <linux/pci.h>
-#include <linux/kernel.h>
-#include <linux/delay.h>
-#include <asm/io.h>
-
-#include <asm/titan_dep.h>
-
-static int titan_ht_config_read_dword(struct pci_bus *bus, unsigned int devfn,
- int offset, u32 *val)
-{
- volatile uint32_t address;
- int busno;
-
- busno = bus->number;
-
- address = (busno << 16) | (devfn << 8) | (offset & 0xfc) | 0x80000000;
- if (busno != 0)
- address |= 1;
-
- /*
- * RM9000 HT Errata: Issue back to back HT config
- * transcations. Issue a BIU sync before and
- * after the HT cycle
- */
-
- *(volatile int32_t *) 0xfb0000f0 |= 0x2;
-
- udelay(30);
-
- *(volatile int32_t *) 0xfb0006f8 = address;
- *(val) = *(volatile int32_t *) 0xfb0006fc;
-
- udelay(30);
-
- * (volatile int32_t *) 0xfb0000f0 |= 0x2;
-
- return PCIBIOS_SUCCESSFUL;
-}
-
-static int titan_ht_config_read(struct pci_bus *bus, unsigned int devfn,
- int offset, int size, u32 *val)
-{
- uint32_t dword;
-
- titan_ht_config_read_dword(bus, devfn, offset, &dword);
-
- dword >>= ((offset & 3) << 3);
- dword &= (0xffffffffU >> ((4 - size) << 8));
-
- return PCIBIOS_SUCCESSFUL;
-}
-
-static inline int titan_ht_config_write_dword(struct pci_bus *bus,
- unsigned int devfn, int offset, u32 val)
-{
- volatile uint32_t address;
- int busno;
-
- busno = bus->number;
-
- address = (busno << 16) | (devfn << 8) | (offset & 0xfc) | 0x80000000;
- if (busno != 0)
- address |= 1;
-
- *(volatile int32_t *) 0xfb0000f0 |= 0x2;
-
- udelay(30);
-
- *(volatile int32_t *) 0xfb0006f8 = address;
- *(volatile int32_t *) 0xfb0006fc = val;
-
- udelay(30);
-
- *(volatile int32_t *) 0xfb0000f0 |= 0x2;
-
- return PCIBIOS_SUCCESSFUL;
-}
-
-static int titan_ht_config_write(struct pci_bus *bus, unsigned int devfn,
- int offset, int size, u32 val)
-{
- uint32_t val1, val2, mask;
-
- titan_ht_config_read_dword(bus, devfn, offset, &val2);
-
- val1 = val << ((offset & 3) << 3);
- mask = ~(0xffffffffU >> ((4 - size) << 8));
- val2 &= ~(mask << ((offset & 3) << 8));
-
- titan_ht_config_write_dword(bus, devfn, offset, val1 | val2);
-
- return PCIBIOS_SUCCESSFUL;
-}
-
-struct pci_ops titan_ht_pci_ops = {
- .read = titan_ht_config_read,
- .write = titan_ht_config_write,
-};
diff --git a/arch/mips/pci/ops-titan.c b/arch/mips/pci/ops-titan.c
deleted file mode 100644
index ebf8fc4..0000000
--- a/arch/mips/pci/ops-titan.c
+++ /dev/null
@@ -1,111 +0,0 @@
-/*
- * Copyright 2003 PMC-Sierra
- * Author: Manish Lachwani (lachwani@pmc-sierra.com)
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-#include <linux/types.h>
-#include <linux/pci.h>
-#include <linux/kernel.h>
-
-#include <asm/pci.h>
-#include <asm/io.h>
-#include <asm/rm9k-ocd.h>
-
-/*
- * PCI specific defines
- */
-#define TITAN_PCI_0_CONFIG_ADDRESS 0x780
-#define TITAN_PCI_0_CONFIG_DATA 0x784
-
-/*
- * Titan PCI Config Read Byte
- */
-static int titan_read_config(struct pci_bus *bus, unsigned int devfn, int reg,
- int size, u32 * val)
-{
- uint32_t address, tmp;
- int dev, busno, func;
-
- busno = bus->number;
- dev = PCI_SLOT(devfn);
- func = PCI_FUNC(devfn);
-
- address = (busno << 16) | (dev << 11) | (func << 8) |
- (reg & 0xfc) | 0x80000000;
-
-
- /* start the configuration cycle */
- ocd_writel(address, TITAN_PCI_0_CONFIG_ADDRESS);
- tmp = ocd_readl(TITAN_PCI_0_CONFIG_DATA) >> ((reg & 3) << 3);
-
- switch (size) {
- case 1:
- tmp &= 0xff;
- case 2:
- tmp &= 0xffff;
- }
- *val = tmp;
-
- return PCIBIOS_SUCCESSFUL;
-}
-
-static int titan_write_config(struct pci_bus *bus, unsigned int devfn, int reg,
- int size, u32 val)
-{
- uint32_t address;
- int dev, busno, func;
-
- busno = bus->number;
- dev = PCI_SLOT(devfn);
- func = PCI_FUNC(devfn);
-
- address = (busno << 16) | (dev << 11) | (func << 8) |
- (reg & 0xfc) | 0x80000000;
-
- /* start the configuration cycle */
- ocd_writel(address, TITAN_PCI_0_CONFIG_ADDRESS);
-
- /* write the data */
- switch (size) {
- case 1:
- ocd_writeb(val, TITAN_PCI_0_CONFIG_DATA + (~reg & 0x3));
- break;
-
- case 2:
- ocd_writew(val, TITAN_PCI_0_CONFIG_DATA + (~reg & 0x2));
- break;
-
- case 4:
- ocd_writel(val, TITAN_PCI_0_CONFIG_DATA);
- break;
- }
-
- return PCIBIOS_SUCCESSFUL;
-}
-
-/*
- * Titan PCI structure
- */
-struct pci_ops titan_pci_ops = {
- titan_read_config,
- titan_write_config,
-};
diff --git a/arch/mips/pci/pci-bcm63xx.c b/arch/mips/pci/pci-bcm63xx.c
index 8a48139..ca179b6 100644
--- a/arch/mips/pci/pci-bcm63xx.c
+++ b/arch/mips/pci/pci-bcm63xx.c
@@ -11,8 +11,11 @@
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/delay.h>
+#include <linux/clk.h>
#include <asm/bootinfo.h>
+#include <bcm63xx_reset.h>
+
#include "pci-bcm63xx.h"
/*
@@ -119,41 +122,36 @@ static void __init bcm63xx_reset_pcie(void)
{
u32 val;
- /* enable clock */
- val = bcm_perf_readl(PERF_CKCTL_REG);
- val |= CKCTL_6328_PCIE_EN;
- bcm_perf_writel(val, PERF_CKCTL_REG);
-
/* enable SERDES */
val = bcm_misc_readl(MISC_SERDES_CTRL_REG);
val |= SERDES_PCIE_EN | SERDES_PCIE_EXD_EN;
bcm_misc_writel(val, MISC_SERDES_CTRL_REG);
/* reset the PCIe core */
- val = bcm_perf_readl(PERF_SOFTRESET_6328_REG);
-
- val &= ~SOFTRESET_6328_PCIE_MASK;
- val &= ~SOFTRESET_6328_PCIE_CORE_MASK;
- val &= ~SOFTRESET_6328_PCIE_HARD_MASK;
- val &= ~SOFTRESET_6328_PCIE_EXT_MASK;
- bcm_perf_writel(val, PERF_SOFTRESET_6328_REG);
+ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE, 1);
+ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_EXT, 1);
mdelay(10);
- val |= SOFTRESET_6328_PCIE_MASK;
- val |= SOFTRESET_6328_PCIE_CORE_MASK;
- val |= SOFTRESET_6328_PCIE_HARD_MASK;
- bcm_perf_writel(val, PERF_SOFTRESET_6328_REG);
+ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE, 0);
mdelay(10);
- val |= SOFTRESET_6328_PCIE_EXT_MASK;
- bcm_perf_writel(val, PERF_SOFTRESET_6328_REG);
+ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_EXT, 0);
mdelay(200);
}
+static struct clk *pcie_clk;
+
static int __init bcm63xx_register_pcie(void)
{
u32 val;
+ /* enable clock */
+ pcie_clk = clk_get(NULL, "pcie");
+ if (IS_ERR_OR_NULL(pcie_clk))
+ return -ENODEV;
+
+ clk_prepare_enable(pcie_clk);
+
bcm63xx_reset_pcie();
/* configure the PCIe bridge */
diff --git a/arch/mips/pci/pci-octeon.c b/arch/mips/pci/pci-octeon.c
index 4b0c347..5b5ed76 100644
--- a/arch/mips/pci/pci-octeon.c
+++ b/arch/mips/pci/pci-octeon.c
@@ -11,6 +11,7 @@
#include <linux/interrupt.h>
#include <linux/time.h>
#include <linux/delay.h>
+#include <linux/platform_device.h>
#include <linux/swiotlb.h>
#include <asm/time.h>
@@ -704,6 +705,10 @@ static int __init octeon_pci_setup(void)
*/
cvmx_write_csr(CVMX_NPI_PCI_INT_SUM2, -1);
+ if (IS_ERR(platform_device_register_simple("octeon_pci_edac",
+ -1, NULL, 0)))
+ pr_err("Registation of co_pci_edac failed!\n");
+
octeon_pci_dma_init();
return 0;
diff --git a/arch/mips/pci/pci-xlr.c b/arch/mips/pci/pci-xlr.c
index 18af021..0c18ccc 100644
--- a/arch/mips/pci/pci-xlr.c
+++ b/arch/mips/pci/pci-xlr.c
@@ -47,6 +47,7 @@
#include <asm/netlogic/interrupt.h>
#include <asm/netlogic/haldefs.h>
+#include <asm/netlogic/common.h>
#include <asm/netlogic/xlr/msidef.h>
#include <asm/netlogic/xlr/iomap.h>
@@ -174,22 +175,9 @@ static struct pci_dev *xls_get_pcie_link(const struct pci_dev *dev)
return p ? bus->self : NULL;
}
-static int get_irq_vector(const struct pci_dev *dev)
+static int nlm_pci_link_to_irq(int link)
{
- struct pci_dev *lnk;
-
- if (!nlm_chip_is_xls())
- return PIC_PCIX_IRQ; /* for XLR just one IRQ */
-
- /*
- * For XLS PCIe, there is an IRQ per Link, find out which
- * link the device is on to assign interrupts
- */
- lnk = xls_get_pcie_link(dev);
- if (lnk == NULL)
- return 0;
-
- switch (PCI_SLOT(lnk->devfn)) {
+ switch (link) {
case 0:
return PIC_PCIE_LINK0_IRQ;
case 1:
@@ -205,10 +193,26 @@ static int get_irq_vector(const struct pci_dev *dev)
else
return PIC_PCIE_LINK3_IRQ;
}
- WARN(1, "Unexpected devfn %d\n", lnk->devfn);
+ WARN(1, "Unexpected link %d\n", link);
return 0;
}
+static int get_irq_vector(const struct pci_dev *dev)
+{
+ struct pci_dev *lnk;
+ int link;
+
+ if (!nlm_chip_is_xls())
+ return PIC_PCIX_IRQ; /* for XLR just one IRQ */
+
+ lnk = xls_get_pcie_link(dev);
+ if (lnk == NULL)
+ return 0;
+
+ link = PCI_SLOT(lnk->devfn);
+ return nlm_pci_link_to_irq(link);
+}
+
#ifdef CONFIG_PCI_MSI
void destroy_irq(unsigned int irq)
{
@@ -332,6 +336,9 @@ int pcibios_plat_dev_init(struct pci_dev *dev)
static int __init pcibios_init(void)
{
+ void (*extra_ack)(struct irq_data *);
+ int link, irq;
+
/* PSB assigns PCI resources */
pci_set_flags(PCI_PROBE_ONLY);
pci_config_base = ioremap(DEFAULT_PCI_CONFIG_BASE, 16 << 20);
@@ -350,27 +357,19 @@ static int __init pcibios_init(void)
* For PCI interrupts, we need to ack the PCI controller too, overload
* irq handler data to do this
*/
- if (nlm_chip_is_xls()) {
- if (nlm_chip_is_xls_b()) {
- irq_set_handler_data(PIC_PCIE_LINK0_IRQ,
- xls_pcie_ack_b);
- irq_set_handler_data(PIC_PCIE_LINK1_IRQ,
- xls_pcie_ack_b);
- irq_set_handler_data(PIC_PCIE_XLSB0_LINK2_IRQ,
- xls_pcie_ack_b);
- irq_set_handler_data(PIC_PCIE_XLSB0_LINK3_IRQ,
- xls_pcie_ack_b);
- } else {
- irq_set_handler_data(PIC_PCIE_LINK0_IRQ, xls_pcie_ack);
- irq_set_handler_data(PIC_PCIE_LINK1_IRQ, xls_pcie_ack);
- irq_set_handler_data(PIC_PCIE_LINK2_IRQ, xls_pcie_ack);
- irq_set_handler_data(PIC_PCIE_LINK3_IRQ, xls_pcie_ack);
- }
- } else {
+ if (!nlm_chip_is_xls()) {
/* XLR PCI controller ACK */
- irq_set_handler_data(PIC_PCIX_IRQ, xlr_pci_ack);
+ nlm_set_pic_extra_ack(0, PIC_PCIX_IRQ, xlr_pci_ack);
+ } else {
+ if (nlm_chip_is_xls_b())
+ extra_ack = xls_pcie_ack_b;
+ else
+ extra_ack = xls_pcie_ack;
+ for (link = 0; link < 4; link++) {
+ irq = nlm_pci_link_to_irq(link);
+ nlm_set_pic_extra_ack(0, irq, extra_ack);
+ }
}
-
return 0;
}
diff --git a/arch/mips/pci/pci-yosemite.c b/arch/mips/pci/pci-yosemite.c
deleted file mode 100644
index cf5e1a2..0000000
--- a/arch/mips/pci/pci-yosemite.c
+++ /dev/null
@@ -1,67 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
- */
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/pci.h>
-#include <asm/titan_dep.h>
-
-extern struct pci_ops titan_pci_ops;
-
-static struct resource py_mem_resource = {
- .start = 0xe0000000UL,
- .end = 0xe3ffffffUL,
- .name = "Titan PCI MEM",
- .flags = IORESOURCE_MEM
-};
-
-/*
- * PMON really reserves 16MB of I/O port space but that's stupid, nothing
- * needs that much since allocations are limited to 256 bytes per device
- * anyway. So we just claim 64kB here.
- */
-#define TITAN_IO_SIZE 0x0000ffffUL
-#define TITAN_IO_BASE 0xe8000000UL
-
-static struct resource py_io_resource = {
- .start = 0x00001000UL,
- .end = TITAN_IO_SIZE - 1,
- .name = "Titan IO MEM",
- .flags = IORESOURCE_IO,
-};
-
-static struct pci_controller py_controller = {
- .pci_ops = &titan_pci_ops,
- .mem_resource = &py_mem_resource,
- .mem_offset = 0x00000000UL,
- .io_resource = &py_io_resource,
- .io_offset = 0x00000000UL
-};
-
-static char ioremap_failed[] __initdata = "Could not ioremap I/O port range";
-
-static int __init pmc_yosemite_setup(void)
-{
- unsigned long io_v_base;
-
- io_v_base = (unsigned long) ioremap(TITAN_IO_BASE, TITAN_IO_SIZE);
- if (!io_v_base)
- panic(ioremap_failed);
-
- set_io_port_base(io_v_base);
- py_controller.io_map_base = io_v_base;
- TITAN_WRITE(RM9000x2_OCD_LKM7, TITAN_READ(RM9000x2_OCD_LKM7) | 1);
-
- ioport_resource.end = TITAN_IO_SIZE - 1;
-
- register_pci_controller(&py_controller);
-
- return 0;
-}
-
-arch_initcall(pmc_yosemite_setup);
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