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-rw-r--r--arch/mips/include/asm/bcache.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/include/asm/bcache.h b/arch/mips/include/asm/bcache.h
index 0ba9d6e..8c34484 100644
--- a/arch/mips/include/asm/bcache.h
+++ b/arch/mips/include/asm/bcache.h
@@ -11,7 +11,7 @@
/* Some R4000 / R4400 / R4600 / R5000 machines may have a non-dma-coherent,
- chipset implemented caches. On machines with other CPUs the CPU does the
+ chipset implemented caches. On machines with other CPUs the CPU does the
cache thing itself. */
struct bcache_ops {
void (*bc_enable)(void);
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