diff options
Diffstat (limited to 'arch/m68k')
-rw-r--r-- | arch/m68k/include/asm/m525xsim.h | 2 | ||||
-rw-r--r-- | arch/m68k/include/asm/m54xxsim.h | 12 | ||||
-rw-r--r-- | arch/m68k/include/asm/mcfgpio.h | 12 | ||||
-rw-r--r-- | arch/m68k/kernel/setup_no.c | 13 | ||||
-rw-r--r-- | arch/m68k/platform/68000/m68EZ328.c | 3 | ||||
-rw-r--r-- | arch/m68k/platform/68000/m68VZ328.c | 1 | ||||
-rw-r--r-- | arch/m68k/platform/coldfire/gpio.c | 34 | ||||
-rw-r--r-- | arch/m68k/platform/coldfire/m520x.c | 8 | ||||
-rw-r--r-- | arch/m68k/platform/coldfire/m523x.c | 10 | ||||
-rw-r--r-- | arch/m68k/platform/coldfire/m5249.c | 10 | ||||
-rw-r--r-- | arch/m68k/platform/coldfire/m525x.c | 2 | ||||
-rw-r--r-- | arch/m68k/platform/coldfire/m5272.c | 2 | ||||
-rw-r--r-- | arch/m68k/platform/coldfire/m527x.c | 10 | ||||
-rw-r--r-- | arch/m68k/platform/coldfire/m528x.c | 10 | ||||
-rw-r--r-- | arch/m68k/platform/coldfire/m53xx.c | 8 |
15 files changed, 74 insertions, 63 deletions
diff --git a/arch/m68k/include/asm/m525xsim.h b/arch/m68k/include/asm/m525xsim.h index e33f5bb..f186459 100644 --- a/arch/m68k/include/asm/m525xsim.h +++ b/arch/m68k/include/asm/m525xsim.h @@ -105,7 +105,7 @@ /* * QSPI module. */ -#define MCFQSPI_BASE (MCF_MBAR + 0x300) /* Base address QSPI */ +#define MCFQSPI_BASE (MCF_MBAR + 0x400) /* Base address QSPI */ #define MCFQSPI_SIZE 0x40 /* Register set size */ #ifdef CONFIG_M5249 diff --git a/arch/m68k/include/asm/m54xxsim.h b/arch/m68k/include/asm/m54xxsim.h index d3bd838..a5fbd17 100644 --- a/arch/m68k/include/asm/m54xxsim.h +++ b/arch/m68k/include/asm/m54xxsim.h @@ -55,9 +55,15 @@ /* * Generic GPIO support */ -#define MCFGPIO_PIN_MAX 0 /* I am too lazy to count */ -#define MCFGPIO_IRQ_MAX -1 -#define MCFGPIO_IRQ_VECBASE -1 +#define MCFGPIO_PODR (MCF_MBAR + 0xA00) +#define MCFGPIO_PDDR (MCF_MBAR + 0xA10) +#define MCFGPIO_PPDR (MCF_MBAR + 0xA20) +#define MCFGPIO_SETR (MCF_MBAR + 0xA20) +#define MCFGPIO_CLRR (MCF_MBAR + 0xA30) + +#define MCFGPIO_PIN_MAX 136 /* 128 gpio + 8 eport */ +#define MCFGPIO_IRQ_MAX 8 +#define MCFGPIO_IRQ_VECBASE MCFINT_VECBASE /* * EDGE Port support. diff --git a/arch/m68k/include/asm/mcfgpio.h b/arch/m68k/include/asm/mcfgpio.h index c41ebf4..66203c3 100644 --- a/arch/m68k/include/asm/mcfgpio.h +++ b/arch/m68k/include/asm/mcfgpio.h @@ -139,7 +139,8 @@ static inline void gpio_free(unsigned gpio) #if defined(CONFIG_M520x) || defined(CONFIG_M523x) || \ defined(CONFIG_M527x) || defined(CONFIG_M528x) || \ - defined(CONFIG_M53xx) || defined(CONFIG_M5441x) + defined(CONFIG_M53xx) || defined(CONFIG_M54xx) || \ + defined(CONFIG_M5441x) /* * These parts have an 'Edge' Port module (external interrupt/GPIO) which uses * read-modify-write to change an output and a GPIO module which has separate @@ -195,7 +196,8 @@ static inline u32 __mcfgpio_ppdr(unsigned gpio) return MCFSIM2_GPIO1READ; #elif defined(CONFIG_M520x) || defined(CONFIG_M523x) || \ defined(CONFIG_M527x) || defined(CONFIG_M528x) || \ - defined(CONFIG_M53xx) || defined(CONFIG_M5441x) + defined(CONFIG_M53xx) || defined(CONFIG_M54xx) || \ + defined(CONFIG_M5441x) #if !defined(CONFIG_M5441x) if (gpio < 8) return MCFEPORT_EPPDR; @@ -237,7 +239,8 @@ static inline u32 __mcfgpio_podr(unsigned gpio) return MCFSIM2_GPIO1WRITE; #elif defined(CONFIG_M520x) || defined(CONFIG_M523x) || \ defined(CONFIG_M527x) || defined(CONFIG_M528x) || \ - defined(CONFIG_M53xx) || defined(CONFIG_M5441x) + defined(CONFIG_M53xx) || defined(CONFIG_M54xx) || \ + defined(CONFIG_M5441x) #if !defined(CONFIG_M5441x) if (gpio < 8) return MCFEPORT_EPDR; @@ -279,7 +282,8 @@ static inline u32 __mcfgpio_pddr(unsigned gpio) return MCFSIM2_GPIO1ENABLE; #elif defined(CONFIG_M520x) || defined(CONFIG_M523x) || \ defined(CONFIG_M527x) || defined(CONFIG_M528x) || \ - defined(CONFIG_M53xx) || defined(CONFIG_M5441x) + defined(CONFIG_M53xx) || defined(CONFIG_M54xx) || \ + defined(CONFIG_M5441x) #if !defined(CONFIG_M5441x) if (gpio < 8) return MCFEPORT_EPDDR; diff --git a/arch/m68k/kernel/setup_no.c b/arch/m68k/kernel/setup_no.c index 5b16f5d..88c27d9 100644 --- a/arch/m68k/kernel/setup_no.c +++ b/arch/m68k/kernel/setup_no.c @@ -58,17 +58,16 @@ void (*mach_halt)(void); void (*mach_power_off)(void); #ifdef CONFIG_M68000 -#define CPU_NAME "MC68000" -#endif -#ifdef CONFIG_M68328 +#if defined(CONFIG_M68328) #define CPU_NAME "MC68328" -#endif -#ifdef CONFIG_M68EZ328 +#elif defined(CONFIG_M68EZ328) #define CPU_NAME "MC68EZ328" -#endif -#ifdef CONFIG_M68VZ328 +#elif defined(CONFIG_M68VZ328) #define CPU_NAME "MC68VZ328" +#else +#define CPU_NAME "MC68000" #endif +#endif /* CONFIG_M68000 */ #ifdef CONFIG_M68360 #define CPU_NAME "MC68360" #endif diff --git a/arch/m68k/platform/68000/m68EZ328.c b/arch/m68k/platform/68000/m68EZ328.c index 332b5e8..2195290 100644 --- a/arch/m68k/platform/68000/m68EZ328.c +++ b/arch/m68k/platform/68000/m68EZ328.c @@ -69,7 +69,8 @@ void __init config_BSP(char *command, int len) if (p) strcpy(p,command); else command[0] = 0; #endif - + + mach_sched_init = hw_timer_init; mach_hwclk = m68328_hwclk; mach_reset = m68ez328_reset; } diff --git a/arch/m68k/platform/68000/m68VZ328.c b/arch/m68k/platform/68000/m68VZ328.c index fd66583..0e5e5a1 100644 --- a/arch/m68k/platform/68000/m68VZ328.c +++ b/arch/m68k/platform/68000/m68VZ328.c @@ -182,6 +182,7 @@ void __init config_BSP(char *command, int size) init_hardware(command, size); + mach_sched_init = hw_timer_init; mach_hwclk = m68328_hwclk; mach_reset = m68vz328_reset; } diff --git a/arch/m68k/platform/coldfire/gpio.c b/arch/m68k/platform/coldfire/gpio.c index 9cd2b5c..e7e4286 100644 --- a/arch/m68k/platform/coldfire/gpio.c +++ b/arch/m68k/platform/coldfire/gpio.c @@ -76,10 +76,7 @@ int __mcfgpio_direction_output(unsigned gpio, int value) local_irq_save(flags); data = mcfgpio_read(__mcfgpio_pddr(gpio)); - if (value) - data |= mcfgpio_bit(gpio); - else - data &= mcfgpio_bit(gpio); + data |= mcfgpio_bit(gpio); mcfgpio_write(data, __mcfgpio_pddr(gpio)); /* now set the data to output */ @@ -117,37 +114,51 @@ EXPORT_SYMBOL(__mcfgpio_free); #ifdef CONFIG_GPIOLIB -int mcfgpio_direction_input(struct gpio_chip *chip, unsigned offset) +static int mcfgpio_direction_input(struct gpio_chip *chip, unsigned offset) { return __mcfgpio_direction_input(offset); } -int mcfgpio_get_value(struct gpio_chip *chip, unsigned offset) +static int mcfgpio_get_value(struct gpio_chip *chip, unsigned offset) { return __mcfgpio_get_value(offset); } -int mcfgpio_direction_output(struct gpio_chip *chip, unsigned offset, int value) +static int mcfgpio_direction_output(struct gpio_chip *chip, unsigned offset, + int value) { return __mcfgpio_direction_output(offset, value); } -void mcfgpio_set_value(struct gpio_chip *chip, unsigned offset, int value) +static void mcfgpio_set_value(struct gpio_chip *chip, unsigned offset, + int value) { __mcfgpio_set_value(offset, value); } -int mcfgpio_request(struct gpio_chip *chip, unsigned offset) +static int mcfgpio_request(struct gpio_chip *chip, unsigned offset) { return __mcfgpio_request(offset); } -void mcfgpio_free(struct gpio_chip *chip, unsigned offset) +static void mcfgpio_free(struct gpio_chip *chip, unsigned offset) { __mcfgpio_free(offset); } -struct bus_type mcfgpio_subsys = { +static int mcfgpio_to_irq(struct gpio_chip *chip, unsigned offset) +{ +#if defined(MCFGPIO_IRQ_MIN) + if ((offset >= MCFGPIO_IRQ_MIN) && (offset < MCFGPIO_IRQ_MAX)) +#else + if (offset < MCFGPIO_IRQ_MAX) +#endif + return MCFGPIO_IRQ_VECBASE + offset; + else + return -EINVAL; +} + +static struct bus_type mcfgpio_subsys = { .name = "gpio", .dev_name = "gpio", }; @@ -160,6 +171,7 @@ static struct gpio_chip mcfgpio_chip = { .direction_output = mcfgpio_direction_output, .get = mcfgpio_get_value, .set = mcfgpio_set_value, + .to_irq = mcfgpio_to_irq, .base = 0, .ngpio = MCFGPIO_PIN_MAX, }; diff --git a/arch/m68k/platform/coldfire/m520x.c b/arch/m68k/platform/coldfire/m520x.c index ea1be0e..4040a3c 100644 --- a/arch/m68k/platform/coldfire/m520x.c +++ b/arch/m68k/platform/coldfire/m520x.c @@ -118,10 +118,9 @@ static void __init m520x_clk_init(void) /***************************************************************************/ -#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) - static void __init m520x_qspi_init(void) { +#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) u16 par; /* setup Port QS for QSPI with gpio CS control */ writeb(0x3f, MCF_GPIO_PAR_QSPI); @@ -129,9 +128,8 @@ static void __init m520x_qspi_init(void) par = readw(MCF_GPIO_PAR_UART); par &= 0x00ff; writew(par, MCF_GPIO_PAR_UART); -} - #endif /* IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) */ +} /***************************************************************************/ @@ -176,9 +174,7 @@ void __init config_BSP(char *commandp, int size) m520x_clk_init(); m520x_uarts_init(); m520x_fec_init(); -#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) m520x_qspi_init(); -#endif } /***************************************************************************/ diff --git a/arch/m68k/platform/coldfire/m523x.c b/arch/m68k/platform/coldfire/m523x.c index 2b10e9f..6b7135e 100644 --- a/arch/m68k/platform/coldfire/m523x.c +++ b/arch/m68k/platform/coldfire/m523x.c @@ -32,6 +32,7 @@ DEFINE_CLK(mcfpit3, "mcfpit.3", MCF_CLK); DEFINE_CLK(mcfuart0, "mcfuart.0", MCF_BUSCLK); DEFINE_CLK(mcfuart1, "mcfuart.1", MCF_BUSCLK); DEFINE_CLK(mcfuart2, "mcfuart.2", MCF_BUSCLK); +DEFINE_CLK(mcfqspi0, "mcfqspi.0", MCF_BUSCLK); DEFINE_CLK(fec0, "fec.0", MCF_BUSCLK); struct clk *mcf_clks[] = { @@ -44,16 +45,16 @@ struct clk *mcf_clks[] = { &clk_mcfuart0, &clk_mcfuart1, &clk_mcfuart2, + &clk_mcfqspi0, &clk_fec0, NULL }; /***************************************************************************/ -#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) - static void __init m523x_qspi_init(void) { +#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) u16 par; /* setup QSPS pins for QSPI with gpio CS control */ @@ -62,9 +63,8 @@ static void __init m523x_qspi_init(void) par = readw(MCFGPIO_PAR_TIMER); par &= 0x3f3f; writew(par, MCFGPIO_PAR_TIMER); -} - #endif /* IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) */ +} /***************************************************************************/ @@ -80,9 +80,7 @@ void __init config_BSP(char *commandp, int size) { mach_sched_init = hw_timer_init; m523x_fec_init(); -#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) m523x_qspi_init(); -#endif } /***************************************************************************/ diff --git a/arch/m68k/platform/coldfire/m5249.c b/arch/m68k/platform/coldfire/m5249.c index c80b5e5..f6253a3 100644 --- a/arch/m68k/platform/coldfire/m5249.c +++ b/arch/m68k/platform/coldfire/m5249.c @@ -26,6 +26,7 @@ DEFINE_CLK(mcftmr0, "mcftmr.0", MCF_BUSCLK); DEFINE_CLK(mcftmr1, "mcftmr.1", MCF_BUSCLK); DEFINE_CLK(mcfuart0, "mcfuart.0", MCF_BUSCLK); DEFINE_CLK(mcfuart1, "mcfuart.1", MCF_BUSCLK); +DEFINE_CLK(mcfqspi0, "mcfqspi.0", MCF_BUSCLK); struct clk *mcf_clks[] = { &clk_pll, @@ -34,6 +35,7 @@ struct clk *mcf_clks[] = { &clk_mcftmr1, &clk_mcfuart0, &clk_mcfuart1, + &clk_mcfqspi0, NULL }; @@ -71,17 +73,15 @@ static struct platform_device *m5249_devices[] __initdata = { /***************************************************************************/ -#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) - static void __init m5249_qspi_init(void) { +#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) /* QSPI irq setup */ writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL4 | MCFSIM_ICR_PRI0, MCFSIM_QSPIICR); mcf_mapirq2imr(MCF_IRQ_QSPI, MCFINTC_QSPI); -} - #endif /* IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) */ +} /***************************************************************************/ @@ -110,9 +110,7 @@ void __init config_BSP(char *commandp, int size) #ifdef CONFIG_M5249C3 m5249_smc91x_init(); #endif -#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) m5249_qspi_init(); -#endif } /***************************************************************************/ diff --git a/arch/m68k/platform/coldfire/m525x.c b/arch/m68k/platform/coldfire/m525x.c index 5b9f657..1adba39 100644 --- a/arch/m68k/platform/coldfire/m525x.c +++ b/arch/m68k/platform/coldfire/m525x.c @@ -26,6 +26,7 @@ DEFINE_CLK(mcftmr0, "mcftmr.0", MCF_BUSCLK); DEFINE_CLK(mcftmr1, "mcftmr.1", MCF_BUSCLK); DEFINE_CLK(mcfuart0, "mcfuart.0", MCF_BUSCLK); DEFINE_CLK(mcfuart1, "mcfuart.1", MCF_BUSCLK); +DEFINE_CLK(mcfqspi0, "mcfqspi.0", MCF_BUSCLK); struct clk *mcf_clks[] = { &clk_pll, @@ -34,6 +35,7 @@ struct clk *mcf_clks[] = { &clk_mcftmr1, &clk_mcfuart0, &clk_mcfuart1, + &clk_mcfqspi0, NULL }; diff --git a/arch/m68k/platform/coldfire/m5272.c b/arch/m68k/platform/coldfire/m5272.c index a8c5856..8a4d3cc 100644 --- a/arch/m68k/platform/coldfire/m5272.c +++ b/arch/m68k/platform/coldfire/m5272.c @@ -39,6 +39,7 @@ DEFINE_CLK(mcftmr2, "mcftmr.2", MCF_BUSCLK); DEFINE_CLK(mcftmr3, "mcftmr.3", MCF_BUSCLK); DEFINE_CLK(mcfuart0, "mcfuart.0", MCF_BUSCLK); DEFINE_CLK(mcfuart1, "mcfuart.1", MCF_BUSCLK); +DEFINE_CLK(mcfqspi0, "mcfqspi.0", MCF_BUSCLK); DEFINE_CLK(fec0, "fec.0", MCF_BUSCLK); struct clk *mcf_clks[] = { @@ -50,6 +51,7 @@ struct clk *mcf_clks[] = { &clk_mcftmr3, &clk_mcfuart0, &clk_mcfuart1, + &clk_mcfqspi0, &clk_fec0, NULL }; diff --git a/arch/m68k/platform/coldfire/m527x.c b/arch/m68k/platform/coldfire/m527x.c index 6fbfe909..62d81ef 100644 --- a/arch/m68k/platform/coldfire/m527x.c +++ b/arch/m68k/platform/coldfire/m527x.c @@ -33,6 +33,7 @@ DEFINE_CLK(mcfpit3, "mcfpit.3", MCF_CLK); DEFINE_CLK(mcfuart0, "mcfuart.0", MCF_BUSCLK); DEFINE_CLK(mcfuart1, "mcfuart.1", MCF_BUSCLK); DEFINE_CLK(mcfuart2, "mcfuart.2", MCF_BUSCLK); +DEFINE_CLK(mcfqspi0, "mcfqspi.0", MCF_BUSCLK); DEFINE_CLK(fec0, "fec.0", MCF_BUSCLK); DEFINE_CLK(fec1, "fec.1", MCF_BUSCLK); @@ -46,6 +47,7 @@ struct clk *mcf_clks[] = { &clk_mcfuart0, &clk_mcfuart1, &clk_mcfuart2, + &clk_mcfqspi0, &clk_fec0, &clk_fec1, NULL @@ -53,10 +55,9 @@ struct clk *mcf_clks[] = { /***************************************************************************/ -#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) - static void __init m527x_qspi_init(void) { +#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) #if defined(CONFIG_M5271) u16 par; @@ -70,9 +71,8 @@ static void __init m527x_qspi_init(void) /* setup QSPS pins for QSPI with gpio CS control */ writew(0x003e, MCFGPIO_PAR_QSPI); #endif -} - #endif /* IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) */ +} /***************************************************************************/ @@ -120,9 +120,7 @@ void __init config_BSP(char *commandp, int size) mach_sched_init = hw_timer_init; m527x_uarts_init(); m527x_fec_init(); -#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) m527x_qspi_init(); -#endif } /***************************************************************************/ diff --git a/arch/m68k/platform/coldfire/m528x.c b/arch/m68k/platform/coldfire/m528x.c index b03a9d2..21cd161 100644 --- a/arch/m68k/platform/coldfire/m528x.c +++ b/arch/m68k/platform/coldfire/m528x.c @@ -34,6 +34,7 @@ DEFINE_CLK(mcfpit3, "mcfpit.3", MCF_CLK); DEFINE_CLK(mcfuart0, "mcfuart.0", MCF_BUSCLK); DEFINE_CLK(mcfuart1, "mcfuart.1", MCF_BUSCLK); DEFINE_CLK(mcfuart2, "mcfuart.2", MCF_BUSCLK); +DEFINE_CLK(mcfqspi0, "mcfqspi.0", MCF_BUSCLK); DEFINE_CLK(fec0, "fec.0", MCF_BUSCLK); struct clk *mcf_clks[] = { @@ -46,21 +47,20 @@ struct clk *mcf_clks[] = { &clk_mcfuart0, &clk_mcfuart1, &clk_mcfuart2, + &clk_mcfqspi0, &clk_fec0, NULL }; /***************************************************************************/ -#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) - static void __init m528x_qspi_init(void) { +#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) /* setup Port QS for QSPI with gpio CS control */ __raw_writeb(0x07, MCFGPIO_PQSPAR); -} - #endif /* IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) */ +} /***************************************************************************/ @@ -126,9 +126,7 @@ void __init config_BSP(char *commandp, int size) mach_sched_init = hw_timer_init; m528x_uarts_init(); m528x_fec_init(); -#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) m528x_qspi_init(); -#endif } /***************************************************************************/ diff --git a/arch/m68k/platform/coldfire/m53xx.c b/arch/m68k/platform/coldfire/m53xx.c index 5286f98..80879a7 100644 --- a/arch/m68k/platform/coldfire/m53xx.c +++ b/arch/m68k/platform/coldfire/m53xx.c @@ -166,15 +166,13 @@ static void __init m53xx_clk_init(void) /***************************************************************************/ -#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) - static void __init m53xx_qspi_init(void) { +#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) /* setup QSPS pins for QSPI with gpio CS control */ writew(0x01f0, MCFGPIO_PAR_QSPI); -} - #endif /* IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) */ +} /***************************************************************************/ @@ -219,9 +217,7 @@ void __init config_BSP(char *commandp, int size) m53xx_clk_init(); m53xx_uarts_init(); m53xx_fec_init(); -#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) m53xx_qspi_init(); -#endif #ifdef CONFIG_BDM_DISABLE /* |