diff options
Diffstat (limited to 'arch/m68k/platform')
| -rw-r--r-- | arch/m68k/platform/coldfire/device.c | 4 | ||||
| -rw-r--r-- | arch/m68k/platform/coldfire/intc-5272.c | 20 | ||||
| -rw-r--r-- | arch/m68k/platform/coldfire/m5249.c | 2 | ||||
| -rw-r--r-- | arch/m68k/platform/coldfire/m525x.c | 4 | ||||
| -rw-r--r-- | arch/m68k/platform/coldfire/timers.c | 4 |
5 files changed, 17 insertions, 17 deletions
diff --git a/arch/m68k/platform/coldfire/device.c b/arch/m68k/platform/coldfire/device.c index 81f0fb5..71ea4c0 100644 --- a/arch/m68k/platform/coldfire/device.c +++ b/arch/m68k/platform/coldfire/device.c @@ -347,12 +347,12 @@ static void __init mcf_uart_set_irq(void) { #ifdef MCFUART_UIVR /* UART0 interrupt setup */ - writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR); + writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCFSIM_UART1ICR); writeb(MCF_IRQ_UART0, MCFUART_BASE0 + MCFUART_UIVR); mcf_mapirq2imr(MCF_IRQ_UART0, MCFINTC_UART0); /* UART1 interrupt setup */ - writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR); + writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCFSIM_UART2ICR); writeb(MCF_IRQ_UART1, MCFUART_BASE1 + MCFUART_UIVR); mcf_mapirq2imr(MCF_IRQ_UART1, MCFINTC_UART1); #endif diff --git a/arch/m68k/platform/coldfire/intc-5272.c b/arch/m68k/platform/coldfire/intc-5272.c index 7160e61..d7b6956 100644 --- a/arch/m68k/platform/coldfire/intc-5272.c +++ b/arch/m68k/platform/coldfire/intc-5272.c @@ -86,7 +86,7 @@ static void intc_irq_mask(struct irq_data *d) u32 v; irq -= MCFINT_VECBASE; v = 0x8 << intc_irqmap[irq].index; - writel(v, MCF_MBAR + intc_irqmap[irq].icr); + writel(v, intc_irqmap[irq].icr); } } @@ -98,7 +98,7 @@ static void intc_irq_unmask(struct irq_data *d) u32 v; irq -= MCFINT_VECBASE; v = 0xd << intc_irqmap[irq].index; - writel(v, MCF_MBAR + intc_irqmap[irq].icr); + writel(v, intc_irqmap[irq].icr); } } @@ -111,10 +111,10 @@ static void intc_irq_ack(struct irq_data *d) irq -= MCFINT_VECBASE; if (intc_irqmap[irq].ack) { u32 v; - v = readl(MCF_MBAR + intc_irqmap[irq].icr); + v = readl(intc_irqmap[irq].icr); v &= (0x7 << intc_irqmap[irq].index); v |= (0x8 << intc_irqmap[irq].index); - writel(v, MCF_MBAR + intc_irqmap[irq].icr); + writel(v, intc_irqmap[irq].icr); } } } @@ -127,12 +127,12 @@ static int intc_irq_set_type(struct irq_data *d, unsigned int type) irq -= MCFINT_VECBASE; if (intc_irqmap[irq].ack) { u32 v; - v = readl(MCF_MBAR + MCFSIM_PITR); + v = readl(MCFSIM_PITR); if (type == IRQ_TYPE_EDGE_FALLING) v &= ~(0x1 << (32 - irq)); else v |= (0x1 << (32 - irq)); - writel(v, MCF_MBAR + MCFSIM_PITR); + writel(v, MCFSIM_PITR); } } return 0; @@ -163,10 +163,10 @@ void __init init_IRQ(void) int irq, edge; /* Mask all interrupt sources */ - writel(0x88888888, MCF_MBAR + MCFSIM_ICR1); - writel(0x88888888, MCF_MBAR + MCFSIM_ICR2); - writel(0x88888888, MCF_MBAR + MCFSIM_ICR3); - writel(0x88888888, MCF_MBAR + MCFSIM_ICR4); + writel(0x88888888, MCFSIM_ICR1); + writel(0x88888888, MCFSIM_ICR2); + writel(0x88888888, MCFSIM_ICR3); + writel(0x88888888, MCFSIM_ICR4); for (irq = 0; (irq < NR_IRQS); irq++) { irq_set_chip(irq, &intc_irq_chip); diff --git a/arch/m68k/platform/coldfire/m5249.c b/arch/m68k/platform/coldfire/m5249.c index 300e729..df2968d 100644 --- a/arch/m68k/platform/coldfire/m5249.c +++ b/arch/m68k/platform/coldfire/m5249.c @@ -57,7 +57,7 @@ static void __init m5249_qspi_init(void) { /* QSPI irq setup */ writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL4 | MCFSIM_ICR_PRI0, - MCF_MBAR + MCFSIM_QSPIICR); + MCFSIM_QSPIICR); mcf_mapirq2imr(MCF_IRQ_QSPI, MCFINTC_QSPI); } diff --git a/arch/m68k/platform/coldfire/m525x.c b/arch/m68k/platform/coldfire/m525x.c index 8ce905f..fce8f8a 100644 --- a/arch/m68k/platform/coldfire/m525x.c +++ b/arch/m68k/platform/coldfire/m525x.c @@ -30,7 +30,7 @@ static void __init m525x_qspi_init(void) /* QSPI irq setup */ writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL4 | MCFSIM_ICR_PRI0, - MCF_MBAR + MCFSIM_QSPIICR); + MCFSIM_QSPIICR); mcf_mapirq2imr(MCF_IRQ_QSPI, MCFINTC_QSPI); #endif /* IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) */ } @@ -42,7 +42,7 @@ static void __init m525x_i2c_init(void) /* first I2C controller uses regular irq setup */ writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL5 | MCFSIM_ICR_PRI0, - MCF_MBAR + MCFSIM_I2CICR); + MCFSIM_I2CICR); mcf_mapirq2imr(MCF_IRQ_I2C0, MCFINTC_I2C); /* second I2C controller is completely different */ diff --git a/arch/m68k/platform/coldfire/timers.c b/arch/m68k/platform/coldfire/timers.c index 0a273e7..51f6d2a 100644 --- a/arch/m68k/platform/coldfire/timers.c +++ b/arch/m68k/platform/coldfire/timers.c @@ -56,13 +56,13 @@ static void init_timer_irq(void) #ifdef MCFSIM_ICR_AUTOVEC /* Timer1 is always used as system timer */ writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI3, - MCF_MBAR + MCFSIM_TIMER1ICR); + MCFSIM_TIMER1ICR); mcf_mapirq2imr(MCF_IRQ_TIMER, MCFINTC_TIMER1); #ifdef CONFIG_HIGHPROFILE /* Timer2 is to be used as a high speed profile timer */ writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3, - MCF_MBAR + MCFSIM_TIMER2ICR); + MCFSIM_TIMER2ICR); mcf_mapirq2imr(MCF_IRQ_PROFILER, MCFINTC_TIMER2); #endif #endif /* MCFSIM_ICR_AUTOVEC */ |
