diff options
Diffstat (limited to 'arch/i386')
| -rw-r--r-- | arch/i386/Kconfig | 5 | ||||
| -rw-r--r-- | arch/i386/kernel/acpi/earlyquirk.c | 10 | ||||
| -rw-r--r-- | arch/i386/kernel/reboot.c | 7 | ||||
| -rw-r--r-- | arch/i386/kernel/setup.c | 4 | ||||
| -rw-r--r-- | arch/i386/kernel/smpboot.c | 2 | ||||
| -rw-r--r-- | arch/i386/kernel/traps.c | 5 | ||||
| -rw-r--r-- | arch/i386/lib/Makefile | 1 | ||||
| -rw-r--r-- | arch/i386/lib/dec_and_lock.c | 42 |
8 files changed, 8 insertions, 68 deletions
diff --git a/arch/i386/Kconfig b/arch/i386/Kconfig index b22f003..d2703cd 100644 --- a/arch/i386/Kconfig +++ b/arch/i386/Kconfig @@ -908,11 +908,6 @@ config IRQBALANCE The default yes will allow the kernel to do irq load balancing. Saying no will keep the kernel from doing irq load balancing. -config HAVE_DEC_LOCK - bool - depends on (SMP || PREEMPT) && X86_CMPXCHG - default y - # turning this on wastes a bunch of space. # Summit needs it only when NUMA is on config BOOT_IOREMAP diff --git a/arch/i386/kernel/acpi/earlyquirk.c b/arch/i386/kernel/acpi/earlyquirk.c index 1ae2aee..f1b9d2a 100644 --- a/arch/i386/kernel/acpi/earlyquirk.c +++ b/arch/i386/kernel/acpi/earlyquirk.c @@ -7,7 +7,6 @@ #include <linux/pci.h> #include <asm/pci-direct.h> #include <asm/acpi.h> -#include <asm/apic.h> static int __init check_bridge(int vendor, int device) { @@ -16,15 +15,6 @@ static int __init check_bridge(int vendor, int device) if (vendor == PCI_VENDOR_ID_NVIDIA) { acpi_skip_timer_override = 1; } -#ifdef CONFIG_X86_LOCAL_APIC - /* - * ATI IXP chipsets get double timer interrupts. - * For now just do this for all ATI chipsets. - * FIXME: this needs to be checked for the non ACPI case too. - */ - if (vendor == PCI_VENDOR_ID_ATI) - disable_timer_pin_1 = 1; -#endif return 0; } diff --git a/arch/i386/kernel/reboot.c b/arch/i386/kernel/reboot.c index 1cbb9c0..350ea66 100644 --- a/arch/i386/kernel/reboot.c +++ b/arch/i386/kernel/reboot.c @@ -11,6 +11,7 @@ #include <linux/mc146818rtc.h> #include <linux/efi.h> #include <linux/dmi.h> +#include <linux/ctype.h> #include <asm/uaccess.h> #include <asm/apic.h> #include <asm/desc.h> @@ -28,8 +29,6 @@ static int reboot_thru_bios; #ifdef CONFIG_SMP static int reboot_cpu = -1; -/* shamelessly grabbed from lib/vsprintf.c for readability */ -#define is_digit(c) ((c) >= '0' && (c) <= '9') #endif static int __init reboot_setup(char *str) { @@ -49,9 +48,9 @@ static int __init reboot_setup(char *str) break; #ifdef CONFIG_SMP case 's': /* "smp" reboot by executing reset on BSP or other CPU*/ - if (is_digit(*(str+1))) { + if (isdigit(*(str+1))) { reboot_cpu = (int) (*(str+1) - '0'); - if (is_digit(*(str+2))) + if (isdigit(*(str+2))) reboot_cpu = reboot_cpu*10 + (int)(*(str+2) - '0'); } /* we will leave sorting out the final value diff --git a/arch/i386/kernel/setup.c b/arch/i386/kernel/setup.c index dc39ca6..9b8c8a1 100644 --- a/arch/i386/kernel/setup.c +++ b/arch/i386/kernel/setup.c @@ -848,9 +848,7 @@ static void __init parse_cmdline_early (char ** cmdline_p) #ifdef CONFIG_X86_IO_APIC else if (!memcmp(from, "acpi_skip_timer_override", 24)) acpi_skip_timer_override = 1; -#endif -#ifdef CONFIG_X86_LOCAL_APIC if (!memcmp(from, "disable_timer_pin_1", 19)) disable_timer_pin_1 = 1; if (!memcmp(from, "enable_timer_pin_1", 18)) @@ -859,7 +857,7 @@ static void __init parse_cmdline_early (char ** cmdline_p) /* disable IO-APIC */ else if (!memcmp(from, "noapic", 6)) disable_ioapic_setup(); -#endif /* CONFIG_X86_LOCAL_APIC */ +#endif /* CONFIG_X86_IO_APIC */ #endif /* CONFIG_ACPI */ #ifdef CONFIG_X86_LOCAL_APIC diff --git a/arch/i386/kernel/smpboot.c b/arch/i386/kernel/smpboot.c index c70cd2a..5f0a95d 100644 --- a/arch/i386/kernel/smpboot.c +++ b/arch/i386/kernel/smpboot.c @@ -202,7 +202,7 @@ static void __devinit smp_store_cpu_info(int id) goto valid_k7; /* If we get here, it's not a certified SMP capable AMD system. */ - tainted |= TAINT_UNSAFE_SMP; + add_taint(TAINT_UNSAFE_SMP); } valid_k7: diff --git a/arch/i386/kernel/traps.c b/arch/i386/kernel/traps.c index 09a58cb..431a551 100644 --- a/arch/i386/kernel/traps.c +++ b/arch/i386/kernel/traps.c @@ -807,8 +807,9 @@ void math_error(void __user *eip) cwd = get_fpu_cwd(task); swd = get_fpu_swd(task); switch (swd & ~cwd & 0x3f) { - case 0x000: - default: + case 0x000: /* No unmasked exception */ + return; + default: /* Multiple exceptions */ break; case 0x001: /* Invalid Op */ /* diff --git a/arch/i386/lib/Makefile b/arch/i386/lib/Makefile index 7b1932d..914933e 100644 --- a/arch/i386/lib/Makefile +++ b/arch/i386/lib/Makefile @@ -7,4 +7,3 @@ lib-y = checksum.o delay.o usercopy.o getuser.o putuser.o memcpy.o strstr.o \ bitops.o lib-$(CONFIG_X86_USE_3DNOW) += mmx.o -lib-$(CONFIG_HAVE_DEC_LOCK) += dec_and_lock.o diff --git a/arch/i386/lib/dec_and_lock.c b/arch/i386/lib/dec_and_lock.c deleted file mode 100644 index 8b81b25..0000000 --- a/arch/i386/lib/dec_and_lock.c +++ /dev/null @@ -1,42 +0,0 @@ -/* - * x86 version of "atomic_dec_and_lock()" using - * the atomic "cmpxchg" instruction. - * - * (For CPU's lacking cmpxchg, we use the slow - * generic version, and this one never even gets - * compiled). - */ - -#include <linux/spinlock.h> -#include <linux/module.h> -#include <asm/atomic.h> - -int _atomic_dec_and_lock(atomic_t *atomic, spinlock_t *lock) -{ - int counter; - int newcount; - -repeat: - counter = atomic_read(atomic); - newcount = counter-1; - - if (!newcount) - goto slow_path; - - asm volatile("lock; cmpxchgl %1,%2" - :"=a" (newcount) - :"r" (newcount), "m" (atomic->counter), "0" (counter)); - - /* If the above failed, "eax" will have changed */ - if (newcount != counter) - goto repeat; - return 0; - -slow_path: - spin_lock(lock); - if (atomic_dec_and_test(atomic)) - return 1; - spin_unlock(lock); - return 0; -} -EXPORT_SYMBOL(_atomic_dec_and_lock); |
