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-rw-r--r--arch/cris/arch-v10/drivers/Kconfig2
-rw-r--r--arch/cris/arch-v10/drivers/eeprom.c2
-rw-r--r--arch/cris/arch-v10/drivers/gpio.c82
-rw-r--r--arch/cris/arch-v10/drivers/i2c.c39
-rw-r--r--arch/cris/arch-v10/drivers/i2c.h3
-rw-r--r--arch/cris/arch-v10/drivers/sync_serial.c30
-rw-r--r--arch/cris/arch-v10/kernel/fasttimer.c6
-rw-r--r--arch/cris/arch-v10/kernel/head.S2
-rw-r--r--arch/cris/arch-v10/kernel/time.c54
9 files changed, 98 insertions, 122 deletions
diff --git a/arch/cris/arch-v10/drivers/Kconfig b/arch/cris/arch-v10/drivers/Kconfig
index 58f5864..0d72217 100644
--- a/arch/cris/arch-v10/drivers/Kconfig
+++ b/arch/cris/arch-v10/drivers/Kconfig
@@ -383,7 +383,7 @@ config ETRAX_RS485
depends on ETRAX_SERIAL
help
Enables support for RS-485 serial communication. For a primer on
- RS-485, see <http://www.hw.cz/english/docs/rs485/rs485.html>.
+ RS-485, see <http://en.wikipedia.org/wiki/Rs485>
config ETRAX_RS485_ON_PA
bool "RS-485 mode on PA"
diff --git a/arch/cris/arch-v10/drivers/eeprom.c b/arch/cris/arch-v10/drivers/eeprom.c
index c340550..5047a33 100644
--- a/arch/cris/arch-v10/drivers/eeprom.c
+++ b/arch/cris/arch-v10/drivers/eeprom.c
@@ -28,7 +28,6 @@
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
-#include <linux/smp_lock.h>
#include <linux/wait.h>
#include <asm/uaccess.h>
#include "i2c.h"
@@ -376,7 +375,6 @@ int __init eeprom_init(void)
/* Opens the device. */
static int eeprom_open(struct inode * inode, struct file * file)
{
- cycle_kernel_lock();
if(iminor(inode) != EEPROM_MINOR_NR)
return -ENXIO;
if(imajor(inode) != EEPROM_MAJOR_NR)
diff --git a/arch/cris/arch-v10/drivers/gpio.c b/arch/cris/arch-v10/drivers/gpio.c
index 4b0f65f..a07b6d2 100644
--- a/arch/cris/arch-v10/drivers/gpio.c
+++ b/arch/cris/arch-v10/drivers/gpio.c
@@ -16,7 +16,6 @@
#include <linux/errno.h>
#include <linux/kernel.h>
#include <linux/fs.h>
-#include <linux/smp_lock.h>
#include <linux/string.h>
#include <linux/poll.h>
#include <linux/init.h>
@@ -46,8 +45,7 @@ static char gpio_name[] = "etrax gpio";
static wait_queue_head_t *gpio_wq;
#endif
-static int gpio_ioctl(struct inode *inode, struct file *file,
- unsigned int cmd, unsigned long arg);
+static long gpio_ioctl(struct file *file, unsigned int cmd, unsigned long arg);
static ssize_t gpio_write(struct file *file, const char __user *buf,
size_t count, loff_t *off);
static int gpio_open(struct inode *inode, struct file *filp);
@@ -324,7 +322,6 @@ gpio_open(struct inode *inode, struct file *filp)
if (!priv)
return -ENOMEM;
- lock_kernel();
priv->minor = p;
/* initialize the io/alarm struct */
@@ -359,7 +356,6 @@ gpio_open(struct inode *inode, struct file *filp)
alarmlist = priv;
spin_unlock_irqrestore(&gpio_lock, flags);
- unlock_kernel();
return 0;
}
@@ -504,9 +500,7 @@ unsigned long inline setget_output(struct gpio_private *priv, unsigned long arg)
static int
gpio_leds_ioctl(unsigned int cmd, unsigned long arg);
-static int
-gpio_ioctl(struct inode *inode, struct file *file,
- unsigned int cmd, unsigned long arg)
+static long gpio_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
{
unsigned long flags;
unsigned long val;
@@ -516,54 +510,65 @@ gpio_ioctl(struct inode *inode, struct file *file,
if (_IOC_TYPE(cmd) != ETRAXGPIO_IOCTYPE)
return -EINVAL;
- spin_lock_irqsave(&gpio_lock, flags);
-
switch (_IOC_NR(cmd)) {
case IO_READBITS: /* Use IO_READ_INBITS and IO_READ_OUTBITS instead */
// read the port
+ spin_lock_irqsave(&gpio_lock, flags);
if (USE_PORTS(priv)) {
ret = *priv->port;
} else if (priv->minor == GPIO_MINOR_G) {
ret = (*R_PORT_G_DATA) & 0x7FFFFFFF;
}
+ spin_unlock_irqrestore(&gpio_lock, flags);
+
break;
case IO_SETBITS:
// set changeable bits with a 1 in arg
+ spin_lock_irqsave(&gpio_lock, flags);
+
if (USE_PORTS(priv)) {
- *priv->port = *priv->shadow |=
+ *priv->port = *priv->shadow |=
((unsigned char)arg & priv->changeable_bits);
} else if (priv->minor == GPIO_MINOR_G) {
*R_PORT_G_DATA = port_g_data_shadow |= (arg & dir_g_out_bits);
}
+ spin_unlock_irqrestore(&gpio_lock, flags);
+
break;
case IO_CLRBITS:
// clear changeable bits with a 1 in arg
+ spin_lock_irqsave(&gpio_lock, flags);
if (USE_PORTS(priv)) {
- *priv->port = *priv->shadow &=
+ *priv->port = *priv->shadow &=
~((unsigned char)arg & priv->changeable_bits);
} else if (priv->minor == GPIO_MINOR_G) {
*R_PORT_G_DATA = port_g_data_shadow &= ~((unsigned long)arg & dir_g_out_bits);
}
+ spin_unlock_irqrestore(&gpio_lock, flags);
break;
case IO_HIGHALARM:
// set alarm when bits with 1 in arg go high
+ spin_lock_irqsave(&gpio_lock, flags);
priv->highalarm |= arg;
gpio_some_alarms = 1;
+ spin_unlock_irqrestore(&gpio_lock, flags);
break;
case IO_LOWALARM:
// set alarm when bits with 1 in arg go low
+ spin_lock_irqsave(&gpio_lock, flags);
priv->lowalarm |= arg;
gpio_some_alarms = 1;
+ spin_unlock_irqrestore(&gpio_lock, flags);
break;
case IO_CLRALARM:
- // clear alarm for bits with 1 in arg
+ /* clear alarm for bits with 1 in arg */
+ spin_lock_irqsave(&gpio_lock, flags);
priv->highalarm &= ~arg;
priv->lowalarm &= ~arg;
{
/* Must update gpio_some_alarms */
struct gpio_private *p = alarmlist;
int some_alarms;
- spin_lock_irq(&gpio_lock);
p = alarmlist;
some_alarms = 0;
while (p) {
@@ -574,11 +579,12 @@ gpio_ioctl(struct inode *inode, struct file *file,
p = p->next;
}
gpio_some_alarms = some_alarms;
- spin_unlock_irq(&gpio_lock);
}
+ spin_unlock_irqrestore(&gpio_lock, flags);
break;
case IO_READDIR: /* Use IO_SETGET_INPUT/OUTPUT instead! */
/* Read direction 0=input 1=output */
+ spin_lock_irqsave(&gpio_lock, flags);
if (USE_PORTS(priv)) {
ret = *priv->dir_shadow;
} else if (priv->minor == GPIO_MINOR_G) {
@@ -587,30 +593,40 @@ gpio_ioctl(struct inode *inode, struct file *file,
*/
ret = (dir_g_shadow | dir_g_out_bits) & 0x7FFFFFFF;
}
+ spin_unlock_irqrestore(&gpio_lock, flags);
break;
case IO_SETINPUT: /* Use IO_SETGET_INPUT instead! */
- /* Set direction 0=unchanged 1=input,
- * return mask with 1=input
+ /* Set direction 0=unchanged 1=input,
+ * return mask with 1=input
*/
+ spin_lock_irqsave(&gpio_lock, flags);
ret = setget_input(priv, arg) & 0x7FFFFFFF;
+ spin_unlock_irqrestore(&gpio_lock, flags);
break;
case IO_SETOUTPUT: /* Use IO_SETGET_OUTPUT instead! */
- /* Set direction 0=unchanged 1=output,
- * return mask with 1=output
+ /* Set direction 0=unchanged 1=output,
+ * return mask with 1=output
*/
+ spin_lock_irqsave(&gpio_lock, flags);
ret = setget_output(priv, arg) & 0x7FFFFFFF;
+ spin_unlock_irqrestore(&gpio_lock, flags);
break;
case IO_SHUTDOWN:
+ spin_lock_irqsave(&gpio_lock, flags);
SOFT_SHUTDOWN();
+ spin_unlock_irqrestore(&gpio_lock, flags);
break;
case IO_GET_PWR_BT:
+ spin_lock_irqsave(&gpio_lock, flags);
#if defined (CONFIG_ETRAX_SOFT_SHUTDOWN)
ret = (*R_PORT_G_DATA & ( 1 << CONFIG_ETRAX_POWERBUTTON_BIT));
#else
ret = 0;
#endif
+ spin_unlock_irqrestore(&gpio_lock, flags);
break;
case IO_CFG_WRITE_MODE:
+ spin_lock_irqsave(&gpio_lock, flags);
priv->clk_mask = arg & 0xFF;
priv->data_mask = (arg >> 8) & 0xFF;
priv->write_msb = (arg >> 16) & 0x01;
@@ -626,28 +642,33 @@ gpio_ioctl(struct inode *inode, struct file *file,
priv->data_mask = 0;
ret = -EPERM;
}
+ spin_unlock_irqrestore(&gpio_lock, flags);
break;
- case IO_READ_INBITS:
+ case IO_READ_INBITS:
/* *arg is result of reading the input pins */
+ spin_lock_irqsave(&gpio_lock, flags);
if (USE_PORTS(priv)) {
val = *priv->port;
} else if (priv->minor == GPIO_MINOR_G) {
val = *R_PORT_G_DATA;
}
+ spin_unlock_irqrestore(&gpio_lock, flags);
if (copy_to_user((void __user *)arg, &val, sizeof(val)))
ret = -EFAULT;
break;
case IO_READ_OUTBITS:
/* *arg is result of reading the output shadow */
+ spin_lock_irqsave(&gpio_lock, flags);
if (USE_PORTS(priv)) {
val = *priv->shadow;
} else if (priv->minor == GPIO_MINOR_G) {
val = port_g_data_shadow;
}
+ spin_unlock_irqrestore(&gpio_lock, flags);
if (copy_to_user((void __user *)arg, &val, sizeof(val)))
ret = -EFAULT;
break;
- case IO_SETGET_INPUT:
+ case IO_SETGET_INPUT:
/* bits set in *arg is set to input,
* *arg updated with current input pins.
*/
@@ -656,7 +677,9 @@ gpio_ioctl(struct inode *inode, struct file *file,
ret = -EFAULT;
break;
}
+ spin_lock_irqsave(&gpio_lock, flags);
val = setget_input(priv, val);
+ spin_unlock_irqrestore(&gpio_lock, flags);
if (copy_to_user((void __user *)arg, &val, sizeof(val)))
ret = -EFAULT;
break;
@@ -668,18 +691,21 @@ gpio_ioctl(struct inode *inode, struct file *file,
ret = -EFAULT;
break;
}
+ spin_lock_irqsave(&gpio_lock, flags);
val = setget_output(priv, val);
+ spin_unlock_irqrestore(&gpio_lock, flags);
if (copy_to_user((void __user *)arg, &val, sizeof(val)))
ret = -EFAULT;
break;
default:
+ spin_lock_irqsave(&gpio_lock, flags);
if (priv->minor == GPIO_MINOR_LEDS)
ret = gpio_leds_ioctl(cmd, arg);
else
ret = -EINVAL;
+ spin_unlock_irqrestore(&gpio_lock, flags);
} /* switch */
- spin_unlock_irqrestore(&gpio_lock, flags);
return ret;
}
@@ -713,12 +739,12 @@ gpio_leds_ioctl(unsigned int cmd, unsigned long arg)
}
static const struct file_operations gpio_fops = {
- .owner = THIS_MODULE,
- .poll = gpio_poll,
- .ioctl = gpio_ioctl,
- .write = gpio_write,
- .open = gpio_open,
- .release = gpio_release,
+ .owner = THIS_MODULE,
+ .poll = gpio_poll,
+ .unlocked_ioctl = gpio_ioctl,
+ .write = gpio_write,
+ .open = gpio_open,
+ .release = gpio_release,
};
static void ioif_watcher(const unsigned int gpio_in_available,
diff --git a/arch/cris/arch-v10/drivers/i2c.c b/arch/cris/arch-v10/drivers/i2c.c
index a8737a8..77a9418 100644
--- a/arch/cris/arch-v10/drivers/i2c.c
+++ b/arch/cris/arch-v10/drivers/i2c.c
@@ -14,7 +14,6 @@
#include <linux/module.h>
#include <linux/sched.h>
-#include <linux/smp_lock.h>
#include <linux/errno.h>
#include <linux/kernel.h>
#include <linux/fs.h>
@@ -60,8 +59,8 @@ static const char i2c_name[] = "i2c";
#define SDABIT CONFIG_ETRAX_I2C_DATA_PORT
#define SCLBIT CONFIG_ETRAX_I2C_CLK_PORT
-#define i2c_enable()
-#define i2c_disable()
+#define i2c_enable()
+#define i2c_disable()
/* enable or disable output-enable, to select output or input on the i2c bus */
@@ -91,7 +90,7 @@ static const char i2c_name[] = "i2c";
#define i2c_dir_out() \
*R_PORT_PB_I2C = (port_pb_i2c_shadow &= ~IO_MASK(R_PORT_PB_I2C, i2c_oe_)); \
- REG_SHADOW_SET(R_PORT_PB_DIR, port_pb_dir_shadow, 0, 1);
+ REG_SHADOW_SET(R_PORT_PB_DIR, port_pb_dir_shadow, 0, 1);
#define i2c_dir_in() \
*R_PORT_PB_I2C = (port_pb_i2c_shadow |= IO_MASK(R_PORT_PB_I2C, i2c_oe_)); \
REG_SHADOW_SET(R_PORT_PB_DIR, port_pb_dir_shadow, 0, 0);
@@ -189,7 +188,7 @@ i2c_outbyte(unsigned char x)
} else {
i2c_data(I2C_DATA_LOW);
}
-
+
i2c_delay(CLOCK_LOW_TIME/2);
i2c_clk(I2C_CLOCK_HIGH);
i2c_delay(CLOCK_HIGH_TIME);
@@ -416,7 +415,7 @@ i2c_sendnack(void)
*#
*#--------------------------------------------------------------------------*/
int
-i2c_writereg(unsigned char theSlave, unsigned char theReg,
+i2c_writereg(unsigned char theSlave, unsigned char theReg,
unsigned char theValue)
{
int error, cntr = 3;
@@ -468,7 +467,7 @@ i2c_writereg(unsigned char theSlave, unsigned char theReg,
* enable interrupt again
*/
local_irq_restore(flags);
-
+
} while(error && cntr--);
i2c_delay(CLOCK_LOW_TIME);
@@ -504,7 +503,7 @@ i2c_readreg(unsigned char theSlave, unsigned char theReg)
* generate start condition
*/
i2c_start();
-
+
/*
* send slave address
*/
@@ -555,7 +554,7 @@ i2c_readreg(unsigned char theSlave, unsigned char theReg)
* enable interrupt again
*/
local_irq_restore(flags);
-
+
} while(error && cntr--);
spin_unlock(&i2c_lock);
@@ -566,7 +565,6 @@ i2c_readreg(unsigned char theSlave, unsigned char theReg)
static int
i2c_open(struct inode *inode, struct file *filp)
{
- cycle_kernel_lock();
return 0;
}
@@ -579,9 +577,7 @@ i2c_release(struct inode *inode, struct file *filp)
/* Main device API. ioctl's to write or read to/from i2c registers.
*/
-static int
-i2c_ioctl(struct inode *inode, struct file *file,
- unsigned int cmd, unsigned long arg)
+static long i2c_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
{
if(_IOC_TYPE(cmd) != ETRAXI2C_IOCTYPE) {
return -EINVAL;
@@ -590,7 +586,7 @@ i2c_ioctl(struct inode *inode, struct file *file,
switch (_IOC_NR(cmd)) {
case I2C_WRITEREG:
/* write to an i2c slave */
- D(printk("i2cw %d %d %d\n",
+ D(printk(KERN_DEBUG "i2cw %d %d %d\n",
I2C_ARGSLAVE(arg),
I2C_ARGREG(arg),
I2C_ARGVALUE(arg)));
@@ -602,26 +598,25 @@ i2c_ioctl(struct inode *inode, struct file *file,
{
unsigned char val;
/* read from an i2c slave */
- D(printk("i2cr %d %d ",
+ D(printk(KERN_DEBUG "i2cr %d %d ",
I2C_ARGSLAVE(arg),
I2C_ARGREG(arg)));
val = i2c_readreg(I2C_ARGSLAVE(arg), I2C_ARGREG(arg));
- D(printk("= %d\n", val));
+ D(printk(KERN_DEBUG "= %d\n", val));
return val;
- }
+ }
default:
return -EINVAL;
}
-
return 0;
}
static const struct file_operations i2c_fops = {
- .owner = THIS_MODULE,
- .ioctl = i2c_ioctl,
- .open = i2c_open,
- .release = i2c_release,
+ .owner = THIS_MODULE,
+ .unlocked_ioctl = i2c_ioctl,
+ .open = i2c_open,
+ .release = i2c_release,
};
int __init
diff --git a/arch/cris/arch-v10/drivers/i2c.h b/arch/cris/arch-v10/drivers/i2c.h
index 4ee9142..e36c9627 100644
--- a/arch/cris/arch-v10/drivers/i2c.h
+++ b/arch/cris/arch-v10/drivers/i2c.h
@@ -1,5 +1,4 @@
-/* $Id: i2c.h,v 1.3 2004/05/28 09:26:59 starvik Exp $ */
-
+/* i2c.h */
int i2c_init(void);
/* High level I2C actions */
diff --git a/arch/cris/arch-v10/drivers/sync_serial.c b/arch/cris/arch-v10/drivers/sync_serial.c
index 109dcd8..ee2dd43 100644
--- a/arch/cris/arch-v10/drivers/sync_serial.c
+++ b/arch/cris/arch-v10/drivers/sync_serial.c
@@ -157,7 +157,7 @@ static int sync_serial_open(struct inode *inode, struct file *file);
static int sync_serial_release(struct inode *inode, struct file *file);
static unsigned int sync_serial_poll(struct file *filp, poll_table *wait);
-static int sync_serial_ioctl(struct inode *inode, struct file *file,
+static int sync_serial_ioctl(struct file *file,
unsigned int cmd, unsigned long arg);
static ssize_t sync_serial_write(struct file *file, const char *buf,
size_t count, loff_t *ppos);
@@ -244,13 +244,13 @@ static unsigned sync_serial_prescale_shadow;
#define NUMBER_OF_PORTS 2
static const struct file_operations sync_serial_fops = {
- .owner = THIS_MODULE,
- .write = sync_serial_write,
- .read = sync_serial_read,
- .poll = sync_serial_poll,
- .ioctl = sync_serial_ioctl,
- .open = sync_serial_open,
- .release = sync_serial_release
+ .owner = THIS_MODULE,
+ .write = sync_serial_write,
+ .read = sync_serial_read,
+ .poll = sync_serial_poll,
+ .unlocked_ioctl = sync_serial_ioctl,
+ .open = sync_serial_open,
+ .release = sync_serial_release
};
static int __init etrax_sync_serial_init(void)
@@ -678,7 +678,7 @@ static unsigned int sync_serial_poll(struct file *file, poll_table *wait)
return mask;
}
-static int sync_serial_ioctl(struct inode *inode, struct file *file,
+static int sync_serial_ioctl_unlocked(struct file *file,
unsigned int cmd, unsigned long arg)
{
int return_val = 0;
@@ -956,6 +956,18 @@ static int sync_serial_ioctl(struct inode *inode, struct file *file,
return return_val;
}
+static long sync_serial_ioctl(struct file *file,
+ unsigned int cmd, unsigned long arg)
+{
+ long ret;
+
+ lock_kernel();
+ ret = sync_serial_ioctl_unlocked(file, cmd, arg);
+ unlock_kernel();
+
+ return ret;
+}
+
static ssize_t sync_serial_write(struct file *file, const char *buf,
size_t count, loff_t *ppos)
diff --git a/arch/cris/arch-v10/kernel/fasttimer.c b/arch/cris/arch-v10/kernel/fasttimer.c
index 5ff08a8..8a8196e 100644
--- a/arch/cris/arch-v10/kernel/fasttimer.c
+++ b/arch/cris/arch-v10/kernel/fasttimer.c
@@ -467,11 +467,7 @@ timer1_handler(int irq, void *dev_id)
static void wake_up_func(unsigned long data)
{
-#ifdef DECLARE_WAITQUEUE
- wait_queue_head_t *sleep_wait_p = (wait_queue_head_t*)data;
-#else
- struct wait_queue **sleep_wait_p = (struct wait_queue **)data;
-#endif
+ wait_queue_head_t *sleep_wait_p = (wait_queue_head_t *)data;
wake_up(sleep_wait_p);
}
diff --git a/arch/cris/arch-v10/kernel/head.S b/arch/cris/arch-v10/kernel/head.S
index fc45771..a1f2014 100644
--- a/arch/cris/arch-v10/kernel/head.S
+++ b/arch/cris/arch-v10/kernel/head.S
@@ -280,7 +280,7 @@ _no_romfs_in_flash:
;; the "rom fs" we'll possibly use in 2.4 if not JFFS (which does
;; not need this mechanism anyway)
- move.d __vmlinux_end, $r0; the image will be after the vmlinux end address
+ move.d __init_end, $r0; the image will be after the end of init
move.d [$r0], $r1 ; cramfs assumes same endian on host/target
cmp.d CRAMFS_MAGIC, $r1; magic value in cramfs superblock
bne 2f
diff --git a/arch/cris/arch-v10/kernel/time.c b/arch/cris/arch-v10/kernel/time.c
index 30adae5..00eb36f 100644
--- a/arch/cris/arch-v10/kernel/time.c
+++ b/arch/cris/arch-v10/kernel/time.c
@@ -61,66 +61,16 @@ unsigned long get_ns_in_jiffie(void)
unsigned long do_slow_gettimeoffset(void)
{
- unsigned long count, t1;
- unsigned long usec_count = 0;
- unsigned short presc_count;
-
- static unsigned long count_p = TIMER0_DIV;/* for the first call after boot */
- static unsigned long jiffies_p = 0;
-
- /*
- * cache volatile jiffies temporarily; we have IRQs turned off.
- */
- unsigned long jiffies_t;
+ unsigned long count;
/* The timer interrupt comes from Etrax timer 0. In order to get
* better precision, we check the current value. It might have
* underflowed already though.
*/
-
-#ifndef CONFIG_SVINTO_SIM
- /* Not available in the xsim simulator. */
count = *R_TIMER0_DATA;
- presc_count = *R_TIM_PRESC_STATUS;
- /* presc_count might be wrapped */
- t1 = *R_TIMER0_DATA;
- if (count != t1){
- /* it wrapped, read prescaler again... */
- presc_count = *R_TIM_PRESC_STATUS;
- count = t1;
- }
-#else
- count = 0;
- presc_count = 0;
-#endif
-
- jiffies_t = jiffies;
- /*
- * avoiding timer inconsistencies (they are rare, but they happen)...
- * there are one problem that must be avoided here:
- * 1. the timer counter underflows
- */
- if( jiffies_t == jiffies_p ) {
- if( count > count_p ) {
- /* Timer wrapped, use new count and prescale
- * increase the time corresponding to one jiffie
- */
- usec_count = 1000000/HZ;
- }
- } else
- jiffies_p = jiffies_t;
- count_p = count;
- if (presc_count >= PRESCALE_VALUE/2 ){
- presc_count = PRESCALE_VALUE - presc_count + PRESCALE_VALUE/2;
- } else {
- presc_count = PRESCALE_VALUE - presc_count - PRESCALE_VALUE/2;
- }
/* Convert timer value to usec */
- usec_count += ( (TIMER0_DIV - count) * (1000000/HZ)/TIMER0_DIV ) +
- (( (presc_count) * (1000000000/PRESCALE_FREQ))/1000);
-
- return usec_count;
+ return (TIMER0_DIV - count) * ((NSEC_PER_SEC/1000)/HZ)/TIMER0_DIV;
}
/* Excerpt from the Etrax100 HSDD about the built-in watchdog:
OpenPOWER on IntegriCloud