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-rw-r--r--arch/blackfin/mach-bf561/secondary.S28
1 files changed, 8 insertions, 20 deletions
diff --git a/arch/blackfin/mach-bf561/secondary.S b/arch/blackfin/mach-bf561/secondary.S
index 35280f0..f72a6af 100644
--- a/arch/blackfin/mach-bf561/secondary.S
+++ b/arch/blackfin/mach-bf561/secondary.S
@@ -85,16 +85,10 @@ ENTRY(_coreb_trampoline_start)
R0 = ~ENICPLB;
R0 = R0 & R1;
- /* Anomaly 05000125 */
-#ifdef ANOMALY_05000125
- CLI R2;
- SSYNC;
-#endif
+ /* Disabling of CPLBs should be proceeded by a CSYNC */
+ CSYNC;
[p0] = R0;
SSYNC;
-#ifdef ANOMALY_05000125
- STI R2;
-#endif
/* Turn off the dcache */
p0.l = LO(DMEM_CONTROL);
@@ -103,16 +97,10 @@ ENTRY(_coreb_trampoline_start)
R0 = ~ENDCPLB;
R0 = R0 & R1;
- /* Anomaly 05000125 */
-#ifdef ANOMALY_05000125
- CLI R2;
- SSYNC;
-#endif
+ /* Disabling of CPLBs should be proceeded by a CSYNC */
+ CSYNC;
[p0] = R0;
SSYNC;
-#ifdef ANOMALY_05000125
- STI R2;
-#endif
/* in case of double faults, save a few things */
p0.l = _init_retx_coreb;
@@ -126,22 +114,22 @@ ENTRY(_coreb_trampoline_start)
* below
*/
GET_PDA(p0, r0);
- r7 = [p0 + PDA_RETX];
+ r7 = [p0 + PDA_DF_RETX];
p1.l = _init_saved_retx_coreb;
p1.h = _init_saved_retx_coreb;
[p1] = r7;
- r7 = [p0 + PDA_DCPLB];
+ r7 = [p0 + PDA_DF_DCPLB];
p1.l = _init_saved_dcplb_fault_addr_coreb;
p1.h = _init_saved_dcplb_fault_addr_coreb;
[p1] = r7;
- r7 = [p0 + PDA_ICPLB];
+ r7 = [p0 + PDA_DF_ICPLB];
p1.l = _init_saved_icplb_fault_addr_coreb;
p1.h = _init_saved_icplb_fault_addr_coreb;
[p1] = r7;
- r7 = [p0 + PDA_SEQSTAT];
+ r7 = [p0 + PDA_DF_SEQSTAT];
p1.l = _init_saved_seqstat_coreb;
p1.h = _init_saved_seqstat_coreb;
[p1] = r7;
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