diff options
Diffstat (limited to 'arch/arm')
111 files changed, 2058 insertions, 582 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index c0d6bda..db524e7 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1,10 +1,3 @@ -# -# For a description of the syntax of this configuration file, -# see Documentation/kbuild/kconfig-language.txt. -# - -mainmenu "Linux Kernel Configuration" - config ARM bool default y @@ -13,7 +6,7 @@ config ARM select HAVE_MEMBLOCK select RTC_LIB select SYS_SUPPORTS_APM_EMULATION - select GENERIC_ATOMIC64 if (!CPU_32v6K) + select GENERIC_ATOMIC64 if (!CPU_32v6K || !AEABI) select HAVE_OPROFILE if (HAVE_PERF_EVENTS) select HAVE_ARCH_KGDB select HAVE_KPROBES if (!XIP_KERNEL) @@ -653,7 +646,7 @@ config ARCH_S3C2410 select ARCH_HAS_CPUFREQ select HAVE_CLK select ARCH_USES_GETTIMEOFFSET - select HAVE_S3C2410_I2C + select HAVE_S3C2410_I2C if I2C help Samsung S3C2410X CPU based systems, such as the Simtec Electronics BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or @@ -683,8 +676,8 @@ config ARCH_S3C64XX select S3C_DEV_NAND select USB_ARCH_HAS_OHCI select SAMSUNG_GPIOLIB_4BIT - select HAVE_S3C2410_I2C - select HAVE_S3C2410_WATCHDOG + select HAVE_S3C2410_I2C if I2C + select HAVE_S3C2410_WATCHDOG if WATCHDOG help Samsung S3C64XX series based systems @@ -693,10 +686,10 @@ config ARCH_S5P64X0 select CPU_V6 select GENERIC_GPIO select HAVE_CLK - select HAVE_S3C2410_WATCHDOG + select HAVE_S3C2410_WATCHDOG if WATCHDOG select ARCH_USES_GETTIMEOFFSET - select HAVE_S3C2410_I2C - select HAVE_S3C_RTC + select HAVE_S3C2410_I2C if I2C + select HAVE_S3C_RTC if RTC_CLASS help Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440, SMDK6450. @@ -707,7 +700,7 @@ config ARCH_S5P6442 select GENERIC_GPIO select HAVE_CLK select ARCH_USES_GETTIMEOFFSET - select HAVE_S3C2410_WATCHDOG + select HAVE_S3C2410_WATCHDOG if WATCHDOG help Samsung S5P6442 CPU based systems @@ -718,9 +711,9 @@ config ARCH_S5PC100 select CPU_V7 select ARM_L1_CACHE_SHIFT_6 select ARCH_USES_GETTIMEOFFSET - select HAVE_S3C2410_I2C - select HAVE_S3C_RTC - select HAVE_S3C2410_WATCHDOG + select HAVE_S3C2410_I2C if I2C + select HAVE_S3C_RTC if RTC_CLASS + select HAVE_S3C2410_WATCHDOG if WATCHDOG help Samsung S5PC100 series based systems @@ -733,9 +726,9 @@ config ARCH_S5PV210 select ARM_L1_CACHE_SHIFT_6 select ARCH_HAS_CPUFREQ select ARCH_USES_GETTIMEOFFSET - select HAVE_S3C2410_I2C - select HAVE_S3C_RTC - select HAVE_S3C2410_WATCHDOG + select HAVE_S3C2410_I2C if I2C + select HAVE_S3C_RTC if RTC_CLASS + select HAVE_S3C2410_WATCHDOG if WATCHDOG help Samsung S5PV210/S5PC110 series based systems @@ -746,9 +739,9 @@ config ARCH_S5PV310 select GENERIC_GPIO select HAVE_CLK select GENERIC_CLOCKEVENTS - select HAVE_S3C_RTC - select HAVE_S3C2410_I2C - select HAVE_S3C2410_WATCHDOG + select HAVE_S3C_RTC if RTC_CLASS + select HAVE_S3C2410_I2C if I2C + select HAVE_S3C2410_WATCHDOG if WATCHDOG help Samsung S5PV310 series based systems diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c index ada6359..772f95f 100644 --- a/arch/arm/common/gic.c +++ b/arch/arm/common/gic.c @@ -251,15 +251,16 @@ void __init gic_dist_init(unsigned int gic_nr, void __iomem *base, writel(cpumask, base + GIC_DIST_TARGET + i * 4 / 4); /* - * Set priority on all interrupts. + * Set priority on all global interrupts. */ - for (i = 0; i < max_irq; i += 4) + for (i = 32; i < max_irq; i += 4) writel(0xa0a0a0a0, base + GIC_DIST_PRI + i * 4 / 4); /* - * Disable all interrupts. + * Disable all interrupts. Leave the PPI and SGIs alone + * as these enables are banked registers. */ - for (i = 0; i < max_irq; i += 32) + for (i = 32; i < max_irq; i += 32) writel(0xffffffff, base + GIC_DIST_ENABLE_CLEAR + i * 4 / 32); /* @@ -277,11 +278,30 @@ void __init gic_dist_init(unsigned int gic_nr, void __iomem *base, void __cpuinit gic_cpu_init(unsigned int gic_nr, void __iomem *base) { + void __iomem *dist_base; + int i; + if (gic_nr >= MAX_GIC_NR) BUG(); + dist_base = gic_data[gic_nr].dist_base; + BUG_ON(!dist_base); + gic_data[gic_nr].cpu_base = base; + /* + * Deal with the banked PPI and SGI interrupts - disable all + * PPI interrupts, ensure all SGI interrupts are enabled. + */ + writel(0xffff0000, dist_base + GIC_DIST_ENABLE_CLEAR); + writel(0x0000ffff, dist_base + GIC_DIST_ENABLE_SET); + + /* + * Set priority on PPI and SGI interrupts + */ + for (i = 0; i < 32; i += 4) + writel(0xa0a0a0a0, dist_base + GIC_DIST_PRI + i * 4 / 4); + writel(0xf0, base + GIC_CPU_PRIMASK); writel(1, base + GIC_CPU_CTRL); } diff --git a/arch/arm/include/asm/hardware/it8152.h b/arch/arm/include/asm/hardware/it8152.h index 6700c7f..21fa272 100644 --- a/arch/arm/include/asm/hardware/it8152.h +++ b/arch/arm/include/asm/hardware/it8152.h @@ -75,7 +75,7 @@ extern unsigned long it8152_base_address; IT8152_PD_IRQ(1) USB (USBR) IT8152_PD_IRQ(0) Audio controller (ACR) */ -#define IT8152_IRQ(x) (IRQ_BOARD_END + (x)) +#define IT8152_IRQ(x) (IRQ_BOARD_START + (x)) /* IRQ-sources in 3 groups - local devices, LPC (serial), and external PCI */ #define IT8152_LD_IRQ_COUNT 9 diff --git a/arch/arm/include/asm/kgdb.h b/arch/arm/include/asm/kgdb.h index 0826599..48066ce 100644 --- a/arch/arm/include/asm/kgdb.h +++ b/arch/arm/include/asm/kgdb.h @@ -70,7 +70,8 @@ extern int kgdb_fault_expected; #define _GP_REGS 16 #define _FP_REGS 8 #define _EXTRA_REGS 2 -#define DBG_MAX_REG_NUM (_GP_REGS + (_FP_REGS * 3) + _EXTRA_REGS) +#define GDB_MAX_REGS (_GP_REGS + (_FP_REGS * 3) + _EXTRA_REGS) +#define DBG_MAX_REG_NUM (_GP_REGS + _FP_REGS + _EXTRA_REGS) #define KGDB_MAX_NO_CPUS 1 #define BUFMAX 400 @@ -93,7 +94,7 @@ extern int kgdb_fault_expected; #define _SPT 13 #define _LR 14 #define _PC 15 -#define _CPSR (DBG_MAX_REG_NUM - 1) +#define _CPSR (GDB_MAX_REGS - 1) /* * So that we can denote the end of a frame for tracing, diff --git a/arch/arm/include/asm/memblock.h b/arch/arm/include/asm/memblock.h index fdbc43b..b8da2e4 100644 --- a/arch/arm/include/asm/memblock.h +++ b/arch/arm/include/asm/memblock.h @@ -1,13 +1,6 @@ #ifndef _ASM_ARM_MEMBLOCK_H #define _ASM_ARM_MEMBLOCK_H -#ifdef CONFIG_MMU -extern phys_addr_t lowmem_end_addr; -#define MEMBLOCK_REAL_LIMIT lowmem_end_addr -#else -#define MEMBLOCK_REAL_LIMIT 0 -#endif - struct meminfo; struct machine_desc; diff --git a/arch/arm/kernel/hw_breakpoint.c b/arch/arm/kernel/hw_breakpoint.c index 54593b0..21e3a4a 100644 --- a/arch/arm/kernel/hw_breakpoint.c +++ b/arch/arm/kernel/hw_breakpoint.c @@ -748,8 +748,7 @@ static int hw_breakpoint_pending(unsigned long addr, unsigned int fsr, breakpoint_handler(addr, regs); break; case ARM_ENTRY_ASYNC_WATCHPOINT: - WARN_ON("Asynchronous watchpoint exception taken. " - "Debugging results may be unreliable"); + WARN(1, "Asynchronous watchpoint exception taken. Debugging results may be unreliable\n"); case ARM_ENTRY_SYNC_WATCHPOINT: watchpoint_handler(addr, regs); break; diff --git a/arch/arm/kernel/kgdb.c b/arch/arm/kernel/kgdb.c index d6e8b4d..778c2f7 100644 --- a/arch/arm/kernel/kgdb.c +++ b/arch/arm/kernel/kgdb.c @@ -79,7 +79,7 @@ sleeping_thread_to_gdb_regs(unsigned long *gdb_regs, struct task_struct *task) return; /* Initialize to zero */ - for (regno = 0; regno < DBG_MAX_REG_NUM; regno++) + for (regno = 0; regno < GDB_MAX_REGS; regno++) gdb_regs[regno] = 0; /* Otherwise, we have only some registers from switch_to() */ diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c index 49643b1..07a5035 100644 --- a/arch/arm/kernel/perf_event.c +++ b/arch/arm/kernel/perf_event.c @@ -1749,7 +1749,7 @@ static inline int armv7_pmnc_has_overflowed(unsigned long pmnc) static inline int armv7_pmnc_counter_has_overflowed(unsigned long pmnc, enum armv7_counters counter) { - int ret; + int ret = 0; if (counter == ARMV7_CYCLE_COUNTER) ret = pmnc & ARMV7_FLAG_C; diff --git a/arch/arm/kernel/ptrace.c b/arch/arm/kernel/ptrace.c index e0cb637..3e97483 100644 --- a/arch/arm/kernel/ptrace.c +++ b/arch/arm/kernel/ptrace.c @@ -1075,13 +1075,15 @@ out: } #endif -long arch_ptrace(struct task_struct *child, long request, long addr, long data) +long arch_ptrace(struct task_struct *child, long request, + unsigned long addr, unsigned long data) { int ret; + unsigned long __user *datap = (unsigned long __user *) data; switch (request) { case PTRACE_PEEKUSR: - ret = ptrace_read_user(child, addr, (unsigned long __user *)data); + ret = ptrace_read_user(child, addr, datap); break; case PTRACE_POKEUSR: @@ -1089,34 +1091,34 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data) break; case PTRACE_GETREGS: - ret = ptrace_getregs(child, (void __user *)data); + ret = ptrace_getregs(child, datap); break; case PTRACE_SETREGS: - ret = ptrace_setregs(child, (void __user *)data); + ret = ptrace_setregs(child, datap); break; case PTRACE_GETFPREGS: - ret = ptrace_getfpregs(child, (void __user *)data); + ret = ptrace_getfpregs(child, datap); break; case PTRACE_SETFPREGS: - ret = ptrace_setfpregs(child, (void __user *)data); + ret = ptrace_setfpregs(child, datap); break; #ifdef CONFIG_IWMMXT case PTRACE_GETWMMXREGS: - ret = ptrace_getwmmxregs(child, (void __user *)data); + ret = ptrace_getwmmxregs(child, datap); break; case PTRACE_SETWMMXREGS: - ret = ptrace_setwmmxregs(child, (void __user *)data); + ret = ptrace_setwmmxregs(child, datap); break; #endif case PTRACE_GET_THREAD_AREA: ret = put_user(task_thread_info(child)->tp_value, - (unsigned long __user *) data); + datap); break; case PTRACE_SET_SYSCALL: @@ -1126,21 +1128,21 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data) #ifdef CONFIG_CRUNCH case PTRACE_GETCRUNCHREGS: - ret = ptrace_getcrunchregs(child, (void __user *)data); + ret = ptrace_getcrunchregs(child, datap); break; case PTRACE_SETCRUNCHREGS: - ret = ptrace_setcrunchregs(child, (void __user *)data); + ret = ptrace_setcrunchregs(child, datap); break; #endif #ifdef CONFIG_VFP case PTRACE_GETVFPREGS: - ret = ptrace_getvfpregs(child, (void __user *)data); + ret = ptrace_getvfpregs(child, datap); break; case PTRACE_SETVFPREGS: - ret = ptrace_setvfpregs(child, (void __user *)data); + ret = ptrace_setvfpregs(child, datap); break; #endif diff --git a/arch/arm/kernel/stacktrace.c b/arch/arm/kernel/stacktrace.c index 20b7411..c2e112e 100644 --- a/arch/arm/kernel/stacktrace.c +++ b/arch/arm/kernel/stacktrace.c @@ -28,7 +28,7 @@ int notrace unwind_frame(struct stackframe *frame) /* only go to a higher address on the stack */ low = frame->sp; - high = ALIGN(low, THREAD_SIZE) + THREAD_SIZE; + high = ALIGN(low, THREAD_SIZE); /* check current frame pointer is within bounds */ if (fp < (low + 12) || fp + 4 >= high) diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c index cda78d5..446aee9 100644 --- a/arch/arm/kernel/traps.c +++ b/arch/arm/kernel/traps.c @@ -53,10 +53,7 @@ static void dump_mem(const char *, const char *, unsigned long, unsigned long); void dump_backtrace_entry(unsigned long where, unsigned long from, unsigned long frame) { #ifdef CONFIG_KALLSYMS - char sym1[KSYM_SYMBOL_LEN], sym2[KSYM_SYMBOL_LEN]; - sprint_symbol(sym1, where); - sprint_symbol(sym2, from); - printk("[<%08lx>] (%s) from [<%08lx>] (%s)\n", where, sym1, from, sym2); + printk("[<%08lx>] (%pS) from [<%08lx>] (%pS)\n", where, (void *)where, from, (void *)from); #else printk("Function entered at [<%08lx>] from [<%08lx>]\n", where, from); #endif diff --git a/arch/arm/kernel/unwind.c b/arch/arm/kernel/unwind.c index 2a16176..d2cb0b3 100644 --- a/arch/arm/kernel/unwind.c +++ b/arch/arm/kernel/unwind.c @@ -279,7 +279,7 @@ int unwind_frame(struct stackframe *frame) /* only go to a higher address on the stack */ low = frame->sp; - high = ALIGN(low, THREAD_SIZE) + THREAD_SIZE; + high = ALIGN(low, THREAD_SIZE); pr_debug("%s(pc = %08lx lr = %08lx sp = %08lx)\n", __func__, frame->pc, frame->lr, frame->sp); diff --git a/arch/arm/kernel/vmlinux.lds.S b/arch/arm/kernel/vmlinux.lds.S index 1953e3d..cead889 100644 --- a/arch/arm/kernel/vmlinux.lds.S +++ b/arch/arm/kernel/vmlinux.lds.S @@ -113,6 +113,7 @@ SECTIONS *(.rodata.*) *(.glue_7) *(.glue_7t) + . = ALIGN(4); *(.got) /* Global offset table */ ARM_CPU_KEEP(PROC_INFO) } diff --git a/arch/arm/mach-ep93xx/include/mach/dma.h b/arch/arm/mach-ep93xx/include/mach/dma.h index 3a5961d..5e31b2b 100644 --- a/arch/arm/mach-ep93xx/include/mach/dma.h +++ b/arch/arm/mach-ep93xx/include/mach/dma.h @@ -1,5 +1,13 @@ -/* - * arch/arm/mach-ep93xx/include/mach/dma.h +/** + * DOC: EP93xx DMA M2P memory to peripheral and peripheral to memory engine + * + * The EP93xx DMA M2P subsystem handles DMA transfers between memory and + * peripherals. DMA M2P channels are available for audio, UARTs and IrDA. + * See chapter 10 of the EP93xx users guide for full details on the DMA M2P + * engine. + * + * See sound/soc/ep93xx/ep93xx-pcm.c for an example use of the DMA M2P code. + * */ #ifndef __ASM_ARCH_DMA_H @@ -8,12 +16,34 @@ #include <linux/list.h> #include <linux/types.h> +/** + * struct ep93xx_dma_buffer - Information about a buffer to be transferred + * using the DMA M2P engine + * + * @list: Entry in DMA buffer list + * @bus_addr: Physical address of the buffer + * @size: Size of the buffer in bytes + */ struct ep93xx_dma_buffer { struct list_head list; u32 bus_addr; u16 size; }; +/** + * struct ep93xx_dma_m2p_client - Information about a DMA M2P client + * + * @name: Unique name for this client + * @flags: Client flags + * @cookie: User data to pass to callback functions + * @buffer_started: Non NULL function to call when a transfer is started. + * The arguments are the user data cookie and the DMA + * buffer which is starting. + * @buffer_finished: Non NULL function to call when a transfer is completed. + * The arguments are the user data cookie, the DMA buffer + * which has completed, and a boolean flag indicating if + * the transfer had an error. + */ struct ep93xx_dma_m2p_client { char *name; u8 flags; @@ -24,10 +54,11 @@ struct ep93xx_dma_m2p_client { struct ep93xx_dma_buffer *buf, int bytes, int error); - /* Internal to the DMA code. */ + /* private: Internal use only */ void *channel; }; +/* DMA M2P ports */ #define EP93XX_DMA_M2P_PORT_I2S1 0x00 #define EP93XX_DMA_M2P_PORT_I2S2 0x01 #define EP93XX_DMA_M2P_PORT_AAC1 0x02 @@ -39,18 +70,80 @@ struct ep93xx_dma_m2p_client { #define EP93XX_DMA_M2P_PORT_UART3 0x08 #define EP93XX_DMA_M2P_PORT_IRDA 0x09 #define EP93XX_DMA_M2P_PORT_MASK 0x0f -#define EP93XX_DMA_M2P_TX 0x00 -#define EP93XX_DMA_M2P_RX 0x10 -#define EP93XX_DMA_M2P_ABORT_ON_ERROR 0x20 -#define EP93XX_DMA_M2P_IGNORE_ERROR 0x40 -#define EP93XX_DMA_M2P_ERROR_MASK 0x60 -int ep93xx_dma_m2p_client_register(struct ep93xx_dma_m2p_client *m2p); +/* DMA M2P client flags */ +#define EP93XX_DMA_M2P_TX 0x00 /* Memory to peripheral */ +#define EP93XX_DMA_M2P_RX 0x10 /* Peripheral to memory */ + +/* + * DMA M2P client error handling flags. See the EP93xx users guide + * documentation on the DMA M2P CONTROL register for more details + */ +#define EP93XX_DMA_M2P_ABORT_ON_ERROR 0x20 /* Abort on peripheral error */ +#define EP93XX_DMA_M2P_IGNORE_ERROR 0x40 /* Ignore peripheral errors */ +#define EP93XX_DMA_M2P_ERROR_MASK 0x60 /* Mask of error bits */ + +/** + * ep93xx_dma_m2p_client_register - Register a client with the DMA M2P + * subsystem + * + * @m2p: Client information to register + * returns 0 on success + * + * The DMA M2P subsystem allocates a channel and an interrupt line for the DMA + * client + */ +int ep93xx_dma_m2p_client_register(struct ep93xx_dma_m2p_client *m2p); + +/** + * ep93xx_dma_m2p_client_unregister - Unregister a client from the DMA M2P + * subsystem + * + * @m2p: Client to unregister + * + * Any transfers currently in progress will be completed in hardware, but + * ignored in software. + */ void ep93xx_dma_m2p_client_unregister(struct ep93xx_dma_m2p_client *m2p); + +/** + * ep93xx_dma_m2p_submit - Submit a DMA M2P transfer + * + * @m2p: DMA Client to submit the transfer on + * @buf: DMA Buffer to submit + * + * If the current or next transfer positions are free on the M2P client then + * the transfer is started immediately. If not, the transfer is added to the + * list of pending transfers. This function must not be called from the + * buffer_finished callback for an M2P channel. + * + */ void ep93xx_dma_m2p_submit(struct ep93xx_dma_m2p_client *m2p, struct ep93xx_dma_buffer *buf); + +/** + * ep93xx_dma_m2p_submit_recursive - Put a DMA transfer on the pending list + * for an M2P channel + * + * @m2p: DMA Client to submit the transfer on + * @buf: DMA Buffer to submit + * + * This function must only be called from the buffer_finished callback for an + * M2P channel. It is commonly used to add the next transfer in a chained list + * of DMA transfers. + */ void ep93xx_dma_m2p_submit_recursive(struct ep93xx_dma_m2p_client *m2p, struct ep93xx_dma_buffer *buf); + +/** + * ep93xx_dma_m2p_flush - Flush all pending transfers on a DMA M2P client + * + * @m2p: DMA client to flush transfers on + * + * Any transfers currently in progress will be completed in hardware, but + * ignored in software. + * + */ void ep93xx_dma_m2p_flush(struct ep93xx_dma_m2p_client *m2p); #endif /* __ASM_ARCH_DMA_H */ diff --git a/arch/arm/mach-imx/include/mach/dma-v1.h b/arch/arm/mach-imx/include/mach/dma-v1.h index 287431c..ac6fd71 100644 --- a/arch/arm/mach-imx/include/mach/dma-v1.h +++ b/arch/arm/mach-imx/include/mach/dma-v1.h @@ -27,6 +27,8 @@ #define imx_has_dma_v1() (cpu_is_mx1() || cpu_is_mx21() || cpu_is_mx27()) +#include <mach/dma.h> + #define IMX_DMA_CHANNELS 16 #define DMA_MODE_READ 0 @@ -96,12 +98,6 @@ int imx_dma_request(int channel, const char *name); void imx_dma_free(int channel); -enum imx_dma_prio { - DMA_PRIO_HIGH = 0, - DMA_PRIO_MEDIUM = 1, - DMA_PRIO_LOW = 2 -}; - int imx_dma_request_by_prio(const char *name, enum imx_dma_prio prio); #endif /* __MACH_DMA_V1_H__ */ diff --git a/arch/arm/mach-ixp2000/core.c b/arch/arm/mach-ixp2000/core.c index babb225..e24e3d0 100644 --- a/arch/arm/mach-ixp2000/core.c +++ b/arch/arm/mach-ixp2000/core.c @@ -197,7 +197,7 @@ unsigned long ixp2000_gettimeoffset (void) return offset / ticks_per_usec; } -static int ixp2000_timer_interrupt(int irq, void *dev_id) +static irqreturn_t ixp2000_timer_interrupt(int irq, void *dev_id) { /* clear timer 1 */ ixp2000_reg_wrb(IXP2000_T1_CLR, 1); diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c index 51ff23b..3688123 100644 --- a/arch/arm/mach-kirkwood/common.c +++ b/arch/arm/mach-kirkwood/common.c @@ -854,10 +854,9 @@ int __init kirkwood_find_tclk(void) kirkwood_pcie_id(&dev, &rev); - if ((dev == MV88F6281_DEV_ID && (rev == MV88F6281_REV_A0 || - rev == MV88F6281_REV_A1)) || - (dev == MV88F6282_DEV_ID)) - return 200000000; + if (dev == MV88F6281_DEV_ID || dev == MV88F6282_DEV_ID) + if (((readl(SAMPLE_AT_RESET) >> 21) & 1) == 0) + return 200000000; return 166666667; } diff --git a/arch/arm/mach-kirkwood/d2net_v2-setup.c b/arch/arm/mach-kirkwood/d2net_v2-setup.c index 4aa86e4..a31c949 100644 --- a/arch/arm/mach-kirkwood/d2net_v2-setup.c +++ b/arch/arm/mach-kirkwood/d2net_v2-setup.c @@ -225,5 +225,5 @@ MACHINE_START(D2NET_V2, "LaCie d2 Network v2") .init_machine = d2net_v2_init, .map_io = kirkwood_map_io, .init_irq = kirkwood_init_irq, - .timer = &lacie_v2_timer, + .timer = &kirkwood_timer, MACHINE_END diff --git a/arch/arm/mach-kirkwood/lacie_v2-common.c b/arch/arm/mach-kirkwood/lacie_v2-common.c index d3ea1b6..285edab 100644 --- a/arch/arm/mach-kirkwood/lacie_v2-common.c +++ b/arch/arm/mach-kirkwood/lacie_v2-common.c @@ -111,17 +111,3 @@ void __init lacie_v2_hdd_power_init(int hdd_num) pr_err("Failed to power up HDD%d\n", i + 1); } } - -/***************************************************************************** - * Timer - ****************************************************************************/ - -static void lacie_v2_timer_init(void) -{ - kirkwood_tclk = 166666667; - orion_time_init(IRQ_KIRKWOOD_BRIDGE, kirkwood_tclk); -} - -struct sys_timer lacie_v2_timer = { - .init = lacie_v2_timer_init, -}; diff --git a/arch/arm/mach-kirkwood/lacie_v2-common.h b/arch/arm/mach-kirkwood/lacie_v2-common.h index af52131..fc64f57 100644 --- a/arch/arm/mach-kirkwood/lacie_v2-common.h +++ b/arch/arm/mach-kirkwood/lacie_v2-common.h @@ -13,6 +13,4 @@ void lacie_v2_register_flash(void); void lacie_v2_register_i2c_devices(void); void lacie_v2_hdd_power_init(int hdd_num); -extern struct sys_timer lacie_v2_timer; - #endif diff --git a/arch/arm/mach-kirkwood/mpp.c b/arch/arm/mach-kirkwood/mpp.c index 065187d..27901f7 100644 --- a/arch/arm/mach-kirkwood/mpp.c +++ b/arch/arm/mach-kirkwood/mpp.c @@ -59,7 +59,7 @@ void __init kirkwood_mpp_conf(unsigned int *mpp_list) } printk("\n"); - while (*mpp_list) { + for ( ; *mpp_list; mpp_list++) { unsigned int num = MPP_NUM(*mpp_list); unsigned int sel = MPP_SEL(*mpp_list); int shift, gpio_mode; @@ -88,8 +88,6 @@ void __init kirkwood_mpp_conf(unsigned int *mpp_list) if (sel != 0) gpio_mode = 0; orion_gpio_set_valid(num, gpio_mode); - - mpp_list++; } printk(KERN_DEBUG " final MPP regs:"); diff --git a/arch/arm/mach-kirkwood/netspace_v2-setup.c b/arch/arm/mach-kirkwood/netspace_v2-setup.c index 5ea66f1..65ee21f 100644 --- a/arch/arm/mach-kirkwood/netspace_v2-setup.c +++ b/arch/arm/mach-kirkwood/netspace_v2-setup.c @@ -262,7 +262,7 @@ MACHINE_START(NETSPACE_V2, "LaCie Network Space v2") .init_machine = netspace_v2_init, .map_io = kirkwood_map_io, .init_irq = kirkwood_init_irq, - .timer = &lacie_v2_timer, + .timer = &kirkwood_timer, MACHINE_END #endif @@ -272,7 +272,7 @@ MACHINE_START(INETSPACE_V2, "LaCie Internet Space v2") .init_machine = netspace_v2_init, .map_io = kirkwood_map_io, .init_irq = kirkwood_init_irq, - .timer = &lacie_v2_timer, + .timer = &kirkwood_timer, MACHINE_END #endif @@ -282,6 +282,6 @@ MACHINE_START(NETSPACE_MAX_V2, "LaCie Network Space Max v2") .init_machine = netspace_v2_init, .map_io = kirkwood_map_io, .init_irq = kirkwood_init_irq, - .timer = &lacie_v2_timer, + .timer = &kirkwood_timer, MACHINE_END #endif diff --git a/arch/arm/mach-kirkwood/netxbig_v2-setup.c b/arch/arm/mach-kirkwood/netxbig_v2-setup.c index a1b45d5..93afd3c 100644 --- a/arch/arm/mach-kirkwood/netxbig_v2-setup.c +++ b/arch/arm/mach-kirkwood/netxbig_v2-setup.c @@ -403,7 +403,7 @@ MACHINE_START(NET2BIG_V2, "LaCie 2Big Network v2") .init_machine = netxbig_v2_init, .map_io = kirkwood_map_io, .init_irq = kirkwood_init_irq, - .timer = &lacie_v2_timer, + .timer = &kirkwood_timer, MACHINE_END #endif @@ -413,6 +413,6 @@ MACHINE_START(NET5BIG_V2, "LaCie 5Big Network v2") .init_machine = netxbig_v2_init, .map_io = kirkwood_map_io, .init_irq = kirkwood_init_irq, - .timer = &lacie_v2_timer, + .timer = &kirkwood_timer, MACHINE_END #endif diff --git a/arch/arm/mach-kirkwood/ts41x-setup.c b/arch/arm/mach-kirkwood/ts41x-setup.c index 8be09a0..3587a28 100644 --- a/arch/arm/mach-kirkwood/ts41x-setup.c +++ b/arch/arm/mach-kirkwood/ts41x-setup.c @@ -27,6 +27,10 @@ #include "mpp.h" #include "tsx1x-common.h" +/* for the PCIe reset workaround */ +#include <plat/pcie.h> + + #define QNAP_TS41X_JUMPER_JP1 45 static struct i2c_board_info __initdata qnap_ts41x_i2c_rtc = { @@ -140,8 +144,16 @@ static void __init qnap_ts41x_init(void) static int __init ts41x_pci_init(void) { - if (machine_is_ts41x()) + if (machine_is_ts41x()) { + /* + * Without this explicit reset, the PCIe SATA controller + * (Marvell 88sx7042/sata_mv) is known to stop working + * after a few minutes. + */ + orion_pcie_reset((void __iomem *)PCIE_VIRT_BASE); + kirkwood_pcie_init(KW_PCIE0); + } return 0; } diff --git a/arch/arm/mach-mmp/include/mach/cputype.h b/arch/arm/mach-mmp/include/mach/cputype.h index f43a68b..8a3b56d 100644 --- a/arch/arm/mach-mmp/include/mach/cputype.h +++ b/arch/arm/mach-mmp/include/mach/cputype.h @@ -46,7 +46,8 @@ static inline int cpu_is_pxa910(void) #ifdef CONFIG_CPU_MMP2 static inline int cpu_is_mmp2(void) { - return (((cpu_readid_id() >> 8) & 0xff) == 0x58); + return (((read_cpuid_id() >> 8) & 0xff) == 0x58); +} #else #define cpu_is_mmp2() (0) #endif diff --git a/arch/arm/mach-msm/Kconfig b/arch/arm/mach-msm/Kconfig index 3115a29..dbbcfeb 100644 --- a/arch/arm/mach-msm/Kconfig +++ b/arch/arm/mach-msm/Kconfig @@ -6,6 +6,7 @@ choice config ARCH_MSM7X00A bool "MSM7x00A / MSM7x01A" + select MACH_TROUT if !MACH_HALIBUT select ARCH_MSM_ARM11 select MSM_SMD select MSM_SMD_PKG3 @@ -15,34 +16,34 @@ config ARCH_MSM7X00A config ARCH_MSM7X30 bool "MSM7x30" + select MACH_MSM7X30_SURF # if ! select ARCH_MSM_SCORPION select MSM_SMD select MSM_VIC select CPU_V7 - select MSM_REMOTE_SPINLOCK_DEKKERS select MSM_GPIOMUX select MSM_PROC_COMM select HAS_MSM_DEBUG_UART_PHYS config ARCH_QSD8X50 bool "QSD8X50" + select MACH_QSD8X50_SURF if !MACH_QSD8X50A_ST1_5 select ARCH_MSM_SCORPION select MSM_SMD select MSM_VIC select CPU_V7 - select MSM_REMOTE_SPINLOCK_LDREX select MSM_GPIOMUX select MSM_PROC_COMM select HAS_MSM_DEBUG_UART_PHYS config ARCH_MSM8X60 bool "MSM8X60" + select MACH_MSM8X60_SURF if (!MACH_MSM8X60_RUMI3 && !MACH_MSM8X60_SIM \ + && !MACH_MSM8X60_FFA) select ARM_GIC select CPU_V7 select MSM_V2_TLMM select MSM_GPIOMUX - select MACH_MSM8X60_SURF if (!MACH_MSM8X60_RUMI3 && !MACH_MSM8X60_SIM \ - && !MACH_MSM8X60_FFA) endchoice diff --git a/arch/arm/mach-msm/board-halibut.c b/arch/arm/mach-msm/board-halibut.c index 59edecb..75dabb1 100644 --- a/arch/arm/mach-msm/board-halibut.c +++ b/arch/arm/mach-msm/board-halibut.c @@ -83,7 +83,6 @@ static void __init halibut_fixup(struct machine_desc *desc, struct tag *tags, { mi->nr_banks=1; mi->bank[0].start = PHYS_OFFSET; - mi->bank[0].node = PHYS_TO_NID(PHYS_OFFSET); mi->bank[0].size = (101*1024*1024); } diff --git a/arch/arm/mach-msm/include/mach/debug-macro.S b/arch/arm/mach-msm/include/mach/debug-macro.S index fbd5d90..646b99e 100644 --- a/arch/arm/mach-msm/include/mach/debug-macro.S +++ b/arch/arm/mach-msm/include/mach/debug-macro.S @@ -19,7 +19,7 @@ #include <mach/hardware.h> #include <mach/msm_iomap.h> -#ifdef CONFIG_HAS_MSM_DEBUG_UART_PHYS +#if defined(CONFIG_HAS_MSM_DEBUG_UART_PHYS) && !defined(CONFIG_MSM_DEBUG_UART_NONE) .macro addruart, rp, rv ldr \rp, =MSM_DEBUG_UART_PHYS ldr \rv, =MSM_DEBUG_UART_BASE @@ -36,7 +36,18 @@ tst \rd, #0x04 beq 1001b .endm +#else + .macro addruart, rp, rv + mov \rv, #0xff000000 + orr \rv, \rv, #0x00f00000 + .endm - .macro busyuart,rd,rx + .macro senduart,rd,rx + .endm + + .macro waituart,rd,rx .endm #endif + + .macro busyuart,rd,rx + .endm diff --git a/arch/arm/mach-msm/iommu_dev.c b/arch/arm/mach-msm/iommu_dev.c index c33ae78..9019cee 100644 --- a/arch/arm/mach-msm/iommu_dev.c +++ b/arch/arm/mach-msm/iommu_dev.c @@ -128,7 +128,7 @@ static void msm_iommu_reset(void __iomem *base) static int msm_iommu_probe(struct platform_device *pdev) { - struct resource *r; + struct resource *r, *r2; struct clk *iommu_clk; struct msm_iommu_drvdata *drvdata; struct msm_iommu_dev *iommu_dev = pdev->dev.platform_data; @@ -183,27 +183,27 @@ static int msm_iommu_probe(struct platform_device *pdev) len = r->end - r->start + 1; - r = request_mem_region(r->start, len, r->name); - if (!r) { + r2 = request_mem_region(r->start, len, r->name); + if (!r2) { pr_err("Could not request memory region: " "start=%p, len=%d\n", (void *) r->start, len); ret = -EBUSY; goto fail; } - regs_base = ioremap(r->start, len); + regs_base = ioremap(r2->start, len); if (!regs_base) { pr_err("Could not ioremap: start=%p, len=%d\n", - (void *) r->start, len); + (void *) r2->start, len); ret = -EBUSY; - goto fail; + goto fail_mem; } irq = platform_get_irq_byname(pdev, "secure_irq"); if (irq < 0) { ret = -ENODEV; - goto fail; + goto fail_io; } mb(); @@ -211,14 +211,14 @@ static int msm_iommu_probe(struct platform_device *pdev) if (GET_IDR(regs_base) == 0) { pr_err("Invalid IDR value detected\n"); ret = -ENODEV; - goto fail; + goto fail_io; } ret = request_irq(irq, msm_iommu_fault_handler, 0, "msm_iommu_secure_irpt_handler", drvdata); if (ret) { pr_err("Request IRQ %d failed with ret=%d\n", irq, ret); - goto fail; + goto fail_io; } msm_iommu_reset(regs_base); @@ -237,6 +237,10 @@ static int msm_iommu_probe(struct platform_device *pdev) return 0; +fail_io: + iounmap(regs_base); +fail_mem: + release_mem_region(r->start, len); fail: kfree(drvdata); return ret; diff --git a/arch/arm/mach-msm/timer.c b/arch/arm/mach-msm/timer.c index 7689848..950100f 100644 --- a/arch/arm/mach-msm/timer.c +++ b/arch/arm/mach-msm/timer.c @@ -137,7 +137,7 @@ static struct msm_clock msm_clocks[] = { .rating = 200, .read = msm_gpt_read, .mask = CLOCKSOURCE_MASK(32), - .shift = 24, + .shift = 17, .flags = CLOCK_SOURCE_IS_CONTINUOUS, }, .irq = { diff --git a/arch/arm/mach-mv78xx0/mpp.c b/arch/arm/mach-mv78xx0/mpp.c index 354ac51..84db2df 100644 --- a/arch/arm/mach-mv78xx0/mpp.c +++ b/arch/arm/mach-mv78xx0/mpp.c @@ -54,7 +54,7 @@ void __init mv78xx0_mpp_conf(unsigned int *mpp_list) } printk("\n"); - while (*mpp_list) { + for ( ; *mpp_list; mpp_list++) { unsigned int num = MPP_NUM(*mpp_list); unsigned int sel = MPP_SEL(*mpp_list); int shift, gpio_mode; @@ -83,8 +83,6 @@ void __init mv78xx0_mpp_conf(unsigned int *mpp_list) if (sel != 0) gpio_mode = 0; orion_gpio_set_valid(num, gpio_mode); - - mpp_list++; } printk(KERN_DEBUG " final MPP regs:"); diff --git a/arch/arm/mach-mx3/mach-pcm037.c b/arch/arm/mach-mx3/mach-pcm037.c index cb65769..b752f6b 100644 --- a/arch/arm/mach-mx3/mach-pcm037.c +++ b/arch/arm/mach-mx3/mach-pcm037.c @@ -308,7 +308,6 @@ static struct soc_camera_link iclink_mt9v022 = { .bus_id = 0, /* Must match with the camera ID */ .board_info = &pcm037_i2c_camera[1], .i2c_adapter_id = 2, - .module_name = "mt9v022", }; static struct soc_camera_link iclink_mt9t031 = { @@ -316,7 +315,6 @@ static struct soc_camera_link iclink_mt9t031 = { .power = pcm037_camera_power, .board_info = &pcm037_i2c_camera[0], .i2c_adapter_id = 2, - .module_name = "mt9t031", }; static struct i2c_board_info pcm037_i2c_devices[] = { diff --git a/arch/arm/mach-mx3/mx31moboard-marxbot.c b/arch/arm/mach-mx3/mx31moboard-marxbot.c index a35e8c9..f449a97 100644 --- a/arch/arm/mach-mx3/mx31moboard-marxbot.c +++ b/arch/arm/mach-mx3/mx31moboard-marxbot.c @@ -177,7 +177,6 @@ static struct soc_camera_link base_iclink = { .reset = marxbot_basecam_reset, .board_info = &marxbot_i2c_devices[0], .i2c_adapter_id = 0, - .module_name = "mt9t031", }; static struct platform_device marxbot_camera[] = { diff --git a/arch/arm/mach-mx3/mx31moboard-smartbot.c b/arch/arm/mach-mx3/mx31moboard-smartbot.c index 8e989e5..bbec3c8 100644 --- a/arch/arm/mach-mx3/mx31moboard-smartbot.c +++ b/arch/arm/mach-mx3/mx31moboard-smartbot.c @@ -86,7 +86,6 @@ static struct soc_camera_link base_iclink = { .reset = smartbot_cam_reset, .board_info = &smartbot_i2c_devices[0], .i2c_adapter_id = 0, - .module_name = "mt9t031", }; static struct platform_device smartbot_camera[] = { diff --git a/arch/arm/mach-omap1/devices.c b/arch/arm/mach-omap1/devices.c index ea0d80a..e7f9ee6 100644 --- a/arch/arm/mach-omap1/devices.c +++ b/arch/arm/mach-omap1/devices.c @@ -321,10 +321,9 @@ static struct platform_device omap_wdt_device = { static int __init omap_init_wdt(void) { if (!cpu_is_omap16xx()) - return; + return -ENODEV; - platform_device_register(&omap_wdt_device); - return 0; + return platform_device_register(&omap_wdt_device); } subsys_initcall(omap_init_wdt); #endif diff --git a/arch/arm/mach-omap1/include/mach/camera.h b/arch/arm/mach-omap1/include/mach/camera.h index fd54b45..847d00f 100644 --- a/arch/arm/mach-omap1/include/mach/camera.h +++ b/arch/arm/mach-omap1/include/mach/camera.h @@ -1,6 +1,8 @@ #ifndef __ASM_ARCH_CAMERA_H_ #define __ASM_ARCH_CAMERA_H_ +#include <media/omap1_camera.h> + void omap1_camera_init(void *); static inline void omap1_set_camera_info(struct omap1_cam_platform_data *info) diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index 7352412..60e51bc 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile @@ -108,6 +108,10 @@ obj-y += $(iommu-m) $(iommu-y) i2c-omap-$(CONFIG_I2C_OMAP) := i2c.o obj-y += $(i2c-omap-m) $(i2c-omap-y) +ifneq ($(CONFIG_TIDSPBRIDGE),) +obj-y += dsp.o +endif + # Specific board support obj-$(CONFIG_MACH_OMAP_GENERIC) += board-generic.o obj-$(CONFIG_MACH_OMAP_H4) += board-h4.o diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c index 69a4ae9..df5a425 100644 --- a/arch/arm/mach-omap2/board-4430sdp.c +++ b/arch/arm/mach-omap2/board-4430sdp.c @@ -269,9 +269,14 @@ static int omap4_twl6030_hsmmc_late_init(struct device *dev) struct omap_mmc_platform_data *pdata = dev->platform_data; /* Setting MMC1 Card detect Irq */ - if (pdev->id == 0) + if (pdev->id == 0) { + ret = twl6030_mmc_card_detect_config(); + if (ret) + pr_err("Failed configuring MMC1 card detect\n"); pdata->slots[0].card_detect_irq = TWL6030_IRQ_BASE + MMCDETECT_INTR_OFFSET; + pdata->slots[0].card_detect = twl6030_mmc_card_detect; + } return ret; } diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c index 067f437..53ac762 100644 --- a/arch/arm/mach-omap2/board-devkit8000.c +++ b/arch/arm/mach-omap2/board-devkit8000.c @@ -242,9 +242,6 @@ static int devkit8000_twl_gpio_setup(struct device *dev, mmc[0].gpio_cd = gpio + 0; omap2_hsmmc_init(mmc); - /* link regulators to MMC adapters */ - devkit8000_vmmc1_supply.dev = mmc[0].dev; - /* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */ gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1; diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c index 702f2a6..1ecd0a6c 100644 --- a/arch/arm/mach-omap2/board-omap4panda.c +++ b/arch/arm/mach-omap2/board-omap4panda.c @@ -160,10 +160,19 @@ static int omap4_twl6030_hsmmc_late_init(struct device *dev) struct platform_device, dev); struct omap_mmc_platform_data *pdata = dev->platform_data; + if (!pdata) { + dev_err(dev, "%s: NULL platform data\n", __func__); + return -EINVAL; + } /* Setting MMC1 Card detect Irq */ - if (pdev->id == 0) - pdata->slots[0].card_detect_irq = TWL6030_IRQ_BASE + - MMCDETECT_INTR_OFFSET; + if (pdev->id == 0) { + ret = twl6030_mmc_card_detect_config(); + if (ret) + dev_err(dev, "%s: Error card detect config(%d)\n", + __func__, ret); + else + pdata->slots[0].card_detect = twl6030_mmc_card_detect; + } return ret; } diff --git a/arch/arm/mach-omap2/dsp.c b/arch/arm/mach-omap2/dsp.c new file mode 100644 index 0000000..6feeeae --- /dev/null +++ b/arch/arm/mach-omap2/dsp.c @@ -0,0 +1,85 @@ +/* + * TI's OMAP DSP platform device registration + * + * Copyright (C) 2005-2006 Texas Instruments, Inc. + * Copyright (C) 2009 Nokia Corporation + * + * Written by Hiroshi DOYU <Hiroshi.DOYU@nokia.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/platform_device.h> +#include "prm.h" +#include "cm.h" +#ifdef CONFIG_BRIDGE_DVFS +#include <plat/omap-pm.h> +#endif + +#include <plat/dsp.h> + +extern phys_addr_t omap_dsp_get_mempool_base(void); + +static struct platform_device *omap_dsp_pdev; + +static struct omap_dsp_platform_data omap_dsp_pdata __initdata = { +#ifdef CONFIG_BRIDGE_DVFS + .dsp_set_min_opp = omap_pm_dsp_set_min_opp, + .dsp_get_opp = omap_pm_dsp_get_opp, + .cpu_set_freq = omap_pm_cpu_set_freq, + .cpu_get_freq = omap_pm_cpu_get_freq, +#endif + .dsp_prm_read = prm_read_mod_reg, + .dsp_prm_write = prm_write_mod_reg, + .dsp_prm_rmw_bits = prm_rmw_mod_reg_bits, + .dsp_cm_read = cm_read_mod_reg, + .dsp_cm_write = cm_write_mod_reg, + .dsp_cm_rmw_bits = cm_rmw_mod_reg_bits, +}; + +static int __init omap_dsp_init(void) +{ + struct platform_device *pdev; + int err = -ENOMEM; + struct omap_dsp_platform_data *pdata = &omap_dsp_pdata; + + pdata->phys_mempool_base = omap_dsp_get_mempool_base(); + + if (pdata->phys_mempool_base) { + pdata->phys_mempool_size = CONFIG_TIDSPBRIDGE_MEMPOOL_SIZE; + pr_info("%s: %x bytes @ %x\n", __func__, + pdata->phys_mempool_size, pdata->phys_mempool_base); + } + + pdev = platform_device_alloc("omap-dsp", -1); + if (!pdev) + goto err_out; + + err = platform_device_add_data(pdev, pdata, sizeof(*pdata)); + if (err) + goto err_out; + + err = platform_device_add(pdev); + if (err) + goto err_out; + + omap_dsp_pdev = pdev; + return 0; + +err_out: + platform_device_put(pdev); + return err; +} +module_init(omap_dsp_init); + +static void __exit omap_dsp_exit(void) +{ + platform_device_unregister(omap_dsp_pdev); +} +module_exit(omap_dsp_exit); + +MODULE_AUTHOR("Hiroshi DOYU"); +MODULE_DESCRIPTION("TI's OMAP DSP platform device registration"); +MODULE_LICENSE("GPL"); diff --git a/arch/arm/mach-orion5x/mpp.c b/arch/arm/mach-orion5x/mpp.c index bc4c3b9..db485d3 100644 --- a/arch/arm/mach-orion5x/mpp.c +++ b/arch/arm/mach-orion5x/mpp.c @@ -127,7 +127,7 @@ void __init orion5x_mpp_conf(struct orion5x_mpp_mode *mode) /* Initialize gpiolib. */ orion_gpio_init(); - while (mode->mpp >= 0) { + for ( ; mode->mpp >= 0; mode++) { u32 *reg; int num_type; int shift; @@ -160,8 +160,6 @@ void __init orion5x_mpp_conf(struct orion5x_mpp_mode *mode) orion_gpio_set_unused(mode->mpp); orion_gpio_set_valid(mode->mpp, !!(mode->type == MPP_GPIO)); - - mode++; } writel(mpp_0_7_ctrl, MPP_0_7_CTRL); diff --git a/arch/arm/mach-orion5x/ts78xx-setup.c b/arch/arm/mach-orion5x/ts78xx-setup.c index 16f1bd5..c1c1cd0 100644 --- a/arch/arm/mach-orion5x/ts78xx-setup.c +++ b/arch/arm/mach-orion5x/ts78xx-setup.c @@ -239,7 +239,7 @@ static struct platform_nand_data ts78xx_ts_nand_data = { static struct resource ts78xx_ts_nand_resources = { .start = TS_NAND_DATA, .end = TS_NAND_DATA + 4, - .flags = IORESOURCE_IO, + .flags = IORESOURCE_MEM, }; static struct platform_device ts78xx_ts_nand_device = { diff --git a/arch/arm/mach-pxa/cm-x2xx.c b/arch/arm/mach-pxa/cm-x2xx.c index ac5598c..d34b99f 100644 --- a/arch/arm/mach-pxa/cm-x2xx.c +++ b/arch/arm/mach-pxa/cm-x2xx.c @@ -476,8 +476,6 @@ static void __init cmx2xx_init(void) static void __init cmx2xx_init_irq(void) { - pxa27x_init_irq(); - if (cpu_is_pxa25x()) { pxa25x_init_irq(); cmx2xx_pci_init_irq(CMX255_GPIO_IT8152_IRQ); diff --git a/arch/arm/mach-pxa/em-x270.c b/arch/arm/mach-pxa/em-x270.c index ab48bb8..ed0dbfdb 100644 --- a/arch/arm/mach-pxa/em-x270.c +++ b/arch/arm/mach-pxa/em-x270.c @@ -1015,7 +1015,6 @@ static struct soc_camera_link iclink = { .power = em_x270_sensor_power, .board_info = &em_x270_i2c_cam_info[0], .i2c_adapter_id = 0, - .module_name = "mt9m111", }; static struct platform_device em_x270_camera = { diff --git a/arch/arm/mach-pxa/ezx.c b/arch/arm/mach-pxa/ezx.c index 80a9352..142c711 100644 --- a/arch/arm/mach-pxa/ezx.c +++ b/arch/arm/mach-pxa/ezx.c @@ -755,7 +755,6 @@ static struct soc_camera_link a780_iclink = { .flags = SOCAM_SENSOR_INVERT_PCLK, .i2c_adapter_id = 0, .board_info = &a780_camera_i2c_board_info, - .module_name = "mt9m111", .power = a780_camera_power, .reset = a780_camera_reset, }; @@ -1024,7 +1023,6 @@ static struct soc_camera_link a910_iclink = { .bus_id = 0, .i2c_adapter_id = 0, .board_info = &a910_camera_i2c_board_info, - .module_name = "mt9m111", .power = a910_camera_power, .reset = a910_camera_reset, }; diff --git a/arch/arm/mach-pxa/mioa701.c b/arch/arm/mach-pxa/mioa701.c index 0c31fab..f5fb915 100644 --- a/arch/arm/mach-pxa/mioa701.c +++ b/arch/arm/mach-pxa/mioa701.c @@ -711,7 +711,6 @@ static struct soc_camera_link iclink = { .bus_id = 0, /* Match id in pxa27x_device_camera in device.c */ .board_info = &mioa701_i2c_devices[0], .i2c_adapter_id = 0, - .module_name = "mt9m111", }; struct i2c_pxa_platform_data i2c_pdata = { diff --git a/arch/arm/mach-pxa/pcm990-baseboard.c b/arch/arm/mach-pxa/pcm990-baseboard.c index f56ae10..f33647a 100644 --- a/arch/arm/mach-pxa/pcm990-baseboard.c +++ b/arch/arm/mach-pxa/pcm990-baseboard.c @@ -453,7 +453,6 @@ static struct soc_camera_link iclink[] = { .query_bus_param = pcm990_camera_query_bus_param, .set_bus_param = pcm990_camera_set_bus_param, .free_bus = pcm990_camera_free_bus, - .module_name = "mt9v022", }, { .bus_id = 0, /* Must match with the camera ID */ .board_info = &pcm990_camera_i2c[1], @@ -461,7 +460,6 @@ static struct soc_camera_link iclink[] = { .query_bus_param = pcm990_camera_query_bus_param, .set_bus_param = pcm990_camera_set_bus_param, .free_bus = pcm990_camera_free_bus, - .module_name = "mt9m001", }, }; diff --git a/arch/arm/mach-pxa/saar.c b/arch/arm/mach-pxa/saar.c index 4b521e0..ffa50e6 100644 --- a/arch/arm/mach-pxa/saar.c +++ b/arch/arm/mach-pxa/saar.c @@ -116,7 +116,7 @@ static struct platform_device smc91x_device = { }, }; -#if defined(CONFIG_FB_PXA) || (CONFIG_FB_PXA_MODULE) +#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE) static uint16_t lcd_power_on[] = { /* single frame */ SMART_CMD_NOOP, diff --git a/arch/arm/mach-s3c2410/h1940-bluetooth.c b/arch/arm/mach-s3c2410/h1940-bluetooth.c index 8cdeb14..8aa2f19 100644 --- a/arch/arm/mach-s3c2410/h1940-bluetooth.c +++ b/arch/arm/mach-s3c2410/h1940-bluetooth.c @@ -30,7 +30,7 @@ static void h1940bt_enable(int on) { if (on) { /* Power on the chip */ - h1940_latch_control(0, H1940_LATCH_BLUETOOTH_POWER); + gpio_set_value(H1940_LATCH_BLUETOOTH_POWER, 1); /* Reset the chip */ mdelay(10); @@ -43,7 +43,7 @@ static void h1940bt_enable(int on) mdelay(10); gpio_set_value(S3C2410_GPH(1), 0); mdelay(10); - h1940_latch_control(H1940_LATCH_BLUETOOTH_POWER, 0); + gpio_set_value(H1940_LATCH_BLUETOOTH_POWER, 0); } } @@ -64,7 +64,14 @@ static int __devinit h1940bt_probe(struct platform_device *pdev) ret = gpio_request(S3C2410_GPH(1), dev_name(&pdev->dev)); if (ret) { - dev_err(&pdev->dev, "could not get GPH1\n");\ + dev_err(&pdev->dev, "could not get GPH1\n"); + return ret; + } + + ret = gpio_request(H1940_LATCH_BLUETOOTH_POWER, dev_name(&pdev->dev)); + if (ret) { + gpio_free(S3C2410_GPH(1)); + dev_err(&pdev->dev, "could not get BT_POWER\n"); return ret; } diff --git a/arch/arm/mach-s3c2410/include/mach/h1940-latch.h b/arch/arm/mach-s3c2410/include/mach/h1940-latch.h index d8a8327..97e42bf 100644 --- a/arch/arm/mach-s3c2410/include/mach/h1940-latch.h +++ b/arch/arm/mach-s3c2410/include/mach/h1940-latch.h @@ -14,51 +14,30 @@ #ifndef __ASM_ARCH_H1940_LATCH_H #define __ASM_ARCH_H1940_LATCH_H +#include <mach/gpio.h> -#ifndef __ASSEMBLY__ -#define H1940_LATCH ((void __force __iomem *)0xF8000000) -#else -#define H1940_LATCH 0xF8000000 -#endif - -#define H1940_PA_LATCH (S3C2410_CS2) +#define H1940_LATCH_GPIO(x) (S3C_GPIO_END + (x)) /* SD layer latch */ -#define H1940_LATCH_SDQ1 (1<<16) -#define H1940_LATCH_LCD_P1 (1<<17) -#define H1940_LATCH_LCD_P2 (1<<18) -#define H1940_LATCH_LCD_P3 (1<<19) -#define H1940_LATCH_MAX1698_nSHUTDOWN (1<<20) /* LCD backlight */ -#define H1940_LATCH_LED_RED (1<<21) -#define H1940_LATCH_SDQ7 (1<<22) -#define H1940_LATCH_USB_DP (1<<23) +#define H1940_LATCH_LCD_P0 H1940_LATCH_GPIO(0) +#define H1940_LATCH_LCD_P1 H1940_LATCH_GPIO(1) +#define H1940_LATCH_LCD_P2 H1940_LATCH_GPIO(2) +#define H1940_LATCH_LCD_P3 H1940_LATCH_GPIO(3) +#define H1940_LATCH_MAX1698_nSHUTDOWN H1940_LATCH_GPIO(4) +#define H1940_LATCH_LED_RED H1940_LATCH_GPIO(5) +#define H1940_LATCH_SDQ7 H1940_LATCH_GPIO(6) +#define H1940_LATCH_USB_DP H1940_LATCH_GPIO(7) /* CPU layer latch */ -#define H1940_LATCH_UDA_POWER (1<<24) -#define H1940_LATCH_AUDIO_POWER (1<<25) -#define H1940_LATCH_SM803_ENABLE (1<<26) -#define H1940_LATCH_LCD_P4 (1<<27) -#define H1940_LATCH_CPUQ5 (1<<28) /* untraced */ -#define H1940_LATCH_BLUETOOTH_POWER (1<<29) /* active high */ -#define H1940_LATCH_LED_GREEN (1<<30) -#define H1940_LATCH_LED_FLASH (1<<31) - -/* default settings */ - -#define H1940_LATCH_DEFAULT \ - H1940_LATCH_LCD_P4 | \ - H1940_LATCH_SM803_ENABLE | \ - H1940_LATCH_SDQ1 | \ - H1940_LATCH_LCD_P1 | \ - H1940_LATCH_LCD_P2 | \ - H1940_LATCH_LCD_P3 | \ - H1940_LATCH_MAX1698_nSHUTDOWN | \ - H1940_LATCH_CPUQ5 - -/* control functions */ - -extern void h1940_latch_control(unsigned int clear, unsigned int set); +#define H1940_LATCH_UDA_POWER H1940_LATCH_GPIO(8) +#define H1940_LATCH_AUDIO_POWER H1940_LATCH_GPIO(9) +#define H1940_LATCH_SM803_ENABLE H1940_LATCH_GPIO(10) +#define H1940_LATCH_LCD_P4 H1940_LATCH_GPIO(11) +#define H1940_LATCH_SD_POWER H1940_LATCH_GPIO(12) +#define H1940_LATCH_BLUETOOTH_POWER H1940_LATCH_GPIO(13) +#define H1940_LATCH_LED_GREEN H1940_LATCH_GPIO(14) +#define H1940_LATCH_LED_FLASH H1940_LATCH_GPIO(15) #endif /* __ASM_ARCH_H1940_LATCH_H */ diff --git a/arch/arm/mach-s3c2410/mach-h1940.c b/arch/arm/mach-s3c2410/mach-h1940.c index 98c5c9e..d7ada8c 100644 --- a/arch/arm/mach-s3c2410/mach-h1940.c +++ b/arch/arm/mach-s3c2410/mach-h1940.c @@ -24,6 +24,7 @@ #include <linux/io.h> #include <linux/gpio.h> #include <linux/pwm_backlight.h> +#include <linux/i2c.h> #include <video/platform_lcd.h> #include <linux/mmc/host.h> @@ -59,6 +60,14 @@ #include <plat/mci.h> #include <plat/ts.h> +#include <sound/uda1380.h> + +#define H1940_LATCH ((void __force __iomem *)0xF8000000) + +#define H1940_PA_LATCH S3C2410_CS2 + +#define H1940_LATCH_BIT(x) (1 << ((x) + 16 - S3C_GPIO_END)) + static struct map_desc h1940_iodesc[] __initdata = { [0] = { .virtual = (unsigned long)H1940_LATCH, @@ -100,9 +109,9 @@ static struct s3c2410_uartcfg h1940_uartcfgs[] __initdata = { /* Board control latch control */ -static unsigned int latch_state = H1940_LATCH_DEFAULT; +static unsigned int latch_state; -void h1940_latch_control(unsigned int clear, unsigned int set) +static void h1940_latch_control(unsigned int clear, unsigned int set) { unsigned long flags; @@ -116,7 +125,42 @@ void h1940_latch_control(unsigned int clear, unsigned int set) local_irq_restore(flags); } -EXPORT_SYMBOL_GPL(h1940_latch_control); +static inline int h1940_gpiolib_to_latch(int offset) +{ + return 1 << (offset + 16); +} + +static void h1940_gpiolib_latch_set(struct gpio_chip *chip, + unsigned offset, int value) +{ + int latch_bit = h1940_gpiolib_to_latch(offset); + + h1940_latch_control(value ? 0 : latch_bit, + value ? latch_bit : 0); +} + +static int h1940_gpiolib_latch_output(struct gpio_chip *chip, + unsigned offset, int value) +{ + h1940_gpiolib_latch_set(chip, offset, value); + return 0; +} + +static int h1940_gpiolib_latch_get(struct gpio_chip *chip, + unsigned offset) +{ + return (latch_state >> (offset + 16)) & 1; +} + +struct gpio_chip h1940_latch_gpiochip = { + .base = H1940_LATCH_GPIO(0), + .owner = THIS_MODULE, + .label = "H1940_LATCH", + .ngpio = 16, + .direction_output = h1940_gpiolib_latch_output, + .set = h1940_gpiolib_latch_set, + .get = h1940_gpiolib_latch_get, +}; static void h1940_udc_pullup(enum s3c2410_udc_cmd_e cmd) { @@ -125,10 +169,10 @@ static void h1940_udc_pullup(enum s3c2410_udc_cmd_e cmd) switch (cmd) { case S3C2410_UDC_P_ENABLE : - h1940_latch_control(0, H1940_LATCH_USB_DP); + gpio_set_value(H1940_LATCH_USB_DP, 1); break; case S3C2410_UDC_P_DISABLE : - h1940_latch_control(H1940_LATCH_USB_DP, 0); + gpio_set_value(H1940_LATCH_USB_DP, 0); break; case S3C2410_UDC_P_RESET : break; @@ -199,10 +243,25 @@ static struct platform_device h1940_device_bluetooth = { .id = -1, }; +static void h1940_set_mmc_power(unsigned char power_mode, unsigned short vdd) +{ + switch (power_mode) { + case MMC_POWER_OFF: + gpio_set_value(H1940_LATCH_SD_POWER, 0); + break; + case MMC_POWER_UP: + case MMC_POWER_ON: + gpio_set_value(H1940_LATCH_SD_POWER, 1); + break; + default: + break; + }; +} + static struct s3c24xx_mci_pdata h1940_mmc_cfg __initdata = { .gpio_detect = S3C2410_GPF(5), .gpio_wprotect = S3C2410_GPH(8), - .set_power = NULL, + .set_power = h1940_set_mmc_power, .ocr_avail = MMC_VDD_32_33, }; @@ -213,15 +272,32 @@ static int h1940_backlight_init(struct device *dev) gpio_direction_output(S3C2410_GPB(0), 0); s3c_gpio_setpull(S3C2410_GPB(0), S3C_GPIO_PULL_NONE); s3c_gpio_cfgpin(S3C2410_GPB(0), S3C2410_GPB0_TOUT0); + gpio_set_value(H1940_LATCH_MAX1698_nSHUTDOWN, 1); return 0; } +static int h1940_backlight_notify(struct device *dev, int brightness) +{ + if (!brightness) { + gpio_direction_output(S3C2410_GPB(0), 1); + gpio_set_value(H1940_LATCH_MAX1698_nSHUTDOWN, 0); + } else { + gpio_direction_output(S3C2410_GPB(0), 0); + s3c_gpio_setpull(S3C2410_GPB(0), S3C_GPIO_PULL_NONE); + s3c_gpio_cfgpin(S3C2410_GPB(0), S3C2410_GPB0_TOUT0); + gpio_set_value(H1940_LATCH_MAX1698_nSHUTDOWN, 1); + } + return brightness; +} + static void h1940_backlight_exit(struct device *dev) { gpio_direction_output(S3C2410_GPB(0), 1); + gpio_set_value(H1940_LATCH_MAX1698_nSHUTDOWN, 0); } + static struct platform_pwm_backlight_data backlight_data = { .pwm_id = 0, .max_brightness = 100, @@ -229,6 +305,7 @@ static struct platform_pwm_backlight_data backlight_data = { /* tcnt = 0x31 */ .pwm_period_ns = 36296, .init = h1940_backlight_init, + .notify = h1940_backlight_notify, .exit = h1940_backlight_exit, }; @@ -247,19 +324,37 @@ static void h1940_lcd_power_set(struct plat_lcd_data *pd, int value; if (!power) { - /* set to 3ec */ - gpio_direction_output(S3C2410_GPC(0), 0); + gpio_set_value(S3C2410_GPC(0), 0); /* wait for 3ac */ do { value = gpio_get_value(S3C2410_GPC(6)); } while (value); - /* set to 38c */ - gpio_direction_output(S3C2410_GPC(5), 0); + + gpio_set_value(H1940_LATCH_LCD_P2, 0); + gpio_set_value(H1940_LATCH_LCD_P3, 0); + gpio_set_value(H1940_LATCH_LCD_P4, 0); + + gpio_direction_output(S3C2410_GPC(1), 0); + gpio_direction_output(S3C2410_GPC(4), 0); + + gpio_set_value(H1940_LATCH_LCD_P1, 0); + gpio_set_value(H1940_LATCH_LCD_P0, 0); + + gpio_set_value(S3C2410_GPC(5), 0); + } else { - /* Set to 3ac */ - gpio_direction_output(S3C2410_GPC(5), 1); - /* Set to 3ad */ - gpio_direction_output(S3C2410_GPC(0), 1); + gpio_set_value(H1940_LATCH_LCD_P0, 1); + gpio_set_value(H1940_LATCH_LCD_P1, 1); + + s3c_gpio_cfgpin(S3C2410_GPC(1), S3C_GPIO_SFN(2)); + s3c_gpio_cfgpin(S3C2410_GPC(4), S3C_GPIO_SFN(2)); + + gpio_set_value(S3C2410_GPC(5), 1); + gpio_set_value(S3C2410_GPC(0), 1); + + gpio_set_value(H1940_LATCH_LCD_P3, 1); + gpio_set_value(H1940_LATCH_LCD_P2, 1); + gpio_set_value(H1940_LATCH_LCD_P4, 1); } } @@ -273,12 +368,26 @@ static struct platform_device h1940_lcd_powerdev = { .dev.platform_data = &h1940_lcd_power_data, }; +static struct uda1380_platform_data uda1380_info = { + .gpio_power = H1940_LATCH_UDA_POWER, + .gpio_reset = S3C2410_GPA(12), + .dac_clk = UDA1380_DAC_CLK_SYSCLK, +}; + +static struct i2c_board_info h1940_i2c_devices[] = { + { + I2C_BOARD_INFO("uda1380", 0x1a), + .platform_data = &uda1380_info, + }, +}; + static struct platform_device *h1940_devices[] __initdata = { &s3c_device_ohci, &s3c_device_lcd, &s3c_device_wdt, &s3c_device_i2c0, &s3c_device_iis, + &s3c_device_pcm, &s3c_device_usbgadget, &h1940_device_leds, &h1940_device_bluetooth, @@ -303,6 +412,10 @@ static void __init h1940_map_io(void) memcpy(phys_to_virt(H1940_SUSPEND_RESUMEAT), h1940_pm_return, 1024); #endif s3c_pm_init(); + + /* Add latch gpio chip, set latch initial value */ + h1940_latch_control(0, 0); + WARN_ON(gpiochip_add(&h1940_latch_gpiochip)); } /* H1940 and RX3715 need to reserve this for suspend */ @@ -340,12 +453,38 @@ static void __init h1940_init(void) writel(tmp, S3C2410_UPLLCON); gpio_request(S3C2410_GPC(0), "LCD power"); + gpio_request(S3C2410_GPC(1), "LCD power"); + gpio_request(S3C2410_GPC(4), "LCD power"); gpio_request(S3C2410_GPC(5), "LCD power"); gpio_request(S3C2410_GPC(6), "LCD power"); - + gpio_request(H1940_LATCH_LCD_P0, "LCD power"); + gpio_request(H1940_LATCH_LCD_P1, "LCD power"); + gpio_request(H1940_LATCH_LCD_P2, "LCD power"); + gpio_request(H1940_LATCH_LCD_P3, "LCD power"); + gpio_request(H1940_LATCH_LCD_P4, "LCD power"); + gpio_request(H1940_LATCH_MAX1698_nSHUTDOWN, "LCD power"); + gpio_direction_output(S3C2410_GPC(0), 0); + gpio_direction_output(S3C2410_GPC(1), 0); + gpio_direction_output(S3C2410_GPC(4), 0); + gpio_direction_output(S3C2410_GPC(5), 0); gpio_direction_input(S3C2410_GPC(6)); + gpio_direction_output(H1940_LATCH_LCD_P0, 0); + gpio_direction_output(H1940_LATCH_LCD_P1, 0); + gpio_direction_output(H1940_LATCH_LCD_P2, 0); + gpio_direction_output(H1940_LATCH_LCD_P3, 0); + gpio_direction_output(H1940_LATCH_LCD_P4, 0); + gpio_direction_output(H1940_LATCH_MAX1698_nSHUTDOWN, 0); + + gpio_request(H1940_LATCH_USB_DP, "USB pullup"); + gpio_direction_output(H1940_LATCH_USB_DP, 0); + + gpio_request(H1940_LATCH_SD_POWER, "SD power"); + gpio_direction_output(H1940_LATCH_SD_POWER, 0); platform_add_devices(h1940_devices, ARRAY_SIZE(h1940_devices)); + + i2c_register_board_info(0, h1940_i2c_devices, + ARRAY_SIZE(h1940_i2c_devices)); } MACHINE_START(H1940, "IPAQ-H1940") diff --git a/arch/arm/mach-s3c2440/Kconfig b/arch/arm/mach-s3c2440/Kconfig index cd8e7de..ff024a6 100644 --- a/arch/arm/mach-s3c2440/Kconfig +++ b/arch/arm/mach-s3c2440/Kconfig @@ -4,7 +4,6 @@ config CPU_S3C2440 bool - depends on ARCH_S3C2410 select CPU_ARM920T select S3C_GPIO_PULL_UP select S3C2410_CLOCK @@ -18,7 +17,6 @@ config CPU_S3C2440 config CPU_S3C2442 bool - depends on ARCH_S3C2410 select CPU_ARM920T select S3C2410_CLOCK select S3C2410_GPIO @@ -30,7 +28,7 @@ config CPU_S3C2442 config CPU_S3C244X bool - depends on ARCH_S3C2410 && (CPU_S3C2440 || CPU_S3C2442) + depends on CPU_S3C2440 || CPU_S3C2442 help Support for S3C2440 and S3C2442 Samsung Mobile CPU based systems. @@ -72,7 +70,7 @@ config S3C2440_PLL_16934400 config S3C2440_DMA bool - depends on ARCH_S3C2410 && CPU_S3C24405B + depends on CPU_S3C2440 help Support for S3C2440 specific DMA code5A @@ -181,7 +179,6 @@ config MACH_MINI2440 select CPU_S3C2440 select EEPROM_AT24 select LEDS_TRIGGER_BACKLIGHT - select SND_S3C24XX_SOC_S3C24XX_UDA134X select S3C_DEV_NAND select S3C_DEV_USB_HOST help diff --git a/arch/arm/mach-s3c2440/mach-rx1950.c b/arch/arm/mach-s3c2440/mach-rx1950.c index 32019bd..e0622bb 100644 --- a/arch/arm/mach-s3c2440/mach-rx1950.c +++ b/arch/arm/mach-s3c2440/mach-rx1950.c @@ -25,8 +25,12 @@ #include <linux/input.h> #include <linux/gpio_keys.h> #include <linux/sysdev.h> +#include <linux/pda_power.h> #include <linux/pwm_backlight.h> #include <linux/pwm.h> +#include <linux/s3c_adc_battery.h> +#include <linux/leds.h> +#include <linux/i2c.h> #include <linux/mtd/mtd.h> #include <linux/mtd/partitions.h> @@ -55,6 +59,8 @@ #include <plat/irq.h> #include <plat/ts.h> +#include <sound/uda1380.h> + #define LCD_PWM_PERIOD 192960 #define LCD_PWM_DUTY 127353 @@ -127,6 +133,193 @@ static struct s3c2410fb_display rx1950_display = { }; +static int power_supply_init(struct device *dev) +{ + return gpio_request(S3C2410_GPF(2), "cable plugged"); +} + +static int rx1950_is_ac_online(void) +{ + return !gpio_get_value(S3C2410_GPF(2)); +} + +static void power_supply_exit(struct device *dev) +{ + gpio_free(S3C2410_GPF(2)); +} + +static char *rx1950_supplicants[] = { + "main-battery" +}; + +static struct pda_power_pdata power_supply_info = { + .init = power_supply_init, + .is_ac_online = rx1950_is_ac_online, + .exit = power_supply_exit, + .supplied_to = rx1950_supplicants, + .num_supplicants = ARRAY_SIZE(rx1950_supplicants), +}; + +static struct resource power_supply_resources[] = { + [0] = { + .name = "ac", + .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE | + IORESOURCE_IRQ_HIGHEDGE, + .start = IRQ_EINT2, + .end = IRQ_EINT2, + }, +}; + +static struct platform_device power_supply = { + .name = "pda-power", + .id = -1, + .dev = { + .platform_data = + &power_supply_info, + }, + .resource = power_supply_resources, + .num_resources = ARRAY_SIZE(power_supply_resources), +}; + +static const struct s3c_adc_bat_thresh bat_lut_noac[] = { + { .volt = 4100, .cur = 156, .level = 100}, + { .volt = 4050, .cur = 156, .level = 95}, + { .volt = 4025, .cur = 141, .level = 90}, + { .volt = 3995, .cur = 144, .level = 85}, + { .volt = 3957, .cur = 162, .level = 80}, + { .volt = 3931, .cur = 147, .level = 75}, + { .volt = 3902, .cur = 147, .level = 70}, + { .volt = 3863, .cur = 153, .level = 65}, + { .volt = 3838, .cur = 150, .level = 60}, + { .volt = 3800, .cur = 153, .level = 55}, + { .volt = 3765, .cur = 153, .level = 50}, + { .volt = 3748, .cur = 172, .level = 45}, + { .volt = 3740, .cur = 153, .level = 40}, + { .volt = 3714, .cur = 175, .level = 35}, + { .volt = 3710, .cur = 156, .level = 30}, + { .volt = 3963, .cur = 156, .level = 25}, + { .volt = 3672, .cur = 178, .level = 20}, + { .volt = 3651, .cur = 178, .level = 15}, + { .volt = 3629, .cur = 178, .level = 10}, + { .volt = 3612, .cur = 162, .level = 5}, + { .volt = 3605, .cur = 162, .level = 0}, +}; + +static const struct s3c_adc_bat_thresh bat_lut_acin[] = { + { .volt = 4200, .cur = 0, .level = 100}, + { .volt = 4190, .cur = 0, .level = 99}, + { .volt = 4178, .cur = 0, .level = 95}, + { .volt = 4110, .cur = 0, .level = 70}, + { .volt = 4076, .cur = 0, .level = 65}, + { .volt = 4046, .cur = 0, .level = 60}, + { .volt = 4021, .cur = 0, .level = 55}, + { .volt = 3999, .cur = 0, .level = 50}, + { .volt = 3982, .cur = 0, .level = 45}, + { .volt = 3965, .cur = 0, .level = 40}, + { .volt = 3957, .cur = 0, .level = 35}, + { .volt = 3948, .cur = 0, .level = 30}, + { .volt = 3936, .cur = 0, .level = 25}, + { .volt = 3927, .cur = 0, .level = 20}, + { .volt = 3906, .cur = 0, .level = 15}, + { .volt = 3880, .cur = 0, .level = 10}, + { .volt = 3829, .cur = 0, .level = 5}, + { .volt = 3820, .cur = 0, .level = 0}, +}; + +int rx1950_bat_init(void) +{ + int ret; + + ret = gpio_request(S3C2410_GPJ(2), "rx1950-charger-enable-1"); + if (ret) + goto err_gpio1; + ret = gpio_request(S3C2410_GPJ(3), "rx1950-charger-enable-2"); + if (ret) + goto err_gpio2; + + return 0; + +err_gpio2: + gpio_free(S3C2410_GPJ(2)); +err_gpio1: + return ret; +} + +void rx1950_bat_exit(void) +{ + gpio_free(S3C2410_GPJ(2)); + gpio_free(S3C2410_GPJ(3)); +} + +void rx1950_enable_charger(void) +{ + gpio_direction_output(S3C2410_GPJ(2), 1); + gpio_direction_output(S3C2410_GPJ(3), 1); +} + +void rx1950_disable_charger(void) +{ + gpio_direction_output(S3C2410_GPJ(2), 0); + gpio_direction_output(S3C2410_GPJ(3), 0); +} + +static struct gpio_led rx1950_leds_desc[] = { + { + .name = "Green", + .default_trigger = "main-battery-charging-or-full", + .gpio = S3C2410_GPA(6), + }, + { + .name = "Red", + .default_trigger = "main-battery-full", + .gpio = S3C2410_GPA(7), + }, + { + .name = "Blue", + .default_trigger = "rx1950-acx-mem", + .gpio = S3C2410_GPA(11), + }, +}; + +static struct gpio_led_platform_data rx1950_leds_pdata = { + .num_leds = ARRAY_SIZE(rx1950_leds_desc), + .leds = rx1950_leds_desc, +}; + +static struct platform_device rx1950_leds = { + .name = "leds-gpio", + .id = -1, + .dev = { + .platform_data = &rx1950_leds_pdata, + }, +}; + +static struct s3c_adc_bat_pdata rx1950_bat_cfg = { + .init = rx1950_bat_init, + .exit = rx1950_bat_exit, + .enable_charger = rx1950_enable_charger, + .disable_charger = rx1950_disable_charger, + .gpio_charge_finished = S3C2410_GPF(3), + .lut_noac = bat_lut_noac, + .lut_noac_cnt = ARRAY_SIZE(bat_lut_noac), + .lut_acin = bat_lut_acin, + .lut_acin_cnt = ARRAY_SIZE(bat_lut_acin), + .volt_channel = 0, + .current_channel = 1, + .volt_mult = 4235, + .current_mult = 2900, + .internal_impedance = 200, +}; + +static struct platform_device rx1950_battery = { + .name = "s3c-adc-battery", + .id = -1, + .dev = { + .parent = &s3c_device_adc.dev, + .platform_data = &rx1950_bat_cfg, + }, +}; + static struct s3c2410fb_mach_info rx1950_lcd_cfg = { .displays = &rx1950_display, .num_displays = 1, @@ -481,11 +674,17 @@ static struct platform_device rx1950_device_gpiokeys = { .dev.platform_data = &rx1950_gpio_keys_data, }; -static struct s3c2410_platform_i2c rx1950_i2c_data = { - .flags = 0, - .slave_addr = 0x42, - .frequency = 400 * 1000, - .sda_delay = S3C2410_IICLC_SDA_DELAY5 | S3C2410_IICLC_FILTER_ON, +static struct uda1380_platform_data uda1380_info = { + .gpio_power = S3C2410_GPJ(0), + .gpio_reset = S3C2410_GPD(0), + .dac_clk = UDA1380_DAC_CLK_SYSCLK, +}; + +static struct i2c_board_info rx1950_i2c_devices[] = { + { + I2C_BOARD_INFO("uda1380", 0x1a), + .platform_data = &uda1380_info, + }, }; static struct platform_device *rx1950_devices[] __initdata = { @@ -493,6 +692,7 @@ static struct platform_device *rx1950_devices[] __initdata = { &s3c_device_wdt, &s3c_device_i2c0, &s3c_device_iis, + &s3c_device_pcm, &s3c_device_usbgadget, &s3c_device_rtc, &s3c_device_nand, @@ -503,6 +703,9 @@ static struct platform_device *rx1950_devices[] __initdata = { &s3c_device_timer[1], &rx1950_backlight, &rx1950_device_gpiokeys, + &power_supply, + &rx1950_battery, + &rx1950_leds, }; static struct clk *rx1950_clocks[] __initdata = { @@ -538,7 +741,7 @@ static void __init rx1950_init_machine(void) s3c24xx_udc_set_platdata(&rx1950_udc_cfg); s3c24xx_ts_set_platdata(&rx1950_ts_cfg); s3c24xx_mci_set_platdata(&rx1950_mmc_cfg); - s3c_i2c0_set_platdata(&rx1950_i2c_data); + s3c_i2c0_set_platdata(NULL); s3c_nand_set_platdata(&rx1950_nand_info); /* Turn off suspend on both USB ports, and switch the @@ -569,6 +772,9 @@ static void __init rx1950_init_machine(void) WARN_ON(gpio_request(S3C2410_GPB(1), "LCD power")); platform_add_devices(rx1950_devices, ARRAY_SIZE(rx1950_devices)); + + i2c_register_board_info(0, rx1950_i2c_devices, + ARRAY_SIZE(rx1950_i2c_devices)); } /* H1940 and RX3715 need to reserve this for suspend */ diff --git a/arch/arm/mach-s3c64xx/Kconfig b/arch/arm/mach-s3c64xx/Kconfig index fe1fd30..579d2f0 100644 --- a/arch/arm/mach-s3c64xx/Kconfig +++ b/arch/arm/mach-s3c64xx/Kconfig @@ -143,7 +143,7 @@ config MACH_SMDK6410 select S3C_DEV_USB_HSOTG select S3C_DEV_WDT select SAMSUNG_DEV_KEYPAD - select HAVE_S3C2410_WATCHDOG + select HAVE_S3C2410_WATCHDOG if WATCHDOG select S3C64XX_SETUP_SDHCI select S3C64XX_SETUP_I2C1 select S3C64XX_SETUP_IDE @@ -206,6 +206,7 @@ config SMDK6410_WM1192_EV1 select REGULATOR_WM831X select S3C24XX_GPIO_EXTRA64 select MFD_WM831X + select MFD_WM831X_I2C help The Wolfson Microelectronics 1192-EV1 is a WM831x based PMIC daughtercard for the Samsung SMDK6410 reference platform. diff --git a/arch/arm/mach-sa1100/cpu-sa1100.c b/arch/arm/mach-sa1100/cpu-sa1100.c index c0a13ef..96f7dc1 100644 --- a/arch/arm/mach-sa1100/cpu-sa1100.c +++ b/arch/arm/mach-sa1100/cpu-sa1100.c @@ -184,16 +184,15 @@ static int sa1100_target(struct cpufreq_policy *policy, { unsigned int cur = sa11x0_getspeed(0); unsigned int new_ppcr; - struct cpufreq_freqs freqs; + + new_ppcr = sa11x0_freq_to_ppcr(target_freq); switch(relation){ case CPUFREQ_RELATION_L: - new_ppcr = sa11x0_freq_to_ppcr(target_freq); if (sa11x0_ppcr_to_freq(new_ppcr) > policy->max) new_ppcr--; break; case CPUFREQ_RELATION_H: - new_ppcr = sa11x0_freq_to_ppcr(target_freq); if ((sa11x0_ppcr_to_freq(new_ppcr) > target_freq) && (sa11x0_ppcr_to_freq(new_ppcr - 1) >= policy->min)) new_ppcr--; diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig index 54b479c..51dcd59 100644 --- a/arch/arm/mach-shmobile/Kconfig +++ b/arch/arm/mach-shmobile/Kconfig @@ -116,4 +116,6 @@ endmenu config SH_CLK_CPG bool +source "drivers/sh/Kconfig" + endif diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c index 1492398..d326054 100644 --- a/arch/arm/mach-shmobile/board-ap4evb.c +++ b/arch/arm/mach-shmobile/board-ap4evb.c @@ -30,7 +30,6 @@ #include <linux/mtd/mtd.h> #include <linux/mtd/partitions.h> #include <linux/mtd/physmap.h> -#include <linux/mmc/host.h> #include <linux/mmc/sh_mmcif.h> #include <linux/i2c.h> #include <linux/i2c/tsc2007.h> @@ -44,6 +43,10 @@ #include <linux/input/sh_keysc.h> #include <linux/usb/r8a66597.h> +#include <media/sh_mobile_ceu.h> +#include <media/sh_mobile_csi2.h> +#include <media/soc_camera.h> + #include <sound/sh_fsi.h> #include <video/sh_mobile_hdmi.h> @@ -160,11 +163,13 @@ static struct mtd_partition nor_flash_partitions[] = { .name = "loader", .offset = 0x00000000, .size = 512 * 1024, + .mask_flags = MTD_WRITEABLE, }, { .name = "bootenv", .offset = MTDPART_OFS_APPEND, .size = 512 * 1024, + .mask_flags = MTD_WRITEABLE, }, { .name = "kernel_ro", @@ -235,10 +240,22 @@ static struct platform_device smc911x_device = { }, }; +/* + * The card detect pin of the top SD/MMC slot (CN7) is active low and is + * connected to GPIO A22 of SH7372 (GPIO_PORT41). + */ +static int slot_cn7_get_cd(struct platform_device *pdev) +{ + if (gpio_is_valid(GPIO_PORT41)) + return !gpio_get_value(GPIO_PORT41); + else + return -ENXIO; +} + /* SH_MMCIF */ static struct resource sh_mmcif_resources[] = { [0] = { - .name = "SH_MMCIF", + .name = "MMCIF", .start = 0xE6BD0000, .end = 0xE6BD00FF, .flags = IORESOURCE_MEM, @@ -261,6 +278,7 @@ static struct sh_mmcif_plat_data sh_mmcif_plat = { .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA | MMC_CAP_NEEDS_POLL, + .get_cd = slot_cn7_get_cd, }; static struct platform_device sh_mmcif_device = { @@ -310,6 +328,8 @@ static struct sh_mobile_sdhi_info sdhi1_info = { .dma_slave_rx = SHDMA_SLAVE_SDHI1_RX, .tmio_ocr_mask = MMC_VDD_165_195, .tmio_flags = TMIO_MMC_WRPROTECT_DISABLE, + .tmio_caps = MMC_CAP_NEEDS_POLL, + .get_cd = slot_cn7_get_cd, }; static struct resource sdhi1_resources[] = { @@ -375,10 +395,40 @@ static struct platform_device usb1_host_device = { .resource = usb1_host_resources, }; +const static struct fb_videomode ap4evb_lcdc_modes[] = { + { +#ifdef CONFIG_AP4EVB_QHD + .name = "R63302(QHD)", + .xres = 544, + .yres = 961, + .left_margin = 72, + .right_margin = 600, + .hsync_len = 16, + .upper_margin = 8, + .lower_margin = 8, + .vsync_len = 2, + .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT, +#else + .name = "WVGA Panel", + .xres = 800, + .yres = 480, + .left_margin = 220, + .right_margin = 110, + .hsync_len = 70, + .upper_margin = 20, + .lower_margin = 5, + .vsync_len = 5, + .sync = 0, +#endif + }, +}; + static struct sh_mobile_lcdc_info lcdc_info = { .ch[0] = { .chan = LCDC_CHAN_MAINLCD, .bpp = 16, + .lcd_cfg = ap4evb_lcdc_modes, + .num_cfg = ARRAY_SIZE(ap4evb_lcdc_modes), } }; @@ -517,26 +567,41 @@ static struct platform_device *qhd_devices[] __initdata = { /* FSI */ #define IRQ_FSI evt2irq(0x1840) -#define FSIACKCR 0xE6150018 -static void fsiackcr_init(struct clk *clk) + +static int fsi_set_rate(int is_porta, int rate) { - u32 status = __raw_readl(clk->enable_reg); + struct clk *fsib_clk; + struct clk *fdiv_clk = &sh7372_fsidivb_clk; + int ret; - /* use external clock */ - status &= ~0x000000ff; - status |= 0x00000080; - __raw_writel(status, clk->enable_reg); -} + /* set_rate is not needed if port A */ + if (is_porta) + return 0; + + fsib_clk = clk_get(NULL, "fsib_clk"); + if (IS_ERR(fsib_clk)) + return -EINVAL; + + switch (rate) { + case 44100: + clk_set_rate(fsib_clk, clk_round_rate(fsib_clk, 11283000)); + ret = SH_FSI_ACKMD_256 | SH_FSI_BPFMD_64; + break; + case 48000: + clk_set_rate(fsib_clk, clk_round_rate(fsib_clk, 85428000)); + clk_set_rate(fdiv_clk, clk_round_rate(fdiv_clk, 12204000)); + ret = SH_FSI_ACKMD_256 | SH_FSI_BPFMD_64; + break; + default: + pr_err("unsupported rate in FSI2 port B\n"); + ret = -EINVAL; + break; + } -static struct clk_ops fsiackcr_clk_ops = { - .init = fsiackcr_init, -}; + clk_put(fsib_clk); -static struct clk fsiackcr_clk = { - .ops = &fsiackcr_clk_ops, - .enable_reg = (void __iomem *)FSIACKCR, - .rate = 0, /* unknown */ -}; + return ret; +} static struct sh_fsi_platform_info fsi_info = { .porta_flags = SH_FSI_BRS_INV | @@ -544,6 +609,12 @@ static struct sh_fsi_platform_info fsi_info = { SH_FSI_IN_SLAVE_MODE | SH_FSI_OFMT(PCM) | SH_FSI_IFMT(PCM), + + .portb_flags = SH_FSI_BRS_INV | + SH_FSI_BRM_INV | + SH_FSI_LRS_INV | + SH_FSI_OFMT(SPDIF), + .set_rate = fsi_set_rate, }; static struct resource fsi_resources[] = { @@ -577,26 +648,6 @@ static struct sh_mobile_lcdc_info sh_mobile_lcdc1_info = { .interface_type = RGB24, .clock_divider = 1, .flags = LCDC_FLAGS_DWPOL, - .lcd_cfg = { - .name = "HDMI", - /* So far only 720p is supported */ - .xres = 1280, - .yres = 720, - /* - * If left and right margins are not multiples of 8, - * LDHAJR will be adjusted accordingly by the LCDC - * driver. Until we start using EDID, these values - * might have to be adjusted for different monitors. - */ - .left_margin = 200, - .right_margin = 88, - .hsync_len = 48, - .upper_margin = 20, - .lower_margin = 5, - .vsync_len = 5, - .pixclock = 13468, - .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT, - }, } }; @@ -608,7 +659,7 @@ static struct resource lcdc1_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = intcs_evt2irq(0x17a0), + .start = intcs_evt2irq(0x1780), .flags = IORESOURCE_IRQ, }, }; @@ -627,6 +678,7 @@ static struct platform_device lcdc1_device = { static struct sh_mobile_hdmi_info hdmi_info = { .lcd_chan = &sh_mobile_lcdc1_info.ch[0], .lcd_dev = &lcdc1_device.dev, + .flags = HDMI_SND_SRC_SPDIF, }; static struct resource hdmi_resources[] = { @@ -689,6 +741,95 @@ static struct platform_device leds_device = { }, }; +static struct i2c_board_info imx074_info = { + I2C_BOARD_INFO("imx074", 0x1a), +}; + +struct soc_camera_link imx074_link = { + .bus_id = 0, + .board_info = &imx074_info, + .i2c_adapter_id = 0, + .module_name = "imx074", +}; + +static struct platform_device ap4evb_camera = { + .name = "soc-camera-pdrv", + .id = 0, + .dev = { + .platform_data = &imx074_link, + }, +}; + +static struct sh_csi2_client_config csi2_clients[] = { + { + .phy = SH_CSI2_PHY_MAIN, + .lanes = 3, + .channel = 0, + .pdev = &ap4evb_camera, + }, +}; + +static struct sh_csi2_pdata csi2_info = { + .type = SH_CSI2C, + .clients = csi2_clients, + .num_clients = ARRAY_SIZE(csi2_clients), + .flags = SH_CSI2_ECC | SH_CSI2_CRC, +}; + +static struct resource csi2_resources[] = { + [0] = { + .name = "CSI2", + .start = 0xffc90000, + .end = 0xffc90fff, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = intcs_evt2irq(0x17a0), + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device csi2_device = { + .name = "sh-mobile-csi2", + .id = 0, + .num_resources = ARRAY_SIZE(csi2_resources), + .resource = csi2_resources, + .dev = { + .platform_data = &csi2_info, + }, +}; + +static struct sh_mobile_ceu_info sh_mobile_ceu_info = { + .flags = SH_CEU_FLAG_USE_8BIT_BUS, + .csi2_dev = &csi2_device.dev, +}; + +static struct resource ceu_resources[] = { + [0] = { + .name = "CEU", + .start = 0xfe910000, + .end = 0xfe91009f, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = intcs_evt2irq(0x880), + .flags = IORESOURCE_IRQ, + }, + [2] = { + /* place holder for contiguous memory */ + }, +}; + +static struct platform_device ceu_device = { + .name = "sh_mobile_ceu", + .id = 0, /* "ceu0" clock */ + .num_resources = ARRAY_SIZE(ceu_resources), + .resource = ceu_resources, + .dev = { + .platform_data = &sh_mobile_ceu_info, + }, +}; + static struct platform_device *ap4evb_devices[] __initdata = { &leds_device, &nor_flash_device, @@ -701,6 +842,9 @@ static struct platform_device *ap4evb_devices[] __initdata = { &lcdc1_device, &lcdc_device, &hdmi_device, + &csi2_device, + &ceu_device, + &ap4evb_camera, }; static int __init hdmi_init_pm_clock(void) @@ -715,22 +859,22 @@ static int __init hdmi_init_pm_clock(void) goto out; } - ret = clk_set_parent(&pllc2_clk, &dv_clki_div2_clk); + ret = clk_set_parent(&sh7372_pllc2_clk, &sh7372_dv_clki_div2_clk); if (ret < 0) { - pr_err("Cannot set PLLC2 parent: %d, %d users\n", ret, pllc2_clk.usecount); + pr_err("Cannot set PLLC2 parent: %d, %d users\n", ret, sh7372_pllc2_clk.usecount); goto out; } - pr_debug("PLLC2 initial frequency %lu\n", clk_get_rate(&pllc2_clk)); + pr_debug("PLLC2 initial frequency %lu\n", clk_get_rate(&sh7372_pllc2_clk)); - rate = clk_round_rate(&pllc2_clk, 594000000); + rate = clk_round_rate(&sh7372_pllc2_clk, 594000000); if (rate < 0) { pr_err("Cannot get suitable rate: %ld\n", rate); ret = rate; goto out; } - ret = clk_set_rate(&pllc2_clk, rate); + ret = clk_set_rate(&sh7372_pllc2_clk, rate); if (ret < 0) { pr_err("Cannot set rate %ld: %d\n", rate, ret); goto out; @@ -738,7 +882,7 @@ static int __init hdmi_init_pm_clock(void) pr_debug("PLLC2 set frequency %lu\n", rate); - ret = clk_set_parent(hdmi_ick, &pllc2_clk); + ret = clk_set_parent(hdmi_ick, &sh7372_pllc2_clk); if (ret < 0) { pr_err("Cannot set HDMI parent: %d\n", ret); goto out; @@ -752,11 +896,51 @@ out: device_initcall(hdmi_init_pm_clock); +#define FSIACK_DUMMY_RATE 48000 +static int __init fsi_init_pm_clock(void) +{ + struct clk *fsia_ick; + int ret; + + /* + * FSIACK is connected to AK4642, + * and the rate is depend on playing sound rate. + * So, set dummy rate (= 48k) here + */ + ret = clk_set_rate(&sh7372_fsiack_clk, FSIACK_DUMMY_RATE); + if (ret < 0) { + pr_err("Cannot set FSIACK dummy rate: %d\n", ret); + return ret; + } + + fsia_ick = clk_get(&fsi_device.dev, "icka"); + if (IS_ERR(fsia_ick)) { + ret = PTR_ERR(fsia_ick); + pr_err("Cannot get FSI ICK: %d\n", ret); + return ret; + } + + ret = clk_set_parent(fsia_ick, &sh7372_fsiack_clk); + if (ret < 0) { + pr_err("Cannot set FSI-A parent: %d\n", ret); + goto out; + } + + ret = clk_set_rate(fsia_ick, FSIACK_DUMMY_RATE); + if (ret < 0) + pr_err("Cannot set FSI-A rate: %d\n", ret); + +out: + clk_put(fsia_ick); + + return ret; +} +device_initcall(fsi_init_pm_clock); + /* * FIXME !! * * gpio_no_direction - * gpio_pull_up * are quick_hack. * * current gpio frame work doesn't have @@ -768,49 +952,37 @@ static void __init gpio_no_direction(u32 addr) __raw_writeb(0x00, addr); } -static void __init gpio_pull_up(u32 addr) -{ - u8 data = __raw_readb(addr); - - data &= 0x0F; - data |= 0xC0; - __raw_writeb(data, addr); -} - /* TouchScreen */ +#ifdef CONFIG_AP4EVB_QHD +# define GPIO_TSC_IRQ GPIO_FN_IRQ28_123 +# define GPIO_TSC_PORT GPIO_PORT123 +#else /* WVGA */ +# define GPIO_TSC_IRQ GPIO_FN_IRQ7_40 +# define GPIO_TSC_PORT GPIO_PORT40 +#endif + #define IRQ28 evt2irq(0x3380) /* IRQ28A */ #define IRQ7 evt2irq(0x02e0) /* IRQ7A */ static int ts_get_pendown_state(void) { - int val1, val2; + int val; - gpio_free(GPIO_FN_IRQ28_123); - gpio_free(GPIO_FN_IRQ7_40); + gpio_free(GPIO_TSC_IRQ); - gpio_request(GPIO_PORT123, NULL); - gpio_request(GPIO_PORT40, NULL); + gpio_request(GPIO_TSC_PORT, NULL); - gpio_direction_input(GPIO_PORT123); - gpio_direction_input(GPIO_PORT40); + gpio_direction_input(GPIO_TSC_PORT); - val1 = gpio_get_value(GPIO_PORT123); - val2 = gpio_get_value(GPIO_PORT40); + val = gpio_get_value(GPIO_TSC_PORT); - gpio_request(GPIO_FN_IRQ28_123, NULL); /* for QHD */ - gpio_request(GPIO_FN_IRQ7_40, NULL); /* for WVGA */ + gpio_request(GPIO_TSC_IRQ, NULL); - return val1 ^ val2; + return !val; } -#define PORT40CR 0xE6051028 -#define PORT123CR 0xE605007B static int ts_init(void) { - gpio_request(GPIO_FN_IRQ28_123, NULL); /* for QHD */ - gpio_request(GPIO_FN_IRQ7_40, NULL); /* for WVGA */ - - gpio_pull_up(PORT40CR); - gpio_pull_up(PORT123CR); + gpio_request(GPIO_TSC_IRQ, NULL); return 0; } @@ -865,6 +1037,7 @@ static void __init ap4evb_map_io(void) #define GPIO_PORT9CR 0xE6051009 #define GPIO_PORT10CR 0xE605100A +#define USCCR1 0xE6058144 static void __init ap4evb_init(void) { u32 srcr4; @@ -935,7 +1108,7 @@ static void __init ap4evb_init(void) /* setup USB phy */ __raw_writew(0x8a0a, 0xE6058130); /* USBCR2 */ - /* enable FSI2 */ + /* enable FSI2 port A (ak4643) */ gpio_request(GPIO_FN_FSIAIBT, NULL); gpio_request(GPIO_FN_FSIAILR, NULL); gpio_request(GPIO_FN_FSIAISLD, NULL); @@ -948,6 +1121,14 @@ static void __init ap4evb_init(void) gpio_no_direction(GPIO_PORT9CR); /* FSIAOBT needs no direction */ gpio_no_direction(GPIO_PORT10CR); /* FSIAOLR needs no direction */ + /* card detect pin for MMC slot (CN7) */ + gpio_request(GPIO_PORT41, NULL); + gpio_direction_input(GPIO_PORT41); + + /* setup FSI2 port B (HDMI) */ + gpio_request(GPIO_FN_FSIBCK, NULL); + __raw_writew(__raw_readw(USCCR1) & ~(1 << 6), USCCR1); /* use SPDIF */ + /* set SPU2 clock to 119.6 MHz */ clk = clk_get(NULL, "spu_clk"); if (!IS_ERR(clk)) { @@ -955,14 +1136,6 @@ static void __init ap4evb_init(void) clk_put(clk); } - /* change parent of FSI A */ - clk = clk_get(NULL, "fsia_clk"); - if (!IS_ERR(clk)) { - clk_register(&fsiackcr_clk); - clk_set_parent(clk, &fsiackcr_clk); - clk_put(clk); - } - /* * set irq priority, to avoid sound chopping * when NFS rootfs is used @@ -977,8 +1150,10 @@ static void __init ap4evb_init(void) ARRAY_SIZE(i2c1_devices)); #ifdef CONFIG_AP4EVB_QHD + /* - * QHD + * For QHD Panel (MIPI-DSI, CONFIG_AP4EVB_QHD=y) and + * IRQ28 for Touch Panel, set dip switches S3, S43 as OFF, ON. */ /* enable KEYSC */ @@ -1004,17 +1179,6 @@ static void __init ap4evb_init(void) lcdc_info.ch[0].interface_type = RGB24; lcdc_info.ch[0].clock_divider = 1; lcdc_info.ch[0].flags = LCDC_FLAGS_DWPOL; - lcdc_info.ch[0].lcd_cfg.name = "R63302(QHD)"; - lcdc_info.ch[0].lcd_cfg.xres = 544; - lcdc_info.ch[0].lcd_cfg.yres = 961; - lcdc_info.ch[0].lcd_cfg.left_margin = 72; - lcdc_info.ch[0].lcd_cfg.right_margin = 600; - lcdc_info.ch[0].lcd_cfg.hsync_len = 16; - lcdc_info.ch[0].lcd_cfg.upper_margin = 8; - lcdc_info.ch[0].lcd_cfg.lower_margin = 8; - lcdc_info.ch[0].lcd_cfg.vsync_len = 2; - lcdc_info.ch[0].lcd_cfg.sync = FB_SYNC_VERT_HIGH_ACT | - FB_SYNC_HOR_HIGH_ACT; lcdc_info.ch[0].lcd_size_cfg.width = 44; lcdc_info.ch[0].lcd_size_cfg.height = 79; @@ -1022,8 +1186,10 @@ static void __init ap4evb_init(void) #else /* - * WVGA + * For WVGA Panel (18-bit RGB, CONFIG_AP4EVB_WVGA=y) and + * IRQ7 for Touch Panel, set dip switches S3, S43 to ON, OFF. */ + gpio_request(GPIO_FN_LCDD17, NULL); gpio_request(GPIO_FN_LCDD16, NULL); gpio_request(GPIO_FN_LCDD15, NULL); @@ -1055,16 +1221,6 @@ static void __init ap4evb_init(void) lcdc_info.ch[0].interface_type = RGB18; lcdc_info.ch[0].clock_divider = 2; lcdc_info.ch[0].flags = 0; - lcdc_info.ch[0].lcd_cfg.name = "WVGA Panel"; - lcdc_info.ch[0].lcd_cfg.xres = 800; - lcdc_info.ch[0].lcd_cfg.yres = 480; - lcdc_info.ch[0].lcd_cfg.left_margin = 220; - lcdc_info.ch[0].lcd_cfg.right_margin = 110; - lcdc_info.ch[0].lcd_cfg.hsync_len = 70; - lcdc_info.ch[0].lcd_cfg.upper_margin = 20; - lcdc_info.ch[0].lcd_cfg.lower_margin = 5; - lcdc_info.ch[0].lcd_cfg.vsync_len = 5; - lcdc_info.ch[0].lcd_cfg.sync = 0; lcdc_info.ch[0].lcd_size_cfg.width = 152; lcdc_info.ch[0].lcd_size_cfg.height = 91; @@ -1075,6 +1231,23 @@ static void __init ap4evb_init(void) i2c_register_board_info(0, &tsc_device, 1); #endif /* CONFIG_AP4EVB_QHD */ + /* CEU */ + + /* + * TODO: reserve memory for V4L2 DMA buffers, when a suitable API + * becomes available + */ + + /* MIPI-CSI stuff */ + gpio_request(GPIO_FN_VIO_CKO, NULL); + + clk = clk_get(NULL, "vck1_clk"); + if (!IS_ERR(clk)) { + clk_set_rate(clk, clk_round_rate(clk, 13000000)); + clk_enable(clk); + clk_put(clk); + } + sh7372_add_standard_devices(); /* HDMI */ @@ -1097,7 +1270,7 @@ static void __init ap4evb_timer_init(void) shmobile_timer.init(); /* External clock source */ - clk_set_rate(&dv_clki_clk, 27000000); + clk_set_rate(&sh7372_dv_clki_clk, 27000000); } static struct sys_timer ap4evb_timer = { diff --git a/arch/arm/mach-shmobile/clock-sh7367.c b/arch/arm/mach-shmobile/clock-sh7367.c index b6454c9..9f78729 100644 --- a/arch/arm/mach-shmobile/clock-sh7367.c +++ b/arch/arm/mach-shmobile/clock-sh7367.c @@ -321,7 +321,7 @@ static struct clk_lookup lookups[] = { CLKDEV_DEV_ID("sh-sci.3", &mstp_clks[SYMSTP001]), /* SCIFA3 */ CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[SYMSTP000]), /* SCIFA4 */ CLKDEV_DEV_ID("sh_siu", &mstp_clks[SYMSTP231]), /* SIU */ - CLKDEV_CON_ID("cmt1", &mstp_clks[SYMSTP229]), /* CMT10 */ + CLKDEV_DEV_ID("sh_cmt.10", &mstp_clks[SYMSTP229]), /* CMT10 */ CLKDEV_DEV_ID("sh_irda", &mstp_clks[SYMSTP225]), /* IRDA */ CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[SYMSTP223]), /* IIC1 */ CLKDEV_DEV_ID("r8a66597_hcd.0", &mstp_clks[SYMSTP222]), /* USBHS */ diff --git a/arch/arm/mach-shmobile/clock-sh7372.c b/arch/arm/mach-shmobile/clock-sh7372.c index 7594689..7db31e6 100644 --- a/arch/arm/mach-shmobile/clock-sh7372.c +++ b/arch/arm/mach-shmobile/clock-sh7372.c @@ -50,8 +50,11 @@ #define SMSTPCR3 0xe615013c #define SMSTPCR4 0xe6150140 +#define FSIDIVA 0xFE1F8000 +#define FSIDIVB 0xFE1F8008 + /* Platforms must set frequency on their DV_CLKI pin */ -struct clk dv_clki_clk = { +struct clk sh7372_dv_clki_clk = { }; /* Fixed 32 KHz root clock from EXTALR pin */ @@ -86,9 +89,9 @@ static struct clk_ops div2_clk_ops = { }; /* Divide dv_clki by two */ -struct clk dv_clki_div2_clk = { +struct clk sh7372_dv_clki_div2_clk = { .ops = &div2_clk_ops, - .parent = &dv_clki_clk, + .parent = &sh7372_dv_clki_clk, }; /* Divide extal1 by two */ @@ -150,7 +153,7 @@ static struct clk pllc1_div2_clk = { static struct clk *pllc2_parent[] = { [0] = &extal1_div2_clk, [1] = &extal2_div2_clk, - [2] = &dv_clki_div2_clk, + [2] = &sh7372_dv_clki_div2_clk, }; /* Only multipliers 20 * 2 to 46 * 2 are valid, last entry for CPUFREQ_TABLE_END */ @@ -284,27 +287,37 @@ static struct clk_ops pllc2_clk_ops = { .set_parent = pllc2_set_parent, }; -struct clk pllc2_clk = { +struct clk sh7372_pllc2_clk = { .ops = &pllc2_clk_ops, .parent = &extal1_div2_clk, .freq_table = pllc2_freq_table, + .nr_freqs = ARRAY_SIZE(pllc2_freq_table) - 1, .parent_table = pllc2_parent, .parent_num = ARRAY_SIZE(pllc2_parent), }; +/* External input clock (pin name: FSIACK/FSIBCK ) */ +struct clk sh7372_fsiack_clk = { +}; + +struct clk sh7372_fsibck_clk = { +}; + static struct clk *main_clks[] = { - &dv_clki_clk, + &sh7372_dv_clki_clk, &r_clk, &sh7372_extal1_clk, &sh7372_extal2_clk, - &dv_clki_div2_clk, + &sh7372_dv_clki_div2_clk, &extal1_div2_clk, &extal2_div2_clk, &extal2_div4_clk, &pllc0_clk, &pllc1_clk, &pllc1_div2_clk, - &pllc2_clk, + &sh7372_pllc2_clk, + &sh7372_fsiack_clk, + &sh7372_fsibck_clk, }; static void div4_kick(struct clk *clk) @@ -357,7 +370,7 @@ static struct clk div4_clks[DIV4_NR] = { }; enum { DIV6_VCK1, DIV6_VCK2, DIV6_VCK3, DIV6_FMSI, DIV6_FMSO, - DIV6_FSIA, DIV6_FSIB, DIV6_SUB, DIV6_SPU, + DIV6_SUB, DIV6_SPU, DIV6_VOU, DIV6_DSIT, DIV6_DSI0P, DIV6_DSI1P, DIV6_NR }; @@ -367,8 +380,6 @@ static struct clk div6_clks[DIV6_NR] = { [DIV6_VCK3] = SH_CLK_DIV6(&pllc1_div2_clk, VCLKCR3, 0), [DIV6_FMSI] = SH_CLK_DIV6(&pllc1_div2_clk, FMSICKCR, 0), [DIV6_FMSO] = SH_CLK_DIV6(&pllc1_div2_clk, FMSOCKCR, 0), - [DIV6_FSIA] = SH_CLK_DIV6(&pllc1_div2_clk, FSIACKCR, 0), - [DIV6_FSIB] = SH_CLK_DIV6(&pllc1_div2_clk, FSIBCKCR, 0), [DIV6_SUB] = SH_CLK_DIV6(&sh7372_extal2_clk, SUBCKCR, 0), [DIV6_SPU] = SH_CLK_DIV6(&pllc1_div2_clk, SPUCKCR, 0), [DIV6_VOU] = SH_CLK_DIV6(&pllc1_div2_clk, VOUCKCR, 0), @@ -377,24 +388,137 @@ static struct clk div6_clks[DIV6_NR] = { [DIV6_DSI1P] = SH_CLK_DIV6(&pllc1_div2_clk, DSI1PCKCR, 0), }; -enum { DIV6_HDMI, DIV6_REPARENT_NR }; +enum { DIV6_HDMI, DIV6_FSIA, DIV6_FSIB, DIV6_REPARENT_NR }; /* Indices are important - they are the actual src selecting values */ static struct clk *hdmi_parent[] = { [0] = &pllc1_div2_clk, - [1] = &pllc2_clk, - [2] = &dv_clki_clk, + [1] = &sh7372_pllc2_clk, + [2] = &sh7372_dv_clki_clk, [3] = NULL, /* pllc2_div4 not implemented yet */ }; +static struct clk *fsiackcr_parent[] = { + [0] = &pllc1_div2_clk, + [1] = &sh7372_pllc2_clk, + [2] = &sh7372_fsiack_clk, /* external input for FSI A */ + [3] = NULL, /* setting prohibited */ +}; + +static struct clk *fsibckcr_parent[] = { + [0] = &pllc1_div2_clk, + [1] = &sh7372_pllc2_clk, + [2] = &sh7372_fsibck_clk, /* external input for FSI B */ + [3] = NULL, /* setting prohibited */ +}; + static struct clk div6_reparent_clks[DIV6_REPARENT_NR] = { [DIV6_HDMI] = SH_CLK_DIV6_EXT(&pllc1_div2_clk, HDMICKCR, 0, hdmi_parent, ARRAY_SIZE(hdmi_parent), 6, 2), + [DIV6_FSIA] = SH_CLK_DIV6_EXT(&pllc1_div2_clk, FSIACKCR, 0, + fsiackcr_parent, ARRAY_SIZE(fsiackcr_parent), 6, 2), + [DIV6_FSIB] = SH_CLK_DIV6_EXT(&pllc1_div2_clk, FSIBCKCR, 0, + fsibckcr_parent, ARRAY_SIZE(fsibckcr_parent), 6, 2), +}; + +/* FSI DIV */ +static unsigned long fsidiv_recalc(struct clk *clk) +{ + unsigned long value; + + value = __raw_readl(clk->mapping->base); + + if ((value & 0x3) != 0x3) + return 0; + + value >>= 16; + if (value < 2) + return 0; + + return clk->parent->rate / value; +} + +static long fsidiv_round_rate(struct clk *clk, unsigned long rate) +{ + return clk_rate_div_range_round(clk, 2, 0xffff, rate); +} + +static void fsidiv_disable(struct clk *clk) +{ + __raw_writel(0, clk->mapping->base); +} + +static int fsidiv_enable(struct clk *clk) +{ + unsigned long value; + + value = __raw_readl(clk->mapping->base) >> 16; + if (value < 2) { + fsidiv_disable(clk); + return -ENOENT; + } + + __raw_writel((value << 16) | 0x3, clk->mapping->base); + + return 0; +} + +static int fsidiv_set_rate(struct clk *clk, + unsigned long rate, int algo_id) +{ + int idx; + + if (clk->parent->rate == rate) { + fsidiv_disable(clk); + return 0; + } + + idx = (clk->parent->rate / rate) & 0xffff; + if (idx < 2) + return -ENOENT; + + __raw_writel(idx << 16, clk->mapping->base); + return fsidiv_enable(clk); +} + +static struct clk_ops fsidiv_clk_ops = { + .recalc = fsidiv_recalc, + .round_rate = fsidiv_round_rate, + .set_rate = fsidiv_set_rate, + .enable = fsidiv_enable, + .disable = fsidiv_disable, +}; + +static struct clk_mapping sh7372_fsidiva_clk_mapping = { + .phys = FSIDIVA, + .len = 8, +}; + +struct clk sh7372_fsidiva_clk = { + .ops = &fsidiv_clk_ops, + .parent = &div6_reparent_clks[DIV6_FSIA], /* late install */ + .mapping = &sh7372_fsidiva_clk_mapping, +}; + +static struct clk_mapping sh7372_fsidivb_clk_mapping = { + .phys = FSIDIVB, + .len = 8, +}; + +struct clk sh7372_fsidivb_clk = { + .ops = &fsidiv_clk_ops, + .parent = &div6_reparent_clks[DIV6_FSIB], /* late install */ + .mapping = &sh7372_fsidivb_clk_mapping, +}; + +static struct clk *late_main_clks[] = { + &sh7372_fsidiva_clk, + &sh7372_fsidivb_clk, }; enum { MSTP001, MSTP131, MSTP130, - MSTP129, MSTP128, MSTP127, MSTP126, + MSTP129, MSTP128, MSTP127, MSTP126, MSTP125, MSTP118, MSTP117, MSTP116, MSTP106, MSTP101, MSTP100, MSTP223, @@ -414,6 +538,7 @@ static struct clk mstp_clks[MSTP_NR] = { [MSTP128] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 28, 0), /* VEU0 */ [MSTP127] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 27, 0), /* CEU */ [MSTP126] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 26, 0), /* CSI2 */ + [MSTP125] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR1, 25, 0), /* TMU0 */ [MSTP118] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 18, 0), /* DSITX */ [MSTP117] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 17, 0), /* LCDC1 */ [MSTP116] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR1, 16, 0), /* IIC0 */ @@ -429,7 +554,7 @@ static struct clk mstp_clks[MSTP_NR] = { [MSTP201] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 1, 0), /* SCIFA3 */ [MSTP200] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 0, 0), /* SCIFA4 */ [MSTP329] = MSTP(&r_clk, SMSTPCR3, 29, 0), /* CMT10 */ - [MSTP328] = MSTP(&div6_clks[DIV6_SPU], SMSTPCR3, 28, 0), /* FSIA */ + [MSTP328] = MSTP(&div6_clks[DIV6_SPU], SMSTPCR3, 28, 0), /* FSI2 */ [MSTP323] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 23, 0), /* IIC1 */ [MSTP322] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 22, 0), /* USB0 */ [MSTP314] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 14, 0), /* SDHI0 */ @@ -445,10 +570,11 @@ static struct clk mstp_clks[MSTP_NR] = { #define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk } #define CLKDEV_DEV_ID(_id, _clk) { .dev_id = _id, .clk = _clk } +#define CLKDEV_ICK_ID(_cid, _did, _clk) { .con_id = _cid, .dev_id = _did, .clk = _clk } static struct clk_lookup lookups[] = { /* main clocks */ - CLKDEV_CON_ID("dv_clki_div2_clk", &dv_clki_div2_clk), + CLKDEV_CON_ID("dv_clki_div2_clk", &sh7372_dv_clki_div2_clk), CLKDEV_CON_ID("r_clk", &r_clk), CLKDEV_CON_ID("extal1", &sh7372_extal1_clk), CLKDEV_CON_ID("extal2", &sh7372_extal2_clk), @@ -458,7 +584,7 @@ static struct clk_lookup lookups[] = { CLKDEV_CON_ID("pllc0_clk", &pllc0_clk), CLKDEV_CON_ID("pllc1_clk", &pllc1_clk), CLKDEV_CON_ID("pllc1_div2_clk", &pllc1_div2_clk), - CLKDEV_CON_ID("pllc2_clk", &pllc2_clk), + CLKDEV_CON_ID("pllc2_clk", &sh7372_pllc2_clk), /* DIV4 clocks */ CLKDEV_CON_ID("i_clk", &div4_clks[DIV4_I]), @@ -483,8 +609,8 @@ static struct clk_lookup lookups[] = { CLKDEV_CON_ID("vck3_clk", &div6_clks[DIV6_VCK3]), CLKDEV_CON_ID("fmsi_clk", &div6_clks[DIV6_FMSI]), CLKDEV_CON_ID("fmso_clk", &div6_clks[DIV6_FMSO]), - CLKDEV_CON_ID("fsia_clk", &div6_clks[DIV6_FSIA]), - CLKDEV_CON_ID("fsib_clk", &div6_clks[DIV6_FSIB]), + CLKDEV_CON_ID("fsia_clk", &div6_reparent_clks[DIV6_FSIA]), + CLKDEV_CON_ID("fsib_clk", &div6_reparent_clks[DIV6_FSIB]), CLKDEV_CON_ID("sub_clk", &div6_clks[DIV6_SUB]), CLKDEV_CON_ID("spu_clk", &div6_clks[DIV6_SPU]), CLKDEV_CON_ID("vou_clk", &div6_clks[DIV6_VOU]), @@ -501,6 +627,8 @@ static struct clk_lookup lookups[] = { CLKDEV_DEV_ID("uio_pdrv_genirq.1", &mstp_clks[MSTP128]), /* VEU0 */ CLKDEV_DEV_ID("sh_mobile_ceu.0", &mstp_clks[MSTP127]), /* CEU */ CLKDEV_DEV_ID("sh-mobile-csi2.0", &mstp_clks[MSTP126]), /* CSI2 */ + CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP125]), /* TMU00 */ + CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP125]), /* TMU01 */ CLKDEV_DEV_ID("sh-mipi-dsi.0", &mstp_clks[MSTP118]), /* DSITX */ CLKDEV_DEV_ID("sh_mobile_lcdc_fb.1", &mstp_clks[MSTP117]), /* LCDC1 */ CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP116]), /* IIC0 */ @@ -516,7 +644,7 @@ static struct clk_lookup lookups[] = { CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP202]), /* SCIFA2 */ CLKDEV_DEV_ID("sh-sci.3", &mstp_clks[MSTP201]), /* SCIFA3 */ CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP200]), /* SCIFA4 */ - CLKDEV_CON_ID("cmt1", &mstp_clks[MSTP329]), /* CMT10 */ + CLKDEV_DEV_ID("sh_cmt.10", &mstp_clks[MSTP329]), /* CMT10 */ CLKDEV_DEV_ID("sh_fsi2", &mstp_clks[MSTP328]), /* FSI2 */ CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[MSTP323]), /* IIC1 */ CLKDEV_DEV_ID("r8a66597_hcd.0", &mstp_clks[MSTP323]), /* USB0 */ @@ -531,7 +659,10 @@ static struct clk_lookup lookups[] = { CLKDEV_DEV_ID("r8a66597_hcd.1", &mstp_clks[MSTP406]), /* USB1 */ CLKDEV_DEV_ID("r8a66597_udc.1", &mstp_clks[MSTP406]), /* USB1 */ CLKDEV_DEV_ID("sh_keysc.0", &mstp_clks[MSTP403]), /* KEYSC */ - {.con_id = "ick", .dev_id = "sh-mobile-hdmi", .clk = &div6_reparent_clks[DIV6_HDMI]}, + + CLKDEV_ICK_ID("ick", "sh-mobile-hdmi", &div6_reparent_clks[DIV6_HDMI]), + CLKDEV_ICK_ID("icka", "sh_fsi2", &div6_reparent_clks[DIV6_FSIA]), + CLKDEV_ICK_ID("ickb", "sh_fsi2", &div6_reparent_clks[DIV6_FSIB]), }; void __init sh7372_clock_init(void) @@ -548,11 +679,14 @@ void __init sh7372_clock_init(void) ret = sh_clk_div6_register(div6_clks, DIV6_NR); if (!ret) - ret = sh_clk_div6_reparent_register(div6_reparent_clks, DIV6_NR); + ret = sh_clk_div6_reparent_register(div6_reparent_clks, DIV6_REPARENT_NR); if (!ret) ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR); + for (k = 0; !ret && (k < ARRAY_SIZE(late_main_clks)); k++) + ret = clk_register(late_main_clks[k]); + clkdev_add_table(lookups, ARRAY_SIZE(lookups)); if (!ret) diff --git a/arch/arm/mach-shmobile/clock-sh7377.c b/arch/arm/mach-shmobile/clock-sh7377.c index e007c28..f91395a 100644 --- a/arch/arm/mach-shmobile/clock-sh7377.c +++ b/arch/arm/mach-shmobile/clock-sh7377.c @@ -333,7 +333,7 @@ static struct clk_lookup lookups[] = { CLKDEV_DEV_ID("sh-sci.3", &mstp_clks[MSTP201]), /* SCIFA3 */ CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP200]), /* SCIFA4 */ CLKDEV_DEV_ID("sh-sci.6", &mstp_clks[MSTP331]), /* SCIFA6 */ - CLKDEV_CON_ID("cmt1", &mstp_clks[MSTP329]), /* CMT10 */ + CLKDEV_DEV_ID("sh_cmt.10", &mstp_clks[MSTP329]), /* CMT10 */ CLKDEV_DEV_ID("sh_irda", &mstp_clks[MSTP325]), /* IRDA */ CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[MSTP323]), /* IIC1 */ CLKDEV_DEV_ID("r8a66597_hcd.0", &mstp_clks[MSTP322]), /* USBHS */ diff --git a/arch/arm/mach-shmobile/include/mach/gpio.h b/arch/arm/mach-shmobile/include/mach/gpio.h index 5bc6bd4..2b1bb9e 100644 --- a/arch/arm/mach-shmobile/include/mach/gpio.h +++ b/arch/arm/mach-shmobile/include/mach/gpio.h @@ -35,12 +35,12 @@ static inline int gpio_cansleep(unsigned gpio) static inline int gpio_to_irq(unsigned gpio) { - return -ENOSYS; + return __gpio_to_irq(gpio); } static inline int irq_to_gpio(unsigned int irq) { - return -EINVAL; + return -ENOSYS; } #endif /* CONFIG_GPIOLIB */ diff --git a/arch/arm/mach-shmobile/include/mach/sh7372.h b/arch/arm/mach-shmobile/include/mach/sh7372.h index 33e9700..e4f9004 100644 --- a/arch/arm/mach-shmobile/include/mach/sh7372.h +++ b/arch/arm/mach-shmobile/include/mach/sh7372.h @@ -457,8 +457,14 @@ enum { SHDMA_SLAVE_SDHI2_TX, }; -extern struct clk dv_clki_clk; -extern struct clk dv_clki_div2_clk; -extern struct clk pllc2_clk; +extern struct clk sh7372_extal1_clk; +extern struct clk sh7372_extal2_clk; +extern struct clk sh7372_dv_clki_clk; +extern struct clk sh7372_dv_clki_div2_clk; +extern struct clk sh7372_pllc2_clk; +extern struct clk sh7372_fsiack_clk; +extern struct clk sh7372_fsibck_clk; +extern struct clk sh7372_fsidiva_clk; +extern struct clk sh7372_fsidivb_clk; #endif /* __ASM_SH7372_H__ */ diff --git a/arch/arm/mach-shmobile/intc-sh7372.c b/arch/arm/mach-shmobile/intc-sh7372.c index e3551b5..30b2f40 100644 --- a/arch/arm/mach-shmobile/intc-sh7372.c +++ b/arch/arm/mach-shmobile/intc-sh7372.c @@ -98,7 +98,7 @@ static struct intc_vect intca_vectors[] __initdata = { INTC_VECT(IRQ14A, 0x03c0), INTC_VECT(IRQ15A, 0x03e0), INTC_VECT(IRQ16A, 0x3200), INTC_VECT(IRQ17A, 0x3220), INTC_VECT(IRQ18A, 0x3240), INTC_VECT(IRQ19A, 0x3260), - INTC_VECT(IRQ20A, 0x3280), INTC_VECT(IRQ31A, 0x32a0), + INTC_VECT(IRQ20A, 0x3280), INTC_VECT(IRQ21A, 0x32a0), INTC_VECT(IRQ22A, 0x32c0), INTC_VECT(IRQ23A, 0x32e0), INTC_VECT(IRQ24A, 0x3300), INTC_VECT(IRQ25A, 0x3320), INTC_VECT(IRQ26A, 0x3340), INTC_VECT(IRQ27A, 0x3360), @@ -369,9 +369,13 @@ enum { INTCS, /* interrupt sources INTCS */ + + /* IRQ0S - IRQ31S */ VEU_VEU0, VEU_VEU1, VEU_VEU2, VEU_VEU3, RTDMAC_1_DEI0, RTDMAC_1_DEI1, RTDMAC_1_DEI2, RTDMAC_1_DEI3, CEU, BEU_BEU0, BEU_BEU1, BEU_BEU2, + /* MFI */ + /* BBIF2 */ VPU, TSIF1, _3DG_SGX530, @@ -379,13 +383,17 @@ enum { IIC2_ALI2, IIC2_TACKI2, IIC2_WAITI2, IIC2_DTEI2, IPMMU_IPMMUR, IPMMU_IPMMUR2, RTDMAC_2_DEI4, RTDMAC_2_DEI5, RTDMAC_2_DADERR, + /* KEYSC */ + /* TTI20 */ MSIOF, IIC0_ALI0, IIC0_TACKI0, IIC0_WAITI0, IIC0_DTEI0, TMU_TUNI0, TMU_TUNI1, TMU_TUNI2, CMT0, TSIF0, + /* CMT2 */ LMB, CTI, + /* RWDT0 */ ICB, JPU_JPEG, LCDC, @@ -397,11 +405,17 @@ enum { CSIRX, DSITX_DSITX0, DSITX_DSITX1, + /* SPU2 */ + /* FSI */ + /* FMSI */ + /* HDMI */ TMU1_TUNI0, TMU1_TUNI1, TMU1_TUNI2, CMT4, DSITX1_DSITX1_0, DSITX1_DSITX1_1, + /* MFIS2 */ CPORTS2R, + /* CEC */ JPU6E, /* interrupt groups INTCS */ @@ -410,12 +424,15 @@ enum { }; static struct intc_vect intcs_vectors[] = { + /* IRQ0S - IRQ31S */ INTCS_VECT(VEU_VEU0, 0x700), INTCS_VECT(VEU_VEU1, 0x720), INTCS_VECT(VEU_VEU2, 0x740), INTCS_VECT(VEU_VEU3, 0x760), INTCS_VECT(RTDMAC_1_DEI0, 0x800), INTCS_VECT(RTDMAC_1_DEI1, 0x820), INTCS_VECT(RTDMAC_1_DEI2, 0x840), INTCS_VECT(RTDMAC_1_DEI3, 0x860), INTCS_VECT(CEU, 0x880), INTCS_VECT(BEU_BEU0, 0x8a0), INTCS_VECT(BEU_BEU1, 0x8c0), INTCS_VECT(BEU_BEU2, 0x8e0), + /* MFI */ + /* BBIF2 */ INTCS_VECT(VPU, 0x980), INTCS_VECT(TSIF1, 0x9a0), INTCS_VECT(_3DG_SGX530, 0x9e0), @@ -425,14 +442,19 @@ static struct intc_vect intcs_vectors[] = { INTCS_VECT(IPMMU_IPMMUR, 0xb00), INTCS_VECT(IPMMU_IPMMUR2, 0xb20), INTCS_VECT(RTDMAC_2_DEI4, 0xb80), INTCS_VECT(RTDMAC_2_DEI5, 0xba0), INTCS_VECT(RTDMAC_2_DADERR, 0xbc0), + /* KEYSC */ + /* TTI20 */ + INTCS_VECT(MSIOF, 0x0d20), INTCS_VECT(IIC0_ALI0, 0xe00), INTCS_VECT(IIC0_TACKI0, 0xe20), INTCS_VECT(IIC0_WAITI0, 0xe40), INTCS_VECT(IIC0_DTEI0, 0xe60), INTCS_VECT(TMU_TUNI0, 0xe80), INTCS_VECT(TMU_TUNI1, 0xea0), INTCS_VECT(TMU_TUNI2, 0xec0), INTCS_VECT(CMT0, 0xf00), INTCS_VECT(TSIF0, 0xf20), + /* CMT2 */ INTCS_VECT(LMB, 0xf60), INTCS_VECT(CTI, 0x400), + /* RWDT0 */ INTCS_VECT(ICB, 0x480), INTCS_VECT(JPU_JPEG, 0x560), INTCS_VECT(LCDC, 0x580), @@ -446,12 +468,18 @@ static struct intc_vect intcs_vectors[] = { INTCS_VECT(CSIRX, 0x17a0), INTCS_VECT(DSITX_DSITX0, 0x17c0), INTCS_VECT(DSITX_DSITX1, 0x17e0), + /* SPU2 */ + /* FSI */ + /* FMSI */ + /* HDMI */ INTCS_VECT(TMU1_TUNI0, 0x1900), INTCS_VECT(TMU1_TUNI1, 0x1920), INTCS_VECT(TMU1_TUNI2, 0x1940), INTCS_VECT(CMT4, 0x1980), INTCS_VECT(DSITX1_DSITX1_0, 0x19a0), INTCS_VECT(DSITX1_DSITX1_1, 0x19c0), + /* MFIS2 */ INTCS_VECT(CPORTS2R, 0x1a20), + /* CEC */ INTCS_VECT(JPU6E, 0x1a80), INTC_VECT(INTCS, 0xf80), diff --git a/arch/arm/mach-shmobile/pfc-sh7372.c b/arch/arm/mach-shmobile/pfc-sh7372.c index ec42035..9c265da 100644 --- a/arch/arm/mach-shmobile/pfc-sh7372.c +++ b/arch/arm/mach-shmobile/pfc-sh7372.c @@ -166,12 +166,12 @@ enum { MSIOF2_TSYNC_MARK, MSIOF2_TSCK_MARK, MSIOF2_RXD_MARK, MSIOF2_TXD_MARK, - /* MSIOF3 */ + /* BBIF1 */ BBIF1_RXD_MARK, BBIF1_TSYNC_MARK, BBIF1_TSCK_MARK, BBIF1_TXD_MARK, BBIF1_RSCK_MARK, BBIF1_RSYNC_MARK, BBIF1_FLOW_MARK, BB_RX_FLOW_N_MARK, - /* MSIOF4 */ + /* BBIF2 */ BBIF2_TSCK1_MARK, BBIF2_TSYNC1_MARK, BBIF2_TXD1_MARK, BBIF2_RXD_MARK, @@ -976,12 +976,12 @@ static struct pinmux_gpio pinmux_gpios[] = { GPIO_FN(MSIOF2_TSYNC), GPIO_FN(MSIOF2_TSCK), GPIO_FN(MSIOF2_RXD), GPIO_FN(MSIOF2_TXD), - /* MSIOF3 */ + /* BBIF1 */ GPIO_FN(BBIF1_RXD), GPIO_FN(BBIF1_TSYNC), GPIO_FN(BBIF1_TSCK), GPIO_FN(BBIF1_TXD), GPIO_FN(BBIF1_RSCK), GPIO_FN(BBIF1_RSYNC), GPIO_FN(BBIF1_FLOW), GPIO_FN(BB_RX_FLOW_N), - /* MSIOF4 */ + /* BBIF2 */ GPIO_FN(BBIF2_TSCK1), GPIO_FN(BBIF2_TSYNC1), GPIO_FN(BBIF2_TXD1), GPIO_FN(BBIF2_RXD), diff --git a/arch/arm/mach-shmobile/setup-sh7367.c b/arch/arm/mach-shmobile/setup-sh7367.c index 3148c11..003008c 100644 --- a/arch/arm/mach-shmobile/setup-sh7367.c +++ b/arch/arm/mach-shmobile/setup-sh7367.c @@ -154,7 +154,6 @@ static struct sh_timer_config cmt10_platform_data = { .name = "CMT10", .channel_offset = 0x10, .timer_bit = 0, - .clk = "r_clk", .clockevent_rating = 125, .clocksource_rating = 125, }; diff --git a/arch/arm/mach-shmobile/setup-sh7372.c b/arch/arm/mach-shmobile/setup-sh7372.c index e26686c..564a6d0 100644 --- a/arch/arm/mach-shmobile/setup-sh7372.c +++ b/arch/arm/mach-shmobile/setup-sh7372.c @@ -158,7 +158,6 @@ static struct sh_timer_config cmt10_platform_data = { .name = "CMT10", .channel_offset = 0x10, .timer_bit = 0, - .clk = "cmt1", .clockevent_rating = 125, .clocksource_rating = 125, }; @@ -186,6 +185,67 @@ static struct platform_device cmt10_device = { .num_resources = ARRAY_SIZE(cmt10_resources), }; +/* TMU */ +static struct sh_timer_config tmu00_platform_data = { + .name = "TMU00", + .channel_offset = 0x4, + .timer_bit = 0, + .clockevent_rating = 200, +}; + +static struct resource tmu00_resources[] = { + [0] = { + .name = "TMU00", + .start = 0xfff60008, + .end = 0xfff60013, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = intcs_evt2irq(0xe80), /* TMU_TUNI0 */ + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device tmu00_device = { + .name = "sh_tmu", + .id = 0, + .dev = { + .platform_data = &tmu00_platform_data, + }, + .resource = tmu00_resources, + .num_resources = ARRAY_SIZE(tmu00_resources), +}; + +static struct sh_timer_config tmu01_platform_data = { + .name = "TMU01", + .channel_offset = 0x10, + .timer_bit = 1, + .clocksource_rating = 200, +}; + +static struct resource tmu01_resources[] = { + [0] = { + .name = "TMU01", + .start = 0xfff60014, + .end = 0xfff6001f, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = intcs_evt2irq(0xea0), /* TMU_TUNI1 */ + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device tmu01_device = { + .name = "sh_tmu", + .id = 1, + .dev = { + .platform_data = &tmu01_platform_data, + }, + .resource = tmu01_resources, + .num_resources = ARRAY_SIZE(tmu01_resources), +}; + /* I2C */ static struct resource iic0_resources[] = { [0] = { @@ -419,14 +479,14 @@ static struct resource sh7372_dmae0_resources[] = { }, { /* DMA error IRQ */ - .start = 246, - .end = 246, + .start = evt2irq(0x20c0), + .end = evt2irq(0x20c0), .flags = IORESOURCE_IRQ, }, { /* IRQ for channels 0-5 */ - .start = 240, - .end = 245, + .start = evt2irq(0x2000), + .end = evt2irq(0x20a0), .flags = IORESOURCE_IRQ, }, }; @@ -447,14 +507,14 @@ static struct resource sh7372_dmae1_resources[] = { }, { /* DMA error IRQ */ - .start = 254, - .end = 254, + .start = evt2irq(0x21c0), + .end = evt2irq(0x21c0), .flags = IORESOURCE_IRQ, }, { /* IRQ for channels 0-5 */ - .start = 248, - .end = 253, + .start = evt2irq(0x2100), + .end = evt2irq(0x21a0), .flags = IORESOURCE_IRQ, }, }; @@ -475,14 +535,14 @@ static struct resource sh7372_dmae2_resources[] = { }, { /* DMA error IRQ */ - .start = 262, - .end = 262, + .start = evt2irq(0x22c0), + .end = evt2irq(0x22c0), .flags = IORESOURCE_IRQ, }, { /* IRQ for channels 0-5 */ - .start = 256, - .end = 261, + .start = evt2irq(0x2200), + .end = evt2irq(0x22a0), .flags = IORESOURCE_IRQ, }, }; @@ -526,6 +586,11 @@ static struct platform_device *sh7372_early_devices[] __initdata = { &scif5_device, &scif6_device, &cmt10_device, + &tmu00_device, + &tmu01_device, +}; + +static struct platform_device *sh7372_late_devices[] __initdata = { &iic0_device, &iic1_device, &dma0_device, @@ -537,6 +602,9 @@ void __init sh7372_add_standard_devices(void) { platform_add_devices(sh7372_early_devices, ARRAY_SIZE(sh7372_early_devices)); + + platform_add_devices(sh7372_late_devices, + ARRAY_SIZE(sh7372_late_devices)); } void __init sh7372_add_early_devices(void) diff --git a/arch/arm/mach-shmobile/setup-sh7377.c b/arch/arm/mach-shmobile/setup-sh7377.c index bb4adf1..575dbd6 100644 --- a/arch/arm/mach-shmobile/setup-sh7377.c +++ b/arch/arm/mach-shmobile/setup-sh7377.c @@ -172,7 +172,6 @@ static struct sh_timer_config cmt10_platform_data = { .name = "CMT10", .channel_offset = 0x10, .timer_bit = 0, - .clk = "r_clk", .clockevent_rating = 125, .clocksource_rating = 125, }; diff --git a/arch/arm/mach-tegra/timer.c b/arch/arm/mach-tegra/timer.c index 2f42021..9057d6f 100644 --- a/arch/arm/mach-tegra/timer.c +++ b/arch/arm/mach-tegra/timer.c @@ -28,7 +28,6 @@ #include <linux/cnt32_to_63.h> #include <asm/mach/time.h> -#include <asm/mach/time.h> #include <asm/localtimer.h> #include <mach/iomap.h> diff --git a/arch/arm/mach-u300/clock.c b/arch/arm/mach-u300/clock.c index 60acf9e..7458fc6 100644 --- a/arch/arm/mach-u300/clock.c +++ b/arch/arm/mach-u300/clock.c @@ -66,7 +66,7 @@ static DEFINE_SPINLOCK(syscon_resetreg_lock); * AMBA bus * | * +- CPU - * +- NANDIF NAND Flash interface + * +- FSMC NANDIF NAND Flash interface * +- SEMI Shared Memory interface * +- ISP Image Signal Processor (U335 only) * +- CDS (U335 only) @@ -726,7 +726,7 @@ static struct clk cpu_clk = { }; static struct clk nandif_clk = { - .name = "NANDIF", + .name = "FSMC", .parent = &amba_clk, .hw_ctrld = false, .reset = true, @@ -1259,7 +1259,7 @@ static struct clk_lookup lookups[] = { /* Connected directly to the AMBA bus */ DEF_LOOKUP("amba", &amba_clk), DEF_LOOKUP("cpu", &cpu_clk), - DEF_LOOKUP("fsmc", &nandif_clk), + DEF_LOOKUP("fsmc-nand", &nandif_clk), DEF_LOOKUP("semi", &semi_clk), #ifdef CONFIG_MACH_U300_BS335 DEF_LOOKUP("isp", &isp_clk), diff --git a/arch/arm/mach-u300/core.c b/arch/arm/mach-u300/core.c index ea41c23..aa53ee2 100644 --- a/arch/arm/mach-u300/core.c +++ b/arch/arm/mach-u300/core.c @@ -21,7 +21,8 @@ #include <linux/gpio.h> #include <linux/clk.h> #include <linux/err.h> -#include <mach/coh901318.h> +#include <linux/mtd/nand.h> +#include <linux/mtd/fsmc.h> #include <asm/types.h> #include <asm/setup.h> @@ -30,6 +31,7 @@ #include <asm/mach/map.h> #include <asm/mach/irq.h> +#include <mach/coh901318.h> #include <mach/hardware.h> #include <mach/syscon.h> #include <mach/dma_channels.h> @@ -285,6 +287,13 @@ static struct resource rtc_resources[] = { */ static struct resource fsmc_resources[] = { { + .name = "nand_data", + .start = U300_NAND_CS0_PHYS_BASE, + .end = U300_NAND_CS0_PHYS_BASE + SZ_16K - 1, + .flags = IORESOURCE_MEM, + }, + { + .name = "fsmc_regs", .start = U300_NAND_IF_PHYS_BASE, .end = U300_NAND_IF_PHYS_BASE + SZ_4K - 1, .flags = IORESOURCE_MEM, @@ -1429,11 +1438,39 @@ static struct platform_device rtc_device = { .resource = rtc_resources, }; -static struct platform_device fsmc_device = { - .name = "nandif", +static struct mtd_partition u300_partitions[] = { + { + .name = "bootrecords", + .offset = 0, + .size = SZ_128K, + }, + { + .name = "free", + .offset = SZ_128K, + .size = 8064 * SZ_1K, + }, + { + .name = "platform", + .offset = 8192 * SZ_1K, + .size = 253952 * SZ_1K, + }, +}; + +static struct fsmc_nand_platform_data nand_platform_data = { + .partitions = u300_partitions, + .nr_partitions = ARRAY_SIZE(u300_partitions), + .options = NAND_SKIP_BBTSCAN, + .width = FSMC_NAND_BW8, +}; + +static struct platform_device nand_device = { + .name = "fsmc-nand", .id = -1, - .num_resources = ARRAY_SIZE(fsmc_resources), .resource = fsmc_resources, + .num_resources = ARRAY_SIZE(fsmc_resources), + .dev = { + .platform_data = &nand_platform_data, + }, }; static struct platform_device ave_device = { @@ -1465,7 +1502,7 @@ static struct platform_device *platform_devs[] __initdata = { &keypad_device, &rtc_device, &gpio_device, - &fsmc_device, + &nand_device, &wdog_device, &ave_device }; diff --git a/arch/arm/mach-u300/include/mach/u300-regs.h b/arch/arm/mach-u300/include/mach/u300-regs.h index 56721a0..8b85df4 100644 --- a/arch/arm/mach-u300/include/mach/u300-regs.h +++ b/arch/arm/mach-u300/include/mach/u300-regs.h @@ -20,11 +20,9 @@ /* NAND Flash CS0 */ #define U300_NAND_CS0_PHYS_BASE 0x80000000 -#define U300_NAND_CS0_VIRT_BASE 0xff040000 /* NFIF */ #define U300_NAND_IF_PHYS_BASE 0x9f800000 -#define U300_NAND_IF_VIRT_BASE 0xff030000 /* AHB Peripherals */ #define U300_AHB_PER_PHYS_BASE 0xa0000000 diff --git a/arch/arm/mach-u300/spi.c b/arch/arm/mach-u300/spi.c index edb2c0d..00869de 100644 --- a/arch/arm/mach-u300/spi.c +++ b/arch/arm/mach-u300/spi.c @@ -67,7 +67,7 @@ static struct spi_board_info u300_spi_devices[] = { .bus_num = 0, /* Only one bus on this chip */ .chip_select = 0, /* Means SPI_CS_HIGH, change if e.g low CS */ - .mode = SPI_MODE_1 | SPI_LSB_FIRST | SPI_LOOP, + .mode = SPI_MODE_1 | SPI_LOOP, }, #endif }; diff --git a/arch/arm/mach-ux500/devices-db8500.c b/arch/arm/mach-ux500/devices-db8500.c index cbbe69a..4a94be3 100644 --- a/arch/arm/mach-ux500/devices-db8500.c +++ b/arch/arm/mach-ux500/devices-db8500.c @@ -208,35 +208,25 @@ static struct resource dma40_resources[] = { /* Default configuration for physcial memcpy */ struct stedma40_chan_cfg dma40_memcpy_conf_phy = { - .channel_type = (STEDMA40_CHANNEL_IN_PHY_MODE | - STEDMA40_LOW_PRIORITY_CHANNEL | - STEDMA40_PCHAN_BASIC_MODE), + .mode = STEDMA40_MODE_PHYSICAL, .dir = STEDMA40_MEM_TO_MEM, - .src_info.endianess = STEDMA40_LITTLE_ENDIAN, .src_info.data_width = STEDMA40_BYTE_WIDTH, .src_info.psize = STEDMA40_PSIZE_PHY_1, .src_info.flow_ctrl = STEDMA40_NO_FLOW_CTRL, - .dst_info.endianess = STEDMA40_LITTLE_ENDIAN, .dst_info.data_width = STEDMA40_BYTE_WIDTH, .dst_info.psize = STEDMA40_PSIZE_PHY_1, .dst_info.flow_ctrl = STEDMA40_NO_FLOW_CTRL, }; /* Default configuration for logical memcpy */ struct stedma40_chan_cfg dma40_memcpy_conf_log = { - .channel_type = (STEDMA40_CHANNEL_IN_LOG_MODE | - STEDMA40_LOW_PRIORITY_CHANNEL | - STEDMA40_LCHAN_SRC_LOG_DST_LOG | - STEDMA40_NO_TIM_FOR_LINK), .dir = STEDMA40_MEM_TO_MEM, - .src_info.endianess = STEDMA40_LITTLE_ENDIAN, .src_info.data_width = STEDMA40_BYTE_WIDTH, .src_info.psize = STEDMA40_PSIZE_LOG_1, .src_info.flow_ctrl = STEDMA40_NO_FLOW_CTRL, - .dst_info.endianess = STEDMA40_LITTLE_ENDIAN, .dst_info.data_width = STEDMA40_BYTE_WIDTH, .dst_info.psize = STEDMA40_PSIZE_LOG_1, .dst_info.flow_ctrl = STEDMA40_NO_FLOW_CTRL, @@ -269,7 +259,6 @@ static struct stedma40_platform_data dma40_plat_data = { .memcpy_len = ARRAY_SIZE(dma40_memcpy_event), .memcpy_conf_phy = &dma40_memcpy_conf_phy, .memcpy_conf_log = &dma40_memcpy_conf_log, - .llis_per_log = 8, .disabled_channels = {-1}, }; diff --git a/arch/arm/mach-vexpress/ct-ca9x4.c b/arch/arm/mach-vexpress/ct-ca9x4.c index c2e405a..fd25ccd 100644 --- a/arch/arm/mach-vexpress/ct-ca9x4.c +++ b/arch/arm/mach-vexpress/ct-ca9x4.c @@ -54,7 +54,9 @@ static struct map_desc ct_ca9x4_io_desc[] __initdata = { static void __init ct_ca9x4_map_io(void) { +#ifdef CONFIG_LOCAL_TIMERS twd_base = MMIO_P2V(A9_MPCORE_TWD); +#endif v2m_map_io(ct_ca9x4_io_desc, ARRAY_SIZE(ct_ca9x4_io_desc)); } diff --git a/arch/arm/mm/cache-fa.S b/arch/arm/mm/cache-fa.S index 7148e53..1fa6f71 100644 --- a/arch/arm/mm/cache-fa.S +++ b/arch/arm/mm/cache-fa.S @@ -38,6 +38,17 @@ #define CACHE_DLIMIT (CACHE_DSIZE * 2) /* + * flush_icache_all() + * + * Unconditionally clean and invalidate the entire icache. + */ +ENTRY(fa_flush_icache_all) + mov r0, #0 + mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache + mov pc, lr +ENDPROC(fa_flush_icache_all) + +/* * flush_user_cache_all() * * Clean and invalidate all cache entries in a particular address @@ -233,6 +244,7 @@ ENDPROC(fa_dma_unmap_area) .type fa_cache_fns, #object ENTRY(fa_cache_fns) + .long fa_flush_icache_all .long fa_flush_kern_cache_all .long fa_flush_user_cache_all .long fa_flush_user_cache_range diff --git a/arch/arm/mm/cache-v3.S b/arch/arm/mm/cache-v3.S index c2ff3c5..2e2bc40 100644 --- a/arch/arm/mm/cache-v3.S +++ b/arch/arm/mm/cache-v3.S @@ -13,6 +13,15 @@ #include "proc-macros.S" /* + * flush_icache_all() + * + * Unconditionally clean and invalidate the entire icache. + */ +ENTRY(v3_flush_icache_all) + mov pc, lr +ENDPROC(v3_flush_icache_all) + +/* * flush_user_cache_all() * * Invalidate all cache entries in a particular address @@ -122,6 +131,7 @@ ENDPROC(v3_dma_map_area) .type v3_cache_fns, #object ENTRY(v3_cache_fns) + .long v3_flush_icache_all .long v3_flush_kern_cache_all .long v3_flush_user_cache_all .long v3_flush_user_cache_range diff --git a/arch/arm/mm/cache-v4.S b/arch/arm/mm/cache-v4.S index 4810f7e..a8fefb5 100644 --- a/arch/arm/mm/cache-v4.S +++ b/arch/arm/mm/cache-v4.S @@ -13,6 +13,15 @@ #include "proc-macros.S" /* + * flush_icache_all() + * + * Unconditionally clean and invalidate the entire icache. + */ +ENTRY(v4_flush_icache_all) + mov pc, lr +ENDPROC(v4_flush_icache_all) + +/* * flush_user_cache_all() * * Invalidate all cache entries in a particular address @@ -134,6 +143,7 @@ ENDPROC(v4_dma_map_area) .type v4_cache_fns, #object ENTRY(v4_cache_fns) + .long v4_flush_icache_all .long v4_flush_kern_cache_all .long v4_flush_user_cache_all .long v4_flush_user_cache_range diff --git a/arch/arm/mm/cache-v4wb.S b/arch/arm/mm/cache-v4wb.S index df8368a..d3644db 100644 --- a/arch/arm/mm/cache-v4wb.S +++ b/arch/arm/mm/cache-v4wb.S @@ -51,6 +51,17 @@ flush_base: .text /* + * flush_icache_all() + * + * Unconditionally clean and invalidate the entire icache. + */ +ENTRY(v4wb_flush_icache_all) + mov r0, #0 + mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache + mov pc, lr +ENDPROC(v4wb_flush_icache_all) + +/* * flush_user_cache_all() * * Clean and invalidate all cache entries in a particular address @@ -244,6 +255,7 @@ ENDPROC(v4wb_dma_unmap_area) .type v4wb_cache_fns, #object ENTRY(v4wb_cache_fns) + .long v4wb_flush_icache_all .long v4wb_flush_kern_cache_all .long v4wb_flush_user_cache_all .long v4wb_flush_user_cache_range diff --git a/arch/arm/mm/cache-v4wt.S b/arch/arm/mm/cache-v4wt.S index 45c7031..49c2b66 100644 --- a/arch/arm/mm/cache-v4wt.S +++ b/arch/arm/mm/cache-v4wt.S @@ -41,6 +41,17 @@ #define CACHE_DLIMIT 16384 /* + * flush_icache_all() + * + * Unconditionally clean and invalidate the entire icache. + */ +ENTRY(v4wt_flush_icache_all) + mov r0, #0 + mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache + mov pc, lr +ENDPROC(v4wt_flush_icache_all) + +/* * flush_user_cache_all() * * Invalidate all cache entries in a particular address @@ -188,6 +199,7 @@ ENDPROC(v4wt_dma_map_area) .type v4wt_cache_fns, #object ENTRY(v4wt_cache_fns) + .long v4wt_flush_icache_all .long v4wt_flush_kern_cache_all .long v4wt_flush_user_cache_all .long v4wt_flush_user_cache_range diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c index e4dd064..ac6a361 100644 --- a/arch/arm/mm/dma-mapping.c +++ b/arch/arm/mm/dma-mapping.c @@ -198,7 +198,7 @@ __dma_alloc_remap(struct page *page, size_t size, gfp_t gfp, pgprot_t prot) * fragmentation of the DMA space, and also prevents allocations * smaller than a section from crossing a section boundary. */ - bit = fls(size - 1) + 1; + bit = fls(size - 1); if (bit > SECTION_SHIFT) bit = SECTION_SHIFT; align = 1 << bit; diff --git a/arch/arm/mm/fault-armv.c b/arch/arm/mm/fault-armv.c index c493d72..83e59f8 100644 --- a/arch/arm/mm/fault-armv.c +++ b/arch/arm/mm/fault-armv.c @@ -66,6 +66,30 @@ static int do_adjust_pte(struct vm_area_struct *vma, unsigned long address, return ret; } +#if USE_SPLIT_PTLOCKS +/* + * If we are using split PTE locks, then we need to take the page + * lock here. Otherwise we are using shared mm->page_table_lock + * which is already locked, thus cannot take it. + */ +static inline void do_pte_lock(spinlock_t *ptl) +{ + /* + * Use nested version here to indicate that we are already + * holding one similar spinlock. + */ + spin_lock_nested(ptl, SINGLE_DEPTH_NESTING); +} + +static inline void do_pte_unlock(spinlock_t *ptl) +{ + spin_unlock(ptl); +} +#else /* !USE_SPLIT_PTLOCKS */ +static inline void do_pte_lock(spinlock_t *ptl) {} +static inline void do_pte_unlock(spinlock_t *ptl) {} +#endif /* USE_SPLIT_PTLOCKS */ + static int adjust_pte(struct vm_area_struct *vma, unsigned long address, unsigned long pfn) { @@ -90,11 +114,11 @@ static int adjust_pte(struct vm_area_struct *vma, unsigned long address, */ ptl = pte_lockptr(vma->vm_mm, pmd); pte = pte_offset_map(pmd, address); - spin_lock(ptl); + do_pte_lock(ptl); ret = do_adjust_pte(vma, address, pfn, pte); - spin_unlock(ptl); + do_pte_unlock(ptl); pte_unmap(pte); return ret; diff --git a/arch/arm/mm/highmem.c b/arch/arm/mm/highmem.c index c00f119..c435fd9 100644 --- a/arch/arm/mm/highmem.c +++ b/arch/arm/mm/highmem.c @@ -89,7 +89,7 @@ void __kunmap_atomic(void *kvaddr) int idx, type; if (kvaddr >= (void *)FIXADDR_START) { - type = kmap_atomic_idx_pop(); + type = kmap_atomic_idx(); idx = type + KM_TYPE_NR * smp_processor_id(); if (cache_is_vivt()) @@ -101,6 +101,7 @@ void __kunmap_atomic(void *kvaddr) #else (void) idx; /* to kill a warning */ #endif + kmap_atomic_idx_pop(); } else if (vaddr >= PKMAP_ADDR(0) && vaddr < PKMAP_ADDR(LAST_PKMAP)) { /* this address was obtained through kmap_high_get() */ kunmap_high(pte_page(pkmap_page_table[PKMAP_NR(vaddr)])); diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c index 7fd9b5e..5164069 100644 --- a/arch/arm/mm/init.c +++ b/arch/arm/mm/init.c @@ -18,6 +18,7 @@ #include <linux/highmem.h> #include <linux/gfp.h> #include <linux/memblock.h> +#include <linux/sort.h> #include <asm/mach-types.h> #include <asm/sections.h> @@ -121,9 +122,10 @@ void show_mem(void) printk("%d pages swap cached\n", cached); } -static void __init find_limits(struct meminfo *mi, - unsigned long *min, unsigned long *max_low, unsigned long *max_high) +static void __init find_limits(unsigned long *min, unsigned long *max_low, + unsigned long *max_high) { + struct meminfo *mi = &meminfo; int i; *min = -1UL; @@ -147,14 +149,13 @@ static void __init find_limits(struct meminfo *mi, } } -static void __init arm_bootmem_init(struct meminfo *mi, - unsigned long start_pfn, unsigned long end_pfn) +static void __init arm_bootmem_init(unsigned long start_pfn, + unsigned long end_pfn) { struct memblock_region *reg; unsigned int boot_pages; phys_addr_t bitmap; pg_data_t *pgdat; - int i; /* * Allocate the bootmem bitmap page. This must be in a region @@ -172,30 +173,39 @@ static void __init arm_bootmem_init(struct meminfo *mi, pgdat = NODE_DATA(0); init_bootmem_node(pgdat, __phys_to_pfn(bitmap), start_pfn, end_pfn); - for_each_bank(i, mi) { - struct membank *bank = &mi->bank[i]; - if (!bank->highmem) - free_bootmem(bank_phys_start(bank), bank_phys_size(bank)); + /* Free the lowmem regions from memblock into bootmem. */ + for_each_memblock(memory, reg) { + unsigned long start = memblock_region_memory_base_pfn(reg); + unsigned long end = memblock_region_memory_end_pfn(reg); + + if (end >= end_pfn) + end = end_pfn; + if (start >= end) + break; + + free_bootmem(__pfn_to_phys(start), (end - start) << PAGE_SHIFT); } - /* - * Reserve the memblock reserved regions in bootmem. - */ + /* Reserve the lowmem memblock reserved regions in bootmem. */ for_each_memblock(reserved, reg) { - phys_addr_t start = memblock_region_reserved_base_pfn(reg); - phys_addr_t end = memblock_region_reserved_end_pfn(reg); - if (start >= start_pfn && end <= end_pfn) - reserve_bootmem_node(pgdat, __pfn_to_phys(start), - (end - start) << PAGE_SHIFT, - BOOTMEM_DEFAULT); + unsigned long start = memblock_region_reserved_base_pfn(reg); + unsigned long end = memblock_region_reserved_end_pfn(reg); + + if (end >= end_pfn) + end = end_pfn; + if (start >= end) + break; + + reserve_bootmem(__pfn_to_phys(start), + (end - start) << PAGE_SHIFT, BOOTMEM_DEFAULT); } } -static void __init arm_bootmem_free(struct meminfo *mi, unsigned long min, - unsigned long max_low, unsigned long max_high) +static void __init arm_bootmem_free(unsigned long min, unsigned long max_low, + unsigned long max_high) { unsigned long zone_size[MAX_NR_ZONES], zhole_size[MAX_NR_ZONES]; - int i; + struct memblock_region *reg; /* * initialise the zones. @@ -217,13 +227,20 @@ static void __init arm_bootmem_free(struct meminfo *mi, unsigned long min, * holes = node_size - sum(bank_sizes) */ memcpy(zhole_size, zone_size, sizeof(zhole_size)); - for_each_bank(i, mi) { - int idx = 0; + for_each_memblock(memory, reg) { + unsigned long start = memblock_region_memory_base_pfn(reg); + unsigned long end = memblock_region_memory_end_pfn(reg); + + if (start < max_low) { + unsigned long low_end = min(end, max_low); + zhole_size[0] -= low_end - start; + } #ifdef CONFIG_HIGHMEM - if (mi->bank[i].highmem) - idx = ZONE_HIGHMEM; + if (end > max_low) { + unsigned long high_start = max(start, max_low); + zhole_size[ZONE_HIGHMEM] -= end - high_start; + } #endif - zhole_size[idx] -= bank_pfn_size(&mi->bank[i]); } /* @@ -256,10 +273,19 @@ static void arm_memory_present(void) } #endif +static int __init meminfo_cmp(const void *_a, const void *_b) +{ + const struct membank *a = _a, *b = _b; + long cmp = bank_pfn_start(a) - bank_pfn_start(b); + return cmp < 0 ? -1 : cmp > 0 ? 1 : 0; +} + void __init arm_memblock_init(struct meminfo *mi, struct machine_desc *mdesc) { int i; + sort(&meminfo.bank, meminfo.nr_banks, sizeof(meminfo.bank[0]), meminfo_cmp, NULL); + memblock_init(); for (i = 0; i < mi->nr_banks; i++) memblock_add(mi->bank[i].start, mi->bank[i].size); @@ -292,14 +318,13 @@ void __init arm_memblock_init(struct meminfo *mi, struct machine_desc *mdesc) void __init bootmem_init(void) { - struct meminfo *mi = &meminfo; unsigned long min, max_low, max_high; max_low = max_high = 0; - find_limits(mi, &min, &max_low, &max_high); + find_limits(&min, &max_low, &max_high); - arm_bootmem_init(mi, min, max_low); + arm_bootmem_init(min, max_low); /* * Sparsemem tries to allocate bootmem in memory_present(), @@ -317,7 +342,7 @@ void __init bootmem_init(void) * the sparse mem_map arrays initialized by sparse_init() * for memmap_init_zone(), otherwise all PFNs are invalid. */ - arm_bootmem_free(mi, min, max_low, max_high); + arm_bootmem_free(min, max_low, max_high); high_memory = __va((max_low << PAGE_SHIFT) - 1) + 1; @@ -411,6 +436,56 @@ static void __init free_unused_memmap(struct meminfo *mi) } } +static void __init free_highpages(void) +{ +#ifdef CONFIG_HIGHMEM + unsigned long max_low = max_low_pfn + PHYS_PFN_OFFSET; + struct memblock_region *mem, *res; + + /* set highmem page free */ + for_each_memblock(memory, mem) { + unsigned long start = memblock_region_memory_base_pfn(mem); + unsigned long end = memblock_region_memory_end_pfn(mem); + + /* Ignore complete lowmem entries */ + if (end <= max_low) + continue; + + /* Truncate partial highmem entries */ + if (start < max_low) + start = max_low; + + /* Find and exclude any reserved regions */ + for_each_memblock(reserved, res) { + unsigned long res_start, res_end; + + res_start = memblock_region_reserved_base_pfn(res); + res_end = memblock_region_reserved_end_pfn(res); + + if (res_end < start) + continue; + if (res_start < start) + res_start = start; + if (res_start > end) + res_start = end; + if (res_end > end) + res_end = end; + if (res_start != start) + totalhigh_pages += free_area(start, res_start, + NULL); + start = res_end; + if (start == end) + break; + } + + /* And now free anything which remains */ + if (start < end) + totalhigh_pages += free_area(start, end, NULL); + } + totalram_pages += totalhigh_pages; +#endif +} + /* * mem_init() marks the free areas in the mem_map and tells us how much * memory is free. This is done after various parts of the system have @@ -419,6 +494,7 @@ static void __init free_unused_memmap(struct meminfo *mi) void __init mem_init(void) { unsigned long reserved_pages, free_pages; + struct memblock_region *reg; int i; #ifdef CONFIG_HAVE_TCM /* These pointers are filled in on TCM detection */ @@ -439,16 +515,7 @@ void __init mem_init(void) __phys_to_pfn(__pa(swapper_pg_dir)), NULL); #endif -#ifdef CONFIG_HIGHMEM - /* set highmem page free */ - for_each_bank (i, &meminfo) { - unsigned long start = bank_pfn_start(&meminfo.bank[i]); - unsigned long end = bank_pfn_end(&meminfo.bank[i]); - if (start >= max_low_pfn + PHYS_PFN_OFFSET) - totalhigh_pages += free_area(start, end, NULL); - } - totalram_pages += totalhigh_pages; -#endif + free_highpages(); reserved_pages = free_pages = 0; @@ -478,9 +545,11 @@ void __init mem_init(void) */ printk(KERN_INFO "Memory:"); num_physpages = 0; - for (i = 0; i < meminfo.nr_banks; i++) { - num_physpages += bank_pfn_size(&meminfo.bank[i]); - printk(" %ldMB", bank_phys_size(&meminfo.bank[i]) >> 20); + for_each_memblock(memory, reg) { + unsigned long pages = memblock_region_memory_end_pfn(reg) - + memblock_region_memory_base_pfn(reg); + num_physpages += pages; + printk(" %ldMB", pages >> (20 - PAGE_SHIFT)); } printk(" = %luMB total\n", num_physpages >> (20 - PAGE_SHIFT)); diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c index c32f731..72ad3e1 100644 --- a/arch/arm/mm/mmu.c +++ b/arch/arm/mm/mmu.c @@ -14,7 +14,6 @@ #include <linux/mman.h> #include <linux/nodemask.h> #include <linux/memblock.h> -#include <linux/sort.h> #include <linux/fs.h> #include <asm/cputype.h> @@ -265,17 +264,17 @@ static struct mem_type mem_types[] = { .domain = DOMAIN_KERNEL, }, [MT_MEMORY_DTCM] = { - .prot_pte = L_PTE_PRESENT | L_PTE_YOUNG | - L_PTE_DIRTY | L_PTE_WRITE, - .prot_l1 = PMD_TYPE_TABLE, - .prot_sect = PMD_TYPE_SECT | PMD_SECT_XN, - .domain = DOMAIN_KERNEL, + .prot_pte = L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY | + L_PTE_WRITE, + .prot_l1 = PMD_TYPE_TABLE, + .prot_sect = PMD_TYPE_SECT | PMD_SECT_XN, + .domain = DOMAIN_KERNEL, }, [MT_MEMORY_ITCM] = { .prot_pte = L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY | - L_PTE_USER | L_PTE_EXEC, + L_PTE_WRITE | L_PTE_EXEC, .prot_l1 = PMD_TYPE_TABLE, - .domain = DOMAIN_IO, + .domain = DOMAIN_KERNEL, }, }; @@ -745,13 +744,14 @@ static int __init early_vmalloc(char *arg) } early_param("vmalloc", early_vmalloc); -phys_addr_t lowmem_end_addr; +static phys_addr_t lowmem_limit __initdata = 0; static void __init sanity_check_meminfo(void) { int i, j, highmem = 0; - lowmem_end_addr = __pa(vmalloc_min - 1) + 1; + lowmem_limit = __pa(vmalloc_min - 1) + 1; + memblock_set_current_limit(lowmem_limit); for (i = 0, j = 0; i < meminfo.nr_banks; i++) { struct membank *bank = &meminfo.bank[j]; @@ -852,6 +852,7 @@ static void __init sanity_check_meminfo(void) static inline void prepare_page_table(void) { unsigned long addr; + phys_addr_t end; /* * Clear out all the mappings below the kernel image. @@ -867,10 +868,17 @@ static inline void prepare_page_table(void) pmd_clear(pmd_off_k(addr)); /* + * Find the end of the first block of lowmem. + */ + end = memblock.memory.regions[0].base + memblock.memory.regions[0].size; + if (end >= lowmem_limit) + end = lowmem_limit; + + /* * Clear out all the kernel space mappings, except for the first * memory bank, up to the end of the vmalloc region. */ - for (addr = __phys_to_virt(bank_phys_end(&meminfo.bank[0])); + for (addr = __phys_to_virt(end); addr < VMALLOC_END; addr += PGDIR_SIZE) pmd_clear(pmd_off_k(addr)); } @@ -987,37 +995,28 @@ static void __init kmap_init(void) #endif } -static inline void map_memory_bank(struct membank *bank) -{ - struct map_desc map; - - map.pfn = bank_pfn_start(bank); - map.virtual = __phys_to_virt(bank_phys_start(bank)); - map.length = bank_phys_size(bank); - map.type = MT_MEMORY; - - create_mapping(&map); -} - static void __init map_lowmem(void) { - struct meminfo *mi = &meminfo; - int i; + struct memblock_region *reg; /* Map all the lowmem memory banks. */ - for (i = 0; i < mi->nr_banks; i++) { - struct membank *bank = &mi->bank[i]; + for_each_memblock(memory, reg) { + phys_addr_t start = reg->base; + phys_addr_t end = start + reg->size; + struct map_desc map; + + if (end > lowmem_limit) + end = lowmem_limit; + if (start >= end) + break; - if (!bank->highmem) - map_memory_bank(bank); - } -} + map.pfn = __phys_to_pfn(start); + map.virtual = __phys_to_virt(start); + map.length = end - start; + map.type = MT_MEMORY; -static int __init meminfo_cmp(const void *_a, const void *_b) -{ - const struct membank *a = _a, *b = _b; - long cmp = bank_pfn_start(a) - bank_pfn_start(b); - return cmp < 0 ? -1 : cmp > 0 ? 1 : 0; + create_mapping(&map); + } } /* @@ -1028,8 +1027,6 @@ void __init paging_init(struct machine_desc *mdesc) { void *zero_page; - sort(&meminfo.bank, meminfo.nr_banks, sizeof(meminfo.bank[0]), meminfo_cmp, NULL); - build_mem_type_table(); sanity_check_meminfo(); prepare_page_table(); diff --git a/arch/arm/mm/proc-arm1020.S b/arch/arm/mm/proc-arm1020.S index a6f5f84..bcf748d 100644 --- a/arch/arm/mm/proc-arm1020.S +++ b/arch/arm/mm/proc-arm1020.S @@ -119,6 +119,20 @@ ENTRY(cpu_arm1020_do_idle) /* ================================= CACHE ================================ */ .align 5 + +/* + * flush_icache_all() + * + * Unconditionally clean and invalidate the entire icache. + */ +ENTRY(arm1020_flush_icache_all) +#ifndef CONFIG_CPU_ICACHE_DISABLE + mov r0, #0 + mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache +#endif + mov pc, lr +ENDPROC(arm1020_flush_icache_all) + /* * flush_user_cache_all() * @@ -351,6 +365,7 @@ ENTRY(arm1020_dma_unmap_area) ENDPROC(arm1020_dma_unmap_area) ENTRY(arm1020_cache_fns) + .long arm1020_flush_icache_all .long arm1020_flush_kern_cache_all .long arm1020_flush_user_cache_all .long arm1020_flush_user_cache_range diff --git a/arch/arm/mm/proc-arm1020e.S b/arch/arm/mm/proc-arm1020e.S index afc06b9..ab7ec26 100644 --- a/arch/arm/mm/proc-arm1020e.S +++ b/arch/arm/mm/proc-arm1020e.S @@ -119,6 +119,20 @@ ENTRY(cpu_arm1020e_do_idle) /* ================================= CACHE ================================ */ .align 5 + +/* + * flush_icache_all() + * + * Unconditionally clean and invalidate the entire icache. + */ +ENTRY(arm1020e_flush_icache_all) +#ifndef CONFIG_CPU_ICACHE_DISABLE + mov r0, #0 + mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache +#endif + mov pc, lr +ENDPROC(arm1020e_flush_icache_all) + /* * flush_user_cache_all() * @@ -337,6 +351,7 @@ ENTRY(arm1020e_dma_unmap_area) ENDPROC(arm1020e_dma_unmap_area) ENTRY(arm1020e_cache_fns) + .long arm1020e_flush_icache_all .long arm1020e_flush_kern_cache_all .long arm1020e_flush_user_cache_all .long arm1020e_flush_user_cache_range diff --git a/arch/arm/mm/proc-arm1022.S b/arch/arm/mm/proc-arm1022.S index 8915e0b..831c5e5 100644 --- a/arch/arm/mm/proc-arm1022.S +++ b/arch/arm/mm/proc-arm1022.S @@ -108,6 +108,20 @@ ENTRY(cpu_arm1022_do_idle) /* ================================= CACHE ================================ */ .align 5 + +/* + * flush_icache_all() + * + * Unconditionally clean and invalidate the entire icache. + */ +ENTRY(arm1022_flush_icache_all) +#ifndef CONFIG_CPU_ICACHE_DISABLE + mov r0, #0 + mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache +#endif + mov pc, lr +ENDPROC(arm1022_flush_icache_all) + /* * flush_user_cache_all() * @@ -326,6 +340,7 @@ ENTRY(arm1022_dma_unmap_area) ENDPROC(arm1022_dma_unmap_area) ENTRY(arm1022_cache_fns) + .long arm1022_flush_icache_all .long arm1022_flush_kern_cache_all .long arm1022_flush_user_cache_all .long arm1022_flush_user_cache_range diff --git a/arch/arm/mm/proc-arm1026.S b/arch/arm/mm/proc-arm1026.S index ff446c5..e3f7e9a 100644 --- a/arch/arm/mm/proc-arm1026.S +++ b/arch/arm/mm/proc-arm1026.S @@ -108,6 +108,20 @@ ENTRY(cpu_arm1026_do_idle) /* ================================= CACHE ================================ */ .align 5 + +/* + * flush_icache_all() + * + * Unconditionally clean and invalidate the entire icache. + */ +ENTRY(arm1026_flush_icache_all) +#ifndef CONFIG_CPU_ICACHE_DISABLE + mov r0, #0 + mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache +#endif + mov pc, lr +ENDPROC(arm1026_flush_icache_all) + /* * flush_user_cache_all() * @@ -320,6 +334,7 @@ ENTRY(arm1026_dma_unmap_area) ENDPROC(arm1026_dma_unmap_area) ENTRY(arm1026_cache_fns) + .long arm1026_flush_icache_all .long arm1026_flush_kern_cache_all .long arm1026_flush_user_cache_all .long arm1026_flush_user_cache_range diff --git a/arch/arm/mm/proc-arm920.S b/arch/arm/mm/proc-arm920.S index fecf570..6109f27 100644 --- a/arch/arm/mm/proc-arm920.S +++ b/arch/arm/mm/proc-arm920.S @@ -110,6 +110,17 @@ ENTRY(cpu_arm920_do_idle) #ifndef CONFIG_CPU_DCACHE_WRITETHROUGH /* + * flush_icache_all() + * + * Unconditionally clean and invalidate the entire icache. + */ +ENTRY(arm920_flush_icache_all) + mov r0, #0 + mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache + mov pc, lr +ENDPROC(arm920_flush_icache_all) + +/* * flush_user_cache_all() * * Invalidate all cache entries in a particular address @@ -305,6 +316,7 @@ ENTRY(arm920_dma_unmap_area) ENDPROC(arm920_dma_unmap_area) ENTRY(arm920_cache_fns) + .long arm920_flush_icache_all .long arm920_flush_kern_cache_all .long arm920_flush_user_cache_all .long arm920_flush_user_cache_range diff --git a/arch/arm/mm/proc-arm922.S b/arch/arm/mm/proc-arm922.S index e3cbf87..bb2f0f4 100644 --- a/arch/arm/mm/proc-arm922.S +++ b/arch/arm/mm/proc-arm922.S @@ -112,6 +112,17 @@ ENTRY(cpu_arm922_do_idle) #ifndef CONFIG_CPU_DCACHE_WRITETHROUGH /* + * flush_icache_all() + * + * Unconditionally clean and invalidate the entire icache. + */ +ENTRY(arm922_flush_icache_all) + mov r0, #0 + mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache + mov pc, lr +ENDPROC(arm922_flush_icache_all) + +/* * flush_user_cache_all() * * Clean and invalidate all cache entries in a particular @@ -307,6 +318,7 @@ ENTRY(arm922_dma_unmap_area) ENDPROC(arm922_dma_unmap_area) ENTRY(arm922_cache_fns) + .long arm922_flush_icache_all .long arm922_flush_kern_cache_all .long arm922_flush_user_cache_all .long arm922_flush_user_cache_range diff --git a/arch/arm/mm/proc-arm925.S b/arch/arm/mm/proc-arm925.S index 572424c..c13e01a 100644 --- a/arch/arm/mm/proc-arm925.S +++ b/arch/arm/mm/proc-arm925.S @@ -145,6 +145,17 @@ ENTRY(cpu_arm925_do_idle) mov pc, lr /* + * flush_icache_all() + * + * Unconditionally clean and invalidate the entire icache. + */ +ENTRY(arm925_flush_icache_all) + mov r0, #0 + mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache + mov pc, lr +ENDPROC(arm925_flush_icache_all) + +/* * flush_user_cache_all() * * Clean and invalidate all cache entries in a particular @@ -362,6 +373,7 @@ ENTRY(arm925_dma_unmap_area) ENDPROC(arm925_dma_unmap_area) ENTRY(arm925_cache_fns) + .long arm925_flush_icache_all .long arm925_flush_kern_cache_all .long arm925_flush_user_cache_all .long arm925_flush_user_cache_range diff --git a/arch/arm/mm/proc-arm926.S b/arch/arm/mm/proc-arm926.S index 63d168b..42eb431 100644 --- a/arch/arm/mm/proc-arm926.S +++ b/arch/arm/mm/proc-arm926.S @@ -111,6 +111,17 @@ ENTRY(cpu_arm926_do_idle) mov pc, lr /* + * flush_icache_all() + * + * Unconditionally clean and invalidate the entire icache. + */ +ENTRY(arm926_flush_icache_all) + mov r0, #0 + mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache + mov pc, lr +ENDPROC(arm926_flush_icache_all) + +/* * flush_user_cache_all() * * Clean and invalidate all cache entries in a particular @@ -325,6 +336,7 @@ ENTRY(arm926_dma_unmap_area) ENDPROC(arm926_dma_unmap_area) ENTRY(arm926_cache_fns) + .long arm926_flush_icache_all .long arm926_flush_kern_cache_all .long arm926_flush_user_cache_all .long arm926_flush_user_cache_range diff --git a/arch/arm/mm/proc-arm940.S b/arch/arm/mm/proc-arm940.S index f6a6282..7b11cdb 100644 --- a/arch/arm/mm/proc-arm940.S +++ b/arch/arm/mm/proc-arm940.S @@ -68,6 +68,17 @@ ENTRY(cpu_arm940_do_idle) mov pc, lr /* + * flush_icache_all() + * + * Unconditionally clean and invalidate the entire icache. + */ +ENTRY(arm940_flush_icache_all) + mov r0, #0 + mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache + mov pc, lr +ENDPROC(arm940_flush_icache_all) + +/* * flush_user_cache_all() */ ENTRY(arm940_flush_user_cache_all) @@ -254,6 +265,7 @@ ENTRY(arm940_dma_unmap_area) ENDPROC(arm940_dma_unmap_area) ENTRY(arm940_cache_fns) + .long arm940_flush_icache_all .long arm940_flush_kern_cache_all .long arm940_flush_user_cache_all .long arm940_flush_user_cache_range diff --git a/arch/arm/mm/proc-arm946.S b/arch/arm/mm/proc-arm946.S index ea2e7f2..1a5bbf08 100644 --- a/arch/arm/mm/proc-arm946.S +++ b/arch/arm/mm/proc-arm946.S @@ -75,6 +75,17 @@ ENTRY(cpu_arm946_do_idle) mov pc, lr /* + * flush_icache_all() + * + * Unconditionally clean and invalidate the entire icache. + */ +ENTRY(arm946_flush_icache_all) + mov r0, #0 + mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache + mov pc, lr +ENDPROC(arm946_flush_icache_all) + +/* * flush_user_cache_all() */ ENTRY(arm946_flush_user_cache_all) @@ -296,6 +307,7 @@ ENTRY(arm946_dma_unmap_area) ENDPROC(arm946_dma_unmap_area) ENTRY(arm946_cache_fns) + .long arm946_flush_icache_all .long arm946_flush_kern_cache_all .long arm946_flush_user_cache_all .long arm946_flush_user_cache_range diff --git a/arch/arm/mm/proc-feroceon.S b/arch/arm/mm/proc-feroceon.S index 578da69..b4597ed 100644 --- a/arch/arm/mm/proc-feroceon.S +++ b/arch/arm/mm/proc-feroceon.S @@ -124,6 +124,17 @@ ENTRY(cpu_feroceon_do_idle) mov pc, lr /* + * flush_icache_all() + * + * Unconditionally clean and invalidate the entire icache. + */ +ENTRY(feroceon_flush_icache_all) + mov r0, #0 + mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache + mov pc, lr +ENDPROC(feroceon_flush_icache_all) + +/* * flush_user_cache_all() * * Clean and invalidate all cache entries in a particular @@ -401,6 +412,7 @@ ENTRY(feroceon_dma_unmap_area) ENDPROC(feroceon_dma_unmap_area) ENTRY(feroceon_cache_fns) + .long feroceon_flush_icache_all .long feroceon_flush_kern_cache_all .long feroceon_flush_user_cache_all .long feroceon_flush_user_cache_range @@ -412,6 +424,7 @@ ENTRY(feroceon_cache_fns) .long feroceon_dma_flush_range ENTRY(feroceon_range_cache_fns) + .long feroceon_flush_icache_all .long feroceon_flush_kern_cache_all .long feroceon_flush_user_cache_all .long feroceon_flush_user_cache_range diff --git a/arch/arm/mm/proc-xsc3.S b/arch/arm/mm/proc-xsc3.S index cad07e4..ec26355 100644 --- a/arch/arm/mm/proc-xsc3.S +++ b/arch/arm/mm/proc-xsc3.S @@ -141,6 +141,17 @@ ENTRY(cpu_xsc3_do_idle) /* ================================= CACHE ================================ */ /* + * flush_icache_all() + * + * Unconditionally clean and invalidate the entire icache. + */ +ENTRY(xsc3_flush_icache_all) + mov r0, #0 + mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache + mov pc, lr +ENDPROC(xsc3_flush_icache_all) + +/* * flush_user_cache_all() * * Invalidate all cache entries in a particular address @@ -325,6 +336,7 @@ ENTRY(xsc3_dma_unmap_area) ENDPROC(xsc3_dma_unmap_area) ENTRY(xsc3_cache_fns) + .long xsc3_flush_icache_all .long xsc3_flush_kern_cache_all .long xsc3_flush_user_cache_all .long xsc3_flush_user_cache_range diff --git a/arch/arm/mm/proc-xscale.S b/arch/arm/mm/proc-xscale.S index cb245ed..523408c 100644 --- a/arch/arm/mm/proc-xscale.S +++ b/arch/arm/mm/proc-xscale.S @@ -181,6 +181,17 @@ ENTRY(cpu_xscale_do_idle) /* ================================= CACHE ================================ */ /* + * flush_icache_all() + * + * Unconditionally clean and invalidate the entire icache. + */ +ENTRY(xscale_flush_icache_all) + mov r0, #0 + mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache + mov pc, lr +ENDPROC(xscale_flush_icache_all) + +/* * flush_user_cache_all() * * Invalidate all cache entries in a particular address @@ -397,6 +408,7 @@ ENTRY(xscale_dma_unmap_area) ENDPROC(xscale_dma_unmap_area) ENTRY(xscale_cache_fns) + .long xscale_flush_icache_all .long xscale_flush_kern_cache_all .long xscale_flush_user_cache_all .long xscale_flush_user_cache_range diff --git a/arch/arm/plat-mxc/include/mach/dma.h b/arch/arm/plat-mxc/include/mach/dma.h new file mode 100644 index 0000000..ef77515 --- /dev/null +++ b/arch/arm/plat-mxc/include/mach/dma.h @@ -0,0 +1,67 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ASM_ARCH_MXC_DMA_H__ +#define __ASM_ARCH_MXC_DMA_H__ + +#include <linux/scatterlist.h> +#include <linux/device.h> +#include <linux/dmaengine.h> + +/* + * This enumerates peripheral types. Used for SDMA. + */ +enum sdma_peripheral_type { + IMX_DMATYPE_SSI, /* MCU domain SSI */ + IMX_DMATYPE_SSI_SP, /* Shared SSI */ + IMX_DMATYPE_MMC, /* MMC */ + IMX_DMATYPE_SDHC, /* SDHC */ + IMX_DMATYPE_UART, /* MCU domain UART */ + IMX_DMATYPE_UART_SP, /* Shared UART */ + IMX_DMATYPE_FIRI, /* FIRI */ + IMX_DMATYPE_CSPI, /* MCU domain CSPI */ + IMX_DMATYPE_CSPI_SP, /* Shared CSPI */ + IMX_DMATYPE_SIM, /* SIM */ + IMX_DMATYPE_ATA, /* ATA */ + IMX_DMATYPE_CCM, /* CCM */ + IMX_DMATYPE_EXT, /* External peripheral */ + IMX_DMATYPE_MSHC, /* Memory Stick Host Controller */ + IMX_DMATYPE_MSHC_SP, /* Shared Memory Stick Host Controller */ + IMX_DMATYPE_DSP, /* DSP */ + IMX_DMATYPE_MEMORY, /* Memory */ + IMX_DMATYPE_FIFO_MEMORY,/* FIFO type Memory */ + IMX_DMATYPE_SPDIF, /* SPDIF */ + IMX_DMATYPE_IPU_MEMORY, /* IPU Memory */ + IMX_DMATYPE_ASRC, /* ASRC */ + IMX_DMATYPE_ESAI, /* ESAI */ +}; + +enum imx_dma_prio { + DMA_PRIO_HIGH = 0, + DMA_PRIO_MEDIUM = 1, + DMA_PRIO_LOW = 2 +}; + +struct imx_dma_data { + int dma_request; /* DMA request line */ + enum sdma_peripheral_type peripheral_type; + int priority; +}; + +static inline int imx_dma_is_ipu(struct dma_chan *chan) +{ + return !strcmp(dev_name(chan->device->dev), "ipu-core"); +} + +static inline int imx_dma_is_general_purpose(struct dma_chan *chan) +{ + return !strcmp(dev_name(chan->device->dev), "imx-sdma") || + !strcmp(dev_name(chan->device->dev), "imx-dma"); +} + +#endif diff --git a/arch/arm/plat-mxc/include/mach/sdma.h b/arch/arm/plat-mxc/include/mach/sdma.h new file mode 100644 index 0000000..9be1122 --- /dev/null +++ b/arch/arm/plat-mxc/include/mach/sdma.h @@ -0,0 +1,17 @@ +#ifndef __MACH_MXC_SDMA_H__ +#define __MACH_MXC_SDMA_H__ + +/** + * struct sdma_platform_data - platform specific data for SDMA engine + * + * @sdma_version The version of this SDMA engine + * @cpu_name used to generate the firmware name + * @to_version CPU Tape out version + */ +struct sdma_platform_data { + int sdma_version; + char *cpu_name; + int to_version; +}; + +#endif /* __MACH_MXC_SDMA_H__ */ diff --git a/arch/arm/plat-nomadik/include/plat/ste_dma40.h b/arch/arm/plat-nomadik/include/plat/ste_dma40.h index 5fbde4b..74b62f1 100644 --- a/arch/arm/plat-nomadik/include/plat/ste_dma40.h +++ b/arch/arm/plat-nomadik/include/plat/ste_dma40.h @@ -1,10 +1,8 @@ /* - * arch/arm/plat-nomadik/include/plat/ste_dma40.h - * - * Copyright (C) ST-Ericsson 2007-2010 + * Copyright (C) ST-Ericsson SA 2007-2010 + * Author: Per Forlin <per.forlin@stericsson.com> for ST-Ericsson + * Author: Jonas Aaberg <jonas.aberg@stericsson.com> for ST-Ericsson * License terms: GNU General Public License (GPL) version 2 - * Author: Per Friden <per.friden@stericsson.com> - * Author: Jonas Aaberg <jonas.aberg@stericsson.com> */ @@ -14,43 +12,25 @@ #include <linux/dmaengine.h> #include <linux/workqueue.h> #include <linux/interrupt.h> -#include <linux/dmaengine.h> /* dev types for memcpy */ #define STEDMA40_DEV_DST_MEMORY (-1) #define STEDMA40_DEV_SRC_MEMORY (-1) -/* - * Description of bitfields of channel_type variable is available in - * the info structure. - */ +enum stedma40_mode { + STEDMA40_MODE_LOGICAL = 0, + STEDMA40_MODE_PHYSICAL, + STEDMA40_MODE_OPERATION, +}; -/* Priority */ -#define STEDMA40_INFO_PRIO_TYPE_POS 2 -#define STEDMA40_HIGH_PRIORITY_CHANNEL (0x1 << STEDMA40_INFO_PRIO_TYPE_POS) -#define STEDMA40_LOW_PRIORITY_CHANNEL (0x2 << STEDMA40_INFO_PRIO_TYPE_POS) - -/* Mode */ -#define STEDMA40_INFO_CH_MODE_TYPE_POS 6 -#define STEDMA40_CHANNEL_IN_PHY_MODE (0x1 << STEDMA40_INFO_CH_MODE_TYPE_POS) -#define STEDMA40_CHANNEL_IN_LOG_MODE (0x2 << STEDMA40_INFO_CH_MODE_TYPE_POS) -#define STEDMA40_CHANNEL_IN_OPER_MODE (0x3 << STEDMA40_INFO_CH_MODE_TYPE_POS) - -/* Mode options */ -#define STEDMA40_INFO_CH_MODE_OPT_POS 8 -#define STEDMA40_PCHAN_BASIC_MODE (0x1 << STEDMA40_INFO_CH_MODE_OPT_POS) -#define STEDMA40_PCHAN_MODULO_MODE (0x2 << STEDMA40_INFO_CH_MODE_OPT_POS) -#define STEDMA40_PCHAN_DOUBLE_DST_MODE (0x3 << STEDMA40_INFO_CH_MODE_OPT_POS) -#define STEDMA40_LCHAN_SRC_PHY_DST_LOG (0x1 << STEDMA40_INFO_CH_MODE_OPT_POS) -#define STEDMA40_LCHAN_SRC_LOG_DST_PHS (0x2 << STEDMA40_INFO_CH_MODE_OPT_POS) -#define STEDMA40_LCHAN_SRC_LOG_DST_LOG (0x3 << STEDMA40_INFO_CH_MODE_OPT_POS) - -/* Interrupt */ -#define STEDMA40_INFO_TIM_POS 10 -#define STEDMA40_NO_TIM_FOR_LINK (0x0 << STEDMA40_INFO_TIM_POS) -#define STEDMA40_TIM_FOR_LINK (0x1 << STEDMA40_INFO_TIM_POS) - -/* End of channel_type configuration */ +enum stedma40_mode_opt { + STEDMA40_PCHAN_BASIC_MODE = 0, + STEDMA40_LCHAN_SRC_LOG_DST_LOG = 0, + STEDMA40_PCHAN_MODULO_MODE, + STEDMA40_PCHAN_DOUBLE_DST_MODE, + STEDMA40_LCHAN_SRC_PHY_DST_LOG, + STEDMA40_LCHAN_SRC_LOG_DST_PHY, +}; #define STEDMA40_ESIZE_8_BIT 0x0 #define STEDMA40_ESIZE_16_BIT 0x1 @@ -73,16 +53,14 @@ #define STEDMA40_PSIZE_LOG_8 STEDMA40_PSIZE_PHY_8 #define STEDMA40_PSIZE_LOG_16 STEDMA40_PSIZE_PHY_16 +/* Maximum number of possible physical channels */ +#define STEDMA40_MAX_PHYS 32 + enum stedma40_flow_ctrl { STEDMA40_NO_FLOW_CTRL, STEDMA40_FLOW_CTRL, }; -enum stedma40_endianess { - STEDMA40_LITTLE_ENDIAN, - STEDMA40_BIG_ENDIAN -}; - enum stedma40_periph_data_width { STEDMA40_BYTE_WIDTH = STEDMA40_ESIZE_8_BIT, STEDMA40_HALFWORD_WIDTH = STEDMA40_ESIZE_16_BIT, @@ -90,15 +68,8 @@ enum stedma40_periph_data_width { STEDMA40_DOUBLEWORD_WIDTH = STEDMA40_ESIZE_64_BIT }; -struct stedma40_half_channel_info { - enum stedma40_endianess endianess; - enum stedma40_periph_data_width data_width; - int psize; - enum stedma40_flow_ctrl flow_ctrl; -}; - enum stedma40_xfer_dir { - STEDMA40_MEM_TO_MEM, + STEDMA40_MEM_TO_MEM = 1, STEDMA40_MEM_TO_PERIPH, STEDMA40_PERIPH_TO_MEM, STEDMA40_PERIPH_TO_PERIPH @@ -106,18 +77,31 @@ enum stedma40_xfer_dir { /** + * struct stedma40_chan_cfg - dst/src channel configuration + * + * @big_endian: true if the src/dst should be read as big endian + * @data_width: Data width of the src/dst hardware + * @p_size: Burst size + * @flow_ctrl: Flow control on/off. + */ +struct stedma40_half_channel_info { + bool big_endian; + enum stedma40_periph_data_width data_width; + int psize; + enum stedma40_flow_ctrl flow_ctrl; +}; + +/** * struct stedma40_chan_cfg - Structure to be filled by client drivers. * * @dir: MEM 2 MEM, PERIPH 2 MEM , MEM 2 PERIPH, PERIPH 2 PERIPH - * @channel_type: priority, mode, mode options and interrupt configuration. + * @high_priority: true if high-priority + * @mode: channel mode: physical, logical, or operation + * @mode_opt: options for the chosen channel mode * @src_dev_type: Src device type * @dst_dev_type: Dst device type * @src_info: Parameters for dst half channel * @dst_info: Parameters for dst half channel - * @pre_transfer_data: Data to be passed on to the pre_transfer() function. - * @pre_transfer: Callback used if needed before preparation of transfer. - * Only called if device is set. size of bytes to transfer - * (in case of multiple element transfer size is size of the first element). * * * This structure has to be filled by the client drivers. @@ -126,15 +110,13 @@ enum stedma40_xfer_dir { */ struct stedma40_chan_cfg { enum stedma40_xfer_dir dir; - unsigned int channel_type; + bool high_priority; + enum stedma40_mode mode; + enum stedma40_mode_opt mode_opt; int src_dev_type; int dst_dev_type; struct stedma40_half_channel_info src_info; struct stedma40_half_channel_info dst_info; - void *pre_transfer_data; - int (*pre_transfer) (struct dma_chan *chan, - void *data, - int size); }; /** @@ -147,7 +129,6 @@ struct stedma40_chan_cfg { * @memcpy_len: length of memcpy * @memcpy_conf_phy: default configuration of physical channel memcpy * @memcpy_conf_log: default configuration of logical channel memcpy - * @llis_per_log: number of max linked list items per logical channel * @disabled_channels: A vector, ending with -1, that marks physical channels * that are for different reasons not available for the driver. */ @@ -159,23 +140,10 @@ struct stedma40_platform_data { u32 memcpy_len; struct stedma40_chan_cfg *memcpy_conf_phy; struct stedma40_chan_cfg *memcpy_conf_log; - unsigned int llis_per_log; - int disabled_channels[8]; + int disabled_channels[STEDMA40_MAX_PHYS]; }; -/** - * setdma40_set_psize() - Used for changing the package size of an - * already configured dma channel. - * - * @chan: dmaengine handle - * @src_psize: new package side for src. (STEDMA40_PSIZE*) - * @src_psize: new package side for dst. (STEDMA40_PSIZE*) - * - * returns 0 on ok, otherwise negative error number. - */ -int stedma40_set_psize(struct dma_chan *chan, - int src_psize, - int dst_psize); +#ifdef CONFIG_STE_DMA40 /** * stedma40_filter() - Provides stedma40_chan_cfg to the @@ -238,4 +206,21 @@ dma_async_tx_descriptor *stedma40_slave_mem(struct dma_chan *chan, direction, flags); } +#else +static inline bool stedma40_filter(struct dma_chan *chan, void *data) +{ + return false; +} + +static inline struct +dma_async_tx_descriptor *stedma40_slave_mem(struct dma_chan *chan, + dma_addr_t addr, + unsigned int size, + enum dma_data_direction direction, + unsigned long flags) +{ + return NULL; +} +#endif + #endif diff --git a/arch/arm/plat-omap/common.c b/arch/arm/plat-omap/common.c index 221a675..f047318 100644 --- a/arch/arm/plat-omap/common.c +++ b/arch/arm/plat-omap/common.c @@ -19,6 +19,7 @@ #include <plat/common.h> #include <plat/board.h> #include <plat/vram.h> +#include <plat/dsp.h> #define NO_LENGTH_CHECK 0xffffffff @@ -64,4 +65,5 @@ void __init omap_reserve(void) { omapfb_reserve_sdram_memblock(); omap_vram_reserve_sdram_memblock(); + omap_dsp_reserve_sdram_memblock(); } diff --git a/arch/arm/plat-omap/devices.c b/arch/arm/plat-omap/devices.c index 1e2383e..fc81912 100644 --- a/arch/arm/plat-omap/devices.c +++ b/arch/arm/plat-omap/devices.c @@ -15,6 +15,7 @@ #include <linux/platform_device.h> #include <linux/io.h> #include <linux/slab.h> +#include <linux/memblock.h> #include <mach/hardware.h> #include <asm/mach-types.h> @@ -231,6 +232,77 @@ static void omap_init_uwire(void) static inline void omap_init_uwire(void) {} #endif +/*-------------------------------------------------------------------------*/ + +#if defined(CONFIG_OMAP_WATCHDOG) || defined(CONFIG_OMAP_WATCHDOG_MODULE) + +static struct resource wdt_resources[] = { + { + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device omap_wdt_device = { + .name = "omap_wdt", + .id = -1, + .num_resources = ARRAY_SIZE(wdt_resources), + .resource = wdt_resources, +}; + +static void omap_init_wdt(void) +{ + if (cpu_is_omap16xx()) + wdt_resources[0].start = 0xfffeb000; + else if (cpu_is_omap2420()) + wdt_resources[0].start = 0x48022000; /* WDT2 */ + else if (cpu_is_omap2430()) + wdt_resources[0].start = 0x49016000; /* WDT2 */ + else if (cpu_is_omap343x()) + wdt_resources[0].start = 0x48314000; /* WDT2 */ + else if (cpu_is_omap44xx()) + wdt_resources[0].start = 0x4a314000; + else + return; + + wdt_resources[0].end = wdt_resources[0].start + 0x4f; + + (void) platform_device_register(&omap_wdt_device); +} +#else +static inline void omap_init_wdt(void) {} +#endif + +#if defined(CONFIG_TIDSPBRIDGE) || defined(CONFIG_TIDSPBRIDGE_MODULE) + +static phys_addr_t omap_dsp_phys_mempool_base; + +void __init omap_dsp_reserve_sdram_memblock(void) +{ + phys_addr_t size = CONFIG_TIDSPBRIDGE_MEMPOOL_SIZE; + phys_addr_t paddr; + + if (!size) + return; + + paddr = memblock_alloc(size, SZ_1M); + if (!paddr) { + pr_err("%s: failed to reserve %x bytes\n", + __func__, size); + return; + } + memblock_free(paddr, size); + memblock_remove(paddr, size); + + omap_dsp_phys_mempool_base = paddr; +} + +phys_addr_t omap_dsp_get_mempool_base(void) +{ + return omap_dsp_phys_mempool_base; +} +EXPORT_SYMBOL(omap_dsp_get_mempool_base); +#endif + /* * This gets called after board-specific INIT_MACHINE, and initializes most * on-chip peripherals accessible on this board (except for few like USB): diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c index f5c5b8d..2c28265 100644 --- a/arch/arm/plat-omap/dma.c +++ b/arch/arm/plat-omap/dma.c @@ -1983,6 +1983,8 @@ static int omap2_dma_handle_ch(int ch) dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR(ch)); dma_write(1 << ch, IRQSTATUS_L0); + /* read back the register to flush the write */ + dma_read(IRQSTATUS_L0); /* If the ch is not chained then chain_id will be -1 */ if (dma_chan[ch].chain_id != -1) { diff --git a/arch/arm/plat-omap/include/plat/dsp.h b/arch/arm/plat-omap/include/plat/dsp.h new file mode 100644 index 0000000..9c604b3 --- /dev/null +++ b/arch/arm/plat-omap/include/plat/dsp.h @@ -0,0 +1,31 @@ +#ifndef __OMAP_DSP_H__ +#define __OMAP_DSP_H__ + +#include <linux/types.h> + +struct omap_dsp_platform_data { + void (*dsp_set_min_opp) (u8 opp_id); + u8 (*dsp_get_opp) (void); + void (*cpu_set_freq) (unsigned long f); + unsigned long (*cpu_get_freq) (void); + unsigned long mpu_speed[6]; + + /* functions to write and read PRCM registers */ + void (*dsp_prm_write)(u32, s16 , u16); + u32 (*dsp_prm_read)(s16 , u16); + u32 (*dsp_prm_rmw_bits)(u32, u32, s16, s16); + void (*dsp_cm_write)(u32, s16 , u16); + u32 (*dsp_cm_read)(s16 , u16); + u32 (*dsp_cm_rmw_bits)(u32, u32, s16, s16); + + phys_addr_t phys_mempool_base; + phys_addr_t phys_mempool_size; +}; + +#if defined(CONFIG_TIDSPBRIDGE) || defined(CONFIG_TIDSPBRIDGE_MODULE) +extern void omap_dsp_reserve_sdram_memblock(void); +#else +static inline void omap_dsp_reserve_sdram_memblock(void) { } +#endif + +#endif diff --git a/arch/arm/plat-orion/include/plat/pcie.h b/arch/arm/plat-orion/include/plat/pcie.h index 3ebfef7..cc99163 100644 --- a/arch/arm/plat-orion/include/plat/pcie.h +++ b/arch/arm/plat-orion/include/plat/pcie.h @@ -11,12 +11,15 @@ #ifndef __PLAT_PCIE_H #define __PLAT_PCIE_H +struct pci_bus; + u32 orion_pcie_dev_id(void __iomem *base); u32 orion_pcie_rev(void __iomem *base); int orion_pcie_link_up(void __iomem *base); int orion_pcie_x4_mode(void __iomem *base); int orion_pcie_get_local_bus_nr(void __iomem *base); void orion_pcie_set_local_bus_nr(void __iomem *base, int nr); +void orion_pcie_reset(void __iomem *base); void orion_pcie_setup(void __iomem *base, struct mbus_dram_target_info *dram); int orion_pcie_rd_conf(void __iomem *base, struct pci_bus *bus, diff --git a/arch/arm/plat-orion/pcie.c b/arch/arm/plat-orion/pcie.c index 779553a..af2d733 100644 --- a/arch/arm/plat-orion/pcie.c +++ b/arch/arm/plat-orion/pcie.c @@ -182,11 +182,6 @@ void __init orion_pcie_setup(void __iomem *base, u32 mask; /* - * soft reset PCIe unit - */ - orion_pcie_reset(base); - - /* * Point PCIe unit MBUS decode windows to DRAM space. */ orion_pcie_setup_wins(base, dram); diff --git a/arch/arm/plat-pxa/include/plat/pxa3xx_nand.h b/arch/arm/plat-pxa/include/plat/pxa3xx_nand.h index 3478eae..01a8448 100644 --- a/arch/arm/plat-pxa/include/plat/pxa3xx_nand.h +++ b/arch/arm/plat-pxa/include/plat/pxa3xx_nand.h @@ -30,15 +30,15 @@ struct pxa3xx_nand_cmdset { }; struct pxa3xx_nand_flash { - const struct pxa3xx_nand_timing *timing; /* NAND Flash timing */ - const struct pxa3xx_nand_cmdset *cmdset; - - uint32_t page_per_block;/* Pages per block (PG_PER_BLK) */ - uint32_t page_size; /* Page size in bytes (PAGE_SZ) */ - uint32_t flash_width; /* Width of Flash memory (DWIDTH_M) */ - uint32_t dfc_width; /* Width of flash controller(DWIDTH_C) */ - uint32_t num_blocks; /* Number of physical blocks in Flash */ - uint32_t chip_id; + uint32_t chip_id; + unsigned int page_per_block; /* Pages per block (PG_PER_BLK) */ + unsigned int page_size; /* Page size in bytes (PAGE_SZ) */ + unsigned int flash_width; /* Width of Flash memory (DWIDTH_M) */ + unsigned int dfc_width; /* Width of flash controller(DWIDTH_C) */ + unsigned int num_blocks; /* Number of physical blocks in Flash */ + + struct pxa3xx_nand_cmdset *cmdset; /* NAND command set */ + struct pxa3xx_nand_timing *timing; /* NAND Flash timing */ }; struct pxa3xx_nand_platform_data { diff --git a/arch/arm/plat-pxa/include/plat/sdhci.h b/arch/arm/plat-pxa/include/plat/sdhci.h new file mode 100644 index 0000000..e49c5b6 --- /dev/null +++ b/arch/arm/plat-pxa/include/plat/sdhci.h @@ -0,0 +1,32 @@ +/* linux/arch/arm/plat-pxa/include/plat/sdhci.h + * + * Copyright 2010 Marvell + * Zhangfei Gao <zhangfei.gao@marvell.com> + * + * PXA Platform - SDHCI platform data definitions + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __PLAT_PXA_SDHCI_H +#define __PLAT_PXA_SDHCI_H + +/* pxa specific flag */ +/* Require clock free running */ +#define PXA_FLAG_DISABLE_CLOCK_GATING (1<<0) + +/* + * struct pxa_sdhci_platdata() - Platform device data for PXA SDHCI + * @max_speed: the maximum speed supported + * @quirks: quirks of specific device + * @flags: flags for platform requirement + */ +struct sdhci_pxa_platdata { + unsigned int max_speed; + unsigned int quirks; + unsigned int flags; +}; + +#endif /* __PLAT_PXA_SDHCI_H */ diff --git a/arch/arm/plat-s3c24xx/Kconfig b/arch/arm/plat-s3c24xx/Kconfig index 984bf66..5a27b1b 100644 --- a/arch/arm/plat-s3c24xx/Kconfig +++ b/arch/arm/plat-s3c24xx/Kconfig @@ -69,6 +69,7 @@ config S3C24XX_GPIO_EXTRA int default 128 if S3C24XX_GPIO_EXTRA128 default 64 if S3C24XX_GPIO_EXTRA64 + default 16 if ARCH_H1940 default 0 config S3C24XX_GPIO_EXTRA64 diff --git a/arch/arm/plat-s3c24xx/gpiolib.c b/arch/arm/plat-s3c24xx/gpiolib.c index 243b641..24c6f5a 100644 --- a/arch/arm/plat-s3c24xx/gpiolib.c +++ b/arch/arm/plat-s3c24xx/gpiolib.c @@ -82,6 +82,8 @@ static struct s3c_gpio_cfg s3c24xx_gpiocfg_banka = { struct s3c_gpio_cfg s3c24xx_gpiocfg_default = { .set_config = s3c_gpio_setcfg_s3c24xx, .get_config = s3c_gpio_getcfg_s3c24xx, + .set_pull = s3c_gpio_setpull_1up, + .get_pull = s3c_gpio_getpull_1up, }; struct s3c_gpio_chip s3c24xx_gpios[] = { |
