diff options
Diffstat (limited to 'arch/arm')
31 files changed, 139 insertions, 74 deletions
diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi index 80e29c6..4801717 100644 --- a/arch/arm/boot/dts/at91sam9n12.dtsi +++ b/arch/arm/boot/dts/at91sam9n12.dtsi @@ -324,8 +324,6 @@ compatible = "atmel,at91sam9260-usart"; reg = <0xf801c000 0x4000>; interrupts = <5 4 5>; - atmel,use-dma-rx; - atmel,use-dma-tx; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart0>; status = "disabled"; @@ -335,8 +333,6 @@ compatible = "atmel,at91sam9260-usart"; reg = <0xf8020000 0x4000>; interrupts = <6 4 5>; - atmel,use-dma-rx; - atmel,use-dma-tx; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart1>; status = "disabled"; @@ -346,8 +342,6 @@ compatible = "atmel,at91sam9260-usart"; reg = <0xf8024000 0x4000>; interrupts = <7 4 5>; - atmel,use-dma-rx; - atmel,use-dma-tx; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart2>; status = "disabled"; @@ -357,8 +351,6 @@ compatible = "atmel,at91sam9260-usart"; reg = <0xf8028000 0x4000>; interrupts = <8 4 5>; - atmel,use-dma-rx; - atmel,use-dma-tx; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart3>; status = "disabled"; diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi index 8ecca69..d112c3a 100644 --- a/arch/arm/boot/dts/at91sam9x5.dtsi +++ b/arch/arm/boot/dts/at91sam9x5.dtsi @@ -197,9 +197,9 @@ }; usart3 { - pinctrl_uart3: usart3-0 { + pinctrl_usart3: usart3-0 { atmel,pins = - <2 23 0x2 0x1 /* PC22 periph B with pullup */ + <2 22 0x2 0x1 /* PC22 periph B with pullup */ 2 23 0x2 0x0>; /* PC23 periph B */ }; @@ -402,8 +402,6 @@ compatible = "atmel,at91sam9260-usart"; reg = <0xf801c000 0x200>; interrupts = <5 4 5>; - atmel,use-dma-rx; - atmel,use-dma-tx; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart0>; status = "disabled"; @@ -413,8 +411,6 @@ compatible = "atmel,at91sam9260-usart"; reg = <0xf8020000 0x200>; interrupts = <6 4 5>; - atmel,use-dma-rx; - atmel,use-dma-tx; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart1>; status = "disabled"; @@ -424,8 +420,6 @@ compatible = "atmel,at91sam9260-usart"; reg = <0xf8024000 0x200>; interrupts = <7 4 5>; - atmel,use-dma-rx; - atmel,use-dma-tx; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart2>; status = "disabled"; diff --git a/arch/arm/boot/dts/dove.dtsi b/arch/arm/boot/dts/dove.dtsi index 42eac1f..740630f 100644 --- a/arch/arm/boot/dts/dove.dtsi +++ b/arch/arm/boot/dts/dove.dtsi @@ -93,6 +93,7 @@ reg = <0xd0400 0x20>; ngpios = <32>; interrupt-controller; + #interrupt-cells = <2>; interrupts = <12>, <13>, <14>, <60>; }; @@ -103,6 +104,7 @@ reg = <0xd0420 0x20>; ngpios = <32>; interrupt-controller; + #interrupt-cells = <2>; interrupts = <61>; }; diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi index e31bfc4..2feffc7 100644 --- a/arch/arm/boot/dts/exynos4210.dtsi +++ b/arch/arm/boot/dts/exynos4210.dtsi @@ -48,13 +48,13 @@ }; pinctrl_0: pinctrl@11400000 { - compatible = "samsung,pinctrl-exynos4210"; + compatible = "samsung,exynos4210-pinctrl"; reg = <0x11400000 0x1000>; interrupts = <0 47 0>; }; pinctrl_1: pinctrl@11000000 { - compatible = "samsung,pinctrl-exynos4210"; + compatible = "samsung,exynos4210-pinctrl"; reg = <0x11000000 0x1000>; interrupts = <0 46 0>; @@ -66,7 +66,7 @@ }; pinctrl_2: pinctrl@03860000 { - compatible = "samsung,pinctrl-exynos4210"; + compatible = "samsung,exynos4210-pinctrl"; reg = <0x03860000 0x1000>; }; diff --git a/arch/arm/boot/dts/exynos4x12.dtsi b/arch/arm/boot/dts/exynos4x12.dtsi index 179a62e..9a87806 100644 --- a/arch/arm/boot/dts/exynos4x12.dtsi +++ b/arch/arm/boot/dts/exynos4x12.dtsi @@ -37,13 +37,13 @@ }; pinctrl_0: pinctrl@11400000 { - compatible = "samsung,pinctrl-exynos4x12"; + compatible = "samsung,exynos4x12-pinctrl"; reg = <0x11400000 0x1000>; interrupts = <0 47 0>; }; pinctrl_1: pinctrl@11000000 { - compatible = "samsung,pinctrl-exynos4x12"; + compatible = "samsung,exynos4x12-pinctrl"; reg = <0x11000000 0x1000>; interrupts = <0 46 0>; @@ -55,14 +55,14 @@ }; pinctrl_2: pinctrl@03860000 { - compatible = "samsung,pinctrl-exynos4x12"; + compatible = "samsung,exynos4x12-pinctrl"; reg = <0x03860000 0x1000>; interrupt-parent = <&combiner>; interrupts = <10 0>; }; pinctrl_3: pinctrl@106E0000 { - compatible = "samsung,pinctrl-exynos4x12"; + compatible = "samsung,exynos4x12-pinctrl"; reg = <0x106E0000 0x1000>; interrupts = <0 72 0>; }; diff --git a/arch/arm/boot/dts/exynos5440.dtsi b/arch/arm/boot/dts/exynos5440.dtsi index 024269d..5f3562a 100644 --- a/arch/arm/boot/dts/exynos5440.dtsi +++ b/arch/arm/boot/dts/exynos5440.dtsi @@ -86,7 +86,7 @@ }; pinctrl { - compatible = "samsung,pinctrl-exynos5440"; + compatible = "samsung,exynos5440-pinctrl"; reg = <0xE0000 0x1000>; interrupt-controller; #interrupt-cells = <2>; @@ -154,6 +154,6 @@ rtc { compatible = "samsung,s3c6410-rtc"; reg = <0x130000 0x1000>; - interrupts = <0 16 0>, <0 17 0>; + interrupts = <0 17 0>, <0 16 0>; }; }; diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi index d6265ca..ff1205e 100644 --- a/arch/arm/boot/dts/imx6q.dtsi +++ b/arch/arm/boot/dts/imx6q.dtsi @@ -866,7 +866,7 @@ compatible = "fsl,imx6q-fec"; reg = <0x02188000 0x4000>; interrupts = <0 118 0x04 0 119 0x04>; - clocks = <&clks 117>, <&clks 117>, <&clks 177>; + clocks = <&clks 117>, <&clks 117>, <&clks 190>; clock-names = "ipg", "ahb", "ptp"; status = "disabled"; }; diff --git a/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts b/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts index a3d37ec..7318717 100644 --- a/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts +++ b/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts @@ -70,7 +70,7 @@ compatible = "arm,sp805", "arm,primecell"; status = "disabled"; reg = <0 0x2b060000 0 0x1000>; - interrupts = <98>; + interrupts = <0 98 4>; clocks = <&oscclk7>; clock-names = "apb_pclk"; }; diff --git a/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts b/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts index cf8071a..dfe371e 100644 --- a/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts +++ b/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts @@ -72,7 +72,7 @@ wdt@2a490000 { compatible = "arm,sp805", "arm,primecell"; reg = <0 0x2a490000 0 0x1000>; - interrupts = <98>; + interrupts = <0 98 4>; clocks = <&oscclk6a>, <&oscclk6a>; clock-names = "wdogclk", "apb_pclk"; }; diff --git a/arch/arm/configs/mvebu_defconfig b/arch/arm/configs/mvebu_defconfig index b5bc96c..cbd91bc 100644 --- a/arch/arm/configs/mvebu_defconfig +++ b/arch/arm/configs/mvebu_defconfig @@ -33,6 +33,8 @@ CONFIG_MVNETA=y CONFIG_MARVELL_PHY=y CONFIG_SERIAL_8250=y CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_I2C=y +CONFIG_I2C_MV64XXX=y CONFIG_SERIAL_8250_DW=y CONFIG_GPIOLIB=y CONFIG_GPIO_SYSFS=y diff --git a/arch/arm/configs/u8500_defconfig b/arch/arm/configs/u8500_defconfig index 231dca6..426270f 100644 --- a/arch/arm/configs/u8500_defconfig +++ b/arch/arm/configs/u8500_defconfig @@ -66,9 +66,9 @@ CONFIG_SPI=y CONFIG_SPI_PL022=y CONFIG_GPIO_STMPE=y CONFIG_GPIO_TC3589X=y -CONFIG_POWER_SUPPLY=y -CONFIG_AB8500_BM=y -CONFIG_AB8500_BATTERY_THERM_ON_BATCTRL=y +# CONFIG_POWER_SUPPLY is not set +# CONFIG_AB8500_BM is not set +# CONFIG_AB8500_BATTERY_THERM_ON_BATCTRL is not set CONFIG_THERMAL=y CONFIG_CPU_THERMAL=y CONFIG_MFD_STMPE=y diff --git a/arch/arm/include/asm/smp_scu.h b/arch/arm/include/asm/smp_scu.h index 4eb6d00..86dff32 100644 --- a/arch/arm/include/asm/smp_scu.h +++ b/arch/arm/include/asm/smp_scu.h @@ -7,8 +7,14 @@ #ifndef __ASSEMBLER__ unsigned int scu_get_core_count(void __iomem *); -void scu_enable(void __iomem *); int scu_power_mode(void __iomem *, unsigned int); + +#ifdef CONFIG_SMP +void scu_enable(void __iomem *scu_base); +#else +static inline void scu_enable(void __iomem *scu_base) {} +#endif + #endif #endif diff --git a/arch/arm/kernel/smp_scu.c b/arch/arm/kernel/smp_scu.c index b9f015e..45eac87 100644 --- a/arch/arm/kernel/smp_scu.c +++ b/arch/arm/kernel/smp_scu.c @@ -75,7 +75,7 @@ void scu_enable(void __iomem *scu_base) int scu_power_mode(void __iomem *scu_base, unsigned int mode) { unsigned int val; - int cpu = cpu_logical_map(smp_processor_id()); + int cpu = MPIDR_AFFINITY_LEVEL(cpu_logical_map(smp_processor_id()), 0); if (mode > 3 || mode == 1 || cpu > 3) return -EINVAL; diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c index 1a89824..0c7e3ad 100644 --- a/arch/arm/mach-exynos/common.c +++ b/arch/arm/mach-exynos/common.c @@ -299,6 +299,7 @@ void exynos4_restart(char mode, const char *cmd) void exynos5_restart(char mode, const char *cmd) { + struct device_node *np; u32 val; void __iomem *addr; @@ -306,8 +307,9 @@ void exynos5_restart(char mode, const char *cmd) val = 0x1; addr = EXYNOS_SWRESET; } else if (of_machine_is_compatible("samsung,exynos5440")) { - val = (0x10 << 20) | (0x1 << 16); - addr = EXYNOS5440_SWRESET; + np = of_find_compatible_node(NULL, NULL, "samsung,exynos5440-clock"); + addr = of_iomap(np, 0) + 0xcc; + val = (0xfff << 20) | (0x1 << 16); } else { pr_err("%s: cannot support non-DT\n", __func__); return; @@ -1031,8 +1033,8 @@ static int __init exynos_init_irq_eint(void) * interrupt support code here can be completely removed. */ static const struct of_device_id exynos_pinctrl_ids[] = { - { .compatible = "samsung,pinctrl-exynos4210", }, - { .compatible = "samsung,pinctrl-exynos4x12", }, + { .compatible = "samsung,exynos4210-pinctrl", }, + { .compatible = "samsung,exynos4x12-pinctrl", }, }; struct device_node *pctrl_np, *wkup_np; const char *wkup_compat = "samsung,exynos4210-wakeup-eint"; diff --git a/arch/arm/mach-highbank/highbank.c b/arch/arm/mach-highbank/highbank.c index 981dc1e..e6c0612 100644 --- a/arch/arm/mach-highbank/highbank.c +++ b/arch/arm/mach-highbank/highbank.c @@ -28,6 +28,7 @@ #include <asm/arch_timer.h> #include <asm/cacheflush.h> +#include <asm/cputype.h> #include <asm/smp_plat.h> #include <asm/smp_twd.h> #include <asm/hardware/arm_timer.h> @@ -59,7 +60,7 @@ static void __init highbank_scu_map_io(void) void highbank_set_cpu_jump(int cpu, void *jump_addr) { - cpu = cpu_logical_map(cpu); + cpu = MPIDR_AFFINITY_LEVEL(cpu_logical_map(cpu), 0); writel(virt_to_phys(jump_addr), HB_JUMP_TABLE_VIRT(cpu)); __cpuc_flush_dcache_area(HB_JUMP_TABLE_VIRT(cpu), 16); outer_clean_range(HB_JUMP_TABLE_PHYS(cpu), diff --git a/arch/arm/mach-highbank/sysregs.h b/arch/arm/mach-highbank/sysregs.h index 70af9d1..5995df7 100644 --- a/arch/arm/mach-highbank/sysregs.h +++ b/arch/arm/mach-highbank/sysregs.h @@ -37,7 +37,7 @@ extern void __iomem *sregs_base; static inline void highbank_set_core_pwr(void) { - int cpu = cpu_logical_map(smp_processor_id()); + int cpu = MPIDR_AFFINITY_LEVEL(cpu_logical_map(smp_processor_id()), 0); if (scu_base_addr) scu_power_mode(scu_base_addr, SCU_PM_POWEROFF); else @@ -46,7 +46,7 @@ static inline void highbank_set_core_pwr(void) static inline void highbank_clear_core_pwr(void) { - int cpu = cpu_logical_map(smp_processor_id()); + int cpu = MPIDR_AFFINITY_LEVEL(cpu_logical_map(smp_processor_id()), 0); if (scu_base_addr) scu_power_mode(scu_base_addr, SCU_PM_NORMAL); else diff --git a/arch/arm/mach-integrator/integrator_ap.c b/arch/arm/mach-integrator/integrator_ap.c index 11b1d21..592c168 100644 --- a/arch/arm/mach-integrator/integrator_ap.c +++ b/arch/arm/mach-integrator/integrator_ap.c @@ -613,7 +613,6 @@ static struct map_desc ap_io_desc_atag[] __initdata = { static void __init ap_map_io_atag(void) { iotable_init(ap_io_desc_atag, ARRAY_SIZE(ap_io_desc_atag)); - ap_syscon_base = __io_address(INTEGRATOR_SC_BASE); ap_map_io(); } @@ -685,6 +684,7 @@ static void __init ap_init(void) platform_device_register(&cfi_flash_device); + ap_syscon_base = __io_address(INTEGRATOR_SC_BASE); sc_dec = readl(ap_syscon_base + INTEGRATOR_SC_DEC_OFFSET); for (i = 0; i < 4; i++) { struct lm_device *lmdev; diff --git a/arch/arm/mach-msm/proc_comm.h b/arch/arm/mach-msm/proc_comm.h index 12da4ca..e8d043a 100644 --- a/arch/arm/mach-msm/proc_comm.h +++ b/arch/arm/mach-msm/proc_comm.h @@ -253,6 +253,6 @@ enum { (((drvstr) & 0xF) << 17)) int msm_proc_comm(unsigned cmd, unsigned *data1, unsigned *data2); -void __init proc_comm_boot_wait(void); +void proc_comm_boot_wait(void); #endif diff --git a/arch/arm/mach-omap2/omap-wakeupgen.c b/arch/arm/mach-omap2/omap-wakeupgen.c index 5d3b4f4..8633a43 100644 --- a/arch/arm/mach-omap2/omap-wakeupgen.c +++ b/arch/arm/mach-omap2/omap-wakeupgen.c @@ -46,7 +46,7 @@ static void __iomem *wakeupgen_base; static void __iomem *sar_base; -static DEFINE_SPINLOCK(wakeupgen_lock); +static DEFINE_RAW_SPINLOCK(wakeupgen_lock); static unsigned int irq_target_cpu[MAX_IRQS]; static unsigned int irq_banks = MAX_NR_REG_BANKS; static unsigned int max_irqs = MAX_IRQS; @@ -134,9 +134,9 @@ static void wakeupgen_mask(struct irq_data *d) { unsigned long flags; - spin_lock_irqsave(&wakeupgen_lock, flags); + raw_spin_lock_irqsave(&wakeupgen_lock, flags); _wakeupgen_clear(d->irq, irq_target_cpu[d->irq]); - spin_unlock_irqrestore(&wakeupgen_lock, flags); + raw_spin_unlock_irqrestore(&wakeupgen_lock, flags); } /* @@ -146,9 +146,9 @@ static void wakeupgen_unmask(struct irq_data *d) { unsigned long flags; - spin_lock_irqsave(&wakeupgen_lock, flags); + raw_spin_lock_irqsave(&wakeupgen_lock, flags); _wakeupgen_set(d->irq, irq_target_cpu[d->irq]); - spin_unlock_irqrestore(&wakeupgen_lock, flags); + raw_spin_unlock_irqrestore(&wakeupgen_lock, flags); } #ifdef CONFIG_HOTPLUG_CPU @@ -189,7 +189,7 @@ static void wakeupgen_irqmask_all(unsigned int cpu, unsigned int set) { unsigned long flags; - spin_lock_irqsave(&wakeupgen_lock, flags); + raw_spin_lock_irqsave(&wakeupgen_lock, flags); if (set) { _wakeupgen_save_masks(cpu); _wakeupgen_set_all(cpu, WKG_MASK_ALL); @@ -197,7 +197,7 @@ static void wakeupgen_irqmask_all(unsigned int cpu, unsigned int set) _wakeupgen_set_all(cpu, WKG_UNMASK_ALL); _wakeupgen_restore_masks(cpu); } - spin_unlock_irqrestore(&wakeupgen_lock, flags); + raw_spin_unlock_irqrestore(&wakeupgen_lock, flags); } #endif diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c index b8ad6e6..265de51 100644 --- a/arch/arm/mach-omap2/timer.c +++ b/arch/arm/mach-omap2/timer.c @@ -228,7 +228,7 @@ static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer, int r = 0; if (of_have_populated_dt()) { - np = omap_get_timer_dt(omap_timer_match, NULL); + np = omap_get_timer_dt(omap_timer_match, property); if (!np) return -ENODEV; diff --git a/arch/arm/mach-omap2/twl-common.c b/arch/arm/mach-omap2/twl-common.c index e49b40b..6a7aec6 100644 --- a/arch/arm/mach-omap2/twl-common.c +++ b/arch/arm/mach-omap2/twl-common.c @@ -23,6 +23,7 @@ #include <linux/i2c.h> #include <linux/i2c/twl.h> #include <linux/gpio.h> +#include <linux/string.h> #include <linux/regulator/machine.h> #include <linux/regulator/fixed.h> @@ -56,7 +57,7 @@ void __init omap_pmic_init(int bus, u32 clkrate, struct twl4030_platform_data *pmic_data) { omap_mux_init_signal("sys_nirq", OMAP_PIN_INPUT_PULLUP | OMAP_PIN_OFF_WAKEUPENABLE); - strncpy(pmic_i2c_board_info.type, pmic_type, + strlcpy(pmic_i2c_board_info.type, pmic_type, sizeof(pmic_i2c_board_info.type)); pmic_i2c_board_info.irq = pmic_irq; pmic_i2c_board_info.platform_data = pmic_data; diff --git a/arch/arm/mach-pxa/include/mach/palmtreo.h b/arch/arm/mach-pxa/include/mach/palmtreo.h index 2d3f14e..714b657 100644 --- a/arch/arm/mach-pxa/include/mach/palmtreo.h +++ b/arch/arm/mach-pxa/include/mach/palmtreo.h @@ -38,13 +38,14 @@ #define GPIO_NR_TREO_LCD_POWER 25 /* Treo680 specific GPIOs */ -#ifdef CONFIG_MACH_TREO680 #define GPIO_NR_TREO680_SD_READONLY 33 #define GPIO_NR_TREO680_SD_POWER 42 #define GPIO_NR_TREO680_VIBRATE_EN 44 #define GPIO_NR_TREO680_KEYB_BL 24 #define GPIO_NR_TREO680_BT_EN 43 -#endif /* CONFIG_MACH_TREO680 */ +#define GPIO_NR_TREO680_LCD_POWER 77 +#define GPIO_NR_TREO680_LCD_EN 86 +#define GPIO_NR_TREO680_LCD_EN_N 25 /* Centro685 specific GPIOs */ #define GPIO_NR_CENTRO_SD_POWER 21 diff --git a/arch/arm/mach-pxa/include/mach/smemc.h b/arch/arm/mach-pxa/include/mach/smemc.h index b7de471..b802f285 100644 --- a/arch/arm/mach-pxa/include/mach/smemc.h +++ b/arch/arm/mach-pxa/include/mach/smemc.h @@ -37,6 +37,7 @@ #define CSADRCFG1 (SMEMC_VIRT + 0x84) /* Address Configuration Register for CS1 */ #define CSADRCFG2 (SMEMC_VIRT + 0x88) /* Address Configuration Register for CS2 */ #define CSADRCFG3 (SMEMC_VIRT + 0x8C) /* Address Configuration Register for CS3 */ +#define CSMSADRCFG (SMEMC_VIRT + 0xA0) /* Chip Select Configuration Register */ /* * More handy macros for PCMCIA diff --git a/arch/arm/mach-pxa/palmtreo.c b/arch/arm/mach-pxa/palmtreo.c index 3f3c48f..5775128 100644 --- a/arch/arm/mach-pxa/palmtreo.c +++ b/arch/arm/mach-pxa/palmtreo.c @@ -98,9 +98,6 @@ static unsigned long treo_pin_config[] __initdata = { GPIO96_KP_MKOUT_6, GPIO93_KP_DKIN_0 | WAKEUP_ON_LEVEL_HIGH, /* Hotsync button */ - /* LCD */ - GPIOxx_LCD_TFT_16BPP, - /* Quick Capture Interface */ GPIO84_CIF_FV, GPIO85_CIF_LV, @@ -140,6 +137,12 @@ static unsigned long treo680_pin_config[] __initdata = { /* MATRIX KEYPAD - different wake up source */ GPIO100_KP_MKIN_0 | WAKEUP_ON_LEVEL_HIGH, GPIO99_KP_MKIN_5, + + /* LCD... L_BIAS alt fn not configured on Treo680; is GPIO instead */ + GPIOxx_LCD_16BPP, + GPIO74_LCD_FCLK, + GPIO75_LCD_LCLK, + GPIO76_LCD_PCLK, }; #endif /* CONFIG_MACH_TREO680 */ @@ -155,6 +158,9 @@ static unsigned long centro685_pin_config[] __initdata = { /* MATRIX KEYPAD - different wake up source */ GPIO100_KP_MKIN_0, GPIO99_KP_MKIN_5 | WAKEUP_ON_LEVEL_HIGH, + + /* LCD */ + GPIOxx_LCD_TFT_16BPP, }; #endif /* CONFIG_MACH_CENTRO */ @@ -328,7 +334,6 @@ static inline void palmtreo_uhc_init(void) {} /****************************************************************************** * Vibra and LEDs ******************************************************************************/ -#ifdef CONFIG_MACH_TREO680 static struct gpio_led treo680_gpio_leds[] = { { .name = "treo680:vibra:vibra", @@ -379,21 +384,17 @@ static struct gpio_led_platform_data centro_gpio_led_info = { static struct platform_device palmtreo_leds = { .name = "leds-gpio", .id = -1, - .dev = { - .platform_data = &treo680_gpio_led_info, - } }; static void __init palmtreo_leds_init(void) { if (machine_is_centro()) palmtreo_leds.dev.platform_data = ¢ro_gpio_led_info; + else if (machine_is_treo680()) + palmtreo_leds.dev.platform_data = &treo680_gpio_led_info; platform_device_register(&palmtreo_leds); } -#else -static inline void palmtreo_leds_init(void) {} -#endif /****************************************************************************** * Machine init @@ -424,10 +425,59 @@ static void __init palmphone_common_init(void) } #ifdef CONFIG_MACH_TREO680 +void __init treo680_gpio_init(void) +{ + unsigned int gpio; + + /* drive all three lcd gpios high initially */ + const unsigned long lcd_flags = GPIOF_INIT_HIGH | GPIOF_DIR_OUT; + + /* + * LCD GPIO initialization... + */ + + /* + * This is likely the power to the lcd. Toggling it low/high appears to + * turn the lcd off/on. Can be toggled after lcd is initialized without + * any apparent adverse effects to the lcd operation. Note that this + * gpio line is used by the lcd controller as the L_BIAS signal, but + * treo680 configures it as gpio. + */ + gpio = GPIO_NR_TREO680_LCD_POWER; + if (gpio_request_one(gpio, lcd_flags, "LCD power") < 0) + goto fail; + + /* + * These two are called "enables", for lack of a better understanding. + * If either of these are toggled after the lcd is initialized, the + * image becomes degraded. N.B. The IPL shipped with the treo + * configures GPIO_NR_TREO680_LCD_EN_N as output and drives it high. If + * the IPL is ever reprogrammed, this initialization may be need to be + * revisited. + */ + gpio = GPIO_NR_TREO680_LCD_EN; + if (gpio_request_one(gpio, lcd_flags, "LCD enable") < 0) + goto fail; + gpio = GPIO_NR_TREO680_LCD_EN_N; + if (gpio_request_one(gpio, lcd_flags, "LCD enable_n") < 0) + goto fail; + + /* driving this low turns LCD on */ + gpio_set_value(GPIO_NR_TREO680_LCD_EN_N, 0); + + return; + fail: + pr_err("gpio %d initialization failed\n", gpio); + gpio_free(GPIO_NR_TREO680_LCD_POWER); + gpio_free(GPIO_NR_TREO680_LCD_EN); + gpio_free(GPIO_NR_TREO680_LCD_EN_N); +} + static void __init treo680_init(void) { pxa2xx_mfp_config(ARRAY_AND_SIZE(treo680_pin_config)); palmphone_common_init(); + treo680_gpio_init(); palm27x_mmc_init(GPIO_NR_TREO_SD_DETECT_N, GPIO_NR_TREO680_SD_READONLY, GPIO_NR_TREO680_SD_POWER, 0); } diff --git a/arch/arm/mach-pxa/smemc.c b/arch/arm/mach-pxa/smemc.c index 7992305..f38aa89 100644 --- a/arch/arm/mach-pxa/smemc.c +++ b/arch/arm/mach-pxa/smemc.c @@ -40,6 +40,8 @@ static void pxa3xx_smemc_resume(void) __raw_writel(csadrcfg[1], CSADRCFG1); __raw_writel(csadrcfg[2], CSADRCFG2); __raw_writel(csadrcfg[3], CSADRCFG3); + /* CSMSADRCFG wakes up in its default state (0), so we need to set it */ + __raw_writel(0x2, CSMSADRCFG); } static struct syscore_ops smemc_syscore_ops = { @@ -49,8 +51,19 @@ static struct syscore_ops smemc_syscore_ops = { static int __init smemc_init(void) { - if (cpu_is_pxa3xx()) + if (cpu_is_pxa3xx()) { + /* + * The only documentation we have on the + * Chip Select Configuration Register (CSMSADRCFG) is that + * it must be programmed to 0x2. + * Moreover, in the bit definitions, the second bit + * (CSMSADRCFG[1]) is called "SETALWAYS". + * Other bits are reserved in this register. + */ + __raw_writel(0x2, CSMSADRCFG); + register_syscore_ops(&smemc_syscore_ops); + } return 0; } diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c index 2073f0e..7e2cb88 100644 --- a/arch/arm/mach-pxa/spitz.c +++ b/arch/arm/mach-pxa/spitz.c @@ -732,7 +732,7 @@ static inline void spitz_lcd_init(void) {} #endif /****************************************************************************** - * Framebuffer + * NAND Flash ******************************************************************************/ #if defined(CONFIG_MTD_NAND_SHARPSL) || defined(CONFIG_MTD_NAND_SHARPSL_MODULE) static struct mtd_partition spitz_nand_partitions[] = { @@ -858,7 +858,7 @@ static inline void spitz_nor_init(void) {} #endif /****************************************************************************** - * GPIO expander + * I2C devices ******************************************************************************/ #if defined(CONFIG_I2C_PXA) || defined(CONFIG_I2C_PXA_MODULE) static struct pca953x_platform_data akita_pca953x_pdata = { diff --git a/arch/arm/mach-s3c24xx/common.c b/arch/arm/mach-s3c24xx/common.c index 0c9e9a7..6bcf87f 100644 --- a/arch/arm/mach-s3c24xx/common.c +++ b/arch/arm/mach-s3c24xx/common.c @@ -197,7 +197,7 @@ static unsigned long s3c24xx_read_idcode_v4(void) static void s3c24xx_default_idle(void) { - unsigned long tmp; + unsigned long tmp = 0; int i; /* idle the system by using the idle mode which will wait for an diff --git a/arch/arm/mach-ux500/cpu.c b/arch/arm/mach-ux500/cpu.c index 721e7b4..d4dcec53 100644 --- a/arch/arm/mach-ux500/cpu.c +++ b/arch/arm/mach-ux500/cpu.c @@ -71,13 +71,11 @@ void __init ux500_init_irq(void) * Init clocks here so that they are available for system timer * initialization. */ - if (cpu_is_u8500_family()) + if (cpu_is_u8500_family() || cpu_is_u9540()) db8500_prcmu_early_init(); - if (cpu_is_u8500_family()) + if (cpu_is_u8500_family() || cpu_is_u9540()) u8500_clk_init(); - else if (cpu_is_u9540()) - u9540_clk_init(); else if (cpu_is_u8540()) u8540_clk_init(); } diff --git a/arch/arm/mach-ux500/cpuidle.c b/arch/arm/mach-ux500/cpuidle.c index b54884bd..ce91493 100644 --- a/arch/arm/mach-ux500/cpuidle.c +++ b/arch/arm/mach-ux500/cpuidle.c @@ -40,8 +40,10 @@ static inline int ux500_enter_idle(struct cpuidle_device *dev, goto wfi; /* decouple the gic from the A9 cores */ - if (prcmu_gic_decouple()) + if (prcmu_gic_decouple()) { + spin_unlock(&master_lock); goto out; + } /* If an error occur, we will have to recouple the gic * manually */ diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c index 4136b20..e06c34b 100644 --- a/arch/arm/plat-omap/dma.c +++ b/arch/arm/plat-omap/dma.c @@ -2019,7 +2019,7 @@ static int omap_system_dma_probe(struct platform_device *pdev) errata = p->errata; if ((d->dev_caps & RESERVE_CHANNEL) && omap_dma_reserve_channels - && (omap_dma_reserve_channels <= dma_lch_count)) + && (omap_dma_reserve_channels < d->lch_count)) d->lch_count = omap_dma_reserve_channels; dma_lch_count = d->lch_count; diff --git a/arch/arm/plat-orion/mpp.c b/arch/arm/plat-orion/mpp.c index e686fe76..7310bcf 100644 --- a/arch/arm/plat-orion/mpp.c +++ b/arch/arm/plat-orion/mpp.c @@ -49,7 +49,7 @@ void __init orion_mpp_conf(unsigned int *mpp_list, unsigned int variant_mask, "number (%u)\n", num); continue; } - if (variant_mask & !(*mpp_list & variant_mask)) { + if (variant_mask && !(*mpp_list & variant_mask)) { printk(KERN_WARNING "orion_mpp_conf: requested MPP%u config " "unavailable on this hardware\n", num); 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