diff options
Diffstat (limited to 'arch/arm/mach-omap2')
27 files changed, 622 insertions, 688 deletions
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index 89bfb49..497e9dc 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -108,9 +108,13 @@ comment "OMAP Board Type" depends on ARCH_OMAP2PLUS config MACH_OMAP_GENERIC - bool "Generic OMAP board" - depends on ARCH_OMAP2 + bool "Generic OMAP2+ board" + depends on ARCH_OMAP2PLUS + select USE_OF default y + help + Support for generic TI OMAP2+ boards using Flattened Device Tree. + More information at Documentation/devicetree config MACH_OMAP2_TUSB6010 bool diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c index 7ac5462..0c42797 100644 --- a/arch/arm/mach-omap2/board-generic.c +++ b/arch/arm/mach-omap2/board-generic.c @@ -1,75 +1,158 @@ /* - * linux/arch/arm/mach-omap2/board-generic.c - * * Copyright (C) 2005 Nokia Corporation * Author: Paul Mundt <paul.mundt@nokia.com> * - * Modified from mach-omap/omap1/board-generic.c + * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ * - * Code for generic OMAP2 board. Should work on many OMAP2 systems where - * the bootloader passes the board-specific data to the kernel. - * Do not put any board specific code to this file; create a new machine - * type if you need custom low-level initializations. + * Modified from the original mach-omap/omap2/board-generic.c did by Paul + * to support the OMAP2+ device tree boards with an unique board file. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ -#include <linux/gpio.h> -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/device.h> + +#include <linux/io.h> +#include <linux/of_platform.h> +#include <linux/irqdomain.h> +#include <linux/i2c/twl.h> #include <mach/hardware.h> -#include <asm/mach-types.h> #include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <plat/usb.h> #include <plat/board.h> #include <plat/common.h> +#include <mach/omap4-common.h> +#include "common-board-devices.h" -static struct omap_board_config_kernel generic_config[] = { +/* + * XXX: Still needed to boot until the i2c & twl driver is adapted to + * device-tree + */ +static struct twl4030_platform_data sdp4430_twldata = { + .irq_base = TWL6030_IRQ_BASE, + .irq_end = TWL6030_IRQ_END, }; -static void __init omap_generic_init_early(void) +static void __init omap4_i2c_init(void) { - omap2_init_common_infrastructure(); + omap4_pmic_init("twl6030", &sdp4430_twldata); } +static struct twl4030_platform_data beagle_twldata = { + .irq_base = TWL4030_IRQ_BASE, + .irq_end = TWL4030_IRQ_END, +}; + +static void __init omap3_i2c_init(void) +{ + omap3_pmic_init("twl4030", &beagle_twldata); +} + +static struct of_device_id omap_dt_match_table[] __initdata = { + { .compatible = "simple-bus", }, + { .compatible = "ti,omap-infra", }, + { } +}; + +static struct of_device_id intc_match[] __initdata = { + { .compatible = "ti,omap3-intc", }, + { .compatible = "arm,cortex-a9-gic", }, + { } +}; + static void __init omap_generic_init(void) { + struct device_node *node = of_find_matching_node(NULL, intc_match); + if (node) + irq_domain_add_simple(node, 0); + omap_serial_init(); omap_sdrc_init(NULL, NULL); - omap_board_config = generic_config; - omap_board_config_size = ARRAY_SIZE(generic_config); + + of_platform_populate(NULL, omap_dt_match_table, NULL, NULL); +} + +static void __init omap4_init(void) +{ + omap4_i2c_init(); + omap_generic_init(); } -static void __init omap_generic_map_io(void) +static void __init omap3_init(void) { - if (cpu_is_omap242x()) { - omap2_set_globals_242x(); - omap242x_map_common_io(); - } else if (cpu_is_omap243x()) { - omap2_set_globals_243x(); - omap243x_map_common_io(); - } else if (cpu_is_omap34xx()) { - omap2_set_globals_3xxx(); - omap34xx_map_common_io(); - } else if (cpu_is_omap44xx()) { - omap2_set_globals_443x(); - omap44xx_map_common_io(); - } + omap3_i2c_init(); + omap_generic_init(); } -/* XXX This machine entry name should be updated */ -MACHINE_START(OMAP_GENERIC, "Generic OMAP24xx") - /* Maintainer: Paul Mundt <paul.mundt@nokia.com> */ +#if defined(CONFIG_SOC_OMAP2420) +static const char *omap242x_boards_compat[] __initdata = { + "ti,omap2420", + NULL, +}; + +DT_MACHINE_START(OMAP242X_DT, "Generic OMAP2420 (Flattened Device Tree)") .atag_offset = 0x100, .reserve = omap_reserve, - .map_io = omap_generic_map_io, - .init_early = omap_generic_init_early, + .map_io = omap242x_map_io, + .init_early = omap2420_init_early, .init_irq = omap2_init_irq, .init_machine = omap_generic_init, .timer = &omap2_timer, + .dt_compat = omap242x_boards_compat, +MACHINE_END +#endif + +#if defined(CONFIG_SOC_OMAP2430) +static const char *omap243x_boards_compat[] __initdata = { + "ti,omap2430", + NULL, +}; + +DT_MACHINE_START(OMAP243X_DT, "Generic OMAP2430 (Flattened Device Tree)") + .atag_offset = 0x100, + .reserve = omap_reserve, + .map_io = omap243x_map_io, + .init_early = omap2430_init_early, + .init_irq = omap2_init_irq, + .init_machine = omap_generic_init, + .timer = &omap2_timer, + .dt_compat = omap243x_boards_compat, +MACHINE_END +#endif + +#if defined(CONFIG_ARCH_OMAP3) +static const char *omap3_boards_compat[] __initdata = { + "ti,omap3", + NULL, +}; + +DT_MACHINE_START(OMAP3_DT, "Generic OMAP3 (Flattened Device Tree)") + .atag_offset = 0x100, + .reserve = omap_reserve, + .map_io = omap3_map_io, + .init_early = omap3430_init_early, + .init_irq = omap3_init_irq, + .init_machine = omap3_init, + .timer = &omap3_timer, + .dt_compat = omap3_boards_compat, +MACHINE_END +#endif + +#if defined(CONFIG_ARCH_OMAP4) +static const char *omap4_boards_compat[] __initdata = { + "ti,omap4", + NULL, +}; + +DT_MACHINE_START(OMAP4_DT, "Generic OMAP4 (Flattened Device Tree)") + .atag_offset = 0x100, + .reserve = omap_reserve, + .map_io = omap4_map_io, + .init_early = omap4430_init_early, + .init_irq = gic_init_irq, + .init_machine = omap4_init, + .timer = &omap4_timer, + .dt_compat = omap4_boards_compat, MACHINE_END +#endif diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c index 474a7e2..70261bc 100644 --- a/arch/arm/mach-omap2/board-omap3beagle.c +++ b/arch/arm/mach-omap2/board-omap3beagle.c @@ -444,11 +444,6 @@ static struct platform_device keys_gpio = { }, }; -static void __init omap3_beagle_init_early(void) -{ - omap2_init_common_infrastructure(); -} - static struct platform_device *omap3_beagle_devices[] __initdata = { &leds_gpio, &keys_gpio, @@ -486,8 +481,8 @@ static void __init beagle_opp_init(void) if (cpu_is_omap3630()) { struct device *mpu_dev, *iva_dev; - mpu_dev = omap2_get_mpuss_device(); - iva_dev = omap2_get_iva_device(); + mpu_dev = omap_device_get_by_hwmod_name("mpu"); + iva_dev = omap_device_get_by_hwmod_name("iva"); if (!mpu_dev || !iva_dev) { pr_err("%s: Aiee.. no mpu/dsp devices? %p %p\n", @@ -555,7 +550,7 @@ MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board") .atag_offset = 0x100, .reserve = omap_reserve, .map_io = omap3_map_io, - .init_early = omap3_beagle_init_early, + .init_early = omap3_init_early, .init_irq = omap3_init_irq, .init_machine = omap3_beagle_init, .timer = &omap3_secure_timer, diff --git a/arch/arm/mach-omap2/board-ti8168evm.c b/arch/arm/mach-omap2/board-ti8168evm.c index e26c79c..e6ee884 100644 --- a/arch/arm/mach-omap2/board-ti8168evm.c +++ b/arch/arm/mach-omap2/board-ti8168evm.c @@ -37,7 +37,6 @@ static void __init ti8168_evm_init(void) static void __init ti8168_evm_map_io(void) { - omap2_set_globals_ti816x(); omapti816x_map_common_io(); } diff --git a/arch/arm/mach-omap2/common.c b/arch/arm/mach-omap2/common.c index de61f15..110e5b9 100644 --- a/arch/arm/mach-omap2/common.c +++ b/arch/arm/mach-omap2/common.c @@ -45,11 +45,11 @@ static void __init __omap2_set_globals(struct omap_globals *omap2_globals) static struct omap_globals omap242x_globals = { .class = OMAP242X_CLASS, .tap = OMAP2_L4_IO_ADDRESS(0x48014000), - .sdrc = OMAP2420_SDRC_BASE, - .sms = OMAP2420_SMS_BASE, - .ctrl = OMAP242X_CTRL_BASE, - .prm = OMAP2420_PRM_BASE, - .cm = OMAP2420_CM_BASE, + .sdrc = OMAP2_L3_IO_ADDRESS(OMAP2420_SDRC_BASE), + .sms = OMAP2_L3_IO_ADDRESS(OMAP2420_SMS_BASE), + .ctrl = OMAP2_L4_IO_ADDRESS(OMAP242X_CTRL_BASE), + .prm = OMAP2_L4_IO_ADDRESS(OMAP2420_PRM_BASE), + .cm = OMAP2_L4_IO_ADDRESS(OMAP2420_CM_BASE), }; void __init omap2_set_globals_242x(void) @@ -59,7 +59,6 @@ void __init omap2_set_globals_242x(void) void __init omap242x_map_io(void) { - omap2_set_globals_242x(); omap242x_map_common_io(); } #endif @@ -69,11 +68,11 @@ void __init omap242x_map_io(void) static struct omap_globals omap243x_globals = { .class = OMAP243X_CLASS, .tap = OMAP2_L4_IO_ADDRESS(0x4900a000), - .sdrc = OMAP243X_SDRC_BASE, - .sms = OMAP243X_SMS_BASE, - .ctrl = OMAP243X_CTRL_BASE, - .prm = OMAP2430_PRM_BASE, - .cm = OMAP2430_CM_BASE, + .sdrc = OMAP2_L3_IO_ADDRESS(OMAP243X_SDRC_BASE), + .sms = OMAP2_L3_IO_ADDRESS(OMAP243X_SMS_BASE), + .ctrl = OMAP2_L4_IO_ADDRESS(OMAP243X_CTRL_BASE), + .prm = OMAP2_L4_IO_ADDRESS(OMAP2430_PRM_BASE), + .cm = OMAP2_L4_IO_ADDRESS(OMAP2430_CM_BASE), }; void __init omap2_set_globals_243x(void) @@ -83,7 +82,6 @@ void __init omap2_set_globals_243x(void) void __init omap243x_map_io(void) { - omap2_set_globals_243x(); omap243x_map_common_io(); } #endif @@ -93,11 +91,11 @@ void __init omap243x_map_io(void) static struct omap_globals omap3_globals = { .class = OMAP343X_CLASS, .tap = OMAP2_L4_IO_ADDRESS(0x4830A000), - .sdrc = OMAP343X_SDRC_BASE, - .sms = OMAP343X_SMS_BASE, - .ctrl = OMAP343X_CTRL_BASE, - .prm = OMAP3430_PRM_BASE, - .cm = OMAP3430_CM_BASE, + .sdrc = OMAP2_L3_IO_ADDRESS(OMAP343X_SDRC_BASE), + .sms = OMAP2_L3_IO_ADDRESS(OMAP343X_SMS_BASE), + .ctrl = OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE), + .prm = OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE), + .cm = OMAP2_L4_IO_ADDRESS(OMAP3430_CM_BASE), }; void __init omap2_set_globals_3xxx(void) @@ -107,7 +105,6 @@ void __init omap2_set_globals_3xxx(void) void __init omap3_map_io(void) { - omap2_set_globals_3xxx(); omap34xx_map_common_io(); } @@ -122,9 +119,9 @@ void __init omap3_map_io(void) static struct omap_globals ti816x_globals = { .class = OMAP343X_CLASS, .tap = OMAP2_L4_IO_ADDRESS(TI816X_TAP_BASE), - .ctrl = TI816X_CTRL_BASE, - .prm = TI816X_PRCM_BASE, - .cm = TI816X_PRCM_BASE, + .ctrl = OMAP2_L4_IO_ADDRESS(TI816X_CTRL_BASE), + .prm = OMAP2_L4_IO_ADDRESS(TI816X_PRCM_BASE), + .cm = OMAP2_L4_IO_ADDRESS(TI816X_PRCM_BASE), }; void __init omap2_set_globals_ti816x(void) @@ -137,11 +134,11 @@ void __init omap2_set_globals_ti816x(void) static struct omap_globals omap4_globals = { .class = OMAP443X_CLASS, .tap = OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE), - .ctrl = OMAP443X_SCM_BASE, - .ctrl_pad = OMAP443X_CTRL_BASE, - .prm = OMAP4430_PRM_BASE, - .cm = OMAP4430_CM_BASE, - .cm2 = OMAP4430_CM2_BASE, + .ctrl = OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE), + .ctrl_pad = OMAP2_L4_IO_ADDRESS(OMAP443X_CTRL_BASE), + .prm = OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE), + .cm = OMAP2_L4_IO_ADDRESS(OMAP4430_CM_BASE), + .cm2 = OMAP2_L4_IO_ADDRESS(OMAP4430_CM2_BASE), }; void __init omap2_set_globals_443x(void) @@ -153,7 +150,6 @@ void __init omap2_set_globals_443x(void) void __init omap4_map_io(void) { - omap2_set_globals_443x(); omap44xx_map_common_io(); } #endif diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c index aab884f..e34d27f 100644 --- a/arch/arm/mach-omap2/control.c +++ b/arch/arm/mach-omap2/control.c @@ -149,17 +149,11 @@ static struct omap3_control_regs control_context; void __init omap2_set_globals_control(struct omap_globals *omap2_globals) { - /* Static mapping, never released */ - if (omap2_globals->ctrl) { - omap2_ctrl_base = ioremap(omap2_globals->ctrl, SZ_4K); - WARN_ON(!omap2_ctrl_base); - } + if (omap2_globals->ctrl) + omap2_ctrl_base = omap2_globals->ctrl; - /* Static mapping, never released */ - if (omap2_globals->ctrl_pad) { - omap4_ctrl_pad_base = ioremap(omap2_globals->ctrl_pad, SZ_4K); - WARN_ON(!omap4_ctrl_pad_base); - } + if (omap2_globals->ctrl_pad) + omap4_ctrl_pad_base = omap2_globals->ctrl_pad; } void __iomem *omap_ctrl_base_get(void) diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c index 406b56c..68ec031 100644 --- a/arch/arm/mach-omap2/devices.c +++ b/arch/arm/mach-omap2/devices.c @@ -16,6 +16,7 @@ #include <linux/clk.h> #include <linux/err.h> #include <linux/slab.h> +#include <linux/of.h> #include <mach/hardware.h> #include <mach/irqs.h> @@ -76,6 +77,10 @@ static int __init omap4_l3_init(void) struct platform_device *pdev; char oh_name[L3_MODULES_MAX_LEN]; + /* If dtb is there, the devices will be created dynamically */ + if (of_have_populated_dt()) + return -ENODEV; + /* * To avoid code running on other OMAPs in * multi-omap builds @@ -220,14 +225,6 @@ static inline void omap_init_camera(void) #endif } -struct omap_device_pm_latency omap_keyboard_latency[] = { - { - .deactivate_func = omap_device_idle_hwmods, - .activate_func = omap_device_enable_hwmods, - .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST, - }, -}; - int __init omap4_keyboard_init(struct omap4_keypad_platform_data *sdp4430_keypad_data, struct omap_board_data *bdata) { @@ -247,9 +244,7 @@ int __init omap4_keyboard_init(struct omap4_keypad_platform_data keypad_data = sdp4430_keypad_data; pdev = omap_device_build(name, id, oh, keypad_data, - sizeof(struct omap4_keypad_platform_data), - omap_keyboard_latency, - ARRAY_SIZE(omap_keyboard_latency), 0); + sizeof(struct omap4_keypad_platform_data), NULL, 0, 0); if (IS_ERR(pdev)) { WARN(1, "Can't build omap_device for %s:%s.\n", @@ -262,14 +257,6 @@ int __init omap4_keyboard_init(struct omap4_keypad_platform_data } #if defined(CONFIG_OMAP_MBOX_FWK) || defined(CONFIG_OMAP_MBOX_FWK_MODULE) -static struct omap_device_pm_latency mbox_latencies[] = { - [0] = { - .activate_func = omap_device_enable_hwmods, - .deactivate_func = omap_device_idle_hwmods, - .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST, - }, -}; - static inline void omap_init_mbox(void) { struct omap_hwmod *oh; @@ -281,8 +268,7 @@ static inline void omap_init_mbox(void) return; } - pdev = omap_device_build("omap-mailbox", -1, oh, NULL, 0, - mbox_latencies, ARRAY_SIZE(mbox_latencies), 0); + pdev = omap_device_build("omap-mailbox", -1, oh, NULL, 0, NULL, 0, 0); WARN(IS_ERR(pdev), "%s: could not build device, err %ld\n", __func__, PTR_ERR(pdev)); } @@ -365,14 +351,6 @@ static inline void omap_init_mcpdm(void) {} #include <plat/mcspi.h> -struct omap_device_pm_latency omap_mcspi_latency[] = { - [0] = { - .deactivate_func = omap_device_idle_hwmods, - .activate_func = omap_device_enable_hwmods, - .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST, - }, -}; - static int omap_mcspi_init(struct omap_hwmod *oh, void *unused) { struct platform_device *pdev; @@ -403,8 +381,7 @@ static int omap_mcspi_init(struct omap_hwmod *oh, void *unused) spi_num++; pdev = omap_device_build(name, spi_num, oh, pdata, - sizeof(*pdata), omap_mcspi_latency, - ARRAY_SIZE(omap_mcspi_latency), 0); + sizeof(*pdata), NULL, 0, 0); WARN(IS_ERR(pdev), "Can't build omap_device for %s:%s\n", name, oh->name); kfree(pdata); @@ -730,14 +707,6 @@ static int __init omap2_init_devices(void) arch_initcall(omap2_init_devices); #if defined(CONFIG_OMAP_WATCHDOG) || defined(CONFIG_OMAP_WATCHDOG_MODULE) -static struct omap_device_pm_latency omap_wdt_latency[] = { - [0] = { - .deactivate_func = omap_device_idle_hwmods, - .activate_func = omap_device_enable_hwmods, - .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST, - }, -}; - static int __init omap_init_wdt(void) { int id = -1; @@ -755,9 +724,7 @@ static int __init omap_init_wdt(void) return -EINVAL; } - pdev = omap_device_build(dev_name, id, oh, NULL, 0, - omap_wdt_latency, - ARRAY_SIZE(omap_wdt_latency), 0); + pdev = omap_device_build(dev_name, id, oh, NULL, 0, NULL, 0, 0); WARN(IS_ERR(pdev), "Can't build omap_device for %s:%s.\n", dev_name, oh->name); return 0; diff --git a/arch/arm/mach-omap2/display.c b/arch/arm/mach-omap2/display.c index 836f0f7..4036821 100644 --- a/arch/arm/mach-omap2/display.c +++ b/arch/arm/mach-omap2/display.c @@ -37,14 +37,6 @@ static struct platform_device omap_display_device = { }, }; -static struct omap_device_pm_latency omap_dss_latency[] = { - [0] = { - .deactivate_func = omap_device_idle_hwmods, - .activate_func = omap_device_enable_hwmods, - .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST, - }, -}; - struct omap_dss_hwmod_data { const char *oh_name; const char *dev_name; @@ -165,8 +157,7 @@ int __init omap_display_init(struct omap_dss_board_info *board_data) pdev = omap_device_build(curr_dss_hwmod[i].dev_name, curr_dss_hwmod[i].id, oh, &pdata, sizeof(struct omap_display_platform_data), - omap_dss_latency, - ARRAY_SIZE(omap_dss_latency), 0); + NULL, 0, 0); if (WARN((IS_ERR(pdev)), "Could not build omap_device for %s\n", curr_dss_hwmod[i].oh_name)) diff --git a/arch/arm/mach-omap2/dma.c b/arch/arm/mach-omap2/dma.c index ae8cb3f..a59a45a 100644 --- a/arch/arm/mach-omap2/dma.c +++ b/arch/arm/mach-omap2/dma.c @@ -87,14 +87,6 @@ static u16 reg_map[] = { [CCDN] = 0xd8, }; -static struct omap_device_pm_latency omap2_dma_latency[] = { - { - .deactivate_func = omap_device_idle_hwmods, - .activate_func = omap_device_enable_hwmods, - .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST, - }, -}; - static void __iomem *dma_base; static inline void dma_write(u32 val, int reg, int lch) { @@ -258,8 +250,7 @@ static int __init omap2_system_dma_init_dev(struct omap_hwmod *oh, void *unused) p->errata = configure_dma_errata(); - pdev = omap_device_build(name, 0, oh, p, sizeof(*p), - omap2_dma_latency, ARRAY_SIZE(omap2_dma_latency), 0); + pdev = omap_device_build(name, 0, oh, p, sizeof(*p), NULL, 0, 0); kfree(p); if (IS_ERR(pdev)) { pr_err("%s: Can't build omap_device for %s:%s.\n", diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c index 652ccc5..8cbfbc2 100644 --- a/arch/arm/mach-omap2/gpio.c +++ b/arch/arm/mach-omap2/gpio.c @@ -24,14 +24,6 @@ #include <plat/omap_hwmod.h> #include <plat/omap_device.h> -static struct omap_device_pm_latency omap_gpio_latency[] = { - [0] = { - .deactivate_func = omap_device_idle_hwmods, - .activate_func = omap_device_enable_hwmods, - .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST, - }, -}; - static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused) { struct platform_device *pdev; @@ -108,9 +100,7 @@ static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused) } pdev = omap_device_build(name, id - 1, oh, pdata, - sizeof(*pdata), omap_gpio_latency, - ARRAY_SIZE(omap_gpio_latency), - false); + sizeof(*pdata), NULL, 0, false); kfree(pdata); if (IS_ERR(pdev)) { diff --git a/arch/arm/mach-omap2/hsmmc.c b/arch/arm/mach-omap2/hsmmc.c index 2dc002a..7708584 100644 --- a/arch/arm/mach-omap2/hsmmc.c +++ b/arch/arm/mach-omap2/hsmmc.c @@ -409,31 +409,17 @@ static int __init omap_hsmmc_pdata_init(struct omap2_hsmmc_info *c, return 0; } -static struct omap_device_pm_latency omap_hsmmc_latency[] = { - [0] = { - .deactivate_func = omap_device_idle_hwmods, - .activate_func = omap_device_enable_hwmods, - .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST, - }, - /* - * XXX There should also be an entry here to power off/on the - * MMC regulators/PBIAS cells, etc. - */ -}; - #define MAX_OMAP_MMC_HWMOD_NAME_LEN 16 void __init omap_init_hsmmc(struct omap2_hsmmc_info *hsmmcinfo, int ctrl_nr) { struct omap_hwmod *oh; struct platform_device *pdev; - struct omap_device_pm_latency *ohl; char oh_name[MAX_OMAP_MMC_HWMOD_NAME_LEN]; struct omap_mmc_platform_data *mmc_data; struct omap_mmc_dev_attr *mmc_dev_attr; char *name; int l; - int ohl_cnt = 0; mmc_data = kzalloc(sizeof(struct omap_mmc_platform_data), GFP_KERNEL); if (!mmc_data) { @@ -448,8 +434,6 @@ void __init omap_init_hsmmc(struct omap2_hsmmc_info *hsmmcinfo, int ctrl_nr) omap_hsmmc_mux(mmc_data, (ctrl_nr - 1)); name = "omap_hsmmc"; - ohl = omap_hsmmc_latency; - ohl_cnt = ARRAY_SIZE(omap_hsmmc_latency); l = snprintf(oh_name, MAX_OMAP_MMC_HWMOD_NAME_LEN, "mmc%d", ctrl_nr); @@ -468,7 +452,7 @@ void __init omap_init_hsmmc(struct omap2_hsmmc_info *hsmmcinfo, int ctrl_nr) } pdev = omap_device_build(name, ctrl_nr - 1, oh, mmc_data, - sizeof(struct omap_mmc_platform_data), ohl, ohl_cnt, false); + sizeof(struct omap_mmc_platform_data), NULL, 0, false); if (IS_ERR(pdev)) { WARN(1, "Can't build omap_device for %s:%s.\n", name, oh->name); kfree(mmc_data->slots[0].name); diff --git a/arch/arm/mach-omap2/hwspinlock.c b/arch/arm/mach-omap2/hwspinlock.c index 0b3ae9d..36e2109 100644 --- a/arch/arm/mach-omap2/hwspinlock.c +++ b/arch/arm/mach-omap2/hwspinlock.c @@ -23,14 +23,6 @@ #include <plat/omap_hwmod.h> #include <plat/omap_device.h> -struct omap_device_pm_latency omap_spinlock_latency[] = { - { - .deactivate_func = omap_device_idle_hwmods, - .activate_func = omap_device_enable_hwmods, - .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST, - } -}; - int __init hwspinlocks_init(void) { int retval = 0; @@ -48,9 +40,7 @@ int __init hwspinlocks_init(void) if (oh == NULL) return -EINVAL; - pdev = omap_device_build(dev_name, 0, oh, NULL, 0, - omap_spinlock_latency, - ARRAY_SIZE(omap_spinlock_latency), false); + pdev = omap_device_build(dev_name, 0, oh, NULL, 0, NULL, 0, false); if (IS_ERR(pdev)) { pr_err("Can't build omap_device for %s:%s\n", dev_name, oh_name); diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index f012730..a5d8dce 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c @@ -34,8 +34,8 @@ #include "clock2xxx.h" #include "clock3xxx.h" #include "clock44xx.h" -#include "io.h" +#include <plat/common.h> #include <plat/omap-pm.h> #include "voltage.h" #include "powerdomain.h" @@ -43,6 +43,7 @@ #include "clockdomain.h" #include <plat/omap_hwmod.h> #include <plat/multi.h> +#include <plat/common.h> /* * The machine specific code may provide the extra mapping besides the @@ -239,26 +240,11 @@ static struct map_desc omap44xx_io_desc[] __initdata = { }; #endif -static void __init _omap2_map_common_io(void) -{ - /* Normally devicemaps_init() would flush caches and tlb after - * mdesc->map_io(), but we must also do it here because of the CPU - * revision check below. - */ - local_flush_tlb_all(); - flush_cache_all(); - - omap2_check_revision(); - omap_sram_init(); - omap_init_consistent_dma_size(); -} - #ifdef CONFIG_SOC_OMAP2420 void __init omap242x_map_common_io(void) { iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc)); iotable_init(omap242x_io_desc, ARRAY_SIZE(omap242x_io_desc)); - _omap2_map_common_io(); } #endif @@ -267,7 +253,6 @@ void __init omap243x_map_common_io(void) { iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc)); iotable_init(omap243x_io_desc, ARRAY_SIZE(omap243x_io_desc)); - _omap2_map_common_io(); } #endif @@ -275,7 +260,6 @@ void __init omap243x_map_common_io(void) void __init omap34xx_map_common_io(void) { iotable_init(omap34xx_io_desc, ARRAY_SIZE(omap34xx_io_desc)); - _omap2_map_common_io(); } #endif @@ -283,7 +267,6 @@ void __init omap34xx_map_common_io(void) void __init omapti816x_map_common_io(void) { iotable_init(omapti816x_io_desc, ARRAY_SIZE(omapti816x_io_desc)); - _omap2_map_common_io(); } #endif @@ -291,7 +274,6 @@ void __init omapti816x_map_common_io(void) void __init omap44xx_map_common_io(void) { iotable_init(omap44xx_io_desc, ARRAY_SIZE(omap44xx_io_desc)); - _omap2_map_common_io(); } #endif @@ -337,33 +319,16 @@ static int _set_hwmod_postsetup_state(struct omap_hwmod *oh, void *data) /* See irq.c, omap4-common.c and entry-macro.S */ void __iomem *omap_irq_base; -void __init omap2_init_common_infrastructure(void) +static void __init omap_common_init_early(void) { - u8 postsetup_state; + omap2_check_revision(); + omap_ioremap_init(); + omap_init_consistent_dma_size(); +} - if (cpu_is_omap242x()) { - omap2xxx_voltagedomains_init(); - omap242x_powerdomains_init(); - omap242x_clockdomains_init(); - omap2420_hwmod_init(); - } else if (cpu_is_omap243x()) { - omap2xxx_voltagedomains_init(); - omap243x_powerdomains_init(); - omap243x_clockdomains_init(); - omap2430_hwmod_init(); - } else if (cpu_is_omap34xx()) { - omap3xxx_voltagedomains_init(); - omap3xxx_powerdomains_init(); - omap3xxx_clockdomains_init(); - omap3xxx_hwmod_init(); - } else if (cpu_is_omap44xx()) { - omap44xx_voltagedomains_init(); - omap44xx_powerdomains_init(); - omap44xx_clockdomains_init(); - omap44xx_hwmod_init(); - } else { - pr_err("Could not init hwmod data - unknown SoC\n"); - } +static void __init omap_hwmod_init_postsetup(void) +{ + u8 postsetup_state; /* Set the default postsetup state for all hwmods */ #ifdef CONFIG_PM_RUNTIME @@ -392,67 +357,101 @@ void __init omap2_init_common_infrastructure(void) &postsetup_state); omap_pm_if_early_init(); - - if (cpu_is_omap2420()) - omap2420_clk_init(); - else if (cpu_is_omap2430()) - omap2430_clk_init(); - else if (cpu_is_omap34xx()) - omap3xxx_clk_init(); - else if (cpu_is_omap44xx()) - omap4xxx_clk_init(); - else - pr_err("Could not init clock framework - unknown SoC\n"); } void __init omap2420_init_early(void) { - omap2_init_common_infrastructure(); + omap2_set_globals_242x(); + omap_common_init_early(); + omap2xxx_voltagedomains_init(); + omap242x_powerdomains_init(); + omap242x_clockdomains_init(); + omap2420_hwmod_init(); + omap_hwmod_init_postsetup(); + omap2420_clk_init(); } void __init omap2430_init_early(void) { - omap2_init_common_infrastructure(); + omap2_set_globals_243x(); + omap_common_init_early(); + omap2xxx_voltagedomains_init(); + omap243x_powerdomains_init(); + omap243x_clockdomains_init(); + omap2430_hwmod_init(); + omap_hwmod_init_postsetup(); + omap2430_clk_init(); +} + +/* + * Currently only board-omap3beagle.c should call this because of the + * same machine_id for 34xx and 36xx beagle.. Will get fixed with DT. + */ +void __init omap3_init_early(void) +{ + omap2_set_globals_3xxx(); + omap_common_init_early(); + omap3xxx_voltagedomains_init(); + omap3xxx_powerdomains_init(); + omap3xxx_clockdomains_init(); + omap3xxx_hwmod_init(); + omap_hwmod_init_postsetup(); + omap3xxx_clk_init(); } void __init omap3430_init_early(void) { - omap2_init_common_infrastructure(); + omap3_init_early(); } void __init omap35xx_init_early(void) { - omap2_init_common_infrastructure(); + omap3_init_early(); } void __init omap3630_init_early(void) { - omap2_init_common_infrastructure(); + omap3_init_early(); } void __init am35xx_init_early(void) { - omap2_init_common_infrastructure(); + omap3_init_early(); } void __init ti816x_init_early(void) { - omap2_init_common_infrastructure(); + omap2_set_globals_ti816x(); + omap_common_init_early(); + omap3xxx_voltagedomains_init(); + omap3xxx_powerdomains_init(); + omap3xxx_clockdomains_init(); + omap3xxx_hwmod_init(); + omap_hwmod_init_postsetup(); + omap3xxx_clk_init(); } void __init omap4430_init_early(void) { - omap2_init_common_infrastructure(); + omap2_set_globals_443x(); + omap_common_init_early(); + omap44xx_voltagedomains_init(); + omap44xx_powerdomains_init(); + omap44xx_clockdomains_init(); + omap44xx_hwmod_init(); + omap_hwmod_init_postsetup(); + omap4xxx_clk_init(); } void __init omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0, struct omap_sdrc_params *sdrc_cs1) { + omap_sram_init(); + if (cpu_is_omap24xx() || omap3_has_sdrc()) { omap2_sdrc_init(sdrc_cs0, sdrc_cs1); _omap2_init_reprogram_sdrc(); } - } /* diff --git a/arch/arm/mach-omap2/io.h b/arch/arm/mach-omap2/io.h index fd230c6..e69de29 100644 --- a/arch/arm/mach-omap2/io.h +++ b/arch/arm/mach-omap2/io.h @@ -1,7 +0,0 @@ - -#ifndef __MACH_OMAP2_IO_H__ -#define __MACH_OMAP2_IO_H__ - -extern int __init omap_sram_init(void); - -#endif /* __MACH_OMAP2_IO_H__ */ diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c index 5063f25..292eee3 100644 --- a/arch/arm/mach-omap2/mcbsp.c +++ b/arch/arm/mach-omap2/mcbsp.c @@ -122,14 +122,6 @@ static int omap3_enable_st_clock(unsigned int id, bool enable) return 0; } -struct omap_device_pm_latency omap2_mcbsp_latency[] = { - { - .deactivate_func = omap_device_idle_hwmods, - .activate_func = omap_device_enable_hwmods, - .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST, - }, -}; - static int omap_init_mcbsp(struct omap_hwmod *oh, void *unused) { int id, count = 1; @@ -175,8 +167,7 @@ static int omap_init_mcbsp(struct omap_hwmod *oh, void *unused) count++; } pdev = omap_device_build_ss(name, id, oh_device, count, pdata, - sizeof(*pdata), omap2_mcbsp_latency, - ARRAY_SIZE(omap2_mcbsp_latency), false); + sizeof(*pdata), NULL, 0, false); kfree(pdata); if (IS_ERR(pdev)) { pr_err("%s: Can't build omap_device for %s:%s.\n", __func__, diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c index 889464d..4412ddb 100644 --- a/arch/arm/mach-omap2/omap-smp.c +++ b/arch/arm/mach-omap2/omap-smp.c @@ -102,8 +102,11 @@ void __init smp_init_cpus(void) { unsigned int i, ncores; - /* Never released */ - scu_base = ioremap(OMAP44XX_SCU_BASE, SZ_256); + /* + * Currently we can't call ioremap here because + * SoC detection won't work until after init_early. + */ + scu_base = OMAP2_L4_IO_ADDRESS(OMAP44XX_SCU_BASE); BUG_ON(!scu_base); ncores = scu_get_core_count(scu_base); diff --git a/arch/arm/mach-omap2/omap_l3_noc.c b/arch/arm/mach-omap2/omap_l3_noc.c index 7b9f190..c8b1bef 100644 --- a/arch/arm/mach-omap2/omap_l3_noc.c +++ b/arch/arm/mach-omap2/omap_l3_noc.c @@ -1,25 +1,25 @@ /* - * OMAP4XXX L3 Interconnect error handling driver - * - * Copyright (C) 2011 Texas Corporation - * Santosh Shilimkar <santosh.shilimkar@ti.com> - * Sricharan <r.sricharan@ti.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 - * USA - */ + * OMAP4XXX L3 Interconnect error handling driver + * + * Copyright (C) 2011 Texas Corporation + * Santosh Shilimkar <santosh.shilimkar@ti.com> + * Sricharan <r.sricharan@ti.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 + * USA + */ #include <linux/init.h> #include <linux/io.h> #include <linux/platform_device.h> @@ -55,12 +55,12 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3) { - struct omap4_l3 *l3 = _l3; - int inttype, i, j; + struct omap4_l3 *l3 = _l3; + int inttype, i, k; int err_src = 0; - u32 std_err_main_addr, std_err_main, err_reg; - u32 base, slave_addr, clear; - char *source_name; + u32 std_err_main, err_reg, clear, masterid; + void __iomem *base, *l3_targ_base; + char *target_name, *master_name = "UN IDENTIFIED"; /* Get the Type of interrupt */ inttype = irq == l3->app_irq ? L3_APPLICATION_ERROR : L3_DEBUG_ERROR; @@ -70,43 +70,50 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3) * Read the regerr register of the clock domain * to determine the source */ - base = (u32)l3->l3_base[i]; - err_reg = readl(base + l3_flagmux[i] + (inttype << 3)); + base = l3->l3_base[i]; + err_reg = __raw_readl(base + l3_flagmux[i] + + + L3_FLAGMUX_REGERR0 + (inttype << 3)); /* Get the corresponding error and analyse */ if (err_reg) { /* Identify the source from control status register */ - for (j = 0; !(err_reg & (1 << j)); j++) - ; + err_src = __ffs(err_reg); - err_src = j; /* Read the stderrlog_main_source from clk domain */ - std_err_main_addr = base + *(l3_targ[i] + err_src); - std_err_main = readl(std_err_main_addr); + l3_targ_base = base + *(l3_targ[i] + err_src); + std_err_main = __raw_readl(l3_targ_base + + L3_TARG_STDERRLOG_MAIN); + masterid = __raw_readl(l3_targ_base + + L3_TARG_STDERRLOG_MSTADDR); switch (std_err_main & CUSTOM_ERROR) { case STANDARD_ERROR: - source_name = - l3_targ_stderrlog_main_name[i][err_src]; - - slave_addr = std_err_main_addr + - L3_SLAVE_ADDRESS_OFFSET; - WARN(true, "L3 standard error: SOURCE:%s at address 0x%x\n", - source_name, readl(slave_addr)); + target_name = + l3_targ_inst_name[i][err_src]; + WARN(true, "L3 standard error: TARGET:%s at address 0x%x\n", + target_name, + __raw_readl(l3_targ_base + + L3_TARG_STDERRLOG_SLVOFSLSB)); /* clear the std error log*/ clear = std_err_main | CLEAR_STDERR_LOG; - writel(clear, std_err_main_addr); + writel(clear, l3_targ_base + + L3_TARG_STDERRLOG_MAIN); break; case CUSTOM_ERROR: - source_name = - l3_targ_stderrlog_main_name[i][err_src]; - - WARN(true, "CUSTOM SRESP error with SOURCE:%s\n", - source_name); + target_name = + l3_targ_inst_name[i][err_src]; + for (k = 0; k < NUM_OF_L3_MASTERS; k++) { + if (masterid == l3_masters[k].id) + master_name = + l3_masters[k].name; + } + WARN(true, "L3 custom error: MASTER:%s TARGET:%s\n", + master_name, target_name); /* clear the std error log*/ clear = std_err_main | CLEAR_STDERR_LOG; - writel(clear, std_err_main_addr); + writel(clear, l3_targ_base + + L3_TARG_STDERRLOG_MAIN); break; default: @@ -120,12 +127,11 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3) return IRQ_HANDLED; } -static int __init omap4_l3_probe(struct platform_device *pdev) +static int __devinit omap4_l3_probe(struct platform_device *pdev) { - static struct omap4_l3 *l3; - struct resource *res; - int ret; - int irq; + static struct omap4_l3 *l3; + struct resource *res; + int ret; l3 = kzalloc(sizeof(*l3), GFP_KERNEL); if (!l3) @@ -177,27 +183,25 @@ static int __init omap4_l3_probe(struct platform_device *pdev) /* * Setup interrupt Handlers */ - irq = platform_get_irq(pdev, 0); - ret = request_irq(irq, + l3->debug_irq = platform_get_irq(pdev, 0); + ret = request_irq(l3->debug_irq, l3_interrupt_handler, IRQF_DISABLED, "l3-dbg-irq", l3); if (ret) { pr_crit("L3: request_irq failed to register for 0x%x\n", - OMAP44XX_IRQ_L3_DBG); + OMAP44XX_IRQ_L3_DBG); goto err3; } - l3->debug_irq = irq; - irq = platform_get_irq(pdev, 1); - ret = request_irq(irq, + l3->app_irq = platform_get_irq(pdev, 1); + ret = request_irq(l3->app_irq, l3_interrupt_handler, IRQF_DISABLED, "l3-app-irq", l3); if (ret) { pr_crit("L3: request_irq failed to register for 0x%x\n", - OMAP44XX_IRQ_L3_APP); + OMAP44XX_IRQ_L3_APP); goto err4; } - l3->app_irq = irq; return 0; @@ -214,9 +218,9 @@ err0: return ret; } -static int __exit omap4_l3_remove(struct platform_device *pdev) +static int __devexit omap4_l3_remove(struct platform_device *pdev) { - struct omap4_l3 *l3 = platform_get_drvdata(pdev); + struct omap4_l3 *l3 = platform_get_drvdata(pdev); free_irq(l3->app_irq, l3); free_irq(l3->debug_irq, l3); @@ -228,16 +232,29 @@ static int __exit omap4_l3_remove(struct platform_device *pdev) return 0; } +#if defined(CONFIG_OF) +static const struct of_device_id l3_noc_match[] = { + {.compatible = "ti,omap4-l3-noc", }, + {}, +} +MODULE_DEVICE_TABLE(of, l3_noc_match); +#else +#define l3_noc_match NULL +#endif + static struct platform_driver omap4_l3_driver = { - .remove = __exit_p(omap4_l3_remove), + .probe = omap4_l3_probe, + .remove = __devexit_p(omap4_l3_remove), .driver = { - .name = "omap_l3_noc", + .name = "omap_l3_noc", + .owner = THIS_MODULE, + .of_match_table = l3_noc_match, }, }; static int __init omap4_l3_init(void) { - return platform_driver_probe(&omap4_l3_driver, omap4_l3_probe); + return platform_driver_register(&omap4_l3_driver); } postcore_initcall_sync(omap4_l3_init); diff --git a/arch/arm/mach-omap2/omap_l3_noc.h b/arch/arm/mach-omap2/omap_l3_noc.h index 359b833..90b5098 100644 --- a/arch/arm/mach-omap2/omap_l3_noc.h +++ b/arch/arm/mach-omap2/omap_l3_noc.h @@ -1,132 +1,162 @@ - /* - * OMAP4XXX L3 Interconnect error handling driver header - * - * Copyright (C) 2011 Texas Corporation - * Santosh Shilimkar <santosh.shilimkar@ti.com> - * sricharan <r.sricharan@ti.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 - * USA - */ +/* + * OMAP4XXX L3 Interconnect error handling driver header + * + * Copyright (C) 2011 Texas Corporation + * Santosh Shilimkar <santosh.shilimkar@ti.com> + * sricharan <r.sricharan@ti.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 + * USA + */ #ifndef __ARCH_ARM_MACH_OMAP2_L3_INTERCONNECT_3XXX_H #define __ARCH_ARM_MACH_OMAP2_L3_INTERCONNECT_3XXX_H -/* - * L3 register offsets - */ #define L3_MODULES 3 #define CLEAR_STDERR_LOG (1 << 31) #define CUSTOM_ERROR 0x2 #define STANDARD_ERROR 0x0 #define INBAND_ERROR 0x0 -#define EMIF_KERRLOG_OFFSET 0x10 -#define L3_SLAVE_ADDRESS_OFFSET 0x14 -#define LOGICAL_ADDR_ERRORLOG 0x4 #define L3_APPLICATION_ERROR 0x0 #define L3_DEBUG_ERROR 0x1 -u32 l3_flagmux[L3_MODULES] = { - 0x50C, - 0x100C, - 0X020C +/* L3 TARG register offsets */ +#define L3_TARG_STDERRLOG_MAIN 0x48 +#define L3_TARG_STDERRLOG_SLVOFSLSB 0x5c +#define L3_TARG_STDERRLOG_MSTADDR 0x68 +#define L3_FLAGMUX_REGERR0 0xc + +#define NUM_OF_L3_MASTERS (sizeof(l3_masters)/sizeof(l3_masters[0])) + +static u32 l3_flagmux[L3_MODULES] = { + 0x500, + 0x1000, + 0X0200 }; -/* - * L3 Target standard Error register offsets - */ -u32 l3_targ_stderrlog_main_clk1[] = { - 0x148, /* DMM1 */ - 0x248, /* DMM2 */ - 0x348, /* ABE */ - 0x448, /* L4CFG */ - 0x648 /* CLK2 PWR DISC */ +/* L3 Target standard Error register offsets */ +static u32 l3_targ_inst_clk1[] = { + 0x100, /* DMM1 */ + 0x200, /* DMM2 */ + 0x300, /* ABE */ + 0x400, /* L4CFG */ + 0x600 /* CLK2 PWR DISC */ }; -u32 l3_targ_stderrlog_main_clk2[] = { - 0x548, /* CORTEX M3 */ - 0x348, /* DSS */ - 0x148, /* GPMC */ - 0x448, /* ISS */ - 0x748, /* IVAHD */ - 0xD48, /* missing in TRM corresponds to AES1*/ - 0x948, /* L4 PER0*/ - 0x248, /* OCMRAM */ - 0x148, /* missing in TRM corresponds to GPMC sERROR*/ - 0x648, /* SGX */ - 0x848, /* SL2 */ - 0x1648, /* C2C */ - 0x1148, /* missing in TRM corresponds PWR DISC CLK1*/ - 0xF48, /* missing in TRM corrsponds to SHA1*/ - 0xE48, /* missing in TRM corresponds to AES2*/ - 0xC48, /* L4 PER3 */ - 0xA48, /* L4 PER1*/ - 0xB48 /* L4 PER2*/ +static u32 l3_targ_inst_clk2[] = { + 0x500, /* CORTEX M3 */ + 0x300, /* DSS */ + 0x100, /* GPMC */ + 0x400, /* ISS */ + 0x700, /* IVAHD */ + 0xD00, /* missing in TRM corresponds to AES1*/ + 0x900, /* L4 PER0*/ + 0x200, /* OCMRAM */ + 0x100, /* missing in TRM corresponds to GPMC sERROR*/ + 0x600, /* SGX */ + 0x800, /* SL2 */ + 0x1600, /* C2C */ + 0x1100, /* missing in TRM corresponds PWR DISC CLK1*/ + 0xF00, /* missing in TRM corrsponds to SHA1*/ + 0xE00, /* missing in TRM corresponds to AES2*/ + 0xC00, /* L4 PER3 */ + 0xA00, /* L4 PER1*/ + 0xB00 /* L4 PER2*/ }; -u32 l3_targ_stderrlog_main_clk3[] = { - 0x0148 /* EMUSS */ +static u32 l3_targ_inst_clk3[] = { + 0x0100 /* EMUSS */ }; -char *l3_targ_stderrlog_main_name[L3_MODULES][18] = { +static struct l3_masters_data { + u32 id; + char name[10]; +} l3_masters[] = { + { 0x0 , "MPU"}, + { 0x10, "CS_ADP"}, + { 0x14, "xxx"}, + { 0x20, "DSP"}, + { 0x30, "IVAHD"}, + { 0x40, "ISS"}, + { 0x44, "DucatiM3"}, + { 0x48, "FaceDetect"}, + { 0x50, "SDMA_Rd"}, + { 0x54, "SDMA_Wr"}, + { 0x58, "xxx"}, + { 0x5C, "xxx"}, + { 0x60, "SGX"}, + { 0x70, "DSS"}, + { 0x80, "C2C"}, + { 0x88, "xxx"}, + { 0x8C, "xxx"}, + { 0x90, "HSI"}, + { 0xA0, "MMC1"}, + { 0xA4, "MMC2"}, + { 0xA8, "MMC6"}, + { 0xB0, "UNIPRO1"}, + { 0xC0, "USBHOSTHS"}, + { 0xC4, "USBOTGHS"}, + { 0xC8, "USBHOSTFS"} +}; + +static char *l3_targ_inst_name[L3_MODULES][18] = { { - "DMM1", - "DMM2", - "ABE", - "L4CFG", - "CLK2 PWR DISC", + "DMM1", + "DMM2", + "ABE", + "L4CFG", + "CLK2 PWR DISC", }, { - "CORTEX M3" , - "DSS ", - "GPMC ", - "ISS ", - "IVAHD ", - "AES1", - "L4 PER0", - "OCMRAM ", - "GPMC sERROR", - "SGX ", - "SL2 ", - "C2C ", - "PWR DISC CLK1", - "SHA1", - "AES2", - "L4 PER3", - "L4 PER1", - "L4 PER2", + "CORTEX M3" , + "DSS ", + "GPMC ", + "ISS ", + "IVAHD ", + "AES1", + "L4 PER0", + "OCMRAM ", + "GPMC sERROR", + "SGX ", + "SL2 ", + "C2C ", + "PWR DISC CLK1", + "SHA1", + "AES2", + "L4 PER3", + "L4 PER1", + "L4 PER2", }, { - "EMUSS", + "EMUSS", }, }; -u32 *l3_targ[L3_MODULES] = { - l3_targ_stderrlog_main_clk1, - l3_targ_stderrlog_main_clk2, - l3_targ_stderrlog_main_clk3, +static u32 *l3_targ[L3_MODULES] = { + l3_targ_inst_clk1, + l3_targ_inst_clk2, + l3_targ_inst_clk3, }; struct omap4_l3 { - struct device *dev; - struct clk *ick; + struct device *dev; + struct clk *ick; /* memory base */ - void __iomem *l3_base[4]; + void __iomem *l3_base[L3_MODULES]; - int debug_irq; - int app_irq; + int debug_irq; + int app_irq; }; - #endif diff --git a/arch/arm/mach-omap2/omap_l3_smx.c b/arch/arm/mach-omap2/omap_l3_smx.c index 873c0e3..a05a62f 100644 --- a/arch/arm/mach-omap2/omap_l3_smx.c +++ b/arch/arm/mach-omap2/omap_l3_smx.c @@ -1,26 +1,26 @@ - /* - * OMAP3XXX L3 Interconnect Driver - * - * Copyright (C) 2011 Texas Corporation - * Felipe Balbi <balbi@ti.com> - * Santosh Shilimkar <santosh.shilimkar@ti.com> - * Sricharan <r.sricharan@ti.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 - * USA - */ +/* + * OMAP3XXX L3 Interconnect Driver + * + * Copyright (C) 2011 Texas Corporation + * Felipe Balbi <balbi@ti.com> + * Santosh Shilimkar <santosh.shilimkar@ti.com> + * Sricharan <r.sricharan@ti.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 + * USA + */ #include <linux/kernel.h> #include <linux/slab.h> @@ -135,7 +135,7 @@ static char *omap3_l3_initiator_string(u8 initid) } } -/** +/* * omap3_l3_block_irq - handles a register block's irq * @l3: struct omap3_l3 * * @base: register block base address @@ -150,30 +150,29 @@ static char *omap3_l3_initiator_string(u8 initid) static irqreturn_t omap3_l3_block_irq(struct omap3_l3 *l3, u64 error, int error_addr) { - u8 code = omap3_l3_decode_error_code(error); - u8 initid = omap3_l3_decode_initid(error); - u8 multi = error & L3_ERROR_LOG_MULTI; - u32 address = omap3_l3_decode_addr(error_addr); + u8 code = omap3_l3_decode_error_code(error); + u8 initid = omap3_l3_decode_initid(error); + u8 multi = error & L3_ERROR_LOG_MULTI; + u32 address = omap3_l3_decode_addr(error_addr); WARN(true, "%s seen by %s %s at address %x\n", - omap3_l3_code_string(code), - omap3_l3_initiator_string(initid), - multi ? "Multiple Errors" : "", - address); + omap3_l3_code_string(code), + omap3_l3_initiator_string(initid), + multi ? "Multiple Errors" : "", address); return IRQ_HANDLED; } static irqreturn_t omap3_l3_app_irq(int irq, void *_l3) { - struct omap3_l3 *l3 = _l3; - u64 status, clear; - u64 error; - u64 error_addr; - u64 err_source = 0; - void __iomem *base; - int int_type; - irqreturn_t ret = IRQ_NONE; + struct omap3_l3 *l3 = _l3; + u64 status, clear; + u64 error; + u64 error_addr; + u64 err_source = 0; + void __iomem *base; + int int_type; + irqreturn_t ret = IRQ_NONE; int_type = irq == l3->app_irq ? L3_APPLICATION_ERROR : L3_DEBUG_ERROR; if (!int_type) { @@ -191,14 +190,12 @@ static irqreturn_t omap3_l3_app_irq(int irq, void *_l3) } /* identify the error source */ - for (err_source = 0; !(status & (1 << err_source)); err_source++) - ; + err_source = __ffs(status); - base = l3->rt + *(omap3_l3_bases[int_type] + err_source); + base = l3->rt + omap3_l3_bases[int_type][err_source]; error = omap3_l3_readll(base, L3_ERROR_LOG); if (error) { error_addr = omap3_l3_readll(base, L3_ERROR_LOG_ADDR); - ret |= omap3_l3_block_irq(l3, error, error_addr); } @@ -215,9 +212,9 @@ static irqreturn_t omap3_l3_app_irq(int irq, void *_l3) static int __init omap3_l3_probe(struct platform_device *pdev) { - struct omap3_l3 *l3; - struct resource *res; - int ret; + struct omap3_l3 *l3; + struct resource *res; + int ret; l3 = kzalloc(sizeof(*l3), GFP_KERNEL); if (!l3) diff --git a/arch/arm/mach-omap2/omap_l3_smx.h b/arch/arm/mach-omap2/omap_l3_smx.h index ba2ed9a..4f3cebc 100644 --- a/arch/arm/mach-omap2/omap_l3_smx.h +++ b/arch/arm/mach-omap2/omap_l3_smx.h @@ -1,26 +1,26 @@ - /* - * OMAP3XXX L3 Interconnect Driver header - * - * Copyright (C) 2011 Texas Corporation - * Felipe Balbi <balbi@ti.com> - * Santosh Shilimkar <santosh.shilimkar@ti.com> - * sricharan <r.sricharan@ti.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 - * USA - */ +/* + * OMAP3XXX L3 Interconnect Driver header + * + * Copyright (C) 2011 Texas Corporation + * Felipe Balbi <balbi@ti.com> + * Santosh Shilimkar <santosh.shilimkar@ti.com> + * sricharan <r.sricharan@ti.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 + * USA + */ #ifndef __ARCH_ARM_MACH_OMAP2_L3_INTERCONNECT_3XXX_H #define __ARCH_ARM_MACH_OMAP2_L3_INTERCONNECT_3XXX_H @@ -40,7 +40,7 @@ #define L3_SI_CONTROL 0x020 #define L3_SI_FLAG_STATUS_0 0x510 -const u64 shift = 1; +static const u64 shift = 1; #define L3_STATUS_0_MPUIA_BRST (shift << 0) #define L3_STATUS_0_MPUIA_RSP (shift << 1) @@ -78,32 +78,32 @@ const u64 shift = 1; #define L3_STATUS_0_L4EMUTA_REQ (shift << 60) #define L3_STATUS_0_MAD2DTA_REQ (shift << 61) -#define L3_STATUS_0_TIMEOUT_MASK (L3_STATUS_0_MPUIA_BRST \ - | L3_STATUS_0_MPUIA_RSP \ - | L3_STATUS_0_IVAIA_BRST \ - | L3_STATUS_0_IVAIA_RSP \ - | L3_STATUS_0_SGXIA_BRST \ - | L3_STATUS_0_SGXIA_RSP \ - | L3_STATUS_0_CAMIA_BRST \ - | L3_STATUS_0_CAMIA_RSP \ - | L3_STATUS_0_DISPIA_BRST \ - | L3_STATUS_0_DISPIA_RSP \ - | L3_STATUS_0_DMARDIA_BRST \ - | L3_STATUS_0_DMARDIA_RSP \ - | L3_STATUS_0_DMAWRIA_BRST \ - | L3_STATUS_0_DMAWRIA_RSP \ - | L3_STATUS_0_USBOTGIA_BRST \ - | L3_STATUS_0_USBOTGIA_RSP \ - | L3_STATUS_0_USBHOSTIA_BRST \ - | L3_STATUS_0_SMSTA_REQ \ - | L3_STATUS_0_GPMCTA_REQ \ - | L3_STATUS_0_OCMRAMTA_REQ \ - | L3_STATUS_0_OCMROMTA_REQ \ - | L3_STATUS_0_IVATA_REQ \ - | L3_STATUS_0_SGXTA_REQ \ - | L3_STATUS_0_L4CORETA_REQ \ - | L3_STATUS_0_L4PERTA_REQ \ - | L3_STATUS_0_L4EMUTA_REQ \ +#define L3_STATUS_0_TIMEOUT_MASK (L3_STATUS_0_MPUIA_BRST \ + | L3_STATUS_0_MPUIA_RSP \ + | L3_STATUS_0_IVAIA_BRST \ + | L3_STATUS_0_IVAIA_RSP \ + | L3_STATUS_0_SGXIA_BRST \ + | L3_STATUS_0_SGXIA_RSP \ + | L3_STATUS_0_CAMIA_BRST \ + | L3_STATUS_0_CAMIA_RSP \ + | L3_STATUS_0_DISPIA_BRST \ + | L3_STATUS_0_DISPIA_RSP \ + | L3_STATUS_0_DMARDIA_BRST \ + | L3_STATUS_0_DMARDIA_RSP \ + | L3_STATUS_0_DMAWRIA_BRST \ + | L3_STATUS_0_DMAWRIA_RSP \ + | L3_STATUS_0_USBOTGIA_BRST \ + | L3_STATUS_0_USBOTGIA_RSP \ + | L3_STATUS_0_USBHOSTIA_BRST \ + | L3_STATUS_0_SMSTA_REQ \ + | L3_STATUS_0_GPMCTA_REQ \ + | L3_STATUS_0_OCMRAMTA_REQ \ + | L3_STATUS_0_OCMROMTA_REQ \ + | L3_STATUS_0_IVATA_REQ \ + | L3_STATUS_0_SGXTA_REQ \ + | L3_STATUS_0_L4CORETA_REQ \ + | L3_STATUS_0_L4PERTA_REQ \ + | L3_STATUS_0_L4EMUTA_REQ \ | L3_STATUS_0_MAD2DTA_REQ) #define L3_SI_FLAG_STATUS_1 0x530 @@ -137,19 +137,19 @@ const u64 shift = 1; enum omap3_l3_initiator_id { /* LCD has 1 ID */ - OMAP_L3_LCD = 29, + OMAP_L3_LCD = 29, /* SAD2D has 1 ID */ - OMAP_L3_SAD2D = 28, + OMAP_L3_SAD2D = 28, /* MPU has 5 IDs */ - OMAP_L3_IA_MPU_SS_1 = 27, - OMAP_L3_IA_MPU_SS_2 = 26, - OMAP_L3_IA_MPU_SS_3 = 25, - OMAP_L3_IA_MPU_SS_4 = 24, - OMAP_L3_IA_MPU_SS_5 = 23, + OMAP_L3_IA_MPU_SS_1 = 27, + OMAP_L3_IA_MPU_SS_2 = 26, + OMAP_L3_IA_MPU_SS_3 = 25, + OMAP_L3_IA_MPU_SS_4 = 24, + OMAP_L3_IA_MPU_SS_5 = 23, /* IVA2.2 SS has 3 IDs*/ - OMAP_L3_IA_IVA_SS_1 = 22, - OMAP_L3_IA_IVA_SS_2 = 21, - OMAP_L3_IA_IVA_SS_3 = 20, + OMAP_L3_IA_IVA_SS_1 = 22, + OMAP_L3_IA_IVA_SS_2 = 21, + OMAP_L3_IA_IVA_SS_3 = 20, /* IVA 2.2 SS DMA has 6 IDS */ OMAP_L3_IA_IVA_SS_DMA_1 = 19, OMAP_L3_IA_IVA_SS_DMA_2 = 18, @@ -158,25 +158,25 @@ enum omap3_l3_initiator_id { OMAP_L3_IA_IVA_SS_DMA_5 = 15, OMAP_L3_IA_IVA_SS_DMA_6 = 14, /* SGX has 1 ID */ - OMAP_L3_IA_SGX = 13, + OMAP_L3_IA_SGX = 13, /* CAM has 3 ID */ - OMAP_L3_IA_CAM_1 = 12, - OMAP_L3_IA_CAM_2 = 11, - OMAP_L3_IA_CAM_3 = 10, + OMAP_L3_IA_CAM_1 = 12, + OMAP_L3_IA_CAM_2 = 11, + OMAP_L3_IA_CAM_3 = 10, /* DAP has 1 ID */ - OMAP_L3_IA_DAP = 9, + OMAP_L3_IA_DAP = 9, /* SDMA WR has 2 IDs */ - OMAP_L3_SDMA_WR_1 = 8, - OMAP_L3_SDMA_WR_2 = 7, + OMAP_L3_SDMA_WR_1 = 8, + OMAP_L3_SDMA_WR_2 = 7, /* SDMA RD has 4 IDs */ - OMAP_L3_SDMA_RD_1 = 6, - OMAP_L3_SDMA_RD_2 = 5, - OMAP_L3_SDMA_RD_3 = 4, - OMAP_L3_SDMA_RD_4 = 3, + OMAP_L3_SDMA_RD_1 = 6, + OMAP_L3_SDMA_RD_2 = 5, + OMAP_L3_SDMA_RD_3 = 4, + OMAP_L3_SDMA_RD_4 = 3, /* HSUSB OTG has 1 ID */ - OMAP_L3_USBOTG = 2, + OMAP_L3_USBOTG = 2, /* HSUSB HOST has 1 ID */ - OMAP_L3_USBHOST = 1, + OMAP_L3_USBHOST = 1, }; enum omap3_l3_code { @@ -192,21 +192,21 @@ enum omap3_l3_code { }; struct omap3_l3 { - struct device *dev; - struct clk *ick; + struct device *dev; + struct clk *ick; /* memory base*/ - void __iomem *rt; + void __iomem *rt; - int debug_irq; - int app_irq; + int debug_irq; + int app_irq; /* true when and inband functional error occurs */ - unsigned inband:1; + unsigned inband:1; }; /* offsets for l3 agents in order with the Flag status register */ -unsigned int __iomem omap3_l3_app_bases[] = { +static unsigned int omap3_l3_app_bases[] = { /* MPU IA */ 0x1400, 0x1400, @@ -305,7 +305,7 @@ unsigned int __iomem omap3_l3_app_bases[] = { 0, }; -unsigned int __iomem omap3_l3_debug_bases[] = { +static unsigned int omap3_l3_debug_bases[] = { /* MPU DATA IA */ 0x1400, /* RESERVED */ @@ -321,7 +321,7 @@ unsigned int __iomem omap3_l3_debug_bases[] = { /* REST RESERVED */ }; -u32 *omap3_l3_bases[] = { +static u32 *omap3_l3_bases[] = { omap3_l3_app_bases, omap3_l3_debug_bases, }; diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c index 0844e2e..2ab7a9e 100644 --- a/arch/arm/mach-omap2/pm.c +++ b/arch/arm/mach-omap2/pm.c @@ -26,38 +26,7 @@ static struct omap_device_pm_latency *pm_lats; -static struct device *mpu_dev; -static struct device *iva_dev; -static struct device *l3_dev; -static struct device *dsp_dev; - -struct device *omap2_get_mpuss_device(void) -{ - WARN_ON_ONCE(!mpu_dev); - return mpu_dev; -} - -struct device *omap2_get_iva_device(void) -{ - WARN_ON_ONCE(!iva_dev); - return iva_dev; -} - -struct device *omap2_get_l3_device(void) -{ - WARN_ON_ONCE(!l3_dev); - return l3_dev; -} - -struct device *omap4_get_dsp_device(void) -{ - WARN_ON_ONCE(!dsp_dev); - return dsp_dev; -} -EXPORT_SYMBOL(omap4_get_dsp_device); - -/* static int _init_omap_device(struct omap_hwmod *oh, void *user) */ -static int _init_omap_device(char *name, struct device **new_dev) +static int _init_omap_device(char *name) { struct omap_hwmod *oh; struct platform_device *pdev; @@ -72,8 +41,6 @@ static int _init_omap_device(char *name, struct device **new_dev) __func__, name)) return -ENODEV; - *new_dev = &pdev->dev; - return 0; } @@ -82,16 +49,16 @@ static int _init_omap_device(char *name, struct device **new_dev) */ static void omap2_init_processor_devices(void) { - _init_omap_device("mpu", &mpu_dev); + _init_omap_device("mpu"); if (omap3_has_iva()) - _init_omap_device("iva", &iva_dev); + _init_omap_device("iva"); if (cpu_is_omap44xx()) { - _init_omap_device("l3_main_1", &l3_dev); - _init_omap_device("dsp", &dsp_dev); - _init_omap_device("iva", &iva_dev); + _init_omap_device("l3_main_1"); + _init_omap_device("dsp"); + _init_omap_device("iva"); } else { - _init_omap_device("l3_main", &l3_dev); + _init_omap_device("l3_main"); } } @@ -169,18 +136,26 @@ err: * in the opp entry */ static int __init omap2_set_init_voltage(char *vdd_name, char *clk_name, - struct device *dev) + const char *oh_name) { struct voltagedomain *voltdm; struct clk *clk; struct opp *opp; unsigned long freq, bootup_volt; + struct device *dev; - if (!vdd_name || !clk_name || !dev) { + if (!vdd_name || !clk_name || !oh_name) { pr_err("%s: invalid parameters\n", __func__); goto exit; } + dev = omap_device_get_by_hwmod_name(oh_name); + if (IS_ERR(dev)) { + pr_err("%s: Unable to get dev pointer for hwmod %s\n", + __func__, oh_name); + goto exit; + } + voltdm = voltdm_lookup(vdd_name); if (IS_ERR(voltdm)) { pr_err("%s: unable to get vdd pointer for vdd_%s\n", @@ -224,8 +199,8 @@ static void __init omap3_init_voltages(void) if (!cpu_is_omap34xx()) return; - omap2_set_init_voltage("mpu_iva", "dpll1_ck", mpu_dev); - omap2_set_init_voltage("core", "l3_ick", l3_dev); + omap2_set_init_voltage("mpu_iva", "dpll1_ck", "mpu"); + omap2_set_init_voltage("core", "l3_ick", "l3_main"); } static void __init omap4_init_voltages(void) @@ -233,14 +208,15 @@ static void __init omap4_init_voltages(void) if (!cpu_is_omap44xx()) return; - omap2_set_init_voltage("mpu", "dpll_mpu_ck", mpu_dev); - omap2_set_init_voltage("core", "l3_div_ck", l3_dev); - omap2_set_init_voltage("iva", "dpll_iva_m5x2_ck", iva_dev); + omap2_set_init_voltage("mpu", "dpll_mpu_ck", "mpu"); + omap2_set_init_voltage("core", "l3_div_ck", "l3_main_1"); + omap2_set_init_voltage("iva", "dpll_iva_m5x2_ck", "iva"); } static int __init omap2_common_pm_init(void) { - omap2_init_processor_devices(); + if (!of_have_populated_dt()) + omap2_init_processor_devices(); omap_pm_if_init(); return 0; diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c index 2e40a5c..8db5f03 100644 --- a/arch/arm/mach-omap2/prcm.c +++ b/arch/arm/mach-omap2/prcm.c @@ -151,17 +151,10 @@ int omap2_cm_wait_idlest(void __iomem *reg, u32 mask, u8 idlest, void __init omap2_set_globals_prcm(struct omap_globals *omap2_globals) { - /* Static mapping, never released */ - if (omap2_globals->prm) { - prm_base = ioremap(omap2_globals->prm, SZ_8K); - WARN_ON(!prm_base); - } - if (omap2_globals->cm) { - cm_base = ioremap(omap2_globals->cm, SZ_8K); - WARN_ON(!cm_base); - } - if (omap2_globals->cm2) { - cm2_base = ioremap(omap2_globals->cm2, SZ_8K); - WARN_ON(!cm2_base); - } + if (omap2_globals->prm) + prm_base = omap2_globals->prm; + if (omap2_globals->cm) + cm_base = omap2_globals->cm; + if (omap2_globals->cm2) + cm2_base = omap2_globals->cm2; } diff --git a/arch/arm/mach-omap2/sdrc.c b/arch/arm/mach-omap2/sdrc.c index da6f3a6..8f27828 100644 --- a/arch/arm/mach-omap2/sdrc.c +++ b/arch/arm/mach-omap2/sdrc.c @@ -117,15 +117,10 @@ int omap2_sdrc_get_params(unsigned long r, void __init omap2_set_globals_sdrc(struct omap_globals *omap2_globals) { - /* Static mapping, never released */ - if (omap2_globals->sdrc) { - omap2_sdrc_base = ioremap(omap2_globals->sdrc, SZ_64K); - WARN_ON(!omap2_sdrc_base); - } - if (omap2_globals->sms) { - omap2_sms_base = ioremap(omap2_globals->sms, SZ_64K); - WARN_ON(!omap2_sms_base); - } + if (omap2_globals->sdrc) + omap2_sdrc_base = omap2_globals->sdrc; + if (omap2_globals->sms) + omap2_sms_base = omap2_globals->sms; } /** diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c index 3d1c1d3..9992dbf 100644 --- a/arch/arm/mach-omap2/serial.c +++ b/arch/arm/mach-omap2/serial.c @@ -107,28 +107,6 @@ struct omap_uart_state { static LIST_HEAD(uart_list); static u8 num_uarts; -static int uart_idle_hwmod(struct omap_device *od) -{ - omap_hwmod_idle(od->hwmods[0]); - - return 0; -} - -static int uart_enable_hwmod(struct omap_device *od) -{ - omap_hwmod_enable(od->hwmods[0]); - - return 0; -} - -static struct omap_device_pm_latency omap_uart_latency[] = { - { - .deactivate_func = uart_idle_hwmod, - .activate_func = uart_enable_hwmod, - .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST, - }, -}; - static inline unsigned int __serial_read_reg(struct uart_port *up, int offset) { @@ -800,8 +778,7 @@ void __init omap_serial_init_port(struct omap_board_data *bdata) return; pdev = omap_device_build(name, uart->num, oh, pdata, pdata_size, - omap_uart_latency, - ARRAY_SIZE(omap_uart_latency), false); + NULL, 0, false); WARN(IS_ERR(pdev), "Could not build omap_device for %s: %s.\n", name, oh->name); diff --git a/arch/arm/mach-omap2/sr_device.c b/arch/arm/mach-omap2/sr_device.c index eba9f9a..9f43fcc 100644 --- a/arch/arm/mach-omap2/sr_device.c +++ b/arch/arm/mach-omap2/sr_device.c @@ -31,14 +31,6 @@ static bool sr_enable_on_init; -static struct omap_device_pm_latency omap_sr_latency[] = { - { - .deactivate_func = omap_device_idle_hwmods, - .activate_func = omap_device_enable_hwmods, - .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST - }, -}; - /* Read EFUSE values from control registers for OMAP3430 */ static void __init sr_set_nvalues(struct omap_volt_data *volt_data, struct omap_sr_data *sr_data) @@ -121,8 +113,7 @@ static int sr_dev_init(struct omap_hwmod *oh, void *user) sr_data->enable_on_init = sr_enable_on_init; pdev = omap_device_build(name, i, oh, sr_data, sizeof(*sr_data), - omap_sr_latency, - ARRAY_SIZE(omap_sr_latency), 0); + NULL, 0, 0); if (IS_ERR(pdev)) pr_warning("%s: Could not build omap_device for %s: %s.\n\n", __func__, name, oh->name); diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c index 1140e98..e49fc7b 100644 --- a/arch/arm/mach-omap2/timer.c +++ b/arch/arm/mach-omap2/timer.c @@ -434,7 +434,7 @@ static int __init omap_timer_init(struct omap_hwmod *oh, void *unused) int ret = 0; char *name = "omap_timer"; struct dmtimer_platform_data *pdata; - struct omap_device *od; + struct platform_device *pdev; struct omap_timer_capability_dev_attr *timer_dev_attr; struct powerdomain *pwrdm; @@ -476,12 +476,12 @@ static int __init omap_timer_init(struct omap_hwmod *oh, void *unused) #ifdef CONFIG_PM pdata->get_context_loss_count = omap_pm_get_dev_context_loss_count; #endif - od = omap_device_build(name, id, oh, pdata, sizeof(*pdata), + pdev = omap_device_build(name, id, oh, pdata, sizeof(*pdata), omap2_dmtimer_latency, ARRAY_SIZE(omap2_dmtimer_latency), 0); - if (IS_ERR(od)) { + if (IS_ERR(pdev)) { pr_err("%s: Can't build omap_device for %s: %s.\n", __func__, name, oh->name); ret = -EINVAL; diff --git a/arch/arm/mach-omap2/usb-musb.c b/arch/arm/mach-omap2/usb-musb.c index 19e4dac..47fb5d6 100644 --- a/arch/arm/mach-omap2/usb-musb.c +++ b/arch/arm/mach-omap2/usb-musb.c @@ -60,14 +60,6 @@ static struct musb_hdrc_platform_data musb_plat = { static u64 musb_dmamask = DMA_BIT_MASK(32); -static struct omap_device_pm_latency omap_musb_latency[] = { - { - .deactivate_func = omap_device_idle_hwmods, - .activate_func = omap_device_enable_hwmods, - .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST, - }, -}; - static void usb_musb_mux_init(struct omap_musb_board_data *board_data) { switch (board_data->interface_type) { @@ -115,7 +107,6 @@ static struct omap_musb_board_data musb_default_board_data = { void __init usb_musb_init(struct omap_musb_board_data *musb_board_data) { struct omap_hwmod *oh; - struct omap_device *od; struct platform_device *pdev; struct device *dev; int bus_id = -1; @@ -145,22 +136,19 @@ void __init usb_musb_init(struct omap_musb_board_data *musb_board_data) name = "musb-omap2430"; } - oh = omap_hwmod_lookup(oh_name); - if (!oh) { - pr_err("Could not look up %s\n", oh_name); - return; - } + oh = omap_hwmod_lookup(oh_name); + if (WARN(!oh, "%s: could not find omap_hwmod for %s\n", + __func__, oh_name)) + return; - od = omap_device_build(name, bus_id, oh, &musb_plat, - sizeof(musb_plat), omap_musb_latency, - ARRAY_SIZE(omap_musb_latency), false); - if (IS_ERR(od)) { + pdev = omap_device_build(name, bus_id, oh, &musb_plat, + sizeof(musb_plat), NULL, 0, false); + if (IS_ERR(pdev)) { pr_err("Could not build omap_device for %s %s\n", name, oh_name); return; } - pdev = &od->pdev; dev = &pdev->dev; get_device(dev); dev->dma_mask = &musb_dmamask; |
