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-rw-r--r--arch/arm/mach-mx5/cpu.c43
1 files changed, 25 insertions, 18 deletions
diff --git a/arch/arm/mach-mx5/cpu.c b/arch/arm/mach-mx5/cpu.c
index 061ab70..8c9a29e 100644
--- a/arch/arm/mach-mx5/cpu.c
+++ b/arch/arm/mach-mx5/cpu.c
@@ -97,24 +97,31 @@ static int __init post_cpu_init(void)
unsigned int reg;
void __iomem *base;
- if (!cpu_is_mx51())
- return 0;
-
- base = MX51_IO_ADDRESS(MX51_AIPS1_BASE_ADDR);
- __raw_writel(0x0, base + 0x40);
- __raw_writel(0x0, base + 0x44);
- __raw_writel(0x0, base + 0x48);
- __raw_writel(0x0, base + 0x4C);
- reg = __raw_readl(base + 0x50) & 0x00FFFFFF;
- __raw_writel(reg, base + 0x50);
-
- base = MX51_IO_ADDRESS(MX51_AIPS2_BASE_ADDR);
- __raw_writel(0x0, base + 0x40);
- __raw_writel(0x0, base + 0x44);
- __raw_writel(0x0, base + 0x48);
- __raw_writel(0x0, base + 0x4C);
- reg = __raw_readl(base + 0x50) & 0x00FFFFFF;
- __raw_writel(reg, base + 0x50);
+ if (cpu_is_mx51() || cpu_is_mx53()) {
+ if (cpu_is_mx51())
+ base = MX51_IO_ADDRESS(MX51_AIPS1_BASE_ADDR);
+ else
+ base = MX53_IO_ADDRESS(MX53_AIPS1_BASE_ADDR);
+
+ __raw_writel(0x0, base + 0x40);
+ __raw_writel(0x0, base + 0x44);
+ __raw_writel(0x0, base + 0x48);
+ __raw_writel(0x0, base + 0x4C);
+ reg = __raw_readl(base + 0x50) & 0x00FFFFFF;
+ __raw_writel(reg, base + 0x50);
+
+ if (cpu_is_mx51())
+ base = MX51_IO_ADDRESS(MX51_AIPS2_BASE_ADDR);
+ else
+ base = MX53_IO_ADDRESS(MX53_AIPS2_BASE_ADDR);
+
+ __raw_writel(0x0, base + 0x40);
+ __raw_writel(0x0, base + 0x44);
+ __raw_writel(0x0, base + 0x48);
+ __raw_writel(0x0, base + 0x4C);
+ reg = __raw_readl(base + 0x50) & 0x00FFFFFF;
+ __raw_writel(reg, base + 0x50);
+ }
return 0;
}
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