diff options
Diffstat (limited to 'arch/arm/mach-imx')
| -rw-r--r-- | arch/arm/mach-imx/Makefile.boot | 34 | ||||
| -rw-r--r-- | arch/arm/mach-imx/clock-imx6q.c | 17 | ||||
| -rw-r--r-- | arch/arm/mach-imx/mm-imx3.c | 58 |
3 files changed, 66 insertions, 43 deletions
diff --git a/arch/arm/mach-imx/Makefile.boot b/arch/arm/mach-imx/Makefile.boot index 22d8588..cfede57 100644 --- a/arch/arm/mach-imx/Makefile.boot +++ b/arch/arm/mach-imx/Makefile.boot @@ -1,22 +1,26 @@ -zreladdr-$(CONFIG_ARCH_MX1) += 0x08008000 -params_phys-$(CONFIG_ARCH_MX1) := 0x08000100 -initrd_phys-$(CONFIG_ARCH_MX1) := 0x08800000 +zreladdr-$(CONFIG_SOC_IMX1) += 0x08008000 +params_phys-$(CONFIG_SOC_IMX1) := 0x08000100 +initrd_phys-$(CONFIG_SOC_IMX1) := 0x08800000 -zreladdr-$(CONFIG_MACH_MX21) += 0xC0008000 -params_phys-$(CONFIG_MACH_MX21) := 0xC0000100 -initrd_phys-$(CONFIG_MACH_MX21) := 0xC0800000 +zreladdr-$(CONFIG_SOC_IMX21) += 0xC0008000 +params_phys-$(CONFIG_SOC_IMX21) := 0xC0000100 +initrd_phys-$(CONFIG_SOC_IMX21) := 0xC0800000 -zreladdr-$(CONFIG_ARCH_MX25) += 0x80008000 -params_phys-$(CONFIG_ARCH_MX25) := 0x80000100 -initrd_phys-$(CONFIG_ARCH_MX25) := 0x80800000 +zreladdr-$(CONFIG_SOC_IMX25) += 0x80008000 +params_phys-$(CONFIG_SOC_IMX25) := 0x80000100 +initrd_phys-$(CONFIG_SOC_IMX25) := 0x80800000 -zreladdr-$(CONFIG_MACH_MX27) += 0xA0008000 -params_phys-$(CONFIG_MACH_MX27) := 0xA0000100 -initrd_phys-$(CONFIG_MACH_MX27) := 0xA0800000 +zreladdr-$(CONFIG_SOC_IMX27) += 0xA0008000 +params_phys-$(CONFIG_SOC_IMX27) := 0xA0000100 +initrd_phys-$(CONFIG_SOC_IMX27) := 0xA0800000 -zreladdr-$(CONFIG_ARCH_MX3) += 0x80008000 -params_phys-$(CONFIG_ARCH_MX3) := 0x80000100 -initrd_phys-$(CONFIG_ARCH_MX3) := 0x80800000 +zreladdr-$(CONFIG_SOC_IMX31) += 0x80008000 +params_phys-$(CONFIG_SOC_IMX31) := 0x80000100 +initrd_phys-$(CONFIG_SOC_IMX31) := 0x80800000 + +zreladdr-$(CONFIG_SOC_IMX35) += 0x80008000 +params_phys-$(CONFIG_SOC_IMX35) := 0x80000100 +initrd_phys-$(CONFIG_SOC_IMX35) := 0x80800000 zreladdr-$(CONFIG_SOC_IMX6Q) += 0x10008000 params_phys-$(CONFIG_SOC_IMX6Q) := 0x10000100 diff --git a/arch/arm/mach-imx/clock-imx6q.c b/arch/arm/mach-imx/clock-imx6q.c index e0b926d..613a1b9 100644 --- a/arch/arm/mach-imx/clock-imx6q.c +++ b/arch/arm/mach-imx/clock-imx6q.c @@ -1139,7 +1139,7 @@ static int _clk_set_rate(struct clk *clk, unsigned long rate) return -EINVAL; max_div = ((d->bm_pred >> d->bp_pred) + 1) * - ((d->bm_pred >> d->bp_pred) + 1); + ((d->bm_podf >> d->bp_podf) + 1); div = parent_rate / rate; if (div == 0) @@ -2002,6 +2002,21 @@ int __init mx6q_clocks_init(void) clk_set_rate(&asrc_serial_clk, 1500000); clk_set_rate(&enfc_clk, 11000000); + /* + * Before pinctrl API is available, we have to rely on the pad + * configuration set up by bootloader. For usdhc example here, + * u-boot sets up the pads for 49.5 MHz case, and we have to lower + * the usdhc clock from 198 to 49.5 MHz to match the pad configuration. + * + * FIXME: This is should be removed after pinctrl API is available. + * At that time, usdhc driver can call pinctrl API to change pad + * configuration dynamically per different usdhc clock settings. + */ + clk_set_rate(&usdhc1_clk, 49500000); + clk_set_rate(&usdhc2_clk, 49500000); + clk_set_rate(&usdhc3_clk, 49500000); + clk_set_rate(&usdhc4_clk, 49500000); + np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-gpt"); base = of_iomap(np, 0); WARN_ON(!base); diff --git a/arch/arm/mach-imx/mm-imx3.c b/arch/arm/mach-imx/mm-imx3.c index 6d01de3..31807d2 100644 --- a/arch/arm/mach-imx/mm-imx3.c +++ b/arch/arm/mach-imx/mm-imx3.c @@ -111,6 +111,7 @@ void imx3_init_l2x0(void) l2x0_init(l2x0_base, 0x00030024, 0x00000000); } +#ifdef CONFIG_SOC_IMX31 static struct map_desc mx31_io_desc[] __initdata = { imx_map_entry(MX31, X_MEMC, MT_DEVICE), imx_map_entry(MX31, AVIC, MT_DEVICE_NONSHARED), @@ -129,19 +130,6 @@ void __init mx31_map_io(void) iotable_init(mx31_io_desc, ARRAY_SIZE(mx31_io_desc)); } -static struct map_desc mx35_io_desc[] __initdata = { - imx_map_entry(MX35, X_MEMC, MT_DEVICE), - imx_map_entry(MX35, AVIC, MT_DEVICE_NONSHARED), - imx_map_entry(MX35, AIPS1, MT_DEVICE_NONSHARED), - imx_map_entry(MX35, AIPS2, MT_DEVICE_NONSHARED), - imx_map_entry(MX35, SPBA0, MT_DEVICE_NONSHARED), -}; - -void __init mx35_map_io(void) -{ - iotable_init(mx35_io_desc, ARRAY_SIZE(mx35_io_desc)); -} - void __init imx31_init_early(void) { mxc_set_cpu_type(MXC_CPU_MX31); @@ -150,25 +138,11 @@ void __init imx31_init_early(void) imx_ioremap = imx3_ioremap; } -void __init imx35_init_early(void) -{ - mxc_set_cpu_type(MXC_CPU_MX35); - mxc_iomux_v3_init(MX35_IO_ADDRESS(MX35_IOMUXC_BASE_ADDR)); - mxc_arch_reset_init(MX35_IO_ADDRESS(MX35_WDOG_BASE_ADDR)); - pm_idle = imx3_idle; - imx_ioremap = imx3_ioremap; -} - void __init mx31_init_irq(void) { mxc_init_irq(MX31_IO_ADDRESS(MX31_AVIC_BASE_ADDR)); } -void __init mx35_init_irq(void) -{ - mxc_init_irq(MX35_IO_ADDRESS(MX35_AVIC_BASE_ADDR)); -} - static struct sdma_script_start_addrs imx31_to1_sdma_script __initdata = { .per_2_per_addr = 1677, }; @@ -202,6 +176,35 @@ void __init imx31_soc_init(void) imx_add_imx_sdma("imx31-sdma", MX31_SDMA_BASE_ADDR, MX31_INT_SDMA, &imx31_sdma_pdata); } +#endif /* ifdef CONFIG_SOC_IMX31 */ + +#ifdef CONFIG_SOC_IMX35 +static struct map_desc mx35_io_desc[] __initdata = { + imx_map_entry(MX35, X_MEMC, MT_DEVICE), + imx_map_entry(MX35, AVIC, MT_DEVICE_NONSHARED), + imx_map_entry(MX35, AIPS1, MT_DEVICE_NONSHARED), + imx_map_entry(MX35, AIPS2, MT_DEVICE_NONSHARED), + imx_map_entry(MX35, SPBA0, MT_DEVICE_NONSHARED), +}; + +void __init mx35_map_io(void) +{ + iotable_init(mx35_io_desc, ARRAY_SIZE(mx35_io_desc)); +} + +void __init imx35_init_early(void) +{ + mxc_set_cpu_type(MXC_CPU_MX35); + mxc_iomux_v3_init(MX35_IO_ADDRESS(MX35_IOMUXC_BASE_ADDR)); + mxc_arch_reset_init(MX35_IO_ADDRESS(MX35_WDOG_BASE_ADDR)); + pm_idle = imx3_idle; + imx_ioremap = imx3_ioremap; +} + +void __init mx35_init_irq(void) +{ + mxc_init_irq(MX35_IO_ADDRESS(MX35_AVIC_BASE_ADDR)); +} static struct sdma_script_start_addrs imx35_to1_sdma_script __initdata = { .ap_2_ap_addr = 642, @@ -257,3 +260,4 @@ void __init imx35_soc_init(void) imx_add_imx_sdma("imx35-sdma", MX35_SDMA_BASE_ADDR, MX35_INT_SDMA, &imx35_sdma_pdata); } +#endif /* ifdef CONFIG_SOC_IMX35 */ |
