diff options
Diffstat (limited to 'arch/arm/mach-clps711x/include/mach/autcpu12.h')
| -rw-r--r-- | arch/arm/mach-clps711x/include/mach/autcpu12.h | 23 |
1 files changed, 2 insertions, 21 deletions
diff --git a/arch/arm/mach-clps711x/include/mach/autcpu12.h b/arch/arm/mach-clps711x/include/mach/autcpu12.h index 1588a36..0452f5f 100644 --- a/arch/arm/mach-clps711x/include/mach/autcpu12.h +++ b/arch/arm/mach-clps711x/include/mach/autcpu12.h @@ -21,24 +21,15 @@ #define __ASM_ARCH_AUTCPU12_H /* - * The CS8900A ethernet chip has its I/O registers wired to chip select 2 - * (nCS2). This is the mapping for it. - */ -#define AUTCPU12_PHYS_CS8900A CS2_PHYS_BASE /* physical */ -#define AUTCPU12_VIRT_CS8900A (0xfe000000) /* virtual */ - -/* * The flash bank is wired to chip select 0 */ #define AUTCPU12_PHYS_FLASH CS0_PHYS_BASE /* physical */ /* offset for device specific information structure */ #define AUTCPU12_LCDINFO_OFFS (0x00010000) -/* -* Videomemory is the internal SRAM (CS 6) -*/ + +/* Videomemory in the internal SRAM (CS 6) */ #define AUTCPU12_PHYS_VIDEO CS6_PHYS_BASE -#define AUTCPU12_VIRT_VIDEO (0xfd000000) /* * All special IO's are tied to CS1 @@ -49,8 +40,6 @@ #define AUTCPU12_PHYS_CSAUX1 CS1_PHYS_BASE +0x04000000 /* physical */ -#define AUTCPU12_PHYS_SMC CS1_PHYS_BASE +0x06000000 /* physical */ - #define AUTCPU12_PHYS_CAN CS1_PHYS_BASE +0x08000000 /* physical */ #define AUTCPU12_PHYS_TOUCH CS1_PHYS_BASE +0x0A000000 /* physical */ @@ -59,14 +48,6 @@ #define AUTCPU12_PHYS_LPT CS1_PHYS_BASE +0x0E000000 /* physical */ -/* -* defines for smartmedia card access -*/ -#define AUTCPU12_SMC_RDY (1<<2) -#define AUTCPU12_SMC_ALE (1<<3) -#define AUTCPU12_SMC_CLE (1<<4) -#define AUTCPU12_SMC_PORT_OFFSET PBDR -#define AUTCPU12_SMC_SELECT_OFFSET 0x10 /* * defines for lcd contrast */ |
