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-rw-r--r--arch/arm/lib/io-writesb.S25
1 files changed, 13 insertions, 12 deletions
diff --git a/arch/arm/lib/io-writesb.S b/arch/arm/lib/io-writesb.S
index 70b2561..08209fc 100644
--- a/arch/arm/lib/io-writesb.S
+++ b/arch/arm/lib/io-writesb.S
@@ -30,7 +30,7 @@
#endif
.endm
-.outsb_align: rsb ip, ip, #4
+.Loutsb_align: rsb ip, ip, #4
cmp ip, r2
movgt ip, r2
cmp ip, #2
@@ -41,44 +41,45 @@
ldrgtb r3, [r1], #1
strgtb r3, [r0]
subs r2, r2, ip
- bne .outsb_aligned
+ bne .Loutsb_aligned
ENTRY(__raw_writesb)
teq r2, #0 @ do we have to check for the zero len?
moveq pc, lr
ands ip, r1, #3
- bne .outsb_align
+ bne .Loutsb_align
-.outsb_aligned: stmfd sp!, {r4, r5, lr}
+.Loutsb_aligned:
+ stmfd sp!, {r4, r5, lr}
subs r2, r2, #16
- bmi .outsb_no_16
+ bmi .Loutsb_no_16
-.outsb_16_lp: ldmia r1!, {r3, r4, r5, ip}
+.Loutsb_16_lp: ldmia r1!, {r3, r4, r5, ip}
outword r3
outword r4
outword r5
outword ip
subs r2, r2, #16
- bpl .outsb_16_lp
+ bpl .Loutsb_16_lp
tst r2, #15
LOADREGS(eqfd, sp!, {r4, r5, pc})
-.outsb_no_16: tst r2, #8
- beq .outsb_no_8
+.Loutsb_no_16: tst r2, #8
+ beq .Loutsb_no_8
ldmia r1!, {r3, r4}
outword r3
outword r4
-.outsb_no_8: tst r2, #4
- beq .outsb_no_4
+.Loutsb_no_8: tst r2, #4
+ beq .Loutsb_no_4
ldr r3, [r1], #4
outword r3
-.outsb_no_4: ands r2, r2, #3
+.Loutsb_no_4: ands r2, r2, #3
LOADREGS(eqfd, sp!, {r4, r5, pc})
cmp r2, #2
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