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-rw-r--r--arch/arm/boot/dts/sun5i.dtsi86
1 files changed, 43 insertions, 43 deletions
diff --git a/arch/arm/boot/dts/sun5i.dtsi b/arch/arm/boot/dts/sun5i.dtsi
index 98cc003..07f2248 100644
--- a/arch/arm/boot/dts/sun5i.dtsi
+++ b/arch/arm/boot/dts/sun5i.dtsi
@@ -93,7 +93,7 @@
#size-cells = <1>;
ranges;
- osc24M: clk@01c20050 {
+ osc24M: clk@1c20050 {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <24000000>;
@@ -108,20 +108,20 @@
};
};
- soc@01c00000 {
+ soc@1c00000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
- sram-controller@01c00000 {
+ sram-controller@1c00000 {
compatible = "allwinner,sun4i-a10-sram-controller";
reg = <0x01c00000 0x30>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
- sram_a: sram@00000000 {
+ sram_a: sram@0 {
compatible = "mmio-sram";
reg = <0x00000000 0xc000>;
#address-cells = <1>;
@@ -135,14 +135,14 @@
status = "disabled";
};
- sram_d: sram@00010000 {
+ sram_d: sram@10000 {
compatible = "mmio-sram";
reg = <0x00010000 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x00010000 0x1000>;
- otg_sram: sram-section@0000 {
+ otg_sram: sram-section@0 {
compatible = "allwinner,sun4i-a10-sram-d";
reg = <0x0000 0x1000>;
status = "disabled";
@@ -150,7 +150,7 @@
};
};
- dma: dma-controller@01c02000 {
+ dma: dma-controller@1c02000 {
compatible = "allwinner,sun4i-a10-dma";
reg = <0x01c02000 0x1000>;
interrupts = <27>;
@@ -158,7 +158,7 @@
#dma-cells = <2>;
};
- nfc: nand@01c03000 {
+ nfc: nand@1c03000 {
compatible = "allwinner,sun4i-a10-nand";
reg = <0x01c03000 0x1000>;
interrupts = <37>;
@@ -171,7 +171,7 @@
#size-cells = <0>;
};
- spi0: spi@01c05000 {
+ spi0: spi@1c05000 {
compatible = "allwinner,sun4i-a10-spi";
reg = <0x01c05000 0x1000>;
interrupts = <10>;
@@ -185,7 +185,7 @@
#size-cells = <0>;
};
- spi1: spi@01c06000 {
+ spi1: spi@1c06000 {
compatible = "allwinner,sun4i-a10-spi";
reg = <0x01c06000 0x1000>;
interrupts = <11>;
@@ -199,7 +199,7 @@
#size-cells = <0>;
};
- tve0: tv-encoder@01c0a000 {
+ tve0: tv-encoder@1c0a000 {
compatible = "allwinner,sun4i-a10-tv-encoder";
reg = <0x01c0a000 0x1000>;
clocks = <&ccu CLK_AHB_TVE>;
@@ -217,7 +217,7 @@
};
};
- emac: ethernet@01c0b000 {
+ emac: ethernet@1c0b000 {
compatible = "allwinner,sun4i-a10-emac";
reg = <0x01c0b000 0x1000>;
interrupts = <55>;
@@ -226,7 +226,7 @@
status = "disabled";
};
- mdio: mdio@01c0b080 {
+ mdio: mdio@1c0b080 {
compatible = "allwinner,sun4i-a10-mdio";
reg = <0x01c0b080 0x14>;
status = "disabled";
@@ -234,7 +234,7 @@
#size-cells = <0>;
};
- tcon0: lcd-controller@01c0c000 {
+ tcon0: lcd-controller@1c0c000 {
compatible = "allwinner,sun5i-a13-tcon";
reg = <0x01c0c000 0x1000>;
interrupts = <44>;
@@ -278,7 +278,7 @@
};
};
- mmc0: mmc@01c0f000 {
+ mmc0: mmc@1c0f000 {
compatible = "allwinner,sun5i-a13-mmc";
reg = <0x01c0f000 0x1000>;
clocks = <&ccu CLK_AHB_MMC0>, <&ccu CLK_MMC0>;
@@ -289,7 +289,7 @@
#size-cells = <0>;
};
- mmc1: mmc@01c10000 {
+ mmc1: mmc@1c10000 {
compatible = "allwinner,sun5i-a13-mmc";
reg = <0x01c10000 0x1000>;
clocks = <&ccu CLK_AHB_MMC1>, <&ccu CLK_MMC1>;
@@ -300,7 +300,7 @@
#size-cells = <0>;
};
- mmc2: mmc@01c11000 {
+ mmc2: mmc@1c11000 {
compatible = "allwinner,sun5i-a13-mmc";
reg = <0x01c11000 0x1000>;
clocks = <&ccu CLK_AHB_MMC2>, <&ccu CLK_MMC2>;
@@ -311,7 +311,7 @@
#size-cells = <0>;
};
- usb_otg: usb@01c13000 {
+ usb_otg: usb@1c13000 {
compatible = "allwinner,sun4i-a10-musb";
reg = <0x01c13000 0x0400>;
clocks = <&ccu CLK_AHB_OTG>;
@@ -324,7 +324,7 @@
status = "disabled";
};
- usbphy: phy@01c13400 {
+ usbphy: phy@1c13400 {
#phy-cells = <1>;
compatible = "allwinner,sun5i-a13-usb-phy";
reg = <0x01c13400 0x10 0x01c14800 0x4>;
@@ -336,7 +336,7 @@
status = "disabled";
};
- ehci0: usb@01c14000 {
+ ehci0: usb@1c14000 {
compatible = "allwinner,sun5i-a13-ehci", "generic-ehci";
reg = <0x01c14000 0x100>;
interrupts = <39>;
@@ -346,7 +346,7 @@
status = "disabled";
};
- ohci0: usb@01c14400 {
+ ohci0: usb@1c14400 {
compatible = "allwinner,sun5i-a13-ohci", "generic-ohci";
reg = <0x01c14400 0x100>;
interrupts = <40>;
@@ -356,7 +356,7 @@
status = "disabled";
};
- crypto: crypto-engine@01c15000 {
+ crypto: crypto-engine@1c15000 {
compatible = "allwinner,sun5i-a13-crypto",
"allwinner,sun4i-a10-crypto";
reg = <0x01c15000 0x1000>;
@@ -365,7 +365,7 @@
clock-names = "ahb", "mod";
};
- spi2: spi@01c17000 {
+ spi2: spi@1c17000 {
compatible = "allwinner,sun4i-a10-spi";
reg = <0x01c17000 0x1000>;
interrupts = <12>;
@@ -379,7 +379,7 @@
#size-cells = <0>;
};
- ccu: clock@01c20000 {
+ ccu: clock@1c20000 {
reg = <0x01c20000 0x400>;
clocks = <&osc24M>, <&osc32k>;
clock-names = "hosc", "losc";
@@ -387,14 +387,14 @@
#reset-cells = <1>;
};
- intc: interrupt-controller@01c20400 {
+ intc: interrupt-controller@1c20400 {
compatible = "allwinner,sun4i-a10-ic";
reg = <0x01c20400 0x400>;
interrupt-controller;
#interrupt-cells = <1>;
};
- pio: pinctrl@01c20800 {
+ pio: pinctrl@1c20800 {
reg = <0x01c20800 0x400>;
interrupts = <28>;
clocks = <&ccu CLK_APB0_PIO>, <&osc24M>, <&osc32k>;
@@ -538,19 +538,19 @@
};
};
- timer@01c20c00 {
+ timer@1c20c00 {
compatible = "allwinner,sun4i-a10-timer";
reg = <0x01c20c00 0x90>;
interrupts = <22>;
clocks = <&ccu CLK_HOSC>;
};
- wdt: watchdog@01c20c90 {
+ wdt: watchdog@1c20c90 {
compatible = "allwinner,sun4i-a10-wdt";
reg = <0x01c20c90 0x10>;
};
- ir0: ir@01c21800 {
+ ir0: ir@1c21800 {
compatible = "allwinner,sun4i-a10-ir";
clocks = <&ccu CLK_APB0_IR>, <&ccu CLK_IR>;
clock-names = "apb", "ir";
@@ -559,14 +559,14 @@
status = "disabled";
};
- lradc: lradc@01c22800 {
+ lradc: lradc@1c22800 {
compatible = "allwinner,sun4i-a10-lradc-keys";
reg = <0x01c22800 0x100>;
interrupts = <31>;
status = "disabled";
};
- codec: codec@01c22c00 {
+ codec: codec@1c22c00 {
#sound-dai-cells = <0>;
compatible = "allwinner,sun4i-a10-codec";
reg = <0x01c22c00 0x40>;
@@ -579,19 +579,19 @@
status = "disabled";
};
- sid: eeprom@01c23800 {
+ sid: eeprom@1c23800 {
compatible = "allwinner,sun4i-a10-sid";
reg = <0x01c23800 0x10>;
};
- rtp: rtp@01c25000 {
+ rtp: rtp@1c25000 {
compatible = "allwinner,sun5i-a13-ts";
reg = <0x01c25000 0x100>;
interrupts = <29>;
#thermal-sensor-cells = <0>;
};
- uart0: serial@01c28000 {
+ uart0: serial@1c28000 {
compatible = "snps,dw-apb-uart";
reg = <0x01c28000 0x400>;
interrupts = <1>;
@@ -601,7 +601,7 @@
status = "disabled";
};
- uart1: serial@01c28400 {
+ uart1: serial@1c28400 {
compatible = "snps,dw-apb-uart";
reg = <0x01c28400 0x400>;
interrupts = <2>;
@@ -611,7 +611,7 @@
status = "disabled";
};
- uart2: serial@01c28800 {
+ uart2: serial@1c28800 {
compatible = "snps,dw-apb-uart";
reg = <0x01c28800 0x400>;
interrupts = <3>;
@@ -621,7 +621,7 @@
status = "disabled";
};
- uart3: serial@01c28c00 {
+ uart3: serial@1c28c00 {
compatible = "snps,dw-apb-uart";
reg = <0x01c28c00 0x400>;
interrupts = <4>;
@@ -631,7 +631,7 @@
status = "disabled";
};
- i2c0: i2c@01c2ac00 {
+ i2c0: i2c@1c2ac00 {
compatible = "allwinner,sun4i-a10-i2c";
reg = <0x01c2ac00 0x400>;
interrupts = <7>;
@@ -641,7 +641,7 @@
#size-cells = <0>;
};
- i2c1: i2c@01c2b000 {
+ i2c1: i2c@1c2b000 {
compatible = "allwinner,sun4i-a10-i2c";
reg = <0x01c2b000 0x400>;
interrupts = <8>;
@@ -651,7 +651,7 @@
#size-cells = <0>;
};
- i2c2: i2c@01c2b400 {
+ i2c2: i2c@1c2b400 {
compatible = "allwinner,sun4i-a10-i2c";
reg = <0x01c2b400 0x400>;
interrupts = <9>;
@@ -661,14 +661,14 @@
#size-cells = <0>;
};
- timer@01c60000 {
+ timer@1c60000 {
compatible = "allwinner,sun5i-a13-hstimer";
reg = <0x01c60000 0x1000>;
interrupts = <82>, <83>;
clocks = <&ccu CLK_AHB_HSTIMER>;
};
- fe0: display-frontend@01e00000 {
+ fe0: display-frontend@1e00000 {
compatible = "allwinner,sun5i-a13-display-frontend";
reg = <0x01e00000 0x20000>;
interrupts = <47>;
@@ -696,7 +696,7 @@
};
};
- be0: display-backend@01e60000 {
+ be0: display-backend@1e60000 {
compatible = "allwinner,sun5i-a13-display-backend";
reg = <0x01e60000 0x10000>;
interrupts = <47>;
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