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Diffstat (limited to 'arch/arm/boot/dts/omap3.dtsi')
-rw-r--r--arch/arm/boot/dts/omap3.dtsi94
1 files changed, 87 insertions, 7 deletions
diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi
index 8109471..f38ea87 100644
--- a/arch/arm/boot/dts/omap3.dtsi
+++ b/arch/arm/boot/dts/omap3.dtsi
@@ -17,7 +17,6 @@
serial0 = &uart1;
serial1 = &uart2;
serial2 = &uart3;
- serial3 = &uart4;
};
cpus {
@@ -69,6 +68,24 @@
reg = <0x48200000 0x1000>;
};
+ omap3_pmx_core: pinmux@48002030 {
+ compatible = "ti,omap3-padconf", "pinctrl-single";
+ reg = <0x48002030 0x05cc>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-single,register-width = <16>;
+ pinctrl-single,function-mask = <0x7fff>;
+ };
+
+ omap3_pmx_wkup: pinmux@0x48002a58 {
+ compatible = "ti,omap3-padconf", "pinctrl-single";
+ reg = <0x48002a58 0x5c>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-single,register-width = <16>;
+ pinctrl-single,function-mask = <0x7fff>;
+ };
+
gpio1: gpio@48310000 {
compatible = "ti,omap3-gpio";
ti,hwmods = "gpio1";
@@ -141,12 +158,6 @@
clock-frequency = <48000000>;
};
- uart4: serial@49042000 {
- compatible = "ti,omap3-uart";
- ti,hwmods = "uart4";
- clock-frequency = <48000000>;
- };
-
i2c1: i2c@48070000 {
compatible = "ti,omap3-i2c";
#address-cells = <1>;
@@ -220,5 +231,74 @@
compatible = "ti,omap3-wdt";
ti,hwmods = "wd_timer2";
};
+
+ mcbsp1: mcbsp@48074000 {
+ compatible = "ti,omap3-mcbsp";
+ reg = <0x48074000 0xff>;
+ reg-names = "mpu";
+ interrupts = <16>, /* OCP compliant interrupt */
+ <59>, /* TX interrupt */
+ <60>; /* RX interrupt */
+ interrupt-names = "common", "tx", "rx";
+ interrupt-parent = <&intc>;
+ ti,buffer-size = <128>;
+ ti,hwmods = "mcbsp1";
+ };
+
+ mcbsp2: mcbsp@49022000 {
+ compatible = "ti,omap3-mcbsp";
+ reg = <0x49022000 0xff>,
+ <0x49028000 0xff>;
+ reg-names = "mpu", "sidetone";
+ interrupts = <17>, /* OCP compliant interrupt */
+ <62>, /* TX interrupt */
+ <63>, /* RX interrupt */
+ <4>; /* Sidetone */
+ interrupt-names = "common", "tx", "rx", "sidetone";
+ interrupt-parent = <&intc>;
+ ti,buffer-size = <1280>;
+ ti,hwmods = "mcbsp2";
+ };
+
+ mcbsp3: mcbsp@49024000 {
+ compatible = "ti,omap3-mcbsp";
+ reg = <0x49024000 0xff>,
+ <0x4902a000 0xff>;
+ reg-names = "mpu", "sidetone";
+ interrupts = <22>, /* OCP compliant interrupt */
+ <89>, /* TX interrupt */
+ <90>, /* RX interrupt */
+ <5>; /* Sidetone */
+ interrupt-names = "common", "tx", "rx", "sidetone";
+ interrupt-parent = <&intc>;
+ ti,buffer-size = <128>;
+ ti,hwmods = "mcbsp3";
+ };
+
+ mcbsp4: mcbsp@49026000 {
+ compatible = "ti,omap3-mcbsp";
+ reg = <0x49026000 0xff>;
+ reg-names = "mpu";
+ interrupts = <23>, /* OCP compliant interrupt */
+ <54>, /* TX interrupt */
+ <55>; /* RX interrupt */
+ interrupt-names = "common", "tx", "rx";
+ interrupt-parent = <&intc>;
+ ti,buffer-size = <128>;
+ ti,hwmods = "mcbsp4";
+ };
+
+ mcbsp5: mcbsp@48096000 {
+ compatible = "ti,omap3-mcbsp";
+ reg = <0x48096000 0xff>;
+ reg-names = "mpu";
+ interrupts = <27>, /* OCP compliant interrupt */
+ <81>, /* TX interrupt */
+ <82>; /* RX interrupt */
+ interrupt-names = "common", "tx", "rx";
+ interrupt-parent = <&intc>;
+ ti,buffer-size = <128>;
+ ti,hwmods = "mcbsp5";
+ };
};
};
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