diff options
| -rw-r--r-- | arch/tile/Kconfig | 71 | ||||
| -rw-r--r-- | arch/tile/configs/tilegx_defconfig | 1 | ||||
| -rw-r--r-- | arch/tile/configs/tilepro_defconfig | 1 | ||||
| -rw-r--r-- | arch/tile/gxio/mpipe.c | 2 | ||||
| -rw-r--r-- | arch/tile/include/asm/atomic_64.h | 17 | ||||
| -rw-r--r-- | arch/tile/kernel/pci_gx.c | 4 | ||||
| -rw-r--r-- | arch/tile/kernel/unaligned.c | 4 |
7 files changed, 50 insertions, 50 deletions
diff --git a/arch/tile/Kconfig b/arch/tile/Kconfig index 76989b87..4820a02 100644 --- a/arch/tile/Kconfig +++ b/arch/tile/Kconfig @@ -3,49 +3,38 @@ config TILE def_bool y - select HAVE_EXIT_THREAD - select HAVE_PERF_EVENTS - select USE_PMC if PERF_EVENTS - select HAVE_DMA_API_DEBUG - select HAVE_KVM if !TILEGX - select GENERIC_FIND_FIRST_BIT - select SYSCTL_EXCEPTION_TRACE - select CC_OPTIMIZE_FOR_SIZE - select HAVE_DEBUG_KMEMLEAK - select GENERIC_IRQ_PROBE - select GENERIC_PENDING_IRQ if SMP - select GENERIC_IRQ_SHOW - select HAVE_DEBUG_BUGVERBOSE - select VIRT_TO_BUS - select SYS_HYPERVISOR + select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE select ARCH_HAS_DEBUG_STRICT_USER_COPY_CHECKS select ARCH_HAS_DEVMEM_IS_ALLOWED select ARCH_HAVE_NMI_SAFE_CMPXCHG - select GENERIC_CLOCKEVENTS - select MODULES_USE_ELF_RELA - select HAVE_ARCH_TRACEHOOK - select HAVE_SYSCALL_TRACEPOINTS - select USER_STACKTRACE_SUPPORT - select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE - select HAVE_DEBUG_STACKOVERFLOW select ARCH_WANT_FRAME_POINTERS - select HAVE_CONTEXT_TRACKING - select HAVE_NMI if USE_PMC + select CC_OPTIMIZE_FOR_SIZE select EDAC_SUPPORT + select GENERIC_CLOCKEVENTS + select GENERIC_FIND_FIRST_BIT + select GENERIC_IRQ_PROBE + select GENERIC_IRQ_SHOW + select GENERIC_PENDING_IRQ if SMP select GENERIC_STRNCPY_FROM_USER select GENERIC_STRNLEN_USER select HAVE_ARCH_SECCOMP_FILTER - -# FIXME: investigate whether we need/want these options. -# select HAVE_IOREMAP_PROT -# select HAVE_OPTPROBES -# select HAVE_REGS_AND_STACK_ACCESS_API -# select HAVE_HW_BREAKPOINT -# select PERF_EVENTS -# select HAVE_USER_RETURN_NOTIFIER -# config NO_BOOTMEM -# config ARCH_SUPPORTS_DEBUG_PAGEALLOC -# config HUGETLB_PAGE_SIZE_VARIABLE + select HAVE_ARCH_TRACEHOOK + select HAVE_CONTEXT_TRACKING + select HAVE_DEBUG_BUGVERBOSE + select HAVE_DEBUG_KMEMLEAK + select HAVE_DEBUG_STACKOVERFLOW + select HAVE_DMA_API_DEBUG + select HAVE_EXIT_THREAD + select HAVE_KVM if !TILEGX + select HAVE_NMI if USE_PMC + select HAVE_PERF_EVENTS + select HAVE_SYSCALL_TRACEPOINTS + select MODULES_USE_ELF_RELA + select SYSCTL_EXCEPTION_TRACE + select SYS_HYPERVISOR + select USER_STACKTRACE_SUPPORT + select USE_PMC if PERF_EVENTS + select VIRT_TO_BUS config MMU def_bool y @@ -132,17 +121,17 @@ config HVC_TILE # 64-bit TILE-Gx toolchain, so force CONFIG_TILEGX on. config TILEGX def_bool ARCH != "tilepro" - select SPARSE_IRQ + select ARCH_SUPPORTS_ATOMIC_RMW select GENERIC_IRQ_LEGACY_ALLOC_HWIRQ - select HAVE_FUNCTION_TRACER - select HAVE_FUNCTION_GRAPH_TRACER + select HAVE_ARCH_JUMP_LABEL + select HAVE_ARCH_KGDB select HAVE_DYNAMIC_FTRACE select HAVE_FTRACE_MCOUNT_RECORD + select HAVE_FUNCTION_GRAPH_TRACER + select HAVE_FUNCTION_TRACER select HAVE_KPROBES select HAVE_KRETPROBES - select HAVE_ARCH_KGDB - select ARCH_SUPPORTS_ATOMIC_RMW - select HAVE_ARCH_JUMP_LABEL + select SPARSE_IRQ config TILEPRO def_bool !TILEGX diff --git a/arch/tile/configs/tilegx_defconfig b/arch/tile/configs/tilegx_defconfig index 7189055..dea47c3 100644 --- a/arch/tile/configs/tilegx_defconfig +++ b/arch/tile/configs/tilegx_defconfig @@ -89,7 +89,6 @@ CONFIG_TCP_CONG_YEAH=m CONFIG_TCP_CONG_ILLINOIS=m CONFIG_TCP_MD5SIG=y CONFIG_IPV6=y -CONFIG_IPV6_PRIVACY=y CONFIG_IPV6_ROUTER_PREF=y CONFIG_IPV6_ROUTE_INFO=y CONFIG_IPV6_OPTIMISTIC_DAD=y diff --git a/arch/tile/configs/tilepro_defconfig b/arch/tile/configs/tilepro_defconfig index dc85468..95743ee 100644 --- a/arch/tile/configs/tilepro_defconfig +++ b/arch/tile/configs/tilepro_defconfig @@ -85,7 +85,6 @@ CONFIG_TCP_CONG_YEAH=m CONFIG_TCP_CONG_ILLINOIS=m CONFIG_TCP_MD5SIG=y CONFIG_IPV6=y -CONFIG_IPV6_PRIVACY=y CONFIG_IPV6_ROUTER_PREF=y CONFIG_IPV6_ROUTE_INFO=y CONFIG_IPV6_OPTIMISTIC_DAD=y diff --git a/arch/tile/gxio/mpipe.c b/arch/tile/gxio/mpipe.c index f102048..34de300 100644 --- a/arch/tile/gxio/mpipe.c +++ b/arch/tile/gxio/mpipe.c @@ -122,7 +122,7 @@ size_t gxio_mpipe_calc_buffer_stack_bytes(unsigned long buffers) { const int BUFFERS_PER_LINE = 12; - /* Count the number of cachlines. */ + /* Count the number of cachelines. */ unsigned long lines = (buffers + BUFFERS_PER_LINE - 1) / BUFFERS_PER_LINE; diff --git a/arch/tile/include/asm/atomic_64.h b/arch/tile/include/asm/atomic_64.h index 51cabc2..b0531a6 100644 --- a/arch/tile/include/asm/atomic_64.h +++ b/arch/tile/include/asm/atomic_64.h @@ -37,12 +37,25 @@ static inline void atomic_add(int i, atomic_t *v) __insn_fetchadd4((void *)&v->counter, i); } +/* + * Note a subtlety of the locking here. We are required to provide a + * full memory barrier before and after the operation. However, we + * only provide an explicit mb before the operation. After the + * operation, we use barrier() to get a full mb for free, because: + * + * (1) The barrier directive to the compiler prohibits any instructions + * being statically hoisted before the barrier; + * (2) the microarchitecture will not issue any further instructions + * until the fetchadd result is available for the "+ i" add instruction; + * (3) the smb_mb before the fetchadd ensures that no other memory + * operations are in flight at this point. + */ static inline int atomic_add_return(int i, atomic_t *v) { int val; smp_mb(); /* barrier for proper semantics */ val = __insn_fetchadd4((void *)&v->counter, i) + i; - barrier(); /* the "+ i" above will wait on memory */ + barrier(); /* equivalent to smp_mb(); see block comment above */ return val; } @@ -95,7 +108,7 @@ static inline long atomic64_add_return(long i, atomic64_t *v) int val; smp_mb(); /* barrier for proper semantics */ val = __insn_fetchadd((void *)&v->counter, i) + i; - barrier(); /* the "+ i" above will wait on memory */ + barrier(); /* equivalent to smp_mb; see atomic_add_return() */ return val; } diff --git a/arch/tile/kernel/pci_gx.c b/arch/tile/kernel/pci_gx.c index aa2b44c..0e7a5d0 100644 --- a/arch/tile/kernel/pci_gx.c +++ b/arch/tile/kernel/pci_gx.c @@ -40,7 +40,7 @@ #include <arch/sim.h> /* - * This file containes the routines to search for PCI buses, + * This file contains the routines to search for PCI buses, * enumerate the buses, and configure any attached devices. */ @@ -434,7 +434,7 @@ int __init tile_pci_init(void) /* * Now determine which PCIe ports are configured to operate in RC - * mode. There is a differece in the port configuration capability + * mode. There is a difference in the port configuration capability * between the Gx36 and Gx72 devices. * * The Gx36 has configuration capability for each of the 3 PCIe diff --git a/arch/tile/kernel/unaligned.c b/arch/tile/kernel/unaligned.c index 0db5f7c..9772a35 100644 --- a/arch/tile/kernel/unaligned.c +++ b/arch/tile/kernel/unaligned.c @@ -188,7 +188,7 @@ static void find_regs(tilegx_bundle_bits bundle, uint64_t *rd, uint64_t *ra, * Parse fault bundle, find potential used registers and mark * corresponding bits in reg_map and alias_map. These 2 bit maps * are used to find the scratch registers and determine if there - * is register alais. + * is register alias. */ if (bundle & TILEGX_BUNDLE_MODE_MASK) { /* Y Mode Bundle. */ @@ -1529,7 +1529,7 @@ void do_unaligned(struct pt_regs *regs, int vecnum) } - /* Read the bundle casued the exception! */ + /* Read the bundle caused the exception! */ pc = (tilegx_bundle_bits __user *)(regs->pc); if (get_user(bundle, pc) != 0) { /* Probably never be here since pc is valid user address.*/ |
