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-rw-r--r--drivers/mfd/ab8500-sysctrl.c63
-rw-r--r--include/linux/mfd/abx500/ab8500-sysctrl.h6
2 files changed, 69 insertions, 0 deletions
diff --git a/drivers/mfd/ab8500-sysctrl.c b/drivers/mfd/ab8500-sysctrl.c
index 6ac63a0..f43c42b 100644
--- a/drivers/mfd/ab8500-sysctrl.c
+++ b/drivers/mfd/ab8500-sysctrl.c
@@ -15,6 +15,12 @@
#include <linux/mfd/abx500/ab8500.h>
#include <linux/mfd/abx500/ab8500-sysctrl.h>
+/* RtcCtrl bits */
+#define AB8500_ALARM_MIN_LOW 0x08
+#define AB8500_ALARM_MIN_MID 0x09
+#define RTC_CTRL 0x0B
+#define RTC_ALARM_ENABLE 0x4
+
static struct device *sysctrl_dev;
void ab8500_power_off(void)
@@ -79,6 +85,63 @@ shutdown:
}
}
+/*
+ * Use the AB WD to reset the platform. It will perform a hard
+ * reset instead of a soft reset. Write the reset reason to
+ * the AB before reset, which can be read upon restart.
+ */
+void ab8500_restart(char mode, const char *cmd)
+{
+ struct ab8500_platform_data *plat;
+ struct ab8500_sysctrl_platform_data *pdata;
+ u16 reason = 0;
+ u8 val;
+
+ if (sysctrl_dev == NULL) {
+ pr_err("%s: sysctrl not initialized\n", __func__);
+ return;
+ }
+
+ plat = dev_get_platdata(sysctrl_dev->parent);
+ pdata = plat->sysctrl;
+ if (pdata->reboot_reason_code)
+ reason = pdata->reboot_reason_code(cmd);
+ else
+ pr_warn("[%s] No reboot reason set. Default reason %d\n",
+ __func__, reason);
+
+ /*
+ * Disable RTC alarm, just a precaution so that no alarm
+ * is running when WD reset is executed.
+ */
+ abx500_get_register_interruptible(sysctrl_dev, AB8500_RTC,
+ RTC_CTRL , &val);
+ abx500_set_register_interruptible(sysctrl_dev, AB8500_RTC,
+ RTC_CTRL , (val & ~RTC_ALARM_ENABLE));
+
+ /*
+ * Android is not using the RTC alarm registers during reboot
+ * so we borrow them for writing the reason of reset
+ */
+
+ /* reason[8 LSB] */
+ val = reason & 0xFF;
+ abx500_set_register_interruptible(sysctrl_dev, AB8500_RTC,
+ AB8500_ALARM_MIN_LOW , val);
+
+ /* reason[8 MSB] */
+ val = (reason>>8) & 0xFF;
+ abx500_set_register_interruptible(sysctrl_dev, AB8500_RTC,
+ AB8500_ALARM_MIN_MID , val);
+
+ /* Setting WD timeout to 0 */
+ ab8500_sysctrl_write(AB8500_MAINWDOGTIMER, 0xFF, 0x0);
+
+ /* Setting the parameters to AB8500 WD*/
+ ab8500_sysctrl_write(AB8500_MAINWDOGCTRL, 0xFF, (AB8500_ENABLE_WD |
+ AB8500_WD_RESTART_ON_EXPIRE | AB8500_KICK_WD));
+}
+
static inline bool valid_bank(u8 bank)
{
return ((bank == AB8500_SYS_CTRL1_BLOCK) ||
diff --git a/include/linux/mfd/abx500/ab8500-sysctrl.h b/include/linux/mfd/abx500/ab8500-sysctrl.h
index ebf12e7..990bc93 100644
--- a/include/linux/mfd/abx500/ab8500-sysctrl.h
+++ b/include/linux/mfd/abx500/ab8500-sysctrl.h
@@ -12,6 +12,7 @@
int ab8500_sysctrl_read(u16 reg, u8 *value);
int ab8500_sysctrl_write(u16 reg, u8 mask, u8 value);
+void ab8500_restart(char mode, const char *cmd);
#else
@@ -40,6 +41,7 @@ static inline int ab8500_sysctrl_clear(u16 reg, u8 bits)
/* Configuration data for SysClkReq1RfClkBuf - SysClkReq8RfClkBuf */
struct ab8500_sysctrl_platform_data {
u8 initial_req_buf_config[8];
+ u16 (*reboot_reason_code)(const char *cmd);
};
/* Registers */
@@ -299,4 +301,8 @@ struct ab8500_sysctrl_platform_data {
#define AB9540_SYSCLK12BUF4VALID_SYSCLK12BUF4VALID_MASK 0xFF
#define AB9540_SYSCLK12BUF4VALID_SYSCLK12BUF4VALID_SHIFT 0
+#define AB8500_ENABLE_WD 0x1
+#define AB8500_KICK_WD 0x2
+#define AB8500_WD_RESTART_ON_EXPIRE 0x10
+
#endif /* __AB8500_SYSCTRL_H */
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