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-rw-r--r--arch/arm/lib/io-acorn.S4
-rw-r--r--arch/arm/lib/io-readsb.S24
-rw-r--r--arch/arm/lib/io-readsw-armv3.S30
-rw-r--r--arch/arm/lib/io-readsw-armv4.S24
-rw-r--r--arch/arm/lib/io-writesb.S25
-rw-r--r--arch/arm/lib/io-writesw-armv3.S30
-rw-r--r--arch/arm/lib/io-writesw-armv4.S25
7 files changed, 82 insertions, 80 deletions
diff --git a/arch/arm/lib/io-acorn.S b/arch/arm/lib/io-acorn.S
index 3aacd01..b153523 100644
--- a/arch/arm/lib/io-acorn.S
+++ b/arch/arm/lib/io-acorn.S
@@ -17,7 +17,7 @@
.text
.align
-.iosl_warning:
+.Liosl_warning:
.ascii "<4>insl/outsl not implemented, called from %08lX\0"
.align
@@ -27,6 +27,6 @@
*/
ENTRY(insl)
ENTRY(outsl)
- adr r0, .iosl_warning
+ adr r0, .Liosl_warning
mov r1, lr
b printk
diff --git a/arch/arm/lib/io-readsb.S b/arch/arm/lib/io-readsb.S
index 081ef74..d3d8de7 100644
--- a/arch/arm/lib/io-readsb.S
+++ b/arch/arm/lib/io-readsb.S
@@ -10,7 +10,7 @@
#include <linux/linkage.h>
#include <asm/assembler.h>
-.insb_align: rsb ip, ip, #4
+.Linsb_align: rsb ip, ip, #4
cmp ip, r2
movgt ip, r2
cmp ip, #2
@@ -21,20 +21,20 @@
ldrgtb r3, [r0]
strgtb r3, [r1], #1
subs r2, r2, ip
- bne .insb_aligned
+ bne .Linsb_aligned
ENTRY(__raw_readsb)
teq r2, #0 @ do we have to check for the zero len?
moveq pc, lr
ands ip, r1, #3
- bne .insb_align
+ bne .Linsb_align
-.insb_aligned: stmfd sp!, {r4 - r6, lr}
+.Linsb_aligned: stmfd sp!, {r4 - r6, lr}
subs r2, r2, #16
- bmi .insb_no_16
+ bmi .Linsb_no_16
-.insb_16_lp: ldrb r3, [r0]
+.Linsb_16_lp: ldrb r3, [r0]
ldrb r4, [r0]
ldrb r5, [r0]
mov r3, r3, put_byte_0
@@ -69,13 +69,13 @@ ENTRY(__raw_readsb)
stmia r1!, {r3 - r6}
subs r2, r2, #16
- bpl .insb_16_lp
+ bpl .Linsb_16_lp
tst r2, #15
LOADREGS(eqfd, sp!, {r4 - r6, pc})
-.insb_no_16: tst r2, #8
- beq .insb_no_8
+.Linsb_no_16: tst r2, #8
+ beq .Linsb_no_8
ldrb r3, [r0]
ldrb r4, [r0]
@@ -95,8 +95,8 @@ ENTRY(__raw_readsb)
orr r4, r4, ip, put_byte_3
stmia r1!, {r3, r4}
-.insb_no_8: tst r2, #4
- beq .insb_no_4
+.Linsb_no_8: tst r2, #4
+ beq .Linsb_no_4
ldrb r3, [r0]
ldrb r4, [r0]
@@ -108,7 +108,7 @@ ENTRY(__raw_readsb)
orr r3, r3, r6, put_byte_3
str r3, [r1], #4
-.insb_no_4: ands r2, r2, #3
+.Linsb_no_4: ands r2, r2, #3
LOADREGS(eqfd, sp!, {r4 - r6, pc})
cmp r2, #2
diff --git a/arch/arm/lib/io-readsw-armv3.S b/arch/arm/lib/io-readsw-armv3.S
index 476cf7f..146d47c 100644
--- a/arch/arm/lib/io-readsw-armv3.S
+++ b/arch/arm/lib/io-readsw-armv3.S
@@ -11,16 +11,16 @@
#include <asm/assembler.h>
#include <asm/hardware.h>
-.insw_bad_alignment:
- adr r0, .insw_bad_align_msg
+.Linsw_bad_alignment:
+ adr r0, .Linsw_bad_align_msg
mov r2, lr
b panic
-.insw_bad_align_msg:
+.Linsw_bad_align_msg:
.asciz "insw: bad buffer alignment (0x%p, lr=0x%08lX)\n"
.align
-.insw_align: tst r1, #1
- bne .insw_bad_alignment
+.Linsw_align: tst r1, #1
+ bne .Linsw_bad_alignment
ldr r3, [r0]
strb r3, [r1], #1
@@ -34,16 +34,16 @@ ENTRY(__raw_readsw)
teq r2, #0 @ do we have to check for the zero len?
moveq pc, lr
tst r1, #3
- bne .insw_align
+ bne .Linsw_align
-.insw_aligned: mov ip, #0xff
+.Linsw_aligned: mov ip, #0xff
orr ip, ip, ip, lsl #8
stmfd sp!, {r4, r5, r6, lr}
subs r2, r2, #8
- bmi .no_insw_8
+ bmi .Lno_insw_8
-.insw_8_lp: ldr r3, [r0]
+.Linsw_8_lp: ldr r3, [r0]
and r3, r3, ip
ldr r4, [r0]
orr r3, r3, r4, lsl #16
@@ -66,13 +66,13 @@ ENTRY(__raw_readsw)
stmia r1!, {r3 - r6}
subs r2, r2, #8
- bpl .insw_8_lp
+ bpl .Linsw_8_lp
tst r2, #7
LOADREGS(eqfd, sp!, {r4, r5, r6, pc})
-.no_insw_8: tst r2, #4
- beq .no_insw_4
+.Lno_insw_8: tst r2, #4
+ beq .Lno_insw_4
ldr r3, [r0]
and r3, r3, ip
@@ -86,8 +86,8 @@ ENTRY(__raw_readsw)
stmia r1!, {r3, r4}
-.no_insw_4: tst r2, #2
- beq .no_insw_2
+.Lno_insw_4: tst r2, #2
+ beq .Lno_insw_2
ldr r3, [r0]
and r3, r3, ip
@@ -96,7 +96,7 @@ ENTRY(__raw_readsw)
str r3, [r1], #4
-.no_insw_2: tst r2, #1
+.Lno_insw_2: tst r2, #1
ldrne r3, [r0]
strneb r3, [r1], #1
movne r3, r3, lsr #8
diff --git a/arch/arm/lib/io-readsw-armv4.S b/arch/arm/lib/io-readsw-armv4.S
index c92b66e..4db1c5f 100644
--- a/arch/arm/lib/io-readsw-armv4.S
+++ b/arch/arm/lib/io-readsw-armv4.S
@@ -18,8 +18,8 @@
#endif
.endm
-.insw_align: movs ip, r1, lsl #31
- bne .insw_noalign
+.Linsw_align: movs ip, r1, lsl #31
+ bne .Linsw_noalign
ldrh ip, [r0]
sub r2, r2, #1
strh ip, [r1], #2
@@ -28,14 +28,14 @@ ENTRY(__raw_readsw)
teq r2, #0
moveq pc, lr
tst r1, #3
- bne .insw_align
+ bne .Linsw_align
stmfd sp!, {r4, r5, lr}
subs r2, r2, #8
- bmi .no_insw_8
+ bmi .Lno_insw_8
-.insw_8_lp: ldrh r3, [r0]
+.Linsw_8_lp: ldrh r3, [r0]
ldrh r4, [r0]
pack r3, r3, r4
@@ -53,10 +53,10 @@ ENTRY(__raw_readsw)
subs r2, r2, #8
stmia r1!, {r3 - r5, ip}
- bpl .insw_8_lp
+ bpl .Linsw_8_lp
-.no_insw_8: tst r2, #4
- beq .no_insw_4
+.Lno_insw_8: tst r2, #4
+ beq .Lno_insw_4
ldrh r3, [r0]
ldrh r4, [r0]
@@ -68,15 +68,15 @@ ENTRY(__raw_readsw)
stmia r1!, {r3, r4}
-.no_insw_4: movs r2, r2, lsl #31
- bcc .no_insw_2
+.Lno_insw_4: movs r2, r2, lsl #31
+ bcc .Lno_insw_2
ldrh r3, [r0]
ldrh ip, [r0]
pack r3, r3, ip
str r3, [r1], #4
-.no_insw_2: ldrneh r3, [r0]
+.Lno_insw_2: ldrneh r3, [r0]
strneh r3, [r1]
ldmfd sp!, {r4, r5, pc}
@@ -93,7 +93,7 @@ ENTRY(__raw_readsw)
#define pull_hbyte1 lsr #8
#endif
-.insw_noalign: stmfd sp!, {r4, lr}
+.Linsw_noalign: stmfd sp!, {r4, lr}
ldrccb ip, [r1, #-1]!
bcc 1f
diff --git a/arch/arm/lib/io-writesb.S b/arch/arm/lib/io-writesb.S
index 70b2561..08209fc 100644
--- a/arch/arm/lib/io-writesb.S
+++ b/arch/arm/lib/io-writesb.S
@@ -30,7 +30,7 @@
#endif
.endm
-.outsb_align: rsb ip, ip, #4
+.Loutsb_align: rsb ip, ip, #4
cmp ip, r2
movgt ip, r2
cmp ip, #2
@@ -41,44 +41,45 @@
ldrgtb r3, [r1], #1
strgtb r3, [r0]
subs r2, r2, ip
- bne .outsb_aligned
+ bne .Loutsb_aligned
ENTRY(__raw_writesb)
teq r2, #0 @ do we have to check for the zero len?
moveq pc, lr
ands ip, r1, #3
- bne .outsb_align
+ bne .Loutsb_align
-.outsb_aligned: stmfd sp!, {r4, r5, lr}
+.Loutsb_aligned:
+ stmfd sp!, {r4, r5, lr}
subs r2, r2, #16
- bmi .outsb_no_16
+ bmi .Loutsb_no_16
-.outsb_16_lp: ldmia r1!, {r3, r4, r5, ip}
+.Loutsb_16_lp: ldmia r1!, {r3, r4, r5, ip}
outword r3
outword r4
outword r5
outword ip
subs r2, r2, #16
- bpl .outsb_16_lp
+ bpl .Loutsb_16_lp
tst r2, #15
LOADREGS(eqfd, sp!, {r4, r5, pc})
-.outsb_no_16: tst r2, #8
- beq .outsb_no_8
+.Loutsb_no_16: tst r2, #8
+ beq .Loutsb_no_8
ldmia r1!, {r3, r4}
outword r3
outword r4
-.outsb_no_8: tst r2, #4
- beq .outsb_no_4
+.Loutsb_no_8: tst r2, #4
+ beq .Loutsb_no_4
ldr r3, [r1], #4
outword r3
-.outsb_no_4: ands r2, r2, #3
+.Loutsb_no_4: ands r2, r2, #3
LOADREGS(eqfd, sp!, {r4, r5, pc})
cmp r2, #2
diff --git a/arch/arm/lib/io-writesw-armv3.S b/arch/arm/lib/io-writesw-armv3.S
index 950e7e3..52d62b4 100644
--- a/arch/arm/lib/io-writesw-armv3.S
+++ b/arch/arm/lib/io-writesw-armv3.S
@@ -11,16 +11,16 @@
#include <asm/assembler.h>
#include <asm/hardware.h>
-.outsw_bad_alignment:
- adr r0, .outsw_bad_align_msg
+.Loutsw_bad_alignment:
+ adr r0, .Loutsw_bad_align_msg
mov r2, lr
b panic
-.outsw_bad_align_msg:
+.Loutsw_bad_align_msg:
.asciz "outsw: bad buffer alignment (0x%p, lr=0x%08lX)\n"
.align
-.outsw_align: tst r1, #1
- bne .outsw_bad_alignment
+.Loutsw_align: tst r1, #1
+ bne .Loutsw_bad_alignment
add r1, r1, #2
@@ -35,14 +35,14 @@ ENTRY(__raw_writesw)
teq r2, #0 @ do we have to check for the zero len?
moveq pc, lr
tst r1, #3
- bne .outsw_align
+ bne .Loutsw_align
-.outsw_aligned: stmfd sp!, {r4, r5, r6, lr}
+ stmfd sp!, {r4, r5, r6, lr}
subs r2, r2, #8
- bmi .no_outsw_8
+ bmi .Lno_outsw_8
-.outsw_8_lp: ldmia r1!, {r3, r4, r5, r6}
+.Loutsw_8_lp: ldmia r1!, {r3, r4, r5, r6}
mov ip, r3, lsl #16
orr ip, ip, ip, lsr #16
@@ -77,13 +77,13 @@ ENTRY(__raw_writesw)
str ip, [r0]
subs r2, r2, #8
- bpl .outsw_8_lp
+ bpl .Loutsw_8_lp
tst r2, #7
LOADREGS(eqfd, sp!, {r4, r5, r6, pc})
-.no_outsw_8: tst r2, #4
- beq .no_outsw_4
+.Lno_outsw_8: tst r2, #4
+ beq .Lno_outsw_4
ldmia r1!, {r3, r4}
@@ -103,8 +103,8 @@ ENTRY(__raw_writesw)
orr ip, ip, ip, lsl #16
str ip, [r0]
-.no_outsw_4: tst r2, #2
- beq .no_outsw_2
+.Lno_outsw_4: tst r2, #2
+ beq .Lno_outsw_2
ldr r3, [r1], #4
@@ -116,7 +116,7 @@ ENTRY(__raw_writesw)
orr ip, ip, ip, lsl #16
str ip, [r0]
-.no_outsw_2: tst r2, #1
+.Lno_outsw_2: tst r2, #1
ldrne r3, [r1]
diff --git a/arch/arm/lib/io-writesw-armv4.S b/arch/arm/lib/io-writesw-armv4.S
index 5e240e4..c8e85bd 100644
--- a/arch/arm/lib/io-writesw-armv4.S
+++ b/arch/arm/lib/io-writesw-armv4.S
@@ -22,8 +22,8 @@
#endif
.endm
-.outsw_align: movs ip, r1, lsl #31
- bne .outsw_noalign
+.Loutsw_align: movs ip, r1, lsl #31
+ bne .Loutsw_noalign
ldrh r3, [r1], #2
sub r2, r2, #1
@@ -33,35 +33,35 @@ ENTRY(__raw_writesw)
teq r2, #0
moveq pc, lr
ands r3, r1, #3
- bne .outsw_align
+ bne .Loutsw_align
stmfd sp!, {r4, r5, lr}
subs r2, r2, #8
- bmi .no_outsw_8
+ bmi .Lno_outsw_8
-.outsw_8_lp: ldmia r1!, {r3, r4, r5, ip}
+.Loutsw_8_lp: ldmia r1!, {r3, r4, r5, ip}
subs r2, r2, #8
outword r3
outword r4
outword r5
outword ip
- bpl .outsw_8_lp
+ bpl .Loutsw_8_lp
-.no_outsw_8: tst r2, #4
- beq .no_outsw_4
+.Lno_outsw_8: tst r2, #4
+ beq .Lno_outsw_4
ldmia r1!, {r3, ip}
outword r3
outword ip
-.no_outsw_4: movs r2, r2, lsl #31
- bcc .no_outsw_2
+.Lno_outsw_4: movs r2, r2, lsl #31
+ bcc .Lno_outsw_2
ldr r3, [r1], #4
outword r3
-.no_outsw_2: ldrneh r3, [r1]
+.Lno_outsw_2: ldrneh r3, [r1]
strneh r3, [r0]
ldmfd sp!, {r4, r5, pc}
@@ -74,7 +74,8 @@ ENTRY(__raw_writesw)
#define push_hbyte1 lsl #8
#endif
-.outsw_noalign: ldr r3, [r1, -r3]!
+.Loutsw_noalign:
+ ldr r3, [r1, -r3]!
subcs r2, r2, #1
bcs 2f
subs r2, r2, #2
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