diff options
640 files changed, 14667 insertions, 8066 deletions
diff --git a/Documentation/filesystems/Locking b/Documentation/filesystems/Locking index ef9349a..4471a41 100644 --- a/Documentation/filesystems/Locking +++ b/Documentation/filesystems/Locking @@ -19,6 +19,8 @@ prototypes: void (*d_release)(struct dentry *); void (*d_iput)(struct dentry *, struct inode *); char *(*d_dname)((struct dentry *dentry, char *buffer, int buflen); + struct vfsmount *(*d_automount)(struct path *path); + int (*d_manage)(struct dentry *, bool); locking rules: rename_lock ->d_lock may block rcu-walk @@ -29,6 +31,8 @@ d_delete: no yes no no d_release: no no yes no d_iput: no no yes no d_dname: no no no no +d_automount: no no yes no +d_manage: no no yes (ref-walk) maybe --------------------------- inode_operations --------------------------- prototypes: @@ -56,7 +60,6 @@ ata *); ssize_t (*listxattr) (struct dentry *, char *, size_t); int (*removexattr) (struct dentry *, const char *); void (*truncate_range)(struct inode *, loff_t, loff_t); - long (*fallocate)(struct inode *inode, int mode, loff_t offset, loff_t len); int (*fiemap)(struct inode *, struct fiemap_extent_info *, u64 start, u64 len); locking rules: @@ -84,7 +87,6 @@ getxattr: no listxattr: no removexattr: yes truncate_range: yes -fallocate: no fiemap: no Additionally, ->rmdir(), ->unlink() and ->rename() have ->i_mutex on victim. @@ -433,6 +435,7 @@ prototypes: ssize_t (*splice_read)(struct file *, loff_t *, struct pipe_inode_info *, size_t, unsigned int); int (*setlease)(struct file *, long, struct file_lock **); + long (*fallocate)(struct file *, int, loff_t, loff_t); }; locking rules: diff --git a/Documentation/filesystems/vfs.txt b/Documentation/filesystems/vfs.txt index cae6d27..94cf97b 100644 --- a/Documentation/filesystems/vfs.txt +++ b/Documentation/filesystems/vfs.txt @@ -864,6 +864,8 @@ struct dentry_operations { void (*d_release)(struct dentry *); void (*d_iput)(struct dentry *, struct inode *); char *(*d_dname)(struct dentry *, char *, int); + struct vfsmount *(*d_automount)(struct path *); + int (*d_manage)(struct dentry *, bool, bool); }; d_revalidate: called when the VFS needs to revalidate a dentry. This @@ -930,6 +932,47 @@ struct dentry_operations { at the end of the buffer, and returns a pointer to the first char. dynamic_dname() helper function is provided to take care of this. + d_automount: called when an automount dentry is to be traversed (optional). + This should create a new VFS mount record and return the record to the + caller. The caller is supplied with a path parameter giving the + automount directory to describe the automount target and the parent + VFS mount record to provide inheritable mount parameters. NULL should + be returned if someone else managed to make the automount first. If + the vfsmount creation failed, then an error code should be returned. + If -EISDIR is returned, then the directory will be treated as an + ordinary directory and returned to pathwalk to continue walking. + + If a vfsmount is returned, the caller will attempt to mount it on the + mountpoint and will remove the vfsmount from its expiration list in + the case of failure. The vfsmount should be returned with 2 refs on + it to prevent automatic expiration - the caller will clean up the + additional ref. + + This function is only used if DCACHE_NEED_AUTOMOUNT is set on the + dentry. This is set by __d_instantiate() if S_AUTOMOUNT is set on the + inode being added. + + d_manage: called to allow the filesystem to manage the transition from a + dentry (optional). This allows autofs, for example, to hold up clients + waiting to explore behind a 'mountpoint' whilst letting the daemon go + past and construct the subtree there. 0 should be returned to let the + calling process continue. -EISDIR can be returned to tell pathwalk to + use this directory as an ordinary directory and to ignore anything + mounted on it and not to check the automount flag. Any other error + code will abort pathwalk completely. + + If the 'mounting_here' parameter is true, then namespace_sem is being + held by the caller and the function should not initiate any mounts or + unmounts that it will then wait for. + + If the 'rcu_walk' parameter is true, then the caller is doing a + pathwalk in RCU-walk mode. Sleeping is not permitted in this mode, + and the caller can be asked to leave it and call again by returing + -ECHILD. + + This function is only used if DCACHE_MANAGE_TRANSIT is set on the + dentry being transited from. + Example : static char *pipefs_dname(struct dentry *dent, char *buffer, int buflen) diff --git a/MAINTAINERS b/MAINTAINERS index 89e4d4b..1af022e 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -3684,7 +3684,7 @@ F: kernel/debug/ KMEMCHECK M: Vegard Nossum <vegardno@ifi.uio.no> -M: Pekka Enberg <penberg@cs.helsinki.fi> +M: Pekka Enberg <penberg@kernel.org> S: Maintained F: Documentation/kmemcheck.txt F: arch/x86/include/asm/kmemcheck.h @@ -5646,7 +5646,7 @@ F: drivers/net/sky2.* SLAB ALLOCATOR M: Christoph Lameter <cl@linux-foundation.org> -M: Pekka Enberg <penberg@cs.helsinki.fi> +M: Pekka Enberg <penberg@kernel.org> M: Matt Mackall <mpm@selenic.com> L: linux-mm@kvack.org S: Maintained diff --git a/arch/alpha/Kconfig b/arch/alpha/Kconfig index 943fe69..fc95ee1 100644 --- a/arch/alpha/Kconfig +++ b/arch/alpha/Kconfig @@ -68,6 +68,9 @@ config GENERIC_IOMAP bool default n +config GENERIC_HARDIRQS_NO__DO_IRQ + def_bool y + config GENERIC_HARDIRQS bool default y diff --git a/arch/alpha/include/asm/io.h b/arch/alpha/include/asm/io.h index eda9b90..56ff965 100644 --- a/arch/alpha/include/asm/io.h +++ b/arch/alpha/include/asm/io.h @@ -37,8 +37,9 @@ */ extern inline void __set_hae(unsigned long new_hae) { - unsigned long flags; - local_irq_save(flags); + unsigned long flags = swpipl(IPL_MAX); + + barrier(); alpha_mv.hae_cache = new_hae; *alpha_mv.hae_register = new_hae; @@ -46,7 +47,8 @@ extern inline void __set_hae(unsigned long new_hae) /* Re-read to make sure it was written. */ new_hae = *alpha_mv.hae_register; - local_irq_restore(flags); + setipl(flags); + barrier(); } extern inline void set_hae(unsigned long new_hae) diff --git a/arch/alpha/kernel/Makefile b/arch/alpha/kernel/Makefile index 1ee9b5b..9bb7b858 100644 --- a/arch/alpha/kernel/Makefile +++ b/arch/alpha/kernel/Makefile @@ -3,8 +3,8 @@ # extra-y := head.o vmlinux.lds -EXTRA_AFLAGS := $(KBUILD_CFLAGS) -EXTRA_CFLAGS := -Werror -Wno-sign-compare +asflags-y := $(KBUILD_CFLAGS) +ccflags-y := -Werror -Wno-sign-compare obj-y := entry.o traps.o process.o init_task.o osf_sys.o irq.o \ irq_alpha.o signal.o setup.o ptrace.o time.o \ diff --git a/arch/alpha/kernel/irq.c b/arch/alpha/kernel/irq.c index fe91298..9ab234f 100644 --- a/arch/alpha/kernel/irq.c +++ b/arch/alpha/kernel/irq.c @@ -44,10 +44,11 @@ static char irq_user_affinity[NR_IRQS]; int irq_select_affinity(unsigned int irq) { + struct irq_desc *desc = irq_to_desc[irq]; static int last_cpu; int cpu = last_cpu + 1; - if (!irq_desc[irq].chip->set_affinity || irq_user_affinity[irq]) + if (!desc || !get_irq_desc_chip(desc)->set_affinity || irq_user_affinity[irq]) return 1; while (!cpu_possible(cpu) || @@ -55,8 +56,8 @@ int irq_select_affinity(unsigned int irq) cpu = (cpu < (NR_CPUS-1) ? cpu + 1 : 0); last_cpu = cpu; - cpumask_copy(irq_desc[irq].affinity, cpumask_of(cpu)); - irq_desc[irq].chip->set_affinity(irq, cpumask_of(cpu)); + cpumask_copy(desc->affinity, cpumask_of(cpu)); + get_irq_desc_chip(desc)->set_affinity(irq, cpumask_of(cpu)); return 0; } #endif /* CONFIG_SMP */ @@ -67,6 +68,7 @@ show_interrupts(struct seq_file *p, void *v) int j; int irq = *(loff_t *) v; struct irqaction * action; + struct irq_desc *desc; unsigned long flags; #ifdef CONFIG_SMP @@ -79,8 +81,13 @@ show_interrupts(struct seq_file *p, void *v) #endif if (irq < ACTUAL_NR_IRQS) { - raw_spin_lock_irqsave(&irq_desc[irq].lock, flags); - action = irq_desc[irq].action; + desc = irq_to_desc(irq); + + if (!desc) + return 0; + + raw_spin_lock_irqsave(&desc->lock, flags); + action = desc->action; if (!action) goto unlock; seq_printf(p, "%3d: ", irq); @@ -90,7 +97,7 @@ show_interrupts(struct seq_file *p, void *v) for_each_online_cpu(j) seq_printf(p, "%10u ", kstat_irqs_cpu(irq, j)); #endif - seq_printf(p, " %14s", irq_desc[irq].chip->name); + seq_printf(p, " %14s", get_irq_desc_chip(desc)->name); seq_printf(p, " %c%s", (action->flags & IRQF_DISABLED)?'+':' ', action->name); @@ -103,7 +110,7 @@ show_interrupts(struct seq_file *p, void *v) seq_putc(p, '\n'); unlock: - raw_spin_unlock_irqrestore(&irq_desc[irq].lock, flags); + raw_spin_unlock_irqrestore(&desc->lock, flags); } else if (irq == ACTUAL_NR_IRQS) { #ifdef CONFIG_SMP seq_puts(p, "IPI: "); @@ -142,8 +149,10 @@ handle_irq(int irq) * handled by some other CPU. (or is disabled) */ static unsigned int illegal_count=0; + struct irq_desc *desc = irq_to_desc(irq); - if ((unsigned) irq > ACTUAL_NR_IRQS && illegal_count < MAX_ILLEGAL_IRQS ) { + if (!desc || ((unsigned) irq > ACTUAL_NR_IRQS && + illegal_count < MAX_ILLEGAL_IRQS)) { irq_err_count++; illegal_count++; printk(KERN_CRIT "device_interrupt: invalid interrupt %d\n", @@ -151,14 +160,14 @@ handle_irq(int irq) return; } - irq_enter(); /* - * __do_IRQ() must be called with IPL_MAX. Note that we do not + * From here we must proceed with IPL_MAX. Note that we do not * explicitly enable interrupts afterwards - some MILO PALcode * (namely LX164 one) seems to have severe problems with RTI * at IPL 0. */ local_irq_disable(); - __do_IRQ(irq); + irq_enter(); + generic_handle_irq_desc(irq, desc); irq_exit(); } diff --git a/arch/alpha/kernel/irq_alpha.c b/arch/alpha/kernel/irq_alpha.c index 4c8bb37..2d0679b 100644 --- a/arch/alpha/kernel/irq_alpha.c +++ b/arch/alpha/kernel/irq_alpha.c @@ -219,31 +219,23 @@ process_mcheck_info(unsigned long vector, unsigned long la_ptr, * processed by PALcode, and comes in via entInt vector 1. */ -static void rtc_enable_disable(unsigned int irq) { } -static unsigned int rtc_startup(unsigned int irq) { return 0; } - struct irqaction timer_irqaction = { .handler = timer_interrupt, .flags = IRQF_DISABLED, .name = "timer", }; -static struct irq_chip rtc_irq_type = { - .name = "RTC", - .startup = rtc_startup, - .shutdown = rtc_enable_disable, - .enable = rtc_enable_disable, - .disable = rtc_enable_disable, - .ack = rtc_enable_disable, - .end = rtc_enable_disable, -}; - void __init init_rtc_irq(void) { - irq_desc[RTC_IRQ].status = IRQ_DISABLED; - irq_desc[RTC_IRQ].chip = &rtc_irq_type; - setup_irq(RTC_IRQ, &timer_irqaction); + struct irq_desc *desc = irq_to_desc(RTC_IRQ); + + if (desc) { + desc->status |= IRQ_DISABLED; + set_irq_chip_and_handler_name(RTC_IRQ, &no_irq_chip, + handle_simple_irq, "RTC"); + setup_irq(RTC_IRQ, &timer_irqaction); + } } /* Dummy irqactions. */ diff --git a/arch/alpha/kernel/irq_i8259.c b/arch/alpha/kernel/irq_i8259.c index 83a9ac2..956ea0e 100644 --- a/arch/alpha/kernel/irq_i8259.c +++ b/arch/alpha/kernel/irq_i8259.c @@ -69,28 +69,11 @@ i8259a_mask_and_ack_irq(unsigned int irq) spin_unlock(&i8259_irq_lock); } -unsigned int -i8259a_startup_irq(unsigned int irq) -{ - i8259a_enable_irq(irq); - return 0; /* never anything pending */ -} - -void -i8259a_end_irq(unsigned int irq) -{ - if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) - i8259a_enable_irq(irq); -} - struct irq_chip i8259a_irq_type = { .name = "XT-PIC", - .startup = i8259a_startup_irq, - .shutdown = i8259a_disable_irq, - .enable = i8259a_enable_irq, - .disable = i8259a_disable_irq, - .ack = i8259a_mask_and_ack_irq, - .end = i8259a_end_irq, + .unmask = i8259a_enable_irq, + .mask = i8259a_disable_irq, + .mask_ack = i8259a_mask_and_ack_irq, }; void __init @@ -107,8 +90,7 @@ init_i8259a_irqs(void) outb(0xff, 0xA1); /* mask all of 8259A-2 */ for (i = 0; i < 16; i++) { - irq_desc[i].status = IRQ_DISABLED; - irq_desc[i].chip = &i8259a_irq_type; + set_irq_chip_and_handler(i, &i8259a_irq_type, handle_level_irq); } setup_irq(2, &cascade); diff --git a/arch/alpha/kernel/irq_pyxis.c b/arch/alpha/kernel/irq_pyxis.c index 989ce46..2863458 100644 --- a/arch/alpha/kernel/irq_pyxis.c +++ b/arch/alpha/kernel/irq_pyxis.c @@ -40,20 +40,6 @@ pyxis_disable_irq(unsigned int irq) pyxis_update_irq_hw(cached_irq_mask &= ~(1UL << (irq - 16))); } -static unsigned int -pyxis_startup_irq(unsigned int irq) -{ - pyxis_enable_irq(irq); - return 0; -} - -static void -pyxis_end_irq(unsigned int irq) -{ - if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) - pyxis_enable_irq(irq); -} - static void pyxis_mask_and_ack_irq(unsigned int irq) { @@ -72,12 +58,9 @@ pyxis_mask_and_ack_irq(unsigned int irq) static struct irq_chip pyxis_irq_type = { .name = "PYXIS", - .startup = pyxis_startup_irq, - .shutdown = pyxis_disable_irq, - .enable = pyxis_enable_irq, - .disable = pyxis_disable_irq, - .ack = pyxis_mask_and_ack_irq, - .end = pyxis_end_irq, + .mask_ack = pyxis_mask_and_ack_irq, + .mask = pyxis_disable_irq, + .unmask = pyxis_enable_irq, }; void @@ -119,8 +102,8 @@ init_pyxis_irqs(unsigned long ignore_mask) for (i = 16; i < 48; ++i) { if ((ignore_mask >> i) & 1) continue; - irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL; - irq_desc[i].chip = &pyxis_irq_type; + set_irq_chip_and_handler(i, &pyxis_irq_type, handle_level_irq); + irq_to_desc(i)->status |= IRQ_LEVEL; } setup_irq(16+7, &isa_cascade_irqaction); diff --git a/arch/alpha/kernel/irq_srm.c b/arch/alpha/kernel/irq_srm.c index d63e93e..0e57e82 100644 --- a/arch/alpha/kernel/irq_srm.c +++ b/arch/alpha/kernel/irq_srm.c @@ -33,29 +33,12 @@ srm_disable_irq(unsigned int irq) spin_unlock(&srm_irq_lock); } -static unsigned int -srm_startup_irq(unsigned int irq) -{ - srm_enable_irq(irq); - return 0; -} - -static void -srm_end_irq(unsigned int irq) -{ - if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) - srm_enable_irq(irq); -} - /* Handle interrupts from the SRM, assuming no additional weirdness. */ static struct irq_chip srm_irq_type = { .name = "SRM", - .startup = srm_startup_irq, - .shutdown = srm_disable_irq, - .enable = srm_enable_irq, - .disable = srm_disable_irq, - .ack = srm_disable_irq, - .end = srm_end_irq, + .unmask = srm_enable_irq, + .mask = srm_disable_irq, + .mask_ack = srm_disable_irq, }; void __init @@ -68,8 +51,8 @@ init_srm_irqs(long max, unsigned long ignore_mask) for (i = 16; i < max; ++i) { if (i < 64 && ((ignore_mask >> i) & 1)) continue; - irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL; - irq_desc[i].chip = &srm_irq_type; + set_irq_chip_and_handler(i, &srm_irq_type, handle_level_irq); + irq_to_desc(i)->status |= IRQ_LEVEL; } } diff --git a/arch/alpha/kernel/osf_sys.c b/arch/alpha/kernel/osf_sys.c index 547e8b8..fe698b5 100644 --- a/arch/alpha/kernel/osf_sys.c +++ b/arch/alpha/kernel/osf_sys.c @@ -951,9 +951,6 @@ SYSCALL_DEFINE2(osf_utimes, const char __user *, filename, return do_utimes(AT_FDCWD, filename, tvs ? tv : NULL, 0); } -#define MAX_SELECT_SECONDS \ - ((unsigned long) (MAX_SCHEDULE_TIMEOUT / HZ)-1) - SYSCALL_DEFINE5(osf_select, int, n, fd_set __user *, inp, fd_set __user *, outp, fd_set __user *, exp, struct timeval32 __user *, tvp) { diff --git a/arch/alpha/kernel/sys_alcor.c b/arch/alpha/kernel/sys_alcor.c index 20a30b8..7bef617 100644 --- a/arch/alpha/kernel/sys_alcor.c +++ b/arch/alpha/kernel/sys_alcor.c @@ -65,13 +65,6 @@ alcor_mask_and_ack_irq(unsigned int irq) *(vuip)GRU_INT_CLEAR = 0; mb(); } -static unsigned int -alcor_startup_irq(unsigned int irq) -{ - alcor_enable_irq(irq); - return 0; -} - static void alcor_isa_mask_and_ack_irq(unsigned int irq) { @@ -82,21 +75,11 @@ alcor_isa_mask_and_ack_irq(unsigned int irq) *(vuip)GRU_INT_CLEAR = 0; mb(); } -static void -alcor_end_irq(unsigned int irq) -{ - if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) - alcor_enable_irq(irq); -} - static struct irq_chip alcor_irq_type = { .name = "ALCOR", - .startup = alcor_startup_irq, - .shutdown = alcor_disable_irq, - .enable = alcor_enable_irq, - .disable = alcor_disable_irq, - .ack = alcor_mask_and_ack_irq, - .end = alcor_end_irq, + .unmask = alcor_enable_irq, + .mask = alcor_disable_irq, + .mask_ack = alcor_mask_and_ack_irq, }; static void @@ -142,8 +125,8 @@ alcor_init_irq(void) on while IRQ probing. */ if (i >= 16+20 && i <= 16+30) continue; - irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL; - irq_desc[i].chip = &alcor_irq_type; + set_irq_chip_and_handler(i, &alcor_irq_type, handle_level_irq); + irq_to_desc(i)->status |= IRQ_LEVEL; } i8259a_irq_type.ack = alcor_isa_mask_and_ack_irq; diff --git a/arch/alpha/kernel/sys_cabriolet.c b/arch/alpha/kernel/sys_cabriolet.c index 14c8898..b0c9164 100644 --- a/arch/alpha/kernel/sys_cabriolet.c +++ b/arch/alpha/kernel/sys_cabriolet.c @@ -57,28 +57,11 @@ cabriolet_disable_irq(unsigned int irq) cabriolet_update_irq_hw(irq, cached_irq_mask |= 1UL << irq); } -static unsigned int -cabriolet_startup_irq(unsigned int irq) -{ - cabriolet_enable_irq(irq); - return 0; /* never anything pending */ -} - -static void -cabriolet_end_irq(unsigned int irq) -{ - if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) - cabriolet_enable_irq(irq); -} - static struct irq_chip cabriolet_irq_type = { .name = "CABRIOLET", - .startup = cabriolet_startup_irq, - .shutdown = cabriolet_disable_irq, - .enable = cabriolet_enable_irq, - .disable = cabriolet_disable_irq, - .ack = cabriolet_disable_irq, - .end = cabriolet_end_irq, + .unmask = cabriolet_enable_irq, + .mask = cabriolet_disable_irq, + .mask_ack = cabriolet_disable_irq, }; static void @@ -122,8 +105,9 @@ common_init_irq(void (*srm_dev_int)(unsigned long v)) outb(0xff, 0x806); for (i = 16; i < 35; ++i) { - irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL; - irq_desc[i].chip = &cabriolet_irq_type; + set_irq_chip_and_handler(i, &cabriolet_irq_type, + handle_level_irq); + irq_to_desc(i)->status |= IRQ_LEVEL; } } diff --git a/arch/alpha/kernel/sys_dp264.c b/arch/alpha/kernel/sys_dp264.c index 4026502..edad5f7 100644 --- a/arch/alpha/kernel/sys_dp264.c +++ b/arch/alpha/kernel/sys_dp264.c @@ -115,20 +115,6 @@ dp264_disable_irq(unsigned int irq) spin_unlock(&dp264_irq_lock); } -static unsigned int -dp264_startup_irq(unsigned int irq) -{ - dp264_enable_irq(irq); - return 0; /* never anything pending */ -} - -static void -dp264_end_irq(unsigned int irq) -{ - if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) - dp264_enable_irq(irq); -} - static void clipper_enable_irq(unsigned int irq) { @@ -147,20 +133,6 @@ clipper_disable_irq(unsigned int irq) spin_unlock(&dp264_irq_lock); } -static unsigned int -clipper_startup_irq(unsigned int irq) -{ - clipper_enable_irq(irq); - return 0; /* never anything pending */ -} - -static void -clipper_end_irq(unsigned int irq) -{ - if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) - clipper_enable_irq(irq); -} - static void cpu_set_irq_affinity(unsigned int irq, cpumask_t affinity) { @@ -200,23 +172,17 @@ clipper_set_affinity(unsigned int irq, const struct cpumask *affinity) static struct irq_chip dp264_irq_type = { .name = "DP264", - .startup = dp264_startup_irq, - .shutdown = dp264_disable_irq, - .enable = dp264_enable_irq, - .disable = dp264_disable_irq, - .ack = dp264_disable_irq, - .end = dp264_end_irq, + .unmask = dp264_enable_irq, + .mask = dp264_disable_irq, + .mask_ack = dp264_disable_irq, .set_affinity = dp264_set_affinity, }; static struct irq_chip clipper_irq_type = { .name = "CLIPPER", - .startup = clipper_startup_irq, - .shutdown = clipper_disable_irq, - .enable = clipper_enable_irq, - .disable = clipper_disable_irq, - .ack = clipper_disable_irq, - .end = clipper_end_irq, + .unmask = clipper_enable_irq, + .mask = clipper_disable_irq, + .mask_ack = clipper_disable_irq, .set_affinity = clipper_set_affinity, }; @@ -302,8 +268,8 @@ init_tsunami_irqs(struct irq_chip * ops, int imin, int imax) { long i; for (i = imin; i <= imax; ++i) { - irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL; - irq_desc[i].chip = ops; + irq_to_desc(i)->status |= IRQ_LEVEL; + set_irq_chip_and_handler(i, ops, handle_level_irq); } } diff --git a/arch/alpha/kernel/sys_eb64p.c b/arch/alpha/kernel/sys_eb64p.c index df2090c..ae5f29d 100644 --- a/arch/alpha/kernel/sys_eb64p.c +++ b/arch/alpha/kernel/sys_eb64p.c @@ -55,28 +55,11 @@ eb64p_disable_irq(unsigned int irq) eb64p_update_irq_hw(irq, cached_irq_mask |= 1 << irq); } -static unsigned int -eb64p_startup_irq(unsigned int irq) -{ - eb64p_enable_irq(irq); - return 0; /* never anything pending */ -} - -static void -eb64p_end_irq(unsigned int irq) -{ - if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) - eb64p_enable_irq(irq); -} - static struct irq_chip eb64p_irq_type = { .name = "EB64P", - .startup = eb64p_startup_irq, - .shutdown = eb64p_disable_irq, - .enable = eb64p_enable_irq, - .disable = eb64p_disable_irq, - .ack = eb64p_disable_irq, - .end = eb64p_end_irq, + .unmask = eb64p_enable_irq, + .mask = eb64p_disable_irq, + .mask_ack = eb64p_disable_irq, }; static void @@ -135,8 +118,8 @@ eb64p_init_irq(void) init_i8259a_irqs(); for (i = 16; i < 32; ++i) { - irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL; - irq_desc[i].chip = &eb64p_irq_type; + irq_to_desc(i)->status |= IRQ_LEVEL; + set_irq_chip_and_handler(i, &eb64p_irq_type, handle_level_irq); } common_init_isa_dma(); diff --git a/arch/alpha/kernel/sys_eiger.c b/arch/alpha/kernel/sys_eiger.c index 3ca1dbc..1121bc5 100644 --- a/arch/alpha/kernel/sys_eiger.c +++ b/arch/alpha/kernel/sys_eiger.c @@ -66,28 +66,11 @@ eiger_disable_irq(unsigned int irq) eiger_update_irq_hw(irq, mask); } -static unsigned int -eiger_startup_irq(unsigned int irq) -{ - eiger_enable_irq(irq); - return 0; /* never anything pending */ -} - -static void -eiger_end_irq(unsigned int irq) -{ - if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) - eiger_enable_irq(irq); -} - static struct irq_chip eiger_irq_type = { .name = "EIGER", - .startup = eiger_startup_irq, - .shutdown = eiger_disable_irq, - .enable = eiger_enable_irq, - .disable = eiger_disable_irq, - .ack = eiger_disable_irq, - .end = eiger_end_irq, + .unmask = eiger_enable_irq, + .mask = eiger_disable_irq, + .mask_ack = eiger_disable_irq, }; static void @@ -153,8 +136,8 @@ eiger_init_irq(void) init_i8259a_irqs(); for (i = 16; i < 128; ++i) { - irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL; - irq_desc[i].chip = &eiger_irq_type; + irq_to_desc(i)->status |= IRQ_LEVEL; + set_irq_chip_and_handler(i, &eiger_irq_type, handle_level_irq); } } diff --git a/arch/alpha/kernel/sys_jensen.c b/arch/alpha/kernel/sys_jensen.c index 7a7ae36..34f55e0 100644 --- a/arch/alpha/kernel/sys_jensen.c +++ b/arch/alpha/kernel/sys_jensen.c @@ -62,30 +62,6 @@ * world. */ -static unsigned int -jensen_local_startup(unsigned int irq) -{ - /* the parport is really hw IRQ 1, silly Jensen. */ - if (irq == 7) - i8259a_startup_irq(1); - else - /* - * For all true local interrupts, set the flag that prevents - * the IPL from being dropped during handler processing. - */ - if (irq_desc[irq].action) - irq_desc[irq].action->flags |= IRQF_DISABLED; - return 0; -} - -static void -jensen_local_shutdown(unsigned int irq) -{ - /* the parport is really hw IRQ 1, silly Jensen. */ - if (irq == 7) - i8259a_disable_irq(1); -} - static void jensen_local_enable(unsigned int irq) { @@ -103,29 +79,18 @@ jensen_local_disable(unsigned int irq) } static void -jensen_local_ack(unsigned int irq) +jensen_local_mask_ack(unsigned int irq) { /* the parport is really hw IRQ 1, silly Jensen. */ if (irq == 7) i8259a_mask_and_ack_irq(1); } -static void -jensen_local_end(unsigned int irq) -{ - /* the parport is really hw IRQ 1, silly Jensen. */ - if (irq == 7) - i8259a_end_irq(1); -} - static struct irq_chip jensen_local_irq_type = { .name = "LOCAL", - .startup = jensen_local_startup, - .shutdown = jensen_local_shutdown, - .enable = jensen_local_enable, - .disable = jensen_local_disable, - .ack = jensen_local_ack, - .end = jensen_local_end, + .unmask = jensen_local_enable, + .mask = jensen_local_disable, + .mask_ack = jensen_local_mask_ack, }; static void @@ -158,7 +123,7 @@ jensen_device_interrupt(unsigned long vector) } /* If there is no handler yet... */ - if (irq_desc[irq].action == NULL) { + if (!irq_has_action(irq)) { /* If it is a local interrupt that cannot be masked... */ if (vector >= 0x900) { @@ -206,11 +171,11 @@ jensen_init_irq(void) { init_i8259a_irqs(); - irq_desc[1].chip = &jensen_local_irq_type; - irq_desc[4].chip = &jensen_local_irq_type; - irq_desc[3].chip = &jensen_local_irq_type; - irq_desc[7].chip = &jensen_local_irq_type; - irq_desc[9].chip = &jensen_local_irq_type; + set_irq_chip_and_handler(1, &jensen_local_irq_type, handle_level_irq); + set_irq_chip_and_handler(4, &jensen_local_irq_type, handle_level_irq); + set_irq_chip_and_handler(3, &jensen_local_irq_type, handle_level_irq); + set_irq_chip_and_handler(7, &jensen_local_irq_type, handle_level_irq); + set_irq_chip_and_handler(9, &jensen_local_irq_type, handle_level_irq); common_init_isa_dma(); } diff --git a/arch/alpha/kernel/sys_marvel.c b/arch/alpha/kernel/sys_marvel.c index 0bb3b5c..2bfc9f1 100644 --- a/arch/alpha/kernel/sys_marvel.c +++ b/arch/alpha/kernel/sys_marvel.c @@ -143,20 +143,6 @@ io7_disable_irq(unsigned int irq) spin_unlock(&io7->irq_lock); } -static unsigned int -io7_startup_irq(unsigned int irq) -{ - io7_enable_irq(irq); - return 0; /* never anything pending */ -} - -static void -io7_end_irq(unsigned int irq) -{ - if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) - io7_enable_irq(irq); -} - static void marvel_irq_noop(unsigned int irq) { @@ -171,32 +157,22 @@ marvel_irq_noop_return(unsigned int irq) static struct irq_chip marvel_legacy_irq_type = { .name = "LEGACY", - .startup = marvel_irq_noop_return, - .shutdown = marvel_irq_noop, - .enable = marvel_irq_noop, - .disable = marvel_irq_noop, - .ack = marvel_irq_noop, - .end = marvel_irq_noop, + .mask = marvel_irq_noop, + .unmask = marvel_irq_noop, }; static struct irq_chip io7_lsi_irq_type = { .name = "LSI", - .startup = io7_startup_irq, - .shutdown = io7_disable_irq, - .enable = io7_enable_irq, - .disable = io7_disable_irq, - .ack = io7_disable_irq, - .end = io7_end_irq, + .unmask = io7_enable_irq, + .mask = io7_disable_irq, + .mask_ack = io7_disable_irq, }; static struct irq_chip io7_msi_irq_type = { .name = "MSI", - .startup = io7_startup_irq, - .shutdown = io7_disable_irq, - .enable = io7_enable_irq, - .disable = io7_disable_irq, + .unmask = io7_enable_irq, + .mask = io7_disable_irq, .ack = marvel_irq_noop, - .end = io7_end_irq, }; static void @@ -304,8 +280,8 @@ init_io7_irqs(struct io7 *io7, /* Set up the lsi irqs. */ for (i = 0; i < 128; ++i) { - irq_desc[base + i].status = IRQ_DISABLED | IRQ_LEVEL; - irq_desc[base + i].chip = lsi_ops; + irq_to_desc(base + i)->status |= IRQ_LEVEL; + set_irq_chip_and_handler(base + i, lsi_ops, handle_level_irq); } /* Disable the implemented irqs in hardware. */ @@ -318,8 +294,8 @@ init_io7_irqs(struct io7 *io7, /* Set up the msi irqs. */ for (i = 128; i < (128 + 512); ++i) { - irq_desc[base + i].status = IRQ_DISABLED | IRQ_LEVEL; - irq_desc[base + i].chip = msi_ops; + irq_to_desc(base + i)->status |= IRQ_LEVEL; + set_irq_chip_and_handler(base + i, msi_ops, handle_level_irq); } for (i = 0; i < 16; ++i) @@ -336,8 +312,8 @@ marvel_init_irq(void) /* Reserve the legacy irqs. */ for (i = 0; i < 16; ++i) { - irq_desc[i].status = IRQ_DISABLED; - irq_desc[i].chip = &marvel_legacy_irq_type; + set_irq_chip_and_handler(i, &marvel_legacy_irq_type, + handle_level_irq); } /* Init the io7 irqs. */ diff --git a/arch/alpha/kernel/sys_mikasa.c b/arch/alpha/kernel/sys_mikasa.c index ee88651..bcc1639 100644 --- a/arch/alpha/kernel/sys_mikasa.c +++ b/arch/alpha/kernel/sys_mikasa.c @@ -54,28 +54,11 @@ mikasa_disable_irq(unsigned int irq) mikasa_update_irq_hw(cached_irq_mask &= ~(1 << (irq - 16))); } -static unsigned int -mikasa_startup_irq(unsigned int irq) -{ - mikasa_enable_irq(irq); - return 0; -} - -static void -mikasa_end_irq(unsigned int irq) -{ - if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) - mikasa_enable_irq(irq); -} - static struct irq_chip mikasa_irq_type = { .name = "MIKASA", - .startup = mikasa_startup_irq, - .shutdown = mikasa_disable_irq, - .enable = mikasa_enable_irq, - .disable = mikasa_disable_irq, - .ack = mikasa_disable_irq, - .end = mikasa_end_irq, + .unmask = mikasa_enable_irq, + .mask = mikasa_disable_irq, + .mask_ack = mikasa_disable_irq, }; static void @@ -115,8 +98,8 @@ mikasa_init_irq(void) mikasa_update_irq_hw(0); for (i = 16; i < 32; ++i) { - irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL; - irq_desc[i].chip = &mikasa_irq_type; + irq_to_desc(i)->status |= IRQ_LEVEL; + set_irq_chip_and_handler(i, &mikasa_irq_type, handle_level_irq); } init_i8259a_irqs(); diff --git a/arch/alpha/kernel/sys_noritake.c b/arch/alpha/kernel/sys_noritake.c index 86503fe..e88f4ae 100644 --- a/arch/alpha/kernel/sys_noritake.c +++ b/arch/alpha/kernel/sys_noritake.c @@ -59,28 +59,11 @@ noritake_disable_irq(unsigned int irq) noritake_update_irq_hw(irq, cached_irq_mask &= ~(1 << (irq - 16))); } -static unsigned int -noritake_startup_irq(unsigned int irq) -{ - noritake_enable_irq(irq); - return 0; -} - -static void -noritake_end_irq(unsigned int irq) -{ - if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) - noritake_enable_irq(irq); -} - static struct irq_chip noritake_irq_type = { .name = "NORITAKE", - .startup = noritake_startup_irq, - .shutdown = noritake_disable_irq, - .enable = noritake_enable_irq, - .disable = noritake_disable_irq, - .ack = noritake_disable_irq, - .end = noritake_end_irq, + .unmask = noritake_enable_irq, + .mask = noritake_disable_irq, + .mask_ack = noritake_disable_irq, }; static void @@ -144,8 +127,8 @@ noritake_init_irq(void) outw(0, 0x54c); for (i = 16; i < 48; ++i) { - irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL; - irq_desc[i].chip = &noritake_irq_type; + irq_to_desc(i)->status |= IRQ_LEVEL; + set_irq_chip_and_handler(i, &noritake_irq_type, handle_level_irq); } init_i8259a_irqs(); diff --git a/arch/alpha/kernel/sys_rawhide.c b/arch/alpha/kernel/sys_rawhide.c index 26c322b..6a51364 100644 --- a/arch/alpha/kernel/sys_rawhide.c +++ b/arch/alpha/kernel/sys_rawhide.c @@ -121,28 +121,11 @@ rawhide_mask_and_ack_irq(unsigned int irq) spin_unlock(&rawhide_irq_lock); } -static unsigned int -rawhide_startup_irq(unsigned int irq) -{ - rawhide_enable_irq(irq); - return 0; -} - -static void -rawhide_end_irq(unsigned int irq) -{ - if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) - rawhide_enable_irq(irq); -} - static struct irq_chip rawhide_irq_type = { .name = "RAWHIDE", - .startup = rawhide_startup_irq, - .shutdown = rawhide_disable_irq, - .enable = rawhide_enable_irq, - .disable = rawhide_disable_irq, - .ack = rawhide_mask_and_ack_irq, - .end = rawhide_end_irq, + .unmask = rawhide_enable_irq, + .mask = rawhide_disable_irq, + .mask_ack = rawhide_mask_and_ack_irq, }; static void @@ -194,8 +177,8 @@ rawhide_init_irq(void) } for (i = 16; i < 128; ++i) { - irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL; - irq_desc[i].chip = &rawhide_irq_type; + irq_to_desc(i)->status |= IRQ_LEVEL; + set_irq_chip_and_handler(i, &rawhide_irq_type, handle_level_irq); } init_i8259a_irqs(); diff --git a/arch/alpha/kernel/sys_rx164.c b/arch/alpha/kernel/sys_rx164.c index be16112..89e7e37e 100644 --- a/arch/alpha/kernel/sys_rx164.c +++ b/arch/alpha/kernel/sys_rx164.c @@ -58,28 +58,11 @@ rx164_disable_irq(unsigned int irq) rx164_update_irq_hw(cached_irq_mask &= ~(1UL << (irq - 16))); } -static unsigned int -rx164_startup_irq(unsigned int irq) -{ - rx164_enable_irq(irq); - return 0; -} - -static void -rx164_end_irq(unsigned int irq) -{ - if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) - rx164_enable_irq(irq); -} - static struct irq_chip rx164_irq_type = { .name = "RX164", - .startup = rx164_startup_irq, - .shutdown = rx164_disable_irq, - .enable = rx164_enable_irq, - .disable = rx164_disable_irq, - .ack = rx164_disable_irq, - .end = rx164_end_irq, + .unmask = rx164_enable_irq, + .mask = rx164_disable_irq, + .mask_ack = rx164_disable_irq, }; static void @@ -116,8 +99,8 @@ rx164_init_irq(void) rx164_update_irq_hw(0); for (i = 16; i < 40; ++i) { - irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL; - irq_desc[i].chip = &rx164_irq_type; + irq_to_desc(i)->status |= IRQ_LEVEL; + set_irq_chip_and_handler(i, &rx164_irq_type, handle_level_irq); } init_i8259a_irqs(); diff --git a/arch/alpha/kernel/sys_sable.c b/arch/alpha/kernel/sys_sable.c index b2abe27..5c4423d 100644 --- a/arch/alpha/kernel/sys_sable.c +++ b/arch/alpha/kernel/sys_sable.c @@ -474,20 +474,6 @@ sable_lynx_disable_irq(unsigned int irq) #endif } -static unsigned int -sable_lynx_startup_irq(unsigned int irq) -{ - sable_lynx_enable_irq(irq); - return 0; -} - -static void -sable_lynx_end_irq(unsigned int irq) -{ - if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) - sable_lynx_enable_irq(irq); -} - static void sable_lynx_mask_and_ack_irq(unsigned int irq) { @@ -503,12 +489,9 @@ sable_lynx_mask_and_ack_irq(unsigned int irq) static struct irq_chip sable_lynx_irq_type = { .name = "SABLE/LYNX", - .startup = sable_lynx_startup_irq, - .shutdown = sable_lynx_disable_irq, - .enable = sable_lynx_enable_irq, - .disable = sable_lynx_disable_irq, - .ack = sable_lynx_mask_and_ack_irq, - .end = sable_lynx_end_irq, + .unmask = sable_lynx_enable_irq, + .mask = sable_lynx_disable_irq, + .mask_ack = sable_lynx_mask_and_ack_irq, }; static void @@ -535,8 +518,9 @@ sable_lynx_init_irq(int nr_of_irqs) long i; for (i = 0; i < nr_of_irqs; ++i) { - irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL; - irq_desc[i].chip = &sable_lynx_irq_type; + irq_to_desc(i)->status |= IRQ_LEVEL; + set_irq_chip_and_handler(i, &sable_lynx_irq_type, + handle_level_irq); } common_init_isa_dma(); diff --git a/arch/alpha/kernel/sys_takara.c b/arch/alpha/kernel/sys_takara.c index 4da596b..f8a1e8a 100644 --- a/arch/alpha/kernel/sys_takara.c +++ b/arch/alpha/kernel/sys_takara.c @@ -60,28 +60,11 @@ takara_disable_irq(unsigned int irq) takara_update_irq_hw(irq, mask); } -static unsigned int -takara_startup_irq(unsigned int irq) -{ - takara_enable_irq(irq); - return 0; /* never anything pending */ -} - -static void -takara_end_irq(unsigned int irq) -{ - if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) - takara_enable_irq(irq); -} - static struct irq_chip takara_irq_type = { .name = "TAKARA", - .startup = takara_startup_irq, - .shutdown = takara_disable_irq, - .enable = takara_enable_irq, - .disable = takara_disable_irq, - .ack = takara_disable_irq, - .end = takara_end_irq, + .unmask = takara_enable_irq, + .mask = takara_disable_irq, + .mask_ack = takara_disable_irq, }; static void @@ -153,8 +136,8 @@ takara_init_irq(void) takara_update_irq_hw(i, -1); for (i = 16; i < 128; ++i) { - irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL; - irq_desc[i].chip = &takara_irq_type; + irq_to_desc(i)->status |= IRQ_LEVEL; + set_irq_chip_and_handler(i, &takara_irq_type, handle_level_irq); } common_init_isa_dma(); diff --git a/arch/alpha/kernel/sys_titan.c b/arch/alpha/kernel/sys_titan.c index 9008d0f..e02494b 100644 --- a/arch/alpha/kernel/sys_titan.c +++ b/arch/alpha/kernel/sys_titan.c @@ -129,20 +129,6 @@ titan_disable_irq(unsigned int irq) spin_unlock(&titan_irq_lock); } -static unsigned int -titan_startup_irq(unsigned int irq) -{ - titan_enable_irq(irq); - return 0; /* never anything pending */ -} - -static void -titan_end_irq(unsigned int irq) -{ - if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) - titan_enable_irq(irq); -} - static void titan_cpu_set_irq_affinity(unsigned int irq, cpumask_t affinity) { @@ -189,20 +175,17 @@ init_titan_irqs(struct irq_chip * ops, int imin, int imax) { long i; for (i = imin; i <= imax; ++i) { - irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL; - irq_desc[i].chip = ops; + irq_to_desc(i)->status |= IRQ_LEVEL; + set_irq_chip_and_handler(i, ops, handle_level_irq); } } static struct irq_chip titan_irq_type = { - .name = "TITAN", - .startup = titan_startup_irq, - .shutdown = titan_disable_irq, - .enable = titan_enable_irq, - .disable = titan_disable_irq, - .ack = titan_disable_irq, - .end = titan_end_irq, - .set_affinity = titan_set_irq_affinity, + .name = "TITAN", + .unmask = titan_enable_irq, + .mask = titan_disable_irq, + .mask_ack = titan_disable_irq, + .set_affinity = titan_set_irq_affinity, }; static irqreturn_t diff --git a/arch/alpha/kernel/sys_wildfire.c b/arch/alpha/kernel/sys_wildfire.c index 62fd972..eec5259 100644 --- a/arch/alpha/kernel/sys_wildfire.c +++ b/arch/alpha/kernel/sys_wildfire.c @@ -139,32 +139,11 @@ wildfire_mask_and_ack_irq(unsigned int irq) spin_unlock(&wildfire_irq_lock); } -static unsigned int -wildfire_startup_irq(unsigned int irq) -{ - wildfire_enable_irq(irq); - return 0; /* never anything pending */ -} - -static void -wildfire_end_irq(unsigned int irq) -{ -#if 0 - if (!irq_desc[irq].action) - printk("got irq %d\n", irq); -#endif - if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) - wildfire_enable_irq(irq); -} - static struct irq_chip wildfire_irq_type = { .name = "WILDFIRE", - .startup = wildfire_startup_irq, - .shutdown = wildfire_disable_irq, - .enable = wildfire_enable_irq, - .disable = wildfire_disable_irq, - .ack = wildfire_mask_and_ack_irq, - .end = wildfire_end_irq, + .unmask = wildfire_enable_irq, + .mask = wildfire_disable_irq, + .mask_ack = wildfire_mask_and_ack_irq, }; static void __init @@ -198,15 +177,18 @@ wildfire_init_irq_per_pca(int qbbno, int pcano) for (i = 0; i < 16; ++i) { if (i == 2) continue; - irq_desc[i+irq_bias].status = IRQ_DISABLED | IRQ_LEVEL; - irq_desc[i+irq_bias].chip = &wildfire_irq_type; + irq_to_desc(i+irq_bias)->status |= IRQ_LEVEL; + set_irq_chip_and_handler(i+irq_bias, &wildfire_irq_type, + handle_level_irq); } - irq_desc[36+irq_bias].status = IRQ_DISABLED | IRQ_LEVEL; - irq_desc[36+irq_bias].chip = &wildfire_irq_type; + irq_to_desc(36+irq_bias)->status |= IRQ_LEVEL; + set_irq_chip_and_handler(36+irq_bias, &wildfire_irq_type, + handle_level_irq); for (i = 40; i < 64; ++i) { - irq_desc[i+irq_bias].status = IRQ_DISABLED | IRQ_LEVEL; - irq_desc[i+irq_bias].chip = &wildfire_irq_type; + irq_to_desc(i+irq_bias)->status |= IRQ_LEVEL; + set_irq_chip_and_handler(i+irq_bias, &wildfire_irq_type, + handle_level_irq); } setup_irq(32+irq_bias, &isa_enable); diff --git a/arch/alpha/lib/Makefile b/arch/alpha/lib/Makefile index 9b72c59..c0a83ab 100644 --- a/arch/alpha/lib/Makefile +++ b/arch/alpha/lib/Makefile @@ -2,8 +2,8 @@ # Makefile for alpha-specific library files.. # -EXTRA_AFLAGS := $(KBUILD_CFLAGS) -EXTRA_CFLAGS := -Werror +asflags-y := $(KBUILD_CFLAGS) +ccflags-y := -Werror # Many of these routines have implementations tuned for ev6. # Choose them iff we're targeting ev6 specifically. diff --git a/arch/alpha/math-emu/Makefile b/arch/alpha/math-emu/Makefile index 359ef08..7f46719 100644 --- a/arch/alpha/math-emu/Makefile +++ b/arch/alpha/math-emu/Makefile @@ -2,7 +2,7 @@ # Makefile for the FPU instruction emulation. # -EXTRA_CFLAGS := -w +ccflags-y := -w obj-$(CONFIG_MATHEMU) += math-emu.o diff --git a/arch/alpha/mm/Makefile b/arch/alpha/mm/Makefile index 09399c5..c993d3f 100644 --- a/arch/alpha/mm/Makefile +++ b/arch/alpha/mm/Makefile @@ -2,7 +2,7 @@ # Makefile for the linux alpha-specific parts of the memory manager. # -EXTRA_CFLAGS := -Werror +ccflags-y := -Werror obj-y := init.o fault.o extable.o diff --git a/arch/alpha/oprofile/Makefile b/arch/alpha/oprofile/Makefile index 4aa5624..3473de7 100644 --- a/arch/alpha/oprofile/Makefile +++ b/arch/alpha/oprofile/Makefile @@ -1,4 +1,4 @@ -EXTRA_CFLAGS := -Werror -Wno-sign-compare +ccflags-y := -Werror -Wno-sign-compare obj-$(CONFIG_OPROFILE) += oprofile.o diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index e2f8011..5cff165 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -26,6 +26,8 @@ config ARM select HAVE_REGS_AND_STACK_ACCESS_API select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V7)) select HAVE_C_RECORDMCOUNT + select HAVE_GENERIC_HARDIRQS + select HAVE_SPARSE_IRQ help The ARM series is a line of low-power-consumption RISC chip designs licensed by ARM Ltd and targeted at embedded applications and @@ -97,10 +99,6 @@ config MCA <file:Documentation/mca.txt> (and especially the web page given there) before attempting to build an MCA bus kernel. -config GENERIC_HARDIRQS - bool - default y - config STACKTRACE_SUPPORT bool default y @@ -180,9 +178,6 @@ config FIQ config ARCH_MTD_XIP bool -config GENERIC_HARDIRQS_NO__DO_IRQ - def_bool y - config ARM_L1_CACHE_SHIFT_6 bool help @@ -368,7 +363,7 @@ config ARCH_MXS bool "Freescale MXS-based" select GENERIC_CLOCKEVENTS select ARCH_REQUIRE_GPIOLIB - select COMMON_CLKDEV + select CLKDEV_LOOKUP help Support for Freescale MXS-based family of processors @@ -771,6 +766,7 @@ config ARCH_S5PV310 select ARCH_SPARSEMEM_ENABLE select GENERIC_GPIO select HAVE_CLK + select ARCH_HAS_CPUFREQ select GENERIC_CLOCKEVENTS select HAVE_S3C_RTC if RTC_CLASS select HAVE_S3C2410_I2C if I2C @@ -1281,7 +1277,7 @@ config SMP config SMP_ON_UP bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)" depends on EXPERIMENTAL - depends on SMP && !XIP + depends on SMP && !XIP_KERNEL default y help SMP kernels contain instructions which fail on non-SMP processors. @@ -1452,15 +1448,6 @@ config HW_PERF_EVENTS Enable hardware performance counter support for perf events. If disabled, perf events will use software events only. -config SPARSE_IRQ - def_bool n - help - This enables support for sparse irqs. This is useful in general - as most CPUs have a fairly sparse array of IRQ vectors, which - the irq_desc then maps directly on to. Systems with a high - number of off-chip IRQs will want to treat this as - experimental until they have been independently verified. - source "mm/Kconfig" config FORCE_MAX_ZONEORDER diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c index 0b89ef0..2243772 100644 --- a/arch/arm/common/gic.c +++ b/arch/arm/common/gic.c @@ -50,57 +50,56 @@ struct gic_chip_data { static struct gic_chip_data gic_data[MAX_GIC_NR] __read_mostly; -static inline void __iomem *gic_dist_base(unsigned int irq) +static inline void __iomem *gic_dist_base(struct irq_data *d) { - struct gic_chip_data *gic_data = get_irq_chip_data(irq); + struct gic_chip_data *gic_data = irq_data_get_irq_chip_data(d); return gic_data->dist_base; } -static inline void __iomem *gic_cpu_base(unsigned int irq) +static inline void __iomem *gic_cpu_base(struct irq_data *d) { - struct gic_chip_data *gic_data = get_irq_chip_data(irq); + struct gic_chip_data *gic_data = irq_data_get_irq_chip_data(d); return gic_data->cpu_base; } -static inline unsigned int gic_irq(unsigned int irq) +static inline unsigned int gic_irq(struct irq_data *d) { - struct gic_chip_data *gic_data = get_irq_chip_data(irq); - return irq - gic_data->irq_offset; + struct gic_chip_data *gic_data = irq_data_get_irq_chip_data(d); + return d->irq - gic_data->irq_offset; } /* * Routines to acknowledge, disable and enable interrupts */ -static void gic_ack_irq(unsigned int irq) +static void gic_ack_irq(struct irq_data *d) { - spin_lock(&irq_controller_lock); - writel(gic_irq(irq), gic_cpu_base(irq) + GIC_CPU_EOI); + writel(gic_irq(d), gic_cpu_base(d) + GIC_CPU_EOI); spin_unlock(&irq_controller_lock); } -static void gic_mask_irq(unsigned int irq) +static void gic_mask_irq(struct irq_data *d) { - u32 mask = 1 << (irq % 32); + u32 mask = 1 << (d->irq % 32); spin_lock(&irq_controller_lock); - writel(mask, gic_dist_base(irq) + GIC_DIST_ENABLE_CLEAR + (gic_irq(irq) / 32) * 4); + writel(mask, gic_dist_base(d) + GIC_DIST_ENABLE_CLEAR + (gic_irq(d) / 32) * 4); spin_unlock(&irq_controller_lock); } -static void gic_unmask_irq(unsigned int irq) +static void gic_unmask_irq(struct irq_data *d) { - u32 mask = 1 << (irq % 32); + u32 mask = 1 << (d->irq % 32); spin_lock(&irq_controller_lock); - writel(mask, gic_dist_base(irq) + GIC_DIST_ENABLE_SET + (gic_irq(irq) / 32) * 4); + writel(mask, gic_dist_base(d) + GIC_DIST_ENABLE_SET + (gic_irq(d) / 32) * 4); spin_unlock(&irq_controller_lock); } -static int gic_set_type(unsigned int irq, unsigned int type) +static int gic_set_type(struct irq_data *d, unsigned int type) { - void __iomem *base = gic_dist_base(irq); - unsigned int gicirq = gic_irq(irq); + void __iomem *base = gic_dist_base(d); + unsigned int gicirq = gic_irq(d); u32 enablemask = 1 << (gicirq % 32); u32 enableoff = (gicirq / 32) * 4; u32 confmask = 0x2 << ((gicirq % 16) * 2); @@ -143,21 +142,22 @@ static int gic_set_type(unsigned int irq, unsigned int type) } #ifdef CONFIG_SMP -static int gic_set_cpu(unsigned int irq, const struct cpumask *mask_val) +static int +gic_set_cpu(struct irq_data *d, const struct cpumask *mask_val, bool force) { - void __iomem *reg = gic_dist_base(irq) + GIC_DIST_TARGET + (gic_irq(irq) & ~3); - unsigned int shift = (irq % 4) * 8; + void __iomem *reg = gic_dist_base(d) + GIC_DIST_TARGET + (gic_irq(d) & ~3); + unsigned int shift = (d->irq % 4) * 8; unsigned int cpu = cpumask_first(mask_val); u32 val; struct irq_desc *desc; spin_lock(&irq_controller_lock); - desc = irq_to_desc(irq); + desc = irq_to_desc(d->irq); if (desc == NULL) { spin_unlock(&irq_controller_lock); return -EINVAL; } - desc->node = cpu; + d->node = cpu; val = readl(reg) & ~(0xff << shift); val |= 1 << (cpu + shift); writel(val, reg); @@ -175,7 +175,7 @@ static void gic_handle_cascade_irq(unsigned int irq, struct irq_desc *desc) unsigned long status; /* primary controller ack'ing */ - chip->ack(irq); + chip->irq_ack(&desc->irq_data); spin_lock(&irq_controller_lock); status = readl(chip_data->cpu_base + GIC_CPU_INTACK); @@ -193,17 +193,17 @@ static void gic_handle_cascade_irq(unsigned int irq, struct irq_desc *desc) out: /* primary controller unmasking */ - chip->unmask(irq); + chip->irq_unmask(&desc->irq_data); } static struct irq_chip gic_chip = { - .name = "GIC", - .ack = gic_ack_irq, - .mask = gic_mask_irq, - .unmask = gic_unmask_irq, - .set_type = gic_set_type, + .name = "GIC", + .irq_ack = gic_ack_irq, + .irq_mask = gic_mask_irq, + .irq_unmask = gic_unmask_irq, + .irq_set_type = gic_set_type, #ifdef CONFIG_SMP - .set_affinity = gic_set_cpu, + .irq_set_affinity = gic_set_cpu, #endif }; @@ -337,7 +337,7 @@ void __cpuinit gic_enable_ppi(unsigned int irq) local_irq_save(flags); irq_to_desc(irq)->status |= IRQ_NOPROBE; - gic_unmask_irq(irq); + gic_unmask_irq(irq_get_irq_data(irq)); local_irq_restore(flags); } diff --git a/arch/arm/common/it8152.c b/arch/arm/common/it8152.c index 665ebf7..fcddd48 100644 --- a/arch/arm/common/it8152.c +++ b/arch/arm/common/it8152.c @@ -31,8 +31,10 @@ #define MAX_SLOTS 21 -static void it8152_mask_irq(unsigned int irq) +static void it8152_mask_irq(struct irq_data *d) { + unsigned int irq = d->irq; + if (irq >= IT8152_LD_IRQ(0)) { __raw_writel((__raw_readl(IT8152_INTC_LDCNIMR) | (1 << (irq - IT8152_LD_IRQ(0)))), @@ -48,8 +50,10 @@ static void it8152_mask_irq(unsigned int irq) } } -static void it8152_unmask_irq(unsigned int irq) +static void it8152_unmask_irq(struct irq_data *d) { + unsigned int irq = d->irq; + if (irq >= IT8152_LD_IRQ(0)) { __raw_writel((__raw_readl(IT8152_INTC_LDCNIMR) & ~(1 << (irq - IT8152_LD_IRQ(0)))), @@ -67,9 +71,9 @@ static void it8152_unmask_irq(unsigned int irq) static struct irq_chip it8152_irq_chip = { .name = "it8152", - .ack = it8152_mask_irq, - .mask = it8152_mask_irq, - .unmask = it8152_unmask_irq, + .irq_ack = it8152_mask_irq, + .irq_mask = it8152_mask_irq, + .irq_unmask = it8152_unmask_irq, }; void it8152_init_irq(void) diff --git a/arch/arm/common/locomo.c b/arch/arm/common/locomo.c index 9dff07c..a026a6b 100644 --- a/arch/arm/common/locomo.c +++ b/arch/arm/common/locomo.c @@ -144,7 +144,7 @@ static void locomo_handler(unsigned int irq, struct irq_desc *desc) int req, i; /* Acknowledge the parent IRQ */ - desc->chip->ack(irq); + desc->irq_data.chip->irq_ack(&desc->irq_data); /* check why this interrupt was generated */ req = locomo_readl(lchip->base + LOCOMO_ICR) & 0x0f00; @@ -161,33 +161,33 @@ static void locomo_handler(unsigned int irq, struct irq_desc *desc) } } -static void locomo_ack_irq(unsigned int irq) +static void locomo_ack_irq(struct irq_data *d) { } -static void locomo_mask_irq(unsigned int irq) +static void locomo_mask_irq(struct irq_data *d) { - struct locomo *lchip = get_irq_chip_data(irq); + struct locomo *lchip = irq_data_get_irq_chip_data(d); unsigned int r; r = locomo_readl(lchip->base + LOCOMO_ICR); - r &= ~(0x0010 << (irq - lchip->irq_base)); + r &= ~(0x0010 << (d->irq - lchip->irq_base)); locomo_writel(r, lchip->base + LOCOMO_ICR); } -static void locomo_unmask_irq(unsigned int irq) +static void locomo_unmask_irq(struct irq_data *d) { - struct locomo *lchip = get_irq_chip_data(irq); + struct locomo *lchip = irq_data_get_irq_chip_data(d); unsigned int r; r = locomo_readl(lchip->base + LOCOMO_ICR); - r |= (0x0010 << (irq - lchip->irq_base)); + r |= (0x0010 << (d->irq - lchip->irq_base)); locomo_writel(r, lchip->base + LOCOMO_ICR); } static struct irq_chip locomo_chip = { - .name = "LOCOMO", - .ack = locomo_ack_irq, - .mask = locomo_mask_irq, - .unmask = locomo_unmask_irq, + .name = "LOCOMO", + .irq_ack = locomo_ack_irq, + .irq_mask = locomo_mask_irq, + .irq_unmask = locomo_unmask_irq, }; static void locomo_setup_irq(struct locomo *lchip) diff --git a/arch/arm/common/sa1111.c b/arch/arm/common/sa1111.c index c0258a8..eb9796b 100644 --- a/arch/arm/common/sa1111.c +++ b/arch/arm/common/sa1111.c @@ -210,7 +210,7 @@ sa1111_irq_handler(unsigned int irq, struct irq_desc *desc) sa1111_writel(stat0, mapbase + SA1111_INTSTATCLR0); - desc->chip->ack(irq); + desc->irq_data.chip->irq_ack(&desc->irq_data); sa1111_writel(stat1, mapbase + SA1111_INTSTATCLR1); @@ -228,35 +228,35 @@ sa1111_irq_handler(unsigned int irq, struct irq_desc *desc) generic_handle_irq(i + sachip->irq_base); /* For level-based interrupts */ - desc->chip->unmask(irq); + desc->irq_data.chip->irq_unmask(&desc->irq_data); } #define SA1111_IRQMASK_LO(x) (1 << (x - sachip->irq_base)) #define SA1111_IRQMASK_HI(x) (1 << (x - sachip->irq_base - 32)) -static void sa1111_ack_irq(unsigned int irq) +static void sa1111_ack_irq(struct irq_data *d) { } -static void sa1111_mask_lowirq(unsigned int irq) +static void sa1111_mask_lowirq(struct irq_data *d) { - struct sa1111 *sachip = get_irq_chip_data(irq); + struct sa1111 *sachip = irq_data_get_irq_chip_data(d); void __iomem *mapbase = sachip->base + SA1111_INTC; unsigned long ie0; ie0 = sa1111_readl(mapbase + SA1111_INTEN0); - ie0 &= ~SA1111_IRQMASK_LO(irq); + ie0 &= ~SA1111_IRQMASK_LO(d->irq); writel(ie0, mapbase + SA1111_INTEN0); } -static void sa1111_unmask_lowirq(unsigned int irq) +static void sa1111_unmask_lowirq(struct irq_data *d) { - struct sa1111 *sachip = get_irq_chip_data(irq); + struct sa1111 *sachip = irq_data_get_irq_chip_data(d); void __iomem *mapbase = sachip->base + SA1111_INTC; unsigned long ie0; ie0 = sa1111_readl(mapbase + SA1111_INTEN0); - ie0 |= SA1111_IRQMASK_LO(irq); + ie0 |= SA1111_IRQMASK_LO(d->irq); sa1111_writel(ie0, mapbase + SA1111_INTEN0); } @@ -267,11 +267,11 @@ static void sa1111_unmask_lowirq(unsigned int irq) * be triggered. In fact, its very difficult, if not impossible to get * INTSET to re-trigger the interrupt. */ -static int sa1111_retrigger_lowirq(unsigned int irq) +static int sa1111_retrigger_lowirq(struct irq_data *d) { - struct sa1111 *sachip = get_irq_chip_data(irq); + struct sa1111 *sachip = irq_data_get_irq_chip_data(d); void __iomem *mapbase = sachip->base + SA1111_INTC; - unsigned int mask = SA1111_IRQMASK_LO(irq); + unsigned int mask = SA1111_IRQMASK_LO(d->irq); unsigned long ip0; int i; @@ -279,21 +279,21 @@ static int sa1111_retrigger_lowirq(unsigned int irq) for (i = 0; i < 8; i++) { sa1111_writel(ip0 ^ mask, mapbase + SA1111_INTPOL0); sa1111_writel(ip0, mapbase + SA1111_INTPOL0); - if (sa1111_readl(mapbase + SA1111_INTSTATCLR1) & mask) + if (sa1111_readl(mapbase + SA1111_INTSTATCLR0) & mask) break; } if (i == 8) printk(KERN_ERR "Danger Will Robinson: failed to " - "re-trigger IRQ%d\n", irq); + "re-trigger IRQ%d\n", d->irq); return i == 8 ? -1 : 0; } -static int sa1111_type_lowirq(unsigned int irq, unsigned int flags) +static int sa1111_type_lowirq(struct irq_data *d, unsigned int flags) { - struct sa1111 *sachip = get_irq_chip_data(irq); + struct sa1111 *sachip = irq_data_get_irq_chip_data(d); void __iomem *mapbase = sachip->base + SA1111_INTC; - unsigned int mask = SA1111_IRQMASK_LO(irq); + unsigned int mask = SA1111_IRQMASK_LO(d->irq); unsigned long ip0; if (flags == IRQ_TYPE_PROBE) @@ -313,11 +313,11 @@ static int sa1111_type_lowirq(unsigned int irq, unsigned int flags) return 0; } -static int sa1111_wake_lowirq(unsigned int irq, unsigned int on) +static int sa1111_wake_lowirq(struct irq_data *d, unsigned int on) { - struct sa1111 *sachip = get_irq_chip_data(irq); + struct sa1111 *sachip = irq_data_get_irq_chip_data(d); void __iomem *mapbase = sachip->base + SA1111_INTC; - unsigned int mask = SA1111_IRQMASK_LO(irq); + unsigned int mask = SA1111_IRQMASK_LO(d->irq); unsigned long we0; we0 = sa1111_readl(mapbase + SA1111_WAKEEN0); @@ -332,33 +332,33 @@ static int sa1111_wake_lowirq(unsigned int irq, unsigned int on) static struct irq_chip sa1111_low_chip = { .name = "SA1111-l", - .ack = sa1111_ack_irq, - .mask = sa1111_mask_lowirq, - .unmask = sa1111_unmask_lowirq, - .retrigger = sa1111_retrigger_lowirq, - .set_type = sa1111_type_lowirq, - .set_wake = sa1111_wake_lowirq, + .irq_ack = sa1111_ack_irq, + .irq_mask = sa1111_mask_lowirq, + .irq_unmask = sa1111_unmask_lowirq, + .irq_retrigger = sa1111_retrigger_lowirq, + .irq_set_type = sa1111_type_lowirq, + .irq_set_wake = sa1111_wake_lowirq, }; -static void sa1111_mask_highirq(unsigned int irq) +static void sa1111_mask_highirq(struct irq_data *d) { - struct sa1111 *sachip = get_irq_chip_data(irq); + struct sa1111 *sachip = irq_data_get_irq_chip_data(d); void __iomem *mapbase = sachip->base + SA1111_INTC; unsigned long ie1; ie1 = sa1111_readl(mapbase + SA1111_INTEN1); - ie1 &= ~SA1111_IRQMASK_HI(irq); + ie1 &= ~SA1111_IRQMASK_HI(d->irq); sa1111_writel(ie1, mapbase + SA1111_INTEN1); } -static void sa1111_unmask_highirq(unsigned int irq) +static void sa1111_unmask_highirq(struct irq_data *d) { - struct sa1111 *sachip = get_irq_chip_data(irq); + struct sa1111 *sachip = irq_data_get_irq_chip_data(d); void __iomem *mapbase = sachip->base + SA1111_INTC; unsigned long ie1; ie1 = sa1111_readl(mapbase + SA1111_INTEN1); - ie1 |= SA1111_IRQMASK_HI(irq); + ie1 |= SA1111_IRQMASK_HI(d->irq); sa1111_writel(ie1, mapbase + SA1111_INTEN1); } @@ -369,11 +369,11 @@ static void sa1111_unmask_highirq(unsigned int irq) * be triggered. In fact, its very difficult, if not impossible to get * INTSET to re-trigger the interrupt. */ -static int sa1111_retrigger_highirq(unsigned int irq) +static int sa1111_retrigger_highirq(struct irq_data *d) { - struct sa1111 *sachip = get_irq_chip_data(irq); + struct sa1111 *sachip = irq_data_get_irq_chip_data(d); void __iomem *mapbase = sachip->base + SA1111_INTC; - unsigned int mask = SA1111_IRQMASK_HI(irq); + unsigned int mask = SA1111_IRQMASK_HI(d->irq); unsigned long ip1; int i; @@ -387,15 +387,15 @@ static int sa1111_retrigger_highirq(unsigned int irq) if (i == 8) printk(KERN_ERR "Danger Will Robinson: failed to " - "re-trigger IRQ%d\n", irq); + "re-trigger IRQ%d\n", d->irq); return i == 8 ? -1 : 0; } -static int sa1111_type_highirq(unsigned int irq, unsigned int flags) +static int sa1111_type_highirq(struct irq_data *d, unsigned int flags) { - struct sa1111 *sachip = get_irq_chip_data(irq); + struct sa1111 *sachip = irq_data_get_irq_chip_data(d); void __iomem *mapbase = sachip->base + SA1111_INTC; - unsigned int mask = SA1111_IRQMASK_HI(irq); + unsigned int mask = SA1111_IRQMASK_HI(d->irq); unsigned long ip1; if (flags == IRQ_TYPE_PROBE) @@ -415,11 +415,11 @@ static int sa1111_type_highirq(unsigned int irq, unsigned int flags) return 0; } -static int sa1111_wake_highirq(unsigned int irq, unsigned int on) +static int sa1111_wake_highirq(struct irq_data *d, unsigned int on) { - struct sa1111 *sachip = get_irq_chip_data(irq); + struct sa1111 *sachip = irq_data_get_irq_chip_data(d); void __iomem *mapbase = sachip->base + SA1111_INTC; - unsigned int mask = SA1111_IRQMASK_HI(irq); + unsigned int mask = SA1111_IRQMASK_HI(d->irq); unsigned long we1; we1 = sa1111_readl(mapbase + SA1111_WAKEEN1); @@ -434,12 +434,12 @@ static int sa1111_wake_highirq(unsigned int irq, unsigned int on) static struct irq_chip sa1111_high_chip = { .name = "SA1111-h", - .ack = sa1111_ack_irq, - .mask = sa1111_mask_highirq, - .unmask = sa1111_unmask_highirq, - .retrigger = sa1111_retrigger_highirq, - .set_type = sa1111_type_highirq, - .set_wake = sa1111_wake_highirq, + .irq_ack = sa1111_ack_irq, + .irq_mask = sa1111_mask_highirq, + .irq_unmask = sa1111_unmask_highirq, + .irq_retrigger = sa1111_retrigger_highirq, + .irq_set_type = sa1111_type_highirq, + .irq_set_wake = sa1111_wake_highirq, }; static void sa1111_setup_irq(struct sa1111 *sachip) diff --git a/arch/arm/common/vic.c b/arch/arm/common/vic.c index cb660bc..ae5fe72 100644 --- a/arch/arm/common/vic.c +++ b/arch/arm/common/vic.c @@ -204,26 +204,26 @@ static void __init vic_pm_register(void __iomem *base, unsigned int irq, u32 res static inline void vic_pm_register(void __iomem *base, unsigned int irq, u32 arg1) { } #endif /* CONFIG_PM */ -static void vic_ack_irq(unsigned int irq) +static void vic_ack_irq(struct irq_data *d) { - void __iomem *base = get_irq_chip_data(irq); - irq &= 31; + void __iomem *base = irq_data_get_irq_chip_data(d); + unsigned int irq = d->irq & 31; writel(1 << irq, base + VIC_INT_ENABLE_CLEAR); /* moreover, clear the soft-triggered, in case it was the reason */ writel(1 << irq, base + VIC_INT_SOFT_CLEAR); } -static void vic_mask_irq(unsigned int irq) +static void vic_mask_irq(struct irq_data *d) { - void __iomem *base = get_irq_chip_data(irq); - irq &= 31; + void __iomem *base = irq_data_get_irq_chip_data(d); + unsigned int irq = d->irq & 31; writel(1 << irq, base + VIC_INT_ENABLE_CLEAR); } -static void vic_unmask_irq(unsigned int irq) +static void vic_unmask_irq(struct irq_data *d) { - void __iomem *base = get_irq_chip_data(irq); - irq &= 31; + void __iomem *base = irq_data_get_irq_chip_data(d); + unsigned int irq = d->irq & 31; writel(1 << irq, base + VIC_INT_ENABLE); } @@ -242,10 +242,10 @@ static struct vic_device *vic_from_irq(unsigned int irq) return NULL; } -static int vic_set_wake(unsigned int irq, unsigned int on) +static int vic_set_wake(struct irq_data *d, unsigned int on) { - struct vic_device *v = vic_from_irq(irq); - unsigned int off = irq & 31; + struct vic_device *v = vic_from_irq(d->irq); + unsigned int off = d->irq & 31; u32 bit = 1 << off; if (!v) @@ -267,10 +267,10 @@ static int vic_set_wake(unsigned int irq, unsigned int on) static struct irq_chip vic_chip = { .name = "VIC", - .ack = vic_ack_irq, - .mask = vic_mask_irq, - .unmask = vic_unmask_irq, - .set_wake = vic_set_wake, + .irq_ack = vic_ack_irq, + .irq_mask = vic_mask_irq, + .irq_unmask = vic_unmask_irq, + .irq_set_wake = vic_set_wake, }; static void __init vic_disable(void __iomem *base) diff --git a/arch/arm/include/asm/bitops.h b/arch/arm/include/asm/bitops.h index 338ff19..7b1bb2b 100644 --- a/arch/arm/include/asm/bitops.h +++ b/arch/arm/include/asm/bitops.h @@ -285,7 +285,7 @@ static inline int fls(int x) if (__builtin_constant_p(x)) return constant_fls(x); - asm("clz\t%0, %1" : "=r" (ret) : "r" (x) : "cc"); + asm("clz\t%0, %1" : "=r" (ret) : "r" (x)); ret = 32 - ret; return ret; } diff --git a/arch/arm/include/asm/sched_clock.h b/arch/arm/include/asm/sched_clock.h index a84628b..c8e6ddf 100644 --- a/arch/arm/include/asm/sched_clock.h +++ b/arch/arm/include/asm/sched_clock.h @@ -115,4 +115,6 @@ static inline void init_fixed_sched_clock(struct clock_data *cd, } } +extern void sched_clock_postinit(void); + #endif diff --git a/arch/arm/kernel/ecard.c b/arch/arm/kernel/ecard.c index eed2f79..2ad62df 100644 --- a/arch/arm/kernel/ecard.c +++ b/arch/arm/kernel/ecard.c @@ -443,40 +443,40 @@ static expansioncard_ops_t ecard_default_ops = { * * They are not meant to be called directly, but via enable/disable_irq. */ -static void ecard_irq_unmask(unsigned int irqnr) +static void ecard_irq_unmask(struct irq_data *d) { - ecard_t *ec = slot_to_ecard(irqnr - 32); + ecard_t *ec = slot_to_ecard(d->irq - 32); if (ec) { if (!ec->ops) ec->ops = &ecard_default_ops; if (ec->claimed && ec->ops->irqenable) - ec->ops->irqenable(ec, irqnr); + ec->ops->irqenable(ec, d->irq); else printk(KERN_ERR "ecard: rejecting request to " - "enable IRQs for %d\n", irqnr); + "enable IRQs for %d\n", d->irq); } } -static void ecard_irq_mask(unsigned int irqnr) +static void ecard_irq_mask(struct irq_data *d) { - ecard_t *ec = slot_to_ecard(irqnr - 32); + ecard_t *ec = slot_to_ecard(d->irq - 32); if (ec) { if (!ec->ops) ec->ops = &ecard_default_ops; if (ec->ops && ec->ops->irqdisable) - ec->ops->irqdisable(ec, irqnr); + ec->ops->irqdisable(ec, d->irq); } } static struct irq_chip ecard_chip = { - .name = "ECARD", - .ack = ecard_irq_mask, - .mask = ecard_irq_mask, - .unmask = ecard_irq_unmask, + .name = "ECARD", + .irq_ack = ecard_irq_mask, + .irq_mask = ecard_irq_mask, + .irq_unmask = ecard_irq_unmask, }; void ecard_enablefiq(unsigned int fiqnr) @@ -551,7 +551,7 @@ static void ecard_check_lockup(struct irq_desc *desc) printk(KERN_ERR "\nInterrupt lockup detected - " "disabling all expansion card interrupts\n"); - desc->chip->mask(IRQ_EXPANSIONCARD); + desc->irq_data.chip->irq_mask(&desc->irq_data); ecard_dump_irq_state(); } } else @@ -574,7 +574,7 @@ ecard_irq_handler(unsigned int irq, struct irq_desc *desc) ecard_t *ec; int called = 0; - desc->chip->mask(irq); + desc->irq_data.chip->irq_mask(&desc->irq_data); for (ec = cards; ec; ec = ec->next) { int pending; @@ -591,7 +591,7 @@ ecard_irq_handler(unsigned int irq, struct irq_desc *desc) called ++; } } - desc->chip->unmask(irq); + desc->irq_data.chip->irq_unmask(&desc->irq_data); if (called == 0) ecard_check_lockup(desc); diff --git a/arch/arm/kernel/head-common.S b/arch/arm/kernel/head-common.S index bbecaac..8f57515 100644 --- a/arch/arm/kernel/head-common.S +++ b/arch/arm/kernel/head-common.S @@ -60,6 +60,8 @@ str_a1: .asciz "\nError: unrecognized/unsupported machine ID (r1 = 0x" str_a2: .asciz ").\n\nAvailable machine support:\n\nID (hex)\tNAME\n" str_a3: .asciz "\nPlease check your kernel config and/or bootloader.\n" .align +#else + b __error #endif /* diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c index 8135438..28536e3 100644 --- a/arch/arm/kernel/irq.c +++ b/arch/arm/kernel/irq.c @@ -88,7 +88,7 @@ int show_interrupts(struct seq_file *p, void *v) seq_printf(p, "%*d: ", prec, i); for_each_present_cpu(cpu) seq_printf(p, "%10u ", kstat_irqs_cpu(i, cpu)); - seq_printf(p, " %10s", desc->chip->name ? : "-"); + seq_printf(p, " %10s", desc->irq_data.chip->name ? : "-"); seq_printf(p, " %s", action->name); for (action = action->next; action; action = action->next) seq_printf(p, ", %s", action->name); @@ -181,10 +181,11 @@ int __init arch_probe_nr_irqs(void) static void route_irq(struct irq_desc *desc, unsigned int irq, unsigned int cpu) { - pr_debug("IRQ%u: moving from cpu%u to cpu%u\n", irq, desc->node, cpu); + pr_debug("IRQ%u: moving from cpu%u to cpu%u\n", irq, desc->irq_data.node, cpu); raw_spin_lock_irq(&desc->lock); - desc->chip->set_affinity(irq, cpumask_of(cpu)); + desc->irq_data.chip->irq_set_affinity(&desc->irq_data, + cpumask_of(cpu), false); raw_spin_unlock_irq(&desc->lock); } @@ -199,16 +200,18 @@ void migrate_irqs(void) struct irq_desc *desc; for_each_irq_desc(i, desc) { - if (desc->node == cpu) { - unsigned int newcpu = cpumask_any_and(desc->affinity, + struct irq_data *d = &desc->irq_data; + + if (d->node == cpu) { + unsigned int newcpu = cpumask_any_and(d->affinity, cpu_online_mask); if (newcpu >= nr_cpu_ids) { if (printk_ratelimit()) printk(KERN_INFO "IRQ%u no longer affine to CPU%u\n", i, cpu); - cpumask_setall(desc->affinity); - newcpu = cpumask_any_and(desc->affinity, + cpumask_setall(d->affinity); + newcpu = cpumask_any_and(d->affinity, cpu_online_mask); } diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c index e76fcaa..94bbedb 100644 --- a/arch/arm/kernel/process.c +++ b/arch/arm/kernel/process.c @@ -483,6 +483,7 @@ unsigned long arch_randomize_brk(struct mm_struct *mm) return randomize_range(mm->brk, range_end, 0) ? : mm->brk; } +#ifdef CONFIG_MMU /* * The vectors page is always readable from user space for the * atomic helpers and the signal restart code. Let's declare a mapping @@ -503,3 +504,4 @@ const char *arch_vma_name(struct vm_area_struct *vma) { return (vma->vm_start == 0xffff0000) ? "[vectors]" : NULL; } +#endif diff --git a/arch/arm/kernel/sched_clock.c b/arch/arm/kernel/sched_clock.c index 2cdcc92..9a46370 100644 --- a/arch/arm/kernel/sched_clock.c +++ b/arch/arm/kernel/sched_clock.c @@ -34,7 +34,7 @@ void __init init_sched_clock(struct clock_data *cd, void (*update)(void), sched_clock_update_fn = update; /* calculate the mult/shift to convert counter ticks to ns. */ - clocks_calc_mult_shift(&cd->mult, &cd->shift, rate, NSEC_PER_SEC, 60); + clocks_calc_mult_shift(&cd->mult, &cd->shift, rate, NSEC_PER_SEC, 0); r = rate; if (r >= 4000000) { @@ -60,10 +60,15 @@ void __init init_sched_clock(struct clock_data *cd, void (*update)(void), * sets the initial epoch. */ sched_clock_timer.data = msecs_to_jiffies(w - (w / 10)); - sched_clock_poll(sched_clock_timer.data); + update(); /* * Ensure that sched_clock() starts off at 0ns */ cd->epoch_ns = 0; } + +void __init sched_clock_postinit(void) +{ + sched_clock_poll(sched_clock_timer.data); +} diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c index 3455ad3..420b8d6 100644 --- a/arch/arm/kernel/setup.c +++ b/arch/arm/kernel/setup.c @@ -518,25 +518,21 @@ setup_ramdisk(int doload, int prompt, int image_start, unsigned int rd_sz) #endif } -static void __init -request_standard_resources(struct meminfo *mi, struct machine_desc *mdesc) +static void __init request_standard_resources(struct machine_desc *mdesc) { + struct memblock_region *region; struct resource *res; - int i; kernel_code.start = virt_to_phys(_text); kernel_code.end = virt_to_phys(_etext - 1); kernel_data.start = virt_to_phys(_sdata); kernel_data.end = virt_to_phys(_end - 1); - for (i = 0; i < mi->nr_banks; i++) { - if (mi->bank[i].size == 0) - continue; - + for_each_memblock(memory, region) { res = alloc_bootmem_low(sizeof(*res)); res->name = "System RAM"; - res->start = mi->bank[i].start; - res->end = mi->bank[i].start + mi->bank[i].size - 1; + res->start = __pfn_to_phys(memblock_region_memory_base_pfn(region)); + res->end = __pfn_to_phys(memblock_region_memory_end_pfn(region)) - 1; res->flags = IORESOURCE_MEM | IORESOURCE_BUSY; request_resource(&iomem_resource, res); @@ -650,15 +646,17 @@ static int __init parse_tag_revision(const struct tag *tag) __tagtable(ATAG_REVISION, parse_tag_revision); -#ifndef CONFIG_CMDLINE_FORCE static int __init parse_tag_cmdline(const struct tag *tag) { +#ifndef CONFIG_CMDLINE_FORCE strlcpy(default_command_line, tag->u.cmdline.cmdline, COMMAND_LINE_SIZE); +#else + pr_warning("Ignoring tag cmdline (using the default kernel command line)\n"); +#endif /* CONFIG_CMDLINE_FORCE */ return 0; } __tagtable(ATAG_CMDLINE, parse_tag_cmdline); -#endif /* CONFIG_CMDLINE_FORCE */ /* * Scan the tag table for this tag, and call its parse function. @@ -857,7 +855,7 @@ void __init setup_arch(char **cmdline_p) arm_memblock_init(&meminfo, mdesc); paging_init(mdesc); - request_standard_resources(&meminfo, mdesc); + request_standard_resources(mdesc); #ifdef CONFIG_SMP if (is_smp()) diff --git a/arch/arm/kernel/smp_twd.c b/arch/arm/kernel/smp_twd.c index dd79074..fd91566 100644 --- a/arch/arm/kernel/smp_twd.c +++ b/arch/arm/kernel/smp_twd.c @@ -114,7 +114,7 @@ static void __cpuinit twd_calibrate_rate(void) twd_timer_rate = (0xFFFFFFFFU - count) * (HZ / 5); printk("%lu.%02luMHz.\n", twd_timer_rate / 1000000, - (twd_timer_rate / 100000) % 100); + (twd_timer_rate / 1000000) % 100); } load = twd_timer_rate / HZ; diff --git a/arch/arm/kernel/stacktrace.c b/arch/arm/kernel/stacktrace.c index c2e112e..381d23a 100644 --- a/arch/arm/kernel/stacktrace.c +++ b/arch/arm/kernel/stacktrace.c @@ -94,10 +94,13 @@ void save_stack_trace_tsk(struct task_struct *tsk, struct stack_trace *trace) if (tsk != current) { #ifdef CONFIG_SMP /* - * What guarantees do we have here that 'tsk' - * is not running on another CPU? + * What guarantees do we have here that 'tsk' is not + * running on another CPU? For now, ignore it as we + * can't guarantee we won't explode. */ - BUG(); + if (trace->nr_entries < trace->max_entries) + trace->entries[trace->nr_entries++] = ULONG_MAX; + return; #else data.no_sched_functions = 1; frame.fp = thread_saved_fp(tsk); diff --git a/arch/arm/kernel/time.c b/arch/arm/kernel/time.c index f1e2eb1..3d76bf2 100644 --- a/arch/arm/kernel/time.c +++ b/arch/arm/kernel/time.c @@ -29,6 +29,7 @@ #include <asm/leds.h> #include <asm/thread_info.h> +#include <asm/sched_clock.h> #include <asm/stacktrace.h> #include <asm/mach/arch.h> #include <asm/mach/time.h> @@ -163,5 +164,8 @@ void __init time_init(void) { system_timer = machine_desc->timer; system_timer->init(); +#ifdef CONFIG_HAVE_SCHED_CLOCK + sched_clock_postinit(); +#endif } diff --git a/arch/arm/lib/delay.S b/arch/arm/lib/delay.S index 8d6a876..3c9a05c 100644 --- a/arch/arm/lib/delay.S +++ b/arch/arm/lib/delay.S @@ -25,11 +25,15 @@ ENTRY(__udelay) ldr r2, .LC1 mul r0, r2, r0 ENTRY(__const_udelay) @ 0 <= r0 <= 0x7fffff06 + mov r1, #-1 ldr r2, .LC0 ldr r2, [r2] @ max = 0x01ffffff + add r0, r0, r1, lsr #32-14 mov r0, r0, lsr #14 @ max = 0x0001ffff + add r2, r2, r1, lsr #32-10 mov r2, r2, lsr #10 @ max = 0x00007fff mul r0, r2, r0 @ max = 2^32-1 + add r0, r0, r1, lsr #32-6 movs r0, r0, lsr #6 moveq pc, lr diff --git a/arch/arm/mach-aaec2000/core.c b/arch/arm/mach-aaec2000/core.c index 3ef6833..f8465bd 100644 --- a/arch/arm/mach-aaec2000/core.c +++ b/arch/arm/mach-aaec2000/core.c @@ -68,25 +68,25 @@ void __init aaec2000_map_io(void) /* * Interrupt handling routines */ -static void aaec2000_int_ack(unsigned int irq) +static void aaec2000_int_ack(struct irq_data *d) { - IRQ_INTSR = 1 << irq; + IRQ_INTSR = 1 << d->irq; } -static void aaec2000_int_mask(unsigned int irq) +static void aaec2000_int_mask(struct irq_data *d) { - IRQ_INTENC |= (1 << irq); + IRQ_INTENC |= (1 << d->irq); } -static void aaec2000_int_unmask(unsigned int irq) +static void aaec2000_int_unmask(struct irq_data *d) { - IRQ_INTENS |= (1 << irq); + IRQ_INTENS |= (1 << d->irq); } static struct irq_chip aaec2000_irq_chip = { - .ack = aaec2000_int_ack, - .mask = aaec2000_int_mask, - .unmask = aaec2000_int_unmask, + .irq_ack = aaec2000_int_ack, + .irq_mask = aaec2000_int_mask, + .irq_unmask = aaec2000_int_unmask, }; void __init aaec2000_init_irq(void) diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index c015b68..1939023 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig @@ -362,6 +362,12 @@ config MACH_CPU9G20 Select this if you are using a Eukrea Electromatique's CPU9G20 Board <http://www.eukrea.com/> +config MACH_ACMENETUSFOXG20 + bool "Acme Systems srl FOX Board G20" + help + Select this if you are using Acme Systems + FOX Board G20 <http://www.acmesystems.it> + config MACH_PORTUXG20 bool "taskit PortuxG20" help @@ -381,6 +387,13 @@ config MACH_PCONTROL_G20 Select this if you are using taskit's Stamp9G20 CPU module on this carrier board, beeing the decentralized unit of a building automation system; featuring nvram, eth-switch, iso-rs485, display, io + +config MACH_GSIA18S + bool "GS_IA18_S board" + help + This enables support for the GS_IA18_S board + produced by GeoSIG Ltd company. This is an internet accelerograph. + <http://www.geosig.com> endif if (ARCH_AT91SAM9260 || ARCH_AT91SAM9G20) diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile index d13add7..a83835e 100644 --- a/arch/arm/mach-at91/Makefile +++ b/arch/arm/mach-at91/Makefile @@ -63,9 +63,11 @@ obj-$(CONFIG_MACH_AT91SAM9RLEK) += board-sam9rlek.o # AT91SAM9G20 board-specific support obj-$(CONFIG_MACH_AT91SAM9G20EK) += board-sam9g20ek.o obj-$(CONFIG_MACH_CPU9G20) += board-cpu9krea.o +obj-$(CONFIG_MACH_ACMENETUSFOXG20) += board-foxg20.o obj-$(CONFIG_MACH_STAMP9G20) += board-stamp9g20.o obj-$(CONFIG_MACH_PORTUXG20) += board-stamp9g20.o obj-$(CONFIG_MACH_PCONTROL_G20) += board-pcontrol-g20.o board-stamp9g20.o +obj-$(CONFIG_MACH_GSIA18S) += board-gsia18s.o board-stamp9g20.o # AT91SAM9260/AT91SAM9G20 board-specific support obj-$(CONFIG_MACH_SNAPPER_9260) += board-snapper9260.o diff --git a/arch/arm/mach-at91/board-foxg20.c b/arch/arm/mach-at91/board-foxg20.c new file mode 100644 index 0000000..dfc7dfe --- /dev/null +++ b/arch/arm/mach-at91/board-foxg20.c @@ -0,0 +1,274 @@ +/* + * Copyright (C) 2005 SAN People + * Copyright (C) 2008 Atmel + * Copyright (C) 2010 Lee McLoughlin - lee@lmmrtech.com + * Copyright (C) 2010 Sergio Tanzilli - tanzilli@acmesystems.it + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#include <linux/types.h> +#include <linux/init.h> +#include <linux/mm.h> +#include <linux/module.h> +#include <linux/platform_device.h> +#include <linux/spi/spi.h> +#include <linux/spi/at73c213.h> +#include <linux/gpio.h> +#include <linux/gpio_keys.h> +#include <linux/input.h> +#include <linux/clk.h> +#include <linux/w1-gpio.h> + +#include <mach/hardware.h> +#include <asm/setup.h> +#include <asm/mach-types.h> +#include <asm/irq.h> + +#include <asm/mach/arch.h> +#include <asm/mach/map.h> +#include <asm/mach/irq.h> + +#include <mach/board.h> +#include <mach/at91sam9_smc.h> + +#include "sam9_smc.h" +#include "generic.h" + +/* + * The FOX Board G20 hardware comes as the "Netus G20" board with + * just the cpu, ram, dataflash and two header connectors. + * This is plugged into the FOX Board which provides the ethernet, + * usb, rtc, leds, switch, ... + * + * For more info visit: http://www.acmesystems.it/foxg20 + */ + + +static void __init foxg20_map_io(void) +{ + /* Initialize processor: 18.432 MHz crystal */ + at91sam9260_initialize(18432000); + + /* DBGU on ttyS0. (Rx & Tx only) */ + at91_register_uart(0, 0, 0); + + /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */ + at91_register_uart(AT91SAM9260_ID_US0, 1, + ATMEL_UART_CTS + | ATMEL_UART_RTS + | ATMEL_UART_DTR + | ATMEL_UART_DSR + | ATMEL_UART_DCD + | ATMEL_UART_RI); + + /* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */ + at91_register_uart(AT91SAM9260_ID_US1, 2, + ATMEL_UART_CTS + | ATMEL_UART_RTS); + + /* USART2 on ttyS3. (Rx & Tx only) */ + at91_register_uart(AT91SAM9260_ID_US2, 3, 0); + + /* USART3 on ttyS4. (Rx, Tx, RTS, CTS) */ + at91_register_uart(AT91SAM9260_ID_US3, 4, + ATMEL_UART_CTS + | ATMEL_UART_RTS); + + /* USART4 on ttyS5. (Rx & Tx only) */ + at91_register_uart(AT91SAM9260_ID_US4, 5, 0); + + /* USART5 on ttyS6. (Rx & Tx only) */ + at91_register_uart(AT91SAM9260_ID_US5, 6, 0); + + /* set serial console to ttyS0 (ie, DBGU) */ + at91_set_serial_console(0); + + /* Set the internal pull-up resistor on DRXD */ + at91_set_A_periph(AT91_PIN_PB14, 1); + +} + +static void __init foxg20_init_irq(void) +{ + at91sam9260_init_interrupts(NULL); +} + + +/* + * USB Host port + */ +static struct at91_usbh_data __initdata foxg20_usbh_data = { + .ports = 2, +}; + +/* + * USB Device port + */ +static struct at91_udc_data __initdata foxg20_udc_data = { + .vbus_pin = AT91_PIN_PC6, + .pullup_pin = 0, /* pull-up driven by UDC */ +}; + + +/* + * SPI devices. + */ +static struct spi_board_info foxg20_spi_devices[] = { +#if !defined(CONFIG_MMC_AT91) + { + .modalias = "mtd_dataflash", + .chip_select = 1, + .max_speed_hz = 15 * 1000 * 1000, + .bus_num = 0, + }, +#endif +}; + + +/* + * MACB Ethernet device + */ +static struct at91_eth_data __initdata foxg20_macb_data = { + .phy_irq_pin = AT91_PIN_PA7, + .is_rmii = 1, +}; + +/* + * MCI (SD/MMC) + * det_pin, wp_pin and vcc_pin are not connected + */ +static struct at91_mmc_data __initdata foxg20_mmc_data = { + .slot_b = 1, + .wire4 = 1, +}; + + +/* + * LEDs + */ +static struct gpio_led foxg20_leds[] = { + { /* user led, red */ + .name = "user_led", + .gpio = AT91_PIN_PC7, + .active_low = 0, + .default_trigger = "heartbeat", + }, +}; + + +/* + * GPIO Buttons + */ +#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) +static struct gpio_keys_button foxg20_buttons[] = { + { + .gpio = AT91_PIN_PC4, + .code = BTN_1, + .desc = "Button 1", + .active_low = 1, + .wakeup = 1, + }, +}; + +static struct gpio_keys_platform_data foxg20_button_data = { + .buttons = foxg20_buttons, + .nbuttons = ARRAY_SIZE(foxg20_buttons), +}; + +static struct platform_device foxg20_button_device = { + .name = "gpio-keys", + .id = -1, + .num_resources = 0, + .dev = { + .platform_data = &foxg20_button_data, + } +}; + +static void __init foxg20_add_device_buttons(void) +{ + at91_set_gpio_input(AT91_PIN_PC4, 1); /* btn1 */ + at91_set_deglitch(AT91_PIN_PC4, 1); + + platform_device_register(&foxg20_button_device); +} +#else +static void __init foxg20_add_device_buttons(void) {} +#endif + + +#if defined(CONFIG_W1_MASTER_GPIO) || defined(CONFIG_W1_MASTER_GPIO_MODULE) +static struct w1_gpio_platform_data w1_gpio_pdata = { + /* If you choose to use a pin other than PB16 it needs to be 3.3V */ + .pin = AT91_PIN_PB16, + .is_open_drain = 1, +}; + +static struct platform_device w1_device = { + .name = "w1-gpio", + .id = -1, + .dev.platform_data = &w1_gpio_pdata, +}; + +static void __init at91_add_device_w1(void) +{ + at91_set_GPIO_periph(w1_gpio_pdata.pin, 1); + at91_set_multi_drive(w1_gpio_pdata.pin, 1); + platform_device_register(&w1_device); +} + +#endif + + +static struct i2c_board_info __initdata foxg20_i2c_devices[] = { + { + I2C_BOARD_INFO("24c512", 0x50), + }, +}; + + +static void __init foxg20_board_init(void) +{ + /* Serial */ + at91_add_device_serial(); + /* USB Host */ + at91_add_device_usbh(&foxg20_usbh_data); + /* USB Device */ + at91_add_device_udc(&foxg20_udc_data); + /* SPI */ + at91_add_device_spi(foxg20_spi_devices, ARRAY_SIZE(foxg20_spi_devices)); + /* Ethernet */ + at91_add_device_eth(&foxg20_macb_data); + /* MMC */ + at91_add_device_mmc(0, &foxg20_mmc_data); + /* I2C */ + at91_add_device_i2c(foxg20_i2c_devices, ARRAY_SIZE(foxg20_i2c_devices)); + /* LEDs */ + at91_gpio_leds(foxg20_leds, ARRAY_SIZE(foxg20_leds)); + /* Push Buttons */ + foxg20_add_device_buttons(); +#if defined(CONFIG_W1_MASTER_GPIO) || defined(CONFIG_W1_MASTER_GPIO_MODULE) + at91_add_device_w1(); +#endif +} + +MACHINE_START(ACMENETUSFOXG20, "Acme Systems srl FOX Board G20") + /* Maintainer: Sergio Tanzilli */ + .boot_params = AT91_SDRAM_BASE + 0x100, + .timer = &at91sam926x_timer, + .map_io = foxg20_map_io, + .init_irq = foxg20_init_irq, + .init_machine = foxg20_board_init, +MACHINE_END diff --git a/arch/arm/mach-at91/board-gsia18s.c b/arch/arm/mach-at91/board-gsia18s.c new file mode 100644 index 0000000..bc28136 --- /dev/null +++ b/arch/arm/mach-at91/board-gsia18s.c @@ -0,0 +1,584 @@ +/* + * Copyright (C) 2010 Christian Glindkamp <christian.glindkamp@taskit.de> + * taskit GmbH + * 2010 Igor Plyatov <plyatov@gmail.com> + * GeoSIG Ltd + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#include <linux/platform_device.h> +#include <linux/gpio.h> +#include <linux/w1-gpio.h> +#include <linux/i2c.h> +#include <linux/i2c/pcf857x.h> +#include <linux/gpio_keys.h> +#include <linux/input.h> + +#include <asm/mach-types.h> +#include <asm/mach/arch.h> + +#include <mach/board.h> +#include <mach/at91sam9_smc.h> +#include <mach/gsia18s.h> +#include <mach/stamp9g20.h> + +#include "sam9_smc.h" +#include "generic.h" + +static void __init gsia18s_map_io(void) +{ + stamp9g20_map_io(); + + /* + * USART0 on ttyS1 (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI). + * Used for Internal Analog Modem. + */ + at91_register_uart(AT91SAM9260_ID_US0, 1, + ATMEL_UART_CTS | ATMEL_UART_RTS | + ATMEL_UART_DTR | ATMEL_UART_DSR | + ATMEL_UART_DCD | ATMEL_UART_RI); + /* + * USART1 on ttyS2 (Rx, Tx, CTS, RTS). + * Used for GPS or WiFi or Data stream. + */ + at91_register_uart(AT91SAM9260_ID_US1, 2, + ATMEL_UART_CTS | ATMEL_UART_RTS); + /* + * USART2 on ttyS3 (Rx, Tx, CTS, RTS). + * Used for External Modem. + */ + at91_register_uart(AT91SAM9260_ID_US2, 3, + ATMEL_UART_CTS | ATMEL_UART_RTS); + /* + * USART3 on ttyS4 (Rx, Tx, RTS). + * Used for RS-485. + */ + at91_register_uart(AT91SAM9260_ID_US3, 4, ATMEL_UART_RTS); + + /* + * USART4 on ttyS5 (Rx, Tx). + * Used for TRX433 Radio Module. + */ + at91_register_uart(AT91SAM9260_ID_US4, 5, 0); +} + +static void __init init_irq(void) +{ + at91sam9260_init_interrupts(NULL); +} + +/* + * Two USB Host ports + */ +static struct at91_usbh_data __initdata usbh_data = { + .ports = 2, +}; + +/* + * USB Device port + */ +static struct at91_udc_data __initdata udc_data = { + .vbus_pin = AT91_PIN_PA22, + .pullup_pin = 0, /* pull-up driven by UDC */ +}; + +/* + * MACB Ethernet device + */ +static struct at91_eth_data __initdata macb_data = { + .phy_irq_pin = AT91_PIN_PA28, + .is_rmii = 1, +}; + +/* + * LEDs and GPOs + */ +static struct gpio_led gpio_leds[] = { + { + .name = "gpo:spi1reset", + .gpio = AT91_PIN_PC1, + .active_low = 0, + .default_trigger = "none", + .default_state = LEDS_GPIO_DEFSTATE_OFF, + }, + { + .name = "gpo:trig_net_out", + .gpio = AT91_PIN_PB20, + .active_low = 0, + .default_trigger = "none", + .default_state = LEDS_GPIO_DEFSTATE_OFF, + }, + { + .name = "gpo:trig_net_dir", + .gpio = AT91_PIN_PB19, + .active_low = 0, + .default_trigger = "none", + .default_state = LEDS_GPIO_DEFSTATE_OFF, + }, + { + .name = "gpo:charge_dis", + .gpio = AT91_PIN_PC2, + .active_low = 0, + .default_trigger = "none", + .default_state = LEDS_GPIO_DEFSTATE_OFF, + }, + { + .name = "led:event", + .gpio = AT91_PIN_PB17, + .active_low = 1, + .default_trigger = "none", + .default_state = LEDS_GPIO_DEFSTATE_OFF, + }, + { + .name = "led:lan", + .gpio = AT91_PIN_PB18, + .active_low = 1, + .default_trigger = "none", + .default_state = LEDS_GPIO_DEFSTATE_OFF, + }, + { + .name = "led:error", + .gpio = AT91_PIN_PB16, + .active_low = 1, + .default_trigger = "none", + .default_state = LEDS_GPIO_DEFSTATE_ON, + } +}; + +static struct gpio_led_platform_data gpio_led_info = { + .leds = gpio_leds, + .num_leds = ARRAY_SIZE(gpio_leds), +}; + +static struct platform_device leds = { + .name = "leds-gpio", + .id = 0, + .dev = { + .platform_data = &gpio_led_info, + } +}; + +static void __init gsia18s_leds_init(void) +{ + platform_device_register(&leds); +} + +/* PCF8574 0x20 GPIO - U1 on the GS_IA18-CB_V3 board */ +static struct gpio_led pcf_gpio_leds1[] = { + { /* bit 0 */ + .name = "gpo:hdc_power", + .gpio = PCF_GPIO_HDC_POWER, + .active_low = 0, + .default_trigger = "none", + .default_state = LEDS_GPIO_DEFSTATE_OFF, + }, + { /* bit 1 */ + .name = "gpo:wifi_setup", + .gpio = PCF_GPIO_WIFI_SETUP, + .active_low = 1, + .default_trigger = "none", + .default_state = LEDS_GPIO_DEFSTATE_OFF, + }, + { /* bit 2 */ + .name = "gpo:wifi_enable", + .gpio = PCF_GPIO_WIFI_ENABLE, + .active_low = 1, + .default_trigger = "none", + .default_state = LEDS_GPIO_DEFSTATE_OFF, + }, + { /* bit 3 */ + .name = "gpo:wifi_reset", + .gpio = PCF_GPIO_WIFI_RESET, + .active_low = 1, + .default_trigger = "none", + .default_state = LEDS_GPIO_DEFSTATE_ON, + }, + /* bit 4 used as GPI */ + { /* bit 5 */ + .name = "gpo:gps_setup", + .gpio = PCF_GPIO_GPS_SETUP, + .active_low = 1, + .default_trigger = "none", + .default_state = LEDS_GPIO_DEFSTATE_OFF, + }, + { /* bit 6 */ + .name = "gpo:gps_standby", + .gpio = PCF_GPIO_GPS_STANDBY, + .active_low = 0, + .default_trigger = "none", + .default_state = LEDS_GPIO_DEFSTATE_ON, + }, + { /* bit 7 */ + .name = "gpo:gps_power", + .gpio = PCF_GPIO_GPS_POWER, + .active_low = 0, + .default_trigger = "none", + .default_state = LEDS_GPIO_DEFSTATE_OFF, + } +}; + +static struct gpio_led_platform_data pcf_gpio_led_info1 = { + .leds = pcf_gpio_leds1, + .num_leds = ARRAY_SIZE(pcf_gpio_leds1), +}; + +static struct platform_device pcf_leds1 = { + .name = "leds-gpio", /* GS_IA18-CB_board */ + .id = 1, + .dev = { + .platform_data = &pcf_gpio_led_info1, + } +}; + +/* PCF8574 0x22 GPIO - U1 on the GS_2G_OPT1-A_V0 board (Alarm) */ +static struct gpio_led pcf_gpio_leds2[] = { + { /* bit 0 */ + .name = "gpo:alarm_1", + .gpio = PCF_GPIO_ALARM1, + .active_low = 1, + .default_trigger = "none", + .default_state = LEDS_GPIO_DEFSTATE_OFF, + }, + { /* bit 1 */ + .name = "gpo:alarm_2", + .gpio = PCF_GPIO_ALARM2, + .active_low = 1, + .default_trigger = "none", + .default_state = LEDS_GPIO_DEFSTATE_OFF, + }, + { /* bit 2 */ + .name = "gpo:alarm_3", + .gpio = PCF_GPIO_ALARM3, + .active_low = 1, + .default_trigger = "none", + .default_state = LEDS_GPIO_DEFSTATE_OFF, + }, + { /* bit 3 */ + .name = "gpo:alarm_4", + .gpio = PCF_GPIO_ALARM4, + .active_low = 1, + .default_trigger = "none", + .default_state = LEDS_GPIO_DEFSTATE_OFF, + }, + /* bits 4, 5, 6 not used */ + { /* bit 7 */ + .name = "gpo:alarm_v_relay_on", + .gpio = PCF_GPIO_ALARM_V_RELAY_ON, + .active_low = 0, + .default_trigger = "none", + .default_state = LEDS_GPIO_DEFSTATE_OFF, + }, +}; + +static struct gpio_led_platform_data pcf_gpio_led_info2 = { + .leds = pcf_gpio_leds2, + .num_leds = ARRAY_SIZE(pcf_gpio_leds2), +}; + +static struct platform_device pcf_leds2 = { + .name = "leds-gpio", + .id = 2, + .dev = { + .platform_data = &pcf_gpio_led_info2, + } +}; + +/* PCF8574 0x24 GPIO U1 on the GS_2G-OPT23-A_V0 board (Modem) */ +static struct gpio_led pcf_gpio_leds3[] = { + { /* bit 0 */ + .name = "gpo:modem_power", + .gpio = PCF_GPIO_MODEM_POWER, + .active_low = 1, + .default_trigger = "none", + .default_state = LEDS_GPIO_DEFSTATE_OFF, + }, + /* bits 1 and 2 not used */ + { /* bit 3 */ + .name = "gpo:modem_reset", + .gpio = PCF_GPIO_MODEM_RESET, + .active_low = 1, + .default_trigger = "none", + .default_state = LEDS_GPIO_DEFSTATE_ON, + }, + /* bits 4, 5 and 6 not used */ + { /* bit 7 */ + .name = "gpo:trx_reset", + .gpio = PCF_GPIO_TRX_RESET, + .active_low = 1, + .default_trigger = "none", + .default_state = LEDS_GPIO_DEFSTATE_ON, + } +}; + +static struct gpio_led_platform_data pcf_gpio_led_info3 = { + .leds = pcf_gpio_leds3, + .num_leds = ARRAY_SIZE(pcf_gpio_leds3), +}; + +static struct platform_device pcf_leds3 = { + .name = "leds-gpio", + .id = 3, + .dev = { + .platform_data = &pcf_gpio_led_info3, + } +}; + +static void __init gsia18s_pcf_leds_init(void) +{ + platform_device_register(&pcf_leds1); + platform_device_register(&pcf_leds2); + platform_device_register(&pcf_leds3); +} + +/* + * SPI busses. + */ +static struct spi_board_info gsia18s_spi_devices[] = { + { /* User accessible spi0, cs0 used for communication with MSP RTC */ + .modalias = "spidev", + .bus_num = 0, + .chip_select = 0, + .max_speed_hz = 580000, + .mode = SPI_MODE_1, + }, + { /* User accessible spi1, cs0 used for communication with int. DSP */ + .modalias = "spidev", + .bus_num = 1, + .chip_select = 0, + .max_speed_hz = 5600000, + .mode = SPI_MODE_0, + }, + { /* User accessible spi1, cs1 used for communication with ext. DSP */ + .modalias = "spidev", + .bus_num = 1, + .chip_select = 1, + .max_speed_hz = 5600000, + .mode = SPI_MODE_0, + }, + { /* User accessible spi1, cs2 used for communication with ext. DSP */ + .modalias = "spidev", + .bus_num = 1, + .chip_select = 2, + .max_speed_hz = 5600000, + .mode = SPI_MODE_0, + }, + { /* User accessible spi1, cs3 used for communication with ext. DSP */ + .modalias = "spidev", + .bus_num = 1, + .chip_select = 3, + .max_speed_hz = 5600000, + .mode = SPI_MODE_0, + } +}; + +/* + * GPI Buttons + */ +static struct gpio_keys_button buttons[] = { + { + .gpio = GPIO_TRIG_NET_IN, + .code = BTN_1, + .desc = "TRIG_NET_IN", + .type = EV_KEY, + .active_low = 0, + .wakeup = 1, + }, + { /* SW80 on the GS_IA18_S-MN board*/ + .gpio = GPIO_CARD_UNMOUNT_0, + .code = BTN_2, + .desc = "Card umount 0", + .type = EV_KEY, + .active_low = 1, + .wakeup = 1, + }, + { /* SW79 on the GS_IA18_S-MN board*/ + .gpio = GPIO_CARD_UNMOUNT_1, + .code = BTN_3, + .desc = "Card umount 1", + .type = EV_KEY, + .active_low = 1, + .wakeup = 1, + }, + { /* SW280 on the GS_IA18-CB board*/ + .gpio = GPIO_KEY_POWER, + .code = KEY_POWER, + .desc = "Power Off Button", + .type = EV_KEY, + .active_low = 0, + .wakeup = 1, + } +}; + +static struct gpio_keys_platform_data button_data = { + .buttons = buttons, + .nbuttons = ARRAY_SIZE(buttons), +}; + +static struct platform_device button_device = { + .name = "gpio-keys", + .id = -1, + .num_resources = 0, + .dev = { + .platform_data = &button_data, + } +}; + +static void __init gsia18s_add_device_buttons(void) +{ + at91_set_gpio_input(GPIO_TRIG_NET_IN, 1); + at91_set_deglitch(GPIO_TRIG_NET_IN, 1); + at91_set_gpio_input(GPIO_CARD_UNMOUNT_0, 1); + at91_set_deglitch(GPIO_CARD_UNMOUNT_0, 1); + at91_set_gpio_input(GPIO_CARD_UNMOUNT_1, 1); + at91_set_deglitch(GPIO_CARD_UNMOUNT_1, 1); + at91_set_gpio_input(GPIO_KEY_POWER, 0); + at91_set_deglitch(GPIO_KEY_POWER, 1); + + platform_device_register(&button_device); +} + +/* + * I2C + */ +static int pcf8574x_0x20_setup(struct i2c_client *client, int gpio, + unsigned int ngpio, void *context) +{ + int status; + + status = gpio_request(gpio + PCF_GPIO_ETH_DETECT, "eth_det"); + if (status < 0) { + pr_err("error: can't request GPIO%d\n", + gpio + PCF_GPIO_ETH_DETECT); + return status; + } + status = gpio_direction_input(gpio + PCF_GPIO_ETH_DETECT); + if (status < 0) { + pr_err("error: can't setup GPIO%d as input\n", + gpio + PCF_GPIO_ETH_DETECT); + return status; + } + status = gpio_export(gpio + PCF_GPIO_ETH_DETECT, false); + if (status < 0) { + pr_err("error: can't export GPIO%d\n", + gpio + PCF_GPIO_ETH_DETECT); + return status; + } + status = gpio_sysfs_set_active_low(gpio + PCF_GPIO_ETH_DETECT, 1); + if (status < 0) { + pr_err("error: gpio_sysfs_set active_low(GPIO%d, 1)\n", + gpio + PCF_GPIO_ETH_DETECT); + return status; + } + + return 0; +} + +static int pcf8574x_0x20_teardown(struct i2c_client *client, int gpio, + unsigned ngpio, void *context) +{ + gpio_free(gpio + PCF_GPIO_ETH_DETECT); + return 0; +} + +static struct pcf857x_platform_data pcf20_pdata = { + .gpio_base = GS_IA18_S_PCF_GPIO_BASE0, + .n_latch = (1 << 4), + .setup = pcf8574x_0x20_setup, + .teardown = pcf8574x_0x20_teardown, +}; + +static struct pcf857x_platform_data pcf22_pdata = { + .gpio_base = GS_IA18_S_PCF_GPIO_BASE1, +}; + +static struct pcf857x_platform_data pcf24_pdata = { + .gpio_base = GS_IA18_S_PCF_GPIO_BASE2, +}; + +static struct i2c_board_info __initdata gsia18s_i2c_devices[] = { + { /* U1 on the GS_IA18-CB_V3 board */ + I2C_BOARD_INFO("pcf8574", 0x20), + .platform_data = &pcf20_pdata, + }, + { /* U1 on the GS_2G_OPT1-A_V0 board (Alarm) */ + I2C_BOARD_INFO("pcf8574", 0x22), + .platform_data = &pcf22_pdata, + }, + { /* U1 on the GS_2G-OPT23-A_V0 board (Modem) */ + I2C_BOARD_INFO("pcf8574", 0x24), + .platform_data = &pcf24_pdata, + }, + { /* U161 on the GS_IA18_S-MN board */ + I2C_BOARD_INFO("24c1024", 0x50), + }, + { /* U162 on the GS_IA18_S-MN board */ + I2C_BOARD_INFO("24c01", 0x53), + }, +}; + +/* + * Compact Flash + */ +static struct at91_cf_data __initdata gsia18s_cf1_data = { + .irq_pin = AT91_PIN_PA27, + .det_pin = AT91_PIN_PB30, + .rst_pin = AT91_PIN_PB31, + .chipselect = 5, + .flags = AT91_CF_TRUE_IDE, +}; + +/* Power Off by RTC */ +static void gsia18s_power_off(void) +{ + pr_notice("Power supply will be switched off automatically now or after 60 seconds without ArmDAS.\n"); + at91_set_gpio_output(AT91_PIN_PA25, 1); + /* Spin to death... */ + while (1) + ; +} + +static int __init gsia18s_power_off_init(void) +{ + pm_power_off = gsia18s_power_off; + return 0; +} + +/* ---------------------------------------------------------------------------*/ + +static void __init gsia18s_board_init(void) +{ + stamp9g20_board_init(); + at91_add_device_usbh(&usbh_data); + at91_add_device_udc(&udc_data); + at91_add_device_eth(&macb_data); + gsia18s_leds_init(); + gsia18s_pcf_leds_init(); + gsia18s_add_device_buttons(); + at91_add_device_i2c(gsia18s_i2c_devices, + ARRAY_SIZE(gsia18s_i2c_devices)); + at91_add_device_cf(&gsia18s_cf1_data); + at91_add_device_spi(gsia18s_spi_devices, + ARRAY_SIZE(gsia18s_spi_devices)); + gsia18s_power_off_init(); +} + +MACHINE_START(GSIA18S, "GS_IA18_S") + .boot_params = AT91_SDRAM_BASE + 0x100, + .timer = &at91sam926x_timer, + .map_io = gsia18s_map_io, + .init_irq = init_irq, + .init_machine = gsia18s_board_init, +MACHINE_END diff --git a/arch/arm/mach-at91/board-sam9m10g45ek.c b/arch/arm/mach-at91/board-sam9m10g45ek.c index 86ff4b5..6c999db 100644 --- a/arch/arm/mach-at91/board-sam9m10g45ek.c +++ b/arch/arm/mach-at91/board-sam9m10g45ek.c @@ -37,7 +37,6 @@ #include <asm/mach/map.h> #include <asm/mach/irq.h> -#include <mach/hardware.h> #include <mach/board.h> #include <mach/gpio.h> #include <mach/at91sam9_smc.h> diff --git a/arch/arm/mach-at91/gpio.c b/arch/arm/mach-at91/gpio.c index ae4772e..af818a2 100644 --- a/arch/arm/mach-at91/gpio.c +++ b/arch/arm/mach-at91/gpio.c @@ -274,10 +274,10 @@ EXPORT_SYMBOL(at91_get_gpio_value); static u32 wakeups[MAX_GPIO_BANKS]; static u32 backups[MAX_GPIO_BANKS]; -static int gpio_irq_set_wake(unsigned pin, unsigned state) +static int gpio_irq_set_wake(struct irq_data *d, unsigned state) { - unsigned mask = pin_to_mask(pin); - unsigned bank = (pin - PIN_BASE) / 32; + unsigned mask = pin_to_mask(d->irq); + unsigned bank = (d->irq - PIN_BASE) / 32; if (unlikely(bank >= MAX_GPIO_BANKS)) return -EINVAL; @@ -344,25 +344,25 @@ void at91_gpio_resume(void) * IRQ0..IRQ6 should be configurable, e.g. level vs edge triggering. */ -static void gpio_irq_mask(unsigned pin) +static void gpio_irq_mask(struct irq_data *d) { - void __iomem *pio = pin_to_controller(pin); - unsigned mask = pin_to_mask(pin); + void __iomem *pio = pin_to_controller(d->irq); + unsigned mask = pin_to_mask(d->irq); if (pio) __raw_writel(mask, pio + PIO_IDR); } -static void gpio_irq_unmask(unsigned pin) +static void gpio_irq_unmask(struct irq_data *d) { - void __iomem *pio = pin_to_controller(pin); - unsigned mask = pin_to_mask(pin); + void __iomem *pio = pin_to_controller(d->irq); + unsigned mask = pin_to_mask(d->irq); if (pio) __raw_writel(mask, pio + PIO_IER); } -static int gpio_irq_type(unsigned pin, unsigned type) +static int gpio_irq_type(struct irq_data *d, unsigned type) { switch (type) { case IRQ_TYPE_NONE: @@ -375,10 +375,10 @@ static int gpio_irq_type(unsigned pin, unsigned type) static struct irq_chip gpio_irqchip = { .name = "GPIO", - .mask = gpio_irq_mask, - .unmask = gpio_irq_unmask, - .set_type = gpio_irq_type, - .set_wake = gpio_irq_set_wake, + .irq_mask = gpio_irq_mask, + .irq_unmask = gpio_irq_unmask, + .irq_set_type = gpio_irq_type, + .irq_set_wake = gpio_irq_set_wake, }; static void gpio_irq_handler(unsigned irq, struct irq_desc *desc) @@ -393,7 +393,7 @@ static void gpio_irq_handler(unsigned irq, struct irq_desc *desc) pio = at91_gpio->regbase; /* temporarily mask (level sensitive) parent IRQ */ - desc->chip->ack(irq); + desc->irq_data.chip->irq_ack(&desc->irq_data); for (;;) { /* Reading ISR acks pending (edge triggered) GPIO interrupts. * When there none are pending, we're finished unless we need @@ -419,7 +419,7 @@ static void gpio_irq_handler(unsigned irq, struct irq_desc *desc) * another IRQ must be generated before it actually gets * here to be disabled on the GPIO controller. */ - gpio_irq_mask(pin); + gpio_irq_mask(irq_get_irq_data(pin)); } else generic_handle_irq(pin); @@ -429,7 +429,7 @@ static void gpio_irq_handler(unsigned irq, struct irq_desc *desc) isr >>= 1; } } - desc->chip->unmask(irq); + desc->irq_data.chip->irq_unmask(&desc->irq_data); /* now it may re-trigger */ } diff --git a/arch/arm/mach-at91/include/mach/gsia18s.h b/arch/arm/mach-at91/include/mach/gsia18s.h new file mode 100644 index 0000000..307c194 --- /dev/null +++ b/arch/arm/mach-at91/include/mach/gsia18s.h @@ -0,0 +1,33 @@ +/* Buttons */ +#define GPIO_TRIG_NET_IN AT91_PIN_PB21 +#define GPIO_CARD_UNMOUNT_0 AT91_PIN_PB13 +#define GPIO_CARD_UNMOUNT_1 AT91_PIN_PB12 +#define GPIO_KEY_POWER AT91_PIN_PA25 + +/* PCF8574 0x20 GPIO - U1 on the GS_IA18-CB_V3 board */ +#define GS_IA18_S_PCF_GPIO_BASE0 NR_BUILTIN_GPIO +#define PCF_GPIO_HDC_POWER (GS_IA18_S_PCF_GPIO_BASE0 + 0) +#define PCF_GPIO_WIFI_SETUP (GS_IA18_S_PCF_GPIO_BASE0 + 1) +#define PCF_GPIO_WIFI_ENABLE (GS_IA18_S_PCF_GPIO_BASE0 + 2) +#define PCF_GPIO_WIFI_RESET (GS_IA18_S_PCF_GPIO_BASE0 + 3) +#define PCF_GPIO_ETH_DETECT 4 /* this is a GPI */ +#define PCF_GPIO_GPS_SETUP (GS_IA18_S_PCF_GPIO_BASE0 + 5) +#define PCF_GPIO_GPS_STANDBY (GS_IA18_S_PCF_GPIO_BASE0 + 6) +#define PCF_GPIO_GPS_POWER (GS_IA18_S_PCF_GPIO_BASE0 + 7) + +/* PCF8574 0x22 GPIO - U1 on the GS_2G_OPT1-A_V0 board (Alarm) */ +#define GS_IA18_S_PCF_GPIO_BASE1 (GS_IA18_S_PCF_GPIO_BASE0 + 8) +#define PCF_GPIO_ALARM1 (GS_IA18_S_PCF_GPIO_BASE1 + 0) +#define PCF_GPIO_ALARM2 (GS_IA18_S_PCF_GPIO_BASE1 + 1) +#define PCF_GPIO_ALARM3 (GS_IA18_S_PCF_GPIO_BASE1 + 2) +#define PCF_GPIO_ALARM4 (GS_IA18_S_PCF_GPIO_BASE1 + 3) +/* bits 4, 5, 6 not used */ +#define PCF_GPIO_ALARM_V_RELAY_ON (GS_IA18_S_PCF_GPIO_BASE1 + 7) + +/* PCF8574 0x24 GPIO U1 on the GS_2G-OPT23-A_V0 board (Modem) */ +#define GS_IA18_S_PCF_GPIO_BASE2 (GS_IA18_S_PCF_GPIO_BASE1 + 8) +#define PCF_GPIO_MODEM_POWER (GS_IA18_S_PCF_GPIO_BASE2 + 0) +#define PCF_GPIO_MODEM_RESET (GS_IA18_S_PCF_GPIO_BASE2 + 3) +/* bits 1, 2, 4, 5 not used */ +#define PCF_GPIO_TRX_RESET (GS_IA18_S_PCF_GPIO_BASE2 + 6) +/* bit 7 not used */ diff --git a/arch/arm/mach-at91/irq.c b/arch/arm/mach-at91/irq.c index da3494a..b56d6b3a 100644 --- a/arch/arm/mach-at91/irq.c +++ b/arch/arm/mach-at91/irq.c @@ -34,23 +34,23 @@ #include <asm/mach/map.h> -static void at91_aic_mask_irq(unsigned int irq) +static void at91_aic_mask_irq(struct irq_data *d) { /* Disable interrupt on AIC */ - at91_sys_write(AT91_AIC_IDCR, 1 << irq); + at91_sys_write(AT91_AIC_IDCR, 1 << d->irq); } -static void at91_aic_unmask_irq(unsigned int irq) +static void at91_aic_unmask_irq(struct irq_data *d) { /* Enable interrupt on AIC */ - at91_sys_write(AT91_AIC_IECR, 1 << irq); + at91_sys_write(AT91_AIC_IECR, 1 << d->irq); } unsigned int at91_extern_irq; #define is_extern_irq(irq) ((1 << (irq)) & at91_extern_irq) -static int at91_aic_set_type(unsigned irq, unsigned type) +static int at91_aic_set_type(struct irq_data *d, unsigned type) { unsigned int smr, srctype; @@ -62,13 +62,13 @@ static int at91_aic_set_type(unsigned irq, unsigned type) srctype = AT91_AIC_SRCTYPE_RISING; break; case IRQ_TYPE_LEVEL_LOW: - if ((irq == AT91_ID_FIQ) || is_extern_irq(irq)) /* only supported on external interrupts */ + if ((d->irq == AT91_ID_FIQ) || is_extern_irq(d->irq)) /* only supported on external interrupts */ srctype = AT91_AIC_SRCTYPE_LOW; else return -EINVAL; break; case IRQ_TYPE_EDGE_FALLING: - if ((irq == AT91_ID_FIQ) || is_extern_irq(irq)) /* only supported on external interrupts */ + if ((d->irq == AT91_ID_FIQ) || is_extern_irq(d->irq)) /* only supported on external interrupts */ srctype = AT91_AIC_SRCTYPE_FALLING; else return -EINVAL; @@ -77,8 +77,8 @@ static int at91_aic_set_type(unsigned irq, unsigned type) return -EINVAL; } - smr = at91_sys_read(AT91_AIC_SMR(irq)) & ~AT91_AIC_SRCTYPE; - at91_sys_write(AT91_AIC_SMR(irq), smr | srctype); + smr = at91_sys_read(AT91_AIC_SMR(d->irq)) & ~AT91_AIC_SRCTYPE; + at91_sys_write(AT91_AIC_SMR(d->irq), smr | srctype); return 0; } @@ -87,15 +87,15 @@ static int at91_aic_set_type(unsigned irq, unsigned type) static u32 wakeups; static u32 backups; -static int at91_aic_set_wake(unsigned irq, unsigned value) +static int at91_aic_set_wake(struct irq_data *d, unsigned value) { - if (unlikely(irq >= 32)) + if (unlikely(d->irq >= 32)) return -EINVAL; if (value) - wakeups |= (1 << irq); + wakeups |= (1 << d->irq); else - wakeups &= ~(1 << irq); + wakeups &= ~(1 << d->irq); return 0; } @@ -119,11 +119,11 @@ void at91_irq_resume(void) static struct irq_chip at91_aic_chip = { .name = "AIC", - .ack = at91_aic_mask_irq, - .mask = at91_aic_mask_irq, - .unmask = at91_aic_unmask_irq, - .set_type = at91_aic_set_type, - .set_wake = at91_aic_set_wake, + .irq_ack = at91_aic_mask_irq, + .irq_mask = at91_aic_mask_irq, + .irq_unmask = at91_aic_unmask_irq, + .irq_set_type = at91_aic_set_type, + .irq_set_wake = at91_aic_set_wake, }; /* diff --git a/arch/arm/mach-bcmring/irq.c b/arch/arm/mach-bcmring/irq.c index e315263..84dcda0 100644 --- a/arch/arm/mach-bcmring/irq.c +++ b/arch/arm/mach-bcmring/irq.c @@ -30,61 +30,61 @@ #include <mach/csp/intcHw_reg.h> #include <mach/csp/mm_io.h> -static void bcmring_mask_irq0(unsigned int irq) +static void bcmring_mask_irq0(struct irq_data *d) { - writel(1 << (irq - IRQ_INTC0_START), + writel(1 << (d->irq - IRQ_INTC0_START), MM_IO_BASE_INTC0 + INTCHW_INTENCLEAR); } -static void bcmring_unmask_irq0(unsigned int irq) +static void bcmring_unmask_irq0(struct irq_data *d) { - writel(1 << (irq - IRQ_INTC0_START), + writel(1 << (d->irq - IRQ_INTC0_START), MM_IO_BASE_INTC0 + INTCHW_INTENABLE); } -static void bcmring_mask_irq1(unsigned int irq) +static void bcmring_mask_irq1(struct irq_data *d) { - writel(1 << (irq - IRQ_INTC1_START), + writel(1 << (d->irq - IRQ_INTC1_START), MM_IO_BASE_INTC1 + INTCHW_INTENCLEAR); } -static void bcmring_unmask_irq1(unsigned int irq) +static void bcmring_unmask_irq1(struct irq_data *d) { - writel(1 << (irq - IRQ_INTC1_START), + writel(1 << (d->irq - IRQ_INTC1_START), MM_IO_BASE_INTC1 + INTCHW_INTENABLE); } -static void bcmring_mask_irq2(unsigned int irq) +static void bcmring_mask_irq2(struct irq_data *d) { - writel(1 << (irq - IRQ_SINTC_START), + writel(1 << (d->irq - IRQ_SINTC_START), MM_IO_BASE_SINTC + INTCHW_INTENCLEAR); } -static void bcmring_unmask_irq2(unsigned int irq) +static void bcmring_unmask_irq2(struct irq_data *d) { - writel(1 << (irq - IRQ_SINTC_START), + writel(1 << (d->irq - IRQ_SINTC_START), MM_IO_BASE_SINTC + INTCHW_INTENABLE); } static struct irq_chip bcmring_irq0_chip = { .name = "ARM-INTC0", - .ack = bcmring_mask_irq0, - .mask = bcmring_mask_irq0, /* mask a specific interrupt, blocking its delivery. */ - .unmask = bcmring_unmask_irq0, /* unmaks an interrupt */ + .irq_ack = bcmring_mask_irq0, + .irq_mask = bcmring_mask_irq0, /* mask a specific interrupt, blocking its delivery. */ + .irq_unmask = bcmring_unmask_irq0, /* unmaks an interrupt */ }; static struct irq_chip bcmring_irq1_chip = { .name = "ARM-INTC1", - .ack = bcmring_mask_irq1, - .mask = bcmring_mask_irq1, - .unmask = bcmring_unmask_irq1, + .irq_ack = bcmring_mask_irq1, + .irq_mask = bcmring_mask_irq1, + .irq_unmask = bcmring_unmask_irq1, }; static struct irq_chip bcmring_irq2_chip = { .name = "ARM-SINTC", - .ack = bcmring_mask_irq2, - .mask = bcmring_mask_irq2, - .unmask = bcmring_unmask_irq2, + .irq_ack = bcmring_mask_irq2, + .irq_mask = bcmring_mask_irq2, + .irq_unmask = bcmring_unmask_irq2, }; static void vic_init(void __iomem *base, struct irq_chip *chip, diff --git a/arch/arm/mach-clps711x/irq.c b/arch/arm/mach-clps711x/irq.c index 9a12d85..86da7a1 100644 --- a/arch/arm/mach-clps711x/irq.c +++ b/arch/arm/mach-clps711x/irq.c @@ -27,24 +27,24 @@ #include <asm/hardware/clps7111.h> -static void int1_mask(unsigned int irq) +static void int1_mask(struct irq_data *d) { u32 intmr1; intmr1 = clps_readl(INTMR1); - intmr1 &= ~(1 << irq); + intmr1 &= ~(1 << d->irq); clps_writel(intmr1, INTMR1); } -static void int1_ack(unsigned int irq) +static void int1_ack(struct irq_data *d) { u32 intmr1; intmr1 = clps_readl(INTMR1); - intmr1 &= ~(1 << irq); + intmr1 &= ~(1 << d->irq); clps_writel(intmr1, INTMR1); - switch (irq) { + switch (d->irq) { case IRQ_CSINT: clps_writel(0, COEOI); break; case IRQ_TC1OI: clps_writel(0, TC1EOI); break; case IRQ_TC2OI: clps_writel(0, TC2EOI); break; @@ -54,56 +54,56 @@ static void int1_ack(unsigned int irq) } } -static void int1_unmask(unsigned int irq) +static void int1_unmask(struct irq_data *d) { u32 intmr1; intmr1 = clps_readl(INTMR1); - intmr1 |= 1 << irq; + intmr1 |= 1 << d->irq; clps_writel(intmr1, INTMR1); } static struct irq_chip int1_chip = { - .ack = int1_ack, - .mask = int1_mask, - .unmask = int1_unmask, + .irq_ack = int1_ack, + .irq_mask = int1_mask, + .irq_unmask = int1_unmask, }; -static void int2_mask(unsigned int irq) +static void int2_mask(struct irq_data *d) { u32 intmr2; intmr2 = clps_readl(INTMR2); - intmr2 &= ~(1 << (irq - 16)); + intmr2 &= ~(1 << (d->irq - 16)); clps_writel(intmr2, INTMR2); } -static void int2_ack(unsigned int irq) +static void int2_ack(struct irq_data *d) { u32 intmr2; intmr2 = clps_readl(INTMR2); - intmr2 &= ~(1 << (irq - 16)); + intmr2 &= ~(1 << (d->irq - 16)); clps_writel(intmr2, INTMR2); - switch (irq) { + switch (d->irq) { case IRQ_KBDINT: clps_writel(0, KBDEOI); break; } } -static void int2_unmask(unsigned int irq) +static void int2_unmask(struct irq_data *d) { u32 intmr2; intmr2 = clps_readl(INTMR2); - intmr2 |= 1 << (irq - 16); + intmr2 |= 1 << (d->irq - 16); clps_writel(intmr2, INTMR2); } static struct irq_chip int2_chip = { - .ack = int2_ack, - .mask = int2_mask, - .unmask = int2_unmask, + .irq_ack = int2_ack, + .irq_mask = int2_mask, + .irq_unmask = int2_unmask, }; void __init clps711x_init_irq(void) diff --git a/arch/arm/mach-davinci/cp_intc.c b/arch/arm/mach-davinci/cp_intc.c index bb4c40e..9abc80a 100644 --- a/arch/arm/mach-davinci/cp_intc.c +++ b/arch/arm/mach-davinci/cp_intc.c @@ -26,30 +26,30 @@ static inline void cp_intc_write(unsigned long value, unsigned offset) __raw_writel(value, davinci_intc_base + offset); } -static void cp_intc_ack_irq(unsigned int irq) +static void cp_intc_ack_irq(struct irq_data *d) { - cp_intc_write(irq, CP_INTC_SYS_STAT_IDX_CLR); + cp_intc_write(d->irq, CP_INTC_SYS_STAT_IDX_CLR); } /* Disable interrupt */ -static void cp_intc_mask_irq(unsigned int irq) +static void cp_intc_mask_irq(struct irq_data *d) { /* XXX don't know why we need to disable nIRQ here... */ cp_intc_write(1, CP_INTC_HOST_ENABLE_IDX_CLR); - cp_intc_write(irq, CP_INTC_SYS_ENABLE_IDX_CLR); + cp_intc_write(d->irq, CP_INTC_SYS_ENABLE_IDX_CLR); cp_intc_write(1, CP_INTC_HOST_ENABLE_IDX_SET); } /* Enable interrupt */ -static void cp_intc_unmask_irq(unsigned int irq) +static void cp_intc_unmask_irq(struct irq_data *d) { - cp_intc_write(irq, CP_INTC_SYS_ENABLE_IDX_SET); + cp_intc_write(d->irq, CP_INTC_SYS_ENABLE_IDX_SET); } -static int cp_intc_set_irq_type(unsigned int irq, unsigned int flow_type) +static int cp_intc_set_irq_type(struct irq_data *d, unsigned int flow_type) { - unsigned reg = BIT_WORD(irq); - unsigned mask = BIT_MASK(irq); + unsigned reg = BIT_WORD(d->irq); + unsigned mask = BIT_MASK(d->irq); unsigned polarity = cp_intc_read(CP_INTC_SYS_POLARITY(reg)); unsigned type = cp_intc_read(CP_INTC_SYS_TYPE(reg)); @@ -85,18 +85,18 @@ static int cp_intc_set_irq_type(unsigned int irq, unsigned int flow_type) * generic drivers which call {enable|disable}_irq_wake for * wake up interrupt sources (eg RTC on DA850). */ -static int cp_intc_set_wake(unsigned int irq, unsigned int on) +static int cp_intc_set_wake(struct irq_data *d, unsigned int on) { return 0; } static struct irq_chip cp_intc_irq_chip = { .name = "cp_intc", - .ack = cp_intc_ack_irq, - .mask = cp_intc_mask_irq, - .unmask = cp_intc_unmask_irq, - .set_type = cp_intc_set_irq_type, - .set_wake = cp_intc_set_wake, + .irq_ack = cp_intc_ack_irq, + .irq_mask = cp_intc_mask_irq, + .irq_unmask = cp_intc_unmask_irq, + .irq_set_type = cp_intc_set_irq_type, + .irq_set_wake = cp_intc_set_wake, }; void __init cp_intc_init(void) diff --git a/arch/arm/mach-davinci/gpio.c b/arch/arm/mach-davinci/gpio.c index bf0ff58..20d66e5 100644 --- a/arch/arm/mach-davinci/gpio.c +++ b/arch/arm/mach-davinci/gpio.c @@ -205,20 +205,20 @@ pure_initcall(davinci_gpio_setup); * serve as EDMA event triggers. */ -static void gpio_irq_disable(unsigned irq) +static void gpio_irq_disable(struct irq_data *d) { - struct davinci_gpio_regs __iomem *g = irq2regs(irq); - u32 mask = (u32) get_irq_data(irq); + struct davinci_gpio_regs __iomem *g = irq2regs(d->irq); + u32 mask = (u32) irq_data_get_irq_data(d); __raw_writel(mask, &g->clr_falling); __raw_writel(mask, &g->clr_rising); } -static void gpio_irq_enable(unsigned irq) +static void gpio_irq_enable(struct irq_data *d) { - struct davinci_gpio_regs __iomem *g = irq2regs(irq); - u32 mask = (u32) get_irq_data(irq); - unsigned status = irq_desc[irq].status; + struct davinci_gpio_regs __iomem *g = irq2regs(d->irq); + u32 mask = (u32) irq_data_get_irq_data(d); + unsigned status = irq_desc[d->irq].status; status &= IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING; if (!status) @@ -230,19 +230,19 @@ static void gpio_irq_enable(unsigned irq) __raw_writel(mask, &g->set_rising); } -static int gpio_irq_type(unsigned irq, unsigned trigger) +static int gpio_irq_type(struct irq_data *d, unsigned trigger) { - struct davinci_gpio_regs __iomem *g = irq2regs(irq); - u32 mask = (u32) get_irq_data(irq); + struct davinci_gpio_regs __iomem *g = irq2regs(d->irq); + u32 mask = (u32) irq_data_get_irq_data(d); if (trigger & ~(IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)) return -EINVAL; - irq_desc[irq].status &= ~IRQ_TYPE_SENSE_MASK; - irq_desc[irq].status |= trigger; + irq_desc[d->irq].status &= ~IRQ_TYPE_SENSE_MASK; + irq_desc[d->irq].status |= trigger; /* don't enable the IRQ if it's currently disabled */ - if (irq_desc[irq].depth == 0) { + if (irq_desc[d->irq].depth == 0) { __raw_writel(mask, (trigger & IRQ_TYPE_EDGE_FALLING) ? &g->set_falling : &g->clr_falling); __raw_writel(mask, (trigger & IRQ_TYPE_EDGE_RISING) @@ -253,9 +253,9 @@ static int gpio_irq_type(unsigned irq, unsigned trigger) static struct irq_chip gpio_irqchip = { .name = "GPIO", - .enable = gpio_irq_enable, - .disable = gpio_irq_disable, - .set_type = gpio_irq_type, + .irq_enable = gpio_irq_enable, + .irq_disable = gpio_irq_disable, + .irq_set_type = gpio_irq_type, }; static void @@ -269,8 +269,8 @@ gpio_irq_handler(unsigned irq, struct irq_desc *desc) mask <<= 16; /* temporarily mask (level sensitive) parent IRQ */ - desc->chip->mask(irq); - desc->chip->ack(irq); + desc->irq_data.chip->irq_mask(&desc->irq_data); + desc->irq_data.chip->irq_ack(&desc->irq_data); while (1) { u32 status; int n; @@ -293,7 +293,7 @@ gpio_irq_handler(unsigned irq, struct irq_desc *desc) status >>= res; } } - desc->chip->unmask(irq); + desc->irq_data.chip->irq_unmask(&desc->irq_data); /* now it may re-trigger */ } @@ -320,10 +320,10 @@ static int gpio_to_irq_unbanked(struct gpio_chip *chip, unsigned offset) return -ENODEV; } -static int gpio_irq_type_unbanked(unsigned irq, unsigned trigger) +static int gpio_irq_type_unbanked(struct irq_data *d, unsigned trigger) { - struct davinci_gpio_regs __iomem *g = irq2regs(irq); - u32 mask = (u32) get_irq_data(irq); + struct davinci_gpio_regs __iomem *g = irq2regs(d->irq); + u32 mask = (u32) irq_data_get_irq_data(d); if (trigger & ~(IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)) return -EINVAL; @@ -397,7 +397,7 @@ static int __init davinci_gpio_irq_setup(void) irq = bank_irq; gpio_irqchip_unbanked = *get_irq_desc_chip(irq_to_desc(irq)); gpio_irqchip_unbanked.name = "GPIO-AINTC"; - gpio_irqchip_unbanked.set_type = gpio_irq_type_unbanked; + gpio_irqchip_unbanked.irq_set_type = gpio_irq_type_unbanked; /* default trigger: both edges */ g = gpio2regs(0); diff --git a/arch/arm/mach-davinci/irq.c b/arch/arm/mach-davinci/irq.c index 784ddf3..5e05c9b 100644 --- a/arch/arm/mach-davinci/irq.c +++ b/arch/arm/mach-davinci/irq.c @@ -53,14 +53,14 @@ static inline void davinci_irq_writel(unsigned long value, int offset) } /* Disable interrupt */ -static void davinci_mask_irq(unsigned int irq) +static void davinci_mask_irq(struct irq_data *d) { unsigned int mask; u32 l; - mask = 1 << IRQ_BIT(irq); + mask = 1 << IRQ_BIT(d->irq); - if (irq > 31) { + if (d->irq > 31) { l = davinci_irq_readl(IRQ_ENT_REG1_OFFSET); l &= ~mask; davinci_irq_writel(l, IRQ_ENT_REG1_OFFSET); @@ -72,14 +72,14 @@ static void davinci_mask_irq(unsigned int irq) } /* Enable interrupt */ -static void davinci_unmask_irq(unsigned int irq) +static void davinci_unmask_irq(struct irq_data *d) { unsigned int mask; u32 l; - mask = 1 << IRQ_BIT(irq); + mask = 1 << IRQ_BIT(d->irq); - if (irq > 31) { + if (d->irq > 31) { l = davinci_irq_readl(IRQ_ENT_REG1_OFFSET); l |= mask; davinci_irq_writel(l, IRQ_ENT_REG1_OFFSET); @@ -91,23 +91,23 @@ static void davinci_unmask_irq(unsigned int irq) } /* EOI interrupt */ -static void davinci_ack_irq(unsigned int irq) +static void davinci_ack_irq(struct irq_data *d) { unsigned int mask; - mask = 1 << IRQ_BIT(irq); + mask = 1 << IRQ_BIT(d->irq); - if (irq > 31) + if (d->irq > 31) davinci_irq_writel(mask, IRQ_REG1_OFFSET); else davinci_irq_writel(mask, IRQ_REG0_OFFSET); } static struct irq_chip davinci_irq_chip_0 = { - .name = "AINTC", - .ack = davinci_ack_irq, - .mask = davinci_mask_irq, - .unmask = davinci_unmask_irq, + .name = "AINTC", + .irq_ack = davinci_ack_irq, + .irq_mask = davinci_mask_irq, + .irq_unmask = davinci_unmask_irq, }; /* ARM Interrupt Controller Initialization */ diff --git a/arch/arm/mach-dove/irq.c b/arch/arm/mach-dove/irq.c index 61bfcb3..9317f05 100644 --- a/arch/arm/mach-dove/irq.c +++ b/arch/arm/mach-dove/irq.c @@ -36,9 +36,9 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc) } } -static void pmu_irq_mask(unsigned int irq) +static void pmu_irq_mask(struct irq_data *d) { - int pin = irq_to_pmu(irq); + int pin = irq_to_pmu(d->irq); u32 u; u = readl(PMU_INTERRUPT_MASK); @@ -46,9 +46,9 @@ static void pmu_irq_mask(unsigned int irq) writel(u, PMU_INTERRUPT_MASK); } -static void pmu_irq_unmask(unsigned int irq) +static void pmu_irq_unmask(struct irq_data *d) { - int pin = irq_to_pmu(irq); + int pin = irq_to_pmu(d->irq); u32 u; u = readl(PMU_INTERRUPT_MASK); @@ -56,9 +56,9 @@ static void pmu_irq_unmask(unsigned int irq) writel(u, PMU_INTERRUPT_MASK); } -static void pmu_irq_ack(unsigned int irq) +static void pmu_irq_ack(struct irq_data *d) { - int pin = irq_to_pmu(irq); + int pin = irq_to_pmu(d->irq); u32 u; u = ~(1 << (pin & 31)); @@ -67,9 +67,9 @@ static void pmu_irq_ack(unsigned int irq) static struct irq_chip pmu_irq_chip = { .name = "pmu_irq", - .mask = pmu_irq_mask, - .unmask = pmu_irq_unmask, - .ack = pmu_irq_ack, + .irq_mask = pmu_irq_mask, + .irq_unmask = pmu_irq_unmask, + .irq_ack = pmu_irq_ack, }; static void pmu_irq_handler(unsigned int irq, struct irq_desc *desc) diff --git a/arch/arm/mach-ebsa110/core.c b/arch/arm/mach-ebsa110/core.c index 5df4099..7df083f 100644 --- a/arch/arm/mach-ebsa110/core.c +++ b/arch/arm/mach-ebsa110/core.c @@ -35,20 +35,20 @@ #define IRQ_STAT 0xff000000 /* read */ #define IRQ_MCLR 0xff000000 /* write */ -static void ebsa110_mask_irq(unsigned int irq) +static void ebsa110_mask_irq(struct irq_data *d) { - __raw_writeb(1 << irq, IRQ_MCLR); + __raw_writeb(1 << d->irq, IRQ_MCLR); } -static void ebsa110_unmask_irq(unsigned int irq) +static void ebsa110_unmask_irq(struct irq_data *d) { - __raw_writeb(1 << irq, IRQ_MSET); + __raw_writeb(1 << d->irq, IRQ_MSET); } static struct irq_chip ebsa110_irq_chip = { - .ack = ebsa110_mask_irq, - .mask = ebsa110_mask_irq, - .unmask = ebsa110_unmask_irq, + .irq_ack = ebsa110_mask_irq, + .irq_mask = ebsa110_mask_irq, + .irq_unmask = ebsa110_unmask_irq, }; static void __init ebsa110_init_irq(void) diff --git a/arch/arm/mach-ep93xx/gpio.c b/arch/arm/mach-ep93xx/gpio.c index cf547ad..f3dc76f 100644 --- a/arch/arm/mach-ep93xx/gpio.c +++ b/arch/arm/mach-ep93xx/gpio.c @@ -112,13 +112,13 @@ static void ep93xx_gpio_f_irq_handler(unsigned int irq, struct irq_desc *desc) generic_handle_irq(gpio_irq); } -static void ep93xx_gpio_irq_ack(unsigned int irq) +static void ep93xx_gpio_irq_ack(struct irq_data *d) { - int line = irq_to_gpio(irq); + int line = irq_to_gpio(d->irq); int port = line >> 3; int port_mask = 1 << (line & 7); - if ((irq_desc[irq].status & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH) { + if ((irq_desc[d->irq].status & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH) { gpio_int_type2[port] ^= port_mask; /* switch edge direction */ ep93xx_gpio_update_int_params(port); } @@ -126,13 +126,13 @@ static void ep93xx_gpio_irq_ack(unsigned int irq) __raw_writeb(port_mask, EP93XX_GPIO_REG(eoi_register_offset[port])); } -static void ep93xx_gpio_irq_mask_ack(unsigned int irq) +static void ep93xx_gpio_irq_mask_ack(struct irq_data *d) { - int line = irq_to_gpio(irq); + int line = irq_to_gpio(d->irq); int port = line >> 3; int port_mask = 1 << (line & 7); - if ((irq_desc[irq].status & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH) + if ((irq_desc[d->irq].status & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH) gpio_int_type2[port] ^= port_mask; /* switch edge direction */ gpio_int_unmasked[port] &= ~port_mask; @@ -141,18 +141,18 @@ static void ep93xx_gpio_irq_mask_ack(unsigned int irq) __raw_writeb(port_mask, EP93XX_GPIO_REG(eoi_register_offset[port])); } -static void ep93xx_gpio_irq_mask(unsigned int irq) +static void ep93xx_gpio_irq_mask(struct irq_data *d) { - int line = irq_to_gpio(irq); + int line = irq_to_gpio(d->irq); int port = line >> 3; gpio_int_unmasked[port] &= ~(1 << (line & 7)); ep93xx_gpio_update_int_params(port); } -static void ep93xx_gpio_irq_unmask(unsigned int irq) +static void ep93xx_gpio_irq_unmask(struct irq_data *d) { - int line = irq_to_gpio(irq); + int line = irq_to_gpio(d->irq); int port = line >> 3; gpio_int_unmasked[port] |= 1 << (line & 7); @@ -164,10 +164,10 @@ static void ep93xx_gpio_irq_unmask(unsigned int irq) * edge (1) triggered, while gpio_int_type2 controls whether it * triggers on low/falling (0) or high/rising (1). */ -static int ep93xx_gpio_irq_type(unsigned int irq, unsigned int type) +static int ep93xx_gpio_irq_type(struct irq_data *d, unsigned int type) { - struct irq_desc *desc = irq_desc + irq; - const int gpio = irq_to_gpio(irq); + struct irq_desc *desc = irq_desc + d->irq; + const int gpio = irq_to_gpio(d->irq); const int port = gpio >> 3; const int port_mask = 1 << (gpio & 7); @@ -220,11 +220,11 @@ static int ep93xx_gpio_irq_type(unsigned int irq, unsigned int type) static struct irq_chip ep93xx_gpio_irq_chip = { .name = "GPIO", - .ack = ep93xx_gpio_irq_ack, - .mask_ack = ep93xx_gpio_irq_mask_ack, - .mask = ep93xx_gpio_irq_mask, - .unmask = ep93xx_gpio_irq_unmask, - .set_type = ep93xx_gpio_irq_type, + .irq_ack = ep93xx_gpio_irq_ack, + .irq_mask_ack = ep93xx_gpio_irq_mask_ack, + .irq_mask = ep93xx_gpio_irq_mask, + .irq_unmask = ep93xx_gpio_irq_unmask, + .irq_set_type = ep93xx_gpio_irq_type, }; void __init ep93xx_gpio_init_irq(void) diff --git a/arch/arm/mach-footbridge/common.c b/arch/arm/mach-footbridge/common.c index 88b3dd8..84c5f25 100644 --- a/arch/arm/mach-footbridge/common.c +++ b/arch/arm/mach-footbridge/common.c @@ -75,20 +75,20 @@ static const int fb_irq_mask[] = { IRQ_MASK_PCI_PERR, /* 19 */ }; -static void fb_mask_irq(unsigned int irq) +static void fb_mask_irq(struct irq_data *d) { - *CSR_IRQ_DISABLE = fb_irq_mask[_DC21285_INR(irq)]; + *CSR_IRQ_DISABLE = fb_irq_mask[_DC21285_INR(d->irq)]; } -static void fb_unmask_irq(unsigned int irq) +static void fb_unmask_irq(struct irq_data *d) { - *CSR_IRQ_ENABLE = fb_irq_mask[_DC21285_INR(irq)]; + *CSR_IRQ_ENABLE = fb_irq_mask[_DC21285_INR(d->irq)]; } static struct irq_chip fb_chip = { - .ack = fb_mask_irq, - .mask = fb_mask_irq, - .unmask = fb_unmask_irq, + .irq_ack = fb_mask_irq, + .irq_mask = fb_mask_irq, + .irq_unmask = fb_unmask_irq, }; static void __init __fb_init_irq(void) diff --git a/arch/arm/mach-footbridge/isa-irq.c b/arch/arm/mach-footbridge/isa-irq.c index 8bfd06a..de7a5cb 100644 --- a/arch/arm/mach-footbridge/isa-irq.c +++ b/arch/arm/mach-footbridge/isa-irq.c @@ -30,61 +30,61 @@ #include "common.h" -static void isa_mask_pic_lo_irq(unsigned int irq) +static void isa_mask_pic_lo_irq(struct irq_data *d) { - unsigned int mask = 1 << (irq & 7); + unsigned int mask = 1 << (d->irq & 7); outb(inb(PIC_MASK_LO) | mask, PIC_MASK_LO); } -static void isa_ack_pic_lo_irq(unsigned int irq) +static void isa_ack_pic_lo_irq(struct irq_data *d) { - unsigned int mask = 1 << (irq & 7); + unsigned int mask = 1 << (d->irq & 7); outb(inb(PIC_MASK_LO) | mask, PIC_MASK_LO); outb(0x20, PIC_LO); } -static void isa_unmask_pic_lo_irq(unsigned int irq) +static void isa_unmask_pic_lo_irq(struct irq_data *d) { - unsigned int mask = 1 << (irq & 7); + unsigned int mask = 1 << (d->irq & 7); outb(inb(PIC_MASK_LO) & ~mask, PIC_MASK_LO); } static struct irq_chip isa_lo_chip = { - .ack = isa_ack_pic_lo_irq, - .mask = isa_mask_pic_lo_irq, - .unmask = isa_unmask_pic_lo_irq, + .irq_ack = isa_ack_pic_lo_irq, + .irq_mask = isa_mask_pic_lo_irq, + .irq_unmask = isa_unmask_pic_lo_irq, }; -static void isa_mask_pic_hi_irq(unsigned int irq) +static void isa_mask_pic_hi_irq(struct irq_data *d) { - unsigned int mask = 1 << (irq & 7); + unsigned int mask = 1 << (d->irq & 7); outb(inb(PIC_MASK_HI) | mask, PIC_MASK_HI); } -static void isa_ack_pic_hi_irq(unsigned int irq) +static void isa_ack_pic_hi_irq(struct irq_data *d) { - unsigned int mask = 1 << (irq & 7); + unsigned int mask = 1 << (d->irq & 7); outb(inb(PIC_MASK_HI) | mask, PIC_MASK_HI); outb(0x62, PIC_LO); outb(0x20, PIC_HI); } -static void isa_unmask_pic_hi_irq(unsigned int irq) +static void isa_unmask_pic_hi_irq(struct irq_data *d) { - unsigned int mask = 1 << (irq & 7); + unsigned int mask = 1 << (d->irq & 7); outb(inb(PIC_MASK_HI) & ~mask, PIC_MASK_HI); } static struct irq_chip isa_hi_chip = { - .ack = isa_ack_pic_hi_irq, - .mask = isa_mask_pic_hi_irq, - .unmask = isa_unmask_pic_hi_irq, + .irq_ack = isa_ack_pic_hi_irq, + .irq_mask = isa_mask_pic_hi_irq, + .irq_unmask = isa_unmask_pic_hi_irq, }; static void diff --git a/arch/arm/mach-gemini/gpio.c b/arch/arm/mach-gemini/gpio.c index fe3bd5a..fa3d333 100644 --- a/arch/arm/mach-gemini/gpio.c +++ b/arch/arm/mach-gemini/gpio.c @@ -54,33 +54,33 @@ static void _set_gpio_irqenable(unsigned int base, unsigned int index, __raw_writel(reg, base + GPIO_INT_EN); } -static void gpio_ack_irq(unsigned int irq) +static void gpio_ack_irq(struct irq_data *d) { - unsigned int gpio = irq_to_gpio(irq); + unsigned int gpio = irq_to_gpio(d->irq); unsigned int base = GPIO_BASE(gpio / 32); __raw_writel(1 << (gpio % 32), base + GPIO_INT_CLR); } -static void gpio_mask_irq(unsigned int irq) +static void gpio_mask_irq(struct irq_data *d) { - unsigned int gpio = irq_to_gpio(irq); + unsigned int gpio = irq_to_gpio(d->irq); unsigned int base = GPIO_BASE(gpio / 32); _set_gpio_irqenable(base, gpio % 32, 0); } -static void gpio_unmask_irq(unsigned int irq) +static void gpio_unmask_irq(struct irq_data *d) { - unsigned int gpio = irq_to_gpio(irq); + unsigned int gpio = irq_to_gpio(d->irq); unsigned int base = GPIO_BASE(gpio / 32); _set_gpio_irqenable(base, gpio % 32, 1); } -static int gpio_set_irq_type(unsigned int irq, unsigned int type) +static int gpio_set_irq_type(struct irq_data *d, unsigned int type) { - unsigned int gpio = irq_to_gpio(irq); + unsigned int gpio = irq_to_gpio(d->irq); unsigned int gpio_mask = 1 << (gpio % 32); unsigned int base = GPIO_BASE(gpio / 32); unsigned int reg_both, reg_level, reg_type; @@ -120,7 +120,7 @@ static int gpio_set_irq_type(unsigned int irq, unsigned int type) __raw_writel(reg_level, base + GPIO_INT_LEVEL); __raw_writel(reg_both, base + GPIO_INT_BOTH_EDGE); - gpio_ack_irq(irq); + gpio_ack_irq(d->irq); return 0; } @@ -146,10 +146,10 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc) static struct irq_chip gpio_irq_chip = { .name = "GPIO", - .ack = gpio_ack_irq, - .mask = gpio_mask_irq, - .unmask = gpio_unmask_irq, - .set_type = gpio_set_irq_type, + .irq_ack = gpio_ack_irq, + .irq_mask = gpio_mask_irq, + .irq_unmask = gpio_unmask_irq, + .irq_set_type = gpio_set_irq_type, }; static void _set_gpio_direction(struct gpio_chip *chip, unsigned offset, diff --git a/arch/arm/mach-gemini/irq.c b/arch/arm/mach-gemini/irq.c index 9e613ca..96bc227 100644 --- a/arch/arm/mach-gemini/irq.c +++ b/arch/arm/mach-gemini/irq.c @@ -32,34 +32,34 @@ #define FIQ_LEVEL(base_addr) (base_addr + 0x30) #define FIQ_STATUS(base_addr) (base_addr + 0x34) -static void gemini_ack_irq(unsigned int irq) +static void gemini_ack_irq(struct irq_data *d) { - __raw_writel(1 << irq, IRQ_CLEAR(IO_ADDRESS(GEMINI_INTERRUPT_BASE))); + __raw_writel(1 << d->irq, IRQ_CLEAR(IO_ADDRESS(GEMINI_INTERRUPT_BASE))); } -static void gemini_mask_irq(unsigned int irq) +static void gemini_mask_irq(struct irq_data *d) { unsigned int mask; mask = __raw_readl(IRQ_MASK(IO_ADDRESS(GEMINI_INTERRUPT_BASE))); - mask &= ~(1 << irq); + mask &= ~(1 << d->irq); __raw_writel(mask, IRQ_MASK(IO_ADDRESS(GEMINI_INTERRUPT_BASE))); } -static void gemini_unmask_irq(unsigned int irq) +static void gemini_unmask_irq(struct irq_data *d) { unsigned int mask; mask = __raw_readl(IRQ_MASK(IO_ADDRESS(GEMINI_INTERRUPT_BASE))); - mask |= (1 << irq); + mask |= (1 << d->irq); __raw_writel(mask, IRQ_MASK(IO_ADDRESS(GEMINI_INTERRUPT_BASE))); } static struct irq_chip gemini_irq_chip = { - .name = "INTC", - .ack = gemini_ack_irq, - .mask = gemini_mask_irq, - .unmask = gemini_unmask_irq, + .name = "INTC", + .irq_ack = gemini_ack_irq, + .irq_mask = gemini_mask_irq, + .irq_unmask = gemini_unmask_irq, }; static struct resource irq_resource = { diff --git a/arch/arm/mach-h720x/common.c b/arch/arm/mach-h720x/common.c index bdb3f67..1f28c90 100644 --- a/arch/arm/mach-h720x/common.c +++ b/arch/arm/mach-h720x/common.c @@ -52,17 +52,17 @@ unsigned long h720x_gettimeoffset(void) /* * mask Global irq's */ -static void mask_global_irq (unsigned int irq ) +static void mask_global_irq(struct irq_data *d) { - CPU_REG (IRQC_VIRT, IRQC_IER) &= ~(1 << irq); + CPU_REG (IRQC_VIRT, IRQC_IER) &= ~(1 << d->irq); } /* * unmask Global irq's */ -static void unmask_global_irq (unsigned int irq ) +static void unmask_global_irq(struct irq_data *d) { - CPU_REG (IRQC_VIRT, IRQC_IER) |= (1 << irq); + CPU_REG (IRQC_VIRT, IRQC_IER) |= (1 << d->irq); } @@ -70,10 +70,10 @@ static void unmask_global_irq (unsigned int irq ) * ack GPIO irq's * Ack only for edge triggered int's valid */ -static void inline ack_gpio_irq(u32 irq) +static void inline ack_gpio_irq(struct irq_data *d) { - u32 reg_base = GPIO_VIRT(IRQ_TO_REGNO(irq)); - u32 bit = IRQ_TO_BIT(irq); + u32 reg_base = GPIO_VIRT(IRQ_TO_REGNO(d->irq)); + u32 bit = IRQ_TO_BIT(d->irq); if ( (CPU_REG (reg_base, GPIO_EDGE) & bit)) CPU_REG (reg_base, GPIO_CLR) = bit; } @@ -81,20 +81,20 @@ static void inline ack_gpio_irq(u32 irq) /* * mask GPIO irq's */ -static void inline mask_gpio_irq(u32 irq) +static void inline mask_gpio_irq(struct irq_data *d) { - u32 reg_base = GPIO_VIRT(IRQ_TO_REGNO(irq)); - u32 bit = IRQ_TO_BIT(irq); + u32 reg_base = GPIO_VIRT(IRQ_TO_REGNO(d->irq)); + u32 bit = IRQ_TO_BIT(d->irq); CPU_REG (reg_base, GPIO_MASK) &= ~bit; } /* * unmask GPIO irq's */ -static void inline unmask_gpio_irq(u32 irq) +static void inline unmask_gpio_irq(struct irq_data *d) { - u32 reg_base = GPIO_VIRT(IRQ_TO_REGNO(irq)); - u32 bit = IRQ_TO_BIT(irq); + u32 reg_base = GPIO_VIRT(IRQ_TO_REGNO(d->irq)); + u32 bit = IRQ_TO_BIT(d->irq); CPU_REG (reg_base, GPIO_MASK) |= bit; } @@ -170,15 +170,15 @@ h720x_gpioe_demux_handler(unsigned int irq_unused, struct irq_desc *desc) #endif static struct irq_chip h720x_global_chip = { - .ack = mask_global_irq, - .mask = mask_global_irq, - .unmask = unmask_global_irq, + .irq_ack = mask_global_irq, + .irq_mask = mask_global_irq, + .irq_unmask = unmask_global_irq, }; static struct irq_chip h720x_gpio_chip = { - .ack = ack_gpio_irq, - .mask = mask_gpio_irq, - .unmask = unmask_gpio_irq, + .irq_ack = ack_gpio_irq, + .irq_mask = mask_gpio_irq, + .irq_unmask = unmask_gpio_irq, }; /* diff --git a/arch/arm/mach-h720x/cpu-h7202.c b/arch/arm/mach-h720x/cpu-h7202.c index fd33a19..ac3f914 100644 --- a/arch/arm/mach-h720x/cpu-h7202.c +++ b/arch/arm/mach-h720x/cpu-h7202.c @@ -141,27 +141,27 @@ h7202_timer_interrupt(int irq, void *dev_id) /* * mask multiplexed timer IRQs */ -static void inline mask_timerx_irq (u32 irq) +static void inline mask_timerx_irq(struct irq_data *d) { unsigned int bit; - bit = 2 << ((irq == IRQ_TIMER64B) ? 4 : (irq - IRQ_TIMER1)); + bit = 2 << ((d->irq == IRQ_TIMER64B) ? 4 : (d->irq - IRQ_TIMER1)); CPU_REG (TIMER_VIRT, TIMER_TOPCTRL) &= ~bit; } /* * unmask multiplexed timer IRQs */ -static void inline unmask_timerx_irq (u32 irq) +static void inline unmask_timerx_irq(struct irq_data *d) { unsigned int bit; - bit = 2 << ((irq == IRQ_TIMER64B) ? 4 : (irq - IRQ_TIMER1)); + bit = 2 << ((d->irq == IRQ_TIMER64B) ? 4 : (d->irq - IRQ_TIMER1)); CPU_REG (TIMER_VIRT, TIMER_TOPCTRL) |= bit; } static struct irq_chip h7202_timerx_chip = { - .ack = mask_timerx_irq, - .mask = mask_timerx_irq, - .unmask = unmask_timerx_irq, + .irq_ack = mask_timerx_irq, + .irq_mask = mask_timerx_irq, + .irq_unmask = unmask_timerx_irq, }; static struct irqaction h7202_timer_irq = { diff --git a/arch/arm/mach-h720x/h7201-eval.c b/arch/arm/mach-h720x/h7201-eval.c index 79f0b89..629454d 100644 --- a/arch/arm/mach-h720x/h7201-eval.c +++ b/arch/arm/mach-h720x/h7201-eval.c @@ -23,7 +23,6 @@ #include <asm/types.h> #include <asm/mach-types.h> #include <asm/page.h> -#include <asm/pgtable.h> #include <asm/mach/arch.h> #include <mach/hardware.h> #include "common.h" diff --git a/arch/arm/mach-h720x/h7202-eval.c b/arch/arm/mach-h720x/h7202-eval.c index cc28b1e..e9f46b6 100644 --- a/arch/arm/mach-h720x/h7202-eval.c +++ b/arch/arm/mach-h720x/h7202-eval.c @@ -23,7 +23,6 @@ #include <asm/types.h> #include <asm/mach-types.h> #include <asm/page.h> -#include <asm/pgtable.h> #include <asm/mach/arch.h> #include <mach/irqs.h> #include <mach/hardware.h> diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index 17d2e60..56684b5 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -243,6 +243,7 @@ config MACH_MX27_3DS select IMX_HAVE_PLATFORM_MXC_EHCI select IMX_HAVE_PLATFORM_MXC_MMC select IMX_HAVE_PLATFORM_SPI_IMX + select MXC_DEBUG_BOARD select MXC_ULPI if USB_ULPI help Include support for MX27PDK platform. This includes specific diff --git a/arch/arm/mach-imx/mach-mx27_3ds.c b/arch/arm/mach-imx/mach-mx27_3ds.c index 6fd0f8f..1643315 100644 --- a/arch/arm/mach-imx/mach-mx27_3ds.c +++ b/arch/arm/mach-imx/mach-mx27_3ds.c @@ -37,12 +37,15 @@ #include <mach/common.h> #include <mach/iomux-mx27.h> #include <mach/ulpi.h> +#include <mach/irqs.h> +#include <mach/3ds_debugboard.h> #include "devices-imx27.h" #define SD1_EN_GPIO (GPIO_PORTB + 25) #define OTG_PHY_RESET_GPIO (GPIO_PORTB + 23) #define SPI2_SS0 (GPIO_PORTD + 21) +#define EXPIO_PARENT_INT (MXC_INTERNAL_IRQS + GPIO_PORTC + 28) static const int mx27pdk_pins[] __initconst = { /* UART1 */ @@ -215,10 +218,10 @@ static struct regulator_init_data vgen_init = { static struct mc13783_regulator_init_data mx27_3ds_regulators[] = { { - .id = MC13783_REGU_VMMC1, + .id = MC13783_REG_VMMC1, .init_data = &vmmc1_init, }, { - .id = MC13783_REGU_VGEN, + .id = MC13783_REG_VGEN, .init_data = &vgen_init, }, }; @@ -276,6 +279,9 @@ static void __init mx27pdk_init(void) imx27_add_spi_imx1(&spi2_pdata); spi_register_board_info(mx27_3ds_spi_devs, ARRAY_SIZE(mx27_3ds_spi_devs)); + + if (mxc_expio_init(MX27_CS5_BASE_ADDR, EXPIO_PARENT_INT)) + pr_warn("Init of the debugboard failed, all devices on the debugboard are unusable.\n"); } static void __init mx27pdk_timer_init(void) diff --git a/arch/arm/mach-integrator/cpu.c b/arch/arm/mach-integrator/cpu.c index a3fbcb3a..fbb4577 100644 --- a/arch/arm/mach-integrator/cpu.c +++ b/arch/arm/mach-integrator/cpu.c @@ -173,7 +173,7 @@ static unsigned int integrator_get(unsigned int cpu) if (machine_is_integrator()) { vco.s = (cm_osc >> 8) & 7; - } else if (machine_is_cintegrator()) { + } else { vco.s = 1; } vco.v = cm_osc & 255; diff --git a/arch/arm/mach-integrator/integrator_ap.c b/arch/arm/mach-integrator/integrator_ap.c index 2774df8..b666443 100644 --- a/arch/arm/mach-integrator/integrator_ap.c +++ b/arch/arm/mach-integrator/integrator_ap.c @@ -156,21 +156,21 @@ static void __init ap_map_io(void) #define INTEGRATOR_SC_VALID_INT 0x003fffff -static void sc_mask_irq(unsigned int irq) +static void sc_mask_irq(struct irq_data *d) { - writel(1 << irq, VA_IC_BASE + IRQ_ENABLE_CLEAR); + writel(1 << d->irq, VA_IC_BASE + IRQ_ENABLE_CLEAR); } -static void sc_unmask_irq(unsigned int irq) +static void sc_unmask_irq(struct irq_data *d) { - writel(1 << irq, VA_IC_BASE + IRQ_ENABLE_SET); + writel(1 << d->irq, VA_IC_BASE + IRQ_ENABLE_SET); } static struct irq_chip sc_chip = { - .name = "SC", - .ack = sc_mask_irq, - .mask = sc_mask_irq, - .unmask = sc_unmask_irq, + .name = "SC", + .irq_ack = sc_mask_irq, + .irq_mask = sc_mask_irq, + .irq_unmask = sc_unmask_irq, }; static void __init ap_init_irq(void) diff --git a/arch/arm/mach-integrator/integrator_cp.c b/arch/arm/mach-integrator/integrator_cp.c index 85e48a5..e9327da 100644 --- a/arch/arm/mach-integrator/integrator_cp.c +++ b/arch/arm/mach-integrator/integrator_cp.c @@ -146,61 +146,61 @@ static void __init intcp_map_io(void) #define sic_writel __raw_writel #define sic_readl __raw_readl -static void cic_mask_irq(unsigned int irq) +static void cic_mask_irq(struct irq_data *d) { - irq -= IRQ_CIC_START; + unsigned int irq = d->irq - IRQ_CIC_START; cic_writel(1 << irq, INTCP_VA_CIC_BASE + IRQ_ENABLE_CLEAR); } -static void cic_unmask_irq(unsigned int irq) +static void cic_unmask_irq(struct irq_data *d) { - irq -= IRQ_CIC_START; + unsigned int irq = d->irq - IRQ_CIC_START; cic_writel(1 << irq, INTCP_VA_CIC_BASE + IRQ_ENABLE_SET); } static struct irq_chip cic_chip = { - .name = "CIC", - .ack = cic_mask_irq, - .mask = cic_mask_irq, - .unmask = cic_unmask_irq, + .name = "CIC", + .irq_ack = cic_mask_irq, + .irq_mask = cic_mask_irq, + .irq_unmask = cic_unmask_irq, }; -static void pic_mask_irq(unsigned int irq) +static void pic_mask_irq(struct irq_data *d) { - irq -= IRQ_PIC_START; + unsigned int irq = d->irq - IRQ_PIC_START; pic_writel(1 << irq, INTCP_VA_PIC_BASE + IRQ_ENABLE_CLEAR); } -static void pic_unmask_irq(unsigned int irq) +static void pic_unmask_irq(struct irq_data *d) { - irq -= IRQ_PIC_START; + unsigned int irq = d->irq - IRQ_PIC_START; pic_writel(1 << irq, INTCP_VA_PIC_BASE + IRQ_ENABLE_SET); } static struct irq_chip pic_chip = { - .name = "PIC", - .ack = pic_mask_irq, - .mask = pic_mask_irq, - .unmask = pic_unmask_irq, + .name = "PIC", + .irq_ack = pic_mask_irq, + .irq_mask = pic_mask_irq, + .irq_unmask = pic_unmask_irq, }; -static void sic_mask_irq(unsigned int irq) +static void sic_mask_irq(struct irq_data *d) { - irq -= IRQ_SIC_START; + unsigned int irq = d->irq - IRQ_SIC_START; sic_writel(1 << irq, INTCP_VA_SIC_BASE + IRQ_ENABLE_CLEAR); } -static void sic_unmask_irq(unsigned int irq) +static void sic_unmask_irq(struct irq_data *d) { - irq -= IRQ_SIC_START; + unsigned int irq = d->irq - IRQ_SIC_START; sic_writel(1 << irq, INTCP_VA_SIC_BASE + IRQ_ENABLE_SET); } static struct irq_chip sic_chip = { - .name = "SIC", - .ack = sic_mask_irq, - .mask = sic_mask_irq, - .unmask = sic_unmask_irq, + .name = "SIC", + .irq_ack = sic_mask_irq, + .irq_mask = sic_mask_irq, + .irq_unmask = sic_unmask_irq, }; static void diff --git a/arch/arm/mach-iop13xx/irq.c b/arch/arm/mach-iop13xx/irq.c index 0d099ca..a233470 100644 --- a/arch/arm/mach-iop13xx/irq.c +++ b/arch/arm/mach-iop13xx/irq.c @@ -123,79 +123,79 @@ static void write_intsize(u32 val) /* 0 = Interrupt Masked and 1 = Interrupt not masked */ static void -iop13xx_irq_mask0 (unsigned int irq) +iop13xx_irq_mask0 (struct irq_data *d) { - write_intctl_0(read_intctl_0() & ~(1 << (irq - 0))); + write_intctl_0(read_intctl_0() & ~(1 << (d->irq - 0))); } static void -iop13xx_irq_mask1 (unsigned int irq) +iop13xx_irq_mask1 (struct irq_data *d) { - write_intctl_1(read_intctl_1() & ~(1 << (irq - 32))); + write_intctl_1(read_intctl_1() & ~(1 << (d->irq - 32))); } static void -iop13xx_irq_mask2 (unsigned int irq) +iop13xx_irq_mask2 (struct irq_data *d) { - write_intctl_2(read_intctl_2() & ~(1 << (irq - 64))); + write_intctl_2(read_intctl_2() & ~(1 << (d->irq - 64))); } static void -iop13xx_irq_mask3 (unsigned int irq) +iop13xx_irq_mask3 (struct irq_data *d) { - write_intctl_3(read_intctl_3() & ~(1 << (irq - 96))); + write_intctl_3(read_intctl_3() & ~(1 << (d->irq - 96))); } static void -iop13xx_irq_unmask0(unsigned int irq) +iop13xx_irq_unmask0(struct irq_data *d) { - write_intctl_0(read_intctl_0() | (1 << (irq - 0))); + write_intctl_0(read_intctl_0() | (1 << (d->irq - 0))); } static void -iop13xx_irq_unmask1(unsigned int irq) +iop13xx_irq_unmask1(struct irq_data *d) { - write_intctl_1(read_intctl_1() | (1 << (irq - 32))); + write_intctl_1(read_intctl_1() | (1 << (d->irq - 32))); } static void -iop13xx_irq_unmask2(unsigned int irq) +iop13xx_irq_unmask2(struct irq_data *d) { - write_intctl_2(read_intctl_2() | (1 << (irq - 64))); + write_intctl_2(read_intctl_2() | (1 << (d->irq - 64))); } static void -iop13xx_irq_unmask3(unsigned int irq) +iop13xx_irq_unmask3(struct irq_data *d) { - write_intctl_3(read_intctl_3() | (1 << (irq - 96))); + write_intctl_3(read_intctl_3() | (1 << (d->irq - 96))); } static struct irq_chip iop13xx_irqchip1 = { - .name = "IOP13xx-1", - .ack = iop13xx_irq_mask0, - .mask = iop13xx_irq_mask0, - .unmask = iop13xx_irq_unmask0, + .name = "IOP13xx-1", + .irq_ack = iop13xx_irq_mask0, + .irq_mask = iop13xx_irq_mask0, + .irq_unmask = iop13xx_irq_unmask0, }; static struct irq_chip iop13xx_irqchip2 = { - .name = "IOP13xx-2", - .ack = iop13xx_irq_mask1, - .mask = iop13xx_irq_mask1, - .unmask = iop13xx_irq_unmask1, + .name = "IOP13xx-2", + .irq_ack = iop13xx_irq_mask1, + .irq_mask = iop13xx_irq_mask1, + .irq_unmask = iop13xx_irq_unmask1, }; static struct irq_chip iop13xx_irqchip3 = { - .name = "IOP13xx-3", - .ack = iop13xx_irq_mask2, - .mask = iop13xx_irq_mask2, - .unmask = iop13xx_irq_unmask2, + .name = "IOP13xx-3", + .irq_ack = iop13xx_irq_mask2, + .irq_mask = iop13xx_irq_mask2, + .irq_unmask = iop13xx_irq_unmask2, }; static struct irq_chip iop13xx_irqchip4 = { - .name = "IOP13xx-4", - .ack = iop13xx_irq_mask3, - .mask = iop13xx_irq_mask3, - .unmask = iop13xx_irq_unmask3, + .name = "IOP13xx-4", + .irq_ack = iop13xx_irq_mask3, + .irq_mask = iop13xx_irq_mask3, + .irq_unmask = iop13xx_irq_unmask3, }; extern void iop_init_cp6_handler(void); diff --git a/arch/arm/mach-iop13xx/msi.c b/arch/arm/mach-iop13xx/msi.c index 7149fcc..c9c02e3 100644 --- a/arch/arm/mach-iop13xx/msi.c +++ b/arch/arm/mach-iop13xx/msi.c @@ -156,14 +156,14 @@ void arch_teardown_msi_irq(unsigned int irq) destroy_irq(irq); } -static void iop13xx_msi_nop(unsigned int irq) +static void iop13xx_msi_nop(struct irq_data *d) { return; } static struct irq_chip iop13xx_msi_chip = { .name = "PCI-MSI", - .ack = iop13xx_msi_nop, + .irq_ack = iop13xx_msi_nop, .irq_enable = unmask_msi_irq, .irq_disable = mask_msi_irq, .irq_mask = mask_msi_irq, diff --git a/arch/arm/mach-iop32x/irq.c b/arch/arm/mach-iop32x/irq.c index ba59b2d..d3426a1 100644 --- a/arch/arm/mach-iop32x/irq.c +++ b/arch/arm/mach-iop32x/irq.c @@ -32,24 +32,24 @@ static void intstr_write(u32 val) } static void -iop32x_irq_mask(unsigned int irq) +iop32x_irq_mask(struct irq_data *d) { - iop32x_mask &= ~(1 << irq); + iop32x_mask &= ~(1 << d->irq); intctl_write(iop32x_mask); } static void -iop32x_irq_unmask(unsigned int irq) +iop32x_irq_unmask(struct irq_data *d) { - iop32x_mask |= 1 << irq; + iop32x_mask |= 1 << d->irq; intctl_write(iop32x_mask); } struct irq_chip ext_chip = { - .name = "IOP32x", - .ack = iop32x_irq_mask, - .mask = iop32x_irq_mask, - .unmask = iop32x_irq_unmask, + .name = "IOP32x", + .irq_ack = iop32x_irq_mask, + .irq_mask = iop32x_irq_mask, + .irq_unmask = iop32x_irq_unmask, }; void __init iop32x_init_irq(void) diff --git a/arch/arm/mach-iop33x/irq.c b/arch/arm/mach-iop33x/irq.c index abb4ea2..0ff2f74 100644 --- a/arch/arm/mach-iop33x/irq.c +++ b/arch/arm/mach-iop33x/irq.c @@ -53,45 +53,45 @@ static void intsize_write(u32 val) } static void -iop33x_irq_mask1 (unsigned int irq) +iop33x_irq_mask1 (struct irq_data *d) { - iop33x_mask0 &= ~(1 << irq); + iop33x_mask0 &= ~(1 << d->irq); intctl0_write(iop33x_mask0); } static void -iop33x_irq_mask2 (unsigned int irq) +iop33x_irq_mask2 (struct irq_data *d) { - iop33x_mask1 &= ~(1 << (irq - 32)); + iop33x_mask1 &= ~(1 << (d->irq - 32)); intctl1_write(iop33x_mask1); } static void -iop33x_irq_unmask1(unsigned int irq) +iop33x_irq_unmask1(struct irq_data *d) { - iop33x_mask0 |= 1 << irq; + iop33x_mask0 |= 1 << d->irq; intctl0_write(iop33x_mask0); } static void -iop33x_irq_unmask2(unsigned int irq) +iop33x_irq_unmask2(struct irq_data *d) { - iop33x_mask1 |= (1 << (irq - 32)); + iop33x_mask1 |= (1 << (d->irq - 32)); intctl1_write(iop33x_mask1); } struct irq_chip iop33x_irqchip1 = { - .name = "IOP33x-1", - .ack = iop33x_irq_mask1, - .mask = iop33x_irq_mask1, - .unmask = iop33x_irq_unmask1, + .name = "IOP33x-1", + .irq_ack = iop33x_irq_mask1, + .irq_mask = iop33x_irq_mask1, + .irq_unmask = iop33x_irq_unmask1, }; struct irq_chip iop33x_irqchip2 = { - .name = "IOP33x-2", - .ack = iop33x_irq_mask2, - .mask = iop33x_irq_mask2, - .unmask = iop33x_irq_unmask2, + .name = "IOP33x-2", + .irq_ack = iop33x_irq_mask2, + .irq_mask = iop33x_irq_mask2, + .irq_unmask = iop33x_irq_unmask2, }; void __init iop33x_init_irq(void) diff --git a/arch/arm/mach-ixp2000/core.c b/arch/arm/mach-ixp2000/core.c index e24e3d0..5fc4e06 100644 --- a/arch/arm/mach-ixp2000/core.c +++ b/arch/arm/mach-ixp2000/core.c @@ -309,9 +309,9 @@ static void ixp2000_GPIO_irq_handler(unsigned int irq, struct irq_desc *desc) } } -static int ixp2000_GPIO_irq_type(unsigned int irq, unsigned int type) +static int ixp2000_GPIO_irq_type(struct irq_data *d, unsigned int type) { - int line = irq - IRQ_IXP2000_GPIO0; + int line = d->irq - IRQ_IXP2000_GPIO0; /* * First, configure this GPIO line as an input. @@ -342,8 +342,10 @@ static int ixp2000_GPIO_irq_type(unsigned int irq, unsigned int type) return 0; } -static void ixp2000_GPIO_irq_mask_ack(unsigned int irq) +static void ixp2000_GPIO_irq_mask_ack(struct irq_data *d) { + unsigned int irq = d->irq; + ixp2000_reg_write(IXP2000_GPIO_INCR, (1 << (irq - IRQ_IXP2000_GPIO0))); ixp2000_reg_write(IXP2000_GPIO_EDSR, (1 << (irq - IRQ_IXP2000_GPIO0))); @@ -351,38 +353,42 @@ static void ixp2000_GPIO_irq_mask_ack(unsigned int irq) ixp2000_reg_wrb(IXP2000_GPIO_INST, (1 << (irq - IRQ_IXP2000_GPIO0))); } -static void ixp2000_GPIO_irq_mask(unsigned int irq) +static void ixp2000_GPIO_irq_mask(struct irq_data *d) { + unsigned int irq = d->irq; + ixp2000_reg_wrb(IXP2000_GPIO_INCR, (1 << (irq - IRQ_IXP2000_GPIO0))); } -static void ixp2000_GPIO_irq_unmask(unsigned int irq) +static void ixp2000_GPIO_irq_unmask(struct irq_data *d) { + unsigned int irq = d->irq; + ixp2000_reg_write(IXP2000_GPIO_INSR, (1 << (irq - IRQ_IXP2000_GPIO0))); } static struct irq_chip ixp2000_GPIO_irq_chip = { - .ack = ixp2000_GPIO_irq_mask_ack, - .mask = ixp2000_GPIO_irq_mask, - .unmask = ixp2000_GPIO_irq_unmask, - .set_type = ixp2000_GPIO_irq_type, + .irq_ack = ixp2000_GPIO_irq_mask_ack, + .irq_mask = ixp2000_GPIO_irq_mask, + .irq_unmask = ixp2000_GPIO_irq_unmask, + .irq_set_type = ixp2000_GPIO_irq_type, }; -static void ixp2000_pci_irq_mask(unsigned int irq) +static void ixp2000_pci_irq_mask(struct irq_data *d) { unsigned long temp = *IXP2000_PCI_XSCALE_INT_ENABLE; - if (irq == IRQ_IXP2000_PCIA) + if (d->irq == IRQ_IXP2000_PCIA) ixp2000_reg_wrb(IXP2000_PCI_XSCALE_INT_ENABLE, (temp & ~(1 << 26))); - else if (irq == IRQ_IXP2000_PCIB) + else if (d->irq == IRQ_IXP2000_PCIB) ixp2000_reg_wrb(IXP2000_PCI_XSCALE_INT_ENABLE, (temp & ~(1 << 27))); } -static void ixp2000_pci_irq_unmask(unsigned int irq) +static void ixp2000_pci_irq_unmask(struct irq_data *d) { unsigned long temp = *IXP2000_PCI_XSCALE_INT_ENABLE; - if (irq == IRQ_IXP2000_PCIA) + if (d->irq == IRQ_IXP2000_PCIA) ixp2000_reg_write(IXP2000_PCI_XSCALE_INT_ENABLE, (temp | (1 << 26))); - else if (irq == IRQ_IXP2000_PCIB) + else if (d->irq == IRQ_IXP2000_PCIB) ixp2000_reg_write(IXP2000_PCI_XSCALE_INT_ENABLE, (temp | (1 << 27))); } @@ -401,44 +407,44 @@ static void ixp2000_err_irq_handler(unsigned int irq, struct irq_desc *desc) } } -static void ixp2000_err_irq_mask(unsigned int irq) +static void ixp2000_err_irq_mask(struct irq_data *d) { ixp2000_reg_write(IXP2000_IRQ_ERR_ENABLE_CLR, - (1 << (irq - IRQ_IXP2000_DRAM0_MIN_ERR))); + (1 << (d->irq - IRQ_IXP2000_DRAM0_MIN_ERR))); } -static void ixp2000_err_irq_unmask(unsigned int irq) +static void ixp2000_err_irq_unmask(struct irq_data *d) { ixp2000_reg_write(IXP2000_IRQ_ERR_ENABLE_SET, - (1 << (irq - IRQ_IXP2000_DRAM0_MIN_ERR))); + (1 << (d->irq - IRQ_IXP2000_DRAM0_MIN_ERR))); } static struct irq_chip ixp2000_err_irq_chip = { - .ack = ixp2000_err_irq_mask, - .mask = ixp2000_err_irq_mask, - .unmask = ixp2000_err_irq_unmask + .irq_ack = ixp2000_err_irq_mask, + .irq_mask = ixp2000_err_irq_mask, + .irq_unmask = ixp2000_err_irq_unmask }; static struct irq_chip ixp2000_pci_irq_chip = { - .ack = ixp2000_pci_irq_mask, - .mask = ixp2000_pci_irq_mask, - .unmask = ixp2000_pci_irq_unmask + .irq_ack = ixp2000_pci_irq_mask, + .irq_mask = ixp2000_pci_irq_mask, + .irq_unmask = ixp2000_pci_irq_unmask }; -static void ixp2000_irq_mask(unsigned int irq) +static void ixp2000_irq_mask(struct irq_data *d) { - ixp2000_reg_wrb(IXP2000_IRQ_ENABLE_CLR, (1 << irq)); + ixp2000_reg_wrb(IXP2000_IRQ_ENABLE_CLR, (1 << d->irq)); } -static void ixp2000_irq_unmask(unsigned int irq) +static void ixp2000_irq_unmask(struct irq_data *d) { - ixp2000_reg_write(IXP2000_IRQ_ENABLE_SET, (1 << irq)); + ixp2000_reg_write(IXP2000_IRQ_ENABLE_SET, (1 << d->irq)); } static struct irq_chip ixp2000_irq_chip = { - .ack = ixp2000_irq_mask, - .mask = ixp2000_irq_mask, - .unmask = ixp2000_irq_unmask + .irq_ack = ixp2000_irq_mask, + .irq_mask = ixp2000_irq_mask, + .irq_unmask = ixp2000_irq_unmask }; void __init ixp2000_init_irq(void) diff --git a/arch/arm/mach-ixp2000/ixdp2x00.c b/arch/arm/mach-ixp2000/ixdp2x00.c index 91fffb9..7d90d3f 100644 --- a/arch/arm/mach-ixp2000/ixdp2x00.c +++ b/arch/arm/mach-ixp2000/ixdp2x00.c @@ -63,7 +63,7 @@ static struct slowport_cfg slowport_cpld_cfg = { }; #endif -static void ixdp2x00_irq_mask(unsigned int irq) +static void ixdp2x00_irq_mask(struct irq_data *d) { unsigned long dummy; static struct slowport_cfg old_cfg; @@ -78,7 +78,7 @@ static void ixdp2x00_irq_mask(unsigned int irq) #endif dummy = *board_irq_mask; - dummy |= IXP2000_BOARD_IRQ_MASK(irq); + dummy |= IXP2000_BOARD_IRQ_MASK(d->irq); ixp2000_reg_wrb(board_irq_mask, dummy); #ifdef CONFIG_ARCH_IXDP2400 @@ -87,7 +87,7 @@ static void ixdp2x00_irq_mask(unsigned int irq) #endif } -static void ixdp2x00_irq_unmask(unsigned int irq) +static void ixdp2x00_irq_unmask(struct irq_data *d) { unsigned long dummy; static struct slowport_cfg old_cfg; @@ -98,7 +98,7 @@ static void ixdp2x00_irq_unmask(unsigned int irq) #endif dummy = *board_irq_mask; - dummy &= ~IXP2000_BOARD_IRQ_MASK(irq); + dummy &= ~IXP2000_BOARD_IRQ_MASK(d->irq); ixp2000_reg_wrb(board_irq_mask, dummy); if (machine_is_ixdp2400()) @@ -111,7 +111,7 @@ static void ixdp2x00_irq_handler(unsigned int irq, struct irq_desc *desc) static struct slowport_cfg old_cfg; int i; - desc->chip->mask(irq); + desc->irq_data.chip->irq_mask(&desc->irq_data); #ifdef CONFIG_ARCH_IXDP2400 if (machine_is_ixdp2400()) @@ -133,13 +133,13 @@ static void ixdp2x00_irq_handler(unsigned int irq, struct irq_desc *desc) } } - desc->chip->unmask(irq); + desc->irq_data.chip->irq_unmask(&desc->irq_data); } static struct irq_chip ixdp2x00_cpld_irq_chip = { - .ack = ixdp2x00_irq_mask, - .mask = ixdp2x00_irq_mask, - .unmask = ixdp2x00_irq_unmask + .irq_ack = ixdp2x00_irq_mask, + .irq_mask = ixdp2x00_irq_mask, + .irq_unmask = ixdp2x00_irq_unmask }; void __init ixdp2x00_init_irq(volatile unsigned long *stat_reg, volatile unsigned long *mask_reg, unsigned long nr_of_irqs) diff --git a/arch/arm/mach-ixp2000/ixdp2x01.c b/arch/arm/mach-ixp2000/ixdp2x01.c index 6c121bd..34b1b2a 100644 --- a/arch/arm/mach-ixp2000/ixdp2x01.c +++ b/arch/arm/mach-ixp2000/ixdp2x01.c @@ -48,16 +48,16 @@ /************************************************************************* * IXDP2x01 IRQ Handling *************************************************************************/ -static void ixdp2x01_irq_mask(unsigned int irq) +static void ixdp2x01_irq_mask(struct irq_data *d) { ixp2000_reg_wrb(IXDP2X01_INT_MASK_SET_REG, - IXP2000_BOARD_IRQ_MASK(irq)); + IXP2000_BOARD_IRQ_MASK(d->irq)); } -static void ixdp2x01_irq_unmask(unsigned int irq) +static void ixdp2x01_irq_unmask(struct irq_data *d) { ixp2000_reg_write(IXDP2X01_INT_MASK_CLR_REG, - IXP2000_BOARD_IRQ_MASK(irq)); + IXP2000_BOARD_IRQ_MASK(d->irq)); } static u32 valid_irq_mask; @@ -67,7 +67,7 @@ static void ixdp2x01_irq_handler(unsigned int irq, struct irq_desc *desc) u32 ex_interrupt; int i; - desc->chip->mask(irq); + desc->irq_data.chip->irq_mask(&desc->irq_data); ex_interrupt = *IXDP2X01_INT_STAT_REG & valid_irq_mask; @@ -83,13 +83,13 @@ static void ixdp2x01_irq_handler(unsigned int irq, struct irq_desc *desc) } } - desc->chip->unmask(irq); + desc->irq_data.chip->irq_unmask(&desc->irq_data); } static struct irq_chip ixdp2x01_irq_chip = { - .mask = ixdp2x01_irq_mask, - .ack = ixdp2x01_irq_mask, - .unmask = ixdp2x01_irq_unmask + .irq_mask = ixdp2x01_irq_mask, + .irq_ack = ixdp2x01_irq_mask, + .irq_unmask = ixdp2x01_irq_unmask }; /* diff --git a/arch/arm/mach-ixp23xx/core.c b/arch/arm/mach-ixp23xx/core.c index aa4c442..9c8a339 100644 --- a/arch/arm/mach-ixp23xx/core.c +++ b/arch/arm/mach-ixp23xx/core.c @@ -111,9 +111,9 @@ enum ixp23xx_irq_type { static void ixp23xx_config_irq(unsigned int, enum ixp23xx_irq_type); -static int ixp23xx_irq_set_type(unsigned int irq, unsigned int type) +static int ixp23xx_irq_set_type(struct irq_data *d, unsigned int type) { - int line = irq - IRQ_IXP23XX_GPIO6 + 6; + int line = d->irq - IRQ_IXP23XX_GPIO6 + 6; u32 int_style; enum ixp23xx_irq_type irq_type; volatile u32 *int_reg; @@ -149,7 +149,7 @@ static int ixp23xx_irq_set_type(unsigned int irq, unsigned int type) return -EINVAL; } - ixp23xx_config_irq(irq, irq_type); + ixp23xx_config_irq(d->irq, irq_type); if (line >= 8) { /* pins 8-15 */ line -= 8; @@ -173,9 +173,10 @@ static int ixp23xx_irq_set_type(unsigned int irq, unsigned int type) return 0; } -static void ixp23xx_irq_mask(unsigned int irq) +static void ixp23xx_irq_mask(struct irq_data *d) { volatile unsigned long *intr_reg; + unsigned int irq = d->irq; if (irq >= 56) irq += 8; @@ -184,9 +185,9 @@ static void ixp23xx_irq_mask(unsigned int irq) *intr_reg &= ~(1 << (irq % 32)); } -static void ixp23xx_irq_ack(unsigned int irq) +static void ixp23xx_irq_ack(struct irq_data *d) { - int line = irq - IRQ_IXP23XX_GPIO6 + 6; + int line = d->irq - IRQ_IXP23XX_GPIO6 + 6; if ((line < 6) || (line > 15)) return; @@ -198,11 +199,12 @@ static void ixp23xx_irq_ack(unsigned int irq) * Level triggered interrupts on GPIO lines can only be cleared when the * interrupt condition disappears. */ -static void ixp23xx_irq_level_unmask(unsigned int irq) +static void ixp23xx_irq_level_unmask(struct irq_data *d) { volatile unsigned long *intr_reg; + unsigned int irq = d->irq; - ixp23xx_irq_ack(irq); + ixp23xx_irq_ack(d); if (irq >= 56) irq += 8; @@ -211,9 +213,10 @@ static void ixp23xx_irq_level_unmask(unsigned int irq) *intr_reg |= (1 << (irq % 32)); } -static void ixp23xx_irq_edge_unmask(unsigned int irq) +static void ixp23xx_irq_edge_unmask(struct irq_data *d) { volatile unsigned long *intr_reg; + unsigned int irq = d->irq; if (irq >= 56) irq += 8; @@ -223,26 +226,30 @@ static void ixp23xx_irq_edge_unmask(unsigned int irq) } static struct irq_chip ixp23xx_irq_level_chip = { - .ack = ixp23xx_irq_mask, - .mask = ixp23xx_irq_mask, - .unmask = ixp23xx_irq_level_unmask, - .set_type = ixp23xx_irq_set_type + .irq_ack = ixp23xx_irq_mask, + .irq_mask = ixp23xx_irq_mask, + .irq_unmask = ixp23xx_irq_level_unmask, + .irq_set_type = ixp23xx_irq_set_type }; static struct irq_chip ixp23xx_irq_edge_chip = { - .ack = ixp23xx_irq_ack, - .mask = ixp23xx_irq_mask, - .unmask = ixp23xx_irq_edge_unmask, - .set_type = ixp23xx_irq_set_type + .irq_ack = ixp23xx_irq_ack, + .irq_mask = ixp23xx_irq_mask, + .irq_unmask = ixp23xx_irq_edge_unmask, + .irq_set_type = ixp23xx_irq_set_type }; -static void ixp23xx_pci_irq_mask(unsigned int irq) +static void ixp23xx_pci_irq_mask(struct irq_data *d) { + unsigned int irq = d->irq; + *IXP23XX_PCI_XSCALE_INT_ENABLE &= ~(1 << (IRQ_IXP23XX_INTA + 27 - irq)); } -static void ixp23xx_pci_irq_unmask(unsigned int irq) +static void ixp23xx_pci_irq_unmask(struct irq_data *d) { + unsigned int irq = d->irq; + *IXP23XX_PCI_XSCALE_INT_ENABLE |= (1 << (IRQ_IXP23XX_INTA + 27 - irq)); } @@ -256,7 +263,7 @@ static void pci_handler(unsigned int irq, struct irq_desc *desc) pci_interrupt = *IXP23XX_PCI_XSCALE_INT_STATUS; - desc->chip->ack(irq); + desc->irq_data.chip->irq_ack(&desc->irq_data); /* See which PCI_INTA, or PCI_INTB interrupted */ if (pci_interrupt & (1 << 26)) { @@ -269,13 +276,13 @@ static void pci_handler(unsigned int irq, struct irq_desc *desc) generic_handle_irq(irqno); - desc->chip->unmask(irq); + desc->irq_data.chip->irq_unmask(&desc->irq_data); } static struct irq_chip ixp23xx_pci_irq_chip = { - .ack = ixp23xx_pci_irq_mask, - .mask = ixp23xx_pci_irq_mask, - .unmask = ixp23xx_pci_irq_unmask + .irq_ack = ixp23xx_pci_irq_mask, + .irq_mask = ixp23xx_pci_irq_mask, + .irq_unmask = ixp23xx_pci_irq_unmask }; static void ixp23xx_config_irq(unsigned int irq, enum ixp23xx_irq_type type) diff --git a/arch/arm/mach-ixp23xx/ixdp2351.c b/arch/arm/mach-ixp23xx/ixdp2351.c index 664e39c..181116a 100644 --- a/arch/arm/mach-ixp23xx/ixdp2351.c +++ b/arch/arm/mach-ixp23xx/ixdp2351.c @@ -48,14 +48,14 @@ /* * IXDP2351 Interrupt Handling */ -static void ixdp2351_inta_mask(unsigned int irq) +static void ixdp2351_inta_mask(struct irq_data *d) { - *IXDP2351_CPLD_INTA_MASK_SET_REG = IXDP2351_INTA_IRQ_MASK(irq); + *IXDP2351_CPLD_INTA_MASK_SET_REG = IXDP2351_INTA_IRQ_MASK(d->irq); } -static void ixdp2351_inta_unmask(unsigned int irq) +static void ixdp2351_inta_unmask(struct irq_data *d) { - *IXDP2351_CPLD_INTA_MASK_CLR_REG = IXDP2351_INTA_IRQ_MASK(irq); + *IXDP2351_CPLD_INTA_MASK_CLR_REG = IXDP2351_INTA_IRQ_MASK(d->irq); } static void ixdp2351_inta_handler(unsigned int irq, struct irq_desc *desc) @@ -64,7 +64,7 @@ static void ixdp2351_inta_handler(unsigned int irq, struct irq_desc *desc) *IXDP2351_CPLD_INTA_STAT_REG & IXDP2351_INTA_IRQ_VALID; int i; - desc->chip->mask(irq); + desc->irq_data.chip->irq_mask(&desc->irq_data); for (i = 0; i < IXDP2351_INTA_IRQ_NUM; i++) { if (ex_interrupt & (1 << i)) { @@ -74,23 +74,23 @@ static void ixdp2351_inta_handler(unsigned int irq, struct irq_desc *desc) } } - desc->chip->unmask(irq); + desc->irq_data.chip->irq_unmask(&desc->irq_data); } static struct irq_chip ixdp2351_inta_chip = { - .ack = ixdp2351_inta_mask, - .mask = ixdp2351_inta_mask, - .unmask = ixdp2351_inta_unmask + .irq_ack = ixdp2351_inta_mask, + .irq_mask = ixdp2351_inta_mask, + .irq_unmask = ixdp2351_inta_unmask }; -static void ixdp2351_intb_mask(unsigned int irq) +static void ixdp2351_intb_mask(struct irq_data *d) { - *IXDP2351_CPLD_INTB_MASK_SET_REG = IXDP2351_INTB_IRQ_MASK(irq); + *IXDP2351_CPLD_INTB_MASK_SET_REG = IXDP2351_INTB_IRQ_MASK(d->irq); } -static void ixdp2351_intb_unmask(unsigned int irq) +static void ixdp2351_intb_unmask(struct irq_data *d) { - *IXDP2351_CPLD_INTB_MASK_CLR_REG = IXDP2351_INTB_IRQ_MASK(irq); + *IXDP2351_CPLD_INTB_MASK_CLR_REG = IXDP2351_INTB_IRQ_MASK(d->irq); } static void ixdp2351_intb_handler(unsigned int irq, struct irq_desc *desc) @@ -99,7 +99,7 @@ static void ixdp2351_intb_handler(unsigned int irq, struct irq_desc *desc) *IXDP2351_CPLD_INTB_STAT_REG & IXDP2351_INTB_IRQ_VALID; int i; - desc->chip->ack(irq); + desc->irq_data.chip->irq_ack(&desc->irq_data); for (i = 0; i < IXDP2351_INTB_IRQ_NUM; i++) { if (ex_interrupt & (1 << i)) { @@ -109,13 +109,13 @@ static void ixdp2351_intb_handler(unsigned int irq, struct irq_desc *desc) } } - desc->chip->unmask(irq); + desc->irq_data.chip->irq_unmask(&desc->irq_data); } static struct irq_chip ixdp2351_intb_chip = { - .ack = ixdp2351_intb_mask, - .mask = ixdp2351_intb_mask, - .unmask = ixdp2351_intb_unmask + .irq_ack = ixdp2351_intb_mask, + .irq_mask = ixdp2351_intb_mask, + .irq_unmask = ixdp2351_intb_unmask }; void __init ixdp2351_init_irq(void) diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c index 4dbfcbb..4dc68d6 100644 --- a/arch/arm/mach-ixp4xx/common.c +++ b/arch/arm/mach-ixp4xx/common.c @@ -128,9 +128,9 @@ int irq_to_gpio(unsigned int irq) } EXPORT_SYMBOL(irq_to_gpio); -static int ixp4xx_set_irq_type(unsigned int irq, unsigned int type) +static int ixp4xx_set_irq_type(struct irq_data *d, unsigned int type) { - int line = irq2gpio[irq]; + int line = irq2gpio[d->irq]; u32 int_style; enum ixp4xx_irq_type irq_type; volatile u32 *int_reg; @@ -167,9 +167,9 @@ static int ixp4xx_set_irq_type(unsigned int irq, unsigned int type) } if (irq_type == IXP4XX_IRQ_EDGE) - ixp4xx_irq_edge |= (1 << irq); + ixp4xx_irq_edge |= (1 << d->irq); else - ixp4xx_irq_edge &= ~(1 << irq); + ixp4xx_irq_edge &= ~(1 << d->irq); if (line >= 8) { /* pins 8-15 */ line -= 8; @@ -188,22 +188,22 @@ static int ixp4xx_set_irq_type(unsigned int irq, unsigned int type) *int_reg |= (int_style << (line * IXP4XX_GPIO_STYLE_SIZE)); /* Configure the line as an input */ - gpio_line_config(irq2gpio[irq], IXP4XX_GPIO_IN); + gpio_line_config(irq2gpio[d->irq], IXP4XX_GPIO_IN); return 0; } -static void ixp4xx_irq_mask(unsigned int irq) +static void ixp4xx_irq_mask(struct irq_data *d) { - if ((cpu_is_ixp46x() || cpu_is_ixp43x()) && irq >= 32) - *IXP4XX_ICMR2 &= ~(1 << (irq - 32)); + if ((cpu_is_ixp46x() || cpu_is_ixp43x()) && d->irq >= 32) + *IXP4XX_ICMR2 &= ~(1 << (d->irq - 32)); else - *IXP4XX_ICMR &= ~(1 << irq); + *IXP4XX_ICMR &= ~(1 << d->irq); } -static void ixp4xx_irq_ack(unsigned int irq) +static void ixp4xx_irq_ack(struct irq_data *d) { - int line = (irq < 32) ? irq2gpio[irq] : -1; + int line = (d->irq < 32) ? irq2gpio[d->irq] : -1; if (line >= 0) *IXP4XX_GPIO_GPISR = (1 << line); @@ -213,23 +213,23 @@ static void ixp4xx_irq_ack(unsigned int irq) * Level triggered interrupts on GPIO lines can only be cleared when the * interrupt condition disappears. */ -static void ixp4xx_irq_unmask(unsigned int irq) +static void ixp4xx_irq_unmask(struct irq_data *d) { - if (!(ixp4xx_irq_edge & (1 << irq))) - ixp4xx_irq_ack(irq); + if (!(ixp4xx_irq_edge & (1 << d->irq))) + ixp4xx_irq_ack(d); - if ((cpu_is_ixp46x() || cpu_is_ixp43x()) && irq >= 32) - *IXP4XX_ICMR2 |= (1 << (irq - 32)); + if ((cpu_is_ixp46x() || cpu_is_ixp43x()) && d->irq >= 32) + *IXP4XX_ICMR2 |= (1 << (d->irq - 32)); else - *IXP4XX_ICMR |= (1 << irq); + *IXP4XX_ICMR |= (1 << d->irq); } static struct irq_chip ixp4xx_irq_chip = { .name = "IXP4xx", - .ack = ixp4xx_irq_ack, - .mask = ixp4xx_irq_mask, - .unmask = ixp4xx_irq_unmask, - .set_type = ixp4xx_set_irq_type, + .irq_ack = ixp4xx_irq_ack, + .irq_mask = ixp4xx_irq_mask, + .irq_unmask = ixp4xx_irq_unmask, + .irq_set_type = ixp4xx_set_irq_type, }; void __init ixp4xx_init_irq(void) diff --git a/arch/arm/mach-ks8695/irq.c b/arch/arm/mach-ks8695/irq.c index e375c1d..7998cca 100644 --- a/arch/arm/mach-ks8695/irq.c +++ b/arch/arm/mach-ks8695/irq.c @@ -34,29 +34,29 @@ #include <mach/regs-irq.h> #include <mach/regs-gpio.h> -static void ks8695_irq_mask(unsigned int irqno) +static void ks8695_irq_mask(struct irq_data *d) { unsigned long inten; inten = __raw_readl(KS8695_IRQ_VA + KS8695_INTEN); - inten &= ~(1 << irqno); + inten &= ~(1 << d->irq); __raw_writel(inten, KS8695_IRQ_VA + KS8695_INTEN); } -static void ks8695_irq_unmask(unsigned int irqno) +static void ks8695_irq_unmask(struct irq_data *d) { unsigned long inten; inten = __raw_readl(KS8695_IRQ_VA + KS8695_INTEN); - inten |= (1 << irqno); + inten |= (1 << d->irq); __raw_writel(inten, KS8695_IRQ_VA + KS8695_INTEN); } -static void ks8695_irq_ack(unsigned int irqno) +static void ks8695_irq_ack(struct irq_data *d) { - __raw_writel((1 << irqno), KS8695_IRQ_VA + KS8695_INTST); + __raw_writel((1 << d->irq), KS8695_IRQ_VA + KS8695_INTST); } @@ -64,7 +64,7 @@ static struct irq_chip ks8695_irq_level_chip; static struct irq_chip ks8695_irq_edge_chip; -static int ks8695_irq_set_type(unsigned int irqno, unsigned int type) +static int ks8695_irq_set_type(struct irq_data *d, unsigned int type) { unsigned long ctrl, mode; unsigned short level_triggered = 0; @@ -93,7 +93,7 @@ static int ks8695_irq_set_type(unsigned int irqno, unsigned int type) return -EINVAL; } - switch (irqno) { + switch (d->irq) { case KS8695_IRQ_EXTERN0: ctrl &= ~IOPC_IOEINT0TM; ctrl |= IOPC_IOEINT0_MODE(mode); @@ -115,12 +115,12 @@ static int ks8695_irq_set_type(unsigned int irqno, unsigned int type) } if (level_triggered) { - set_irq_chip(irqno, &ks8695_irq_level_chip); - set_irq_handler(irqno, handle_level_irq); + set_irq_chip(d->irq, &ks8695_irq_level_chip); + set_irq_handler(d->irq, handle_level_irq); } else { - set_irq_chip(irqno, &ks8695_irq_edge_chip); - set_irq_handler(irqno, handle_edge_irq); + set_irq_chip(d->irq, &ks8695_irq_edge_chip); + set_irq_handler(d->irq, handle_edge_irq); } __raw_writel(ctrl, KS8695_GPIO_VA + KS8695_IOPC); @@ -128,17 +128,17 @@ static int ks8695_irq_set_type(unsigned int irqno, unsigned int type) } static struct irq_chip ks8695_irq_level_chip = { - .ack = ks8695_irq_mask, - .mask = ks8695_irq_mask, - .unmask = ks8695_irq_unmask, - .set_type = ks8695_irq_set_type, + .irq_ack = ks8695_irq_mask, + .irq_mask = ks8695_irq_mask, + .irq_unmask = ks8695_irq_unmask, + .irq_set_type = ks8695_irq_set_type, }; static struct irq_chip ks8695_irq_edge_chip = { - .ack = ks8695_irq_ack, - .mask = ks8695_irq_mask, - .unmask = ks8695_irq_unmask, - .set_type = ks8695_irq_set_type, + .irq_ack = ks8695_irq_ack, + .irq_mask = ks8695_irq_mask, + .irq_unmask = ks8695_irq_unmask, + .irq_set_type = ks8695_irq_set_type, }; void __init ks8695_init_irq(void) @@ -164,7 +164,8 @@ void __init ks8695_init_irq(void) /* Edge-triggered interrupts */ default: - ks8695_irq_ack(irq); /* clear pending bit */ + /* clear pending bit */ + ks8695_irq_ack(irq_get_irq_data(irq)); set_irq_chip(irq, &ks8695_irq_edge_chip); set_irq_handler(irq, handle_edge_irq); } diff --git a/arch/arm/mach-lh7a40x/arch-kev7a400.c b/arch/arm/mach-lh7a40x/arch-kev7a400.c index 9088c166..71129c3 100644 --- a/arch/arm/mach-lh7a40x/arch-kev7a400.c +++ b/arch/arm/mach-lh7a40x/arch-kev7a400.c @@ -46,28 +46,28 @@ void __init kev7a400_map_io(void) static u16 CPLD_IRQ_mask; /* Mask for CPLD IRQs, 1 == unmasked */ -static void kev7a400_ack_cpld_irq (u32 irq) +static void kev7a400_ack_cpld_irq(struct irq_data *d) { - CPLD_CL_INT = 1 << (irq - IRQ_KEV7A400_CPLD); + CPLD_CL_INT = 1 << (d->irq - IRQ_KEV7A400_CPLD); } -static void kev7a400_mask_cpld_irq (u32 irq) +static void kev7a400_mask_cpld_irq(struct irq_data *d) { - CPLD_IRQ_mask &= ~(1 << (irq - IRQ_KEV7A400_CPLD)); + CPLD_IRQ_mask &= ~(1 << (d->irq - IRQ_KEV7A400_CPLD)); CPLD_WR_PB_INT_MASK = CPLD_IRQ_mask; } -static void kev7a400_unmask_cpld_irq (u32 irq) +static void kev7a400_unmask_cpld_irq(struct irq_data *d) { - CPLD_IRQ_mask |= 1 << (irq - IRQ_KEV7A400_CPLD); + CPLD_IRQ_mask |= 1 << (d->irq - IRQ_KEV7A400_CPLD); CPLD_WR_PB_INT_MASK = CPLD_IRQ_mask; } static struct irq_chip kev7a400_cpld_chip = { - .name = "CPLD", - .ack = kev7a400_ack_cpld_irq, - .mask = kev7a400_mask_cpld_irq, - .unmask = kev7a400_unmask_cpld_irq, + .name = "CPLD", + .irq_ack = kev7a400_ack_cpld_irq, + .irq_mask = kev7a400_mask_cpld_irq, + .irq_unmask = kev7a400_unmask_cpld_irq, }; diff --git a/arch/arm/mach-lh7a40x/arch-lpd7a40x.c b/arch/arm/mach-lh7a40x/arch-lpd7a40x.c index 7315a56..e735546 100644 --- a/arch/arm/mach-lh7a40x/arch-lpd7a40x.c +++ b/arch/arm/mach-lh7a40x/arch-lpd7a40x.c @@ -159,7 +159,7 @@ static void __init lpd7a40x_init (void) #endif } -static void lh7a40x_ack_cpld_irq (u32 irq) +static void lh7a40x_ack_cpld_irq(struct irq_data *d) { /* CPLD doesn't have ack capability, but some devices may */ @@ -167,14 +167,14 @@ static void lh7a40x_ack_cpld_irq (u32 irq) /* The touch control *must* mask the interrupt because the * interrupt bit is read by the driver to determine if the pen * is still down. */ - if (irq == IRQ_TOUCH) + if (d->irq == IRQ_TOUCH) CPLD_INTERRUPTS |= CPLD_INTMASK_TOUCH; #endif } -static void lh7a40x_mask_cpld_irq (u32 irq) +static void lh7a40x_mask_cpld_irq(struct irq_data *d) { - switch (irq) { + switch (d->irq) { case IRQ_LPD7A40X_ETH_INT: CPLD_INTERRUPTS |= CPLD_INTMASK_ETHERNET; break; @@ -186,9 +186,9 @@ static void lh7a40x_mask_cpld_irq (u32 irq) } } -static void lh7a40x_unmask_cpld_irq (u32 irq) +static void lh7a40x_unmask_cpld_irq(struct irq_data *d) { - switch (irq) { + switch (d->irq) { case IRQ_LPD7A40X_ETH_INT: CPLD_INTERRUPTS &= ~CPLD_INTMASK_ETHERNET; break; @@ -201,17 +201,17 @@ static void lh7a40x_unmask_cpld_irq (u32 irq) } static struct irq_chip lpd7a40x_cpld_chip = { - .name = "CPLD", - .ack = lh7a40x_ack_cpld_irq, - .mask = lh7a40x_mask_cpld_irq, - .unmask = lh7a40x_unmask_cpld_irq, + .name = "CPLD", + .irq_ack = lh7a40x_ack_cpld_irq, + .irq_mask = lh7a40x_mask_cpld_irq, + .irq_unmask = lh7a40x_unmask_cpld_irq, }; static void lpd7a40x_cpld_handler (unsigned int irq, struct irq_desc *desc) { unsigned int mask = CPLD_INTERRUPTS; - desc->chip->ack (irq); + desc->irq_data.chip->irq_ack(&desc->irq_data); if ((mask & (1<<0)) == 0) /* WLAN */ generic_handle_irq(IRQ_LPD7A40X_ETH_INT); @@ -221,7 +221,8 @@ static void lpd7a40x_cpld_handler (unsigned int irq, struct irq_desc *desc) generic_handle_irq(IRQ_TOUCH); #endif - desc->chip->unmask (irq); /* Level-triggered need this */ + /* Level-triggered need this */ + desc->irq_data.chip->irq_unmask(&desc->irq_data); } diff --git a/arch/arm/mach-lh7a40x/irq-lh7a400.c b/arch/arm/mach-lh7a40x/irq-lh7a400.c index 1ad3afc..f2e7e65 100644 --- a/arch/arm/mach-lh7a40x/irq-lh7a400.c +++ b/arch/arm/mach-lh7a40x/irq-lh7a400.c @@ -21,34 +21,34 @@ /* CPU IRQ handling */ -static void lh7a400_mask_irq (u32 irq) +static void lh7a400_mask_irq(struct irq_data *d) { - INTC_INTENC = (1 << irq); + INTC_INTENC = (1 << d->irq); } -static void lh7a400_unmask_irq (u32 irq) +static void lh7a400_unmask_irq(struct irq_data *d) { - INTC_INTENS = (1 << irq); + INTC_INTENS = (1 << d->irq); } -static void lh7a400_ack_gpio_irq (u32 irq) +static void lh7a400_ack_gpio_irq(struct irq_data *d) { - GPIO_GPIOFEOI = (1 << IRQ_TO_GPIO (irq)); - INTC_INTENC = (1 << irq); + GPIO_GPIOFEOI = (1 << IRQ_TO_GPIO (d->irq)); + INTC_INTENC = (1 << d->irq); } static struct irq_chip lh7a400_internal_chip = { - .name = "MPU", - .ack = lh7a400_mask_irq, /* Level triggering -> mask is ack */ - .mask = lh7a400_mask_irq, - .unmask = lh7a400_unmask_irq, + .name = "MPU", + .irq_ack = lh7a400_mask_irq, /* Level triggering -> mask is ack */ + .irq_mask = lh7a400_mask_irq, + .irq_unmask = lh7a400_unmask_irq, }; static struct irq_chip lh7a400_gpio_chip = { - .name = "GPIO", - .ack = lh7a400_ack_gpio_irq, - .mask = lh7a400_mask_irq, - .unmask = lh7a400_unmask_irq, + .name = "GPIO", + .irq_ack = lh7a400_ack_gpio_irq, + .irq_mask = lh7a400_mask_irq, + .irq_unmask = lh7a400_unmask_irq, }; diff --git a/arch/arm/mach-lh7a40x/irq-lh7a404.c b/arch/arm/mach-lh7a40x/irq-lh7a404.c index 12b045b..14b1733 100644 --- a/arch/arm/mach-lh7a40x/irq-lh7a404.c +++ b/arch/arm/mach-lh7a40x/irq-lh7a404.c @@ -43,64 +43,64 @@ static unsigned char irq_pri_vic2[] = { /* CPU IRQ handling */ -static void lh7a404_vic1_mask_irq (u32 irq) +static void lh7a404_vic1_mask_irq(struct irq_data *d) { - VIC1_INTENCLR = (1 << irq); + VIC1_INTENCLR = (1 << d->irq); } -static void lh7a404_vic1_unmask_irq (u32 irq) +static void lh7a404_vic1_unmask_irq(struct irq_data *d) { - VIC1_INTEN = (1 << irq); + VIC1_INTEN = (1 << d->irq); } -static void lh7a404_vic2_mask_irq (u32 irq) +static void lh7a404_vic2_mask_irq(struct irq_data *d) { - VIC2_INTENCLR = (1 << (irq - 32)); + VIC2_INTENCLR = (1 << (d->irq - 32)); } -static void lh7a404_vic2_unmask_irq (u32 irq) +static void lh7a404_vic2_unmask_irq(struct irq_data *d) { - VIC2_INTEN = (1 << (irq - 32)); + VIC2_INTEN = (1 << (d->irq - 32)); } -static void lh7a404_vic1_ack_gpio_irq (u32 irq) +static void lh7a404_vic1_ack_gpio_irq(struct irq_data *d) { - GPIO_GPIOFEOI = (1 << IRQ_TO_GPIO (irq)); - VIC1_INTENCLR = (1 << irq); + GPIO_GPIOFEOI = (1 << IRQ_TO_GPIO (d->irq)); + VIC1_INTENCLR = (1 << d->irq); } -static void lh7a404_vic2_ack_gpio_irq (u32 irq) +static void lh7a404_vic2_ack_gpio_irq(struct irq_data *d) { - GPIO_GPIOFEOI = (1 << IRQ_TO_GPIO (irq)); - VIC2_INTENCLR = (1 << irq); + GPIO_GPIOFEOI = (1 << IRQ_TO_GPIO (d->irq)); + VIC2_INTENCLR = (1 << d->irq); } static struct irq_chip lh7a404_vic1_chip = { - .name = "VIC1", - .ack = lh7a404_vic1_mask_irq, /* Because level-triggered */ - .mask = lh7a404_vic1_mask_irq, - .unmask = lh7a404_vic1_unmask_irq, + .name = "VIC1", + .irq_ack = lh7a404_vic1_mask_irq, /* Because level-triggered */ + .irq_mask = lh7a404_vic1_mask_irq, + .irq_unmask = lh7a404_vic1_unmask_irq, }; static struct irq_chip lh7a404_vic2_chip = { - .name = "VIC2", - .ack = lh7a404_vic2_mask_irq, /* Because level-triggered */ - .mask = lh7a404_vic2_mask_irq, - .unmask = lh7a404_vic2_unmask_irq, + .name = "VIC2", + .irq_ack = lh7a404_vic2_mask_irq, /* Because level-triggered */ + .irq_mask = lh7a404_vic2_mask_irq, + .irq_unmask = lh7a404_vic2_unmask_irq, }; static struct irq_chip lh7a404_gpio_vic1_chip = { - .name = "GPIO-VIC1", - .ack = lh7a404_vic1_ack_gpio_irq, - .mask = lh7a404_vic1_mask_irq, - .unmask = lh7a404_vic1_unmask_irq, + .name = "GPIO-VIC1", + .irq_ack = lh7a404_vic1_ack_gpio_irq, + .irq_mask = lh7a404_vic1_mask_irq, + .irq_unmask = lh7a404_vic1_unmask_irq, }; static struct irq_chip lh7a404_gpio_vic2_chip = { - .name = "GPIO-VIC2", - .ack = lh7a404_vic2_ack_gpio_irq, - .mask = lh7a404_vic2_mask_irq, - .unmask = lh7a404_vic2_unmask_irq, + .name = "GPIO-VIC2", + .irq_ack = lh7a404_vic2_ack_gpio_irq, + .irq_mask = lh7a404_vic2_mask_irq, + .irq_unmask = lh7a404_vic2_unmask_irq, }; /* IRQ initialization */ diff --git a/arch/arm/mach-lh7a40x/irq-lpd7a40x.c b/arch/arm/mach-lh7a40x/irq-lpd7a40x.c index fd033bb..1bfdcdd 100644 --- a/arch/arm/mach-lh7a40x/irq-lpd7a40x.c +++ b/arch/arm/mach-lh7a40x/irq-lpd7a40x.c @@ -20,14 +20,14 @@ #include "common.h" -static void lh7a40x_ack_cpld_irq (u32 irq) +static void lh7a40x_ack_cpld_irq(struct irq_data *d) { /* CPLD doesn't have ack capability */ } -static void lh7a40x_mask_cpld_irq (u32 irq) +static void lh7a40x_mask_cpld_irq(struct irq_data *d) { - switch (irq) { + switch (d->irq) { case IRQ_LPD7A40X_ETH_INT: CPLD_INTERRUPTS = CPLD_INTERRUPTS | 0x4; break; @@ -37,9 +37,9 @@ static void lh7a40x_mask_cpld_irq (u32 irq) } } -static void lh7a40x_unmask_cpld_irq (u32 irq) +static void lh7a40x_unmask_cpld_irq(struct irq_data *d) { - switch (irq) { + switch (d->irq) { case IRQ_LPD7A40X_ETH_INT: CPLD_INTERRUPTS = CPLD_INTERRUPTS & ~ 0x4; break; @@ -50,17 +50,17 @@ static void lh7a40x_unmask_cpld_irq (u32 irq) } static struct irq_chip lh7a40x_cpld_chip = { - .name = "CPLD", - .ack = lh7a40x_ack_cpld_irq, - .mask = lh7a40x_mask_cpld_irq, - .unmask = lh7a40x_unmask_cpld_irq, + .name = "CPLD", + .irq_ack = lh7a40x_ack_cpld_irq, + .irq_mask = lh7a40x_mask_cpld_irq, + .irq_unmask = lh7a40x_unmask_cpld_irq, }; static void lh7a40x_cpld_handler (unsigned int irq, struct irq_desc *desc) { unsigned int mask = CPLD_INTERRUPTS; - desc->chip->ack (irq); + desc->irq_data.chip->ack (irq); if ((mask & 0x1) == 0) /* WLAN */ generic_handle_irq(IRQ_LPD7A40X_ETH_INT); @@ -68,7 +68,7 @@ static void lh7a40x_cpld_handler (unsigned int irq, struct irq_desc *desc) if ((mask & 0x2) == 0) /* Touch */ generic_handle_irq(IRQ_LPD7A400_TS); - desc->chip->unmask (irq); /* Level-triggered need this */ + desc->irq_data.chip->unmask (irq); /* Level-triggered need this */ } diff --git a/arch/arm/mach-lpc32xx/irq.c b/arch/arm/mach-lpc32xx/irq.c index bd0df26..316ecbf 100644 --- a/arch/arm/mach-lpc32xx/irq.c +++ b/arch/arm/mach-lpc32xx/irq.c @@ -191,38 +191,38 @@ static void get_controller(unsigned int irq, unsigned int *base, } } -static void lpc32xx_mask_irq(unsigned int irq) +static void lpc32xx_mask_irq(struct irq_data *d) { unsigned int reg, ctrl, mask; - get_controller(irq, &ctrl, &mask); + get_controller(d->irq, &ctrl, &mask); reg = __raw_readl(LPC32XX_INTC_MASK(ctrl)) & ~mask; __raw_writel(reg, LPC32XX_INTC_MASK(ctrl)); } -static void lpc32xx_unmask_irq(unsigned int irq) +static void lpc32xx_unmask_irq(struct irq_data *d) { unsigned int reg, ctrl, mask; - get_controller(irq, &ctrl, &mask); + get_controller(d->irq, &ctrl, &mask); reg = __raw_readl(LPC32XX_INTC_MASK(ctrl)) | mask; __raw_writel(reg, LPC32XX_INTC_MASK(ctrl)); } -static void lpc32xx_ack_irq(unsigned int irq) +static void lpc32xx_ack_irq(struct irq_data *d) { unsigned int ctrl, mask; - get_controller(irq, &ctrl, &mask); + get_controller(d->irq, &ctrl, &mask); __raw_writel(mask, LPC32XX_INTC_RAW_STAT(ctrl)); /* Also need to clear pending wake event */ - if (lpc32xx_events[irq].mask != 0) - __raw_writel(lpc32xx_events[irq].mask, - lpc32xx_events[irq].event_group->rawstat_reg); + if (lpc32xx_events[d->irq].mask != 0) + __raw_writel(lpc32xx_events[d->irq].mask, + lpc32xx_events[d->irq].event_group->rawstat_reg); } static void __lpc32xx_set_irq_type(unsigned int irq, int use_high_level, @@ -261,27 +261,27 @@ static void __lpc32xx_set_irq_type(unsigned int irq, int use_high_level, } } -static int lpc32xx_set_irq_type(unsigned int irq, unsigned int type) +static int lpc32xx_set_irq_type(struct irq_data *d, unsigned int type) { switch (type) { case IRQ_TYPE_EDGE_RISING: /* Rising edge sensitive */ - __lpc32xx_set_irq_type(irq, 1, 1); + __lpc32xx_set_irq_type(d->irq, 1, 1); break; case IRQ_TYPE_EDGE_FALLING: /* Falling edge sensitive */ - __lpc32xx_set_irq_type(irq, 0, 1); + __lpc32xx_set_irq_type(d->irq, 0, 1); break; case IRQ_TYPE_LEVEL_LOW: /* Low level sensitive */ - __lpc32xx_set_irq_type(irq, 0, 0); + __lpc32xx_set_irq_type(d->irq, 0, 0); break; case IRQ_TYPE_LEVEL_HIGH: /* High level sensitive */ - __lpc32xx_set_irq_type(irq, 1, 0); + __lpc32xx_set_irq_type(d->irq, 1, 0); break; /* Other modes are not supported */ @@ -290,33 +290,33 @@ static int lpc32xx_set_irq_type(unsigned int irq, unsigned int type) } /* Ok to use the level handler for all types */ - set_irq_handler(irq, handle_level_irq); + set_irq_handler(d->irq, handle_level_irq); return 0; } -static int lpc32xx_irq_wake(unsigned int irqno, unsigned int state) +static int lpc32xx_irq_wake(struct irq_data *d, unsigned int state) { unsigned long eventreg; - if (lpc32xx_events[irqno].mask != 0) { - eventreg = __raw_readl(lpc32xx_events[irqno]. + if (lpc32xx_events[d->irq].mask != 0) { + eventreg = __raw_readl(lpc32xx_events[d->irq]. event_group->enab_reg); if (state) - eventreg |= lpc32xx_events[irqno].mask; + eventreg |= lpc32xx_events[d->irq].mask; else - eventreg &= ~lpc32xx_events[irqno].mask; + eventreg &= ~lpc32xx_events[d->irq].mask; __raw_writel(eventreg, - lpc32xx_events[irqno].event_group->enab_reg); + lpc32xx_events[d->irq].event_group->enab_reg); return 0; } /* Clear event */ - __raw_writel(lpc32xx_events[irqno].mask, - lpc32xx_events[irqno].event_group->rawstat_reg); + __raw_writel(lpc32xx_events[d->irq].mask, + lpc32xx_events[d->irq].event_group->rawstat_reg); return -ENODEV; } @@ -336,11 +336,11 @@ static void __init lpc32xx_set_default_mappings(unsigned int apr, } static struct irq_chip lpc32xx_irq_chip = { - .ack = lpc32xx_ack_irq, - .mask = lpc32xx_mask_irq, - .unmask = lpc32xx_unmask_irq, - .set_type = lpc32xx_set_irq_type, - .set_wake = lpc32xx_irq_wake + .irq_ack = lpc32xx_ack_irq, + .irq_mask = lpc32xx_mask_irq, + .irq_unmask = lpc32xx_unmask_irq, + .irq_set_type = lpc32xx_set_irq_type, + .irq_set_wake = lpc32xx_irq_wake }; static void lpc32xx_sic1_handler(unsigned int irq, struct irq_desc *desc) diff --git a/arch/arm/mach-mmp/include/mach/mfp-mmp2.h b/arch/arm/mach-mmp/include/mach/mfp-mmp2.h index 117e303..4ad3862 100644 --- a/arch/arm/mach-mmp/include/mach/mfp-mmp2.h +++ b/arch/arm/mach-mmp/include/mach/mfp-mmp2.h @@ -6,7 +6,7 @@ #define MFP_DRIVE_VERY_SLOW (0x0 << 13) #define MFP_DRIVE_SLOW (0x2 << 13) #define MFP_DRIVE_MEDIUM (0x4 << 13) -#define MFP_DRIVE_FAST (0x8 << 13) +#define MFP_DRIVE_FAST (0x6 << 13) /* GPIO */ #define GPIO0_GPIO MFP_CFG(GPIO0, AF0) diff --git a/arch/arm/mach-mmp/include/mach/mfp-pxa910.h b/arch/arm/mach-mmp/include/mach/mfp-pxa910.h index 7e8a80f..fbd7ee8 100644 --- a/arch/arm/mach-mmp/include/mach/mfp-pxa910.h +++ b/arch/arm/mach-mmp/include/mach/mfp-pxa910.h @@ -6,7 +6,7 @@ #define MFP_DRIVE_VERY_SLOW (0x0 << 13) #define MFP_DRIVE_SLOW (0x2 << 13) #define MFP_DRIVE_MEDIUM (0x4 << 13) -#define MFP_DRIVE_FAST (0x8 << 13) +#define MFP_DRIVE_FAST (0x6 << 13) /* UART2 */ #define GPIO47_UART2_RXD MFP_CFG(GPIO47, AF6) diff --git a/arch/arm/mach-mmp/irq-mmp2.c b/arch/arm/mach-mmp/irq-mmp2.c index 01342be..fa03703 100644 --- a/arch/arm/mach-mmp/irq-mmp2.c +++ b/arch/arm/mach-mmp/irq-mmp2.c @@ -20,48 +20,48 @@ #include "common.h" -static void icu_mask_irq(unsigned int irq) +static void icu_mask_irq(struct irq_data *d) { - uint32_t r = __raw_readl(ICU_INT_CONF(irq)); + uint32_t r = __raw_readl(ICU_INT_CONF(d->irq)); r &= ~ICU_INT_ROUTE_PJ4_IRQ; - __raw_writel(r, ICU_INT_CONF(irq)); + __raw_writel(r, ICU_INT_CONF(d->irq)); } -static void icu_unmask_irq(unsigned int irq) +static void icu_unmask_irq(struct irq_data *d) { - uint32_t r = __raw_readl(ICU_INT_CONF(irq)); + uint32_t r = __raw_readl(ICU_INT_CONF(d->irq)); r |= ICU_INT_ROUTE_PJ4_IRQ; - __raw_writel(r, ICU_INT_CONF(irq)); + __raw_writel(r, ICU_INT_CONF(d->irq)); } static struct irq_chip icu_irq_chip = { .name = "icu_irq", - .mask = icu_mask_irq, - .mask_ack = icu_mask_irq, - .unmask = icu_unmask_irq, + .irq_mask = icu_mask_irq, + .irq_mask_ack = icu_mask_irq, + .irq_unmask = icu_unmask_irq, }; -static void pmic_irq_ack(unsigned int irq) +static void pmic_irq_ack(struct irq_data *d) { - if (irq == IRQ_MMP2_PMIC) + if (d->irq == IRQ_MMP2_PMIC) mmp2_clear_pmic_int(); } #define SECOND_IRQ_MASK(_name_, irq_base, prefix) \ -static void _name_##_mask_irq(unsigned int irq) \ +static void _name_##_mask_irq(struct irq_data *d) \ { \ uint32_t r; \ - r = __raw_readl(prefix##_MASK) | (1 << (irq - irq_base)); \ + r = __raw_readl(prefix##_MASK) | (1 << (d->irq - irq_base)); \ __raw_writel(r, prefix##_MASK); \ } #define SECOND_IRQ_UNMASK(_name_, irq_base, prefix) \ -static void _name_##_unmask_irq(unsigned int irq) \ +static void _name_##_unmask_irq(struct irq_data *d) \ { \ uint32_t r; \ - r = __raw_readl(prefix##_MASK) & ~(1 << (irq - irq_base)); \ + r = __raw_readl(prefix##_MASK) & ~(1 << (d->irq - irq_base)); \ __raw_writel(r, prefix##_MASK); \ } @@ -88,8 +88,8 @@ SECOND_IRQ_UNMASK(_name_, irq_base, prefix) \ SECOND_IRQ_DEMUX(_name_, irq_base, prefix) \ static struct irq_chip _name_##_irq_chip = { \ .name = #_name_, \ - .mask = _name_##_mask_irq, \ - .unmask = _name_##_unmask_irq, \ + .irq_mask = _name_##_mask_irq, \ + .irq_unmask = _name_##_unmask_irq, \ } SECOND_IRQ_CHIP(pmic, IRQ_MMP2_PMIC_BASE, MMP2_ICU_INT4); @@ -103,10 +103,12 @@ static void init_mux_irq(struct irq_chip *chip, int start, int num) int irq; for (irq = start; num > 0; irq++, num--) { + struct irq_data *d = irq_get_irq_data(irq); + /* mask and clear the IRQ */ - chip->mask(irq); - if (chip->ack) - chip->ack(irq); + chip->irq_mask(d); + if (chip->irq_ack) + chip->irq_ack(d); set_irq_chip(irq, chip); set_irq_flags(irq, IRQF_VALID); @@ -119,7 +121,7 @@ void __init mmp2_init_icu(void) int irq; for (irq = 0; irq < IRQ_MMP2_MUX_BASE; irq++) { - icu_mask_irq(irq); + icu_mask_irq(irq_get_irq_data(irq)); set_irq_chip(irq, &icu_irq_chip); set_irq_flags(irq, IRQF_VALID); @@ -139,7 +141,7 @@ void __init mmp2_init_icu(void) /* NOTE: IRQ_MMP2_PMIC requires the PMIC MFPR register * to be written to clear the interrupt */ - pmic_irq_chip.ack = pmic_irq_ack; + pmic_irq_chip.irq_ack = pmic_irq_ack; init_mux_irq(&pmic_irq_chip, IRQ_MMP2_PMIC_BASE, 2); init_mux_irq(&rtc_irq_chip, IRQ_MMP2_RTC_BASE, 2); diff --git a/arch/arm/mach-mmp/irq-pxa168.c b/arch/arm/mach-mmp/irq-pxa168.c index 52ff2f0..f86b450 100644 --- a/arch/arm/mach-mmp/irq-pxa168.c +++ b/arch/arm/mach-mmp/irq-pxa168.c @@ -25,21 +25,21 @@ #define PRIORITY_DEFAULT 0x1 #define PRIORITY_NONE 0x0 /* means IRQ disabled */ -static void icu_mask_irq(unsigned int irq) +static void icu_mask_irq(struct irq_data *d) { - __raw_writel(PRIORITY_NONE, ICU_INT_CONF(irq)); + __raw_writel(PRIORITY_NONE, ICU_INT_CONF(d->irq)); } -static void icu_unmask_irq(unsigned int irq) +static void icu_unmask_irq(struct irq_data *d) { - __raw_writel(IRQ_ROUTE_TO_AP | PRIORITY_DEFAULT, ICU_INT_CONF(irq)); + __raw_writel(IRQ_ROUTE_TO_AP | PRIORITY_DEFAULT, ICU_INT_CONF(d->irq)); } static struct irq_chip icu_irq_chip = { - .name = "icu_irq", - .ack = icu_mask_irq, - .mask = icu_mask_irq, - .unmask = icu_unmask_irq, + .name = "icu_irq", + .irq_ack = icu_mask_irq, + .irq_mask = icu_mask_irq, + .irq_unmask = icu_unmask_irq, }; void __init icu_init_irq(void) @@ -47,7 +47,7 @@ void __init icu_init_irq(void) int irq; for (irq = 0; irq < 64; irq++) { - icu_mask_irq(irq); + icu_mask_irq(irq_get_irq_data(irq)); set_irq_chip(irq, &icu_irq_chip); set_irq_handler(irq, handle_level_irq); set_irq_flags(irq, IRQF_VALID); diff --git a/arch/arm/mach-msm/board-trout-gpio.c b/arch/arm/mach-msm/board-trout-gpio.c index f8c09ef..a604ec1 100644 --- a/arch/arm/mach-msm/board-trout-gpio.c +++ b/arch/arm/mach-msm/board-trout-gpio.c @@ -113,52 +113,52 @@ static struct msm_gpio_chip msm_gpio_banks[] = { TROUT_GPIO_BANK("VIRTUAL", 0x12, TROUT_GPIO_VIRTUAL_BASE, 0), }; -static void trout_gpio_irq_ack(unsigned int irq) +static void trout_gpio_irq_ack(struct irq_data *d) { - int bank = TROUT_INT_TO_BANK(irq); - uint8_t mask = TROUT_INT_TO_MASK(irq); + int bank = TROUT_INT_TO_BANK(d->irq); + uint8_t mask = TROUT_INT_TO_MASK(d->irq); int reg = TROUT_BANK_TO_STAT_REG(bank); - /*printk(KERN_INFO "trout_gpio_irq_ack irq %d\n", irq);*/ + /*printk(KERN_INFO "trout_gpio_irq_ack irq %d\n", d->irq);*/ writeb(mask, TROUT_CPLD_BASE + reg); } -static void trout_gpio_irq_mask(unsigned int irq) +static void trout_gpio_irq_mask(struct irq_data *d) { unsigned long flags; uint8_t reg_val; - int bank = TROUT_INT_TO_BANK(irq); - uint8_t mask = TROUT_INT_TO_MASK(irq); + int bank = TROUT_INT_TO_BANK(d->irq); + uint8_t mask = TROUT_INT_TO_MASK(d->irq); int reg = TROUT_BANK_TO_MASK_REG(bank); local_irq_save(flags); reg_val = trout_int_mask[bank] |= mask; /*printk(KERN_INFO "trout_gpio_irq_mask irq %d => %d:%02x\n", - irq, bank, reg_val);*/ + d->irq, bank, reg_val);*/ writeb(reg_val, TROUT_CPLD_BASE + reg); local_irq_restore(flags); } -static void trout_gpio_irq_unmask(unsigned int irq) +static void trout_gpio_irq_unmask(struct irq_data *d) { unsigned long flags; uint8_t reg_val; - int bank = TROUT_INT_TO_BANK(irq); - uint8_t mask = TROUT_INT_TO_MASK(irq); + int bank = TROUT_INT_TO_BANK(d->irq); + uint8_t mask = TROUT_INT_TO_MASK(d->irq); int reg = TROUT_BANK_TO_MASK_REG(bank); local_irq_save(flags); reg_val = trout_int_mask[bank] &= ~mask; /*printk(KERN_INFO "trout_gpio_irq_unmask irq %d => %d:%02x\n", - irq, bank, reg_val);*/ + d->irq, bank, reg_val);*/ writeb(reg_val, TROUT_CPLD_BASE + reg); local_irq_restore(flags); } -int trout_gpio_irq_set_wake(unsigned int irq, unsigned int on) +int trout_gpio_irq_set_wake(struct irq_data *d, unsigned int on) { unsigned long flags; - int bank = TROUT_INT_TO_BANK(irq); - uint8_t mask = TROUT_INT_TO_MASK(irq); + int bank = TROUT_INT_TO_BANK(d->irq); + uint8_t mask = TROUT_INT_TO_MASK(d->irq); local_irq_save(flags); if(on) @@ -198,15 +198,15 @@ static void trout_gpio_irq_handler(unsigned int irq, struct irq_desc *desc) } int_base += TROUT_INT_BANK0_COUNT; } - desc->chip->ack(irq); + desc->irq_data.chip->irq_ack(&desc->irq_data); } static struct irq_chip trout_gpio_irq_chip = { - .name = "troutgpio", - .ack = trout_gpio_irq_ack, - .mask = trout_gpio_irq_mask, - .unmask = trout_gpio_irq_unmask, - .set_wake = trout_gpio_irq_set_wake, + .name = "troutgpio", + .irq_ack = trout_gpio_irq_ack, + .irq_mask = trout_gpio_irq_mask, + .irq_unmask = trout_gpio_irq_unmask, + .irq_set_wake = trout_gpio_irq_set_wake, }; /* diff --git a/arch/arm/mach-msm/gpio.c b/arch/arm/mach-msm/gpio.c index 33051b5..176af9d 100644 --- a/arch/arm/mach-msm/gpio.c +++ b/arch/arm/mach-msm/gpio.c @@ -225,21 +225,21 @@ struct msm_gpio_chip msm_gpio_chips[] = { #endif }; -static void msm_gpio_irq_ack(unsigned int irq) +static void msm_gpio_irq_ack(struct irq_data *d) { unsigned long irq_flags; - struct msm_gpio_chip *msm_chip = get_irq_chip_data(irq); + struct msm_gpio_chip *msm_chip = irq_data_get_irq_chip_data(d); spin_lock_irqsave(&msm_chip->lock, irq_flags); msm_gpio_clear_detect_status(msm_chip, - irq - gpio_to_irq(msm_chip->chip.base)); + d->irq - gpio_to_irq(msm_chip->chip.base)); spin_unlock_irqrestore(&msm_chip->lock, irq_flags); } -static void msm_gpio_irq_mask(unsigned int irq) +static void msm_gpio_irq_mask(struct irq_data *d) { unsigned long irq_flags; - struct msm_gpio_chip *msm_chip = get_irq_chip_data(irq); - unsigned offset = irq - gpio_to_irq(msm_chip->chip.base); + struct msm_gpio_chip *msm_chip = irq_data_get_irq_chip_data(d); + unsigned offset = d->irq - gpio_to_irq(msm_chip->chip.base); spin_lock_irqsave(&msm_chip->lock, irq_flags); /* level triggered interrupts are also latched */ @@ -250,11 +250,11 @@ static void msm_gpio_irq_mask(unsigned int irq) spin_unlock_irqrestore(&msm_chip->lock, irq_flags); } -static void msm_gpio_irq_unmask(unsigned int irq) +static void msm_gpio_irq_unmask(struct irq_data *d) { unsigned long irq_flags; - struct msm_gpio_chip *msm_chip = get_irq_chip_data(irq); - unsigned offset = irq - gpio_to_irq(msm_chip->chip.base); + struct msm_gpio_chip *msm_chip = irq_data_get_irq_chip_data(d); + unsigned offset = d->irq - gpio_to_irq(msm_chip->chip.base); spin_lock_irqsave(&msm_chip->lock, irq_flags); /* level triggered interrupts are also latched */ @@ -265,11 +265,11 @@ static void msm_gpio_irq_unmask(unsigned int irq) spin_unlock_irqrestore(&msm_chip->lock, irq_flags); } -static int msm_gpio_irq_set_wake(unsigned int irq, unsigned int on) +static int msm_gpio_irq_set_wake(struct irq_data *d, unsigned int on) { unsigned long irq_flags; - struct msm_gpio_chip *msm_chip = get_irq_chip_data(irq); - unsigned offset = irq - gpio_to_irq(msm_chip->chip.base); + struct msm_gpio_chip *msm_chip = irq_data_get_irq_chip_data(d); + unsigned offset = d->irq - gpio_to_irq(msm_chip->chip.base); spin_lock_irqsave(&msm_chip->lock, irq_flags); @@ -282,21 +282,21 @@ static int msm_gpio_irq_set_wake(unsigned int irq, unsigned int on) return 0; } -static int msm_gpio_irq_set_type(unsigned int irq, unsigned int flow_type) +static int msm_gpio_irq_set_type(struct irq_data *d, unsigned int flow_type) { unsigned long irq_flags; - struct msm_gpio_chip *msm_chip = get_irq_chip_data(irq); - unsigned offset = irq - gpio_to_irq(msm_chip->chip.base); + struct msm_gpio_chip *msm_chip = irq_data_get_irq_chip_data(d); + unsigned offset = d->irq - gpio_to_irq(msm_chip->chip.base); unsigned val, mask = BIT(offset); spin_lock_irqsave(&msm_chip->lock, irq_flags); val = readl(msm_chip->regs.int_edge); if (flow_type & IRQ_TYPE_EDGE_BOTH) { writel(val | mask, msm_chip->regs.int_edge); - irq_desc[irq].handle_irq = handle_edge_irq; + irq_desc[d->irq].handle_irq = handle_edge_irq; } else { writel(val & ~mask, msm_chip->regs.int_edge); - irq_desc[irq].handle_irq = handle_level_irq; + irq_desc[d->irq].handle_irq = handle_level_irq; } if ((flow_type & IRQ_TYPE_EDGE_BOTH) == IRQ_TYPE_EDGE_BOTH) { msm_chip->both_edge_detect |= mask; @@ -333,16 +333,16 @@ static void msm_gpio_irq_handler(unsigned int irq, struct irq_desc *desc) msm_chip->chip.base + j); } } - desc->chip->ack(irq); + desc->irq_data.chip->irq_ack(&desc->irq_data); } static struct irq_chip msm_gpio_irq_chip = { - .name = "msmgpio", - .ack = msm_gpio_irq_ack, - .mask = msm_gpio_irq_mask, - .unmask = msm_gpio_irq_unmask, - .set_wake = msm_gpio_irq_set_wake, - .set_type = msm_gpio_irq_set_type, + .name = "msmgpio", + .irq_ack = msm_gpio_irq_ack, + .irq_mask = msm_gpio_irq_mask, + .irq_unmask = msm_gpio_irq_unmask, + .irq_set_wake = msm_gpio_irq_set_wake, + .irq_set_type = msm_gpio_irq_set_type, }; static int __init msm_init_gpio(void) diff --git a/arch/arm/mach-msm/irq-vic.c b/arch/arm/mach-msm/irq-vic.c index 99f2c34..68c28bb 100644 --- a/arch/arm/mach-msm/irq-vic.c +++ b/arch/arm/mach-msm/irq-vic.c @@ -226,19 +226,18 @@ static inline void msm_irq_write_all_regs(void __iomem *base, unsigned int val) writel(val, base + (i * 4)); } -static void msm_irq_ack(unsigned int irq) +static void msm_irq_ack(struct irq_data *d) { - void __iomem *reg = VIC_INT_TO_REG_ADDR(VIC_INT_CLEAR0, irq); - irq = 1 << (irq & 31); - writel(irq, reg); + void __iomem *reg = VIC_INT_TO_REG_ADDR(VIC_INT_CLEAR0, d->irq); + writel(1 << (d->irq & 31), reg); } -static void msm_irq_mask(unsigned int irq) +static void msm_irq_mask(struct irq_data *d) { - void __iomem *reg = VIC_INT_TO_REG_ADDR(VIC_INT_ENCLEAR0, irq); - unsigned index = VIC_INT_TO_REG_INDEX(irq); - uint32_t mask = 1UL << (irq & 31); - int smsm_irq = msm_irq_to_smsm[irq]; + void __iomem *reg = VIC_INT_TO_REG_ADDR(VIC_INT_ENCLEAR0, d->irq); + unsigned index = VIC_INT_TO_REG_INDEX(d->irq); + uint32_t mask = 1UL << (d->irq & 31); + int smsm_irq = msm_irq_to_smsm[d->irq]; msm_irq_shadow_reg[index].int_en[0] &= ~mask; writel(mask, reg); @@ -250,12 +249,12 @@ static void msm_irq_mask(unsigned int irq) } } -static void msm_irq_unmask(unsigned int irq) +static void msm_irq_unmask(struct irq_data *d) { - void __iomem *reg = VIC_INT_TO_REG_ADDR(VIC_INT_ENSET0, irq); - unsigned index = VIC_INT_TO_REG_INDEX(irq); - uint32_t mask = 1UL << (irq & 31); - int smsm_irq = msm_irq_to_smsm[irq]; + void __iomem *reg = VIC_INT_TO_REG_ADDR(VIC_INT_ENSET0, d->irq); + unsigned index = VIC_INT_TO_REG_INDEX(d->irq); + uint32_t mask = 1UL << (d->irq & 31); + int smsm_irq = msm_irq_to_smsm[d->irq]; msm_irq_shadow_reg[index].int_en[0] |= mask; writel(mask, reg); @@ -268,14 +267,14 @@ static void msm_irq_unmask(unsigned int irq) } } -static int msm_irq_set_wake(unsigned int irq, unsigned int on) +static int msm_irq_set_wake(struct irq_data *d, unsigned int on) { - unsigned index = VIC_INT_TO_REG_INDEX(irq); - uint32_t mask = 1UL << (irq & 31); - int smsm_irq = msm_irq_to_smsm[irq]; + unsigned index = VIC_INT_TO_REG_INDEX(d->irq); + uint32_t mask = 1UL << (d->irq & 31); + int smsm_irq = msm_irq_to_smsm[d->irq]; if (smsm_irq == 0) { - printk(KERN_ERR "msm_irq_set_wake: bad wakeup irq %d\n", irq); + printk(KERN_ERR "msm_irq_set_wake: bad wakeup irq %d\n", d->irq); return -EINVAL; } if (on) @@ -294,12 +293,12 @@ static int msm_irq_set_wake(unsigned int irq, unsigned int on) return 0; } -static int msm_irq_set_type(unsigned int irq, unsigned int flow_type) +static int msm_irq_set_type(struct irq_data *d, unsigned int flow_type) { - void __iomem *treg = VIC_INT_TO_REG_ADDR(VIC_INT_TYPE0, irq); - void __iomem *preg = VIC_INT_TO_REG_ADDR(VIC_INT_POLARITY0, irq); - unsigned index = VIC_INT_TO_REG_INDEX(irq); - int b = 1 << (irq & 31); + void __iomem *treg = VIC_INT_TO_REG_ADDR(VIC_INT_TYPE0, d->irq); + void __iomem *preg = VIC_INT_TO_REG_ADDR(VIC_INT_POLARITY0, d->irq); + unsigned index = VIC_INT_TO_REG_INDEX(d->irq); + int b = 1 << (d->irq & 31); uint32_t polarity; uint32_t type; @@ -314,11 +313,11 @@ static int msm_irq_set_type(unsigned int irq, unsigned int flow_type) type = msm_irq_shadow_reg[index].int_type; if (flow_type & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING)) { type |= b; - irq_desc[irq].handle_irq = handle_edge_irq; + irq_desc[d->irq].handle_irq = handle_edge_irq; } if (flow_type & (IRQF_TRIGGER_HIGH | IRQF_TRIGGER_LOW)) { type &= ~b; - irq_desc[irq].handle_irq = handle_level_irq; + irq_desc[d->irq].handle_irq = handle_level_irq; } writel(type, treg); msm_irq_shadow_reg[index].int_type = type; @@ -326,13 +325,13 @@ static int msm_irq_set_type(unsigned int irq, unsigned int flow_type) } static struct irq_chip msm_irq_chip = { - .name = "msm", - .disable = msm_irq_mask, - .ack = msm_irq_ack, - .mask = msm_irq_mask, - .unmask = msm_irq_unmask, - .set_wake = msm_irq_set_wake, - .set_type = msm_irq_set_type, + .name = "msm", + .irq_disable = msm_irq_mask, + .irq_ack = msm_irq_ack, + .irq_mask = msm_irq_mask, + .irq_unmask = msm_irq_unmask, + .irq_set_wake = msm_irq_set_wake, + .irq_set_type = msm_irq_set_type, }; void __init msm_init_irq(void) diff --git a/arch/arm/mach-msm/irq.c b/arch/arm/mach-msm/irq.c index 6c8d5f8..0b27d89 100644 --- a/arch/arm/mach-msm/irq.c +++ b/arch/arm/mach-msm/irq.c @@ -64,35 +64,34 @@ #define VIC_VECTPRIORITY(n) VIC_REG(0x0200+((n) * 4)) #define VIC_VECTADDR(n) VIC_REG(0x0400+((n) * 4)) -static void msm_irq_ack(unsigned int irq) +static void msm_irq_ack(struct irq_data *d) { - void __iomem *reg = VIC_INT_CLEAR0 + ((irq & 32) ? 4 : 0); - irq = 1 << (irq & 31); - writel(irq, reg); + void __iomem *reg = VIC_INT_CLEAR0 + ((d->irq & 32) ? 4 : 0); + writel(1 << (d->irq & 31), reg); } -static void msm_irq_mask(unsigned int irq) +static void msm_irq_mask(struct irq_data *d) { - void __iomem *reg = VIC_INT_ENCLEAR0 + ((irq & 32) ? 4 : 0); - writel(1 << (irq & 31), reg); + void __iomem *reg = VIC_INT_ENCLEAR0 + ((d->irq & 32) ? 4 : 0); + writel(1 << (d->irq & 31), reg); } -static void msm_irq_unmask(unsigned int irq) +static void msm_irq_unmask(struct irq_data *d) { - void __iomem *reg = VIC_INT_ENSET0 + ((irq & 32) ? 4 : 0); - writel(1 << (irq & 31), reg); + void __iomem *reg = VIC_INT_ENSET0 + ((d->irq & 32) ? 4 : 0); + writel(1 << (d->irq & 31), reg); } -static int msm_irq_set_wake(unsigned int irq, unsigned int on) +static int msm_irq_set_wake(struct irq_data *d, unsigned int on) { return -EINVAL; } -static int msm_irq_set_type(unsigned int irq, unsigned int flow_type) +static int msm_irq_set_type(struct irq_data *d, unsigned int flow_type) { - void __iomem *treg = VIC_INT_TYPE0 + ((irq & 32) ? 4 : 0); - void __iomem *preg = VIC_INT_POLARITY0 + ((irq & 32) ? 4 : 0); - int b = 1 << (irq & 31); + void __iomem *treg = VIC_INT_TYPE0 + ((d->irq & 32) ? 4 : 0); + void __iomem *preg = VIC_INT_POLARITY0 + ((d->irq & 32) ? 4 : 0); + int b = 1 << (d->irq & 31); if (flow_type & (IRQF_TRIGGER_FALLING | IRQF_TRIGGER_LOW)) writel(readl(preg) | b, preg); @@ -101,22 +100,22 @@ static int msm_irq_set_type(unsigned int irq, unsigned int flow_type) if (flow_type & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING)) { writel(readl(treg) | b, treg); - irq_desc[irq].handle_irq = handle_edge_irq; + irq_desc[d->irq].handle_irq = handle_edge_irq; } if (flow_type & (IRQF_TRIGGER_HIGH | IRQF_TRIGGER_LOW)) { writel(readl(treg) & (~b), treg); - irq_desc[irq].handle_irq = handle_level_irq; + irq_desc[d->irq].handle_irq = handle_level_irq; } return 0; } static struct irq_chip msm_irq_chip = { - .name = "msm", - .ack = msm_irq_ack, - .mask = msm_irq_mask, - .unmask = msm_irq_unmask, - .set_wake = msm_irq_set_wake, - .set_type = msm_irq_set_type, + .name = "msm", + .irq_ack = msm_irq_ack, + .irq_mask = msm_irq_mask, + .irq_unmask = msm_irq_unmask, + .irq_set_wake = msm_irq_set_wake, + .irq_set_type = msm_irq_set_type, }; void __init msm_init_irq(void) diff --git a/arch/arm/mach-msm/sirc.c b/arch/arm/mach-msm/sirc.c index 152eefd..11b54c7 100644 --- a/arch/arm/mach-msm/sirc.c +++ b/arch/arm/mach-msm/sirc.c @@ -42,12 +42,11 @@ static struct sirc_cascade_regs sirc_reg_table[] = { /* Mask off the given interrupt. Keep the int_enable mask in sync with the enable reg, so it can be restored after power collapse. */ -static void sirc_irq_mask(unsigned int irq) +static void sirc_irq_mask(struct irq_data *d) { unsigned int mask; - - mask = 1 << (irq - FIRST_SIRC_IRQ); + mask = 1 << (d->irq - FIRST_SIRC_IRQ); writel(mask, sirc_regs.int_enable_clear); int_enable &= ~mask; return; @@ -55,31 +54,31 @@ static void sirc_irq_mask(unsigned int irq) /* Unmask the given interrupt. Keep the int_enable mask in sync with the enable reg, so it can be restored after power collapse. */ -static void sirc_irq_unmask(unsigned int irq) +static void sirc_irq_unmask(struct irq_data *d) { unsigned int mask; - mask = 1 << (irq - FIRST_SIRC_IRQ); + mask = 1 << (d->irq - FIRST_SIRC_IRQ); writel(mask, sirc_regs.int_enable_set); int_enable |= mask; return; } -static void sirc_irq_ack(unsigned int irq) +static void sirc_irq_ack(struct irq_data *d) { unsigned int mask; - mask = 1 << (irq - FIRST_SIRC_IRQ); + mask = 1 << (d->irq - FIRST_SIRC_IRQ); writel(mask, sirc_regs.int_clear); return; } -static int sirc_irq_set_wake(unsigned int irq, unsigned int on) +static int sirc_irq_set_wake(struct irq_data *d, unsigned int on) { unsigned int mask; /* Used to set the interrupt enable mask during power collapse. */ - mask = 1 << (irq - FIRST_SIRC_IRQ); + mask = 1 << (d->irq - FIRST_SIRC_IRQ); if (on) wake_enable |= mask; else @@ -88,12 +87,12 @@ static int sirc_irq_set_wake(unsigned int irq, unsigned int on) return 0; } -static int sirc_irq_set_type(unsigned int irq, unsigned int flow_type) +static int sirc_irq_set_type(struct irq_data *d, unsigned int flow_type) { unsigned int mask; unsigned int val; - mask = 1 << (irq - FIRST_SIRC_IRQ); + mask = 1 << (d->irq - FIRST_SIRC_IRQ); val = readl(sirc_regs.int_polarity); if (flow_type & (IRQF_TRIGGER_LOW | IRQF_TRIGGER_FALLING)) @@ -106,10 +105,10 @@ static int sirc_irq_set_type(unsigned int irq, unsigned int flow_type) val = readl(sirc_regs.int_type); if (flow_type & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING)) { val |= mask; - irq_desc[irq].handle_irq = handle_edge_irq; + irq_desc[d->irq].handle_irq = handle_edge_irq; } else { val &= ~mask; - irq_desc[irq].handle_irq = handle_level_irq; + irq_desc[d->irq].handle_irq = handle_level_irq; } writel(val, sirc_regs.int_type); @@ -139,16 +138,16 @@ static void sirc_irq_handler(unsigned int irq, struct irq_desc *desc) ; generic_handle_irq(sirq+FIRST_SIRC_IRQ); - desc->chip->ack(irq); + desc->irq_data.chip->irq_ack(&desc->irq_data); } static struct irq_chip sirc_irq_chip = { - .name = "sirc", - .ack = sirc_irq_ack, - .mask = sirc_irq_mask, - .unmask = sirc_irq_unmask, - .set_wake = sirc_irq_set_wake, - .set_type = sirc_irq_set_type, + .name = "sirc", + .irq_ack = sirc_irq_ack, + .irq_mask = sirc_irq_mask, + .irq_unmask = sirc_irq_unmask, + .irq_set_wake = sirc_irq_set_wake, + .irq_set_type = sirc_irq_set_type, }; void __init msm_init_sirc(void) diff --git a/arch/arm/mach-mx3/mach-mx31_3ds.c b/arch/arm/mach-mx3/mach-mx31_3ds.c index 899a969..0d65db8 100644 --- a/arch/arm/mach-mx3/mach-mx31_3ds.c +++ b/arch/arm/mach-mx3/mach-mx31_3ds.c @@ -147,10 +147,10 @@ static struct mc13783_regulator_init_data mx31_3ds_regulators[] = { .init_data = &pwgtx_init, }, { - .id = MC13783_REGU_GPO1, /* Turn on 1.8V */ + .id = MC13783_REG_GPO1, /* Turn on 1.8V */ .init_data = &gpo_init, }, { - .id = MC13783_REGU_GPO3, /* Turn on 3.3V */ + .id = MC13783_REG_GPO3, /* Turn on 3.3V */ .init_data = &gpo_init, }, }; diff --git a/arch/arm/mach-mx3/mach-mx31ads.c b/arch/arm/mach-mx3/mach-mx31ads.c index b993b9b..88b97d6 100644 --- a/arch/arm/mach-mx3/mach-mx31ads.c +++ b/arch/arm/mach-mx3/mach-mx31ads.c @@ -162,9 +162,9 @@ static void mx31ads_expio_irq_handler(u32 irq, struct irq_desc *desc) * Disable an expio pin's interrupt by setting the bit in the imr. * @param irq an expio virtual irq number */ -static void expio_mask_irq(u32 irq) +static void expio_mask_irq(struct irq_data *d) { - u32 expio = MXC_IRQ_TO_EXPIO(irq); + u32 expio = MXC_IRQ_TO_EXPIO(d->irq); /* mask the interrupt */ __raw_writew(1 << expio, PBC_INTMASK_CLEAR_REG); __raw_readw(PBC_INTMASK_CLEAR_REG); @@ -174,9 +174,9 @@ static void expio_mask_irq(u32 irq) * Acknowledge an expanded io pin's interrupt by clearing the bit in the isr. * @param irq an expanded io virtual irq number */ -static void expio_ack_irq(u32 irq) +static void expio_ack_irq(struct irq_data *d) { - u32 expio = MXC_IRQ_TO_EXPIO(irq); + u32 expio = MXC_IRQ_TO_EXPIO(d->irq); /* clear the interrupt status */ __raw_writew(1 << expio, PBC_INTSTATUS_REG); } @@ -185,18 +185,18 @@ static void expio_ack_irq(u32 irq) * Enable a expio pin's interrupt by clearing the bit in the imr. * @param irq a expio virtual irq number */ -static void expio_unmask_irq(u32 irq) +static void expio_unmask_irq(struct irq_data *d) { - u32 expio = MXC_IRQ_TO_EXPIO(irq); + u32 expio = MXC_IRQ_TO_EXPIO(d->irq); /* unmask the interrupt */ __raw_writew(1 << expio, PBC_INTMASK_SET_REG); } static struct irq_chip expio_irq_chip = { .name = "EXPIO(CPLD)", - .ack = expio_ack_irq, - .mask = expio_mask_irq, - .unmask = expio_unmask_irq, + .irq_ack = expio_ack_irq, + .irq_mask = expio_mask_irq, + .irq_unmask = expio_unmask_irq, }; static void __init mx31ads_init_expio(void) diff --git a/arch/arm/mach-mx5/Kconfig b/arch/arm/mach-mx5/Kconfig index 55254b6..de4fa992f 100644 --- a/arch/arm/mach-mx5/Kconfig +++ b/arch/arm/mach-mx5/Kconfig @@ -50,6 +50,7 @@ config MACH_MX51_BABBAGE config MACH_MX51_3DS bool "Support MX51PDK (3DS)" select SOC_IMX51 + select IMX_HAVE_PLATFORM_IMX_KEYPAD select IMX_HAVE_PLATFORM_IMX_UART select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX select IMX_HAVE_PLATFORM_SPI_IMX @@ -77,6 +78,7 @@ choice config MACH_EUKREA_MBIMX51_BASEBOARD prompt "Eukrea MBIMX51 development board" bool + select IMX_HAVE_PLATFORM_IMX_KEYPAD select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX help This adds board specific devices that can be found on Eukrea's @@ -124,10 +126,28 @@ config MACH_MX53_EVK bool "Support MX53 EVK platforms" select SOC_IMX53 select IMX_HAVE_PLATFORM_IMX_UART + select IMX_HAVE_PLATFORM_IMX_I2C + select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX + select IMX_HAVE_PLATFORM_SPI_IMX help Include support for MX53 EVK platform. This includes specific configurations for the board and its peripherals. +config MACH_MX53_SMD + bool "Support MX53 SMD platforms" + select SOC_IMX53 + select IMX_HAVE_PLATFORM_IMX_UART + help + Include support for MX53 SMD platform. This includes specific + configurations for the board and its peripherals. + +config MACH_MX53_LOCO + bool "Support MX53 LOCO platforms" + select SOC_IMX53 + select IMX_HAVE_PLATFORM_IMX_UART + help + Include support for MX53 LOCO platform. This includes specific + configurations for the board and its peripherals. config MACH_MX50_RDP bool "Support MX50 reference design platform" diff --git a/arch/arm/mach-mx5/Makefile b/arch/arm/mach-mx5/Makefile index 0c398ba..0d43be9 100644 --- a/arch/arm/mach-mx5/Makefile +++ b/arch/arm/mach-mx5/Makefile @@ -10,6 +10,8 @@ obj-$(CONFIG_CPU_FREQ_IMX) += cpu_op-mx51.o obj-$(CONFIG_MACH_MX51_BABBAGE) += board-mx51_babbage.o obj-$(CONFIG_MACH_MX51_3DS) += board-mx51_3ds.o obj-$(CONFIG_MACH_MX53_EVK) += board-mx53_evk.o +obj-$(CONFIG_MACH_MX53_SMD) += board-mx53_smd.o +obj-$(CONFIG_MACH_MX53_LOCO) += board-mx53_loco.o obj-$(CONFIG_MACH_EUKREA_CPUIMX51) += board-cpuimx51.o obj-$(CONFIG_MACH_EUKREA_MBIMX51_BASEBOARD) += eukrea_mbimx51-baseboard.o obj-$(CONFIG_MACH_EUKREA_CPUIMX51SD) += board-cpuimx51sd.o diff --git a/arch/arm/mach-mx5/board-mx51_3ds.c b/arch/arm/mach-mx5/board-mx51_3ds.c index e42bd2e..49d6448 100644 --- a/arch/arm/mach-mx5/board-mx51_3ds.c +++ b/arch/arm/mach-mx5/board-mx51_3ds.c @@ -12,7 +12,6 @@ #include <linux/irq.h> #include <linux/platform_device.h> -#include <linux/input/matrix_keypad.h> #include <linux/spi/spi.h> #include <asm/mach-types.h> @@ -120,14 +119,14 @@ static int mx51_3ds_board_keymap[] = { KEY(3, 5, KEY_BACK) }; -static struct matrix_keymap_data mx51_3ds_map_data = { +static const struct matrix_keymap_data mx51_3ds_map_data __initconst = { .keymap = mx51_3ds_board_keymap, .keymap_size = ARRAY_SIZE(mx51_3ds_board_keymap), }; static void mxc_init_keypad(void) { - mxc_register_device(&mxc_keypad_device, &mx51_3ds_map_data); + imx51_add_imx_keypad(&mx51_3ds_map_data); } #else static inline void mxc_init_keypad(void) diff --git a/arch/arm/mach-mx5/board-mx53_evk.c b/arch/arm/mach-mx5/board-mx53_evk.c index fa97d0d..caee04c 100644 --- a/arch/arm/mach-mx5/board-mx53_evk.c +++ b/arch/arm/mach-mx5/board-mx53_evk.c @@ -21,6 +21,11 @@ #include <linux/init.h> #include <linux/clk.h> +#include <linux/fec.h> +#include <linux/delay.h> +#include <linux/gpio.h> +#include <linux/spi/flash.h> +#include <linux/spi/spi.h> #include <mach/common.h> #include <mach/hardware.h> #include <asm/mach-types.h> @@ -29,6 +34,10 @@ #include <mach/imx-uart.h> #include <mach/iomux-mx53.h> +#define SMD_FEC_PHY_RST IMX_GPIO_NR(7, 6) +#define EVK_ECSPI1_CS0 IMX_GPIO_NR(2, 30) +#define EVK_ECSPI1_CS1 IMX_GPIO_NR(3, 19) + #include "crm_regs.h" #include "devices-imx53.h" @@ -47,6 +56,14 @@ static iomux_v3_cfg_t mx53_evk_pads[] = { MX53_PAD_ATA_CS_1__UART3_RXD, MX53_PAD_ATA_DA_1__UART3_CTS, MX53_PAD_ATA_DA_2__UART3_RTS, + + MX53_PAD_EIM_D16__CSPI1_SCLK, + MX53_PAD_EIM_D17__CSPI1_MISO, + MX53_PAD_EIM_D18__CSPI1_MOSI, + + /* ecspi chip select lines */ + MX53_PAD_EIM_EB2__GPIO_2_30, + MX53_PAD_EIM_D19__GPIO_3_19, }; static const struct imxuart_platform_data mx53_evk_uart_pdata __initconst = { @@ -60,11 +77,68 @@ static inline void mx53_evk_init_uart(void) imx53_add_imx_uart(2, &mx53_evk_uart_pdata); } +static const struct imxi2c_platform_data mx53_evk_i2c_data __initconst = { + .bitrate = 100000, +}; + +static inline void mx53_evk_fec_reset(void) +{ + int ret; + + /* reset FEC PHY */ + ret = gpio_request(SMD_FEC_PHY_RST, "fec-phy-reset"); + if (ret) { + printk(KERN_ERR"failed to get GPIO_FEC_PHY_RESET: %d\n", ret); + return; + } + gpio_direction_output(SMD_FEC_PHY_RST, 0); + gpio_set_value(SMD_FEC_PHY_RST, 0); + msleep(1); + gpio_set_value(SMD_FEC_PHY_RST, 1); +} + +static struct fec_platform_data mx53_evk_fec_pdata = { + .phy = PHY_INTERFACE_MODE_RMII, +}; + +static struct spi_board_info mx53_evk_spi_board_info[] __initdata = { + { + .modalias = "mtd_dataflash", + .max_speed_hz = 25000000, + .bus_num = 0, + .chip_select = 1, + .mode = SPI_MODE_0, + .platform_data = NULL, + }, +}; + +static int mx53_evk_spi_cs[] = { + EVK_ECSPI1_CS0, + EVK_ECSPI1_CS1, +}; + +static const struct spi_imx_master mx53_evk_spi_data __initconst = { + .chipselect = mx53_evk_spi_cs, + .num_chipselect = ARRAY_SIZE(mx53_evk_spi_cs), +}; + static void __init mx53_evk_board_init(void) { mxc_iomux_v3_setup_multiple_pads(mx53_evk_pads, ARRAY_SIZE(mx53_evk_pads)); mx53_evk_init_uart(); + mx53_evk_fec_reset(); + imx53_add_fec(&mx53_evk_fec_pdata); + + imx53_add_imx_i2c(0, &mx53_evk_i2c_data); + imx53_add_imx_i2c(1, &mx53_evk_i2c_data); + + imx53_add_sdhci_esdhc_imx(0, NULL); + imx53_add_sdhci_esdhc_imx(1, NULL); + + spi_register_board_info(mx53_evk_spi_board_info, + ARRAY_SIZE(mx53_evk_spi_board_info)); + imx53_add_ecspi(0, &mx53_evk_spi_data); } static void __init mx53_evk_timer_init(void) diff --git a/arch/arm/mach-mx5/board-mx53_loco.c b/arch/arm/mach-mx5/board-mx53_loco.c new file mode 100644 index 0000000..d1348e0 --- /dev/null +++ b/arch/arm/mach-mx5/board-mx53_loco.c @@ -0,0 +1,111 @@ +/* + * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + */ + +#include <linux/init.h> +#include <linux/clk.h> +#include <linux/fec.h> +#include <linux/delay.h> +#include <linux/gpio.h> + +#include <mach/common.h> +#include <mach/hardware.h> +#include <mach/imx-uart.h> +#include <mach/iomux-mx53.h> + +#include <asm/mach-types.h> +#include <asm/mach/arch.h> +#include <asm/mach/time.h> + +#include "crm_regs.h" +#include "devices-imx53.h" + +#define LOCO_FEC_PHY_RST IMX_GPIO_NR(7, 6) + +static iomux_v3_cfg_t mx53_loco_pads[] = { + MX53_PAD_CSI0_D10__UART1_TXD, + MX53_PAD_CSI0_D11__UART1_RXD, + MX53_PAD_ATA_DIOW__UART1_TXD, + MX53_PAD_ATA_DMACK__UART1_RXD, + + MX53_PAD_ATA_BUFFER_EN__UART2_RXD, + MX53_PAD_ATA_DMARQ__UART2_TXD, + MX53_PAD_ATA_DIOR__UART2_RTS, + MX53_PAD_ATA_INTRQ__UART2_CTS, + + MX53_PAD_ATA_CS_0__UART3_TXD, + MX53_PAD_ATA_CS_1__UART3_RXD, + MX53_PAD_ATA_DA_1__UART3_CTS, + MX53_PAD_ATA_DA_2__UART3_RTS, +}; + +static const struct imxuart_platform_data mx53_loco_uart_data __initconst = { + .flags = IMXUART_HAVE_RTSCTS, +}; + +static inline void mx53_loco_init_uart(void) +{ + imx53_add_imx_uart(0, &mx53_loco_uart_data); + imx53_add_imx_uart(1, &mx53_loco_uart_data); + imx53_add_imx_uart(2, &mx53_loco_uart_data); +} + +static inline void mx53_loco_fec_reset(void) +{ + int ret; + + /* reset FEC PHY */ + ret = gpio_request(LOCO_FEC_PHY_RST, "fec-phy-reset"); + if (ret) { + printk(KERN_ERR"failed to get GPIO_FEC_PHY_RESET: %d\n", ret); + return; + } + gpio_direction_output(LOCO_FEC_PHY_RST, 0); + msleep(1); + gpio_set_value(LOCO_FEC_PHY_RST, 1); +} + +static struct fec_platform_data mx53_loco_fec_data = { + .phy = PHY_INTERFACE_MODE_RMII, +}; + +static void __init mx53_loco_board_init(void) +{ + mxc_iomux_v3_setup_multiple_pads(mx53_loco_pads, + ARRAY_SIZE(mx53_loco_pads)); + mx53_loco_init_uart(); + mx53_loco_fec_reset(); + imx53_add_fec(&mx53_loco_fec_data); +} + +static void __init mx53_loco_timer_init(void) +{ + mx53_clocks_init(32768, 24000000, 0, 0); +} + +static struct sys_timer mx53_loco_timer = { + .init = mx53_loco_timer_init, +}; + +MACHINE_START(MX53_LOCO, "Freescale MX53 LOCO Board") + .map_io = mx53_map_io, + .init_irq = mx53_init_irq, + .init_machine = mx53_loco_board_init, + .timer = &mx53_loco_timer, +MACHINE_END diff --git a/arch/arm/mach-mx5/board-mx53_smd.c b/arch/arm/mach-mx5/board-mx53_smd.c new file mode 100644 index 0000000..7970f7a --- /dev/null +++ b/arch/arm/mach-mx5/board-mx53_smd.c @@ -0,0 +1,111 @@ +/* + * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + */ + +#include <linux/init.h> +#include <linux/clk.h> +#include <linux/fec.h> +#include <linux/delay.h> +#include <linux/gpio.h> + +#include <mach/common.h> +#include <mach/hardware.h> +#include <mach/imx-uart.h> +#include <mach/iomux-mx53.h> + +#include <asm/mach-types.h> +#include <asm/mach/arch.h> +#include <asm/mach/time.h> + +#include "crm_regs.h" +#include "devices-imx53.h" + +#define SMD_FEC_PHY_RST IMX_GPIO_NR(7, 6) + +static iomux_v3_cfg_t mx53_smd_pads[] = { + MX53_PAD_CSI0_D10__UART1_TXD, + MX53_PAD_CSI0_D11__UART1_RXD, + MX53_PAD_ATA_DIOW__UART1_TXD, + MX53_PAD_ATA_DMACK__UART1_RXD, + + MX53_PAD_ATA_BUFFER_EN__UART2_RXD, + MX53_PAD_ATA_DMARQ__UART2_TXD, + MX53_PAD_ATA_DIOR__UART2_RTS, + MX53_PAD_ATA_INTRQ__UART2_CTS, + + MX53_PAD_ATA_CS_0__UART3_TXD, + MX53_PAD_ATA_CS_1__UART3_RXD, + MX53_PAD_ATA_DA_1__UART3_CTS, + MX53_PAD_ATA_DA_2__UART3_RTS, +}; + +static const struct imxuart_platform_data mx53_smd_uart_data __initconst = { + .flags = IMXUART_HAVE_RTSCTS, +}; + +static inline void mx53_smd_init_uart(void) +{ + imx53_add_imx_uart(0, &mx53_smd_uart_data); + imx53_add_imx_uart(1, &mx53_smd_uart_data); + imx53_add_imx_uart(2, &mx53_smd_uart_data); +} + +static inline void mx53_smd_fec_reset(void) +{ + int ret; + + /* reset FEC PHY */ + ret = gpio_request(SMD_FEC_PHY_RST, "fec-phy-reset"); + if (ret) { + printk(KERN_ERR"failed to get GPIO_FEC_PHY_RESET: %d\n", ret); + return; + } + gpio_direction_output(SMD_FEC_PHY_RST, 0); + msleep(1); + gpio_set_value(SMD_FEC_PHY_RST, 1); +} + +static struct fec_platform_data mx53_smd_fec_data = { + .phy = PHY_INTERFACE_MODE_RMII, +}; + +static void __init mx53_smd_board_init(void) +{ + mxc_iomux_v3_setup_multiple_pads(mx53_smd_pads, + ARRAY_SIZE(mx53_smd_pads)); + mx53_smd_init_uart(); + mx53_smd_fec_reset(); + imx53_add_fec(&mx53_smd_fec_data); +} + +static void __init mx53_smd_timer_init(void) +{ + mx53_clocks_init(32768, 24000000, 22579200, 0); +} + +static struct sys_timer mx53_smd_timer = { + .init = mx53_smd_timer_init, +}; + +MACHINE_START(MX53_SMD, "Freescale MX53 SMD Board") + .map_io = mx53_map_io, + .init_irq = mx53_init_irq, + .init_machine = mx53_smd_board_init, + .timer = &mx53_smd_timer, +MACHINE_END diff --git a/arch/arm/mach-mx5/clock-mx51-mx53.c b/arch/arm/mach-mx5/clock-mx51-mx53.c index 785e1a3..0a19e75 100644 --- a/arch/arm/mach-mx5/clock-mx51-mx53.c +++ b/arch/arm/mach-mx5/clock-mx51-mx53.c @@ -1191,6 +1191,11 @@ DEFINE_CLOCK(gpt_ipg_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG10_OFFSET, DEFINE_CLOCK(gpt_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG9_OFFSET, NULL, NULL, &ipg_clk, &gpt_ipg_clk); +DEFINE_CLOCK(pwm1_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG6_OFFSET, + NULL, NULL, &ipg_clk, NULL); +DEFINE_CLOCK(pwm2_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG8_OFFSET, + NULL, NULL, &ipg_clk, NULL); + /* I2C */ DEFINE_CLOCK(i2c1_clk, 0, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG9_OFFSET, NULL, NULL, &ipg_clk, NULL); @@ -1283,6 +1288,8 @@ static struct clk_lookup mx51_lookups[] = { _REGISTER_CLOCK("imx-uart.2", NULL, uart3_clk) _REGISTER_CLOCK(NULL, "gpt", gpt_clk) _REGISTER_CLOCK("fec.0", NULL, fec_clk) + _REGISTER_CLOCK("mxc_pwm.0", "pwm", pwm1_clk) + _REGISTER_CLOCK("mxc_pwm.1", "pwm", pwm2_clk) _REGISTER_CLOCK("imx-i2c.0", NULL, i2c1_clk) _REGISTER_CLOCK("imx-i2c.1", NULL, i2c2_clk) _REGISTER_CLOCK("imx-i2c.2", NULL, hsi2c_clk) @@ -1295,7 +1302,7 @@ static struct clk_lookup mx51_lookups[] = { _REGISTER_CLOCK("mxc-ehci.2", "usb_ahb", usb_ahb_clk) _REGISTER_CLOCK("fsl-usb2-udc", "usb", usboh3_clk) _REGISTER_CLOCK("fsl-usb2-udc", "usb_ahb", ahb_clk) - _REGISTER_CLOCK("imx-keypad.0", NULL, kpp_clk) + _REGISTER_CLOCK("imx-keypad", NULL, kpp_clk) _REGISTER_CLOCK("mxc_nand", NULL, nfc_clk) _REGISTER_CLOCK("imx-ssi.0", NULL, ssi1_clk) _REGISTER_CLOCK("imx-ssi.1", NULL, ssi2_clk) @@ -1326,6 +1333,13 @@ static struct clk_lookup mx53_lookups[] = { _REGISTER_CLOCK(NULL, "gpt", gpt_clk) _REGISTER_CLOCK("fec.0", NULL, fec_clk) _REGISTER_CLOCK(NULL, "iim_clk", iim_clk) + _REGISTER_CLOCK("imx-i2c.0", NULL, i2c1_clk) + _REGISTER_CLOCK("imx-i2c.1", NULL, i2c2_clk) + _REGISTER_CLOCK("sdhci-esdhc-imx.0", NULL, esdhc1_clk) + _REGISTER_CLOCK("sdhci-esdhc-imx.1", NULL, esdhc2_clk) + _REGISTER_CLOCK("imx53-ecspi.0", NULL, ecspi1_clk) + _REGISTER_CLOCK("imx53-ecspi.1", NULL, ecspi2_clk) + _REGISTER_CLOCK("imx53-cspi.0", NULL, cspi_clk) }; static void clk_tree_init(void) @@ -1363,7 +1377,6 @@ int __init mx51_clocks_init(unsigned long ckil, unsigned long osc, clk_tree_init(); - clk_set_parent(&uart_root_clk, &pll3_sw_clk); clk_enable(&cpu_clk); clk_enable(&main_bus_clk); @@ -1406,6 +1419,7 @@ int __init mx53_clocks_init(unsigned long ckil, unsigned long osc, clk_tree_init(); + clk_set_parent(&uart_root_clk, &pll3_sw_clk); clk_enable(&cpu_clk); clk_enable(&main_bus_clk); diff --git a/arch/arm/mach-mx5/devices-imx51.h b/arch/arm/mach-mx5/devices-imx51.h index 6302e46..7fff485 100644 --- a/arch/arm/mach-mx5/devices-imx51.h +++ b/arch/arm/mach-mx5/devices-imx51.h @@ -47,3 +47,11 @@ extern const struct imx_spi_imx_data imx51_ecspi_data[] __initconst; extern const struct imx_imx2_wdt_data imx51_imx2_wdt_data[] __initconst; #define imx51_add_imx2_wdt(id, pdata) \ imx_add_imx2_wdt(&imx51_imx2_wdt_data[id]) + +extern const struct imx_mxc_pwm_data imx51_mxc_pwm_data[] __initconst; +#define imx51_add_mxc_pwm(id) \ + imx_add_mxc_pwm(&imx51_mxc_pwm_data[id]) + +extern const struct imx_imx_keypad_data imx51_imx_keypad_data __initconst; +#define imx51_add_imx_keypad(pdata) \ + imx_add_imx_keypad(&imx51_imx_keypad_data, pdata) diff --git a/arch/arm/mach-mx5/devices-imx53.h b/arch/arm/mach-mx5/devices-imx53.h index 9d0ec25..8639735 100644 --- a/arch/arm/mach-mx5/devices-imx53.h +++ b/arch/arm/mach-mx5/devices-imx53.h @@ -8,6 +8,24 @@ #include <mach/mx53.h> #include <mach/devices-common.h> +extern const struct imx_fec_data imx53_fec_data __initconst; +#define imx53_add_fec(pdata) \ + imx_add_fec(&imx53_fec_data, pdata) + extern const struct imx_imx_uart_1irq_data imx53_imx_uart_data[] __initconst; #define imx53_add_imx_uart(id, pdata) \ imx_add_imx_uart_1irq(&imx53_imx_uart_data[id], pdata) + + +extern const struct imx_imx_i2c_data imx53_imx_i2c_data[] __initconst; +#define imx53_add_imx_i2c(id, pdata) \ + imx_add_imx_i2c(&imx53_imx_i2c_data[id], pdata) + +extern const struct imx_sdhci_esdhc_imx_data +imx53_sdhci_esdhc_imx_data[] __initconst; +#define imx53_add_sdhci_esdhc_imx(id, pdata) \ + imx_add_sdhci_esdhc_imx(&imx53_sdhci_esdhc_imx_data[id], pdata) + +extern const struct imx_spi_imx_data imx53_ecspi_data[] __initconst; +#define imx53_add_ecspi(id, pdata) \ + imx_add_spi_imx(&imx53_ecspi_data[id], pdata) diff --git a/arch/arm/mach-mx5/devices.c b/arch/arm/mach-mx5/devices.c index 1bda5cb..153ada5 100644 --- a/arch/arm/mach-mx5/devices.c +++ b/arch/arm/mach-mx5/devices.c @@ -120,25 +120,6 @@ struct platform_device mxc_usbh2_device = { }, }; -static struct resource mxc_kpp_resources[] = { - { - .start = MX51_MXC_INT_KPP, - .end = MX51_MXC_INT_KPP, - .flags = IORESOURCE_IRQ, - } , { - .start = MX51_KPP_BASE_ADDR, - .end = MX51_KPP_BASE_ADDR + 0x8 - 1, - .flags = IORESOURCE_MEM, - }, -}; - -struct platform_device mxc_keypad_device = { - .name = "imx-keypad", - .id = 0, - .num_resources = ARRAY_SIZE(mxc_kpp_resources), - .resource = mxc_kpp_resources, -}; - static struct mxc_gpio_port mxc_gpio_ports[] = { { .chip.label = "gpio-0", diff --git a/arch/arm/mach-mx5/devices.h b/arch/arm/mach-mx5/devices.h index 16891aa..55a5129 100644 --- a/arch/arm/mach-mx5/devices.h +++ b/arch/arm/mach-mx5/devices.h @@ -3,4 +3,3 @@ extern struct platform_device mxc_usbh1_device; extern struct platform_device mxc_usbh2_device; extern struct platform_device mxc_usbdr_udc_device; extern struct platform_device mxc_hsi2c_device; -extern struct platform_device mxc_keypad_device; diff --git a/arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c b/arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c index c96d018..e83ffad 100644 --- a/arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c +++ b/arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c @@ -21,7 +21,6 @@ #include <linux/fsl_devices.h> #include <linux/i2c/tsc2007.h> #include <linux/leds.h> -#include <linux/input/matrix_keypad.h> #include <mach/common.h> #include <mach/hardware.h> @@ -157,7 +156,7 @@ static int mbimx51_keymap[] = { KEY(3, 3, KEY_ENTER), }; -static struct matrix_keymap_data mbimx51_map_data = { +static const struct matrix_keymap_data mbimx51_map_data __initconst = { .keymap = mbimx51_keymap, .keymap_size = ARRAY_SIZE(mbimx51_keymap), }; @@ -209,7 +208,7 @@ void __init eukrea_mbimx51_baseboard_init(void) platform_add_devices(devices, ARRAY_SIZE(devices)); - mxc_register_device(&mxc_keypad_device, &mbimx51_map_data); + imx51_add_imx_keypad(&mbimx51_map_data); gpio_request(MBIMX51_TSC2007_GPIO, "tsc2007_irq"); gpio_direction_input(MBIMX51_TSC2007_GPIO); diff --git a/arch/arm/mach-mxs/Kconfig b/arch/arm/mach-mxs/Kconfig index c4ac7b4..8bfc8df 100644 --- a/arch/arm/mach-mxs/Kconfig +++ b/arch/arm/mach-mxs/Kconfig @@ -15,7 +15,7 @@ comment "MXS platforms:" config MACH_MX23EVK bool "Support MX23EVK Platform" select SOC_IMX23 - select MXS_HAVE_PLATFORM_DUART + select MXS_HAVE_AMBA_DUART default y help Include support for MX23EVK platform. This includes specific @@ -24,7 +24,7 @@ config MACH_MX23EVK config MACH_MX28EVK bool "Support MX28EVK Platform" select SOC_IMX28 - select MXS_HAVE_PLATFORM_DUART + select MXS_HAVE_AMBA_DUART select MXS_HAVE_PLATFORM_FEC default y help diff --git a/arch/arm/mach-mxs/clock-mx23.c b/arch/arm/mach-mxs/clock-mx23.c index 8f5a19a..b1a362e 100644 --- a/arch/arm/mach-mxs/clock-mx23.c +++ b/arch/arm/mach-mxs/clock-mx23.c @@ -21,6 +21,7 @@ #include <linux/clk.h> #include <linux/io.h> #include <linux/jiffies.h> +#include <linux/clkdev.h> #include <asm/clkdev.h> #include <asm/div64.h> @@ -437,10 +438,12 @@ _DEFINE_CLOCK(clk32k_clk, XTAL, TIMROT_CLK32K_GATE, &ref_xtal_clk); }, static struct clk_lookup lookups[] = { - _REGISTER_CLOCK("mxs-duart.0", NULL, uart_clk) + /* for amba bus driver */ + _REGISTER_CLOCK("duart", "apb_pclk", xbus_clk) + /* for amba-pl011 driver */ + _REGISTER_CLOCK("duart", NULL, uart_clk) _REGISTER_CLOCK("rtc", NULL, rtc_clk) _REGISTER_CLOCK(NULL, "hclk", hbus_clk) - _REGISTER_CLOCK(NULL, "xclk", xbus_clk) _REGISTER_CLOCK(NULL, "usb", usb_clk) _REGISTER_CLOCK(NULL, "audio", audio_clk) _REGISTER_CLOCK(NULL, "pwm", pwm_clk) @@ -518,6 +521,12 @@ int __init mx23_clocks_init(void) { clk_misc_init(); + clk_enable(&cpu_clk); + clk_enable(&hbus_clk); + clk_enable(&xbus_clk); + clk_enable(&emi_clk); + clk_enable(&uart_clk); + clkdev_add_table(lookups, ARRAY_SIZE(lookups)); mxs_timer_init(&clk32k_clk, MX23_INT_TIMER0); diff --git a/arch/arm/mach-mxs/clock-mx28.c b/arch/arm/mach-mxs/clock-mx28.c index 74e2103..56312c0 100644 --- a/arch/arm/mach-mxs/clock-mx28.c +++ b/arch/arm/mach-mxs/clock-mx28.c @@ -21,6 +21,7 @@ #include <linux/clk.h> #include <linux/io.h> #include <linux/jiffies.h> +#include <linux/clkdev.h> #include <asm/clkdev.h> #include <asm/div64.h> @@ -602,7 +603,12 @@ _DEFINE_CLOCK(fec_clk, ENET, DISABLE, &hbus_clk); }, static struct clk_lookup lookups[] = { - _REGISTER_CLOCK("mxs-duart.0", NULL, uart_clk) + /* for amba bus driver */ + _REGISTER_CLOCK("duart", "apb_pclk", xbus_clk) + /* for amba-pl011 driver */ + _REGISTER_CLOCK("duart", NULL, uart_clk) + _REGISTER_CLOCK("imx28-fec.0", NULL, fec_clk) + _REGISTER_CLOCK("imx28-fec.1", NULL, fec_clk) _REGISTER_CLOCK("fec.0", NULL, fec_clk) _REGISTER_CLOCK("rtc", NULL, rtc_clk) _REGISTER_CLOCK("pll2", NULL, pll2_clk) @@ -726,6 +732,12 @@ int __init mx28_clocks_init(void) { clk_misc_init(); + clk_enable(&cpu_clk); + clk_enable(&hbus_clk); + clk_enable(&xbus_clk); + clk_enable(&emi_clk); + clk_enable(&uart_clk); + clkdev_add_table(lookups, ARRAY_SIZE(lookups)); mxs_timer_init(&clk32k_clk, MX28_INT_TIMER0); diff --git a/arch/arm/mach-mxs/devices-mx23.h b/arch/arm/mach-mxs/devices-mx23.h index d0f49fc..1256788 100644 --- a/arch/arm/mach-mxs/devices-mx23.h +++ b/arch/arm/mach-mxs/devices-mx23.h @@ -11,6 +11,6 @@ #include <mach/mx23.h> #include <mach/devices-common.h> -extern const struct mxs_duart_data mx23_duart_data __initconst; +extern const struct amba_device mx23_duart_device __initconst; #define mx23_add_duart() \ - mxs_add_duart(&mx23_duart_data) + mxs_add_duart(&mx23_duart_device) diff --git a/arch/arm/mach-mxs/devices-mx28.h b/arch/arm/mach-mxs/devices-mx28.h index 00b736c..33773a6 100644 --- a/arch/arm/mach-mxs/devices-mx28.h +++ b/arch/arm/mach-mxs/devices-mx28.h @@ -11,9 +11,9 @@ #include <mach/mx28.h> #include <mach/devices-common.h> -extern const struct mxs_duart_data mx28_duart_data __initconst; +extern const struct amba_device mx28_duart_device __initconst; #define mx28_add_duart() \ - mxs_add_duart(&mx28_duart_data) + mxs_add_duart(&mx28_duart_device) extern const struct mxs_fec_data mx28_fec_data[] __initconst; #define mx28_add_fec(id, pdata) \ diff --git a/arch/arm/mach-mxs/devices.c b/arch/arm/mach-mxs/devices.c index 6b60f02..c20d547 100644 --- a/arch/arm/mach-mxs/devices.c +++ b/arch/arm/mach-mxs/devices.c @@ -19,9 +19,8 @@ #include <linux/kernel.h> #include <linux/slab.h> #include <linux/init.h> -#include <linux/err.h> #include <linux/platform_device.h> -#include <mach/common.h> +#include <linux/amba/bus.h> struct platform_device *__init mxs_add_platform_device_dmamask( const char *name, int id, @@ -73,3 +72,17 @@ err: return pdev; } + +int __init mxs_add_amba_device(const struct amba_device *dev) +{ + struct amba_device *adev = kmalloc(sizeof(*adev), GFP_KERNEL); + + if (!adev) { + pr_err("%s: failed to allocate memory", __func__); + return -ENOMEM; + } + + *adev = *dev; + + return amba_device_register(adev, &iomem_resource); +} diff --git a/arch/arm/mach-mxs/devices/Kconfig b/arch/arm/mach-mxs/devices/Kconfig index a35a2dc..cf7dc1a 100644 --- a/arch/arm/mach-mxs/devices/Kconfig +++ b/arch/arm/mach-mxs/devices/Kconfig @@ -1,5 +1,6 @@ -config MXS_HAVE_PLATFORM_DUART +config MXS_HAVE_AMBA_DUART bool + select ARM_AMBA config MXS_HAVE_PLATFORM_FEC bool diff --git a/arch/arm/mach-mxs/devices/Makefile b/arch/arm/mach-mxs/devices/Makefile index 4b5266a..d0a09f6 100644 --- a/arch/arm/mach-mxs/devices/Makefile +++ b/arch/arm/mach-mxs/devices/Makefile @@ -1,2 +1,2 @@ -obj-$(CONFIG_MXS_HAVE_PLATFORM_DUART) += platform-duart.o +obj-$(CONFIG_MXS_HAVE_AMBA_DUART) += amba-duart.o obj-$(CONFIG_MXS_HAVE_PLATFORM_FEC) += platform-fec.o diff --git a/arch/arm/mach-mxs/devices/amba-duart.c b/arch/arm/mach-mxs/devices/amba-duart.c new file mode 100644 index 0000000..a559db0 --- /dev/null +++ b/arch/arm/mach-mxs/devices/amba-duart.c @@ -0,0 +1,40 @@ +/* + * Copyright (C) 2009-2010 Pengutronix + * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de> + * + * Copyright 2010 Freescale Semiconductor, Inc. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or modify it under + * the terms of the GNU General Public License version 2 as published by the + * Free Software Foundation. + */ +#include <asm/irq.h> +#include <mach/mx23.h> +#include <mach/mx28.h> +#include <mach/devices-common.h> + +#define MXS_AMBA_DUART_DEVICE(name, soc) \ +const struct amba_device name##_device __initconst = { \ + .dev = { \ + .init_name = "duart", \ + }, \ + .res = { \ + .start = soc ## _DUART_BASE_ADDR, \ + .end = (soc ## _DUART_BASE_ADDR) + SZ_8K - 1, \ + .flags = IORESOURCE_MEM, \ + }, \ + .irq = {soc ## _INT_DUART, NO_IRQ}, \ +} + +#ifdef CONFIG_SOC_IMX23 +MXS_AMBA_DUART_DEVICE(mx23_duart, MX23); +#endif + +#ifdef CONFIG_SOC_IMX28 +MXS_AMBA_DUART_DEVICE(mx28_duart, MX28); +#endif + +int __init mxs_add_duart(const struct amba_device *dev) +{ + return mxs_add_amba_device(dev); +} diff --git a/arch/arm/mach-mxs/devices/platform-duart.c b/arch/arm/mach-mxs/devices/platform-duart.c deleted file mode 100644 index 2fe0df5..0000000 --- a/arch/arm/mach-mxs/devices/platform-duart.c +++ /dev/null @@ -1,48 +0,0 @@ -/* - * Copyright (C) 2009-2010 Pengutronix - * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de> - * - * Copyright 2010 Freescale Semiconductor, Inc. All Rights Reserved. - * - * This program is free software; you can redistribute it and/or modify it under - * the terms of the GNU General Public License version 2 as published by the - * Free Software Foundation. - */ -#include <mach/mx23.h> -#include <mach/mx28.h> -#include <mach/devices-common.h> - -#define mxs_duart_data_entry(soc) \ - { \ - .iobase = soc ## _DUART_BASE_ADDR, \ - .irq = soc ## _INT_DUART, \ - } - -#ifdef CONFIG_SOC_IMX23 -const struct mxs_duart_data mx23_duart_data __initconst = - mxs_duart_data_entry(MX23); -#endif - -#ifdef CONFIG_SOC_IMX28 -const struct mxs_duart_data mx28_duart_data __initconst = - mxs_duart_data_entry(MX28); -#endif - -struct platform_device *__init mxs_add_duart( - const struct mxs_duart_data *data) -{ - struct resource res[] = { - { - .start = data->iobase, - .end = data->iobase + SZ_8K - 1, - .flags = IORESOURCE_MEM, - }, { - .start = data->irq, - .end = data->irq, - .flags = IORESOURCE_IRQ, - }, - }; - - return mxs_add_platform_device("mxs-duart", 0, res, ARRAY_SIZE(res), - NULL, 0); -} diff --git a/arch/arm/mach-mxs/devices/platform-fec.c b/arch/arm/mach-mxs/devices/platform-fec.c index c08168c..c42dff7 100644 --- a/arch/arm/mach-mxs/devices/platform-fec.c +++ b/arch/arm/mach-mxs/devices/platform-fec.c @@ -45,6 +45,6 @@ struct platform_device *__init mxs_add_fec( }, }; - return mxs_add_platform_device("fec", data->id, + return mxs_add_platform_device("imx28-fec", data->id, res, ARRAY_SIZE(res), pdata, sizeof(*pdata)); } diff --git a/arch/arm/mach-mxs/include/mach/devices-common.h b/arch/arm/mach-mxs/include/mach/devices-common.h index 3da48d4..6c3d1a1 100644 --- a/arch/arm/mach-mxs/include/mach/devices-common.h +++ b/arch/arm/mach-mxs/include/mach/devices-common.h @@ -9,6 +9,7 @@ #include <linux/kernel.h> #include <linux/platform_device.h> #include <linux/init.h> +#include <linux/amba/bus.h> struct platform_device *mxs_add_platform_device_dmamask( const char *name, int id, @@ -24,14 +25,10 @@ static inline struct platform_device *mxs_add_platform_device( name, id, res, num_resources, data, size_data, 0); } +int __init mxs_add_amba_device(const struct amba_device *dev); + /* duart */ -struct mxs_duart_data { - resource_size_t iobase; - resource_size_t iosize; - resource_size_t irq; -}; -struct platform_device *__init mxs_add_duart( - const struct mxs_duart_data *data); +int __init mxs_add_duart(const struct amba_device *dev); /* fec */ #include <linux/fec.h> diff --git a/arch/arm/mach-mxs/mach-mx28evk.c b/arch/arm/mach-mxs/mach-mx28evk.c index d162e95..8e2c597 100644 --- a/arch/arm/mach-mxs/mach-mx28evk.c +++ b/arch/arm/mach-mxs/mach-mx28evk.c @@ -57,6 +57,19 @@ static const iomux_cfg_t mx28evk_pads[] __initconst = { (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), MX28_PAD_ENET_CLK__CLKCTRL_ENET | (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), + /* fec1 */ + MX28_PAD_ENET0_CRS__ENET1_RX_EN | + (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), + MX28_PAD_ENET0_RXD2__ENET1_RXD0 | + (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), + MX28_PAD_ENET0_RXD3__ENET1_RXD1 | + (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), + MX28_PAD_ENET0_COL__ENET1_TX_EN | + (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), + MX28_PAD_ENET0_TXD2__ENET1_TXD0 | + (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), + MX28_PAD_ENET0_TXD3__ENET1_TXD1 | + (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), /* phy power line */ MX28_PAD_SSP1_DATA3__GPIO_2_15 | (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL), @@ -106,8 +119,14 @@ static void __init mx28evk_fec_reset(void) gpio_set_value(MX28EVK_FEC_PHY_RESET, 1); } -static const struct fec_platform_data mx28_fec_pdata __initconst = { - .phy = PHY_INTERFACE_MODE_RMII, +static struct fec_platform_data mx28_fec_pdata[] = { + { + /* fec0 */ + .phy = PHY_INTERFACE_MODE_RMII, + }, { + /* fec1 */ + .phy = PHY_INTERFACE_MODE_RMII, + }, }; static void __init mx28evk_init(void) @@ -117,7 +136,8 @@ static void __init mx28evk_init(void) mx28_add_duart(); mx28evk_fec_reset(); - mx28_add_fec(0, &mx28_fec_pdata); + mx28_add_fec(0, &mx28_fec_pdata[0]); + mx28_add_fec(1, &mx28_fec_pdata[1]); } static void __init mx28evk_timer_init(void) diff --git a/arch/arm/mach-netx/generic.c b/arch/arm/mach-netx/generic.c index 43da8bb..29ffa75 100644 --- a/arch/arm/mach-netx/generic.c +++ b/arch/arm/mach-netx/generic.c @@ -88,13 +88,13 @@ netx_hif_demux_handler(unsigned int irq_unused, struct irq_desc *desc) } static int -netx_hif_irq_type(unsigned int _irq, unsigned int type) +netx_hif_irq_type(struct irq_data *d, unsigned int type) { unsigned int val, irq; val = readl(NETX_DPMAS_IF_CONF1); - irq = _irq - NETX_IRQ_HIF_CHAINED(0); + irq = d->irq - NETX_IRQ_HIF_CHAINED(0); if (type & IRQ_TYPE_EDGE_RISING) { DEBUG_IRQ("rising edges\n"); @@ -119,49 +119,49 @@ netx_hif_irq_type(unsigned int _irq, unsigned int type) } static void -netx_hif_ack_irq(unsigned int _irq) +netx_hif_ack_irq(struct irq_data *d) { unsigned int val, irq; - irq = _irq - NETX_IRQ_HIF_CHAINED(0); + irq = d->irq - NETX_IRQ_HIF_CHAINED(0); writel((1 << 24) << irq, NETX_DPMAS_INT_STAT); val = readl(NETX_DPMAS_INT_EN); val &= ~((1 << 24) << irq); writel(val, NETX_DPMAS_INT_EN); - DEBUG_IRQ("%s: irq %d\n", __func__, _irq); + DEBUG_IRQ("%s: irq %d\n", __func__, d->irq); } static void -netx_hif_mask_irq(unsigned int _irq) +netx_hif_mask_irq(struct irq_data *d) { unsigned int val, irq; - irq = _irq - NETX_IRQ_HIF_CHAINED(0); + irq = d->irq - NETX_IRQ_HIF_CHAINED(0); val = readl(NETX_DPMAS_INT_EN); val &= ~((1 << 24) << irq); writel(val, NETX_DPMAS_INT_EN); - DEBUG_IRQ("%s: irq %d\n", __func__, _irq); + DEBUG_IRQ("%s: irq %d\n", __func__, d->irq); } static void -netx_hif_unmask_irq(unsigned int _irq) +netx_hif_unmask_irq(struct irq_data *d) { unsigned int val, irq; - irq = _irq - NETX_IRQ_HIF_CHAINED(0); + irq = d->irq - NETX_IRQ_HIF_CHAINED(0); val = readl(NETX_DPMAS_INT_EN); val |= (1 << 24) << irq; writel(val, NETX_DPMAS_INT_EN); - DEBUG_IRQ("%s: irq %d\n", __func__, _irq); + DEBUG_IRQ("%s: irq %d\n", __func__, d->irq); } static struct irq_chip netx_hif_chip = { - .ack = netx_hif_ack_irq, - .mask = netx_hif_mask_irq, - .unmask = netx_hif_unmask_irq, - .set_type = netx_hif_irq_type, + .irq_ack = netx_hif_ack_irq, + .irq_mask = netx_hif_mask_irq, + .irq_unmask = netx_hif_unmask_irq, + .irq_set_type = netx_hif_irq_type, }; void __init netx_init_irq(void) diff --git a/arch/arm/mach-ns9xxx/board-a9m9750dev.c b/arch/arm/mach-ns9xxx/board-a9m9750dev.c index b45bb3b..0c0d524 100644 --- a/arch/arm/mach-ns9xxx/board-a9m9750dev.c +++ b/arch/arm/mach-ns9xxx/board-a9m9750dev.c @@ -37,44 +37,44 @@ void __init board_a9m9750dev_map_io(void) ARRAY_SIZE(board_a9m9750dev_io_desc)); } -static void a9m9750dev_fpga_ack_irq(unsigned int irq) +static void a9m9750dev_fpga_ack_irq(struct irq_data *d) { /* nothing */ } -static void a9m9750dev_fpga_mask_irq(unsigned int irq) +static void a9m9750dev_fpga_mask_irq(struct irq_data *d) { u8 ier; ier = __raw_readb(FPGA_IER); - ier &= ~(1 << (irq - FPGA_IRQ(0))); + ier &= ~(1 << (d->irq - FPGA_IRQ(0))); __raw_writeb(ier, FPGA_IER); } -static void a9m9750dev_fpga_maskack_irq(unsigned int irq) +static void a9m9750dev_fpga_maskack_irq(struct irq_data *d) { - a9m9750dev_fpga_mask_irq(irq); - a9m9750dev_fpga_ack_irq(irq); + a9m9750dev_fpga_mask_irq(d); + a9m9750dev_fpga_ack_irq(d); } -static void a9m9750dev_fpga_unmask_irq(unsigned int irq) +static void a9m9750dev_fpga_unmask_irq(struct irq_data *d) { u8 ier; ier = __raw_readb(FPGA_IER); - ier |= 1 << (irq - FPGA_IRQ(0)); + ier |= 1 << (d->irq - FPGA_IRQ(0)); __raw_writeb(ier, FPGA_IER); } static struct irq_chip a9m9750dev_fpga_chip = { - .ack = a9m9750dev_fpga_ack_irq, - .mask = a9m9750dev_fpga_mask_irq, - .mask_ack = a9m9750dev_fpga_maskack_irq, - .unmask = a9m9750dev_fpga_unmask_irq, + .irq_ack = a9m9750dev_fpga_ack_irq, + .irq_mask = a9m9750dev_fpga_mask_irq, + .irq_mask_ack = a9m9750dev_fpga_maskack_irq, + .irq_unmask = a9m9750dev_fpga_unmask_irq, }; static void a9m9750dev_fpga_demux_handler(unsigned int irq, @@ -82,7 +82,7 @@ static void a9m9750dev_fpga_demux_handler(unsigned int irq, { u8 stat = __raw_readb(FPGA_ISR); - desc->chip->mask_ack(irq); + desc->irq_data.chip->irq_mask_ack(&desc->irq_data); while (stat != 0) { int irqno = fls(stat) - 1; @@ -92,7 +92,7 @@ static void a9m9750dev_fpga_demux_handler(unsigned int irq, generic_handle_irq(FPGA_IRQ(irqno)); } - desc->chip->unmask(irq); + desc->irq_data.chip->irq_unmask(&desc->irq_data); } void __init board_a9m9750dev_init_irq(void) diff --git a/arch/arm/mach-ns9xxx/irq.c b/arch/arm/mach-ns9xxx/irq.c index 038f24d..389fa5c 100644 --- a/arch/arm/mach-ns9xxx/irq.c +++ b/arch/arm/mach-ns9xxx/irq.c @@ -22,40 +22,40 @@ #define irq2prio(i) (i) #define prio2irq(p) (p) -static void ns9xxx_mask_irq(unsigned int irq) +static void ns9xxx_mask_irq(struct irq_data *d) { /* XXX: better use cpp symbols */ - int prio = irq2prio(irq); + int prio = irq2prio(d->irq); u32 ic = __raw_readl(SYS_IC(prio / 4)); ic &= ~(1 << (7 + 8 * (3 - (prio & 3)))); __raw_writel(ic, SYS_IC(prio / 4)); } -static void ns9xxx_ack_irq(unsigned int irq) +static void ns9xxx_ack_irq(struct irq_data *d) { __raw_writel(0, SYS_ISRADDR); } -static void ns9xxx_maskack_irq(unsigned int irq) +static void ns9xxx_maskack_irq(struct irq_data *d) { - ns9xxx_mask_irq(irq); - ns9xxx_ack_irq(irq); + ns9xxx_mask_irq(d); + ns9xxx_ack_irq(d); } -static void ns9xxx_unmask_irq(unsigned int irq) +static void ns9xxx_unmask_irq(struct irq_data *d) { /* XXX: better use cpp symbols */ - int prio = irq2prio(irq); + int prio = irq2prio(d->irq); u32 ic = __raw_readl(SYS_IC(prio / 4)); ic |= 1 << (7 + 8 * (3 - (prio & 3))); __raw_writel(ic, SYS_IC(prio / 4)); } static struct irq_chip ns9xxx_chip = { - .ack = ns9xxx_ack_irq, - .mask = ns9xxx_mask_irq, - .mask_ack = ns9xxx_maskack_irq, - .unmask = ns9xxx_unmask_irq, + .irq_ack = ns9xxx_ack_irq, + .irq_mask = ns9xxx_mask_irq, + .irq_mask_ack = ns9xxx_maskack_irq, + .irq_unmask = ns9xxx_unmask_irq, }; #if 0 @@ -92,10 +92,10 @@ static void handle_prio_irq(unsigned int irq, struct irq_desc *desc) if (desc->status & IRQ_DISABLED) out_mask: - desc->chip->mask(irq); + desc->irq_data.chip->irq_mask(&desc->irq_data); /* ack unconditionally to unmask lower prio irqs */ - desc->chip->ack(irq); + desc->irq_data.chip->irq_ack(&desc->irq_data); raw_spin_unlock(&desc->lock); } diff --git a/arch/arm/mach-nuc93x/irq.c b/arch/arm/mach-nuc93x/irq.c index a7a88ea..1f8a05a 100644 --- a/arch/arm/mach-nuc93x/irq.c +++ b/arch/arm/mach-nuc93x/irq.c @@ -25,9 +25,9 @@ #include <mach/hardware.h> #include <mach/regs-irq.h> -static void nuc93x_irq_mask(unsigned int irq) +static void nuc93x_irq_mask(struct irq_data *d) { - __raw_writel(1 << irq, REG_AIC_MDCR); + __raw_writel(1 << d->irq, REG_AIC_MDCR); } /* @@ -35,21 +35,21 @@ static void nuc93x_irq_mask(unsigned int irq) * to REG_AIC_EOSCR for ACK */ -static void nuc93x_irq_ack(unsigned int irq) +static void nuc93x_irq_ack(struct irq_data *d) { __raw_writel(0x01, REG_AIC_EOSCR); } -static void nuc93x_irq_unmask(unsigned int irq) +static void nuc93x_irq_unmask(struct irq_data *d) { - __raw_writel(1 << irq, REG_AIC_MECR); + __raw_writel(1 << d->irq, REG_AIC_MECR); } static struct irq_chip nuc93x_irq_chip = { - .ack = nuc93x_irq_ack, - .mask = nuc93x_irq_mask, - .unmask = nuc93x_irq_unmask, + .irq_ack = nuc93x_irq_ack, + .irq_mask = nuc93x_irq_mask, + .irq_unmask = nuc93x_irq_unmask, }; void __init nuc93x_init_irq(void) diff --git a/arch/arm/mach-omap1/ams-delta-fiq.c b/arch/arm/mach-omap1/ams-delta-fiq.c index 6c994e2..152b32c 100644 --- a/arch/arm/mach-omap1/ams-delta-fiq.c +++ b/arch/arm/mach-omap1/ams-delta-fiq.c @@ -49,7 +49,7 @@ static irqreturn_t deferred_fiq(int irq, void *dev_id) irq_desc = irq_to_desc(IH_GPIO_BASE); if (irq_desc) - irq_chip = irq_desc->chip; + irq_chip = irq_desc->irq_data.chip; /* * For each handled GPIO interrupt, keep calling its interrupt handler @@ -62,13 +62,15 @@ static irqreturn_t deferred_fiq(int irq, void *dev_id) while (irq_counter[gpio] < fiq_count) { if (gpio != AMS_DELTA_GPIO_PIN_KEYBRD_CLK) { + struct irq_data *d = irq_get_irq_data(irq_num); + /* * It looks like handle_edge_irq() that * OMAP GPIO edge interrupts default to, * expects interrupt already unmasked. */ - if (irq_chip && irq_chip->unmask) - irq_chip->unmask(irq_num); + if (irq_chip && irq_chip->irq_unmask) + irq_chip->irq_unmask(d); } generic_handle_irq(irq_num); diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c index bd0495a..22cc8c8 100644 --- a/arch/arm/mach-omap1/board-ams-delta.c +++ b/arch/arm/mach-omap1/board-ams-delta.c @@ -179,6 +179,22 @@ static struct omap_board_config_kernel ams_delta_config[] = { { OMAP_TAG_LCD, &ams_delta_lcd_config }, }; +static struct resource ams_delta_nand_resources[] = { + [0] = { + .start = OMAP1_MPUIO_BASE, + .end = OMAP1_MPUIO_BASE + + OMAP_MPUIO_IO_CNTL + sizeof(u32) - 1, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device ams_delta_nand_device = { + .name = "ams-delta-nand", + .id = -1, + .num_resources = ARRAY_SIZE(ams_delta_nand_resources), + .resource = ams_delta_nand_resources, +}; + static struct resource ams_delta_kp_resources[] = { [0] = { .start = INT_KEYBOARD, @@ -265,6 +281,7 @@ static struct omap1_cam_platform_data ams_delta_camera_platform_data = { }; static struct platform_device *ams_delta_devices[] __initdata = { + &ams_delta_nand_device, &ams_delta_kp_device, &ams_delta_lcd_device, &ams_delta_led_device, diff --git a/arch/arm/mach-omap1/fpga.c b/arch/arm/mach-omap1/fpga.c index 8780e75..0ace799 100644 --- a/arch/arm/mach-omap1/fpga.c +++ b/arch/arm/mach-omap1/fpga.c @@ -30,9 +30,9 @@ #include <plat/fpga.h> #include <mach/gpio.h> -static void fpga_mask_irq(unsigned int irq) +static void fpga_mask_irq(struct irq_data *d) { - irq -= OMAP_FPGA_IRQ_BASE; + unsigned int irq = d->irq - OMAP_FPGA_IRQ_BASE; if (irq < 8) __raw_writeb((__raw_readb(OMAP1510_FPGA_IMR_LO) @@ -58,14 +58,14 @@ static inline u32 get_fpga_unmasked_irqs(void) } -static void fpga_ack_irq(unsigned int irq) +static void fpga_ack_irq(struct irq_data *d) { /* Don't need to explicitly ACK FPGA interrupts */ } -static void fpga_unmask_irq(unsigned int irq) +static void fpga_unmask_irq(struct irq_data *d) { - irq -= OMAP_FPGA_IRQ_BASE; + unsigned int irq = d->irq - OMAP_FPGA_IRQ_BASE; if (irq < 8) __raw_writeb((__raw_readb(OMAP1510_FPGA_IMR_LO) | (1 << irq)), @@ -78,10 +78,10 @@ static void fpga_unmask_irq(unsigned int irq) | (1 << (irq - 16))), INNOVATOR_FPGA_IMR2); } -static void fpga_mask_ack_irq(unsigned int irq) +static void fpga_mask_ack_irq(struct irq_data *d) { - fpga_mask_irq(irq); - fpga_ack_irq(irq); + fpga_mask_irq(d); + fpga_ack_irq(d); } void innovator_fpga_IRQ_demux(unsigned int irq, struct irq_desc *desc) @@ -105,17 +105,17 @@ void innovator_fpga_IRQ_demux(unsigned int irq, struct irq_desc *desc) static struct irq_chip omap_fpga_irq_ack = { .name = "FPGA-ack", - .ack = fpga_mask_ack_irq, - .mask = fpga_mask_irq, - .unmask = fpga_unmask_irq, + .irq_ack = fpga_mask_ack_irq, + .irq_mask = fpga_mask_irq, + .irq_unmask = fpga_unmask_irq, }; static struct irq_chip omap_fpga_irq = { .name = "FPGA", - .ack = fpga_ack_irq, - .mask = fpga_mask_irq, - .unmask = fpga_unmask_irq, + .irq_ack = fpga_ack_irq, + .irq_mask = fpga_mask_irq, + .irq_unmask = fpga_unmask_irq, }; /* diff --git a/arch/arm/mach-omap1/irq.c b/arch/arm/mach-omap1/irq.c index 6bddbc8..4770158 100644 --- a/arch/arm/mach-omap1/irq.c +++ b/arch/arm/mach-omap1/irq.c @@ -70,48 +70,48 @@ static inline void irq_bank_writel(unsigned long value, int bank, int offset) omap_writel(value, irq_banks[bank].base_reg + offset); } -static void omap_ack_irq(unsigned int irq) +static void omap_ack_irq(struct irq_data *d) { - if (irq > 31) + if (d->irq > 31) omap_writel(0x1, OMAP_IH2_BASE + IRQ_CONTROL_REG_OFFSET); omap_writel(0x1, OMAP_IH1_BASE + IRQ_CONTROL_REG_OFFSET); } -static void omap_mask_irq(unsigned int irq) +static void omap_mask_irq(struct irq_data *d) { - int bank = IRQ_BANK(irq); + int bank = IRQ_BANK(d->irq); u32 l; l = omap_readl(irq_banks[bank].base_reg + IRQ_MIR_REG_OFFSET); - l |= 1 << IRQ_BIT(irq); + l |= 1 << IRQ_BIT(d->irq); omap_writel(l, irq_banks[bank].base_reg + IRQ_MIR_REG_OFFSET); } -static void omap_unmask_irq(unsigned int irq) +static void omap_unmask_irq(struct irq_data *d) { - int bank = IRQ_BANK(irq); + int bank = IRQ_BANK(d->irq); u32 l; l = omap_readl(irq_banks[bank].base_reg + IRQ_MIR_REG_OFFSET); - l &= ~(1 << IRQ_BIT(irq)); + l &= ~(1 << IRQ_BIT(d->irq)); omap_writel(l, irq_banks[bank].base_reg + IRQ_MIR_REG_OFFSET); } -static void omap_mask_ack_irq(unsigned int irq) +static void omap_mask_ack_irq(struct irq_data *d) { - omap_mask_irq(irq); - omap_ack_irq(irq); + omap_mask_irq(d); + omap_ack_irq(d); } -static int omap_wake_irq(unsigned int irq, unsigned int enable) +static int omap_wake_irq(struct irq_data *d, unsigned int enable) { - int bank = IRQ_BANK(irq); + int bank = IRQ_BANK(d->irq); if (enable) - irq_banks[bank].wake_enable |= IRQ_BIT(irq); + irq_banks[bank].wake_enable |= IRQ_BIT(d->irq); else - irq_banks[bank].wake_enable &= ~IRQ_BIT(irq); + irq_banks[bank].wake_enable &= ~IRQ_BIT(d->irq); return 0; } @@ -168,10 +168,10 @@ static struct omap_irq_bank omap1610_irq_banks[] = { static struct irq_chip omap_irq_chip = { .name = "MPU", - .ack = omap_mask_ack_irq, - .mask = omap_mask_irq, - .unmask = omap_unmask_irq, - .set_wake = omap_wake_irq, + .irq_ack = omap_mask_ack_irq, + .irq_mask = omap_mask_irq, + .irq_unmask = omap_unmask_irq, + .irq_set_wake = omap_wake_irq, }; void __init omap_init_irq(void) @@ -239,9 +239,9 @@ void __init omap_init_irq(void) /* Unmask level 2 handler */ if (cpu_is_omap7xx()) - omap_unmask_irq(INT_7XX_IH2_IRQ); + omap_unmask_irq(irq_get_irq_data(INT_7XX_IH2_IRQ)); else if (cpu_is_omap15xx()) - omap_unmask_irq(INT_1510_IH2_IRQ); + omap_unmask_irq(irq_get_irq_data(INT_1510_IH2_IRQ)); else if (cpu_is_omap16xx()) - omap_unmask_irq(INT_1610_IH2_IRQ); + omap_unmask_irq(irq_get_irq_data(INT_1610_IH2_IRQ)); } diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c index 85bf8ca..23049c4 100644 --- a/arch/arm/mach-omap2/irq.c +++ b/arch/arm/mach-omap2/irq.c @@ -100,13 +100,14 @@ static int omap_check_spurious(unsigned int irq) } /* XXX: FIQ and additional INTC support (only MPU at the moment) */ -static void omap_ack_irq(unsigned int irq) +static void omap_ack_irq(struct irq_data *d) { intc_bank_write_reg(0x1, &irq_banks[0], INTC_CONTROL); } -static void omap_mask_irq(unsigned int irq) +static void omap_mask_irq(struct irq_data *d) { + unsigned int irq = d->irq; int offset = irq & (~(IRQ_BITS_PER_REG - 1)); if (cpu_is_omap34xx()) { @@ -128,8 +129,9 @@ static void omap_mask_irq(unsigned int irq) intc_bank_write_reg(1 << irq, &irq_banks[0], INTC_MIR_SET0 + offset); } -static void omap_unmask_irq(unsigned int irq) +static void omap_unmask_irq(struct irq_data *d) { + unsigned int irq = d->irq; int offset = irq & (~(IRQ_BITS_PER_REG - 1)); irq &= (IRQ_BITS_PER_REG - 1); @@ -137,17 +139,17 @@ static void omap_unmask_irq(unsigned int irq) intc_bank_write_reg(1 << irq, &irq_banks[0], INTC_MIR_CLEAR0 + offset); } -static void omap_mask_ack_irq(unsigned int irq) +static void omap_mask_ack_irq(struct irq_data *d) { - omap_mask_irq(irq); - omap_ack_irq(irq); + omap_mask_irq(d); + omap_ack_irq(d); } static struct irq_chip omap_irq_chip = { - .name = "INTC", - .ack = omap_mask_ack_irq, - .mask = omap_mask_irq, - .unmask = omap_unmask_irq, + .name = "INTC", + .irq_ack = omap_mask_ack_irq, + .irq_mask = omap_mask_irq, + .irq_unmask = omap_unmask_irq, }; static void __init omap_irq_bank_init_one(struct omap_irq_bank *bank) diff --git a/arch/arm/mach-pnx4008/irq.c b/arch/arm/mach-pnx4008/irq.c index a9ce02b..c69c180 100644 --- a/arch/arm/mach-pnx4008/irq.c +++ b/arch/arm/mach-pnx4008/irq.c @@ -36,44 +36,44 @@ static u8 pnx4008_irq_type[NR_IRQS] = PNX4008_IRQ_TYPES; -static void pnx4008_mask_irq(unsigned int irq) +static void pnx4008_mask_irq(struct irq_data *d) { - __raw_writel(__raw_readl(INTC_ER(irq)) & ~INTC_BIT(irq), INTC_ER(irq)); /* mask interrupt */ + __raw_writel(__raw_readl(INTC_ER(d->irq)) & ~INTC_BIT(d->irq), INTC_ER(d->irq)); /* mask interrupt */ } -static void pnx4008_unmask_irq(unsigned int irq) +static void pnx4008_unmask_irq(struct irq_data *d) { - __raw_writel(__raw_readl(INTC_ER(irq)) | INTC_BIT(irq), INTC_ER(irq)); /* unmask interrupt */ + __raw_writel(__raw_readl(INTC_ER(d->irq)) | INTC_BIT(d->irq), INTC_ER(d->irq)); /* unmask interrupt */ } -static void pnx4008_mask_ack_irq(unsigned int irq) +static void pnx4008_mask_ack_irq(struct irq_data *d) { - __raw_writel(__raw_readl(INTC_ER(irq)) & ~INTC_BIT(irq), INTC_ER(irq)); /* mask interrupt */ - __raw_writel(INTC_BIT(irq), INTC_SR(irq)); /* clear interrupt status */ + __raw_writel(__raw_readl(INTC_ER(d->irq)) & ~INTC_BIT(d->irq), INTC_ER(d->irq)); /* mask interrupt */ + __raw_writel(INTC_BIT(d->irq), INTC_SR(d->irq)); /* clear interrupt status */ } -static int pnx4008_set_irq_type(unsigned int irq, unsigned int type) +static int pnx4008_set_irq_type(struct irq_data *d, unsigned int type) { switch (type) { case IRQ_TYPE_EDGE_RISING: - __raw_writel(__raw_readl(INTC_ATR(irq)) | INTC_BIT(irq), INTC_ATR(irq)); /*edge sensitive */ - __raw_writel(__raw_readl(INTC_APR(irq)) | INTC_BIT(irq), INTC_APR(irq)); /*rising edge */ - set_irq_handler(irq, handle_edge_irq); + __raw_writel(__raw_readl(INTC_ATR(d->irq)) | INTC_BIT(d->irq), INTC_ATR(d->irq)); /*edge sensitive */ + __raw_writel(__raw_readl(INTC_APR(d->irq)) | INTC_BIT(d->irq), INTC_APR(d->irq)); /*rising edge */ + set_irq_handler(d->irq, handle_edge_irq); break; case IRQ_TYPE_EDGE_FALLING: - __raw_writel(__raw_readl(INTC_ATR(irq)) | INTC_BIT(irq), INTC_ATR(irq)); /*edge sensitive */ - __raw_writel(__raw_readl(INTC_APR(irq)) & ~INTC_BIT(irq), INTC_APR(irq)); /*falling edge */ - set_irq_handler(irq, handle_edge_irq); + __raw_writel(__raw_readl(INTC_ATR(d->irq)) | INTC_BIT(d->irq), INTC_ATR(d->irq)); /*edge sensitive */ + __raw_writel(__raw_readl(INTC_APR(d->irq)) & ~INTC_BIT(d->irq), INTC_APR(d->irq)); /*falling edge */ + set_irq_handler(d->irq, handle_edge_irq); break; case IRQ_TYPE_LEVEL_LOW: - __raw_writel(__raw_readl(INTC_ATR(irq)) & ~INTC_BIT(irq), INTC_ATR(irq)); /*level sensitive */ - __raw_writel(__raw_readl(INTC_APR(irq)) & ~INTC_BIT(irq), INTC_APR(irq)); /*low level */ - set_irq_handler(irq, handle_level_irq); + __raw_writel(__raw_readl(INTC_ATR(d->irq)) & ~INTC_BIT(d->irq), INTC_ATR(d->irq)); /*level sensitive */ + __raw_writel(__raw_readl(INTC_APR(d->irq)) & ~INTC_BIT(d->irq), INTC_APR(d->irq)); /*low level */ + set_irq_handler(d->irq, handle_level_irq); break; case IRQ_TYPE_LEVEL_HIGH: - __raw_writel(__raw_readl(INTC_ATR(irq)) & ~INTC_BIT(irq), INTC_ATR(irq)); /*level sensitive */ - __raw_writel(__raw_readl(INTC_APR(irq)) | INTC_BIT(irq), INTC_APR(irq)); /* high level */ - set_irq_handler(irq, handle_level_irq); + __raw_writel(__raw_readl(INTC_ATR(d->irq)) & ~INTC_BIT(d->irq), INTC_ATR(d->irq)); /*level sensitive */ + __raw_writel(__raw_readl(INTC_APR(d->irq)) | INTC_BIT(d->irq), INTC_APR(d->irq)); /* high level */ + set_irq_handler(d->irq, handle_level_irq); break; /* IRQ_TYPE_EDGE_BOTH is not supported */ @@ -85,10 +85,10 @@ static int pnx4008_set_irq_type(unsigned int irq, unsigned int type) } static struct irq_chip pnx4008_irq_chip = { - .ack = pnx4008_mask_ack_irq, - .mask = pnx4008_mask_irq, - .unmask = pnx4008_unmask_irq, - .set_type = pnx4008_set_irq_type, + .irq_ack = pnx4008_mask_ack_irq, + .irq_mask = pnx4008_mask_irq, + .irq_unmask = pnx4008_unmask_irq, + .irq_set_type = pnx4008_set_irq_type, }; void __init pnx4008_init_irq(void) @@ -99,14 +99,18 @@ void __init pnx4008_init_irq(void) for (i = 0; i < NR_IRQS; i++) { set_irq_flags(i, IRQF_VALID); set_irq_chip(i, &pnx4008_irq_chip); - pnx4008_set_irq_type(i, pnx4008_irq_type[i]); + pnx4008_set_irq_type(irq_get_irq_data(i), pnx4008_irq_type[i]); } /* configure and enable IRQ 0,1,30,31 (cascade interrupts) */ - pnx4008_set_irq_type(SUB1_IRQ_N, pnx4008_irq_type[SUB1_IRQ_N]); - pnx4008_set_irq_type(SUB2_IRQ_N, pnx4008_irq_type[SUB2_IRQ_N]); - pnx4008_set_irq_type(SUB1_FIQ_N, pnx4008_irq_type[SUB1_FIQ_N]); - pnx4008_set_irq_type(SUB2_FIQ_N, pnx4008_irq_type[SUB2_FIQ_N]); + pnx4008_set_irq_type(irq_get_irq_data(SUB1_IRQ_N), + pnx4008_irq_type[SUB1_IRQ_N]); + pnx4008_set_irq_type(irq_get_irq_data(SUB2_IRQ_N), + pnx4008_irq_type[SUB2_IRQ_N]); + pnx4008_set_irq_type(irq_get_irq_data(SUB1_FIQ_N), + pnx4008_irq_type[SUB1_FIQ_N]); + pnx4008_set_irq_type(irq_get_irq_data(SUB2_FIQ_N), + pnx4008_irq_type[SUB2_FIQ_N]); /* mask all others */ __raw_writel((1 << SUB2_FIQ_N) | (1 << SUB1_FIQ_N) | diff --git a/arch/arm/mach-pxa/balloon3.c b/arch/arm/mach-pxa/balloon3.c index ccb2d0c..a134a14 100644 --- a/arch/arm/mach-pxa/balloon3.c +++ b/arch/arm/mach-pxa/balloon3.c @@ -477,25 +477,25 @@ static inline void balloon3_leds_init(void) {} /****************************************************************************** * FPGA IRQ ******************************************************************************/ -static void balloon3_mask_irq(unsigned int irq) +static void balloon3_mask_irq(struct irq_data *d) { - int balloon3_irq = (irq - BALLOON3_IRQ(0)); + int balloon3_irq = (d->irq - BALLOON3_IRQ(0)); balloon3_irq_enabled &= ~(1 << balloon3_irq); __raw_writel(~balloon3_irq_enabled, BALLOON3_INT_CONTROL_REG); } -static void balloon3_unmask_irq(unsigned int irq) +static void balloon3_unmask_irq(struct irq_data *d) { - int balloon3_irq = (irq - BALLOON3_IRQ(0)); + int balloon3_irq = (d->irq - BALLOON3_IRQ(0)); balloon3_irq_enabled |= (1 << balloon3_irq); __raw_writel(~balloon3_irq_enabled, BALLOON3_INT_CONTROL_REG); } static struct irq_chip balloon3_irq_chip = { .name = "FPGA", - .ack = balloon3_mask_irq, - .mask = balloon3_mask_irq, - .unmask = balloon3_unmask_irq, + .irq_ack = balloon3_mask_irq, + .irq_mask = balloon3_mask_irq, + .irq_unmask = balloon3_unmask_irq, }; static void balloon3_irq_handler(unsigned int irq, struct irq_desc *desc) @@ -504,8 +504,13 @@ static void balloon3_irq_handler(unsigned int irq, struct irq_desc *desc) balloon3_irq_enabled; do { /* clear useless edge notification */ - if (desc->chip->ack) - desc->chip->ack(BALLOON3_AUX_NIRQ); + if (desc->irq_data.chip->irq_ack) { + struct irq_data *d; + + d = irq_get_irq_data(BALLOON3_AUX_NIRQ); + desc->irq_data.chip->irq_ack(d); + } + while (pending) { irq = BALLOON3_IRQ(0) + __ffs(pending); generic_handle_irq(irq); diff --git a/arch/arm/mach-pxa/clock-pxa3xx.c b/arch/arm/mach-pxa/clock-pxa3xx.c index 1b08a34..3f864cd 100644 --- a/arch/arm/mach-pxa/clock-pxa3xx.c +++ b/arch/arm/mach-pxa/clock-pxa3xx.c @@ -115,7 +115,6 @@ static unsigned long clk_pxa3xx_smemc_getrate(struct clk *clk) { unsigned long acsr = ACSR; unsigned long memclkcfg = __raw_readl(MEMCLKCFG); - unsigned int smcfs = (acsr >> 23) & 0x7; return BASE_CLK * smcfs_mult[(acsr >> 23) & 0x7] / df_clkdiv[(memclkcfg >> 16) & 0x3]; diff --git a/arch/arm/mach-pxa/cm-x2xx-pci.c b/arch/arm/mach-pxa/cm-x2xx-pci.c index 0f31305..a2380cd 100644 --- a/arch/arm/mach-pxa/cm-x2xx-pci.c +++ b/arch/arm/mach-pxa/cm-x2xx-pci.c @@ -59,7 +59,7 @@ void __init cmx2xx_pci_adjust_zones(unsigned long *zone_size, static void cmx2xx_it8152_irq_demux(unsigned int irq, struct irq_desc *desc) { /* clear our parent irq */ - desc->chip->ack(irq); + desc->irq_data.chip->irq_ack(&desc->irq_data); it8152_irq_demux(irq, desc); } diff --git a/arch/arm/mach-pxa/generic.c b/arch/arm/mach-pxa/generic.c index d6e15f7..f5d91ef 100644 --- a/arch/arm/mach-pxa/generic.c +++ b/arch/arm/mach-pxa/generic.c @@ -22,7 +22,6 @@ #include <mach/hardware.h> #include <asm/system.h> -#include <asm/pgtable.h> #include <asm/mach/map.h> #include <asm/mach-types.h> diff --git a/arch/arm/mach-pxa/generic.h b/arch/arm/mach-pxa/generic.h index 6205dc9..a079d8b 100644 --- a/arch/arm/mach-pxa/generic.h +++ b/arch/arm/mach-pxa/generic.h @@ -9,11 +9,13 @@ * published by the Free Software Foundation. */ +struct irq_data; struct sys_timer; extern struct sys_timer pxa_timer; extern void __init pxa_init_irq(int irq_nr, - int (*set_wake)(unsigned int, unsigned int)); + int (*set_wake)(struct irq_data *, + unsigned int)); extern void __init pxa25x_init_irq(void); #ifdef CONFIG_CPU_PXA26x extern void __init pxa26x_init_irq(void); diff --git a/arch/arm/mach-pxa/irq.c b/arch/arm/mach-pxa/irq.c index 54e91c9..2693e3c 100644 --- a/arch/arm/mach-pxa/irq.c +++ b/arch/arm/mach-pxa/irq.c @@ -53,37 +53,48 @@ static inline int cpu_has_ipr(void) return !cpu_is_pxa25x(); } -static void pxa_mask_irq(unsigned int irq) +static inline void __iomem *irq_base(int i) +{ + static unsigned long phys_base[] = { + 0x40d00000, + 0x40d0009c, + 0x40d00130, + }; + + return (void __iomem *)io_p2v(phys_base[i]); +} + +static void pxa_mask_irq(struct irq_data *d) { - void __iomem *base = get_irq_chip_data(irq); + void __iomem *base = irq_data_get_irq_chip_data(d); uint32_t icmr = __raw_readl(base + ICMR); - icmr &= ~(1 << IRQ_BIT(irq)); + icmr &= ~(1 << IRQ_BIT(d->irq)); __raw_writel(icmr, base + ICMR); } -static void pxa_unmask_irq(unsigned int irq) +static void pxa_unmask_irq(struct irq_data *d) { - void __iomem *base = get_irq_chip_data(irq); + void __iomem *base = irq_data_get_irq_chip_data(d); uint32_t icmr = __raw_readl(base + ICMR); - icmr |= 1 << IRQ_BIT(irq); + icmr |= 1 << IRQ_BIT(d->irq); __raw_writel(icmr, base + ICMR); } static struct irq_chip pxa_internal_irq_chip = { .name = "SC", - .ack = pxa_mask_irq, - .mask = pxa_mask_irq, - .unmask = pxa_unmask_irq, + .irq_ack = pxa_mask_irq, + .irq_mask = pxa_mask_irq, + .irq_unmask = pxa_unmask_irq, }; /* * GPIO IRQs for GPIO 0 and 1 */ -static int pxa_set_low_gpio_type(unsigned int irq, unsigned int type) +static int pxa_set_low_gpio_type(struct irq_data *d, unsigned int type) { - int gpio = irq - IRQ_GPIO0; + int gpio = d->irq - IRQ_GPIO0; if (__gpio_is_occupied(gpio)) { pr_err("%s failed: GPIO is configured\n", __func__); @@ -103,31 +114,17 @@ static int pxa_set_low_gpio_type(unsigned int irq, unsigned int type) return 0; } -static void pxa_ack_low_gpio(unsigned int irq) -{ - GEDR0 = (1 << (irq - IRQ_GPIO0)); -} - -static void pxa_mask_low_gpio(unsigned int irq) -{ - struct irq_desc *desc = irq_to_desc(irq); - - desc->chip->mask(irq); -} - -static void pxa_unmask_low_gpio(unsigned int irq) +static void pxa_ack_low_gpio(struct irq_data *d) { - struct irq_desc *desc = irq_to_desc(irq); - - desc->chip->unmask(irq); + GEDR0 = (1 << (d->irq - IRQ_GPIO0)); } static struct irq_chip pxa_low_gpio_chip = { .name = "GPIO-l", - .ack = pxa_ack_low_gpio, - .mask = pxa_mask_low_gpio, - .unmask = pxa_unmask_low_gpio, - .set_type = pxa_set_low_gpio_type, + .irq_ack = pxa_ack_low_gpio, + .irq_mask = pxa_mask_irq, + .irq_unmask = pxa_unmask_irq, + .irq_set_type = pxa_set_low_gpio_type, }; static void __init pxa_init_low_gpio_irq(set_wake_t fn) @@ -141,22 +138,12 @@ static void __init pxa_init_low_gpio_irq(set_wake_t fn) for (irq = IRQ_GPIO0; irq <= IRQ_GPIO1; irq++) { set_irq_chip(irq, &pxa_low_gpio_chip); + set_irq_chip_data(irq, irq_base(0)); set_irq_handler(irq, handle_edge_irq); set_irq_flags(irq, IRQF_VALID); } - pxa_low_gpio_chip.set_wake = fn; -} - -static inline void __iomem *irq_base(int i) -{ - static unsigned long phys_base[] = { - 0x40d00000, - 0x40d0009c, - 0x40d00130, - }; - - return (void __iomem *)io_p2v(phys_base[i >> 5]); + pxa_low_gpio_chip.irq_set_wake = fn; } void __init pxa_init_irq(int irq_nr, set_wake_t fn) @@ -168,7 +155,7 @@ void __init pxa_init_irq(int irq_nr, set_wake_t fn) pxa_internal_irq_nr = irq_nr; for (n = 0; n < irq_nr; n += 32) { - void __iomem *base = irq_base(n); + void __iomem *base = irq_base(n >> 5); __raw_writel(0, base + ICMR); /* disable all IRQs */ __raw_writel(0, base + ICLR); /* all IRQs are IRQ, not FIQ */ @@ -188,7 +175,7 @@ void __init pxa_init_irq(int irq_nr, set_wake_t fn) /* only unmasked interrupts kick us out of idle */ __raw_writel(1, irq_base(0) + ICCR); - pxa_internal_irq_chip.set_wake = fn; + pxa_internal_irq_chip.irq_set_wake = fn; pxa_init_low_gpio_irq(fn); } @@ -200,7 +187,7 @@ static int pxa_irq_suspend(struct sys_device *dev, pm_message_t state) { int i; - for (i = 0; i < pxa_internal_irq_nr; i += 32) { + for (i = 0; i < pxa_internal_irq_nr / 32; i++) { void __iomem *base = irq_base(i); saved_icmr[i] = __raw_readl(base + ICMR); @@ -219,14 +206,14 @@ static int pxa_irq_resume(struct sys_device *dev) { int i; - for (i = 0; i < pxa_internal_irq_nr; i += 32) { + for (i = 0; i < pxa_internal_irq_nr / 32; i++) { void __iomem *base = irq_base(i); __raw_writel(saved_icmr[i], base + ICMR); __raw_writel(0, base + ICLR); } - if (!cpu_is_pxa25x()) + if (cpu_has_ipr()) for (i = 0; i < pxa_internal_irq_nr; i++) __raw_writel(saved_ipr[i], IRQ_BASE + IPR(i)); diff --git a/arch/arm/mach-pxa/lpd270.c b/arch/arm/mach-pxa/lpd270.c index 8ab62a6..c9a3e77 100644 --- a/arch/arm/mach-pxa/lpd270.c +++ b/arch/arm/mach-pxa/lpd270.c @@ -95,9 +95,9 @@ static unsigned long lpd270_pin_config[] __initdata = { static unsigned int lpd270_irq_enabled; -static void lpd270_mask_irq(unsigned int irq) +static void lpd270_mask_irq(struct irq_data *d) { - int lpd270_irq = irq - LPD270_IRQ(0); + int lpd270_irq = d->irq - LPD270_IRQ(0); __raw_writew(~(1 << lpd270_irq), LPD270_INT_STATUS); @@ -105,9 +105,9 @@ static void lpd270_mask_irq(unsigned int irq) __raw_writew(lpd270_irq_enabled, LPD270_INT_MASK); } -static void lpd270_unmask_irq(unsigned int irq) +static void lpd270_unmask_irq(struct irq_data *d) { - int lpd270_irq = irq - LPD270_IRQ(0); + int lpd270_irq = d->irq - LPD270_IRQ(0); lpd270_irq_enabled |= 1 << lpd270_irq; __raw_writew(lpd270_irq_enabled, LPD270_INT_MASK); @@ -115,9 +115,9 @@ static void lpd270_unmask_irq(unsigned int irq) static struct irq_chip lpd270_irq_chip = { .name = "CPLD", - .ack = lpd270_mask_irq, - .mask = lpd270_mask_irq, - .unmask = lpd270_unmask_irq, + .irq_ack = lpd270_mask_irq, + .irq_mask = lpd270_mask_irq, + .irq_unmask = lpd270_unmask_irq, }; static void lpd270_irq_handler(unsigned int irq, struct irq_desc *desc) @@ -126,7 +126,8 @@ static void lpd270_irq_handler(unsigned int irq, struct irq_desc *desc) pending = __raw_readw(LPD270_INT_STATUS) & lpd270_irq_enabled; do { - desc->chip->ack(irq); /* clear useless edge notification */ + /* clear useless edge notification */ + desc->irq_data.chip->irq_ack(&desc->irq_data); if (likely(pending)) { irq = LPD270_IRQ(0) + __ffs(pending); generic_handle_irq(irq); diff --git a/arch/arm/mach-pxa/lubbock.c b/arch/arm/mach-pxa/lubbock.c index 3072dbe..dca20de 100644 --- a/arch/arm/mach-pxa/lubbock.c +++ b/arch/arm/mach-pxa/lubbock.c @@ -122,15 +122,15 @@ EXPORT_SYMBOL(lubbock_set_misc_wr); static unsigned long lubbock_irq_enabled; -static void lubbock_mask_irq(unsigned int irq) +static void lubbock_mask_irq(struct irq_data *d) { - int lubbock_irq = (irq - LUBBOCK_IRQ(0)); + int lubbock_irq = (d->irq - LUBBOCK_IRQ(0)); LUB_IRQ_MASK_EN = (lubbock_irq_enabled &= ~(1 << lubbock_irq)); } -static void lubbock_unmask_irq(unsigned int irq) +static void lubbock_unmask_irq(struct irq_data *d) { - int lubbock_irq = (irq - LUBBOCK_IRQ(0)); + int lubbock_irq = (d->irq - LUBBOCK_IRQ(0)); /* the irq can be acknowledged only if deasserted, so it's done here */ LUB_IRQ_SET_CLR &= ~(1 << lubbock_irq); LUB_IRQ_MASK_EN = (lubbock_irq_enabled |= (1 << lubbock_irq)); @@ -138,16 +138,17 @@ static void lubbock_unmask_irq(unsigned int irq) static struct irq_chip lubbock_irq_chip = { .name = "FPGA", - .ack = lubbock_mask_irq, - .mask = lubbock_mask_irq, - .unmask = lubbock_unmask_irq, + .irq_ack = lubbock_mask_irq, + .irq_mask = lubbock_mask_irq, + .irq_unmask = lubbock_unmask_irq, }; static void lubbock_irq_handler(unsigned int irq, struct irq_desc *desc) { unsigned long pending = LUB_IRQ_SET_CLR & lubbock_irq_enabled; do { - desc->chip->ack(irq); /* clear our parent irq */ + /* clear our parent irq */ + desc->irq_data.chip->irq_ack(&desc->irq_data); if (likely(pending)) { irq = LUBBOCK_IRQ(0) + __ffs(pending); generic_handle_irq(irq); diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c index 740c035..d4b6f23 100644 --- a/arch/arm/mach-pxa/mainstone.c +++ b/arch/arm/mach-pxa/mainstone.c @@ -123,15 +123,15 @@ static unsigned long mainstone_pin_config[] = { static unsigned long mainstone_irq_enabled; -static void mainstone_mask_irq(unsigned int irq) +static void mainstone_mask_irq(struct irq_data *d) { - int mainstone_irq = (irq - MAINSTONE_IRQ(0)); + int mainstone_irq = (d->irq - MAINSTONE_IRQ(0)); MST_INTMSKENA = (mainstone_irq_enabled &= ~(1 << mainstone_irq)); } -static void mainstone_unmask_irq(unsigned int irq) +static void mainstone_unmask_irq(struct irq_data *d) { - int mainstone_irq = (irq - MAINSTONE_IRQ(0)); + int mainstone_irq = (d->irq - MAINSTONE_IRQ(0)); /* the irq can be acknowledged only if deasserted, so it's done here */ MST_INTSETCLR &= ~(1 << mainstone_irq); MST_INTMSKENA = (mainstone_irq_enabled |= (1 << mainstone_irq)); @@ -139,16 +139,17 @@ static void mainstone_unmask_irq(unsigned int irq) static struct irq_chip mainstone_irq_chip = { .name = "FPGA", - .ack = mainstone_mask_irq, - .mask = mainstone_mask_irq, - .unmask = mainstone_unmask_irq, + .irq_ack = mainstone_mask_irq, + .irq_mask = mainstone_mask_irq, + .irq_unmask = mainstone_unmask_irq, }; static void mainstone_irq_handler(unsigned int irq, struct irq_desc *desc) { unsigned long pending = MST_INTSETCLR & mainstone_irq_enabled; do { - desc->chip->ack(irq); /* clear useless edge notification */ + /* clear useless edge notification */ + desc->irq_data.chip->irq_ack(&desc->irq_data); if (likely(pending)) { irq = MAINSTONE_IRQ(0) + __ffs(pending); generic_handle_irq(irq); diff --git a/arch/arm/mach-pxa/pcm990-baseboard.c b/arch/arm/mach-pxa/pcm990-baseboard.c index f33647a..90820fa 100644 --- a/arch/arm/mach-pxa/pcm990-baseboard.c +++ b/arch/arm/mach-pxa/pcm990-baseboard.c @@ -241,23 +241,23 @@ static struct platform_device pcm990_backlight_device = { static unsigned long pcm990_irq_enabled; -static void pcm990_mask_ack_irq(unsigned int irq) +static void pcm990_mask_ack_irq(struct irq_data *d) { - int pcm990_irq = (irq - PCM027_IRQ(0)); + int pcm990_irq = (d->irq - PCM027_IRQ(0)); PCM990_INTMSKENA = (pcm990_irq_enabled &= ~(1 << pcm990_irq)); } -static void pcm990_unmask_irq(unsigned int irq) +static void pcm990_unmask_irq(struct irq_data *d) { - int pcm990_irq = (irq - PCM027_IRQ(0)); + int pcm990_irq = (d->irq - PCM027_IRQ(0)); /* the irq can be acknowledged only if deasserted, so it's done here */ PCM990_INTSETCLR |= 1 << pcm990_irq; PCM990_INTMSKENA = (pcm990_irq_enabled |= (1 << pcm990_irq)); } static struct irq_chip pcm990_irq_chip = { - .mask_ack = pcm990_mask_ack_irq, - .unmask = pcm990_unmask_irq, + .irq_mask_ack = pcm990_mask_ack_irq, + .irq_unmask = pcm990_unmask_irq, }; static void pcm990_irq_handler(unsigned int irq, struct irq_desc *desc) @@ -265,7 +265,8 @@ static void pcm990_irq_handler(unsigned int irq, struct irq_desc *desc) unsigned long pending = (~PCM990_INTSETCLR) & pcm990_irq_enabled; do { - desc->chip->ack(irq); /* clear our parent IRQ */ + /* clear our parent IRQ */ + desc->irq_data.chip->irq_ack(&desc->irq_data); if (likely(pending)) { irq = PCM027_IRQ(0) + __ffs(pending); generic_handle_irq(irq); diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c index 3f5241c..fbc5b77 100644 --- a/arch/arm/mach-pxa/pxa25x.c +++ b/arch/arm/mach-pxa/pxa25x.c @@ -22,6 +22,7 @@ #include <linux/platform_device.h> #include <linux/suspend.h> #include <linux/sysdev.h> +#include <linux/irq.h> #include <asm/mach/map.h> #include <mach/hardware.h> @@ -282,15 +283,15 @@ static inline void pxa25x_init_pm(void) {} /* PXA25x: supports wakeup from GPIO0..GPIO15 and RTC alarm */ -static int pxa25x_set_wake(unsigned int irq, unsigned int on) +static int pxa25x_set_wake(struct irq_data *d, unsigned int on) { - int gpio = IRQ_TO_GPIO(irq); + int gpio = IRQ_TO_GPIO(d->irq); uint32_t mask = 0; if (gpio >= 0 && gpio < 85) return gpio_set_wake(gpio, on); - if (irq == IRQ_RTCAlrm) { + if (d->irq == IRQ_RTCAlrm) { mask = PWER_RTC; goto set_pwer; } diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c index b2130b7..987301f 100644 --- a/arch/arm/mach-pxa/pxa27x.c +++ b/arch/arm/mach-pxa/pxa27x.c @@ -18,6 +18,7 @@ #include <linux/platform_device.h> #include <linux/sysdev.h> #include <linux/io.h> +#include <linux/irq.h> #include <asm/mach/map.h> #include <mach/hardware.h> @@ -343,18 +344,18 @@ static inline void pxa27x_init_pm(void) {} /* PXA27x: Various gpios can issue wakeup events. This logic only * handles the simple cases, not the WEMUX2 and WEMUX3 options */ -static int pxa27x_set_wake(unsigned int irq, unsigned int on) +static int pxa27x_set_wake(struct irq_data *d, unsigned int on) { - int gpio = IRQ_TO_GPIO(irq); + int gpio = IRQ_TO_GPIO(d->irq); uint32_t mask; if (gpio >= 0 && gpio < 128) return gpio_set_wake(gpio, on); - if (irq == IRQ_KEYPAD) + if (d->irq == IRQ_KEYPAD) return keypad_set_wake(on); - switch (irq) { + switch (d->irq) { case IRQ_RTCAlrm: mask = PWER_RTC; break; diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c index e14818f..a7a19e1 100644 --- a/arch/arm/mach-pxa/pxa3xx.c +++ b/arch/arm/mach-pxa/pxa3xx.c @@ -229,11 +229,11 @@ static void __init pxa3xx_init_pm(void) pxa_cpu_pm_fns = &pxa3xx_cpu_pm_fns; } -static int pxa3xx_set_wake(unsigned int irq, unsigned int on) +static int pxa3xx_set_wake(struct irq_data *d, unsigned int on) { unsigned long flags, mask = 0; - switch (irq) { + switch (d->irq) { case IRQ_SSP3: mask = ADXER_MFP_WSSP3; break; @@ -322,40 +322,40 @@ static inline void pxa3xx_init_pm(void) {} #define pxa3xx_set_wake NULL #endif -static void pxa_ack_ext_wakeup(unsigned int irq) +static void pxa_ack_ext_wakeup(struct irq_data *d) { - PECR |= PECR_IS(irq - IRQ_WAKEUP0); + PECR |= PECR_IS(d->irq - IRQ_WAKEUP0); } -static void pxa_mask_ext_wakeup(unsigned int irq) +static void pxa_mask_ext_wakeup(struct irq_data *d) { - ICMR2 &= ~(1 << ((irq - PXA_IRQ(0)) & 0x1f)); - PECR &= ~PECR_IE(irq - IRQ_WAKEUP0); + ICMR2 &= ~(1 << ((d->irq - PXA_IRQ(0)) & 0x1f)); + PECR &= ~PECR_IE(d->irq - IRQ_WAKEUP0); } -static void pxa_unmask_ext_wakeup(unsigned int irq) +static void pxa_unmask_ext_wakeup(struct irq_data *d) { - ICMR2 |= 1 << ((irq - PXA_IRQ(0)) & 0x1f); - PECR |= PECR_IE(irq - IRQ_WAKEUP0); + ICMR2 |= 1 << ((d->irq - PXA_IRQ(0)) & 0x1f); + PECR |= PECR_IE(d->irq - IRQ_WAKEUP0); } -static int pxa_set_ext_wakeup_type(unsigned int irq, unsigned int flow_type) +static int pxa_set_ext_wakeup_type(struct irq_data *d, unsigned int flow_type) { if (flow_type & IRQ_TYPE_EDGE_RISING) - PWER |= 1 << (irq - IRQ_WAKEUP0); + PWER |= 1 << (d->irq - IRQ_WAKEUP0); if (flow_type & IRQ_TYPE_EDGE_FALLING) - PWER |= 1 << (irq - IRQ_WAKEUP0 + 2); + PWER |= 1 << (d->irq - IRQ_WAKEUP0 + 2); return 0; } static struct irq_chip pxa_ext_wakeup_chip = { .name = "WAKEUP", - .ack = pxa_ack_ext_wakeup, - .mask = pxa_mask_ext_wakeup, - .unmask = pxa_unmask_ext_wakeup, - .set_type = pxa_set_ext_wakeup_type, + .irq_ack = pxa_ack_ext_wakeup, + .irq_mask = pxa_mask_ext_wakeup, + .irq_unmask = pxa_unmask_ext_wakeup, + .irq_set_type = pxa_set_ext_wakeup_type, }; static void __init pxa_init_ext_wakeup_irq(set_wake_t fn) @@ -368,7 +368,7 @@ static void __init pxa_init_ext_wakeup_irq(set_wake_t fn) set_irq_flags(irq, IRQF_VALID); } - pxa_ext_wakeup_chip.set_wake = fn; + pxa_ext_wakeup_chip.irq_set_wake = fn; } void __init pxa3xx_init_irq(void) diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c index 0bc9387..b49a2c2 100644 --- a/arch/arm/mach-pxa/spitz.c +++ b/arch/arm/mach-pxa/spitz.c @@ -25,6 +25,7 @@ #include <linux/spi/corgi_lcd.h> #include <linux/spi/pxa2xx_spi.h> #include <linux/mtd/sharpsl.h> +#include <linux/mtd/physmap.h> #include <linux/input/matrix_keypad.h> #include <linux/regulator/machine.h> #include <linux/io.h> diff --git a/arch/arm/mach-pxa/viper.c b/arch/arm/mach-pxa/viper.c index de69b20..49eeeab 100644 --- a/arch/arm/mach-pxa/viper.c +++ b/arch/arm/mach-pxa/viper.c @@ -249,9 +249,9 @@ static inline int viper_bit_to_irq(int bit) return viper_isa_irqs[bit] + PXA_ISA_IRQ(0); } -static void viper_ack_irq(unsigned int irq) +static void viper_ack_irq(struct irq_data *d) { - int viper_irq = viper_irq_to_bitmask(irq); + int viper_irq = viper_irq_to_bitmask(d->irq); if (viper_irq & 0xff) VIPER_LO_IRQ_STATUS = viper_irq; @@ -259,14 +259,14 @@ static void viper_ack_irq(unsigned int irq) VIPER_HI_IRQ_STATUS = (viper_irq >> 8); } -static void viper_mask_irq(unsigned int irq) +static void viper_mask_irq(struct irq_data *d) { - viper_irq_enabled_mask &= ~(viper_irq_to_bitmask(irq)); + viper_irq_enabled_mask &= ~(viper_irq_to_bitmask(d->irq)); } -static void viper_unmask_irq(unsigned int irq) +static void viper_unmask_irq(struct irq_data *d) { - viper_irq_enabled_mask |= viper_irq_to_bitmask(irq); + viper_irq_enabled_mask |= viper_irq_to_bitmask(d->irq); } static inline unsigned long viper_irq_pending(void) @@ -283,7 +283,7 @@ static void viper_irq_handler(unsigned int irq, struct irq_desc *desc) do { /* we're in a chained irq handler, * so ack the interrupt by hand */ - desc->chip->ack(irq); + desc->irq_data.chip->irq_ack(&desc->irq_data); if (likely(pending)) { irq = viper_bit_to_irq(__ffs(pending)); @@ -294,10 +294,10 @@ static void viper_irq_handler(unsigned int irq, struct irq_desc *desc) } static struct irq_chip viper_irq_chip = { - .name = "ISA", - .ack = viper_ack_irq, - .mask = viper_mask_irq, - .unmask = viper_unmask_irq + .name = "ISA", + .irq_ack = viper_ack_irq, + .irq_mask = viper_mask_irq, + .irq_unmask = viper_unmask_irq }; static void __init viper_init_irq(void) diff --git a/arch/arm/mach-pxa/zeus.c b/arch/arm/mach-pxa/zeus.c index bf034c7..f4b053b 100644 --- a/arch/arm/mach-pxa/zeus.c +++ b/arch/arm/mach-pxa/zeus.c @@ -83,19 +83,19 @@ static inline int zeus_bit_to_irq(int bit) return zeus_isa_irqs[bit] + PXA_ISA_IRQ(0); } -static void zeus_ack_irq(unsigned int irq) +static void zeus_ack_irq(struct irq_data *d) { - __raw_writew(zeus_irq_to_bitmask(irq), ZEUS_CPLD_ISA_IRQ); + __raw_writew(zeus_irq_to_bitmask(d->irq), ZEUS_CPLD_ISA_IRQ); } -static void zeus_mask_irq(unsigned int irq) +static void zeus_mask_irq(struct irq_data *d) { - zeus_irq_enabled_mask &= ~(zeus_irq_to_bitmask(irq)); + zeus_irq_enabled_mask &= ~(zeus_irq_to_bitmask(d->irq)); } -static void zeus_unmask_irq(unsigned int irq) +static void zeus_unmask_irq(struct irq_data *d) { - zeus_irq_enabled_mask |= zeus_irq_to_bitmask(irq); + zeus_irq_enabled_mask |= zeus_irq_to_bitmask(d->irq); } static inline unsigned long zeus_irq_pending(void) @@ -111,7 +111,7 @@ static void zeus_irq_handler(unsigned int irq, struct irq_desc *desc) do { /* we're in a chained irq handler, * so ack the interrupt by hand */ - desc->chip->ack(gpio_to_irq(ZEUS_ISA_GPIO)); + desc->irq_data.chip->irq_ack(&desc->irq_data); if (likely(pending)) { irq = zeus_bit_to_irq(__ffs(pending)); @@ -122,10 +122,10 @@ static void zeus_irq_handler(unsigned int irq, struct irq_desc *desc) } static struct irq_chip zeus_irq_chip = { - .name = "ISA", - .ack = zeus_ack_irq, - .mask = zeus_mask_irq, - .unmask = zeus_unmask_irq, + .name = "ISA", + .irq_ack = zeus_ack_irq, + .irq_mask = zeus_mask_irq, + .irq_unmask = zeus_unmask_irq, }; static void __init zeus_init_irq(void) @@ -830,8 +830,8 @@ static void __init zeus_init(void) pr_info("Zeus CPLD V%dI%d\n", (system_rev & 0xf0) >> 4, (system_rev & 0x0f)); /* Fix timings for dm9000s (CS1/CS2)*/ - msc0 = __raw_readl(MSC0) & 0x0000ffff | (dm9000_msc << 16); - msc1 = __raw_readl(MSC1) & 0xffff0000 | dm9000_msc; + msc0 = (__raw_readl(MSC0) & 0x0000ffff) | (dm9000_msc << 16); + msc1 = (__raw_readl(MSC1) & 0xffff0000) | dm9000_msc; __raw_writel(msc0, MSC0); __raw_writel(msc1, MSC1); diff --git a/arch/arm/mach-rpc/irq.c b/arch/arm/mach-rpc/irq.c index 9dd15d6..d29cd9b 100644 --- a/arch/arm/mach-rpc/irq.c +++ b/arch/arm/mach-rpc/irq.c @@ -6,110 +6,110 @@ #include <asm/hardware/iomd.h> #include <asm/irq.h> -static void iomd_ack_irq_a(unsigned int irq) +static void iomd_ack_irq_a(struct irq_data *d) { unsigned int val, mask; - mask = 1 << irq; + mask = 1 << d->irq; val = iomd_readb(IOMD_IRQMASKA); iomd_writeb(val & ~mask, IOMD_IRQMASKA); iomd_writeb(mask, IOMD_IRQCLRA); } -static void iomd_mask_irq_a(unsigned int irq) +static void iomd_mask_irq_a(struct irq_data *d) { unsigned int val, mask; - mask = 1 << irq; + mask = 1 << d->irq; val = iomd_readb(IOMD_IRQMASKA); iomd_writeb(val & ~mask, IOMD_IRQMASKA); } -static void iomd_unmask_irq_a(unsigned int irq) +static void iomd_unmask_irq_a(struct irq_data *d) { unsigned int val, mask; - mask = 1 << irq; + mask = 1 << d->irq; val = iomd_readb(IOMD_IRQMASKA); iomd_writeb(val | mask, IOMD_IRQMASKA); } static struct irq_chip iomd_a_chip = { - .ack = iomd_ack_irq_a, - .mask = iomd_mask_irq_a, - .unmask = iomd_unmask_irq_a, + .irq_ack = iomd_ack_irq_a, + .irq_mask = iomd_mask_irq_a, + .irq_unmask = iomd_unmask_irq_a, }; -static void iomd_mask_irq_b(unsigned int irq) +static void iomd_mask_irq_b(struct irq_data *d) { unsigned int val, mask; - mask = 1 << (irq & 7); + mask = 1 << (d->irq & 7); val = iomd_readb(IOMD_IRQMASKB); iomd_writeb(val & ~mask, IOMD_IRQMASKB); } -static void iomd_unmask_irq_b(unsigned int irq) +static void iomd_unmask_irq_b(struct irq_data *d) { unsigned int val, mask; - mask = 1 << (irq & 7); + mask = 1 << (d->irq & 7); val = iomd_readb(IOMD_IRQMASKB); iomd_writeb(val | mask, IOMD_IRQMASKB); } static struct irq_chip iomd_b_chip = { - .ack = iomd_mask_irq_b, - .mask = iomd_mask_irq_b, - .unmask = iomd_unmask_irq_b, + .irq_ack = iomd_mask_irq_b, + .irq_mask = iomd_mask_irq_b, + .irq_unmask = iomd_unmask_irq_b, }; -static void iomd_mask_irq_dma(unsigned int irq) +static void iomd_mask_irq_dma(struct irq_data *d) { unsigned int val, mask; - mask = 1 << (irq & 7); + mask = 1 << (d->irq & 7); val = iomd_readb(IOMD_DMAMASK); iomd_writeb(val & ~mask, IOMD_DMAMASK); } -static void iomd_unmask_irq_dma(unsigned int irq) +static void iomd_unmask_irq_dma(struct irq_data *d) { unsigned int val, mask; - mask = 1 << (irq & 7); + mask = 1 << (d->irq & 7); val = iomd_readb(IOMD_DMAMASK); iomd_writeb(val | mask, IOMD_DMAMASK); } static struct irq_chip iomd_dma_chip = { - .ack = iomd_mask_irq_dma, - .mask = iomd_mask_irq_dma, - .unmask = iomd_unmask_irq_dma, + .irq_ack = iomd_mask_irq_dma, + .irq_mask = iomd_mask_irq_dma, + .irq_unmask = iomd_unmask_irq_dma, }; -static void iomd_mask_irq_fiq(unsigned int irq) +static void iomd_mask_irq_fiq(struct irq_data *d) { unsigned int val, mask; - mask = 1 << (irq & 7); + mask = 1 << (d->irq & 7); val = iomd_readb(IOMD_FIQMASK); iomd_writeb(val & ~mask, IOMD_FIQMASK); } -static void iomd_unmask_irq_fiq(unsigned int irq) +static void iomd_unmask_irq_fiq(struct irq_data *d) { unsigned int val, mask; - mask = 1 << (irq & 7); + mask = 1 << (d->irq & 7); val = iomd_readb(IOMD_FIQMASK); iomd_writeb(val | mask, IOMD_FIQMASK); } static struct irq_chip iomd_fiq_chip = { - .ack = iomd_mask_irq_fiq, - .mask = iomd_mask_irq_fiq, - .unmask = iomd_unmask_irq_fiq, + .irq_ack = iomd_mask_irq_fiq, + .irq_mask = iomd_mask_irq_fiq, + .irq_unmask = iomd_unmask_irq_fiq, }; void __init rpc_init_irq(void) diff --git a/arch/arm/mach-s3c2410/bast-irq.c b/arch/arm/mach-s3c2410/bast-irq.c index 217b102..606cb6b 100644 --- a/arch/arm/mach-s3c2410/bast-irq.c +++ b/arch/arm/mach-s3c2410/bast-irq.c @@ -75,38 +75,38 @@ static unsigned char bast_pc104_irqmasks[] = { static unsigned char bast_pc104_irqs[] = { 3, 5, 7, 10 }; static void -bast_pc104_mask(unsigned int irqno) +bast_pc104_mask(struct irq_data *data) { unsigned long temp; temp = __raw_readb(BAST_VA_PC104_IRQMASK); - temp &= ~bast_pc104_irqmasks[irqno]; + temp &= ~bast_pc104_irqmasks[data->irq]; __raw_writeb(temp, BAST_VA_PC104_IRQMASK); } static void -bast_pc104_maskack(unsigned int irqno) +bast_pc104_maskack(struct irq_data *data) { struct irq_desc *desc = irq_desc + IRQ_ISA; - bast_pc104_mask(irqno); - desc->chip->ack(IRQ_ISA); + bast_pc104_mask(data); + desc->irq_data.chip->irq_ack(&desc->irq_data); } static void -bast_pc104_unmask(unsigned int irqno) +bast_pc104_unmask(struct irq_data *data) { unsigned long temp; temp = __raw_readb(BAST_VA_PC104_IRQMASK); - temp |= bast_pc104_irqmasks[irqno]; + temp |= bast_pc104_irqmasks[data->irq]; __raw_writeb(temp, BAST_VA_PC104_IRQMASK); } static struct irq_chip bast_pc104_chip = { - .mask = bast_pc104_mask, - .unmask = bast_pc104_unmask, - .ack = bast_pc104_maskack + .irq_mask = bast_pc104_mask, + .irq_unmask = bast_pc104_unmask, + .irq_ack = bast_pc104_maskack }; static void @@ -123,7 +123,7 @@ bast_irq_pc104_demux(unsigned int irq, /* ack if we get an irq with nothing (ie, startup) */ desc = irq_desc + IRQ_ISA; - desc->chip->ack(IRQ_ISA); + desc->irq_data.chip->irq_ack(&desc->irq_data); } else { /* handle the IRQ */ diff --git a/arch/arm/mach-s3c2410/include/mach/irqs.h b/arch/arm/mach-s3c2410/include/mach/irqs.h index 11bb0f0..e5a68ea 100644 --- a/arch/arm/mach-s3c2410/include/mach/irqs.h +++ b/arch/arm/mach-s3c2410/include/mach/irqs.h @@ -152,8 +152,8 @@ #define IRQ_S3C2416_HSMMC0 S3C2410_IRQ(21) /* S3C2416/S3C2450 */ -#define IRQ_HSMMC0 IRQ_S3C2443_HSMMC -#define IRQ_HSMMC1 IRQ_S3C2416_HSMMC0 +#define IRQ_HSMMC0 IRQ_S3C2416_HSMMC0 +#define IRQ_HSMMC1 IRQ_S3C2443_HSMMC #define IRQ_S3C2443_LCD1 S3C2410_IRQSUB(14) #define IRQ_S3C2443_LCD2 S3C2410_IRQSUB(15) diff --git a/arch/arm/mach-s3c2410/include/mach/map.h b/arch/arm/mach-s3c2410/include/mach/map.h index cd3983a..25bbf5a 100644 --- a/arch/arm/mach-s3c2410/include/mach/map.h +++ b/arch/arm/mach-s3c2410/include/mach/map.h @@ -112,8 +112,8 @@ #define S3C_PA_IIC S3C2410_PA_IIC #define S3C_PA_UART S3C24XX_PA_UART #define S3C_PA_USBHOST S3C2410_PA_USBHOST -#define S3C_PA_HSMMC0 S3C2443_PA_HSMMC -#define S3C_PA_HSMMC1 S3C2416_PA_HSMMC0 +#define S3C_PA_HSMMC0 S3C2416_PA_HSMMC0 +#define S3C_PA_HSMMC1 S3C2443_PA_HSMMC #define S3C_PA_WDT S3C2410_PA_WATCHDOG #define S3C_PA_NAND S3C24XX_PA_NAND diff --git a/arch/arm/mach-s3c2410/include/mach/regs-s3c2443-clock.h b/arch/arm/mach-s3c2410/include/mach/regs-s3c2443-clock.h index 101aeea..44494a5 100644 --- a/arch/arm/mach-s3c2410/include/mach/regs-s3c2443-clock.h +++ b/arch/arm/mach-s3c2410/include/mach/regs-s3c2443-clock.h @@ -86,6 +86,7 @@ #define S3C2443_HCLKCON_LCDC (1<<9) #define S3C2443_HCLKCON_USBH (1<<11) #define S3C2443_HCLKCON_USBD (1<<12) +#define S3C2416_HCLKCON_HSMMC0 (1<<15) #define S3C2443_HCLKCON_HSMMC (1<<16) #define S3C2443_HCLKCON_CFC (1<<17) #define S3C2443_HCLKCON_SSMC (1<<18) diff --git a/arch/arm/mach-s3c2412/irq.c b/arch/arm/mach-s3c2412/irq.c index 6000ca9..eddb52b 100644 --- a/arch/arm/mach-s3c2412/irq.c +++ b/arch/arm/mach-s3c2412/irq.c @@ -49,9 +49,9 @@ */ static void -s3c2412_irq_mask(unsigned int irqno) +s3c2412_irq_mask(struct irq_data *data) { - unsigned long bitval = 1UL << (irqno - IRQ_EINT0); + unsigned long bitval = 1UL << (data->irq - IRQ_EINT0); unsigned long mask; mask = __raw_readl(S3C2410_INTMSK); @@ -62,9 +62,9 @@ s3c2412_irq_mask(unsigned int irqno) } static inline void -s3c2412_irq_ack(unsigned int irqno) +s3c2412_irq_ack(struct irq_data *data) { - unsigned long bitval = 1UL << (irqno - IRQ_EINT0); + unsigned long bitval = 1UL << (data->irq - IRQ_EINT0); __raw_writel(bitval, S3C2412_EINTPEND); __raw_writel(bitval, S3C2410_SRCPND); @@ -72,9 +72,9 @@ s3c2412_irq_ack(unsigned int irqno) } static inline void -s3c2412_irq_maskack(unsigned int irqno) +s3c2412_irq_maskack(struct irq_data *data) { - unsigned long bitval = 1UL << (irqno - IRQ_EINT0); + unsigned long bitval = 1UL << (data->irq - IRQ_EINT0); unsigned long mask; mask = __raw_readl(S3C2410_INTMSK); @@ -89,9 +89,9 @@ s3c2412_irq_maskack(unsigned int irqno) } static void -s3c2412_irq_unmask(unsigned int irqno) +s3c2412_irq_unmask(struct irq_data *data) { - unsigned long bitval = 1UL << (irqno - IRQ_EINT0); + unsigned long bitval = 1UL << (data->irq - IRQ_EINT0); unsigned long mask; mask = __raw_readl(S3C2412_EINTMASK); @@ -102,11 +102,11 @@ s3c2412_irq_unmask(unsigned int irqno) } static struct irq_chip s3c2412_irq_eint0t4 = { - .ack = s3c2412_irq_ack, - .mask = s3c2412_irq_mask, - .unmask = s3c2412_irq_unmask, - .set_wake = s3c_irq_wake, - .set_type = s3c_irqext_type, + .irq_ack = s3c2412_irq_ack, + .irq_mask = s3c2412_irq_mask, + .irq_unmask = s3c2412_irq_unmask, + .irq_set_wake = s3c_irq_wake, + .irq_set_type = s3c_irqext_type, }; #define INTBIT(x) (1 << ((x) - S3C2410_IRQSUB(0))) @@ -132,29 +132,29 @@ static void s3c2412_irq_demux_cfsdi(unsigned int irq, struct irq_desc *desc) #define INTMSK_CFSDI (1UL << (IRQ_S3C2412_CFSDI - IRQ_EINT0)) #define SUBMSK_CFSDI INTMSK_SUB(IRQ_S3C2412_SDI, IRQ_S3C2412_CF) -static void s3c2412_irq_cfsdi_mask(unsigned int irqno) +static void s3c2412_irq_cfsdi_mask(struct irq_data *data) { - s3c_irqsub_mask(irqno, INTMSK_CFSDI, SUBMSK_CFSDI); + s3c_irqsub_mask(data->irq, INTMSK_CFSDI, SUBMSK_CFSDI); } -static void s3c2412_irq_cfsdi_unmask(unsigned int irqno) +static void s3c2412_irq_cfsdi_unmask(struct irq_data *data) { - s3c_irqsub_unmask(irqno, INTMSK_CFSDI); + s3c_irqsub_unmask(data->irq, INTMSK_CFSDI); } -static void s3c2412_irq_cfsdi_ack(unsigned int irqno) +static void s3c2412_irq_cfsdi_ack(struct irq_data *data) { - s3c_irqsub_maskack(irqno, INTMSK_CFSDI, SUBMSK_CFSDI); + s3c_irqsub_maskack(data->irq, INTMSK_CFSDI, SUBMSK_CFSDI); } static struct irq_chip s3c2412_irq_cfsdi = { .name = "s3c2412-cfsdi", - .ack = s3c2412_irq_cfsdi_ack, - .mask = s3c2412_irq_cfsdi_mask, - .unmask = s3c2412_irq_cfsdi_unmask, + .irq_ack = s3c2412_irq_cfsdi_ack, + .irq_mask = s3c2412_irq_cfsdi_mask, + .irq_unmask = s3c2412_irq_cfsdi_unmask, }; -static int s3c2412_irq_rtc_wake(unsigned int irqno, unsigned int state) +static int s3c2412_irq_rtc_wake(struct irq_data *data, unsigned int state) { unsigned long pwrcfg; @@ -165,7 +165,7 @@ static int s3c2412_irq_rtc_wake(unsigned int irqno, unsigned int state) pwrcfg |= S3C2412_PWRCFG_RTC_MASKIRQ; __raw_writel(pwrcfg, S3C2412_PWRCFG); - return s3c_irq_chip.set_wake(irqno, state); + return s3c_irq_chip.irq_set_wake(data, state); } static struct irq_chip s3c2412_irq_rtc_chip; @@ -193,7 +193,7 @@ static int s3c2412_irq_add(struct sys_device *sysdev) /* change RTC IRQ's set wake method */ s3c2412_irq_rtc_chip = s3c_irq_chip; - s3c2412_irq_rtc_chip.set_wake = s3c2412_irq_rtc_wake; + s3c2412_irq_rtc_chip.irq_set_wake = s3c2412_irq_rtc_wake; set_irq_chip(IRQ_RTC, &s3c2412_irq_rtc_chip); diff --git a/arch/arm/mach-s3c2416/Kconfig b/arch/arm/mach-s3c2416/Kconfig index df8d149..69b48a7 100644 --- a/arch/arm/mach-s3c2416/Kconfig +++ b/arch/arm/mach-s3c2416/Kconfig @@ -31,6 +31,17 @@ config S3C2416_PM help Internal config node to apply S3C2416 power management +config S3C2416_SETUP_SDHCI + bool + select S3C2416_SETUP_SDHCI_GPIO + help + Internal helper functions for S3C2416 based SDHCI systems + +config S3C2416_SETUP_SDHCI_GPIO + bool + help + Common setup code for SDHCI gpio. + menu "S3C2416 Machines" config MACH_SMDK2416 @@ -42,6 +53,7 @@ config MACH_SMDK2416 select S3C_DEV_HSMMC1 select S3C_DEV_NAND select S3C_DEV_USB_HOST + select S3C2416_SETUP_SDHCI select S3C2416_PM if PM help Say Y here if you are using an SMDK2416 diff --git a/arch/arm/mach-s3c2416/Makefile b/arch/arm/mach-s3c2416/Makefile index ef038d6..7b805b2 100644 --- a/arch/arm/mach-s3c2416/Makefile +++ b/arch/arm/mach-s3c2416/Makefile @@ -14,6 +14,10 @@ obj-$(CONFIG_CPU_S3C2416) += irq.o obj-$(CONFIG_S3C2416_PM) += pm.o #obj-$(CONFIG_S3C2416_DMA) += dma.o +# Device setup +obj-$(CONFIG_S3C2416_SETUP_SDHCI) += setup-sdhci.o +obj-$(CONFIG_S3C2416_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o + # Machine support obj-$(CONFIG_MACH_SMDK2416) += mach-smdk2416.o diff --git a/arch/arm/mach-s3c2416/clock.c b/arch/arm/mach-s3c2416/clock.c index 7ccf5a2..3b02d85 100644 --- a/arch/arm/mach-s3c2416/clock.c +++ b/arch/arm/mach-s3c2416/clock.c @@ -38,12 +38,11 @@ static unsigned int armdiv[8] = { [7] = 8, }; -/* ID to hardware numbering, 0 is HSMMC1, 1 is HSMMC0 */ static struct clksrc_clk hsmmc_div[] = { [0] = { .clk = { .name = "hsmmc-div", - .id = 1, + .id = 0, .parent = &clk_esysclk.clk, }, .reg_div = { .reg = S3C2416_CLKDIV2, .size = 2, .shift = 6 }, @@ -51,7 +50,7 @@ static struct clksrc_clk hsmmc_div[] = { [1] = { .clk = { .name = "hsmmc-div", - .id = 0, + .id = 1, .parent = &clk_esysclk.clk, }, .reg_div = { .reg = S3C2443_CLKDIV1, .size = 2, .shift = 6 }, @@ -61,7 +60,7 @@ static struct clksrc_clk hsmmc_div[] = { static struct clksrc_clk hsmmc_mux[] = { [0] = { .clk = { - .id = 1, + .id = 0, .name = "hsmmc-if", .ctrlbit = (1 << 6), .enable = s3c2443_clkcon_enable_s, @@ -77,7 +76,7 @@ static struct clksrc_clk hsmmc_mux[] = { }, [1] = { .clk = { - .id = 0, + .id = 1, .name = "hsmmc-if", .ctrlbit = (1 << 12), .enable = s3c2443_clkcon_enable_s, @@ -93,6 +92,13 @@ static struct clksrc_clk hsmmc_mux[] = { }, }; +static struct clk hsmmc0_clk = { + .name = "hsmmc", + .id = 0, + .parent = &clk_h, + .enable = s3c2443_clkcon_enable_h, + .ctrlbit = S3C2416_HCLKCON_HSMMC0, +}; static inline unsigned int s3c2416_fclk_div(unsigned long clkcon0) { @@ -130,6 +136,8 @@ void __init s3c2416_init_clocks(int xtal) for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++) s3c_register_clksrc(clksrcs[ptr], 1); + s3c24xx_register_clock(&hsmmc0_clk); + s3c_pwmclk_init(); } diff --git a/arch/arm/mach-s3c2416/irq.c b/arch/arm/mach-s3c2416/irq.c index 00174da..680fe38 100644 --- a/arch/arm/mach-s3c2416/irq.c +++ b/arch/arm/mach-s3c2416/irq.c @@ -77,28 +77,27 @@ static void s3c2416_irq_demux_wdtac97(unsigned int irq, struct irq_desc *desc) #define INTMSK_WDTAC97 (1UL << (IRQ_WDT - IRQ_EINT0)) #define SUBMSK_WDTAC97 INTMSK(IRQ_S3C2443_WDT, IRQ_S3C2443_AC97) -static void s3c2416_irq_wdtac97_mask(unsigned int irqno) +static void s3c2416_irq_wdtac97_mask(struct irq_data *data) { - s3c_irqsub_mask(irqno, INTMSK_WDTAC97, SUBMSK_WDTAC97); + s3c_irqsub_mask(data->irq, INTMSK_WDTAC97, SUBMSK_WDTAC97); } -static void s3c2416_irq_wdtac97_unmask(unsigned int irqno) +static void s3c2416_irq_wdtac97_unmask(struct irq_data *data) { - s3c_irqsub_unmask(irqno, INTMSK_WDTAC97); + s3c_irqsub_unmask(data->irq, INTMSK_WDTAC97); } -static void s3c2416_irq_wdtac97_ack(unsigned int irqno) +static void s3c2416_irq_wdtac97_ack(struct irq_data *data) { - s3c_irqsub_maskack(irqno, INTMSK_WDTAC97, SUBMSK_WDTAC97); + s3c_irqsub_maskack(data->irq, INTMSK_WDTAC97, SUBMSK_WDTAC97); } static struct irq_chip s3c2416_irq_wdtac97 = { - .mask = s3c2416_irq_wdtac97_mask, - .unmask = s3c2416_irq_wdtac97_unmask, - .ack = s3c2416_irq_wdtac97_ack, + .irq_mask = s3c2416_irq_wdtac97_mask, + .irq_unmask = s3c2416_irq_wdtac97_unmask, + .irq_ack = s3c2416_irq_wdtac97_ack, }; - /* LCD sub interrupts */ static void s3c2416_irq_demux_lcd(unsigned int irq, struct irq_desc *desc) @@ -109,28 +108,27 @@ static void s3c2416_irq_demux_lcd(unsigned int irq, struct irq_desc *desc) #define INTMSK_LCD (1UL << (IRQ_LCD - IRQ_EINT0)) #define SUBMSK_LCD INTMSK(IRQ_S3C2443_LCD1, IRQ_S3C2443_LCD4) -static void s3c2416_irq_lcd_mask(unsigned int irqno) +static void s3c2416_irq_lcd_mask(struct irq_data *data) { - s3c_irqsub_mask(irqno, INTMSK_LCD, SUBMSK_LCD); + s3c_irqsub_mask(data->irq, INTMSK_LCD, SUBMSK_LCD); } -static void s3c2416_irq_lcd_unmask(unsigned int irqno) +static void s3c2416_irq_lcd_unmask(struct irq_data *data) { - s3c_irqsub_unmask(irqno, INTMSK_LCD); + s3c_irqsub_unmask(data->irq, INTMSK_LCD); } -static void s3c2416_irq_lcd_ack(unsigned int irqno) +static void s3c2416_irq_lcd_ack(struct irq_data *data) { - s3c_irqsub_maskack(irqno, INTMSK_LCD, SUBMSK_LCD); + s3c_irqsub_maskack(data->irq, INTMSK_LCD, SUBMSK_LCD); } static struct irq_chip s3c2416_irq_lcd = { - .mask = s3c2416_irq_lcd_mask, - .unmask = s3c2416_irq_lcd_unmask, - .ack = s3c2416_irq_lcd_ack, + .irq_mask = s3c2416_irq_lcd_mask, + .irq_unmask = s3c2416_irq_lcd_unmask, + .irq_ack = s3c2416_irq_lcd_ack, }; - /* DMA sub interrupts */ static void s3c2416_irq_demux_dma(unsigned int irq, struct irq_desc *desc) @@ -142,28 +140,27 @@ static void s3c2416_irq_demux_dma(unsigned int irq, struct irq_desc *desc) #define SUBMSK_DMA INTMSK(IRQ_S3C2443_DMA0, IRQ_S3C2443_DMA5) -static void s3c2416_irq_dma_mask(unsigned int irqno) +static void s3c2416_irq_dma_mask(struct irq_data *data) { - s3c_irqsub_mask(irqno, INTMSK_DMA, SUBMSK_DMA); + s3c_irqsub_mask(data->irq, INTMSK_DMA, SUBMSK_DMA); } -static void s3c2416_irq_dma_unmask(unsigned int irqno) +static void s3c2416_irq_dma_unmask(struct irq_data *data) { - s3c_irqsub_unmask(irqno, INTMSK_DMA); + s3c_irqsub_unmask(data->irq, INTMSK_DMA); } -static void s3c2416_irq_dma_ack(unsigned int irqno) +static void s3c2416_irq_dma_ack(struct irq_data *data) { - s3c_irqsub_maskack(irqno, INTMSK_DMA, SUBMSK_DMA); + s3c_irqsub_maskack(data->irq, INTMSK_DMA, SUBMSK_DMA); } static struct irq_chip s3c2416_irq_dma = { - .mask = s3c2416_irq_dma_mask, - .unmask = s3c2416_irq_dma_unmask, - .ack = s3c2416_irq_dma_ack, + .irq_mask = s3c2416_irq_dma_mask, + .irq_unmask = s3c2416_irq_dma_unmask, + .irq_ack = s3c2416_irq_dma_ack, }; - /* UART3 sub interrupts */ static void s3c2416_irq_demux_uart3(unsigned int irq, struct irq_desc *desc) @@ -174,28 +171,27 @@ static void s3c2416_irq_demux_uart3(unsigned int irq, struct irq_desc *desc) #define INTMSK_UART3 (1UL << (IRQ_S3C2443_UART3 - IRQ_EINT0)) #define SUBMSK_UART3 (0x7 << (IRQ_S3C2443_RX3 - S3C2410_IRQSUB(0))) -static void s3c2416_irq_uart3_mask(unsigned int irqno) +static void s3c2416_irq_uart3_mask(struct irq_data *data) { - s3c_irqsub_mask(irqno, INTMSK_UART3, SUBMSK_UART3); + s3c_irqsub_mask(data->irq, INTMSK_UART3, SUBMSK_UART3); } -static void s3c2416_irq_uart3_unmask(unsigned int irqno) +static void s3c2416_irq_uart3_unmask(struct irq_data *data) { - s3c_irqsub_unmask(irqno, INTMSK_UART3); + s3c_irqsub_unmask(data->irq, INTMSK_UART3); } -static void s3c2416_irq_uart3_ack(unsigned int irqno) +static void s3c2416_irq_uart3_ack(struct irq_data *data) { - s3c_irqsub_maskack(irqno, INTMSK_UART3, SUBMSK_UART3); + s3c_irqsub_maskack(data->irq, INTMSK_UART3, SUBMSK_UART3); } static struct irq_chip s3c2416_irq_uart3 = { - .mask = s3c2416_irq_uart3_mask, - .unmask = s3c2416_irq_uart3_unmask, - .ack = s3c2416_irq_uart3_ack, + .irq_mask = s3c2416_irq_uart3_mask, + .irq_unmask = s3c2416_irq_uart3_unmask, + .irq_ack = s3c2416_irq_uart3_ack, }; - /* IRQ initialisation code */ static int __init s3c2416_add_sub(unsigned int base, diff --git a/arch/arm/mach-s3c2416/mach-smdk2416.c b/arch/arm/mach-s3c2416/mach-smdk2416.c index 7fc3664..3f83177 100644 --- a/arch/arm/mach-s3c2416/mach-smdk2416.c +++ b/arch/arm/mach-s3c2416/mach-smdk2416.c @@ -46,6 +46,7 @@ #include <plat/devs.h> #include <plat/cpu.h> #include <plat/nand.h> +#include <plat/sdhci.h> #include <plat/regs-fb-v4.h> #include <plat/fb.h> @@ -110,6 +111,13 @@ static struct s3c2410_uartcfg smdk2416_uartcfgs[] __initdata = { .ucon = UCON, .ulcon = ULCON | 0x50, .ufcon = UFCON, + }, + [3] = { + .hwport = 3, + .flags = 0, + .ucon = UCON, + .ulcon = ULCON, + .ufcon = UFCON, } }; @@ -159,6 +167,18 @@ static struct s3c_fb_platdata smdk2416_fb_platdata = { .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC, }; +static struct s3c_sdhci_platdata smdk2416_hsmmc0_pdata __initdata = { + .max_width = 4, + .cd_type = S3C_SDHCI_CD_GPIO, + .ext_cd_gpio = S3C2410_GPF(1), + .ext_cd_gpio_invert = 1, +}; + +static struct s3c_sdhci_platdata smdk2416_hsmmc1_pdata __initdata = { + .max_width = 4, + .cd_type = S3C_SDHCI_CD_NONE, +}; + static struct platform_device *smdk2416_devices[] __initdata = { &s3c_device_fb, &s3c_device_wdt, @@ -180,6 +200,9 @@ static void __init smdk2416_machine_init(void) s3c_i2c0_set_platdata(NULL); s3c_fb_set_platdata(&smdk2416_fb_platdata); + s3c_sdhci0_set_platdata(&smdk2416_hsmmc0_pdata); + s3c_sdhci1_set_platdata(&smdk2416_hsmmc1_pdata); + gpio_request(S3C2410_GPB(4), "USBHost Power"); gpio_direction_output(S3C2410_GPB(4), 1); diff --git a/arch/arm/mach-s3c2416/s3c2416.c b/arch/arm/mach-s3c2416/s3c2416.c index 63f39cd..ba7fd87 100644 --- a/arch/arm/mach-s3c2416/s3c2416.c +++ b/arch/arm/mach-s3c2416/s3c2416.c @@ -53,6 +53,7 @@ #include <plat/s3c2416.h> #include <plat/devs.h> #include <plat/cpu.h> +#include <plat/sdhci.h> #include <plat/iic-core.h> #include <plat/fb-core.h> @@ -115,6 +116,10 @@ void __init s3c2416_map_io(void) s3c24xx_gpiocfg_default.set_pull = s3c_gpio_setpull_updown; s3c24xx_gpiocfg_default.get_pull = s3c_gpio_getpull_updown; + /* initialize device information early */ + s3c2416_default_sdhci0(); + s3c2416_default_sdhci1(); + iotable_init(s3c2416_iodesc, ARRAY_SIZE(s3c2416_iodesc)); } diff --git a/arch/arm/mach-s3c2416/setup-sdhci-gpio.c b/arch/arm/mach-s3c2416/setup-sdhci-gpio.c new file mode 100644 index 0000000..f65cb3e --- /dev/null +++ b/arch/arm/mach-s3c2416/setup-sdhci-gpio.c @@ -0,0 +1,34 @@ +/* linux/arch/arm/plat-s3c2416/setup-sdhci-gpio.c + * + * Copyright 2010 Promwad Innovation Company + * Yauhen Kharuzhy <yauhen.kharuzhy@promwad.com> + * + * S3C2416 - Helper functions for setting up SDHCI device(s) GPIO (HSMMC) + * + * Based on mach-s3c64xx/setup-sdhci-gpio.c + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#include <linux/kernel.h> +#include <linux/types.h> +#include <linux/interrupt.h> +#include <linux/platform_device.h> +#include <linux/io.h> +#include <linux/gpio.h> + +#include <mach/regs-gpio.h> +#include <plat/gpio-cfg.h> + +void s3c2416_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width) +{ + s3c_gpio_cfgrange_nopull(S3C2410_GPE(5), 2 + width, S3C_GPIO_SFN(2)); +} + +void s3c2416_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width) +{ + s3c_gpio_cfgrange_nopull(S3C2410_GPL(0), width, S3C_GPIO_SFN(2)); + s3c_gpio_cfgrange_nopull(S3C2410_GPL(8), 2, S3C_GPIO_SFN(2)); +} diff --git a/arch/arm/mach-s3c2416/setup-sdhci.c b/arch/arm/mach-s3c2416/setup-sdhci.c new file mode 100644 index 0000000..ed34fad --- /dev/null +++ b/arch/arm/mach-s3c2416/setup-sdhci.c @@ -0,0 +1,61 @@ +/* linux/arch/arm/mach-s3c2416/setup-sdhci.c + * + * Copyright 2010 Promwad Innovation Company + * Yauhen Kharuzhy <yauhen.kharuzhy@promwad.com> + * + * S3C2416 - Helper functions for settign up SDHCI device(s) (HSMMC) + * + * Based on mach-s3c64xx/setup-sdhci.c + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#include <linux/kernel.h> +#include <linux/types.h> +#include <linux/interrupt.h> +#include <linux/platform_device.h> +#include <linux/io.h> + +#include <linux/mmc/card.h> +#include <linux/mmc/host.h> + +#include <plat/regs-sdhci.h> +#include <plat/sdhci.h> + +/* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */ + +char *s3c2416_hsmmc_clksrcs[4] = { + [0] = "hsmmc", + [1] = "hsmmc", + [2] = "hsmmc-if", + /* [3] = "48m", - note not successfully used yet */ +}; + +void s3c2416_setup_sdhci_cfg_card(struct platform_device *dev, + void __iomem *r, + struct mmc_ios *ios, + struct mmc_card *card) +{ + u32 ctrl2, ctrl3; + + ctrl2 = __raw_readl(r + S3C_SDHCI_CONTROL2); + ctrl2 &= S3C_SDHCI_CTRL2_SELBASECLK_MASK; + ctrl2 |= (S3C64XX_SDHCI_CTRL2_ENSTAASYNCCLR | + S3C64XX_SDHCI_CTRL2_ENCMDCNFMSK | + S3C_SDHCI_CTRL2_ENFBCLKRX | + S3C_SDHCI_CTRL2_DFCNT_NONE | + S3C_SDHCI_CTRL2_ENCLKOUTHOLD); + + if (ios->clock < 25 * 1000000) + ctrl3 = (S3C_SDHCI_CTRL3_FCSEL3 | + S3C_SDHCI_CTRL3_FCSEL2 | + S3C_SDHCI_CTRL3_FCSEL1 | + S3C_SDHCI_CTRL3_FCSEL0); + else + ctrl3 = (S3C_SDHCI_CTRL3_FCSEL1 | S3C_SDHCI_CTRL3_FCSEL0); + + __raw_writel(ctrl2, r + S3C_SDHCI_CONTROL2); + __raw_writel(ctrl3, r + S3C_SDHCI_CONTROL3); +} diff --git a/arch/arm/mach-s3c2440/irq.c b/arch/arm/mach-s3c2440/irq.c index 0c049b9..acad442 100644 --- a/arch/arm/mach-s3c2440/irq.c +++ b/arch/arm/mach-s3c2440/irq.c @@ -69,27 +69,27 @@ static void s3c_irq_demux_wdtac97(unsigned int irq, #define INTMSK_WDT (1UL << (IRQ_WDT - IRQ_EINT0)) static void -s3c_irq_wdtac97_mask(unsigned int irqno) +s3c_irq_wdtac97_mask(struct irq_data *data) { - s3c_irqsub_mask(irqno, INTMSK_WDT, 3<<13); + s3c_irqsub_mask(data->irq, INTMSK_WDT, 3 << 13); } static void -s3c_irq_wdtac97_unmask(unsigned int irqno) +s3c_irq_wdtac97_unmask(struct irq_data *data) { - s3c_irqsub_unmask(irqno, INTMSK_WDT); + s3c_irqsub_unmask(data->irq, INTMSK_WDT); } static void -s3c_irq_wdtac97_ack(unsigned int irqno) +s3c_irq_wdtac97_ack(struct irq_data *data) { - s3c_irqsub_maskack(irqno, INTMSK_WDT, 3<<13); + s3c_irqsub_maskack(data->irq, INTMSK_WDT, 3 << 13); } static struct irq_chip s3c_irq_wdtac97 = { - .mask = s3c_irq_wdtac97_mask, - .unmask = s3c_irq_wdtac97_unmask, - .ack = s3c_irq_wdtac97_ack, + .irq_mask = s3c_irq_wdtac97_mask, + .irq_unmask = s3c_irq_wdtac97_unmask, + .irq_ack = s3c_irq_wdtac97_ack, }; static int s3c2440_irq_add(struct sys_device *sysdev) diff --git a/arch/arm/mach-s3c2440/s3c244x-irq.c b/arch/arm/mach-s3c2440/s3c244x-irq.c index a75c0c2..83daf4e 100644 --- a/arch/arm/mach-s3c2440/s3c244x-irq.c +++ b/arch/arm/mach-s3c2440/s3c244x-irq.c @@ -68,27 +68,27 @@ static void s3c_irq_demux_cam(unsigned int irq, #define INTMSK_CAM (1UL << (IRQ_CAM - IRQ_EINT0)) static void -s3c_irq_cam_mask(unsigned int irqno) +s3c_irq_cam_mask(struct irq_data *data) { - s3c_irqsub_mask(irqno, INTMSK_CAM, 3<<11); + s3c_irqsub_mask(data->irq, INTMSK_CAM, 3 << 11); } static void -s3c_irq_cam_unmask(unsigned int irqno) +s3c_irq_cam_unmask(struct irq_data *data) { - s3c_irqsub_unmask(irqno, INTMSK_CAM); + s3c_irqsub_unmask(data->irq, INTMSK_CAM); } static void -s3c_irq_cam_ack(unsigned int irqno) +s3c_irq_cam_ack(struct irq_data *data) { - s3c_irqsub_maskack(irqno, INTMSK_CAM, 3<<11); + s3c_irqsub_maskack(data->irq, INTMSK_CAM, 3 << 11); } static struct irq_chip s3c_irq_cam = { - .mask = s3c_irq_cam_mask, - .unmask = s3c_irq_cam_unmask, - .ack = s3c_irq_cam_ack, + .irq_mask = s3c_irq_cam_mask, + .irq_unmask = s3c_irq_cam_unmask, + .irq_ack = s3c_irq_cam_ack, }; static int s3c244x_irq_add(struct sys_device *sysdev) diff --git a/arch/arm/mach-s3c2443/Kconfig b/arch/arm/mach-s3c2443/Kconfig index 31babec..d8eb868 100644 --- a/arch/arm/mach-s3c2443/Kconfig +++ b/arch/arm/mach-s3c2443/Kconfig @@ -10,6 +10,7 @@ config CPU_S3C2443 select CPU_LLSERIAL_S3C2440 select SAMSUNG_CLKSRC select S3C2443_CLOCK + select S3C_GPIO_PULL_S3C2443 help Support for the S3C2443 SoC from the S3C24XX line @@ -25,7 +26,7 @@ config MACH_SMDK2443 bool "SMDK2443" select CPU_S3C2443 select MACH_SMDK - select S3C_DEV_HSMMC + select S3C_DEV_HSMMC1 help Say Y here if you are using an SMDK2443 diff --git a/arch/arm/mach-s3c2443/clock.c b/arch/arm/mach-s3c2443/clock.c index 0c3c0c8..f4ec6d5 100644 --- a/arch/arm/mach-s3c2443/clock.c +++ b/arch/arm/mach-s3c2443/clock.c @@ -196,7 +196,7 @@ static struct clksrc_clk clk_hsspi = { static struct clksrc_clk clk_hsmmc_div = { .clk = { .name = "hsmmc-div", - .id = -1, + .id = 1, .parent = &clk_esysclk.clk, }, .reg_div = { .reg = S3C2443_CLKDIV1, .size = 2, .shift = 6 }, @@ -231,7 +231,7 @@ static int s3c2443_enable_hsmmc(struct clk *clk, int enable) static struct clk clk_hsmmc = { .name = "hsmmc-if", - .id = -1, + .id = 1, .parent = &clk_hsmmc_div.clk, .enable = s3c2443_enable_hsmmc, .ops = &(struct clk_ops) { diff --git a/arch/arm/mach-s3c2443/irq.c b/arch/arm/mach-s3c2443/irq.c index 8934247..c7820f9 100644 --- a/arch/arm/mach-s3c2443/irq.c +++ b/arch/arm/mach-s3c2443/irq.c @@ -75,28 +75,27 @@ static void s3c2443_irq_demux_wdtac97(unsigned int irq, struct irq_desc *desc) #define INTMSK_WDTAC97 (1UL << (IRQ_WDT - IRQ_EINT0)) #define SUBMSK_WDTAC97 INTMSK(IRQ_S3C2443_WDT, IRQ_S3C2443_AC97) -static void s3c2443_irq_wdtac97_mask(unsigned int irqno) +static void s3c2443_irq_wdtac97_mask(struct irq_data *data) { - s3c_irqsub_mask(irqno, INTMSK_WDTAC97, SUBMSK_WDTAC97); + s3c_irqsub_mask(data->irq, INTMSK_WDTAC97, SUBMSK_WDTAC97); } -static void s3c2443_irq_wdtac97_unmask(unsigned int irqno) +static void s3c2443_irq_wdtac97_unmask(struct irq_data *data) { - s3c_irqsub_unmask(irqno, INTMSK_WDTAC97); + s3c_irqsub_unmask(data->irq, INTMSK_WDTAC97); } -static void s3c2443_irq_wdtac97_ack(unsigned int irqno) +static void s3c2443_irq_wdtac97_ack(struct irq_data *data) { - s3c_irqsub_maskack(irqno, INTMSK_WDTAC97, SUBMSK_WDTAC97); + s3c_irqsub_maskack(data->irq, INTMSK_WDTAC97, SUBMSK_WDTAC97); } static struct irq_chip s3c2443_irq_wdtac97 = { - .mask = s3c2443_irq_wdtac97_mask, - .unmask = s3c2443_irq_wdtac97_unmask, - .ack = s3c2443_irq_wdtac97_ack, + .irq_mask = s3c2443_irq_wdtac97_mask, + .irq_unmask = s3c2443_irq_wdtac97_unmask, + .irq_ack = s3c2443_irq_wdtac97_ack, }; - /* LCD sub interrupts */ static void s3c2443_irq_demux_lcd(unsigned int irq, struct irq_desc *desc) @@ -107,28 +106,27 @@ static void s3c2443_irq_demux_lcd(unsigned int irq, struct irq_desc *desc) #define INTMSK_LCD (1UL << (IRQ_LCD - IRQ_EINT0)) #define SUBMSK_LCD INTMSK(IRQ_S3C2443_LCD1, IRQ_S3C2443_LCD4) -static void s3c2443_irq_lcd_mask(unsigned int irqno) +static void s3c2443_irq_lcd_mask(struct irq_data *data) { - s3c_irqsub_mask(irqno, INTMSK_LCD, SUBMSK_LCD); + s3c_irqsub_mask(data->irq, INTMSK_LCD, SUBMSK_LCD); } -static void s3c2443_irq_lcd_unmask(unsigned int irqno) +static void s3c2443_irq_lcd_unmask(struct irq_data *data) { - s3c_irqsub_unmask(irqno, INTMSK_LCD); + s3c_irqsub_unmask(data->irq, INTMSK_LCD); } -static void s3c2443_irq_lcd_ack(unsigned int irqno) +static void s3c2443_irq_lcd_ack(struct irq_data *data) { - s3c_irqsub_maskack(irqno, INTMSK_LCD, SUBMSK_LCD); + s3c_irqsub_maskack(data->irq, INTMSK_LCD, SUBMSK_LCD); } static struct irq_chip s3c2443_irq_lcd = { - .mask = s3c2443_irq_lcd_mask, - .unmask = s3c2443_irq_lcd_unmask, - .ack = s3c2443_irq_lcd_ack, + .irq_mask = s3c2443_irq_lcd_mask, + .irq_unmask = s3c2443_irq_lcd_unmask, + .irq_ack = s3c2443_irq_lcd_ack, }; - /* DMA sub interrupts */ static void s3c2443_irq_demux_dma(unsigned int irq, struct irq_desc *desc) @@ -139,29 +137,27 @@ static void s3c2443_irq_demux_dma(unsigned int irq, struct irq_desc *desc) #define INTMSK_DMA (1UL << (IRQ_S3C2443_DMA - IRQ_EINT0)) #define SUBMSK_DMA INTMSK(IRQ_S3C2443_DMA0, IRQ_S3C2443_DMA5) - -static void s3c2443_irq_dma_mask(unsigned int irqno) +static void s3c2443_irq_dma_mask(struct irq_data *data) { - s3c_irqsub_mask(irqno, INTMSK_DMA, SUBMSK_DMA); + s3c_irqsub_mask(data->irq, INTMSK_DMA, SUBMSK_DMA); } -static void s3c2443_irq_dma_unmask(unsigned int irqno) +static void s3c2443_irq_dma_unmask(struct irq_data *data) { - s3c_irqsub_unmask(irqno, INTMSK_DMA); + s3c_irqsub_unmask(data->irq, INTMSK_DMA); } -static void s3c2443_irq_dma_ack(unsigned int irqno) +static void s3c2443_irq_dma_ack(struct irq_data *data) { - s3c_irqsub_maskack(irqno, INTMSK_DMA, SUBMSK_DMA); + s3c_irqsub_maskack(data->irq, INTMSK_DMA, SUBMSK_DMA); } static struct irq_chip s3c2443_irq_dma = { - .mask = s3c2443_irq_dma_mask, - .unmask = s3c2443_irq_dma_unmask, - .ack = s3c2443_irq_dma_ack, + .irq_mask = s3c2443_irq_dma_mask, + .irq_unmask = s3c2443_irq_dma_unmask, + .irq_ack = s3c2443_irq_dma_ack, }; - /* UART3 sub interrupts */ static void s3c2443_irq_demux_uart3(unsigned int irq, struct irq_desc *desc) @@ -172,28 +168,27 @@ static void s3c2443_irq_demux_uart3(unsigned int irq, struct irq_desc *desc) #define INTMSK_UART3 (1UL << (IRQ_S3C2443_UART3 - IRQ_EINT0)) #define SUBMSK_UART3 (0x7 << (IRQ_S3C2443_RX3 - S3C2410_IRQSUB(0))) -static void s3c2443_irq_uart3_mask(unsigned int irqno) +static void s3c2443_irq_uart3_mask(struct irq_data *data) { - s3c_irqsub_mask(irqno, INTMSK_UART3, SUBMSK_UART3); + s3c_irqsub_mask(data->irq, INTMSK_UART3, SUBMSK_UART3); } -static void s3c2443_irq_uart3_unmask(unsigned int irqno) +static void s3c2443_irq_uart3_unmask(struct irq_data *data) { - s3c_irqsub_unmask(irqno, INTMSK_UART3); + s3c_irqsub_unmask(data->irq, INTMSK_UART3); } -static void s3c2443_irq_uart3_ack(unsigned int irqno) +static void s3c2443_irq_uart3_ack(struct irq_data *data) { - s3c_irqsub_maskack(irqno, INTMSK_UART3, SUBMSK_UART3); + s3c_irqsub_maskack(data->irq, INTMSK_UART3, SUBMSK_UART3); } static struct irq_chip s3c2443_irq_uart3 = { - .mask = s3c2443_irq_uart3_mask, - .unmask = s3c2443_irq_uart3_unmask, - .ack = s3c2443_irq_uart3_ack, + .irq_mask = s3c2443_irq_uart3_mask, + .irq_unmask = s3c2443_irq_uart3_unmask, + .irq_ack = s3c2443_irq_uart3_ack, }; - /* CAM sub interrupts */ static void s3c2443_irq_demux_cam(unsigned int irq, struct irq_desc *desc) @@ -204,25 +199,25 @@ static void s3c2443_irq_demux_cam(unsigned int irq, struct irq_desc *desc) #define INTMSK_CAM (1UL << (IRQ_CAM - IRQ_EINT0)) #define SUBMSK_CAM INTMSK(IRQ_S3C2440_CAM_C, IRQ_S3C2440_CAM_P) -static void s3c2443_irq_cam_mask(unsigned int irqno) +static void s3c2443_irq_cam_mask(struct irq_data *data) { - s3c_irqsub_mask(irqno, INTMSK_CAM, SUBMSK_CAM); + s3c_irqsub_mask(data->irq, INTMSK_CAM, SUBMSK_CAM); } -static void s3c2443_irq_cam_unmask(unsigned int irqno) +static void s3c2443_irq_cam_unmask(struct irq_data *data) { - s3c_irqsub_unmask(irqno, INTMSK_CAM); + s3c_irqsub_unmask(data->irq, INTMSK_CAM); } -static void s3c2443_irq_cam_ack(unsigned int irqno) +static void s3c2443_irq_cam_ack(struct irq_data *data) { - s3c_irqsub_maskack(irqno, INTMSK_CAM, SUBMSK_CAM); + s3c_irqsub_maskack(data->irq, INTMSK_CAM, SUBMSK_CAM); } static struct irq_chip s3c2443_irq_cam = { - .mask = s3c2443_irq_cam_mask, - .unmask = s3c2443_irq_cam_unmask, - .ack = s3c2443_irq_cam_ack, + .irq_mask = s3c2443_irq_cam_mask, + .irq_unmask = s3c2443_irq_cam_unmask, + .irq_ack = s3c2443_irq_cam_ack, }; /* IRQ initialisation code */ diff --git a/arch/arm/mach-s3c2443/mach-smdk2443.c b/arch/arm/mach-s3c2443/mach-smdk2443.c index 4337f0a..514275e 100644 --- a/arch/arm/mach-s3c2443/mach-smdk2443.c +++ b/arch/arm/mach-s3c2443/mach-smdk2443.c @@ -99,13 +99,20 @@ static struct s3c2410_uartcfg smdk2443_uartcfgs[] __initdata = { .ucon = 0x3c5, .ulcon = 0x43, .ufcon = 0x51, + }, + [3] = { + .hwport = 3, + .flags = 0, + .ucon = 0x3c5, + .ulcon = 0x03, + .ufcon = 0x51, } }; static struct platform_device *smdk2443_devices[] __initdata = { &s3c_device_wdt, &s3c_device_i2c0, - &s3c_device_hsmmc0, + &s3c_device_hsmmc1, #ifdef CONFIG_SND_SOC_SMDK2443_WM9710 &s3c_device_ac97, #endif diff --git a/arch/arm/mach-s3c2443/s3c2443.c b/arch/arm/mach-s3c2443/s3c2443.c index 33d18dd..e6a28ba 100644 --- a/arch/arm/mach-s3c2443/s3c2443.c +++ b/arch/arm/mach-s3c2443/s3c2443.c @@ -16,6 +16,7 @@ #include <linux/list.h> #include <linux/timer.h> #include <linux/init.h> +#include <linux/gpio.h> #include <linux/platform_device.h> #include <linux/serial_core.h> #include <linux/sysdev.h> @@ -32,6 +33,9 @@ #include <mach/regs-s3c2443-clock.h> #include <mach/reset.h> +#include <plat/gpio-core.h> +#include <plat/gpio-cfg.h> +#include <plat/gpio-cfg-helpers.h> #include <plat/s3c2443.h> #include <plat/devs.h> #include <plat/cpu.h> @@ -86,6 +90,9 @@ void __init s3c2443_init_uarts(struct s3c2410_uartcfg *cfg, int no) void __init s3c2443_map_io(void) { + s3c24xx_gpiocfg_default.set_pull = s3c_gpio_setpull_s3c2443; + s3c24xx_gpiocfg_default.get_pull = s3c_gpio_getpull_s3c2443; + iotable_init(s3c2443_iodesc, ARRAY_SIZE(s3c2443_iodesc)); } diff --git a/arch/arm/mach-s3c64xx/clock.c b/arch/arm/mach-s3c64xx/clock.c index 1c98d2ff..dd37820 100644 --- a/arch/arm/mach-s3c64xx/clock.c +++ b/arch/arm/mach-s3c64xx/clock.c @@ -127,7 +127,7 @@ int s3c64xx_sclk_ctrl(struct clk *clk, int enable) return s3c64xx_gate(S3C_SCLK_GATE, clk, enable); } -static struct clk init_clocks_disable[] = { +static struct clk init_clocks_off[] = { { .name = "nand", .id = -1, @@ -834,10 +834,6 @@ static struct clk *clks[] __initdata = { void __init s3c64xx_register_clocks(unsigned long xtal, unsigned armclk_divlimit) { - struct clk *clkp; - int ret; - int ptr; - armclk_mask = armclk_divlimit; s3c24xx_register_baseclocks(xtal); @@ -845,17 +841,8 @@ void __init s3c64xx_register_clocks(unsigned long xtal, s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); - clkp = init_clocks_disable; - for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) { - - ret = s3c24xx_register_clock(clkp); - if (ret < 0) { - printk(KERN_ERR "Failed to register clock %s (%d)\n", - clkp->name, ret); - } - - (clkp->enable)(clkp, 0); - } + s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); + s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); s3c24xx_register_clocks(clks1, ARRAY_SIZE(clks1)); s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); diff --git a/arch/arm/mach-s3c64xx/dma.c b/arch/arm/mach-s3c64xx/dma.c index 372ea68..135db1b 100644 --- a/arch/arm/mach-s3c64xx/dma.c +++ b/arch/arm/mach-s3c64xx/dma.c @@ -212,6 +212,7 @@ static int s3c64xx_dma_start(struct s3c2410_dma_chan *chan) config = readl(chan->regs + PL080S_CH_CONFIG); config |= PL080_CONFIG_ENABLE; + config &= ~PL080_CONFIG_HALT; pr_debug("%s: writing config %08x\n", __func__, config); writel(config, chan->regs + PL080S_CH_CONFIG); diff --git a/arch/arm/mach-s3c64xx/irq-eint.c b/arch/arm/mach-s3c64xx/irq-eint.c index 5682d6a..2ead818 100644 --- a/arch/arm/mach-s3c64xx/irq-eint.c +++ b/arch/arm/mach-s3c64xx/irq-eint.c @@ -30,41 +30,41 @@ #include <plat/pm.h> #define eint_offset(irq) ((irq) - IRQ_EINT(0)) -#define eint_irq_to_bit(irq) (1 << eint_offset(irq)) +#define eint_irq_to_bit(irq) ((u32)(1 << eint_offset(irq))) -static inline void s3c_irq_eint_mask(unsigned int irq) +static inline void s3c_irq_eint_mask(struct irq_data *data) { u32 mask; mask = __raw_readl(S3C64XX_EINT0MASK); - mask |= eint_irq_to_bit(irq); + mask |= (u32)data->chip_data; __raw_writel(mask, S3C64XX_EINT0MASK); } -static void s3c_irq_eint_unmask(unsigned int irq) +static void s3c_irq_eint_unmask(struct irq_data *data) { u32 mask; mask = __raw_readl(S3C64XX_EINT0MASK); - mask &= ~eint_irq_to_bit(irq); + mask &= ~((u32)data->chip_data); __raw_writel(mask, S3C64XX_EINT0MASK); } -static inline void s3c_irq_eint_ack(unsigned int irq) +static inline void s3c_irq_eint_ack(struct irq_data *data) { - __raw_writel(eint_irq_to_bit(irq), S3C64XX_EINT0PEND); + __raw_writel((u32)data->chip_data, S3C64XX_EINT0PEND); } -static void s3c_irq_eint_maskack(unsigned int irq) +static void s3c_irq_eint_maskack(struct irq_data *data) { /* compiler should in-line these */ - s3c_irq_eint_mask(irq); - s3c_irq_eint_ack(irq); + s3c_irq_eint_mask(data); + s3c_irq_eint_ack(data); } -static int s3c_irq_eint_set_type(unsigned int irq, unsigned int type) +static int s3c_irq_eint_set_type(struct irq_data *data, unsigned int type) { - int offs = eint_offset(irq); + int offs = eint_offset(data->irq); int pin, pin_val; int shift; u32 ctrl, mask; @@ -140,12 +140,12 @@ static int s3c_irq_eint_set_type(unsigned int irq, unsigned int type) static struct irq_chip s3c_irq_eint = { .name = "s3c-eint", - .mask = s3c_irq_eint_mask, - .unmask = s3c_irq_eint_unmask, - .mask_ack = s3c_irq_eint_maskack, - .ack = s3c_irq_eint_ack, - .set_type = s3c_irq_eint_set_type, - .set_wake = s3c_irqext_wake, + .irq_mask = s3c_irq_eint_mask, + .irq_unmask = s3c_irq_eint_unmask, + .irq_mask_ack = s3c_irq_eint_maskack, + .irq_ack = s3c_irq_eint_ack, + .irq_set_type = s3c_irq_eint_set_type, + .irq_set_wake = s3c_irqext_wake, }; /* s3c_irq_demux_eint @@ -198,6 +198,7 @@ static int __init s3c64xx_init_irq_eint(void) for (irq = IRQ_EINT(0); irq <= IRQ_EINT(27); irq++) { set_irq_chip(irq, &s3c_irq_eint); + set_irq_chip_data(irq, (void *)eint_irq_to_bit(irq)); set_irq_handler(irq, handle_level_irq); set_irq_flags(irq, IRQF_VALID); } diff --git a/arch/arm/mach-s5p6442/clock.c b/arch/arm/mach-s5p6442/clock.c index 16d6e7e..fbbc7be 100644 --- a/arch/arm/mach-s5p6442/clock.c +++ b/arch/arm/mach-s5p6442/clock.c @@ -340,7 +340,7 @@ void __init_or_cpufreq s5p6442_setup_clocks(void) clk_pclkd1.rate = pclkd1; } -static struct clk init_clocks_disable[] = { +static struct clk init_clocks_off[] = { { .name = "pdma", .id = -1, @@ -408,23 +408,13 @@ static struct clk *clks[] __initdata = { void __init s5p6442_register_clocks(void) { - struct clk *clkptr; - int i, ret; - s3c24xx_register_clocks(clks, ARRAY_SIZE(clks)); s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); - clkptr = init_clocks_disable; - for (i = 0; i < ARRAY_SIZE(init_clocks_disable); i++, clkptr++) { - ret = s3c24xx_register_clock(clkptr); - if (ret < 0) { - printk(KERN_ERR "Fail to register clock %s (%d)\n", - clkptr->name, ret); - } else - (clkptr->enable)(clkptr, 0); - } + s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); + s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); s3c_pwmclk_init(); } diff --git a/arch/arm/mach-s5p6442/include/mach/map.h b/arch/arm/mach-s5p6442/include/mach/map.h index 31fb2e68..203dd5a 100644 --- a/arch/arm/mach-s5p6442/include/mach/map.h +++ b/arch/arm/mach-s5p6442/include/mach/map.h @@ -28,6 +28,9 @@ #define S5P6442_PA_VIC1 (0xE4100000) #define S5P6442_PA_VIC2 (0xE4200000) +#define S5P6442_PA_SROMC (0xE7000000) +#define S5P_PA_SROMC S5P6442_PA_SROMC + #define S5P6442_PA_MDMA 0xE8000000 #define S5P6442_PA_PDMA 0xE9000000 diff --git a/arch/arm/mach-s5p6442/mach-smdk6442.c b/arch/arm/mach-s5p6442/mach-smdk6442.c index 819fd80..eaf6b9c 100644 --- a/arch/arm/mach-s5p6442/mach-smdk6442.c +++ b/arch/arm/mach-s5p6442/mach-smdk6442.c @@ -12,6 +12,7 @@ #include <linux/types.h> #include <linux/init.h> #include <linux/serial_core.h> +#include <linux/i2c.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> @@ -25,6 +26,7 @@ #include <plat/s5p6442.h> #include <plat/devs.h> #include <plat/cpu.h> +#include <plat/iic.h> /* Following are default values for UCON, ULCON and UFCON UART registers */ #define SMDK6442_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ @@ -65,10 +67,16 @@ static struct s3c2410_uartcfg smdk6442_uartcfgs[] __initdata = { }; static struct platform_device *smdk6442_devices[] __initdata = { + &s3c_device_i2c0, + &samsung_asoc_dma, &s5p6442_device_iis0, &s3c_device_wdt, }; +static struct i2c_board_info smdk6442_i2c_devs0[] __initdata = { + { I2C_BOARD_INFO("wm8580", 0x1b), }, +}; + static void __init smdk6442_map_io(void) { s5p_init_io(NULL, 0, S5P_VA_CHIPID); @@ -78,6 +86,9 @@ static void __init smdk6442_map_io(void) static void __init smdk6442_machine_init(void) { + s3c_i2c0_set_platdata(NULL); + i2c_register_board_info(0, smdk6442_i2c_devs0, + ARRAY_SIZE(smdk6442_i2c_devs0)); platform_add_devices(smdk6442_devices, ARRAY_SIZE(smdk6442_devices)); } diff --git a/arch/arm/mach-s5p6442/setup-i2c0.c b/arch/arm/mach-s5p6442/setup-i2c0.c index 662695d..aad8565 100644 --- a/arch/arm/mach-s5p6442/setup-i2c0.c +++ b/arch/arm/mach-s5p6442/setup-i2c0.c @@ -14,12 +14,15 @@ #include <linux/kernel.h> #include <linux/types.h> +#include <linux/gpio.h> struct platform_device; /* don't need the contents */ +#include <plat/gpio-cfg.h> #include <plat/iic.h> void s3c_i2c0_cfg_gpio(struct platform_device *dev) { - /* Will be populated later */ + s3c_gpio_cfgall_range(S5P6442_GPD1(0), 2, + S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); } diff --git a/arch/arm/mach-s5p64x0/Makefile b/arch/arm/mach-s5p64x0/Makefile index 2655829..ae6bf6f 100644 --- a/arch/arm/mach-s5p64x0/Makefile +++ b/arch/arm/mach-s5p64x0/Makefile @@ -12,9 +12,9 @@ obj- := # Core support for S5P64X0 system -obj-$(CONFIG_ARCH_S5P64X0) += cpu.o init.o clock.o dma.o +obj-$(CONFIG_ARCH_S5P64X0) += cpu.o init.o clock.o dma.o gpiolib.o obj-$(CONFIG_ARCH_S5P64X0) += setup-i2c0.o -obj-$(CONFIG_CPU_S5P6440) += clock-s5p6440.o gpio.o +obj-$(CONFIG_CPU_S5P6440) += clock-s5p6440.o obj-$(CONFIG_CPU_S5P6450) += clock-s5p6450.o # machine support diff --git a/arch/arm/mach-s5p64x0/clock-s5p6440.c b/arch/arm/mach-s5p64x0/clock-s5p6440.c index 409c5fc..9f12c2e 100644 --- a/arch/arm/mach-s5p64x0/clock-s5p6440.c +++ b/arch/arm/mach-s5p64x0/clock-s5p6440.c @@ -133,7 +133,7 @@ static struct clksrc_clk clk_pclk_low = { * recommended to keep the following clocks disabled until the driver requests * for enabling the clock. */ -static struct clk init_clocks_disable[] = { +static struct clk init_clocks_off[] = { { .name = "nand", .id = -1, @@ -419,7 +419,7 @@ static struct clksrc_sources clkset_audio = { static struct clksrc_clk clksrcs[] = { { .clk = { - .name = "mmc_bus", + .name = "sclk_mmc", .id = 0, .ctrlbit = (1 << 24), .enable = s5p64x0_sclk_ctrl, @@ -429,7 +429,7 @@ static struct clksrc_clk clksrcs[] = { .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 0, .size = 4 }, }, { .clk = { - .name = "mmc_bus", + .name = "sclk_mmc", .id = 1, .ctrlbit = (1 << 25), .enable = s5p64x0_sclk_ctrl, @@ -439,7 +439,7 @@ static struct clksrc_clk clksrcs[] = { .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 4, .size = 4 }, }, { .clk = { - .name = "mmc_bus", + .name = "sclk_mmc", .id = 2, .ctrlbit = (1 << 26), .enable = s5p64x0_sclk_ctrl, @@ -602,8 +602,6 @@ static struct clk *clks[] __initdata = { void __init s5p6440_register_clocks(void) { - struct clk *clkp; - int ret; int ptr; s3c24xx_register_clocks(clks, ARRAY_SIZE(clks)); @@ -614,16 +612,8 @@ void __init s5p6440_register_clocks(void) s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); - clkp = init_clocks_disable; - for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) { - - ret = s3c24xx_register_clock(clkp); - if (ret < 0) { - printk(KERN_ERR "Failed to register clock %s (%d)\n", - clkp->name, ret); - } - (clkp->enable)(clkp, 0); - } + s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); + s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); s3c_pwmclk_init(); } diff --git a/arch/arm/mach-s5p64x0/clock-s5p6450.c b/arch/arm/mach-s5p64x0/clock-s5p6450.c index 7fc6abd..4eec457 100644 --- a/arch/arm/mach-s5p64x0/clock-s5p6450.c +++ b/arch/arm/mach-s5p64x0/clock-s5p6450.c @@ -181,7 +181,7 @@ static struct clksrc_clk clk_pclk_low = { * recommended to keep the following clocks disabled until the driver requests * for enabling the clock. */ -static struct clk init_clocks_disable[] = { +static struct clk init_clocks_off[] = { { .name = "usbhost", .id = -1, @@ -231,6 +231,12 @@ static struct clk init_clocks_disable[] = { .enable = s5p64x0_pclk_ctrl, .ctrlbit = (1 << 5), }, { + .name = "rtc", + .id = -1, + .parent = &clk_pclk_low.clk, + .enable = s5p64x0_pclk_ctrl, + .ctrlbit = (1 << 6), + }, { .name = "adc", .id = -1, .parent = &clk_pclk_low.clk, @@ -261,6 +267,18 @@ static struct clk init_clocks_disable[] = { .enable = s5p64x0_pclk_ctrl, .ctrlbit = (1 << 26), }, { + .name = "iis", + .id = 1, + .parent = &clk_pclk_low.clk, + .enable = s5p64x0_pclk_ctrl, + .ctrlbit = (1 << 15), + }, { + .name = "iis", + .id = 2, + .parent = &clk_pclk_low.clk, + .enable = s5p64x0_pclk_ctrl, + .ctrlbit = (1 << 16), + }, { .name = "i2c", .id = 1, .parent = &clk_pclk_low.clk, @@ -633,8 +651,6 @@ void __init_or_cpufreq s5p6450_setup_clocks(void) void __init s5p6450_register_clocks(void) { - struct clk *clkp; - int ret; int ptr; for (ptr = 0; ptr < ARRAY_SIZE(sysclks); ptr++) @@ -643,16 +659,8 @@ void __init s5p6450_register_clocks(void) s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); - clkp = init_clocks_disable; - for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) { - - ret = s3c24xx_register_clock(clkp); - if (ret < 0) { - printk(KERN_ERR "Failed to register clock %s (%d)\n", - clkp->name, ret); - } - (clkp->enable)(clkp, 0); - } + s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); + s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); s3c_pwmclk_init(); } diff --git a/arch/arm/mach-s5p64x0/dev-audio.c b/arch/arm/mach-s5p64x0/dev-audio.c index 14f89e73..35f1f22 100644 --- a/arch/arm/mach-s5p64x0/dev-audio.c +++ b/arch/arm/mach-s5p64x0/dev-audio.c @@ -24,13 +24,13 @@ static const char *rclksrc[] = { [1] = "sclk_audio2", }; -static int s5p64x0_cfg_i2s(struct platform_device *pdev) +static int s5p6440_cfg_i2s(struct platform_device *pdev) { - /* configure GPIO for i2s port */ switch (pdev->id) { case 0: - s3c_gpio_cfgpin_range(S5P6440_GPR(4), 5, S3C_GPIO_SFN(5)); - s3c_gpio_cfgpin_range(S5P6440_GPR(13), 2, S3C_GPIO_SFN(5)); + s3c_gpio_cfgpin_range(S5P6440_GPC(4), 2, S3C_GPIO_SFN(5)); + s3c_gpio_cfgpin(S5P6440_GPC(7), S3C_GPIO_SFN(5)); + s3c_gpio_cfgpin_range(S5P6440_GPH(6), 4, S3C_GPIO_SFN(5)); break; default: printk(KERN_ERR "Invalid Device %d\n", pdev->id); @@ -40,8 +40,8 @@ static int s5p64x0_cfg_i2s(struct platform_device *pdev) return 0; } -static struct s3c_audio_pdata s5p64x0_i2s_pdata = { - .cfg_gpio = s5p64x0_cfg_i2s, +static struct s3c_audio_pdata s5p6440_i2s_pdata = { + .cfg_gpio = s5p6440_cfg_i2s, .type = { .i2s = { .quirks = QUIRK_PRI_6CHAN, @@ -50,7 +50,7 @@ static struct s3c_audio_pdata s5p64x0_i2s_pdata = { }, }; -static struct resource s5p64x0_iis0_resource[] = { +static struct resource s5p64x0_i2s0_resource[] = { [0] = { .start = S5P64X0_PA_I2S, .end = S5P64X0_PA_I2S + 0x100 - 1, @@ -71,20 +71,117 @@ static struct resource s5p64x0_iis0_resource[] = { struct platform_device s5p6440_device_iis = { .name = "samsung-i2s", .id = 0, - .num_resources = ARRAY_SIZE(s5p64x0_iis0_resource), - .resource = s5p64x0_iis0_resource, + .num_resources = ARRAY_SIZE(s5p64x0_i2s0_resource), + .resource = s5p64x0_i2s0_resource, .dev = { - .platform_data = &s5p64x0_i2s_pdata, + .platform_data = &s5p6440_i2s_pdata, + }, +}; + +static int s5p6450_cfg_i2s(struct platform_device *pdev) +{ + switch (pdev->id) { + case 0: + s3c_gpio_cfgpin_range(S5P6450_GPR(4), 5, S3C_GPIO_SFN(5)); + s3c_gpio_cfgpin_range(S5P6450_GPR(13), 2, S3C_GPIO_SFN(5)); + break; + case 1: + s3c_gpio_cfgpin(S5P6440_GPB(4), S3C_GPIO_SFN(5)); + s3c_gpio_cfgpin_range(S5P6450_GPC(0), 4, S3C_GPIO_SFN(5)); + break; + case 2: + s3c_gpio_cfgpin_range(S5P6450_GPK(0), 5, S3C_GPIO_SFN(5)); + break; + default: + printk(KERN_ERR "Invalid Device %d\n", pdev->id); + return -EINVAL; + } + + return 0; +} + +static struct s3c_audio_pdata s5p6450_i2s0_pdata = { + .cfg_gpio = s5p6450_cfg_i2s, + .type = { + .i2s = { + .quirks = QUIRK_PRI_6CHAN, + .src_clk = rclksrc, + }, }, }; struct platform_device s5p6450_device_iis0 = { .name = "samsung-i2s", .id = 0, - .num_resources = ARRAY_SIZE(s5p64x0_iis0_resource), - .resource = s5p64x0_iis0_resource, + .num_resources = ARRAY_SIZE(s5p64x0_i2s0_resource), + .resource = s5p64x0_i2s0_resource, + .dev = { + .platform_data = &s5p6450_i2s0_pdata, + }, +}; + +static struct s3c_audio_pdata s5p6450_i2s_pdata = { + .cfg_gpio = s5p6450_cfg_i2s, + .type = { + .i2s = { + .src_clk = rclksrc, + }, + }, +}; + +static struct resource s5p6450_i2s1_resource[] = { + [0] = { + .start = S5P6450_PA_I2S1, + .end = S5P6450_PA_I2S1 + 0x100 - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = DMACH_I2S1_TX, + .end = DMACH_I2S1_TX, + .flags = IORESOURCE_DMA, + }, + [2] = { + .start = DMACH_I2S1_RX, + .end = DMACH_I2S1_RX, + .flags = IORESOURCE_DMA, + }, +}; + +struct platform_device s5p6450_device_iis1 = { + .name = "samsung-i2s", + .id = 1, + .num_resources = ARRAY_SIZE(s5p6450_i2s1_resource), + .resource = s5p6450_i2s1_resource, + .dev = { + .platform_data = &s5p6450_i2s_pdata, + }, +}; + +static struct resource s5p6450_i2s2_resource[] = { + [0] = { + .start = S5P6450_PA_I2S2, + .end = S5P6450_PA_I2S2 + 0x100 - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = DMACH_I2S2_TX, + .end = DMACH_I2S2_TX, + .flags = IORESOURCE_DMA, + }, + [2] = { + .start = DMACH_I2S2_RX, + .end = DMACH_I2S2_RX, + .flags = IORESOURCE_DMA, + }, +}; + +struct platform_device s5p6450_device_iis2 = { + .name = "samsung-i2s", + .id = 2, + .num_resources = ARRAY_SIZE(s5p6450_i2s2_resource), + .resource = s5p6450_i2s2_resource, .dev = { - .platform_data = &s5p64x0_i2s_pdata, + .platform_data = &s5p6450_i2s_pdata, }, }; diff --git a/arch/arm/mach-s5p64x0/gpio.c b/arch/arm/mach-s5p64x0/gpiolib.c index 39159dd..e7fb3b0 100644 --- a/arch/arm/mach-s5p64x0/gpio.c +++ b/arch/arm/mach-s5p64x0/gpiolib.c @@ -1,4 +1,4 @@ -/* linux/arch/arm/mach-s5p64x0/gpio.c +/* linux/arch/arm/mach-s5p64x0/gpiolib.c * * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. * http://www.samsung.com @@ -17,13 +17,12 @@ #include <mach/map.h> #include <mach/regs-gpio.h> +#include <mach/regs-clock.h> #include <plat/gpio-core.h> #include <plat/gpio-cfg.h> #include <plat/gpio-cfg-helpers.h> -/* To be implemented S5P6450 GPIO */ - /* * S5P6440 GPIO bank summary: * @@ -40,6 +39,25 @@ * P 8 2Bit Yes 8 * R 15 4Bit[2] Yes 8 * + * S5P6450 GPIO bank summary: + * + * Bank GPIOs Style SlpCon ExtInt Group + * A 6 4Bit Yes 1 + * B 7 4Bit Yes 1 + * C 8 4Bit Yes 2 + * D 8 4Bit Yes None + * F 2 2Bit Yes None + * G 14 4Bit[2] Yes 5 + * H 10 4Bit[2] Yes 6 + * I 16 2Bit Yes None + * J 12 2Bit Yes None + * K 5 4Bit Yes None + * N 16 2Bit No IRQ_EINT + * P 11 2Bit Yes 8 + * Q 14 2Bit Yes None + * R 15 4Bit[2] Yes None + * S 8 2Bit Yes None + * * [1] BANKF pins 14,15 do not form part of the external interrupt sources * [2] BANK has two control registers, GPxCON0 and GPxCON1 */ @@ -190,7 +208,7 @@ static struct s3c_gpio_cfg s5p64x0_gpio_cfgs[] = { static struct s3c_gpio_chip s5p6440_gpio_4bit[] = { { - .base = S5P6440_GPA_BASE, + .base = S5P64X0_GPA_BASE, .config = &s5p64x0_gpio_cfgs[1], .chip = { .base = S5P6440_GPA(0), @@ -198,7 +216,7 @@ static struct s3c_gpio_chip s5p6440_gpio_4bit[] = { .label = "GPA", }, }, { - .base = S5P6440_GPB_BASE, + .base = S5P64X0_GPB_BASE, .config = &s5p64x0_gpio_cfgs[1], .chip = { .base = S5P6440_GPB(0), @@ -206,7 +224,7 @@ static struct s3c_gpio_chip s5p6440_gpio_4bit[] = { .label = "GPB", }, }, { - .base = S5P6440_GPC_BASE, + .base = S5P64X0_GPC_BASE, .config = &s5p64x0_gpio_cfgs[1], .chip = { .base = S5P6440_GPC(0), @@ -214,7 +232,7 @@ static struct s3c_gpio_chip s5p6440_gpio_4bit[] = { .label = "GPC", }, }, { - .base = S5P6440_GPG_BASE, + .base = S5P64X0_GPG_BASE, .config = &s5p64x0_gpio_cfgs[1], .chip = { .base = S5P6440_GPG(0), @@ -226,7 +244,7 @@ static struct s3c_gpio_chip s5p6440_gpio_4bit[] = { static struct s3c_gpio_chip s5p6440_gpio_4bit2[] = { { - .base = S5P6440_GPH_BASE + 0x4, + .base = S5P64X0_GPH_BASE + 0x4, .config = &s5p64x0_gpio_cfgs[1], .chip = { .base = S5P6440_GPH(0), @@ -238,7 +256,7 @@ static struct s3c_gpio_chip s5p6440_gpio_4bit2[] = { static struct s3c_gpio_chip s5p6440_gpio_rbank_4bit2[] = { { - .base = S5P6440_GPR_BASE + 0x4, + .base = S5P64X0_GPR_BASE + 0x4, .config = &s5p64x0_gpio_cfgs[2], .chip = { .base = S5P6440_GPR(0), @@ -250,7 +268,7 @@ static struct s3c_gpio_chip s5p6440_gpio_rbank_4bit2[] = { static struct s3c_gpio_chip s5p6440_gpio_2bit[] = { { - .base = S5P6440_GPF_BASE, + .base = S5P64X0_GPF_BASE, .config = &s5p64x0_gpio_cfgs[5], .chip = { .base = S5P6440_GPF(0), @@ -258,7 +276,7 @@ static struct s3c_gpio_chip s5p6440_gpio_2bit[] = { .label = "GPF", }, }, { - .base = S5P6440_GPI_BASE, + .base = S5P64X0_GPI_BASE, .config = &s5p64x0_gpio_cfgs[3], .chip = { .base = S5P6440_GPI(0), @@ -266,7 +284,7 @@ static struct s3c_gpio_chip s5p6440_gpio_2bit[] = { .label = "GPI", }, }, { - .base = S5P6440_GPJ_BASE, + .base = S5P64X0_GPJ_BASE, .config = &s5p64x0_gpio_cfgs[3], .chip = { .base = S5P6440_GPJ(0), @@ -274,7 +292,7 @@ static struct s3c_gpio_chip s5p6440_gpio_2bit[] = { .label = "GPJ", }, }, { - .base = S5P6440_GPN_BASE, + .base = S5P64X0_GPN_BASE, .config = &s5p64x0_gpio_cfgs[4], .chip = { .base = S5P6440_GPN(0), @@ -282,7 +300,7 @@ static struct s3c_gpio_chip s5p6440_gpio_2bit[] = { .label = "GPN", }, }, { - .base = S5P6440_GPP_BASE, + .base = S5P64X0_GPP_BASE, .config = &s5p64x0_gpio_cfgs[5], .chip = { .base = S5P6440_GPP(0), @@ -292,6 +310,142 @@ static struct s3c_gpio_chip s5p6440_gpio_2bit[] = { }, }; +static struct s3c_gpio_chip s5p6450_gpio_4bit[] = { + { + .base = S5P64X0_GPA_BASE, + .config = &s5p64x0_gpio_cfgs[1], + .chip = { + .base = S5P6450_GPA(0), + .ngpio = S5P6450_GPIO_A_NR, + .label = "GPA", + }, + }, { + .base = S5P64X0_GPB_BASE, + .config = &s5p64x0_gpio_cfgs[1], + .chip = { + .base = S5P6450_GPB(0), + .ngpio = S5P6450_GPIO_B_NR, + .label = "GPB", + }, + }, { + .base = S5P64X0_GPC_BASE, + .config = &s5p64x0_gpio_cfgs[1], + .chip = { + .base = S5P6450_GPC(0), + .ngpio = S5P6450_GPIO_C_NR, + .label = "GPC", + }, + }, { + .base = S5P6450_GPD_BASE, + .config = &s5p64x0_gpio_cfgs[1], + .chip = { + .base = S5P6450_GPD(0), + .ngpio = S5P6450_GPIO_D_NR, + .label = "GPD", + }, + }, { + .base = S5P6450_GPK_BASE, + .config = &s5p64x0_gpio_cfgs[1], + .chip = { + .base = S5P6450_GPK(0), + .ngpio = S5P6450_GPIO_K_NR, + .label = "GPK", + }, + }, +}; + +static struct s3c_gpio_chip s5p6450_gpio_4bit2[] = { + { + .base = S5P64X0_GPG_BASE + 0x4, + .config = &s5p64x0_gpio_cfgs[1], + .chip = { + .base = S5P6450_GPG(0), + .ngpio = S5P6450_GPIO_G_NR, + .label = "GPG", + }, + }, { + .base = S5P64X0_GPH_BASE + 0x4, + .config = &s5p64x0_gpio_cfgs[1], + .chip = { + .base = S5P6450_GPH(0), + .ngpio = S5P6450_GPIO_H_NR, + .label = "GPH", + }, + }, +}; + +static struct s3c_gpio_chip s5p6450_gpio_rbank_4bit2[] = { + { + .base = S5P64X0_GPR_BASE + 0x4, + .config = &s5p64x0_gpio_cfgs[2], + .chip = { + .base = S5P6450_GPR(0), + .ngpio = S5P6450_GPIO_R_NR, + .label = "GPR", + }, + }, +}; + +static struct s3c_gpio_chip s5p6450_gpio_2bit[] = { + { + .base = S5P64X0_GPF_BASE, + .config = &s5p64x0_gpio_cfgs[5], + .chip = { + .base = S5P6450_GPF(0), + .ngpio = S5P6450_GPIO_F_NR, + .label = "GPF", + }, + }, { + .base = S5P64X0_GPI_BASE, + .config = &s5p64x0_gpio_cfgs[3], + .chip = { + .base = S5P6450_GPI(0), + .ngpio = S5P6450_GPIO_I_NR, + .label = "GPI", + }, + }, { + .base = S5P64X0_GPJ_BASE, + .config = &s5p64x0_gpio_cfgs[3], + .chip = { + .base = S5P6450_GPJ(0), + .ngpio = S5P6450_GPIO_J_NR, + .label = "GPJ", + }, + }, { + .base = S5P64X0_GPN_BASE, + .config = &s5p64x0_gpio_cfgs[4], + .chip = { + .base = S5P6450_GPN(0), + .ngpio = S5P6450_GPIO_N_NR, + .label = "GPN", + }, + }, { + .base = S5P64X0_GPP_BASE, + .config = &s5p64x0_gpio_cfgs[5], + .chip = { + .base = S5P6450_GPP(0), + .ngpio = S5P6450_GPIO_P_NR, + .label = "GPP", + }, + }, { + .base = S5P6450_GPQ_BASE, + .config = &s5p64x0_gpio_cfgs[4], + .chip = { + .base = S5P6450_GPQ(0), + .ngpio = S5P6450_GPIO_Q_NR, + .label = "GPQ", + }, + }, { + .base = S5P6450_GPS_BASE, + .config = &s5p64x0_gpio_cfgs[5], + .chip = { + .base = S5P6450_GPS(0), + .ngpio = S5P6450_GPIO_S_NR, + .label = "GPS", + }, + }, +}; + void __init s5p64x0_gpiolib_set_cfg(struct s3c_gpio_cfg *chipcfg, int nr_chips) { for (; nr_chips > 0; nr_chips--, chipcfg++) { @@ -317,26 +471,41 @@ static void __init s5p64x0_gpio_add_rbank_4bit2(struct s3c_gpio_chip *chip, } } -static int __init s5p6440_gpiolib_init(void) +static int __init s5p64x0_gpiolib_init(void) { - struct s3c_gpio_chip *chips = s5p6440_gpio_2bit; - int nr_chips = ARRAY_SIZE(s5p6440_gpio_2bit); + unsigned int chipid; + + chipid = __raw_readl(S5P64X0_SYS_ID); s5p64x0_gpiolib_set_cfg(s5p64x0_gpio_cfgs, ARRAY_SIZE(s5p64x0_gpio_cfgs)); - for (; nr_chips > 0; nr_chips--, chips++) - s3c_gpiolib_add(chips); + if ((chipid & 0xff000) == 0x50000) { + samsung_gpiolib_add_2bit_chips(s5p6450_gpio_2bit, + ARRAY_SIZE(s5p6450_gpio_2bit)); + + samsung_gpiolib_add_4bit_chips(s5p6450_gpio_4bit, + ARRAY_SIZE(s5p6450_gpio_4bit)); - samsung_gpiolib_add_4bit_chips(s5p6440_gpio_4bit, - ARRAY_SIZE(s5p6440_gpio_4bit)); + samsung_gpiolib_add_4bit2_chips(s5p6450_gpio_4bit2, + ARRAY_SIZE(s5p6450_gpio_4bit2)); - samsung_gpiolib_add_4bit2_chips(s5p6440_gpio_4bit2, - ARRAY_SIZE(s5p6440_gpio_4bit2)); + s5p64x0_gpio_add_rbank_4bit2(s5p6450_gpio_rbank_4bit2, + ARRAY_SIZE(s5p6450_gpio_rbank_4bit2)); + } else { + samsung_gpiolib_add_2bit_chips(s5p6440_gpio_2bit, + ARRAY_SIZE(s5p6440_gpio_2bit)); - s5p64x0_gpio_add_rbank_4bit2(s5p6440_gpio_rbank_4bit2, - ARRAY_SIZE(s5p6440_gpio_rbank_4bit2)); + samsung_gpiolib_add_4bit_chips(s5p6440_gpio_4bit, + ARRAY_SIZE(s5p6440_gpio_4bit)); + + samsung_gpiolib_add_4bit2_chips(s5p6440_gpio_4bit2, + ARRAY_SIZE(s5p6440_gpio_4bit2)); + + s5p64x0_gpio_add_rbank_4bit2(s5p6440_gpio_rbank_4bit2, + ARRAY_SIZE(s5p6440_gpio_rbank_4bit2)); + } return 0; } -arch_initcall(s5p6440_gpiolib_init); +core_initcall(s5p64x0_gpiolib_init); diff --git a/arch/arm/mach-s5p64x0/include/mach/map.h b/arch/arm/mach-s5p64x0/include/mach/map.h index 31e5341..a9365e5 100644 --- a/arch/arm/mach-s5p64x0/include/mach/map.h +++ b/arch/arm/mach-s5p64x0/include/mach/map.h @@ -29,6 +29,9 @@ #define S5P64X0_PA_VIC0 (0xE4000000) #define S5P64X0_PA_VIC1 (0xE4100000) +#define S5P64X0_PA_SROMC (0xE7000000) +#define S5P_PA_SROMC S5P64X0_PA_SROMC + #define S5P64X0_PA_PDMA (0xE9000000) #define S5P64X0_PA_TIMER (0xEA000000) @@ -63,6 +66,8 @@ #define S5P64X0_PA_HSMMC(x) (0xED800000 + ((x) * 0x100000)) #define S5P64X0_PA_I2S (0xF2000000) +#define S5P6450_PA_I2S1 0xF2800000 +#define S5P6450_PA_I2S2 0xF2900000 #define S5P64X0_PA_PCM (0xF2100000) diff --git a/arch/arm/mach-s5p64x0/include/mach/regs-gpio.h b/arch/arm/mach-s5p64x0/include/mach/regs-gpio.h index 85f448e..0953ef6 100644 --- a/arch/arm/mach-s5p64x0/include/mach/regs-gpio.h +++ b/arch/arm/mach-s5p64x0/include/mach/regs-gpio.h @@ -15,48 +15,23 @@ #include <mach/map.h> -/* Will be implemented S5P6442 GPIOlib */ - /* Base addresses for each of the banks */ -#define S5P6440_GPA_BASE (S5P_VA_GPIO + 0x0000) -#define S5P6440_GPB_BASE (S5P_VA_GPIO + 0x0020) -#define S5P6440_GPC_BASE (S5P_VA_GPIO + 0x0040) -#define S5P6440_GPF_BASE (S5P_VA_GPIO + 0x00A0) -#define S5P6440_GPG_BASE (S5P_VA_GPIO + 0x00C0) -#define S5P6440_GPH_BASE (S5P_VA_GPIO + 0x00E0) -#define S5P6440_GPI_BASE (S5P_VA_GPIO + 0x0100) -#define S5P6440_GPJ_BASE (S5P_VA_GPIO + 0x0120) -#define S5P6440_GPN_BASE (S5P_VA_GPIO + 0x0830) -#define S5P6440_GPP_BASE (S5P_VA_GPIO + 0x0160) -#define S5P6440_GPR_BASE (S5P_VA_GPIO + 0x0290) - -#define S5P6440_EINT0CON0 (S5P_VA_GPIO + 0x900) -#define S5P6440_EINT0FLTCON0 (S5P_VA_GPIO + 0x910) -#define S5P6440_EINT0FLTCON1 (S5P_VA_GPIO + 0x914) -#define S5P6440_EINT0MASK (S5P_VA_GPIO + 0x920) -#define S5P6440_EINT0PEND (S5P_VA_GPIO + 0x924) - -/* for LCD */ - -#define S5P6440_SPCON_LCD_SEL_RGB (1 << 0) -#define S5P6440_SPCON_LCD_SEL_MASK (3 << 0) - -/* - * These set of macros are not really useful for the - * GPF/GPI/GPJ/GPN/GPP, useful for others set of GPIO's (4 bit) - */ - -#define S5P6440_GPIO_CONMASK(__gpio) (0xf << ((__gpio) * 4)) -#define S5P6440_GPIO_INPUT(__gpio) (0x0 << ((__gpio) * 4)) -#define S5P6440_GPIO_OUTPUT(__gpio) (0x1 << ((__gpio) * 4)) - -/* - * Use these macros for GPF/GPI/GPJ/GPN/GPP set of GPIO (2 bit) - */ - -#define S5P6440_GPIO2_CONMASK(__gpio) (0x3 << ((__gpio) * 2)) -#define S5P6440_GPIO2_INPUT(__gpio) (0x0 << ((__gpio) * 2)) -#define S5P6440_GPIO2_OUTPUT(__gpio) (0x1 << ((__gpio) * 2)) +#define S5P64X0_GPA_BASE (S5P_VA_GPIO + 0x0000) +#define S5P64X0_GPB_BASE (S5P_VA_GPIO + 0x0020) +#define S5P64X0_GPC_BASE (S5P_VA_GPIO + 0x0040) +#define S5P64X0_GPF_BASE (S5P_VA_GPIO + 0x00A0) +#define S5P64X0_GPG_BASE (S5P_VA_GPIO + 0x00C0) +#define S5P64X0_GPH_BASE (S5P_VA_GPIO + 0x00E0) +#define S5P64X0_GPI_BASE (S5P_VA_GPIO + 0x0100) +#define S5P64X0_GPJ_BASE (S5P_VA_GPIO + 0x0120) +#define S5P64X0_GPN_BASE (S5P_VA_GPIO + 0x0830) +#define S5P64X0_GPP_BASE (S5P_VA_GPIO + 0x0160) +#define S5P64X0_GPR_BASE (S5P_VA_GPIO + 0x0290) + +#define S5P6450_GPD_BASE (S5P_VA_GPIO + 0x0060) +#define S5P6450_GPK_BASE (S5P_VA_GPIO + 0x0140) +#define S5P6450_GPQ_BASE (S5P_VA_GPIO + 0x0180) +#define S5P6450_GPS_BASE (S5P_VA_GPIO + 0x0300) #endif /* __ASM_ARCH_REGS_GPIO_H */ diff --git a/arch/arm/mach-s5p64x0/mach-smdk6440.c b/arch/arm/mach-s5p64x0/mach-smdk6440.c index 87c3f03..e5beb84 100644 --- a/arch/arm/mach-s5p64x0/mach-smdk6440.c +++ b/arch/arm/mach-s5p64x0/mach-smdk6440.c @@ -95,6 +95,7 @@ static struct platform_device *smdk6440_devices[] __initdata = { &s3c_device_i2c1, &s3c_device_ts, &s3c_device_wdt, + &samsung_asoc_dma, &s5p6440_device_iis, }; @@ -117,6 +118,7 @@ static struct s3c2410_platform_i2c s5p6440_i2c1_data __initdata = { static struct i2c_board_info smdk6440_i2c_devs0[] __initdata = { { I2C_BOARD_INFO("24c08", 0x50), }, + { I2C_BOARD_INFO("wm8580", 0x1b), }, }; static struct i2c_board_info smdk6440_i2c_devs1[] __initdata = { diff --git a/arch/arm/mach-s5p64x0/mach-smdk6450.c b/arch/arm/mach-s5p64x0/mach-smdk6450.c index d609f5a..3a20de0 100644 --- a/arch/arm/mach-s5p64x0/mach-smdk6450.c +++ b/arch/arm/mach-s5p64x0/mach-smdk6450.c @@ -113,6 +113,7 @@ static struct platform_device *smdk6450_devices[] __initdata = { &s3c_device_i2c1, &s3c_device_ts, &s3c_device_wdt, + &samsung_asoc_dma, &s5p6450_device_iis0, /* s5p6450_device_spi0 will be added */ }; @@ -135,6 +136,7 @@ static struct s3c2410_platform_i2c s5p6450_i2c1_data __initdata = { }; static struct i2c_board_info smdk6450_i2c_devs0[] __initdata = { + { I2C_BOARD_INFO("wm8580", 0x1b), }, { I2C_BOARD_INFO("24c08", 0x50), }, /* Samsung KS24C080C EEPROM */ }; diff --git a/arch/arm/mach-s5pc100/clock.c b/arch/arm/mach-s5pc100/clock.c index 2d4a761..0305e9b 100644 --- a/arch/arm/mach-s5pc100/clock.c +++ b/arch/arm/mach-s5pc100/clock.c @@ -396,7 +396,7 @@ static int s5pc100_sclk1_ctrl(struct clk *clk, int enable) * recommended to keep the following clocks disabled until the driver requests * for enabling the clock. */ -static struct clk init_clocks_disable[] = { +static struct clk init_clocks_off[] = { { .name = "cssys", .id = -1, @@ -1381,8 +1381,6 @@ static struct clk *clks[] __initdata = { void __init s5pc100_register_clocks(void) { - struct clk *clkp; - int ret; int ptr; s3c24xx_register_clocks(clks, ARRAY_SIZE(clks)); @@ -1393,16 +1391,8 @@ void __init s5pc100_register_clocks(void) s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); - clkp = init_clocks_disable; - for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) { - - ret = s3c24xx_register_clock(clkp); - if (ret < 0) { - printk(KERN_ERR "Failed to register clock %s (%d)\n", - clkp->name, ret); - } - (clkp->enable)(clkp, 0); - } + s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); + s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); s3c_pwmclk_init(); } diff --git a/arch/arm/mach-s5pc100/include/mach/map.h b/arch/arm/mach-s5pc100/include/mach/map.h index 32e9cab..328467b 100644 --- a/arch/arm/mach-s5pc100/include/mach/map.h +++ b/arch/arm/mach-s5pc100/include/mach/map.h @@ -55,6 +55,8 @@ #define S5PC100_VA_VIC_OFFSET 0x10000 #define S5PC1XX_VA_VIC(x) (S5PC100_VA_VIC + ((x) * S5PC100_VA_VIC_OFFSET)) +#define S5PC100_PA_SROMC (0xE7000000) +#define S5P_PA_SROMC S5PC100_PA_SROMC #define S5PC100_PA_ONENAND (0xE7100000) diff --git a/arch/arm/mach-s5pv210/Kconfig b/arch/arm/mach-s5pv210/Kconfig index 862f239..53aabef 100644 --- a/arch/arm/mach-s5pv210/Kconfig +++ b/arch/arm/mach-s5pv210/Kconfig @@ -118,6 +118,7 @@ menu "S5PV210 Machines" config MACH_SMDKV210 bool "SMDKV210" select CPU_S5PV210 + select S3C_DEV_FB select S3C_DEV_HSMMC select S3C_DEV_HSMMC1 select S3C_DEV_HSMMC2 @@ -130,6 +131,7 @@ config MACH_SMDKV210 select SAMSUNG_DEV_IDE select SAMSUNG_DEV_KEYPAD select SAMSUNG_DEV_TS + select S5PV210_SETUP_FB_24BPP select S5PV210_SETUP_I2C1 select S5PV210_SETUP_I2C2 select S5PV210_SETUP_IDE diff --git a/arch/arm/mach-s5pv210/clock.c b/arch/arm/mach-s5pv210/clock.c index b774ff1..2d59949 100644 --- a/arch/arm/mach-s5pv210/clock.c +++ b/arch/arm/mach-s5pv210/clock.c @@ -309,7 +309,7 @@ static struct clk_ops clk_fout_apll_ops = { .get_rate = s5pv210_clk_fout_apll_get_rate, }; -static struct clk init_clocks_disable[] = { +static struct clk init_clocks_off[] = { { .name = "pdma", .id = 0, @@ -525,6 +525,12 @@ static struct clk init_clocks[] = { .parent = &clk_pclk_psys.clk, .enable = s5pv210_clk_ip3_ctrl, .ctrlbit = (1 << 20), + }, { + .name = "sromc", + .id = -1, + .parent = &clk_hclk_psys.clk, + .enable = s5pv210_clk_ip1_ctrl, + .ctrlbit = (1 << 26), }, }; @@ -1220,13 +1226,9 @@ static struct clk *clks[] __initdata = { void __init s5pv210_register_clocks(void) { - struct clk *clkp; - int ret; int ptr; - ret = s3c24xx_register_clocks(clks, ARRAY_SIZE(clks)); - if (ret > 0) - printk(KERN_ERR "Failed to register %u clocks\n", ret); + s3c24xx_register_clocks(clks, ARRAY_SIZE(clks)); for (ptr = 0; ptr < ARRAY_SIZE(sysclks); ptr++) s3c_register_clksrc(sysclks[ptr], 1); @@ -1234,15 +1236,8 @@ void __init s5pv210_register_clocks(void) s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); - clkp = init_clocks_disable; - for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) { - ret = s3c24xx_register_clock(clkp); - if (ret < 0) { - printk(KERN_ERR "Failed to register clock %s (%d)\n", - clkp->name, ret); - } - (clkp->enable)(clkp, 0); - } + s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); + s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); s3c_pwmclk_init(); } diff --git a/arch/arm/mach-s5pv210/cpu.c b/arch/arm/mach-s5pv210/cpu.c index 8eb480e..61e6c24 100644 --- a/arch/arm/mach-s5pv210/cpu.c +++ b/arch/arm/mach-s5pv210/cpu.c @@ -81,11 +81,6 @@ static struct map_desc s5pv210_iodesc[] __initdata = { .length = SZ_512K, .type = MT_DEVICE, }, { - .virtual = (unsigned long)S5P_VA_SROMC, - .pfn = __phys_to_pfn(S5PV210_PA_SROMC), - .length = SZ_4K, - .type = MT_DEVICE, - }, { .virtual = (unsigned long)S5P_VA_DMC0, .pfn = __phys_to_pfn(S5PV210_PA_DMC0), .length = SZ_4K, diff --git a/arch/arm/mach-s5pv210/include/mach/irqs.h b/arch/arm/mach-s5pv210/include/mach/irqs.h index 119b95f..26710b3 100644 --- a/arch/arm/mach-s5pv210/include/mach/irqs.h +++ b/arch/arm/mach-s5pv210/include/mach/irqs.h @@ -65,7 +65,7 @@ #define IRQ_HSMMC0 S5P_IRQ_VIC1(26) #define IRQ_HSMMC1 S5P_IRQ_VIC1(27) #define IRQ_HSMMC2 S5P_IRQ_VIC1(28) -#define IRQ_MIPICSI S5P_IRQ_VIC1(29) +#define IRQ_MIPI_CSIS S5P_IRQ_VIC1(29) #define IRQ_MIPIDSI S5P_IRQ_VIC1(30) #define IRQ_ONENAND_AUDI S5P_IRQ_VIC1(31) @@ -132,5 +132,6 @@ #define IRQ_LCD_FIFO IRQ_LCD0 #define IRQ_LCD_VSYNC IRQ_LCD1 #define IRQ_LCD_SYSTEM IRQ_LCD2 +#define IRQ_MIPI_CSIS0 IRQ_MIPI_CSIS #endif /* ASM_ARCH_IRQS_H */ diff --git a/arch/arm/mach-s5pv210/include/mach/map.h b/arch/arm/mach-s5pv210/include/mach/map.h index 861d7fe..3611492 100644 --- a/arch/arm/mach-s5pv210/include/mach/map.h +++ b/arch/arm/mach-s5pv210/include/mach/map.h @@ -16,6 +16,8 @@ #include <plat/map-base.h> #include <plat/map-s5p.h> +#define S5PV210_PA_SROM_BANK5 (0xA8000000) + #define S5PC110_PA_ONENAND (0xB0000000) #define S5P_PA_ONENAND S5PC110_PA_ONENAND @@ -60,6 +62,7 @@ #define S3C_VA_UARTx(x) (S3C_VA_UART + ((x) * S3C_UART_OFFSET)) #define S5PV210_PA_SROMC (0xE8000000) +#define S5P_PA_SROMC S5PV210_PA_SROMC #define S5PV210_PA_CFCON (0xE8200000) @@ -107,6 +110,8 @@ #define S5PV210_PA_DMC0 (0xF0000000) #define S5PV210_PA_DMC1 (0xF1400000) +#define S5PV210_PA_MIPI_CSIS 0xFA600000 + /* compatibiltiy defines. */ #define S3C_PA_UART S5PV210_PA_UART #define S3C_PA_HSMMC0 S5PV210_PA_HSMMC(0) @@ -123,6 +128,7 @@ #define S5P_PA_FIMC0 S5PV210_PA_FIMC0 #define S5P_PA_FIMC1 S5PV210_PA_FIMC1 #define S5P_PA_FIMC2 S5PV210_PA_FIMC2 +#define S5P_PA_MIPI_CSIS0 S5PV210_PA_MIPI_CSIS #define SAMSUNG_PA_ADC S5PV210_PA_ADC #define SAMSUNG_PA_CFCON S5PV210_PA_CFCON diff --git a/arch/arm/mach-s5pv210/include/mach/regs-clock.h b/arch/arm/mach-s5pv210/include/mach/regs-clock.h index ebaabe0..4c45b74 100644 --- a/arch/arm/mach-s5pv210/include/mach/regs-clock.h +++ b/arch/arm/mach-s5pv210/include/mach/regs-clock.h @@ -161,7 +161,7 @@ #define S5P_MDNIE_SEL S5P_CLKREG(0x7008) #define S5P_MIPI_PHY_CON0 S5P_CLKREG(0x7200) #define S5P_MIPI_PHY_CON1 S5P_CLKREG(0x7204) -#define S5P_MIPI_CONTROL S5P_CLKREG(0xE814) +#define S5P_MIPI_DPHY_CONTROL S5P_CLKREG(0xE814) #define S5P_IDLE_CFG_TL_MASK (3 << 30) #define S5P_IDLE_CFG_TM_MASK (3 << 28) @@ -195,9 +195,6 @@ #define S5P_OTHERS_RET_UART (1 << 28) #define S5P_OTHERS_USB_SIG_MASK (1 << 16) -/* MIPI */ -#define S5P_MIPI_DPHY_EN (3) - /* S5P_DAC_CONTROL */ #define S5P_DAC_ENABLE (1) #define S5P_DAC_DISABLE (0) diff --git a/arch/arm/mach-s5pv210/mach-smdkc110.c b/arch/arm/mach-s5pv210/mach-smdkc110.c index 5dd1681..ce11a02 100644 --- a/arch/arm/mach-s5pv210/mach-smdkc110.c +++ b/arch/arm/mach-s5pv210/mach-smdkc110.c @@ -81,6 +81,7 @@ static struct s3c_ide_platdata smdkc110_ide_pdata __initdata = { }; static struct platform_device *smdkc110_devices[] __initdata = { + &samsung_asoc_dma, &s5pv210_device_iis0, &s5pv210_device_ac97, &s5pv210_device_spdif, @@ -94,6 +95,7 @@ static struct platform_device *smdkc110_devices[] __initdata = { static struct i2c_board_info smdkc110_i2c_devs0[] __initdata = { { I2C_BOARD_INFO("24c08", 0x50), }, /* Samsung S524AD0XD1 */ + { I2C_BOARD_INFO("wm8580", 0x1b), }, }; static struct i2c_board_info smdkc110_i2c_devs1[] __initdata = { diff --git a/arch/arm/mach-s5pv210/mach-smdkv210.c b/arch/arm/mach-s5pv210/mach-smdkv210.c index 1fbc45b..bc9fdb5 100644 --- a/arch/arm/mach-s5pv210/mach-smdkv210.c +++ b/arch/arm/mach-s5pv210/mach-smdkv210.c @@ -14,16 +14,25 @@ #include <linux/init.h> #include <linux/serial_core.h> #include <linux/sysdev.h> +#include <linux/dm9000.h> +#include <linux/fb.h> +#include <linux/gpio.h> +#include <linux/delay.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> #include <asm/setup.h> #include <asm/mach-types.h> +#include <video/platform_lcd.h> + #include <mach/map.h> #include <mach/regs-clock.h> +#include <mach/regs-fb.h> #include <plat/regs-serial.h> +#include <plat/regs-srom.h> +#include <plat/gpio-cfg.h> #include <plat/s5pv210.h> #include <plat/devs.h> #include <plat/cpu.h> @@ -33,6 +42,7 @@ #include <plat/iic.h> #include <plat/keypad.h> #include <plat/pm.h> +#include <plat/fb.h> /* Following are default values for UCON, ULCON and UFCON UART registers */ #define SMDKV210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ @@ -102,12 +112,106 @@ static struct samsung_keypad_platdata smdkv210_keypad_data __initdata = { .cols = 8, }; +static struct resource smdkv210_dm9000_resources[] = { + [0] = { + .start = S5PV210_PA_SROM_BANK5, + .end = S5PV210_PA_SROM_BANK5, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = S5PV210_PA_SROM_BANK5 + 2, + .end = S5PV210_PA_SROM_BANK5 + 2, + .flags = IORESOURCE_MEM, + }, + [2] = { + .start = IRQ_EINT(9), + .end = IRQ_EINT(9), + .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, + }, +}; + +static struct dm9000_plat_data smdkv210_dm9000_platdata = { + .flags = DM9000_PLATF_16BITONLY | DM9000_PLATF_NO_EEPROM, + .dev_addr = { 0x00, 0x09, 0xc0, 0xff, 0xec, 0x48 }, +}; + +struct platform_device smdkv210_dm9000 = { + .name = "dm9000", + .id = -1, + .num_resources = ARRAY_SIZE(smdkv210_dm9000_resources), + .resource = smdkv210_dm9000_resources, + .dev = { + .platform_data = &smdkv210_dm9000_platdata, + }, +}; + +static void smdkv210_lte480wv_set_power(struct plat_lcd_data *pd, + unsigned int power) +{ + if (power) { +#if !defined(CONFIG_BACKLIGHT_PWM) + gpio_request(S5PV210_GPD0(3), "GPD0"); + gpio_direction_output(S5PV210_GPD0(3), 1); + gpio_free(S5PV210_GPD0(3)); +#endif + + /* fire nRESET on power up */ + gpio_request(S5PV210_GPH0(6), "GPH0"); + + gpio_direction_output(S5PV210_GPH0(6), 1); + + gpio_set_value(S5PV210_GPH0(6), 0); + mdelay(10); + + gpio_set_value(S5PV210_GPH0(6), 1); + mdelay(10); + + gpio_free(S5PV210_GPH0(6)); + } else { +#if !defined(CONFIG_BACKLIGHT_PWM) + gpio_request(S5PV210_GPD0(3), "GPD0"); + gpio_direction_output(S5PV210_GPD0(3), 0); + gpio_free(S5PV210_GPD0(3)); +#endif + } +} + +static struct plat_lcd_data smdkv210_lcd_lte480wv_data = { + .set_power = smdkv210_lte480wv_set_power, +}; + +static struct platform_device smdkv210_lcd_lte480wv = { + .name = "platform-lcd", + .dev.parent = &s3c_device_fb.dev, + .dev.platform_data = &smdkv210_lcd_lte480wv_data, +}; + +static struct s3c_fb_pd_win smdkv210_fb_win0 = { + .win_mode = { + .left_margin = 13, + .right_margin = 8, + .upper_margin = 7, + .lower_margin = 5, + .hsync_len = 3, + .vsync_len = 1, + .xres = 800, + .yres = 480, + }, + .max_bpp = 32, + .default_bpp = 24, +}; + +static struct s3c_fb_platdata smdkv210_lcd0_pdata __initdata = { + .win[0] = &smdkv210_fb_win0, + .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB, + .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC, + .setup_gpio = s5pv210_fb_gpio_setup_24bpp, +}; + static struct platform_device *smdkv210_devices[] __initdata = { - &s5pv210_device_iis0, - &s5pv210_device_ac97, - &s5pv210_device_spdif, &s3c_device_adc, &s3c_device_cfcon, + &s3c_device_fb, &s3c_device_hsmmc0, &s3c_device_hsmmc1, &s3c_device_hsmmc2, @@ -115,14 +219,38 @@ static struct platform_device *smdkv210_devices[] __initdata = { &s3c_device_i2c0, &s3c_device_i2c1, &s3c_device_i2c2, - &samsung_device_keypad, &s3c_device_rtc, &s3c_device_ts, &s3c_device_wdt, + &s5pv210_device_ac97, + &s5pv210_device_iis0, + &s5pv210_device_spdif, + &samsung_asoc_dma, + &samsung_device_keypad, + &smdkv210_dm9000, + &smdkv210_lcd_lte480wv, }; +static void __init smdkv210_dm9000_init(void) +{ + unsigned int tmp; + + gpio_request(S5PV210_MP01(5), "nCS5"); + s3c_gpio_cfgpin(S5PV210_MP01(5), S3C_GPIO_SFN(2)); + gpio_free(S5PV210_MP01(5)); + + tmp = (5 << S5P_SROM_BCX__TACC__SHIFT); + __raw_writel(tmp, S5P_SROM_BC5); + + tmp = __raw_readl(S5P_SROM_BW); + tmp &= (S5P_SROM_BW__CS_MASK << S5P_SROM_BW__NCS5__SHIFT); + tmp |= (1 << S5P_SROM_BW__NCS5__SHIFT); + __raw_writel(tmp, S5P_SROM_BW); +} + static struct i2c_board_info smdkv210_i2c_devs0[] __initdata = { { I2C_BOARD_INFO("24c08", 0x50), }, /* Samsung S524AD0XD1 */ + { I2C_BOARD_INFO("wm8580", 0x1b), }, }; static struct i2c_board_info smdkv210_i2c_devs1[] __initdata = { @@ -150,6 +278,8 @@ static void __init smdkv210_machine_init(void) { s3c_pm_init(); + smdkv210_dm9000_init(); + samsung_keypad_set_platdata(&smdkv210_keypad_data); s3c24xx_ts_set_platdata(&s3c_ts_platform); @@ -165,6 +295,8 @@ static void __init smdkv210_machine_init(void) s3c_ide_set_platdata(&smdkv210_ide_pdata); + s3c_fb_set_platdata(&smdkv210_lcd0_pdata); + platform_add_devices(smdkv210_devices, ARRAY_SIZE(smdkv210_devices)); } diff --git a/arch/arm/mach-s5pv310/Kconfig b/arch/arm/mach-s5pv310/Kconfig index d64efe0..09c4c21 100644 --- a/arch/arm/mach-s5pv310/Kconfig +++ b/arch/arm/mach-s5pv310/Kconfig @@ -15,6 +15,11 @@ config CPU_S5PV310 help Enable S5PV310 CPU support +config S5PV310_DEV_PD + bool + help + Compile in platform device definitions for Power Domain + config S5PV310_SETUP_I2C1 bool help @@ -61,6 +66,11 @@ config S5PV310_SETUP_SDHCI_GPIO help Common setup code for SDHCI gpio. +config S5PV310_DEV_SYSMMU + bool + help + Common setup code for SYSTEM MMU in S5PV310 + # machine support menu "S5PC210 Machines" @@ -70,11 +80,15 @@ config MACH_SMDKC210 select CPU_S5PV310 select S3C_DEV_RTC select S3C_DEV_WDT + select S3C_DEV_I2C1 select S3C_DEV_HSMMC select S3C_DEV_HSMMC1 select S3C_DEV_HSMMC2 select S3C_DEV_HSMMC3 + select S5PV310_DEV_PD + select S5PV310_SETUP_I2C1 select S5PV310_SETUP_SDHCI + select S5PV310_DEV_SYSMMU help Machine support for Samsung SMDKC210 S5PC210(MCP) is one of package option of S5PV310 @@ -83,6 +97,10 @@ config MACH_UNIVERSAL_C210 bool "Mobile UNIVERSAL_C210 Board" select CPU_S5PV310 select S5P_DEV_ONENAND + select S3C_DEV_HSMMC + select S3C_DEV_HSMMC2 + select S3C_DEV_HSMMC3 + select S5PV310_SETUP_SDHCI select S3C_DEV_I2C1 select S5PV310_SETUP_I2C1 help @@ -98,10 +116,13 @@ config MACH_SMDKV310 select CPU_S5PV310 select S3C_DEV_RTC select S3C_DEV_WDT + select S3C_DEV_I2C1 select S3C_DEV_HSMMC select S3C_DEV_HSMMC1 select S3C_DEV_HSMMC2 select S3C_DEV_HSMMC3 + select S5PV310_DEV_PD + select S5PV310_SETUP_I2C1 select S5PV310_SETUP_SDHCI help Machine support for Samsung SMDKV310 diff --git a/arch/arm/mach-s5pv310/Makefile b/arch/arm/mach-s5pv310/Makefile index 61e3cb6..036fb38 100644 --- a/arch/arm/mach-s5pv310/Makefile +++ b/arch/arm/mach-s5pv310/Makefile @@ -14,6 +14,7 @@ obj- := obj-$(CONFIG_CPU_S5PV310) += cpu.o init.o clock.o irq-combiner.o obj-$(CONFIG_CPU_S5PV310) += setup-i2c0.o time.o gpiolib.o irq-eint.o dma.o +obj-$(CONFIG_CPU_FREQ) += cpufreq.o obj-$(CONFIG_SMP) += platsmp.o headsmp.o obj-$(CONFIG_LOCAL_TIMERS) += localtimer.o @@ -27,7 +28,10 @@ obj-$(CONFIG_MACH_UNIVERSAL_C210) += mach-universal_c210.o # device support -obj-y += dev-audio.o +obj-y += dev-audio.o +obj-$(CONFIG_S5PV310_DEV_PD) += dev-pd.o +obj-$(CONFIG_S5PV310_DEV_SYSMMU) += dev-sysmmu.o + obj-$(CONFIG_S5PV310_SETUP_I2C1) += setup-i2c1.o obj-$(CONFIG_S5PV310_SETUP_I2C2) += setup-i2c2.o obj-$(CONFIG_S5PV310_SETUP_I2C3) += setup-i2c3.o diff --git a/arch/arm/mach-s5pv310/clock.c b/arch/arm/mach-s5pv310/clock.c index 58c9d33..fc7c2f8 100644 --- a/arch/arm/mach-s5pv310/clock.c +++ b/arch/arm/mach-s5pv310/clock.c @@ -244,7 +244,7 @@ static struct clksrc_clk clk_mout_corebus = { .id = -1, }, .sources = &clkset_mout_corebus, - .reg_src = { .reg = S5P_CLKSRC_CORE, .shift = 4, .size = 1 }, + .reg_src = { .reg = S5P_CLKSRC_DMC, .shift = 4, .size = 1 }, }; static struct clksrc_clk clk_sclk_dmc = { @@ -253,7 +253,7 @@ static struct clksrc_clk clk_sclk_dmc = { .id = -1, .parent = &clk_mout_corebus.clk, }, - .reg_div = { .reg = S5P_CLKDIV_CORE0, .shift = 12, .size = 3 }, + .reg_div = { .reg = S5P_CLKDIV_DMC0, .shift = 12, .size = 3 }, }; static struct clksrc_clk clk_aclk_cored = { @@ -262,7 +262,7 @@ static struct clksrc_clk clk_aclk_cored = { .id = -1, .parent = &clk_sclk_dmc.clk, }, - .reg_div = { .reg = S5P_CLKDIV_CORE0, .shift = 16, .size = 3 }, + .reg_div = { .reg = S5P_CLKDIV_DMC0, .shift = 16, .size = 3 }, }; static struct clksrc_clk clk_aclk_corep = { @@ -271,7 +271,7 @@ static struct clksrc_clk clk_aclk_corep = { .id = -1, .parent = &clk_aclk_cored.clk, }, - .reg_div = { .reg = S5P_CLKDIV_CORE0, .shift = 20, .size = 3 }, + .reg_div = { .reg = S5P_CLKDIV_DMC0, .shift = 20, .size = 3 }, }; static struct clksrc_clk clk_aclk_acp = { @@ -280,7 +280,7 @@ static struct clksrc_clk clk_aclk_acp = { .id = -1, .parent = &clk_mout_corebus.clk, }, - .reg_div = { .reg = S5P_CLKDIV_CORE0, .shift = 0, .size = 3 }, + .reg_div = { .reg = S5P_CLKDIV_DMC0, .shift = 0, .size = 3 }, }; static struct clksrc_clk clk_pclk_acp = { @@ -289,7 +289,7 @@ static struct clksrc_clk clk_pclk_acp = { .id = -1, .parent = &clk_aclk_acp.clk, }, - .reg_div = { .reg = S5P_CLKDIV_CORE0, .shift = 4, .size = 3 }, + .reg_div = { .reg = S5P_CLKDIV_DMC0, .shift = 4, .size = 3 }, }; /* Core list of CMU_TOP side */ @@ -384,7 +384,7 @@ static struct clksrc_clk clk_sclk_vpll = { .reg_src = { .reg = S5P_CLKSRC_TOP0, .shift = 8, .size = 1 }, }; -static struct clk init_clocks_disable[] = { +static struct clk init_clocks_off[] = { { .name = "timers", .id = -1, @@ -467,6 +467,16 @@ static struct clk init_clocks_disable[] = { .enable = s5pv310_clk_ip_fsys_ctrl, .ctrlbit = (1 << 10), }, { + .name = "pdma", + .id = 0, + .enable = s5pv310_clk_ip_fsys_ctrl, + .ctrlbit = (1 << 0), + }, { + .name = "pdma", + .id = 1, + .enable = s5pv310_clk_ip_fsys_ctrl, + .ctrlbit = (1 << 1), + }, { .name = "adc", .id = -1, .enable = s5pv310_clk_ip_peril_ctrl, @@ -507,6 +517,26 @@ static struct clk init_clocks_disable[] = { .enable = s5pv310_clk_ip_peril_ctrl, .ctrlbit = (1 << 18), }, { + .name = "iis", + .id = 0, + .enable = s5pv310_clk_ip_peril_ctrl, + .ctrlbit = (1 << 19), + }, { + .name = "iis", + .id = 1, + .enable = s5pv310_clk_ip_peril_ctrl, + .ctrlbit = (1 << 20), + }, { + .name = "iis", + .id = 2, + .enable = s5pv310_clk_ip_peril_ctrl, + .ctrlbit = (1 << 21), + }, { + .name = "ac97", + .id = -1, + .enable = s5pv310_clk_ip_peril_ctrl, + .ctrlbit = (1 << 27), + }, { .name = "fimg2d", .id = -1, .enable = s5pv310_clk_ip_image_ctrl, @@ -990,6 +1020,17 @@ static struct clksrc_clk *sysclks[] = { &clk_dout_mmc4, }; +static int xtal_rate; + +static unsigned long s5pv310_fout_apll_get_rate(struct clk *clk) +{ + return s5p_get_pll45xx(xtal_rate, __raw_readl(S5P_APLL_CON0), pll_4508); +} + +static struct clk_ops s5pv310_fout_apll_ops = { + .get_rate = s5pv310_fout_apll_get_rate, +}; + void __init_or_cpufreq s5pv310_setup_clocks(void) { struct clk *xtal_clk; @@ -1013,6 +1054,9 @@ void __init_or_cpufreq s5pv310_setup_clocks(void) BUG_ON(IS_ERR(xtal_clk)); xtal = clk_get_rate(xtal_clk); + + xtal_rate = xtal; + clk_put(xtal_clk); printk(KERN_DEBUG "%s: xtal is %ld\n", __func__, xtal); @@ -1026,7 +1070,7 @@ void __init_or_cpufreq s5pv310_setup_clocks(void) vpll = s5p_get_pll46xx(vpllsrc, __raw_readl(S5P_VPLL_CON0), __raw_readl(S5P_VPLL_CON1), pll_4650); - clk_fout_apll.rate = apll; + clk_fout_apll.ops = &s5pv310_fout_apll_ops; clk_fout_mpll.rate = mpll; clk_fout_epll.rate = epll; clk_fout_vpll.rate = vpll; @@ -1061,13 +1105,9 @@ static struct clk *clks[] __initdata = { void __init s5pv310_register_clocks(void) { - struct clk *clkp; - int ret; int ptr; - ret = s3c24xx_register_clocks(clks, ARRAY_SIZE(clks)); - if (ret > 0) - printk(KERN_ERR "Failed to register %u clocks\n", ret); + s3c24xx_register_clocks(clks, ARRAY_SIZE(clks)); for (ptr = 0; ptr < ARRAY_SIZE(sysclks); ptr++) s3c_register_clksrc(sysclks[ptr], 1); @@ -1075,15 +1115,8 @@ void __init s5pv310_register_clocks(void) s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); - clkp = init_clocks_disable; - for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) { - ret = s3c24xx_register_clock(clkp); - if (ret < 0) { - printk(KERN_ERR "Failed to register clock %s (%d)\n", - clkp->name, ret); - } - (clkp->enable)(clkp, 0); - } + s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); + s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); s3c_pwmclk_init(); } diff --git a/arch/arm/mach-s5pv310/cpu.c b/arch/arm/mach-s5pv310/cpu.c index 72ab289..0db0fb6 100644 --- a/arch/arm/mach-s5pv310/cpu.c +++ b/arch/arm/mach-s5pv310/cpu.c @@ -41,6 +41,11 @@ static struct map_desc s5pv310_iodesc[] __initdata = { .length = SZ_128K, .type = MT_DEVICE, }, { + .virtual = (unsigned long)S5P_VA_PMU, + .pfn = __phys_to_pfn(S5PV310_PA_PMU), + .length = SZ_64K, + .type = MT_DEVICE, + }, { .virtual = (unsigned long)S5P_VA_COMBINER_BASE, .pfn = __phys_to_pfn(S5PV310_PA_COMBINER), .length = SZ_4K, @@ -71,6 +76,11 @@ static struct map_desc s5pv310_iodesc[] __initdata = { .length = SZ_256, .type = MT_DEVICE, }, { + .virtual = (unsigned long)S5P_VA_DMC0, + .pfn = __phys_to_pfn(S5PV310_PA_DMC0), + .length = SZ_4K, + .type = MT_DEVICE, + }, { .virtual = (unsigned long)S3C_VA_UART, .pfn = __phys_to_pfn(S3C_PA_UART), .length = SZ_512K, @@ -123,6 +133,15 @@ void __init s5pv310_init_irq(void) gic_init(0, IRQ_LOCALTIMER, S5P_VA_GIC_DIST, S5P_VA_GIC_CPU); for (irq = 0; irq < MAX_COMBINER_NR; irq++) { + + /* + * From SPI(0) to SPI(39) and SPI(51), SPI(53) are + * connected to the interrupt combiner. These irqs + * should be initialized to support cascade interrupt. + */ + if ((irq >= 40) && !(irq == 51) && !(irq == 53)) + continue; + combiner_init(irq, (void __iomem *)S5P_VA_COMBINER(irq), COMBINER_IRQ(irq, 0)); combiner_cascade_irq(irq, IRQ_SPI(irq)); @@ -164,7 +183,7 @@ static int __init s5pv310_l2x0_cache_init(void) __raw_writel(L2X0_DYNAMIC_CLK_GATING_EN | L2X0_STNDBY_MODE_EN, S5P_VA_L2CC + L2X0_POWER_CTRL); - l2x0_init(S5P_VA_L2CC, 0x7C070001, 0xC200ffff); + l2x0_init(S5P_VA_L2CC, 0x7C470001, 0xC200ffff); return 0; } diff --git a/arch/arm/mach-s5pv310/cpufreq.c b/arch/arm/mach-s5pv310/cpufreq.c new file mode 100644 index 0000000..b04cbc7 --- /dev/null +++ b/arch/arm/mach-s5pv310/cpufreq.c @@ -0,0 +1,580 @@ +/* linux/arch/arm/mach-s5pv310/cpufreq.c + * + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * S5PV310 - CPU frequency scaling support + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#include <linux/types.h> +#include <linux/kernel.h> +#include <linux/err.h> +#include <linux/clk.h> +#include <linux/io.h> +#include <linux/slab.h> +#include <linux/regulator/consumer.h> +#include <linux/cpufreq.h> + +#include <mach/map.h> +#include <mach/regs-clock.h> +#include <mach/regs-mem.h> + +#include <plat/clock.h> +#include <plat/pm.h> + +static struct clk *cpu_clk; +static struct clk *moutcore; +static struct clk *mout_mpll; +static struct clk *mout_apll; + +#ifdef CONFIG_REGULATOR +static struct regulator *arm_regulator; +static struct regulator *int_regulator; +#endif + +static struct cpufreq_freqs freqs; +static unsigned int memtype; + +enum s5pv310_memory_type { + DDR2 = 4, + LPDDR2, + DDR3, +}; + +enum cpufreq_level_index { + L0, L1, L2, L3, CPUFREQ_LEVEL_END, +}; + +static struct cpufreq_frequency_table s5pv310_freq_table[] = { + {L0, 1000*1000}, + {L1, 800*1000}, + {L2, 400*1000}, + {L3, 100*1000}, + {0, CPUFREQ_TABLE_END}, +}; + +static unsigned int clkdiv_cpu0[CPUFREQ_LEVEL_END][7] = { + /* + * Clock divider value for following + * { DIVCORE, DIVCOREM0, DIVCOREM1, DIVPERIPH, + * DIVATB, DIVPCLK_DBG, DIVAPLL } + */ + + /* ARM L0: 1000MHz */ + { 0, 3, 7, 3, 3, 0, 1 }, + + /* ARM L1: 800MHz */ + { 0, 3, 7, 3, 3, 0, 1 }, + + /* ARM L2: 400MHz */ + { 0, 1, 3, 1, 3, 0, 1 }, + + /* ARM L3: 100MHz */ + { 0, 0, 1, 0, 3, 1, 1 }, +}; + +static unsigned int clkdiv_cpu1[CPUFREQ_LEVEL_END][2] = { + /* + * Clock divider value for following + * { DIVCOPY, DIVHPM } + */ + + /* ARM L0: 1000MHz */ + { 3, 0 }, + + /* ARM L1: 800MHz */ + { 3, 0 }, + + /* ARM L2: 400MHz */ + { 3, 0 }, + + /* ARM L3: 100MHz */ + { 3, 0 }, +}; + +static unsigned int clkdiv_dmc0[CPUFREQ_LEVEL_END][8] = { + /* + * Clock divider value for following + * { DIVACP, DIVACP_PCLK, DIVDPHY, DIVDMC, DIVDMCD + * DIVDMCP, DIVCOPY2, DIVCORE_TIMERS } + */ + + /* DMC L0: 400MHz */ + { 3, 1, 1, 1, 1, 1, 3, 1 }, + + /* DMC L1: 400MHz */ + { 3, 1, 1, 1, 1, 1, 3, 1 }, + + /* DMC L2: 266.7MHz */ + { 7, 1, 1, 2, 1, 1, 3, 1 }, + + /* DMC L3: 200MHz */ + { 7, 1, 1, 3, 1, 1, 3, 1 }, +}; + +static unsigned int clkdiv_top[CPUFREQ_LEVEL_END][5] = { + /* + * Clock divider value for following + * { DIVACLK200, DIVACLK100, DIVACLK160, DIVACLK133, DIVONENAND } + */ + + /* ACLK200 L0: 200MHz */ + { 3, 7, 4, 5, 1 }, + + /* ACLK200 L1: 200MHz */ + { 3, 7, 4, 5, 1 }, + + /* ACLK200 L2: 160MHz */ + { 4, 7, 5, 7, 1 }, + + /* ACLK200 L3: 133.3MHz */ + { 5, 7, 7, 7, 1 }, +}; + +static unsigned int clkdiv_lr_bus[CPUFREQ_LEVEL_END][2] = { + /* + * Clock divider value for following + * { DIVGDL/R, DIVGPL/R } + */ + + /* ACLK_GDL/R L0: 200MHz */ + { 3, 1 }, + + /* ACLK_GDL/R L1: 200MHz */ + { 3, 1 }, + + /* ACLK_GDL/R L2: 160MHz */ + { 4, 1 }, + + /* ACLK_GDL/R L3: 133.3MHz */ + { 5, 1 }, +}; + +struct cpufreq_voltage_table { + unsigned int index; /* any */ + unsigned int arm_volt; /* uV */ + unsigned int int_volt; +}; + +static struct cpufreq_voltage_table s5pv310_volt_table[CPUFREQ_LEVEL_END] = { + { + .index = L0, + .arm_volt = 1200000, + .int_volt = 1100000, + }, { + .index = L1, + .arm_volt = 1100000, + .int_volt = 1100000, + }, { + .index = L2, + .arm_volt = 1000000, + .int_volt = 1000000, + }, { + .index = L3, + .arm_volt = 900000, + .int_volt = 1000000, + }, +}; + +static unsigned int s5pv310_apll_pms_table[CPUFREQ_LEVEL_END] = { + /* APLL FOUT L0: 1000MHz */ + ((250 << 16) | (6 << 8) | 1), + + /* APLL FOUT L1: 800MHz */ + ((200 << 16) | (6 << 8) | 1), + + /* APLL FOUT L2 : 400MHz */ + ((200 << 16) | (6 << 8) | 2), + + /* APLL FOUT L3: 100MHz */ + ((200 << 16) | (6 << 8) | 4), +}; + +int s5pv310_verify_speed(struct cpufreq_policy *policy) +{ + return cpufreq_frequency_table_verify(policy, s5pv310_freq_table); +} + +unsigned int s5pv310_getspeed(unsigned int cpu) +{ + return clk_get_rate(cpu_clk) / 1000; +} + +void s5pv310_set_clkdiv(unsigned int div_index) +{ + unsigned int tmp; + + /* Change Divider - CPU0 */ + + tmp = __raw_readl(S5P_CLKDIV_CPU); + + tmp &= ~(S5P_CLKDIV_CPU0_CORE_MASK | S5P_CLKDIV_CPU0_COREM0_MASK | + S5P_CLKDIV_CPU0_COREM1_MASK | S5P_CLKDIV_CPU0_PERIPH_MASK | + S5P_CLKDIV_CPU0_ATB_MASK | S5P_CLKDIV_CPU0_PCLKDBG_MASK | + S5P_CLKDIV_CPU0_APLL_MASK); + + tmp |= ((clkdiv_cpu0[div_index][0] << S5P_CLKDIV_CPU0_CORE_SHIFT) | + (clkdiv_cpu0[div_index][1] << S5P_CLKDIV_CPU0_COREM0_SHIFT) | + (clkdiv_cpu0[div_index][2] << S5P_CLKDIV_CPU0_COREM1_SHIFT) | + (clkdiv_cpu0[div_index][3] << S5P_CLKDIV_CPU0_PERIPH_SHIFT) | + (clkdiv_cpu0[div_index][4] << S5P_CLKDIV_CPU0_ATB_SHIFT) | + (clkdiv_cpu0[div_index][5] << S5P_CLKDIV_CPU0_PCLKDBG_SHIFT) | + (clkdiv_cpu0[div_index][6] << S5P_CLKDIV_CPU0_APLL_SHIFT)); + + __raw_writel(tmp, S5P_CLKDIV_CPU); + + do { + tmp = __raw_readl(S5P_CLKDIV_STATCPU); + } while (tmp & 0x1111111); + + /* Change Divider - CPU1 */ + + tmp = __raw_readl(S5P_CLKDIV_CPU1); + + tmp &= ~((0x7 << 4) | 0x7); + + tmp |= ((clkdiv_cpu1[div_index][0] << 4) | + (clkdiv_cpu1[div_index][1] << 0)); + + __raw_writel(tmp, S5P_CLKDIV_CPU1); + + do { + tmp = __raw_readl(S5P_CLKDIV_STATCPU1); + } while (tmp & 0x11); + + /* Change Divider - DMC0 */ + + tmp = __raw_readl(S5P_CLKDIV_DMC0); + + tmp &= ~(S5P_CLKDIV_DMC0_ACP_MASK | S5P_CLKDIV_DMC0_ACPPCLK_MASK | + S5P_CLKDIV_DMC0_DPHY_MASK | S5P_CLKDIV_DMC0_DMC_MASK | + S5P_CLKDIV_DMC0_DMCD_MASK | S5P_CLKDIV_DMC0_DMCP_MASK | + S5P_CLKDIV_DMC0_COPY2_MASK | S5P_CLKDIV_DMC0_CORETI_MASK); + + tmp |= ((clkdiv_dmc0[div_index][0] << S5P_CLKDIV_DMC0_ACP_SHIFT) | + (clkdiv_dmc0[div_index][1] << S5P_CLKDIV_DMC0_ACPPCLK_SHIFT) | + (clkdiv_dmc0[div_index][2] << S5P_CLKDIV_DMC0_DPHY_SHIFT) | + (clkdiv_dmc0[div_index][3] << S5P_CLKDIV_DMC0_DMC_SHIFT) | + (clkdiv_dmc0[div_index][4] << S5P_CLKDIV_DMC0_DMCD_SHIFT) | + (clkdiv_dmc0[div_index][5] << S5P_CLKDIV_DMC0_DMCP_SHIFT) | + (clkdiv_dmc0[div_index][6] << S5P_CLKDIV_DMC0_COPY2_SHIFT) | + (clkdiv_dmc0[div_index][7] << S5P_CLKDIV_DMC0_CORETI_SHIFT)); + + __raw_writel(tmp, S5P_CLKDIV_DMC0); + + do { + tmp = __raw_readl(S5P_CLKDIV_STAT_DMC0); + } while (tmp & 0x11111111); + + /* Change Divider - TOP */ + + tmp = __raw_readl(S5P_CLKDIV_TOP); + + tmp &= ~(S5P_CLKDIV_TOP_ACLK200_MASK | S5P_CLKDIV_TOP_ACLK100_MASK | + S5P_CLKDIV_TOP_ACLK160_MASK | S5P_CLKDIV_TOP_ACLK133_MASK | + S5P_CLKDIV_TOP_ONENAND_MASK); + + tmp |= ((clkdiv_top[div_index][0] << S5P_CLKDIV_TOP_ACLK200_SHIFT) | + (clkdiv_top[div_index][1] << S5P_CLKDIV_TOP_ACLK100_SHIFT) | + (clkdiv_top[div_index][2] << S5P_CLKDIV_TOP_ACLK160_SHIFT) | + (clkdiv_top[div_index][3] << S5P_CLKDIV_TOP_ACLK133_SHIFT) | + (clkdiv_top[div_index][4] << S5P_CLKDIV_TOP_ONENAND_SHIFT)); + + __raw_writel(tmp, S5P_CLKDIV_TOP); + + do { + tmp = __raw_readl(S5P_CLKDIV_STAT_TOP); + } while (tmp & 0x11111); + + /* Change Divider - LEFTBUS */ + + tmp = __raw_readl(S5P_CLKDIV_LEFTBUS); + + tmp &= ~(S5P_CLKDIV_BUS_GDLR_MASK | S5P_CLKDIV_BUS_GPLR_MASK); + + tmp |= ((clkdiv_lr_bus[div_index][0] << S5P_CLKDIV_BUS_GDLR_SHIFT) | + (clkdiv_lr_bus[div_index][1] << S5P_CLKDIV_BUS_GPLR_SHIFT)); + + __raw_writel(tmp, S5P_CLKDIV_LEFTBUS); + + do { + tmp = __raw_readl(S5P_CLKDIV_STAT_LEFTBUS); + } while (tmp & 0x11); + + /* Change Divider - RIGHTBUS */ + + tmp = __raw_readl(S5P_CLKDIV_RIGHTBUS); + + tmp &= ~(S5P_CLKDIV_BUS_GDLR_MASK | S5P_CLKDIV_BUS_GPLR_MASK); + + tmp |= ((clkdiv_lr_bus[div_index][0] << S5P_CLKDIV_BUS_GDLR_SHIFT) | + (clkdiv_lr_bus[div_index][1] << S5P_CLKDIV_BUS_GPLR_SHIFT)); + + __raw_writel(tmp, S5P_CLKDIV_RIGHTBUS); + + do { + tmp = __raw_readl(S5P_CLKDIV_STAT_RIGHTBUS); + } while (tmp & 0x11); +} + +static void s5pv310_set_apll(unsigned int index) +{ + unsigned int tmp; + + /* 1. MUX_CORE_SEL = MPLL, ARMCLK uses MPLL for lock time */ + clk_set_parent(moutcore, mout_mpll); + + do { + tmp = (__raw_readl(S5P_CLKMUX_STATCPU) + >> S5P_CLKSRC_CPU_MUXCORE_SHIFT); + tmp &= 0x7; + } while (tmp != 0x2); + + /* 2. Set APLL Lock time */ + __raw_writel(S5P_APLL_LOCKTIME, S5P_APLL_LOCK); + + /* 3. Change PLL PMS values */ + tmp = __raw_readl(S5P_APLL_CON0); + tmp &= ~((0x3ff << 16) | (0x3f << 8) | (0x7 << 0)); + tmp |= s5pv310_apll_pms_table[index]; + __raw_writel(tmp, S5P_APLL_CON0); + + /* 4. wait_lock_time */ + do { + tmp = __raw_readl(S5P_APLL_CON0); + } while (!(tmp & (0x1 << S5P_APLLCON0_LOCKED_SHIFT))); + + /* 5. MUX_CORE_SEL = APLL */ + clk_set_parent(moutcore, mout_apll); + + do { + tmp = __raw_readl(S5P_CLKMUX_STATCPU); + tmp &= S5P_CLKMUX_STATCPU_MUXCORE_MASK; + } while (tmp != (0x1 << S5P_CLKSRC_CPU_MUXCORE_SHIFT)); +} + +static void s5pv310_set_frequency(unsigned int old_index, unsigned int new_index) +{ + unsigned int tmp; + + if (old_index > new_index) { + /* The frequency changing to L0 needs to change apll */ + if (freqs.new == s5pv310_freq_table[L0].frequency) { + /* 1. Change the system clock divider values */ + s5pv310_set_clkdiv(new_index); + + /* 2. Change the apll m,p,s value */ + s5pv310_set_apll(new_index); + } else { + /* 1. Change the system clock divider values */ + s5pv310_set_clkdiv(new_index); + + /* 2. Change just s value in apll m,p,s value */ + tmp = __raw_readl(S5P_APLL_CON0); + tmp &= ~(0x7 << 0); + tmp |= (s5pv310_apll_pms_table[new_index] & 0x7); + __raw_writel(tmp, S5P_APLL_CON0); + } + } + + else if (old_index < new_index) { + /* The frequency changing from L0 needs to change apll */ + if (freqs.old == s5pv310_freq_table[L0].frequency) { + /* 1. Change the apll m,p,s value */ + s5pv310_set_apll(new_index); + + /* 2. Change the system clock divider values */ + s5pv310_set_clkdiv(new_index); + } else { + /* 1. Change just s value in apll m,p,s value */ + tmp = __raw_readl(S5P_APLL_CON0); + tmp &= ~(0x7 << 0); + tmp |= (s5pv310_apll_pms_table[new_index] & 0x7); + __raw_writel(tmp, S5P_APLL_CON0); + + /* 2. Change the system clock divider values */ + s5pv310_set_clkdiv(new_index); + } + } +} + +static int s5pv310_target(struct cpufreq_policy *policy, + unsigned int target_freq, + unsigned int relation) +{ + unsigned int index, old_index; + unsigned int arm_volt, int_volt; + + freqs.old = s5pv310_getspeed(policy->cpu); + + if (cpufreq_frequency_table_target(policy, s5pv310_freq_table, + freqs.old, relation, &old_index)) + return -EINVAL; + + if (cpufreq_frequency_table_target(policy, s5pv310_freq_table, + target_freq, relation, &index)) + return -EINVAL; + + freqs.new = s5pv310_freq_table[index].frequency; + freqs.cpu = policy->cpu; + + if (freqs.new == freqs.old) + return 0; + + /* get the voltage value */ + arm_volt = s5pv310_volt_table[index].arm_volt; + int_volt = s5pv310_volt_table[index].int_volt; + + cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); + + /* control regulator */ + if (freqs.new > freqs.old) { + /* Voltage up */ +#ifdef CONFIG_REGULATOR + regulator_set_voltage(arm_regulator, arm_volt, arm_volt); + regulator_set_voltage(int_regulator, int_volt, int_volt); +#endif + } + + /* Clock Configuration Procedure */ + s5pv310_set_frequency(old_index, index); + + /* control regulator */ + if (freqs.new < freqs.old) { + /* Voltage down */ +#ifdef CONFIG_REGULATOR + regulator_set_voltage(arm_regulator, arm_volt, arm_volt); + regulator_set_voltage(int_regulator, int_volt, int_volt); +#endif + } + + cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); + + return 0; +} + +#ifdef CONFIG_PM +static int s5pv310_cpufreq_suspend(struct cpufreq_policy *policy, + pm_message_t pmsg) +{ + return 0; +} + +static int s5pv310_cpufreq_resume(struct cpufreq_policy *policy) +{ + return 0; +} +#endif + +static int s5pv310_cpufreq_cpu_init(struct cpufreq_policy *policy) +{ + policy->cur = policy->min = policy->max = s5pv310_getspeed(policy->cpu); + + cpufreq_frequency_table_get_attr(s5pv310_freq_table, policy->cpu); + + /* set the transition latency value */ + policy->cpuinfo.transition_latency = 100000; + + /* + * S5PV310 multi-core processors has 2 cores + * that the frequency cannot be set independently. + * Each cpu is bound to the same speed. + * So the affected cpu is all of the cpus. + */ + cpumask_setall(policy->cpus); + + return cpufreq_frequency_table_cpuinfo(policy, s5pv310_freq_table); +} + +static struct cpufreq_driver s5pv310_driver = { + .flags = CPUFREQ_STICKY, + .verify = s5pv310_verify_speed, + .target = s5pv310_target, + .get = s5pv310_getspeed, + .init = s5pv310_cpufreq_cpu_init, + .name = "s5pv310_cpufreq", +#ifdef CONFIG_PM + .suspend = s5pv310_cpufreq_suspend, + .resume = s5pv310_cpufreq_resume, +#endif +}; + +static int __init s5pv310_cpufreq_init(void) +{ + cpu_clk = clk_get(NULL, "armclk"); + if (IS_ERR(cpu_clk)) + return PTR_ERR(cpu_clk); + + moutcore = clk_get(NULL, "moutcore"); + if (IS_ERR(moutcore)) + goto out; + + mout_mpll = clk_get(NULL, "mout_mpll"); + if (IS_ERR(mout_mpll)) + goto out; + + mout_apll = clk_get(NULL, "mout_apll"); + if (IS_ERR(mout_apll)) + goto out; + +#ifdef CONFIG_REGULATOR + arm_regulator = regulator_get(NULL, "vdd_arm"); + if (IS_ERR(arm_regulator)) { + printk(KERN_ERR "failed to get resource %s\n", "vdd_arm"); + goto out; + } + + int_regulator = regulator_get(NULL, "vdd_int"); + if (IS_ERR(int_regulator)) { + printk(KERN_ERR "failed to get resource %s\n", "vdd_int"); + goto out; + } +#endif + + /* + * Check DRAM type. + * Because DVFS level is different according to DRAM type. + */ + memtype = __raw_readl(S5P_VA_DMC0 + S5P_DMC0_MEMCON_OFFSET); + memtype = (memtype >> S5P_DMC0_MEMTYPE_SHIFT); + memtype &= S5P_DMC0_MEMTYPE_MASK; + + if ((memtype < DDR2) && (memtype > DDR3)) { + printk(KERN_ERR "%s: wrong memtype= 0x%x\n", __func__, memtype); + goto out; + } else { + printk(KERN_DEBUG "%s: memtype= 0x%x\n", __func__, memtype); + } + + return cpufreq_register_driver(&s5pv310_driver); + +out: + if (!IS_ERR(cpu_clk)) + clk_put(cpu_clk); + + if (!IS_ERR(moutcore)) + clk_put(moutcore); + + if (!IS_ERR(mout_mpll)) + clk_put(mout_mpll); + + if (!IS_ERR(mout_apll)) + clk_put(mout_apll); + +#ifdef CONFIG_REGULATOR + if (!IS_ERR(arm_regulator)) + regulator_put(arm_regulator); + + if (!IS_ERR(int_regulator)) + regulator_put(int_regulator); +#endif + + printk(KERN_ERR "%s: failed initialization\n", __func__); + + return -EINVAL; +} +late_initcall(s5pv310_cpufreq_init); diff --git a/arch/arm/mach-s5pv310/dev-pd.c b/arch/arm/mach-s5pv310/dev-pd.c new file mode 100644 index 0000000..58a50c2 --- /dev/null +++ b/arch/arm/mach-s5pv310/dev-pd.c @@ -0,0 +1,139 @@ +/* linux/arch/arm/mach-s5pv310/dev-pd.c + * + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * S5PV310 - Power Domain support + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#include <linux/io.h> +#include <linux/kernel.h> +#include <linux/platform_device.h> +#include <linux/delay.h> + +#include <mach/regs-pmu.h> + +#include <plat/pd.h> + +static int s5pv310_pd_enable(struct device *dev) +{ + struct samsung_pd_info *pdata = dev->platform_data; + u32 timeout; + + __raw_writel(S5P_INT_LOCAL_PWR_EN, pdata->base); + + /* Wait max 1ms */ + timeout = 10; + while ((__raw_readl(pdata->base + 0x4) & S5P_INT_LOCAL_PWR_EN) + != S5P_INT_LOCAL_PWR_EN) { + if (timeout == 0) { + printk(KERN_ERR "Power domain %s enable failed.\n", + dev_name(dev)); + return -ETIMEDOUT; + } + timeout--; + udelay(100); + } + + return 0; +} + +static int s5pv310_pd_disable(struct device *dev) +{ + struct samsung_pd_info *pdata = dev->platform_data; + u32 timeout; + + __raw_writel(0, pdata->base); + + /* Wait max 1ms */ + timeout = 10; + while (__raw_readl(pdata->base + 0x4) & S5P_INT_LOCAL_PWR_EN) { + if (timeout == 0) { + printk(KERN_ERR "Power domain %s disable failed.\n", + dev_name(dev)); + return -ETIMEDOUT; + } + timeout--; + udelay(100); + } + + return 0; +} + +struct platform_device s5pv310_device_pd[] = { + { + .name = "samsung-pd", + .id = 0, + .dev = { + .platform_data = &(struct samsung_pd_info) { + .enable = s5pv310_pd_enable, + .disable = s5pv310_pd_disable, + .base = S5P_PMU_MFC_CONF, + }, + }, + }, { + .name = "samsung-pd", + .id = 1, + .dev = { + .platform_data = &(struct samsung_pd_info) { + .enable = s5pv310_pd_enable, + .disable = s5pv310_pd_disable, + .base = S5P_PMU_G3D_CONF, + }, + }, + }, { + .name = "samsung-pd", + .id = 2, + .dev = { + .platform_data = &(struct samsung_pd_info) { + .enable = s5pv310_pd_enable, + .disable = s5pv310_pd_disable, + .base = S5P_PMU_LCD0_CONF, + }, + }, + }, { + .name = "samsung-pd", + .id = 3, + .dev = { + .platform_data = &(struct samsung_pd_info) { + .enable = s5pv310_pd_enable, + .disable = s5pv310_pd_disable, + .base = S5P_PMU_LCD1_CONF, + }, + }, + }, { + .name = "samsung-pd", + .id = 4, + .dev = { + .platform_data = &(struct samsung_pd_info) { + .enable = s5pv310_pd_enable, + .disable = s5pv310_pd_disable, + .base = S5P_PMU_TV_CONF, + }, + }, + }, { + .name = "samsung-pd", + .id = 5, + .dev = { + .platform_data = &(struct samsung_pd_info) { + .enable = s5pv310_pd_enable, + .disable = s5pv310_pd_disable, + .base = S5P_PMU_CAM_CONF, + }, + }, + }, { + .name = "samsung-pd", + .id = 6, + .dev = { + .platform_data = &(struct samsung_pd_info) { + .enable = s5pv310_pd_enable, + .disable = s5pv310_pd_disable, + .base = S5P_PMU_GPS_CONF, + }, + }, + }, +}; diff --git a/arch/arm/mach-s5pv310/dev-sysmmu.c b/arch/arm/mach-s5pv310/dev-sysmmu.c new file mode 100644 index 0000000..e1bb200 --- /dev/null +++ b/arch/arm/mach-s5pv310/dev-sysmmu.c @@ -0,0 +1,187 @@ +/* linux/arch/arm/mach-s5pv310/dev-sysmmu.c + * + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/platform_device.h> +#include <linux/dma-mapping.h> + +#include <mach/map.h> +#include <mach/irqs.h> + +static struct resource s5pv310_sysmmu_resource[] = { + [0] = { + .start = S5PV310_PA_SYSMMU_MDMA, + .end = S5PV310_PA_SYSMMU_MDMA + SZ_64K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = IRQ_SYSMMU_MDMA0_0, + .end = IRQ_SYSMMU_MDMA0_0, + .flags = IORESOURCE_IRQ, + }, + [2] = { + .start = S5PV310_PA_SYSMMU_SSS, + .end = S5PV310_PA_SYSMMU_SSS + SZ_64K - 1, + .flags = IORESOURCE_MEM, + }, + [3] = { + .start = IRQ_SYSMMU_SSS_0, + .end = IRQ_SYSMMU_SSS_0, + .flags = IORESOURCE_IRQ, + }, + [4] = { + .start = S5PV310_PA_SYSMMU_FIMC0, + .end = S5PV310_PA_SYSMMU_FIMC0 + SZ_64K - 1, + .flags = IORESOURCE_MEM, + }, + [5] = { + .start = IRQ_SYSMMU_FIMC0_0, + .end = IRQ_SYSMMU_FIMC0_0, + .flags = IORESOURCE_IRQ, + }, + [6] = { + .start = S5PV310_PA_SYSMMU_FIMC1, + .end = S5PV310_PA_SYSMMU_FIMC1 + SZ_64K - 1, + .flags = IORESOURCE_MEM, + }, + [7] = { + .start = IRQ_SYSMMU_FIMC1_0, + .end = IRQ_SYSMMU_FIMC1_0, + .flags = IORESOURCE_IRQ, + }, + [8] = { + .start = S5PV310_PA_SYSMMU_FIMC2, + .end = S5PV310_PA_SYSMMU_FIMC2 + SZ_64K - 1, + .flags = IORESOURCE_MEM, + }, + [9] = { + .start = IRQ_SYSMMU_FIMC2_0, + .end = IRQ_SYSMMU_FIMC2_0, + .flags = IORESOURCE_IRQ, + }, + [10] = { + .start = S5PV310_PA_SYSMMU_FIMC3, + .end = S5PV310_PA_SYSMMU_FIMC3 + SZ_64K - 1, + .flags = IORESOURCE_MEM, + }, + [11] = { + .start = IRQ_SYSMMU_FIMC3_0, + .end = IRQ_SYSMMU_FIMC3_0, + .flags = IORESOURCE_IRQ, + }, + [12] = { + .start = S5PV310_PA_SYSMMU_JPEG, + .end = S5PV310_PA_SYSMMU_JPEG + SZ_64K - 1, + .flags = IORESOURCE_MEM, + }, + [13] = { + .start = IRQ_SYSMMU_JPEG_0, + .end = IRQ_SYSMMU_JPEG_0, + .flags = IORESOURCE_IRQ, + }, + [14] = { + .start = S5PV310_PA_SYSMMU_FIMD0, + .end = S5PV310_PA_SYSMMU_FIMD0 + SZ_64K - 1, + .flags = IORESOURCE_MEM, + }, + [15] = { + .start = IRQ_SYSMMU_LCD0_M0_0, + .end = IRQ_SYSMMU_LCD0_M0_0, + .flags = IORESOURCE_IRQ, + }, + [16] = { + .start = S5PV310_PA_SYSMMU_FIMD1, + .end = S5PV310_PA_SYSMMU_FIMD1 + SZ_64K - 1, + .flags = IORESOURCE_MEM, + }, + [17] = { + .start = IRQ_SYSMMU_LCD1_M1_0, + .end = IRQ_SYSMMU_LCD1_M1_0, + .flags = IORESOURCE_IRQ, + }, + [18] = { + .start = S5PV310_PA_SYSMMU_PCIe, + .end = S5PV310_PA_SYSMMU_PCIe + SZ_64K - 1, + .flags = IORESOURCE_MEM, + }, + [19] = { + .start = IRQ_SYSMMU_PCIE_0, + .end = IRQ_SYSMMU_PCIE_0, + .flags = IORESOURCE_IRQ, + }, + [20] = { + .start = S5PV310_PA_SYSMMU_G2D, + .end = S5PV310_PA_SYSMMU_G2D + SZ_64K - 1, + .flags = IORESOURCE_MEM, + }, + [21] = { + .start = IRQ_SYSMMU_2D_0, + .end = IRQ_SYSMMU_2D_0, + .flags = IORESOURCE_IRQ, + }, + [22] = { + .start = S5PV310_PA_SYSMMU_ROTATOR, + .end = S5PV310_PA_SYSMMU_ROTATOR + SZ_64K - 1, + .flags = IORESOURCE_MEM, + }, + [23] = { + .start = IRQ_SYSMMU_ROTATOR_0, + .end = IRQ_SYSMMU_ROTATOR_0, + .flags = IORESOURCE_IRQ, + }, + [24] = { + .start = S5PV310_PA_SYSMMU_MDMA2, + .end = S5PV310_PA_SYSMMU_MDMA2 + SZ_64K - 1, + .flags = IORESOURCE_MEM, + }, + [25] = { + .start = IRQ_SYSMMU_MDMA1_0, + .end = IRQ_SYSMMU_MDMA1_0, + .flags = IORESOURCE_IRQ, + }, + [26] = { + .start = S5PV310_PA_SYSMMU_TV, + .end = S5PV310_PA_SYSMMU_TV + SZ_64K - 1, + .flags = IORESOURCE_MEM, + }, + [27] = { + .start = IRQ_SYSMMU_TV_M0_0, + .end = IRQ_SYSMMU_TV_M0_0, + .flags = IORESOURCE_IRQ, + }, + [28] = { + .start = S5PV310_PA_SYSMMU_MFC_L, + .end = S5PV310_PA_SYSMMU_MFC_L + SZ_64K - 1, + .flags = IORESOURCE_MEM, + }, + [29] = { + .start = IRQ_SYSMMU_MFC_M0_0, + .end = IRQ_SYSMMU_MFC_M0_0, + .flags = IORESOURCE_IRQ, + }, + [30] = { + .start = S5PV310_PA_SYSMMU_MFC_R, + .end = S5PV310_PA_SYSMMU_MFC_R + SZ_64K - 1, + .flags = IORESOURCE_MEM, + }, + [31] = { + .start = IRQ_SYSMMU_MFC_M1_0, + .end = IRQ_SYSMMU_MFC_M1_0, + .flags = IORESOURCE_IRQ, + }, +}; + +struct platform_device s5pv310_device_sysmmu = { + .name = "s5p-sysmmu", + .id = 32, + .num_resources = ARRAY_SIZE(s5pv310_sysmmu_resource), + .resource = s5pv310_sysmmu_resource, +}; + +EXPORT_SYMBOL(s5pv310_device_sysmmu); diff --git a/arch/arm/mach-s5pv310/hotplug.c b/arch/arm/mach-s5pv310/hotplug.c index afa5392..c24235c 100644 --- a/arch/arm/mach-s5pv310/hotplug.c +++ b/arch/arm/mach-s5pv310/hotplug.c @@ -30,10 +30,10 @@ static inline void cpu_enter_lowpower(void) * Turn off coherency */ " mrc p15, 0, %0, c1, c0, 1\n" - " bic %0, %0, %2\n" + " bic %0, %0, #0x20\n" " mcr p15, 0, %0, c1, c0, 1\n" " mrc p15, 0, %0, c1, c0, 0\n" - " bic %0, %0, #0x04\n" + " bic %0, %0, %2\n" " mcr p15, 0, %0, c1, c0, 0\n" : "=&r" (v) : "r" (0), "Ir" (CR_C) diff --git a/arch/arm/mach-s5pv310/include/mach/irqs.h b/arch/arm/mach-s5pv310/include/mach/irqs.h index 3c05c58..536b0b5 100644 --- a/arch/arm/mach-s5pv310/include/mach/irqs.h +++ b/arch/arm/mach-s5pv310/include/mach/irqs.h @@ -25,6 +25,8 @@ #define IRQ_SPI(x) S5P_IRQ(x+32) +#define IRQ_MCT1 IRQ_SPI(35) + #define IRQ_EINT0 IRQ_SPI(40) #define IRQ_EINT1 IRQ_SPI(41) #define IRQ_EINT2 IRQ_SPI(42) @@ -36,9 +38,8 @@ #define IRQ_JPEG IRQ_SPI(48) #define IRQ_2D IRQ_SPI(49) #define IRQ_PCIE IRQ_SPI(50) -#define IRQ_SYSTEM_TIMER IRQ_SPI(51) +#define IRQ_MCT0 IRQ_SPI(51) #define IRQ_MFC IRQ_SPI(52) -#define IRQ_WDT IRQ_SPI(53) #define IRQ_AUDIO_SS IRQ_SPI(54) #define IRQ_AC97 IRQ_SPI(55) #define IRQ_SPDIF IRQ_SPI(56) @@ -54,6 +55,24 @@ #define COMBINER_GROUP(x) ((x) * MAX_IRQ_IN_COMBINER + IRQ_SPI(64)) #define COMBINER_IRQ(x, y) (COMBINER_GROUP(x) + y) +#define IRQ_SYSMMU_MDMA0_0 COMBINER_IRQ(4, 0) +#define IRQ_SYSMMU_SSS_0 COMBINER_IRQ(4, 1) +#define IRQ_SYSMMU_FIMC0_0 COMBINER_IRQ(4, 2) +#define IRQ_SYSMMU_FIMC1_0 COMBINER_IRQ(4, 3) +#define IRQ_SYSMMU_FIMC2_0 COMBINER_IRQ(4, 4) +#define IRQ_SYSMMU_FIMC3_0 COMBINER_IRQ(4, 5) +#define IRQ_SYSMMU_JPEG_0 COMBINER_IRQ(4, 6) +#define IRQ_SYSMMU_2D_0 COMBINER_IRQ(4, 7) + +#define IRQ_SYSMMU_ROTATOR_0 COMBINER_IRQ(5, 0) +#define IRQ_SYSMMU_MDMA1_0 COMBINER_IRQ(5, 1) +#define IRQ_SYSMMU_LCD0_M0_0 COMBINER_IRQ(5, 2) +#define IRQ_SYSMMU_LCD1_M1_0 COMBINER_IRQ(5, 3) +#define IRQ_SYSMMU_TV_M0_0 COMBINER_IRQ(5, 4) +#define IRQ_SYSMMU_MFC_M0_0 COMBINER_IRQ(5, 5) +#define IRQ_SYSMMU_MFC_M1_0 COMBINER_IRQ(5, 6) +#define IRQ_SYSMMU_PCIE_0 COMBINER_IRQ(5, 7) + #define IRQ_PDMA0 COMBINER_IRQ(21, 0) #define IRQ_PDMA1 COMBINER_IRQ(21, 1) @@ -86,8 +105,13 @@ #define IRQ_HSMMC2 COMBINER_IRQ(29, 2) #define IRQ_HSMMC3 COMBINER_IRQ(29, 3) +#define IRQ_MIPI_CSIS0 COMBINER_IRQ(30, 0) +#define IRQ_MIPI_CSIS1 COMBINER_IRQ(30, 1) + #define IRQ_ONENAND_AUDI COMBINER_IRQ(34, 0) +#define IRQ_MCT_L1 COMBINER_IRQ(35, 3) + #define IRQ_EINT4 COMBINER_IRQ(37, 0) #define IRQ_EINT5 COMBINER_IRQ(37, 1) #define IRQ_EINT6 COMBINER_IRQ(37, 2) @@ -104,7 +128,11 @@ #define IRQ_EINT16_31 COMBINER_IRQ(39, 0) -#define MAX_COMBINER_NR 40 +#define IRQ_MCT_L0 COMBINER_IRQ(51, 0) + +#define IRQ_WDT COMBINER_IRQ(53, 0) + +#define MAX_COMBINER_NR 54 #define S5P_IRQ_EINT_BASE COMBINER_IRQ(MAX_COMBINER_NR, 0) diff --git a/arch/arm/mach-s5pv310/include/mach/map.h b/arch/arm/mach-s5pv310/include/mach/map.h index 5399446..74d4006 100644 --- a/arch/arm/mach-s5pv310/include/mach/map.h +++ b/arch/arm/mach-s5pv310/include/mach/map.h @@ -39,11 +39,15 @@ #define S5PV310_PA_SYSCON (0x10010000) #define S5P_PA_SYSCON S5PV310_PA_SYSCON +#define S5PV310_PA_PMU (0x10020000) + #define S5PV310_PA_CMU (0x10030000) #define S5PV310_PA_WATCHDOG (0x10060000) #define S5PV310_PA_RTC (0x10070000) +#define S5PV310_PA_DMC0 (0x10400000) + #define S5PV310_PA_COMBINER (0x10448000) #define S5PV310_PA_COREPERI (0x10500000) @@ -61,9 +65,13 @@ #define S5PV310_PA_GPIO2 (0x11000000) #define S5PV310_PA_GPIO3 (0x03860000) +#define S5PV310_PA_MIPI_CSIS0 0x11880000 +#define S5PV310_PA_MIPI_CSIS1 0x11890000 + #define S5PV310_PA_HSMMC(x) (0x12510000 + ((x) * 0x10000)) #define S5PV310_PA_SROMC (0x12570000) +#define S5P_PA_SROMC S5PV310_PA_SROMC /* S/PDIF */ #define S5PV310_PA_SPDIF 0xE1100000 @@ -100,6 +108,25 @@ #define S5PV310_PA_SDRAM (0x40000000) #define S5P_PA_SDRAM S5PV310_PA_SDRAM +#define S5PV310_PA_SYSMMU_MDMA 0x10A40000 +#define S5PV310_PA_SYSMMU_SSS 0x10A50000 +#define S5PV310_PA_SYSMMU_FIMC0 0x11A20000 +#define S5PV310_PA_SYSMMU_FIMC1 0x11A30000 +#define S5PV310_PA_SYSMMU_FIMC2 0x11A40000 +#define S5PV310_PA_SYSMMU_FIMC3 0x11A50000 +#define S5PV310_PA_SYSMMU_JPEG 0x11A60000 +#define S5PV310_PA_SYSMMU_FIMD0 0x11E20000 +#define S5PV310_PA_SYSMMU_FIMD1 0x12220000 +#define S5PV310_PA_SYSMMU_PCIe 0x12620000 +#define S5PV310_PA_SYSMMU_G2D 0x12A20000 +#define S5PV310_PA_SYSMMU_ROTATOR 0x12A30000 +#define S5PV310_PA_SYSMMU_MDMA2 0x12A40000 +#define S5PV310_PA_SYSMMU_TV 0x12E20000 +#define S5PV310_PA_SYSMMU_MFC_L 0x13620000 +#define S5PV310_PA_SYSMMU_MFC_R 0x13630000 +#define S5PV310_SYSMMU_TOTAL_IPNUM 16 +#define S5P_SYSMMU_TOTAL_IPNUM S5PV310_SYSMMU_TOTAL_IPNUM + /* compatibiltiy defines. */ #define S3C_PA_UART S5PV310_PA_UART #define S3C_PA_HSMMC0 S5PV310_PA_HSMMC(0) @@ -116,5 +143,7 @@ #define S3C_PA_IIC7 S5PV310_PA_IIC(7) #define S3C_PA_RTC S5PV310_PA_RTC #define S3C_PA_WDT S5PV310_PA_WATCHDOG +#define S5P_PA_MIPI_CSIS0 S5PV310_PA_MIPI_CSIS0 +#define S5P_PA_MIPI_CSIS1 S5PV310_PA_MIPI_CSIS1 #endif /* __ASM_ARCH_MAP_H */ diff --git a/arch/arm/mach-s5pv310/include/mach/regs-clock.h b/arch/arm/mach-s5pv310/include/mach/regs-clock.h index f1028ca..b5c4ada 100644 --- a/arch/arm/mach-s5pv310/include/mach/regs-clock.h +++ b/arch/arm/mach-s5pv310/include/mach/regs-clock.h @@ -19,6 +19,12 @@ #define S5P_INFORM0 S5P_CLKREG(0x800) +#define S5P_CLKDIV_LEFTBUS S5P_CLKREG(0x04500) +#define S5P_CLKDIV_STAT_LEFTBUS S5P_CLKREG(0x04600) + +#define S5P_CLKDIV_RIGHTBUS S5P_CLKREG(0x08500) +#define S5P_CLKDIV_STAT_RIGHTBUS S5P_CLKREG(0x08600) + #define S5P_EPLL_CON0 S5P_CLKREG(0x0C110) #define S5P_EPLL_CON1 S5P_CLKREG(0x0C114) #define S5P_VPLL_CON0 S5P_CLKREG(0x0C120) @@ -58,6 +64,8 @@ #define S5P_CLKSRC_MASK_PERIL0 S5P_CLKREG(0x0C350) #define S5P_CLKSRC_MASK_PERIL1 S5P_CLKREG(0x0C354) +#define S5P_CLKDIV_STAT_TOP S5P_CLKREG(0x0C610) + #define S5P_CLKGATE_IP_CAM S5P_CLKREG(0x0C920) #define S5P_CLKGATE_IP_IMAGE S5P_CLKREG(0x0C930) #define S5P_CLKGATE_IP_LCD0 S5P_CLKREG(0x0C934) @@ -66,8 +74,9 @@ #define S5P_CLKGATE_IP_PERIL S5P_CLKREG(0x0C950) #define S5P_CLKGATE_IP_PERIR S5P_CLKREG(0x0C960) -#define S5P_CLKSRC_CORE S5P_CLKREG(0x10200) -#define S5P_CLKDIV_CORE0 S5P_CLKREG(0x10500) +#define S5P_CLKSRC_DMC S5P_CLKREG(0x10200) +#define S5P_CLKDIV_DMC0 S5P_CLKREG(0x10500) +#define S5P_CLKDIV_STAT_DMC0 S5P_CLKREG(0x10600) #define S5P_APLL_LOCK S5P_CLKREG(0x14000) #define S5P_MPLL_LOCK S5P_CLKREG(0x14004) @@ -80,10 +89,77 @@ #define S5P_CLKMUX_STATCPU S5P_CLKREG(0x14400) #define S5P_CLKDIV_CPU S5P_CLKREG(0x14500) +#define S5P_CLKDIV_CPU1 S5P_CLKREG(0x14504) #define S5P_CLKDIV_STATCPU S5P_CLKREG(0x14600) +#define S5P_CLKDIV_STATCPU1 S5P_CLKREG(0x14604) #define S5P_CLKGATE_SCLKCPU S5P_CLKREG(0x14800) +/* APLL_LOCK */ +#define S5P_APLL_LOCKTIME (0x1C20) /* 300us */ + +/* APLL_CON0 */ +#define S5P_APLLCON0_ENABLE_SHIFT (31) +#define S5P_APLLCON0_LOCKED_SHIFT (29) +#define S5P_APLL_VAL_1000 ((250 << 16) | (6 << 8) | 1) +#define S5P_APLL_VAL_800 ((200 << 16) | (6 << 8) | 1) + +/* CLK_SRC_CPU */ +#define S5P_CLKSRC_CPU_MUXCORE_SHIFT (16) +#define S5P_CLKMUX_STATCPU_MUXCORE_MASK (0x7 << S5P_CLKSRC_CPU_MUXCORE_SHIFT) + +/* CLKDIV_CPU0 */ +#define S5P_CLKDIV_CPU0_CORE_SHIFT (0) +#define S5P_CLKDIV_CPU0_CORE_MASK (0x7 << S5P_CLKDIV_CPU0_CORE_SHIFT) +#define S5P_CLKDIV_CPU0_COREM0_SHIFT (4) +#define S5P_CLKDIV_CPU0_COREM0_MASK (0x7 << S5P_CLKDIV_CPU0_COREM0_SHIFT) +#define S5P_CLKDIV_CPU0_COREM1_SHIFT (8) +#define S5P_CLKDIV_CPU0_COREM1_MASK (0x7 << S5P_CLKDIV_CPU0_COREM1_SHIFT) +#define S5P_CLKDIV_CPU0_PERIPH_SHIFT (12) +#define S5P_CLKDIV_CPU0_PERIPH_MASK (0x7 << S5P_CLKDIV_CPU0_PERIPH_SHIFT) +#define S5P_CLKDIV_CPU0_ATB_SHIFT (16) +#define S5P_CLKDIV_CPU0_ATB_MASK (0x7 << S5P_CLKDIV_CPU0_ATB_SHIFT) +#define S5P_CLKDIV_CPU0_PCLKDBG_SHIFT (20) +#define S5P_CLKDIV_CPU0_PCLKDBG_MASK (0x7 << S5P_CLKDIV_CPU0_PCLKDBG_SHIFT) +#define S5P_CLKDIV_CPU0_APLL_SHIFT (24) +#define S5P_CLKDIV_CPU0_APLL_MASK (0x7 << S5P_CLKDIV_CPU0_APLL_SHIFT) + +/* CLKDIV_DMC0 */ +#define S5P_CLKDIV_DMC0_ACP_SHIFT (0) +#define S5P_CLKDIV_DMC0_ACP_MASK (0x7 << S5P_CLKDIV_DMC0_ACP_SHIFT) +#define S5P_CLKDIV_DMC0_ACPPCLK_SHIFT (4) +#define S5P_CLKDIV_DMC0_ACPPCLK_MASK (0x7 << S5P_CLKDIV_DMC0_ACPPCLK_SHIFT) +#define S5P_CLKDIV_DMC0_DPHY_SHIFT (8) +#define S5P_CLKDIV_DMC0_DPHY_MASK (0x7 << S5P_CLKDIV_DMC0_DPHY_SHIFT) +#define S5P_CLKDIV_DMC0_DMC_SHIFT (12) +#define S5P_CLKDIV_DMC0_DMC_MASK (0x7 << S5P_CLKDIV_DMC0_DMC_SHIFT) +#define S5P_CLKDIV_DMC0_DMCD_SHIFT (16) +#define S5P_CLKDIV_DMC0_DMCD_MASK (0x7 << S5P_CLKDIV_DMC0_DMCD_SHIFT) +#define S5P_CLKDIV_DMC0_DMCP_SHIFT (20) +#define S5P_CLKDIV_DMC0_DMCP_MASK (0x7 << S5P_CLKDIV_DMC0_DMCP_SHIFT) +#define S5P_CLKDIV_DMC0_COPY2_SHIFT (24) +#define S5P_CLKDIV_DMC0_COPY2_MASK (0x7 << S5P_CLKDIV_DMC0_COPY2_SHIFT) +#define S5P_CLKDIV_DMC0_CORETI_SHIFT (28) +#define S5P_CLKDIV_DMC0_CORETI_MASK (0x7 << S5P_CLKDIV_DMC0_CORETI_SHIFT) + +/* CLKDIV_TOP */ +#define S5P_CLKDIV_TOP_ACLK200_SHIFT (0) +#define S5P_CLKDIV_TOP_ACLK200_MASK (0x7 << S5P_CLKDIV_TOP_ACLK200_SHIFT) +#define S5P_CLKDIV_TOP_ACLK100_SHIFT (4) +#define S5P_CLKDIV_TOP_ACLK100_MASK (0xf << S5P_CLKDIV_TOP_ACLK100_SHIFT) +#define S5P_CLKDIV_TOP_ACLK160_SHIFT (8) +#define S5P_CLKDIV_TOP_ACLK160_MASK (0x7 << S5P_CLKDIV_TOP_ACLK160_SHIFT) +#define S5P_CLKDIV_TOP_ACLK133_SHIFT (12) +#define S5P_CLKDIV_TOP_ACLK133_MASK (0x7 << S5P_CLKDIV_TOP_ACLK133_SHIFT) +#define S5P_CLKDIV_TOP_ONENAND_SHIFT (16) +#define S5P_CLKDIV_TOP_ONENAND_MASK (0x7 << S5P_CLKDIV_TOP_ONENAND_SHIFT) + +/* CLKDIV_LEFTBUS / CLKDIV_RIGHTBUS*/ +#define S5P_CLKDIV_BUS_GDLR_SHIFT (0) +#define S5P_CLKDIV_BUS_GDLR_MASK (0x7 << S5P_CLKDIV_BUS_GDLR_SHIFT) +#define S5P_CLKDIV_BUS_GPLR_SHIFT (4) +#define S5P_CLKDIV_BUS_GPLR_MASK (0x7 << S5P_CLKDIV_BUS_GPLR_SHIFT) + /* Compatibility defines */ #define S5P_EPLL_CON S5P_EPLL_CON0 diff --git a/arch/arm/mach-s5pv310/include/mach/regs-mem.h b/arch/arm/mach-s5pv310/include/mach/regs-mem.h new file mode 100644 index 0000000..8342271 --- /dev/null +++ b/arch/arm/mach-s5pv310/include/mach/regs-mem.h @@ -0,0 +1,23 @@ +/* linux/arch/arm/mach-s5pv310/include/mach/regs-mem.h + * + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * S5PV310 - SROMC and DMC register definitions + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARCH_REGS_MEM_H +#define __ASM_ARCH_REGS_MEM_H __FILE__ + +#include <mach/map.h> + +#define S5P_DMC0_MEMCON_OFFSET 0x04 + +#define S5P_DMC0_MEMTYPE_SHIFT 8 +#define S5P_DMC0_MEMTYPE_MASK 0xF + +#endif /* __ASM_ARCH_REGS_MEM_H */ diff --git a/arch/arm/mach-s5pv310/include/mach/regs-pmu.h b/arch/arm/mach-s5pv310/include/mach/regs-pmu.h new file mode 100644 index 0000000..fb333d0 --- /dev/null +++ b/arch/arm/mach-s5pv310/include/mach/regs-pmu.h @@ -0,0 +1,30 @@ +/* linux/arch/arm/mach-s5pv310/include/mach/regs-pmu.h + * + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * S5PV310 - Power management unit definition + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARCH_REGS_PMU_H +#define __ASM_ARCH_REGS_PMU_H __FILE__ + +#include <mach/map.h> + +#define S5P_PMUREG(x) (S5P_VA_PMU + (x)) + +#define S5P_PMU_CAM_CONF S5P_PMUREG(0x3C00) +#define S5P_PMU_TV_CONF S5P_PMUREG(0x3C20) +#define S5P_PMU_MFC_CONF S5P_PMUREG(0x3C40) +#define S5P_PMU_G3D_CONF S5P_PMUREG(0x3C60) +#define S5P_PMU_LCD0_CONF S5P_PMUREG(0x3C80) +#define S5P_PMU_LCD1_CONF S5P_PMUREG(0x3CA0) +#define S5P_PMU_GPS_CONF S5P_PMUREG(0x3CE0) + +#define S5P_INT_LOCAL_PWR_EN 0x7 + +#endif /* __ASM_ARCH_REGS_PMU_H */ diff --git a/arch/arm/mach-s5pv310/include/mach/regs-srom.h b/arch/arm/mach-s5pv310/include/mach/regs-srom.h deleted file mode 100644 index 1898b3e..0000000 --- a/arch/arm/mach-s5pv310/include/mach/regs-srom.h +++ /dev/null @@ -1,50 +0,0 @@ -/* linux/arch/arm/mach-s5pv310/include/mach/regs-srom.h - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * S5PV310 - SROMC register definitions - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_REGS_SROM_H -#define __ASM_ARCH_REGS_SROM_H __FILE__ - -#include <mach/map.h> - -#define S5PV310_SROMREG(x) (S5P_VA_SROMC + (x)) - -#define S5PV310_SROM_BW S5PV310_SROMREG(0x0) -#define S5PV310_SROM_BC0 S5PV310_SROMREG(0x4) -#define S5PV310_SROM_BC1 S5PV310_SROMREG(0x8) -#define S5PV310_SROM_BC2 S5PV310_SROMREG(0xc) -#define S5PV310_SROM_BC3 S5PV310_SROMREG(0x10) - -/* one register BW holds 4 x 4-bit packed settings for NCS0 - NCS3 */ - -#define S5PV310_SROM_BW__DATAWIDTH__SHIFT 0 -#define S5PV310_SROM_BW__ADDRMODE__SHIFT 1 -#define S5PV310_SROM_BW__WAITENABLE__SHIFT 2 -#define S5PV310_SROM_BW__BYTEENABLE__SHIFT 3 - -#define S5PV310_SROM_BW__CS_MASK 0xf - -#define S5PV310_SROM_BW__NCS0__SHIFT 0 -#define S5PV310_SROM_BW__NCS1__SHIFT 4 -#define S5PV310_SROM_BW__NCS2__SHIFT 8 -#define S5PV310_SROM_BW__NCS3__SHIFT 12 - -/* applies to same to BCS0 - BCS3 */ - -#define S5PV310_SROM_BCX__PMC__SHIFT 0 -#define S5PV310_SROM_BCX__TACP__SHIFT 4 -#define S5PV310_SROM_BCX__TCAH__SHIFT 8 -#define S5PV310_SROM_BCX__TCOH__SHIFT 12 -#define S5PV310_SROM_BCX__TACC__SHIFT 16 -#define S5PV310_SROM_BCX__TCOS__SHIFT 24 -#define S5PV310_SROM_BCX__TACS__SHIFT 28 - -#endif /* __ASM_ARCH_REGS_SROM_H */ diff --git a/arch/arm/mach-s5pv310/include/mach/regs-sysmmu.h b/arch/arm/mach-s5pv310/include/mach/regs-sysmmu.h new file mode 100644 index 0000000..0b28e81 --- /dev/null +++ b/arch/arm/mach-s5pv310/include/mach/regs-sysmmu.h @@ -0,0 +1,24 @@ +/* linux/arch/arm/mach-s5pv310/include/mach/regs-sysmmu.h + * + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * S5PV310 - System MMU register + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARCH_REGS_SYSMMU_H +#define __ASM_ARCH_REGS_SYSMMU_H __FILE__ + +#define S5P_MMU_CTRL 0x000 +#define S5P_MMU_CFG 0x004 +#define S5P_MMU_STATUS 0x008 +#define S5P_MMU_FLUSH 0x00C +#define S5P_PT_BASE_ADDR 0x014 +#define S5P_INT_STATUS 0x018 +#define S5P_PAGE_FAULT_ADDR 0x024 + +#endif /* __ASM_ARCH_REGS_SYSMMU_H */ diff --git a/arch/arm/mach-s5pv310/include/mach/sysmmu.h b/arch/arm/mach-s5pv310/include/mach/sysmmu.h new file mode 100644 index 0000000..662fe85f --- /dev/null +++ b/arch/arm/mach-s5pv310/include/mach/sysmmu.h @@ -0,0 +1,119 @@ +/* linux/arch/arm/mach-s5pv310/include/mach/sysmmu.h + * + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * Samsung sysmmu driver for S5PV310 + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARM_ARCH_SYSMMU_H +#define __ASM_ARM_ARCH_SYSMMU_H __FILE__ + +enum s5pv310_sysmmu_ips { + SYSMMU_MDMA, + SYSMMU_SSS, + SYSMMU_FIMC0, + SYSMMU_FIMC1, + SYSMMU_FIMC2, + SYSMMU_FIMC3, + SYSMMU_JPEG, + SYSMMU_FIMD0, + SYSMMU_FIMD1, + SYSMMU_PCIe, + SYSMMU_G2D, + SYSMMU_ROTATOR, + SYSMMU_MDMA2, + SYSMMU_TV, + SYSMMU_MFC_L, + SYSMMU_MFC_R, +}; + +static char *sysmmu_ips_name[S5P_SYSMMU_TOTAL_IPNUM] = { + "SYSMMU_MDMA" , + "SYSMMU_SSS" , + "SYSMMU_FIMC0" , + "SYSMMU_FIMC1" , + "SYSMMU_FIMC2" , + "SYSMMU_FIMC3" , + "SYSMMU_JPEG" , + "SYSMMU_FIMD0" , + "SYSMMU_FIMD1" , + "SYSMMU_PCIe" , + "SYSMMU_G2D" , + "SYSMMU_ROTATOR", + "SYSMMU_MDMA2" , + "SYSMMU_TV" , + "SYSMMU_MFC_L" , + "SYSMMU_MFC_R" , +}; + +typedef enum s5pv310_sysmmu_ips sysmmu_ips; + +struct sysmmu_tt_info { + unsigned long *pgd; + unsigned long pgd_paddr; + unsigned long *pte; +}; + +struct sysmmu_controller { + const char *name; + + /* channels registers */ + void __iomem *regs; + + /* channel irq */ + unsigned int irq; + + sysmmu_ips ips; + + /* Translation Table Info. */ + struct sysmmu_tt_info *tt_info; + + struct resource *mem; + struct device *dev; + + /* SysMMU controller enable - true : enable */ + bool enable; +}; + +/** + * s5p_sysmmu_enable() - enable system mmu of ip + * @ips: The ip connected system mmu. + * + * This function enable system mmu to transfer address + * from virtual address to physical address + */ +int s5p_sysmmu_enable(sysmmu_ips ips); + +/** + * s5p_sysmmu_disable() - disable sysmmu mmu of ip + * @ips: The ip connected system mmu. + * + * This function disable system mmu to transfer address + * from virtual address to physical address + */ +int s5p_sysmmu_disable(sysmmu_ips ips); + +/** + * s5p_sysmmu_set_tablebase_pgd() - set page table base address to refer page table + * @ips: The ip connected system mmu. + * @pgd: The page table base address. + * + * This function set page table base address + * When system mmu transfer address from virtaul address to physical address, + * system mmu refer address information from page table + */ +int s5p_sysmmu_set_tablebase_pgd(sysmmu_ips ips, unsigned long pgd); + +/** + * s5p_sysmmu_tlb_invalidate() - flush all TLB entry in system mmu + * @ips: The ip connected system mmu. + * + * This function flush all TLB entry in system mmu + */ +int s5p_sysmmu_tlb_invalidate(sysmmu_ips ips); +#endif /* __ASM_ARM_ARCH_SYSMMU_H */ diff --git a/arch/arm/mach-s5pv310/irq-combiner.c b/arch/arm/mach-s5pv310/irq-combiner.c index c3f88c3..1ea4a9e 100644 --- a/arch/arm/mach-s5pv310/irq-combiner.c +++ b/arch/arm/mach-s5pv310/irq-combiner.c @@ -24,29 +24,32 @@ static DEFINE_SPINLOCK(irq_controller_lock); struct combiner_chip_data { unsigned int irq_offset; + unsigned int irq_mask; void __iomem *base; }; static struct combiner_chip_data combiner_data[MAX_COMBINER_NR]; -static inline void __iomem *combiner_base(unsigned int irq) +static inline void __iomem *combiner_base(struct irq_data *data) { - struct combiner_chip_data *combiner_data = get_irq_chip_data(irq); + struct combiner_chip_data *combiner_data = + irq_data_get_irq_chip_data(data); + return combiner_data->base; } -static void combiner_mask_irq(unsigned int irq) +static void combiner_mask_irq(struct irq_data *data) { - u32 mask = 1 << (irq % 32); + u32 mask = 1 << (data->irq % 32); - __raw_writel(mask, combiner_base(irq) + COMBINER_ENABLE_CLEAR); + __raw_writel(mask, combiner_base(data) + COMBINER_ENABLE_CLEAR); } -static void combiner_unmask_irq(unsigned int irq) +static void combiner_unmask_irq(struct irq_data *data) { - u32 mask = 1 << (irq % 32); + u32 mask = 1 << (data->irq % 32); - __raw_writel(mask, combiner_base(irq) + COMBINER_ENABLE_SET); + __raw_writel(mask, combiner_base(data) + COMBINER_ENABLE_SET); } static void combiner_handle_cascade_irq(unsigned int irq, struct irq_desc *desc) @@ -57,11 +60,12 @@ static void combiner_handle_cascade_irq(unsigned int irq, struct irq_desc *desc) unsigned long status; /* primary controller ack'ing */ - chip->ack(irq); + chip->irq_ack(&desc->irq_data); spin_lock(&irq_controller_lock); status = __raw_readl(chip_data->base + COMBINER_INT_STATUS); spin_unlock(&irq_controller_lock); + status &= chip_data->irq_mask; if (status == 0) goto out; @@ -76,13 +80,13 @@ static void combiner_handle_cascade_irq(unsigned int irq, struct irq_desc *desc) out: /* primary controller unmasking */ - chip->unmask(irq); + chip->irq_unmask(&desc->irq_data); } static struct irq_chip combiner_chip = { .name = "COMBINER", - .mask = combiner_mask_irq, - .unmask = combiner_unmask_irq, + .irq_mask = combiner_mask_irq, + .irq_unmask = combiner_unmask_irq, }; void __init combiner_cascade_irq(unsigned int combiner_nr, unsigned int irq) @@ -104,10 +108,12 @@ void __init combiner_init(unsigned int combiner_nr, void __iomem *base, combiner_data[combiner_nr].base = base; combiner_data[combiner_nr].irq_offset = irq_start; + combiner_data[combiner_nr].irq_mask = 0xff << ((combiner_nr % 4) << 3); /* Disable all interrupts */ - __raw_writel(0xffffffff, base + COMBINER_ENABLE_CLEAR); + __raw_writel(combiner_data[combiner_nr].irq_mask, + base + COMBINER_ENABLE_CLEAR); /* Setup the Linux IRQ subsystem */ diff --git a/arch/arm/mach-s5pv310/irq-eint.c b/arch/arm/mach-s5pv310/irq-eint.c index 5877503..477bd9e 100644 --- a/arch/arm/mach-s5pv310/irq-eint.c +++ b/arch/arm/mach-s5pv310/irq-eint.c @@ -48,42 +48,43 @@ static unsigned int s5pv310_get_irq_nr(unsigned int number) return ret; } -static inline void s5pv310_irq_eint_mask(unsigned int irq) +static inline void s5pv310_irq_eint_mask(struct irq_data *data) { u32 mask; spin_lock(&eint_lock); - mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(irq))); - mask |= eint_irq_to_bit(irq); - __raw_writel(mask, S5P_EINT_MASK(EINT_REG_NR(irq))); + mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(data->irq))); + mask |= eint_irq_to_bit(data->irq); + __raw_writel(mask, S5P_EINT_MASK(EINT_REG_NR(data->irq))); spin_unlock(&eint_lock); } -static void s5pv310_irq_eint_unmask(unsigned int irq) +static void s5pv310_irq_eint_unmask(struct irq_data *data) { u32 mask; spin_lock(&eint_lock); - mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(irq))); - mask &= ~(eint_irq_to_bit(irq)); - __raw_writel(mask, S5P_EINT_MASK(EINT_REG_NR(irq))); + mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(data->irq))); + mask &= ~(eint_irq_to_bit(data->irq)); + __raw_writel(mask, S5P_EINT_MASK(EINT_REG_NR(data->irq))); spin_unlock(&eint_lock); } -static inline void s5pv310_irq_eint_ack(unsigned int irq) +static inline void s5pv310_irq_eint_ack(struct irq_data *data) { - __raw_writel(eint_irq_to_bit(irq), S5P_EINT_PEND(EINT_REG_NR(irq))); + __raw_writel(eint_irq_to_bit(data->irq), + S5P_EINT_PEND(EINT_REG_NR(data->irq))); } -static void s5pv310_irq_eint_maskack(unsigned int irq) +static void s5pv310_irq_eint_maskack(struct irq_data *data) { - s5pv310_irq_eint_mask(irq); - s5pv310_irq_eint_ack(irq); + s5pv310_irq_eint_mask(data); + s5pv310_irq_eint_ack(data); } -static int s5pv310_irq_eint_set_type(unsigned int irq, unsigned int type) +static int s5pv310_irq_eint_set_type(struct irq_data *data, unsigned int type) { - int offs = EINT_OFFSET(irq); + int offs = EINT_OFFSET(data->irq); int shift; u32 ctrl, mask; u32 newvalue = 0; @@ -118,10 +119,10 @@ static int s5pv310_irq_eint_set_type(unsigned int irq, unsigned int type) mask = 0x7 << shift; spin_lock(&eint_lock); - ctrl = __raw_readl(S5P_EINT_CON(EINT_REG_NR(irq))); + ctrl = __raw_readl(S5P_EINT_CON(EINT_REG_NR(data->irq))); ctrl &= ~mask; ctrl |= newvalue << shift; - __raw_writel(ctrl, S5P_EINT_CON(EINT_REG_NR(irq))); + __raw_writel(ctrl, S5P_EINT_CON(EINT_REG_NR(data->irq))); spin_unlock(&eint_lock); switch (offs) { @@ -146,13 +147,13 @@ static int s5pv310_irq_eint_set_type(unsigned int irq, unsigned int type) static struct irq_chip s5pv310_irq_eint = { .name = "s5pv310-eint", - .mask = s5pv310_irq_eint_mask, - .unmask = s5pv310_irq_eint_unmask, - .mask_ack = s5pv310_irq_eint_maskack, - .ack = s5pv310_irq_eint_ack, - .set_type = s5pv310_irq_eint_set_type, + .irq_mask = s5pv310_irq_eint_mask, + .irq_unmask = s5pv310_irq_eint_unmask, + .irq_mask_ack = s5pv310_irq_eint_maskack, + .irq_ack = s5pv310_irq_eint_ack, + .irq_set_type = s5pv310_irq_eint_set_type, #ifdef CONFIG_PM - .set_wake = s3c_irqext_wake, + .irq_set_wake = s3c_irqext_wake, #endif }; @@ -192,14 +193,14 @@ static void s5pv310_irq_eint0_15(unsigned int irq, struct irq_desc *desc) u32 *irq_data = get_irq_data(irq); struct irq_chip *chip = get_irq_chip(irq); - chip->mask(irq); + chip->irq_mask(&desc->irq_data); - if (chip->ack) - chip->ack(irq); + if (chip->irq_ack) + chip->irq_ack(&desc->irq_data); generic_handle_irq(*irq_data); - chip->unmask(irq); + chip->irq_unmask(&desc->irq_data); } int __init s5pv310_init_irq_eint(void) diff --git a/arch/arm/mach-s5pv310/mach-smdkc210.c b/arch/arm/mach-s5pv310/mach-smdkc210.c index 2b8d4fc..d9cab02 100644 --- a/arch/arm/mach-s5pv310/mach-smdkc210.c +++ b/arch/arm/mach-s5pv310/mach-smdkc210.c @@ -14,18 +14,21 @@ #include <linux/platform_device.h> #include <linux/smsc911x.h> #include <linux/io.h> +#include <linux/i2c.h> #include <asm/mach/arch.h> #include <asm/mach-types.h> #include <plat/regs-serial.h> +#include <plat/regs-srom.h> #include <plat/s5pv310.h> #include <plat/cpu.h> #include <plat/devs.h> #include <plat/sdhci.h> +#include <plat/iic.h> +#include <plat/pd.h> #include <mach/map.h> -#include <mach/regs-srom.h> /* Following are default values for UCON, ULCON and UFCON UART registers */ #define SMDKC210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ @@ -139,13 +142,29 @@ static struct platform_device smdkc210_smsc911x = { }, }; +static struct i2c_board_info i2c_devs1[] __initdata = { + {I2C_BOARD_INFO("wm8994", 0x1a),}, +}; + static struct platform_device *smdkc210_devices[] __initdata = { &s3c_device_hsmmc0, &s3c_device_hsmmc1, &s3c_device_hsmmc2, &s3c_device_hsmmc3, + &s3c_device_i2c1, &s3c_device_rtc, &s3c_device_wdt, + &s5pv310_device_ac97, + &s5pv310_device_i2s0, + &s5pv310_device_pd[PD_MFC], + &s5pv310_device_pd[PD_G3D], + &s5pv310_device_pd[PD_LCD0], + &s5pv310_device_pd[PD_LCD1], + &s5pv310_device_pd[PD_CAM], + &s5pv310_device_pd[PD_TV], + &s5pv310_device_pd[PD_GPS], + &s5pv310_device_sysmmu, + &samsung_asoc_dma, &smdkc210_smsc911x, }; @@ -154,23 +173,22 @@ static void __init smdkc210_smsc911x_init(void) u32 cs1; /* configure nCS1 width to 16 bits */ - cs1 = __raw_readl(S5PV310_SROM_BW) & - ~(S5PV310_SROM_BW__CS_MASK << - S5PV310_SROM_BW__NCS1__SHIFT); - cs1 |= ((1 << S5PV310_SROM_BW__DATAWIDTH__SHIFT) | - (1 << S5PV310_SROM_BW__WAITENABLE__SHIFT) | - (1 << S5PV310_SROM_BW__BYTEENABLE__SHIFT)) << - S5PV310_SROM_BW__NCS1__SHIFT; - __raw_writel(cs1, S5PV310_SROM_BW); + cs1 = __raw_readl(S5P_SROM_BW) & + ~(S5P_SROM_BW__CS_MASK << S5P_SROM_BW__NCS1__SHIFT); + cs1 |= ((1 << S5P_SROM_BW__DATAWIDTH__SHIFT) | + (1 << S5P_SROM_BW__WAITENABLE__SHIFT) | + (1 << S5P_SROM_BW__BYTEENABLE__SHIFT)) << + S5P_SROM_BW__NCS1__SHIFT; + __raw_writel(cs1, S5P_SROM_BW); /* set timing for nCS1 suitable for ethernet chip */ - __raw_writel((0x1 << S5PV310_SROM_BCX__PMC__SHIFT) | - (0x9 << S5PV310_SROM_BCX__TACP__SHIFT) | - (0xc << S5PV310_SROM_BCX__TCAH__SHIFT) | - (0x1 << S5PV310_SROM_BCX__TCOH__SHIFT) | - (0x6 << S5PV310_SROM_BCX__TACC__SHIFT) | - (0x1 << S5PV310_SROM_BCX__TCOS__SHIFT) | - (0x1 << S5PV310_SROM_BCX__TACS__SHIFT), S5PV310_SROM_BC1); + __raw_writel((0x1 << S5P_SROM_BCX__PMC__SHIFT) | + (0x9 << S5P_SROM_BCX__TACP__SHIFT) | + (0xc << S5P_SROM_BCX__TCAH__SHIFT) | + (0x1 << S5P_SROM_BCX__TCOH__SHIFT) | + (0x6 << S5P_SROM_BCX__TACC__SHIFT) | + (0x1 << S5P_SROM_BCX__TCOS__SHIFT) | + (0x1 << S5P_SROM_BCX__TACS__SHIFT), S5P_SROM_BC1); } static void __init smdkc210_map_io(void) @@ -182,6 +200,9 @@ static void __init smdkc210_map_io(void) static void __init smdkc210_machine_init(void) { + s3c_i2c1_set_platdata(NULL); + i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1)); + smdkc210_smsc911x_init(); s3c_sdhci0_set_platdata(&smdkc210_hsmmc0_pdata); diff --git a/arch/arm/mach-s5pv310/mach-smdkv310.c b/arch/arm/mach-s5pv310/mach-smdkv310.c index 35826d6..b1cddbf 100644 --- a/arch/arm/mach-s5pv310/mach-smdkv310.c +++ b/arch/arm/mach-s5pv310/mach-smdkv310.c @@ -14,18 +14,21 @@ #include <linux/platform_device.h> #include <linux/smsc911x.h> #include <linux/io.h> +#include <linux/i2c.h> #include <asm/mach/arch.h> #include <asm/mach-types.h> #include <plat/regs-serial.h> +#include <plat/regs-srom.h> #include <plat/s5pv310.h> #include <plat/cpu.h> #include <plat/devs.h> #include <plat/sdhci.h> +#include <plat/iic.h> +#include <plat/pd.h> #include <mach/map.h> -#include <mach/regs-srom.h> /* Following are default values for UCON, ULCON and UFCON UART registers */ #define SMDKV310_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ @@ -139,13 +142,29 @@ static struct platform_device smdkv310_smsc911x = { }, }; +static struct i2c_board_info i2c_devs1[] __initdata = { + {I2C_BOARD_INFO("wm8994", 0x1a),}, +}; + static struct platform_device *smdkv310_devices[] __initdata = { &s3c_device_hsmmc0, &s3c_device_hsmmc1, &s3c_device_hsmmc2, &s3c_device_hsmmc3, + &s3c_device_i2c1, &s3c_device_rtc, &s3c_device_wdt, + &s5pv310_device_ac97, + &s5pv310_device_i2s0, + &s5pv310_device_pd[PD_MFC], + &s5pv310_device_pd[PD_G3D], + &s5pv310_device_pd[PD_LCD0], + &s5pv310_device_pd[PD_LCD1], + &s5pv310_device_pd[PD_CAM], + &s5pv310_device_pd[PD_TV], + &s5pv310_device_pd[PD_GPS], + &s5pv310_device_sysmmu, + &samsung_asoc_dma, &smdkv310_smsc911x, }; @@ -154,23 +173,22 @@ static void __init smdkv310_smsc911x_init(void) u32 cs1; /* configure nCS1 width to 16 bits */ - cs1 = __raw_readl(S5PV310_SROM_BW) & - ~(S5PV310_SROM_BW__CS_MASK << - S5PV310_SROM_BW__NCS1__SHIFT); - cs1 |= ((1 << S5PV310_SROM_BW__DATAWIDTH__SHIFT) | - (1 << S5PV310_SROM_BW__WAITENABLE__SHIFT) | - (1 << S5PV310_SROM_BW__BYTEENABLE__SHIFT)) << - S5PV310_SROM_BW__NCS1__SHIFT; - __raw_writel(cs1, S5PV310_SROM_BW); + cs1 = __raw_readl(S5P_SROM_BW) & + ~(S5P_SROM_BW__CS_MASK << S5P_SROM_BW__NCS1__SHIFT); + cs1 |= ((1 << S5P_SROM_BW__DATAWIDTH__SHIFT) | + (1 << S5P_SROM_BW__WAITENABLE__SHIFT) | + (1 << S5P_SROM_BW__BYTEENABLE__SHIFT)) << + S5P_SROM_BW__NCS1__SHIFT; + __raw_writel(cs1, S5P_SROM_BW); /* set timing for nCS1 suitable for ethernet chip */ - __raw_writel((0x1 << S5PV310_SROM_BCX__PMC__SHIFT) | - (0x9 << S5PV310_SROM_BCX__TACP__SHIFT) | - (0xc << S5PV310_SROM_BCX__TCAH__SHIFT) | - (0x1 << S5PV310_SROM_BCX__TCOH__SHIFT) | - (0x6 << S5PV310_SROM_BCX__TACC__SHIFT) | - (0x1 << S5PV310_SROM_BCX__TCOS__SHIFT) | - (0x1 << S5PV310_SROM_BCX__TACS__SHIFT), S5PV310_SROM_BC1); + __raw_writel((0x1 << S5P_SROM_BCX__PMC__SHIFT) | + (0x9 << S5P_SROM_BCX__TACP__SHIFT) | + (0xc << S5P_SROM_BCX__TCAH__SHIFT) | + (0x1 << S5P_SROM_BCX__TCOH__SHIFT) | + (0x6 << S5P_SROM_BCX__TACC__SHIFT) | + (0x1 << S5P_SROM_BCX__TCOS__SHIFT) | + (0x1 << S5P_SROM_BCX__TACS__SHIFT), S5P_SROM_BC1); } static void __init smdkv310_map_io(void) @@ -182,6 +200,9 @@ static void __init smdkv310_map_io(void) static void __init smdkv310_machine_init(void) { + s3c_i2c1_set_platdata(NULL); + i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1)); + smdkv310_smsc911x_init(); s3c_sdhci0_set_platdata(&smdkv310_hsmmc0_pdata); diff --git a/arch/arm/mach-s5pv310/mach-universal_c210.c b/arch/arm/mach-s5pv310/mach-universal_c210.c index 16d8fc0..36bc3cf 100644 --- a/arch/arm/mach-s5pv310/mach-universal_c210.c +++ b/arch/arm/mach-s5pv310/mach-universal_c210.c @@ -13,6 +13,9 @@ #include <linux/i2c.h> #include <linux/gpio_keys.h> #include <linux/gpio.h> +#include <linux/regulator/machine.h> +#include <linux/regulator/fixed.h> +#include <linux/mmc/host.h> #include <asm/mach/arch.h> #include <asm/mach-types.h> @@ -21,6 +24,7 @@ #include <plat/s5pv310.h> #include <plat/cpu.h> #include <plat/devs.h> +#include <plat/sdhci.h> #include <mach/map.h> @@ -116,6 +120,73 @@ static struct platform_device universal_gpio_keys = { }, }; +/* eMMC */ +static struct s3c_sdhci_platdata universal_hsmmc0_data __initdata = { + .max_width = 8, + .host_caps = (MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA | + MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED | + MMC_CAP_DISABLE), + .cd_type = S3C_SDHCI_CD_PERMANENT, + .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL, +}; + +static struct regulator_consumer_supply mmc0_supplies[] = { + REGULATOR_SUPPLY("vmmc", "s3c-sdhci.0"), +}; + +static struct regulator_init_data mmc0_fixed_voltage_init_data = { + .constraints = { + .name = "VMEM_VDD_2.8V", + .valid_ops_mask = REGULATOR_CHANGE_STATUS, + }, + .num_consumer_supplies = ARRAY_SIZE(mmc0_supplies), + .consumer_supplies = mmc0_supplies, +}; + +static struct fixed_voltage_config mmc0_fixed_voltage_config = { + .supply_name = "MASSMEMORY_EN", + .microvolts = 2800000, + .gpio = S5PV310_GPE1(3), + .enable_high = true, + .init_data = &mmc0_fixed_voltage_init_data, +}; + +static struct platform_device mmc0_fixed_voltage = { + .name = "reg-fixed-voltage", + .id = 0, + .dev = { + .platform_data = &mmc0_fixed_voltage_config, + }, +}; + +/* SD */ +static struct s3c_sdhci_platdata universal_hsmmc2_data __initdata = { + .max_width = 4, + .host_caps = MMC_CAP_4_BIT_DATA | + MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED | + MMC_CAP_DISABLE, + .ext_cd_gpio = S5PV310_GPX3(4), /* XEINT_28 */ + .ext_cd_gpio_invert = 1, + .cd_type = S3C_SDHCI_CD_GPIO, + .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL, +}; + +/* WiFi */ +static struct s3c_sdhci_platdata universal_hsmmc3_data __initdata = { + .max_width = 4, + .host_caps = MMC_CAP_4_BIT_DATA | + MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED | + MMC_CAP_DISABLE, + .cd_type = S3C_SDHCI_CD_EXTERNAL, +}; + +static void __init universal_sdhci_init(void) +{ + s3c_sdhci0_set_platdata(&universal_hsmmc0_data); + s3c_sdhci2_set_platdata(&universal_hsmmc2_data); + s3c_sdhci3_set_platdata(&universal_hsmmc3_data); +} + /* I2C0 */ static struct i2c_board_info i2c0_devs[] __initdata = { /* Camera, To be updated */ @@ -127,6 +198,13 @@ static struct i2c_board_info i2c1_devs[] __initdata = { }; static struct platform_device *universal_devices[] __initdata = { + /* Samsung Platform Devices */ + &mmc0_fixed_voltage, + &s3c_device_hsmmc0, + &s3c_device_hsmmc2, + &s3c_device_hsmmc3, + + /* Universal Devices */ &universal_gpio_keys, &s5p_device_onenand, }; @@ -140,6 +218,8 @@ static void __init universal_map_io(void) static void __init universal_machine_init(void) { + universal_sdhci_init(); + i2c_register_board_info(0, i2c0_devs, ARRAY_SIZE(i2c0_devs)); i2c_register_board_info(1, i2c1_devs, ARRAY_SIZE(i2c1_devs)); diff --git a/arch/arm/mach-sa1100/generic.c b/arch/arm/mach-sa1100/generic.c index 59d14f0..e21f347 100644 --- a/arch/arm/mach-sa1100/generic.c +++ b/arch/arm/mach-sa1100/generic.c @@ -21,7 +21,6 @@ #include <asm/div64.h> #include <mach/hardware.h> #include <asm/system.h> -#include <asm/pgtable.h> #include <asm/mach/map.h> #include <asm/mach/flash.h> #include <asm/irq.h> diff --git a/arch/arm/mach-sa1100/irq.c b/arch/arm/mach-sa1100/irq.c index 3093d46..3d85dfa 100644 --- a/arch/arm/mach-sa1100/irq.c +++ b/arch/arm/mach-sa1100/irq.c @@ -37,14 +37,14 @@ static int GPIO_IRQ_mask = (1 << 11) - 1; #define GPIO_11_27_IRQ(i) ((i) - 21) #define GPIO11_27_MASK(irq) (1 << GPIO_11_27_IRQ(irq)) -static int sa1100_gpio_type(unsigned int irq, unsigned int type) +static int sa1100_gpio_type(struct irq_data *d, unsigned int type) { unsigned int mask; - if (irq <= 10) - mask = 1 << irq; + if (d->irq <= 10) + mask = 1 << d->irq; else - mask = GPIO11_27_MASK(irq); + mask = GPIO11_27_MASK(d->irq); if (type == IRQ_TYPE_PROBE) { if ((GPIO_IRQ_rising_edge | GPIO_IRQ_falling_edge) & mask) @@ -70,37 +70,37 @@ static int sa1100_gpio_type(unsigned int irq, unsigned int type) /* * GPIO IRQs must be acknowledged. This is for IRQs from 0 to 10. */ -static void sa1100_low_gpio_ack(unsigned int irq) +static void sa1100_low_gpio_ack(struct irq_data *d) { - GEDR = (1 << irq); + GEDR = (1 << d->irq); } -static void sa1100_low_gpio_mask(unsigned int irq) +static void sa1100_low_gpio_mask(struct irq_data *d) { - ICMR &= ~(1 << irq); + ICMR &= ~(1 << d->irq); } -static void sa1100_low_gpio_unmask(unsigned int irq) +static void sa1100_low_gpio_unmask(struct irq_data *d) { - ICMR |= 1 << irq; + ICMR |= 1 << d->irq; } -static int sa1100_low_gpio_wake(unsigned int irq, unsigned int on) +static int sa1100_low_gpio_wake(struct irq_data *d, unsigned int on) { if (on) - PWER |= 1 << irq; + PWER |= 1 << d->irq; else - PWER &= ~(1 << irq); + PWER &= ~(1 << d->irq); return 0; } static struct irq_chip sa1100_low_gpio_chip = { .name = "GPIO-l", - .ack = sa1100_low_gpio_ack, - .mask = sa1100_low_gpio_mask, - .unmask = sa1100_low_gpio_unmask, - .set_type = sa1100_gpio_type, - .set_wake = sa1100_low_gpio_wake, + .irq_ack = sa1100_low_gpio_ack, + .irq_mask = sa1100_low_gpio_mask, + .irq_unmask = sa1100_low_gpio_unmask, + .irq_set_type = sa1100_gpio_type, + .irq_set_wake = sa1100_low_gpio_wake, }; /* @@ -139,16 +139,16 @@ sa1100_high_gpio_handler(unsigned int irq, struct irq_desc *desc) * In addition, the IRQs are all collected up into one bit in the * interrupt controller registers. */ -static void sa1100_high_gpio_ack(unsigned int irq) +static void sa1100_high_gpio_ack(struct irq_data *d) { - unsigned int mask = GPIO11_27_MASK(irq); + unsigned int mask = GPIO11_27_MASK(d->irq); GEDR = mask; } -static void sa1100_high_gpio_mask(unsigned int irq) +static void sa1100_high_gpio_mask(struct irq_data *d) { - unsigned int mask = GPIO11_27_MASK(irq); + unsigned int mask = GPIO11_27_MASK(d->irq); GPIO_IRQ_mask &= ~mask; @@ -156,9 +156,9 @@ static void sa1100_high_gpio_mask(unsigned int irq) GFER &= ~mask; } -static void sa1100_high_gpio_unmask(unsigned int irq) +static void sa1100_high_gpio_unmask(struct irq_data *d) { - unsigned int mask = GPIO11_27_MASK(irq); + unsigned int mask = GPIO11_27_MASK(d->irq); GPIO_IRQ_mask |= mask; @@ -166,44 +166,44 @@ static void sa1100_high_gpio_unmask(unsigned int irq) GFER = GPIO_IRQ_falling_edge & GPIO_IRQ_mask; } -static int sa1100_high_gpio_wake(unsigned int irq, unsigned int on) +static int sa1100_high_gpio_wake(struct irq_data *d, unsigned int on) { if (on) - PWER |= GPIO11_27_MASK(irq); + PWER |= GPIO11_27_MASK(d->irq); else - PWER &= ~GPIO11_27_MASK(irq); + PWER &= ~GPIO11_27_MASK(d->irq); return 0; } static struct irq_chip sa1100_high_gpio_chip = { .name = "GPIO-h", - .ack = sa1100_high_gpio_ack, - .mask = sa1100_high_gpio_mask, - .unmask = sa1100_high_gpio_unmask, - .set_type = sa1100_gpio_type, - .set_wake = sa1100_high_gpio_wake, + .irq_ack = sa1100_high_gpio_ack, + .irq_mask = sa1100_high_gpio_mask, + .irq_unmask = sa1100_high_gpio_unmask, + .irq_set_type = sa1100_gpio_type, + .irq_set_wake = sa1100_high_gpio_wake, }; /* * We don't need to ACK IRQs on the SA1100 unless they're GPIOs * this is for internal IRQs i.e. from 11 to 31. */ -static void sa1100_mask_irq(unsigned int irq) +static void sa1100_mask_irq(struct irq_data *d) { - ICMR &= ~(1 << irq); + ICMR &= ~(1 << d->irq); } -static void sa1100_unmask_irq(unsigned int irq) +static void sa1100_unmask_irq(struct irq_data *d) { - ICMR |= (1 << irq); + ICMR |= (1 << d->irq); } /* * Apart form GPIOs, only the RTC alarm can be a wakeup event. */ -static int sa1100_set_wake(unsigned int irq, unsigned int on) +static int sa1100_set_wake(struct irq_data *d, unsigned int on) { - if (irq == IRQ_RTCAlrm) { + if (d->irq == IRQ_RTCAlrm) { if (on) PWER |= PWER_RTC; else @@ -215,10 +215,10 @@ static int sa1100_set_wake(unsigned int irq, unsigned int on) static struct irq_chip sa1100_normal_chip = { .name = "SC", - .ack = sa1100_mask_irq, - .mask = sa1100_mask_irq, - .unmask = sa1100_unmask_irq, - .set_wake = sa1100_set_wake, + .irq_ack = sa1100_mask_irq, + .irq_mask = sa1100_mask_irq, + .irq_unmask = sa1100_unmask_irq, + .irq_set_wake = sa1100_set_wake, }; static struct resource irq_resource = { diff --git a/arch/arm/mach-sa1100/neponset.c b/arch/arm/mach-sa1100/neponset.c index c601a75..4aad01f 100644 --- a/arch/arm/mach-sa1100/neponset.c +++ b/arch/arm/mach-sa1100/neponset.c @@ -35,7 +35,7 @@ neponset_irq_handler(unsigned int irq, struct irq_desc *desc) /* * Acknowledge the parent IRQ. */ - desc->chip->ack(irq); + desc->irq_data.chip->irq_ack(&desc->irq_data); /* * Read the interrupt reason register. Let's have all @@ -53,7 +53,7 @@ neponset_irq_handler(unsigned int irq, struct irq_desc *desc) * recheck the register for any pending IRQs. */ if (irr & (IRR_ETHERNET | IRR_USAR)) { - desc->chip->mask(irq); + desc->irq_data.chip->irq_mask(&desc->irq_data); /* * Ack the interrupt now to prevent re-entering @@ -61,7 +61,7 @@ neponset_irq_handler(unsigned int irq, struct irq_desc *desc) * since we'll check the IRR register prior to * leaving. */ - desc->chip->ack(irq); + desc->irq_data.chip->irq_ack(&desc->irq_data); if (irr & IRR_ETHERNET) { generic_handle_irq(IRQ_NEPONSET_SMC9196); @@ -71,7 +71,7 @@ neponset_irq_handler(unsigned int irq, struct irq_desc *desc) generic_handle_irq(IRQ_NEPONSET_USAR); } - desc->chip->unmask(irq); + desc->irq_data.chip->irq_unmask(&desc->irq_data); } if (irr & IRR_SA1111) { diff --git a/arch/arm/mach-shark/irq.c b/arch/arm/mach-shark/irq.c index c04eb6a..831fc66 100644 --- a/arch/arm/mach-shark/irq.c +++ b/arch/arm/mach-shark/irq.c @@ -30,35 +30,35 @@ static unsigned char cached_irq_mask[2] = { 0xfb, 0xff }; * These have to be protected by the irq controller spinlock * before being called. */ -static void shark_disable_8259A_irq(unsigned int irq) +static void shark_disable_8259A_irq(struct irq_data *d) { unsigned int mask; - if (irq<8) { - mask = 1 << irq; + if (d->irq<8) { + mask = 1 << d->irq; cached_irq_mask[0] |= mask; outb(cached_irq_mask[1],0xA1); } else { - mask = 1 << (irq-8); + mask = 1 << (d->irq-8); cached_irq_mask[1] |= mask; outb(cached_irq_mask[0],0x21); } } -static void shark_enable_8259A_irq(unsigned int irq) +static void shark_enable_8259A_irq(struct irq_data *d) { unsigned int mask; - if (irq<8) { - mask = ~(1 << irq); + if (d->irq<8) { + mask = ~(1 << d->irq); cached_irq_mask[0] &= mask; outb(cached_irq_mask[0],0x21); } else { - mask = ~(1 << (irq-8)); + mask = ~(1 << (d->irq-8)); cached_irq_mask[1] &= mask; outb(cached_irq_mask[1],0xA1); } } -static void shark_ack_8259A_irq(unsigned int irq){} +static void shark_ack_8259A_irq(struct irq_data *d){} static irqreturn_t bogus_int(int irq, void *dev_id) { @@ -69,10 +69,10 @@ static irqreturn_t bogus_int(int irq, void *dev_id) static struct irqaction cascade; static struct irq_chip fb_chip = { - .name = "XT-PIC", - .ack = shark_ack_8259A_irq, - .mask = shark_disable_8259A_irq, - .unmask = shark_enable_8259A_irq, + .name = "XT-PIC", + .irq_ack = shark_ack_8259A_irq, + .irq_mask = shark_disable_8259A_irq, + .irq_unmask = shark_enable_8259A_irq, }; void __init shark_init_irq(void) diff --git a/arch/arm/mach-stmp378x/stmp378x.c b/arch/arm/mach-stmp378x/stmp378x.c index ddd49a7..c2f9fe04 100644 --- a/arch/arm/mach-stmp378x/stmp378x.c +++ b/arch/arm/mach-stmp378x/stmp378x.c @@ -47,7 +47,7 @@ /* * IRQ handling */ -static void stmp378x_ack_irq(unsigned int irq) +static void stmp378x_ack_irq(struct irq_data *d) { /* Tell ICOLL to release IRQ line */ __raw_writel(0, REGS_ICOLL_BASE + HW_ICOLL_VECTOR); @@ -60,24 +60,24 @@ static void stmp378x_ack_irq(unsigned int irq) (void)__raw_readl(REGS_ICOLL_BASE + HW_ICOLL_STAT); } -static void stmp378x_mask_irq(unsigned int irq) +static void stmp378x_mask_irq(struct irq_data *d) { /* IRQ disable */ stmp3xxx_clearl(BM_ICOLL_INTERRUPTn_ENABLE, - REGS_ICOLL_BASE + HW_ICOLL_INTERRUPTn + irq * 0x10); + REGS_ICOLL_BASE + HW_ICOLL_INTERRUPTn + d->irq * 0x10); } -static void stmp378x_unmask_irq(unsigned int irq) +static void stmp378x_unmask_irq(struct irq_data *d) { /* IRQ enable */ stmp3xxx_setl(BM_ICOLL_INTERRUPTn_ENABLE, - REGS_ICOLL_BASE + HW_ICOLL_INTERRUPTn + irq * 0x10); + REGS_ICOLL_BASE + HW_ICOLL_INTERRUPTn + d->irq * 0x10); } static struct irq_chip stmp378x_chip = { - .ack = stmp378x_ack_irq, - .mask = stmp378x_mask_irq, - .unmask = stmp378x_unmask_irq, + .irq_ack = stmp378x_ack_irq, + .irq_mask = stmp378x_mask_irq, + .irq_unmask = stmp378x_unmask_irq, }; void __init stmp378x_init_irq(void) diff --git a/arch/arm/mach-stmp37xx/stmp37xx.c b/arch/arm/mach-stmp37xx/stmp37xx.c index 8c7d6fb..a9aed06 100644 --- a/arch/arm/mach-stmp37xx/stmp37xx.c +++ b/arch/arm/mach-stmp37xx/stmp37xx.c @@ -43,11 +43,11 @@ /* * IRQ handling */ -static void stmp37xx_ack_irq(unsigned int irq) +static void stmp37xx_ack_irq(struct irq_data *d) { /* Disable IRQ */ - stmp3xxx_clearl(0x04 << ((irq % 4) * 8), - REGS_ICOLL_BASE + HW_ICOLL_PRIORITYn + irq / 4 * 0x10); + stmp3xxx_clearl(0x04 << ((d->irq % 4) * 8), + REGS_ICOLL_BASE + HW_ICOLL_PRIORITYn + d->irq / 4 * 0x10); /* ACK current interrupt */ __raw_writel(1, REGS_ICOLL_BASE + HW_ICOLL_LEVELACK); @@ -56,24 +56,24 @@ static void stmp37xx_ack_irq(unsigned int irq) (void)__raw_readl(REGS_ICOLL_BASE + HW_ICOLL_STAT); } -static void stmp37xx_mask_irq(unsigned int irq) +static void stmp37xx_mask_irq(struct irq_data *d) { /* IRQ disable */ - stmp3xxx_clearl(0x04 << ((irq % 4) * 8), - REGS_ICOLL_BASE + HW_ICOLL_PRIORITYn + irq / 4 * 0x10); + stmp3xxx_clearl(0x04 << ((d->irq % 4) * 8), + REGS_ICOLL_BASE + HW_ICOLL_PRIORITYn + d->irq / 4 * 0x10); } -static void stmp37xx_unmask_irq(unsigned int irq) +static void stmp37xx_unmask_irq(struct irq_data *d) { /* IRQ enable */ - stmp3xxx_setl(0x04 << ((irq % 4) * 8), - REGS_ICOLL_BASE + HW_ICOLL_PRIORITYn + irq / 4 * 0x10); + stmp3xxx_setl(0x04 << ((d->irq % 4) * 8), + REGS_ICOLL_BASE + HW_ICOLL_PRIORITYn + d->irq / 4 * 0x10); } static struct irq_chip stmp37xx_chip = { - .ack = stmp37xx_ack_irq, - .mask = stmp37xx_mask_irq, - .unmask = stmp37xx_unmask_irq, + .irq_ack = stmp37xx_ack_irq, + .irq_mask = stmp37xx_mask_irq, + .irq_unmask = stmp37xx_unmask_irq, }; void __init stmp37xx_init_irq(void) diff --git a/arch/arm/mach-tcc8k/irq.c b/arch/arm/mach-tcc8k/irq.c index 34575c4..aa9231f 100644 --- a/arch/arm/mach-tcc8k/irq.c +++ b/arch/arm/mach-tcc8k/irq.c @@ -18,65 +18,65 @@ #include "common.h" /* Disable IRQ */ -static void tcc8000_mask_ack_irq0(unsigned int irq) +static void tcc8000_mask_ack_irq0(struct irq_data *d) { - PIC0_IEN &= ~(1 << irq); - PIC0_CREQ |= (1 << irq); + PIC0_IEN &= ~(1 << d->irq); + PIC0_CREQ |= (1 << d->irq); } -static void tcc8000_mask_ack_irq1(unsigned int irq) +static void tcc8000_mask_ack_irq1(struct irq_data *d) { - PIC1_IEN &= ~(1 << (irq - 32)); - PIC1_CREQ |= (1 << (irq - 32)); + PIC1_IEN &= ~(1 << (d->irq - 32)); + PIC1_CREQ |= (1 << (d->irq - 32)); } -static void tcc8000_mask_irq0(unsigned int irq) +static void tcc8000_mask_irq0(struct irq_data *d) { - PIC0_IEN &= ~(1 << irq); + PIC0_IEN &= ~(1 << d->irq); } -static void tcc8000_mask_irq1(unsigned int irq) +static void tcc8000_mask_irq1(struct irq_data *d) { - PIC1_IEN &= ~(1 << (irq - 32)); + PIC1_IEN &= ~(1 << (d->irq - 32)); } -static void tcc8000_ack_irq0(unsigned int irq) +static void tcc8000_ack_irq0(struct irq_data *d) { - PIC0_CREQ |= (1 << irq); + PIC0_CREQ |= (1 << d->irq); } -static void tcc8000_ack_irq1(unsigned int irq) +static void tcc8000_ack_irq1(struct irq_data *d) { - PIC1_CREQ |= (1 << (irq - 32)); + PIC1_CREQ |= (1 << (d->irq - 32)); } /* Enable IRQ */ -static void tcc8000_unmask_irq0(unsigned int irq) +static void tcc8000_unmask_irq0(struct irq_data *d) { - PIC0_IEN |= (1 << irq); - PIC0_INTOEN |= (1 << irq); + PIC0_IEN |= (1 << d->irq); + PIC0_INTOEN |= (1 << d->irq); } -static void tcc8000_unmask_irq1(unsigned int irq) +static void tcc8000_unmask_irq1(struct irq_data *d) { - PIC1_IEN |= (1 << (irq - 32)); - PIC1_INTOEN |= (1 << (irq - 32)); + PIC1_IEN |= (1 << (d->irq - 32)); + PIC1_INTOEN |= (1 << (d->irq - 32)); } static struct irq_chip tcc8000_irq_chip0 = { .name = "tcc_irq0", - .mask = tcc8000_mask_irq0, - .ack = tcc8000_ack_irq0, - .mask_ack = tcc8000_mask_ack_irq0, - .unmask = tcc8000_unmask_irq0, + .irq_mask = tcc8000_mask_irq0, + .irq_ack = tcc8000_ack_irq0, + .irq_mask_ack = tcc8000_mask_ack_irq0, + .irq_unmask = tcc8000_unmask_irq0, }; static struct irq_chip tcc8000_irq_chip1 = { .name = "tcc_irq1", - .mask = tcc8000_mask_irq1, - .ack = tcc8000_ack_irq1, - .mask_ack = tcc8000_mask_ack_irq1, - .unmask = tcc8000_unmask_irq1, + .irq_mask = tcc8000_mask_irq1, + .irq_ack = tcc8000_ack_irq1, + .irq_mask_ack = tcc8000_mask_ack_irq1, + .irq_unmask = tcc8000_unmask_irq1, }; void __init tcc8k_init_irq(void) diff --git a/arch/arm/mach-tegra/gpio.c b/arch/arm/mach-tegra/gpio.c index 0775265..bd06620 100644 --- a/arch/arm/mach-tegra/gpio.c +++ b/arch/arm/mach-tegra/gpio.c @@ -142,31 +142,31 @@ static struct gpio_chip tegra_gpio_chip = { .ngpio = TEGRA_NR_GPIOS, }; -static void tegra_gpio_irq_ack(unsigned int irq) +static void tegra_gpio_irq_ack(struct irq_data *d) { - int gpio = irq - INT_GPIO_BASE; + int gpio = d->irq - INT_GPIO_BASE; __raw_writel(1 << GPIO_BIT(gpio), GPIO_INT_CLR(gpio)); } -static void tegra_gpio_irq_mask(unsigned int irq) +static void tegra_gpio_irq_mask(struct irq_data *d) { - int gpio = irq - INT_GPIO_BASE; + int gpio = d->irq - INT_GPIO_BASE; tegra_gpio_mask_write(GPIO_MSK_INT_ENB(gpio), gpio, 0); } -static void tegra_gpio_irq_unmask(unsigned int irq) +static void tegra_gpio_irq_unmask(struct irq_data *d) { - int gpio = irq - INT_GPIO_BASE; + int gpio = d->irq - INT_GPIO_BASE; tegra_gpio_mask_write(GPIO_MSK_INT_ENB(gpio), gpio, 1); } -static int tegra_gpio_irq_set_type(unsigned int irq, unsigned int type) +static int tegra_gpio_irq_set_type(struct irq_data *d, unsigned int type) { - int gpio = irq - INT_GPIO_BASE; - struct tegra_gpio_bank *bank = get_irq_chip_data(irq); + int gpio = d->irq - INT_GPIO_BASE; + struct tegra_gpio_bank *bank = irq_data_get_irq_chip_data(d); int port = GPIO_PORT(gpio); int lvl_type; int val; @@ -221,7 +221,7 @@ static void tegra_gpio_irq_handler(unsigned int irq, struct irq_desc *desc) int pin; int unmasked = 0; - desc->chip->ack(irq); + desc->irq_data.chip->irq_ack(&desc->irq_data); bank = get_irq_data(irq); @@ -240,7 +240,7 @@ static void tegra_gpio_irq_handler(unsigned int irq, struct irq_desc *desc) */ if (lvl & (0x100 << pin)) { unmasked = 1; - desc->chip->unmask(irq); + desc->irq_data.chip->irq_unmask(&desc->irq_data); } generic_handle_irq(gpio_to_irq(gpio + pin)); @@ -248,7 +248,7 @@ static void tegra_gpio_irq_handler(unsigned int irq, struct irq_desc *desc) } if (!unmasked) - desc->chip->unmask(irq); + desc->irq_data.chip->irq_unmask(&desc->irq_data); } @@ -316,21 +316,21 @@ void tegra_gpio_suspend(void) local_irq_restore(flags); } -static int tegra_gpio_wake_enable(unsigned int irq, unsigned int enable) +static int tegra_gpio_wake_enable(struct irq_data *d, unsigned int enable) { - struct tegra_gpio_bank *bank = get_irq_chip_data(irq); + struct tegra_gpio_bank *bank = irq_data_get_irq_chip_data(d); return set_irq_wake(bank->irq, enable); } #endif static struct irq_chip tegra_gpio_irq_chip = { .name = "GPIO", - .ack = tegra_gpio_irq_ack, - .mask = tegra_gpio_irq_mask, - .unmask = tegra_gpio_irq_unmask, - .set_type = tegra_gpio_irq_set_type, + .irq_ack = tegra_gpio_irq_ack, + .irq_mask = tegra_gpio_irq_mask, + .irq_unmask = tegra_gpio_irq_unmask, + .irq_set_type = tegra_gpio_irq_set_type, #ifdef CONFIG_PM - .set_wake = tegra_gpio_wake_enable, + .irq_set_wake = tegra_gpio_wake_enable, #endif }; diff --git a/arch/arm/mach-tegra/hotplug.c b/arch/arm/mach-tegra/hotplug.c index a5cb1ce..f329404 100644 --- a/arch/arm/mach-tegra/hotplug.c +++ b/arch/arm/mach-tegra/hotplug.c @@ -26,10 +26,10 @@ static inline void cpu_enter_lowpower(void) * Turn off coherency */ " mrc p15, 0, %0, c1, c0, 1\n" - " bic %0, %0, %2\n" + " bic %0, %0, #0x20\n" " mcr p15, 0, %0, c1, c0, 1\n" " mrc p15, 0, %0, c1, c0, 0\n" - " bic %0, %0, #0x04\n" + " bic %0, %0, %2\n" " mcr p15, 0, %0, c1, c0, 0\n" : "=&r" (v) : "r" (0), "Ir" (CR_C) diff --git a/arch/arm/mach-tegra/irq.c b/arch/arm/mach-tegra/irq.c index 5407de0..de7dfad 100644 --- a/arch/arm/mach-tegra/irq.c +++ b/arch/arm/mach-tegra/irq.c @@ -46,30 +46,30 @@ #define ICTLR_COP_IER_CLR 0x38 #define ICTLR_COP_IEP_CLASS 0x3c -static void (*gic_mask_irq)(unsigned int irq); -static void (*gic_unmask_irq)(unsigned int irq); +static void (*gic_mask_irq)(struct irq_data *d); +static void (*gic_unmask_irq)(struct irq_data *d); #define irq_to_ictlr(irq) (((irq)-32) >> 5) static void __iomem *tegra_ictlr_base = IO_ADDRESS(TEGRA_PRIMARY_ICTLR_BASE); #define ictlr_to_virt(ictlr) (tegra_ictlr_base + (ictlr)*0x100) -static void tegra_mask(unsigned int irq) +static void tegra_mask(struct irq_data *d) { - void __iomem *addr = ictlr_to_virt(irq_to_ictlr(irq)); - gic_mask_irq(irq); - writel(1<<(irq&31), addr+ICTLR_CPU_IER_CLR); + void __iomem *addr = ictlr_to_virt(irq_to_ictlr(d->irq)); + gic_mask_irq(d); + writel(1<<(d->irq&31), addr+ICTLR_CPU_IER_CLR); } -static void tegra_unmask(unsigned int irq) +static void tegra_unmask(struct irq_data *d) { - void __iomem *addr = ictlr_to_virt(irq_to_ictlr(irq)); - gic_unmask_irq(irq); - writel(1<<(irq&31), addr+ICTLR_CPU_IER_SET); + void __iomem *addr = ictlr_to_virt(irq_to_ictlr(d->irq)); + gic_unmask_irq(d); + writel(1<<(d->irq&31), addr+ICTLR_CPU_IER_SET); } #ifdef CONFIG_PM -static int tegra_set_wake(unsigned int irq, unsigned int on) +static int tegra_set_wake(struct irq_data *d, unsigned int on) { return 0; } @@ -77,10 +77,10 @@ static int tegra_set_wake(unsigned int irq, unsigned int on) static struct irq_chip tegra_irq = { .name = "PPI", - .mask = tegra_mask, - .unmask = tegra_unmask, + .irq_mask = tegra_mask, + .irq_unmask = tegra_unmask, #ifdef CONFIG_PM - .set_wake = tegra_set_wake, + .irq_set_wake = tegra_set_wake, #endif }; @@ -98,11 +98,11 @@ void __init tegra_init_irq(void) IO_ADDRESS(TEGRA_ARM_PERIF_BASE + 0x100)); gic = get_irq_chip(29); - gic_unmask_irq = gic->unmask; - gic_mask_irq = gic->mask; - tegra_irq.ack = gic->ack; + gic_unmask_irq = gic->irq_unmask; + gic_mask_irq = gic->irq_mask; + tegra_irq.irq_ack = gic->irq_ack; #ifdef CONFIG_SMP - tegra_irq.set_affinity = gic->set_affinity; + tegra_irq.irq_set_affinity = gic->irq_set_affinity; #endif for (i = INT_PRI_BASE; i < INT_GPIO_BASE; i++) { diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c index 13a83e4..136c32e 100644 --- a/arch/arm/mach-versatile/core.c +++ b/arch/arm/mach-versatile/core.c @@ -63,23 +63,25 @@ #define VA_VIC_BASE __io_address(VERSATILE_VIC_BASE) #define VA_SIC_BASE __io_address(VERSATILE_SIC_BASE) -static void sic_mask_irq(unsigned int irq) +static void sic_mask_irq(struct irq_data *d) { - irq -= IRQ_SIC_START; + unsigned int irq = d->irq - IRQ_SIC_START; + writel(1 << irq, VA_SIC_BASE + SIC_IRQ_ENABLE_CLEAR); } -static void sic_unmask_irq(unsigned int irq) +static void sic_unmask_irq(struct irq_data *d) { - irq -= IRQ_SIC_START; + unsigned int irq = d->irq - IRQ_SIC_START; + writel(1 << irq, VA_SIC_BASE + SIC_IRQ_ENABLE_SET); } static struct irq_chip sic_chip = { - .name = "SIC", - .ack = sic_mask_irq, - .mask = sic_mask_irq, - .unmask = sic_unmask_irq, + .name = "SIC", + .irq_ack = sic_mask_irq, + .irq_mask = sic_mask_irq, + .irq_unmask = sic_unmask_irq, }; static void diff --git a/arch/arm/mach-w90x900/irq.c b/arch/arm/mach-w90x900/irq.c index 0ce9d8e..9c35010 100644 --- a/arch/arm/mach-w90x900/irq.c +++ b/arch/arm/mach-w90x900/irq.c @@ -92,15 +92,15 @@ static void nuc900_group_enable(struct group_irq *gpirq, int enable) __raw_writel(regval, REG_AIC_GEN); } -static void nuc900_irq_mask(unsigned int irq) +static void nuc900_irq_mask(struct irq_data *d) { struct group_irq *group_irq; group_irq = NULL; - __raw_writel(1 << irq, REG_AIC_MDCR); + __raw_writel(1 << d->irq, REG_AIC_MDCR); - switch (irq) { + switch (d->irq) { case IRQ_GROUP0: group_irq = &group_nirq0; break; @@ -143,20 +143,20 @@ static void nuc900_irq_mask(unsigned int irq) * to REG_AIC_EOSCR for ACK */ -static void nuc900_irq_ack(unsigned int irq) +static void nuc900_irq_ack(struct irq_data *d) { __raw_writel(0x01, REG_AIC_EOSCR); } -static void nuc900_irq_unmask(unsigned int irq) +static void nuc900_irq_unmask(struct irq_data *d) { struct group_irq *group_irq; group_irq = NULL; - __raw_writel(1 << irq, REG_AIC_MECR); + __raw_writel(1 << d->irq, REG_AIC_MECR); - switch (irq) { + switch (d->irq) { case IRQ_GROUP0: group_irq = &group_nirq0; break; @@ -195,9 +195,9 @@ static void nuc900_irq_unmask(unsigned int irq) } static struct irq_chip nuc900_irq_chip = { - .ack = nuc900_irq_ack, - .mask = nuc900_irq_mask, - .unmask = nuc900_irq_unmask, + .irq_ack = nuc900_irq_ack, + .irq_mask = nuc900_irq_mask, + .irq_unmask = nuc900_irq_unmask, }; void __init nuc900_init_irq(void) diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c index 6b48e0a..4771dba 100644 --- a/arch/arm/mm/dma-mapping.c +++ b/arch/arm/mm/dma-mapping.c @@ -577,7 +577,7 @@ EXPORT_SYMBOL(dma_map_sg); * dma_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices * @sg: list of buffers - * @nents: number of buffers to unmap (returned from dma_map_sg) + * @nents: number of buffers to unmap (same as was passed to dma_map_sg) * @dir: DMA transfer direction (same as was passed to dma_map_sg) * * Unmap a set of streaming mode DMA translations. Again, CPU access diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S index b49fab2..0c1172b 100644 --- a/arch/arm/mm/proc-v7.S +++ b/arch/arm/mm/proc-v7.S @@ -159,7 +159,9 @@ ENTRY(cpu_v7_set_pte_ext) tstne r1, #L_PTE_PRESENT moveq r3, #0 - str r3, [r0, #2048]! + ARM( str r3, [r0, #2048]! ) + THUMB( add r0, r0, #2048 ) + THUMB( str r3, [r0] ) mcr p15, 0, r0, c7, c10, 1 @ flush_pte #endif mov pc, lr diff --git a/arch/arm/plat-mxc/3ds_debugboard.c b/arch/arm/plat-mxc/3ds_debugboard.c index 639c54a..c856fa3 100644 --- a/arch/arm/plat-mxc/3ds_debugboard.c +++ b/arch/arm/plat-mxc/3ds_debugboard.c @@ -60,7 +60,6 @@ #define EXPIO_INT_BUTTON_B (MXC_BOARD_IRQ_START + 4) static void __iomem *brd_io; -static void expio_ack_irq(u32 irq); static struct resource smsc911x_resources[] = { { @@ -93,7 +92,8 @@ static void mxc_expio_irq_handler(u32 irq, struct irq_desc *desc) u32 int_valid; u32 expio_irq; - desc->chip->mask(irq); /* irq = gpio irq number */ + /* irq = gpio irq number */ + desc->irq_data.chip->irq_mask(&desc->irq_data); imr_val = __raw_readw(brd_io + INTR_MASK_REG); int_valid = __raw_readw(brd_io + INTR_STATUS_REG) & ~imr_val; @@ -110,37 +110,37 @@ static void mxc_expio_irq_handler(u32 irq, struct irq_desc *desc) d->handle_irq(expio_irq, d); } - desc->chip->ack(irq); - desc->chip->unmask(irq); + desc->irq_data.chip->irq_ack(&desc->irq_data); + desc->irq_data.chip->irq_unmask(&desc->irq_data); } /* * Disable an expio pin's interrupt by setting the bit in the imr. * Irq is an expio virtual irq number */ -static void expio_mask_irq(u32 irq) +static void expio_mask_irq(struct irq_data *d) { u16 reg; - u32 expio = MXC_IRQ_TO_EXPIO(irq); + u32 expio = MXC_IRQ_TO_EXPIO(d->irq); reg = __raw_readw(brd_io + INTR_MASK_REG); reg |= (1 << expio); __raw_writew(reg, brd_io + INTR_MASK_REG); } -static void expio_ack_irq(u32 irq) +static void expio_ack_irq(struct irq_data *d) { - u32 expio = MXC_IRQ_TO_EXPIO(irq); + u32 expio = MXC_IRQ_TO_EXPIO(d->irq); __raw_writew(1 << expio, brd_io + INTR_RESET_REG); __raw_writew(0, brd_io + INTR_RESET_REG); - expio_mask_irq(irq); + expio_mask_irq(d); } -static void expio_unmask_irq(u32 irq) +static void expio_unmask_irq(struct irq_data *d) { u16 reg; - u32 expio = MXC_IRQ_TO_EXPIO(irq); + u32 expio = MXC_IRQ_TO_EXPIO(d->irq); reg = __raw_readw(brd_io + INTR_MASK_REG); reg &= ~(1 << expio); @@ -148,9 +148,9 @@ static void expio_unmask_irq(u32 irq) } static struct irq_chip expio_irq_chip = { - .ack = expio_ack_irq, - .mask = expio_mask_irq, - .unmask = expio_unmask_irq, + .irq_ack = expio_ack_irq, + .irq_mask = expio_mask_irq, + .irq_unmask = expio_unmask_irq, }; int __init mxc_expio_init(u32 base, u32 p_irq) diff --git a/arch/arm/plat-mxc/avic.c b/arch/arm/plat-mxc/avic.c index 9a4e8a2..deb284b 100644 --- a/arch/arm/plat-mxc/avic.c +++ b/arch/arm/plat-mxc/avic.c @@ -89,22 +89,22 @@ static int avic_set_irq_fiq(unsigned int irq, unsigned int type) #endif /* CONFIG_FIQ */ /* Disable interrupt number "irq" in the AVIC */ -static void mxc_mask_irq(unsigned int irq) +static void mxc_mask_irq(struct irq_data *d) { - __raw_writel(irq, avic_base + AVIC_INTDISNUM); + __raw_writel(d->irq, avic_base + AVIC_INTDISNUM); } /* Enable interrupt number "irq" in the AVIC */ -static void mxc_unmask_irq(unsigned int irq) +static void mxc_unmask_irq(struct irq_data *d) { - __raw_writel(irq, avic_base + AVIC_INTENNUM); + __raw_writel(d->irq, avic_base + AVIC_INTENNUM); } static struct mxc_irq_chip mxc_avic_chip = { .base = { - .ack = mxc_mask_irq, - .mask = mxc_mask_irq, - .unmask = mxc_unmask_irq, + .irq_ack = mxc_mask_irq, + .irq_mask = mxc_mask_irq, + .irq_unmask = mxc_unmask_irq, }, #ifdef CONFIG_MXC_IRQ_PRIOR .set_priority = avic_irq_set_priority, diff --git a/arch/arm/plat-mxc/devices/Kconfig b/arch/arm/plat-mxc/devices/Kconfig index 2537166..b9ab1d5 100644 --- a/arch/arm/plat-mxc/devices/Kconfig +++ b/arch/arm/plat-mxc/devices/Kconfig @@ -1,6 +1,6 @@ config IMX_HAVE_PLATFORM_FEC bool - default y if ARCH_MX25 || SOC_IMX27 || SOC_IMX35 || SOC_IMX51 + default y if ARCH_MX25 || SOC_IMX27 || SOC_IMX35 || SOC_IMX51 || SOC_IMX53 config IMX_HAVE_PLATFORM_FLEXCAN select HAVE_CAN_FLEXCAN if CAN diff --git a/arch/arm/plat-mxc/devices/platform-fec.c b/arch/arm/plat-mxc/devices/platform-fec.c index 269ec78..b50c351 100644 --- a/arch/arm/plat-mxc/devices/platform-fec.c +++ b/arch/arm/plat-mxc/devices/platform-fec.c @@ -36,6 +36,11 @@ const struct imx_fec_data imx51_fec_data __initconst = imx_fec_data_entry_single(MX51); #endif +#ifdef CONFIG_SOC_IMX53 +const struct imx_fec_data imx53_fec_data __initconst = + imx_fec_data_entry_single(MX53); +#endif + struct platform_device *__init imx_add_fec( const struct imx_fec_data *data, const struct fec_platform_data *pdata) diff --git a/arch/arm/plat-mxc/devices/platform-imx-i2c.c b/arch/arm/plat-mxc/devices/platform-imx-i2c.c index 72ba880..7ba94e1 100644 --- a/arch/arm/plat-mxc/devices/platform-imx-i2c.c +++ b/arch/arm/plat-mxc/devices/platform-imx-i2c.c @@ -78,6 +78,15 @@ const struct imx_imx_i2c_data imx51_imx_i2c_data[] __initconst = { }; #endif /* ifdef CONFIG_SOC_IMX51 */ +#ifdef CONFIG_SOC_IMX53 +const struct imx_imx_i2c_data imx53_imx_i2c_data[] __initconst = { +#define imx53_imx_i2c_data_entry(_id, _hwid) \ + imx_imx_i2c_data_entry(MX53, _id, _hwid, SZ_4K) + imx53_imx_i2c_data_entry(0, 1), + imx53_imx_i2c_data_entry(1, 2), +}; +#endif /* ifdef CONFIG_SOC_IMX51 */ + struct platform_device *__init imx_add_imx_i2c( const struct imx_imx_i2c_data *data, const struct imxi2c_platform_data *pdata) diff --git a/arch/arm/plat-mxc/devices/platform-imx-keypad.c b/arch/arm/plat-mxc/devices/platform-imx-keypad.c index 40238f0..2636611 100644 --- a/arch/arm/plat-mxc/devices/platform-imx-keypad.c +++ b/arch/arm/plat-mxc/devices/platform-imx-keypad.c @@ -41,6 +41,11 @@ const struct imx_imx_keypad_data imx35_imx_keypad_data __initconst = imx_imx_keypad_data_entry_single(MX35, SZ_16); #endif /* ifdef CONFIG_SOC_IMX35 */ +#ifdef CONFIG_SOC_IMX51 +const struct imx_imx_keypad_data imx51_imx_keypad_data __initconst = + imx_imx_keypad_data_entry_single(MX51, SZ_16); +#endif /* ifdef CONFIG_SOC_IMX51 */ + struct platform_device *__init imx_add_imx_keypad( const struct imx_imx_keypad_data *data, const struct matrix_keymap_data *pdata) diff --git a/arch/arm/plat-mxc/devices/platform-mxc_pwm.c b/arch/arm/plat-mxc/devices/platform-mxc_pwm.c index 3d8ebdb..b0c4ae2 100644 --- a/arch/arm/plat-mxc/devices/platform-mxc_pwm.c +++ b/arch/arm/plat-mxc/devices/platform-mxc_pwm.c @@ -40,6 +40,15 @@ const struct imx_mxc_pwm_data imx27_mxc_pwm_data __initconst = imx_mxc_pwm_data_entry_single(MX27, 0, , SZ_4K); #endif /* ifdef CONFIG_SOC_IMX27 */ +#ifdef CONFIG_SOC_IMX51 +const struct imx_mxc_pwm_data imx51_mxc_pwm_data[] __initconst = { +#define imx51_mxc_pwm_data_entry(_id, _hwid) \ + imx_mxc_pwm_data_entry(MX51, _id, _hwid, SZ_16K) + imx51_mxc_pwm_data_entry(0, 1), + imx51_mxc_pwm_data_entry(1, 2), +}; +#endif /* ifdef CONFIG_SOC_IMX51 */ + struct platform_device *__init imx_add_mxc_pwm( const struct imx_mxc_pwm_data *data) { diff --git a/arch/arm/plat-mxc/devices/platform-sdhci-esdhc-imx.c b/arch/arm/plat-mxc/devices/platform-sdhci-esdhc-imx.c index b352564..6b2940b 100644 --- a/arch/arm/plat-mxc/devices/platform-sdhci-esdhc-imx.c +++ b/arch/arm/plat-mxc/devices/platform-sdhci-esdhc-imx.c @@ -53,6 +53,18 @@ imx51_sdhci_esdhc_imx_data[] __initconst = { }; #endif /* ifdef CONFIG_SOC_IMX51 */ +#ifdef CONFIG_SOC_IMX53 +const struct imx_sdhci_esdhc_imx_data +imx53_sdhci_esdhc_imx_data[] __initconst = { +#define imx53_sdhci_esdhc_imx_data_entry(_id, _hwid) \ + imx_sdhci_esdhc_imx_data_entry(MX53, _id, _hwid) + imx53_sdhci_esdhc_imx_data_entry(0, 1), + imx53_sdhci_esdhc_imx_data_entry(1, 2), + imx53_sdhci_esdhc_imx_data_entry(2, 3), + imx53_sdhci_esdhc_imx_data_entry(3, 4), +}; +#endif /* ifdef CONFIG_SOC_IMX53 */ + struct platform_device *__init imx_add_sdhci_esdhc_imx( const struct imx_sdhci_esdhc_imx_data *data, const struct esdhc_platform_data *pdata) diff --git a/arch/arm/plat-mxc/devices/platform-spi_imx.c b/arch/arm/plat-mxc/devices/platform-spi_imx.c index 8ea49ad..013c85f 100644 --- a/arch/arm/plat-mxc/devices/platform-spi_imx.c +++ b/arch/arm/plat-mxc/devices/platform-spi_imx.c @@ -81,6 +81,18 @@ const struct imx_spi_imx_data imx51_ecspi_data[] __initconst = { }; #endif /* ifdef CONFIG_SOC_IMX51 */ +#ifdef CONFIG_SOC_IMX53 +const struct imx_spi_imx_data imx53_cspi_data __initconst = + imx_spi_imx_data_entry_single(MX53, CSPI, "imx53-cspi", 0, , SZ_4K); + +const struct imx_spi_imx_data imx53_ecspi_data[] __initconst = { +#define imx53_ecspi_data_entry(_id, _hwid) \ + imx_spi_imx_data_entry(MX53, ECSPI, "imx53-ecspi", _id, _hwid, SZ_4K) + imx53_ecspi_data_entry(0, 1), + imx53_ecspi_data_entry(1, 2), +}; +#endif /* ifdef CONFIG_SOC_IMX53 */ + struct platform_device *__init imx_add_spi_imx( const struct imx_spi_imx_data *data, const struct spi_imx_master *pdata) diff --git a/arch/arm/plat-mxc/gpio.c b/arch/arm/plat-mxc/gpio.c index bc2c7bc..d17b3c9 100644 --- a/arch/arm/plat-mxc/gpio.c +++ b/arch/arm/plat-mxc/gpio.c @@ -63,29 +63,29 @@ static void _set_gpio_irqenable(struct mxc_gpio_port *port, u32 index, __raw_writel(l, port->base + GPIO_IMR); } -static void gpio_ack_irq(u32 irq) +static void gpio_ack_irq(struct irq_data *d) { - u32 gpio = irq_to_gpio(irq); + u32 gpio = irq_to_gpio(d->irq); _clear_gpio_irqstatus(&mxc_gpio_ports[gpio / 32], gpio & 0x1f); } -static void gpio_mask_irq(u32 irq) +static void gpio_mask_irq(struct irq_data *d) { - u32 gpio = irq_to_gpio(irq); + u32 gpio = irq_to_gpio(d->irq); _set_gpio_irqenable(&mxc_gpio_ports[gpio / 32], gpio & 0x1f, 0); } -static void gpio_unmask_irq(u32 irq) +static void gpio_unmask_irq(struct irq_data *d) { - u32 gpio = irq_to_gpio(irq); + u32 gpio = irq_to_gpio(d->irq); _set_gpio_irqenable(&mxc_gpio_ports[gpio / 32], gpio & 0x1f, 1); } static int mxc_gpio_get(struct gpio_chip *chip, unsigned offset); -static int gpio_set_irq_type(u32 irq, u32 type) +static int gpio_set_irq_type(struct irq_data *d, u32 type) { - u32 gpio = irq_to_gpio(irq); + u32 gpio = irq_to_gpio(d->irq); struct mxc_gpio_port *port = &mxc_gpio_ports[gpio / 32]; u32 bit, val; int edge; @@ -211,9 +211,9 @@ static void mx2_gpio_irq_handler(u32 irq, struct irq_desc *desc) * @param enable enable as wake-up if equal to non-zero * @return This function returns 0 on success. */ -static int gpio_set_wake_irq(u32 irq, u32 enable) +static int gpio_set_wake_irq(struct irq_data *d, u32 enable) { - u32 gpio = irq_to_gpio(irq); + u32 gpio = irq_to_gpio(d->irq); u32 gpio_idx = gpio & 0x1F; struct mxc_gpio_port *port = &mxc_gpio_ports[gpio / 32]; @@ -233,11 +233,11 @@ static int gpio_set_wake_irq(u32 irq, u32 enable) } static struct irq_chip gpio_irq_chip = { - .ack = gpio_ack_irq, - .mask = gpio_mask_irq, - .unmask = gpio_unmask_irq, - .set_type = gpio_set_irq_type, - .set_wake = gpio_set_wake_irq, + .irq_ack = gpio_ack_irq, + .irq_mask = gpio_mask_irq, + .irq_unmask = gpio_unmask_irq, + .irq_set_type = gpio_set_irq_type, + .irq_set_wake = gpio_set_wake_irq, }; static void _set_gpio_direction(struct gpio_chip *chip, unsigned offset, diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx53.h b/arch/arm/plat-mxc/include/mach/iomux-mx53.h index 5deee01..68e11d7 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-mx53.h +++ b/arch/arm/plat-mxc/include/mach/iomux-mx53.h @@ -34,7 +34,6 @@ typedef enum iomux_config { IOMUX_CONFIG_ALT6, IOMUX_CONFIG_ALT7, IOMUX_CONFIG_GPIO, /* added to help user use GPIO mode */ - IOMUX_CONFIG_SION = 0x1 << 4, /* LOOPBACK:MUX SION bit */ } iomux_pin_cfg_t; /* These 2 defines are for pins that may not have a mux register, but could @@ -135,6 +134,9 @@ typedef enum iomux_config { #define MX53_PAD_EIM_D16__GPIO_3_16 IOMUX_PAD(0x460, 0x118,IOMUX_CONFIG_ALT1, 0x0, 0, NO_PAD_CTRL) #define MX53_PAD_EIM_D17__GPIO_3_17 IOMUX_PAD(0x464, 0x11C,IOMUX_CONFIG_ALT1, 0x0, 0, NO_PAD_CTRL) #define MX53_PAD_EIM_D18__GPIO_3_18 IOMUX_PAD(0x468, 0x120,IOMUX_CONFIG_ALT1, 0x0, 0, NO_PAD_CTRL) +#define MX53_PAD_EIM_D16__CSPI1_SCLK IOMUX_PAD(0x460, 0x118,IOMUX_CONFIG_ALT4, 0x79c, 3, NO_PAD_CTRL) +#define MX53_PAD_EIM_D17__CSPI1_MISO IOMUX_PAD(0x464, 0x11C,IOMUX_CONFIG_ALT4, 0x7a0, 3, NO_PAD_CTRL) +#define MX53_PAD_EIM_D18__CSPI1_MOSI IOMUX_PAD(0x468, 0x120,IOMUX_CONFIG_ALT4, 0x7a4, 3, NO_PAD_CTRL) #define MX53_PAD_EIM_D19__GPIO_3_19 IOMUX_PAD(0x46C, 0x124,IOMUX_CONFIG_ALT1, 0x0, 0, NO_PAD_CTRL) #define MX53_PAD_EIM_D20__GPIO_3_20 IOMUX_PAD(0x470, 0x128,IOMUX_CONFIG_ALT1, 0x0, 0, NO_PAD_CTRL) #define MX53_PAD_EIM_D21__GPIO_3_21 IOMUX_PAD(0x474, 0x12C,IOMUX_CONFIG_ALT1, 0x0, 0, NO_PAD_CTRL) diff --git a/arch/arm/plat-mxc/include/mach/iomux-v3.h b/arch/arm/plat-mxc/include/mach/iomux-v3.h index 2277b01..82620af 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-v3.h +++ b/arch/arm/plat-mxc/include/mach/iomux-v3.h @@ -105,6 +105,7 @@ typedef u64 iomux_v3_cfg_t; #define PAD_CTL_SRE_FAST (1 << 0) #define PAD_CTL_SRE_SLOW (0 << 0) +#define IOMUX_CONFIG_SION (0x1 << 4) #define MX51_NUM_GPIO_PORT 4 diff --git a/arch/arm/plat-mxc/include/mach/mx51.h b/arch/arm/plat-mxc/include/mach/mx51.h index 873807f..1eb339e 100644 --- a/arch/arm/plat-mxc/include/mach/mx51.h +++ b/arch/arm/plat-mxc/include/mach/mx51.h @@ -301,8 +301,8 @@ #define MX51_MXC_INT_GPIO4_HIGH 57 #define MX51_MXC_INT_WDOG1 58 #define MX51_MXC_INT_WDOG2 59 -#define MX51_MXC_INT_KPP 60 -#define MX51_MXC_INT_PWM1 61 +#define MX51_INT_KPP 60 +#define MX51_INT_PWM1 61 #define MX51_INT_I2C1 62 #define MX51_INT_I2C2 63 #define MX51_MXC_INT_HS_I2C 64 @@ -335,7 +335,7 @@ #define MX51_MXC_INT_SPDIF 91 #define MX51_MXC_INT_TVE 92 #define MX51_MXC_INT_FIRI 93 -#define MX51_MXC_INT_PWM2 94 +#define MX51_INT_PWM2 94 #define MX51_MXC_INT_SLIM_EXP 95 #define MX51_INT_SSI3 96 #define MX51_MXC_INT_EMI_BOOT 97 diff --git a/arch/arm/plat-mxc/include/mach/mx53.h b/arch/arm/plat-mxc/include/mach/mx53.h index 9577cdb..d7a8e52 100644 --- a/arch/arm/plat-mxc/include/mach/mx53.h +++ b/arch/arm/plat-mxc/include/mach/mx53.h @@ -53,13 +53,13 @@ #define MX53_SPBA0_BASE_ADDR 0x50000000 #define MX53_SPBA0_SIZE SZ_1M -#define MX53_MMC_SDHC1_BASE_ADDR (MX53_SPBA0_BASE_ADDR + 0x00004000) -#define MX53_MMC_SDHC2_BASE_ADDR (MX53_SPBA0_BASE_ADDR + 0x00008000) +#define MX53_ESDHC1_BASE_ADDR (MX53_SPBA0_BASE_ADDR + 0x00004000) +#define MX53_ESDHC2_BASE_ADDR (MX53_SPBA0_BASE_ADDR + 0x00008000) #define MX53_UART3_BASE_ADDR (MX53_SPBA0_BASE_ADDR + 0x0000C000) -#define MX53_CSPI1_BASE_ADDR (MX53_SPBA0_BASE_ADDR + 0x00010000) +#define MX53_ECSPI1_BASE_ADDR (MX53_SPBA0_BASE_ADDR + 0x00010000) #define MX53_SSI2_BASE_ADDR (MX53_SPBA0_BASE_ADDR + 0x00014000) -#define MX53_MMC_SDHC3_BASE_ADDR (MX53_SPBA0_BASE_ADDR + 0x00020000) -#define MX53_MMC_SDHC4_BASE_ADDR (MX53_SPBA0_BASE_ADDR + 0x00024000) +#define MX53_ESDHC3_BASE_ADDR (MX53_SPBA0_BASE_ADDR + 0x00020000) +#define MX53_ESDHC4_BASE_ADDR (MX53_SPBA0_BASE_ADDR + 0x00024000) #define MX53_SPDIF_BASE_ADDR (MX53_SPBA0_BASE_ADDR + 0x00028000) #define MX53_ASRC_BASE_ADDR (MX53_SPBA0_BASE_ADDR + 0x0002C000) #define MX53_ATA_DMA_BASE_ADDR (MX53_SPBA0_BASE_ADDR + 0x00030000) @@ -117,12 +117,12 @@ #define MX53_ARM_BASE_ADDR (MX53_AIPS2_BASE_ADDR + 0x000A0000) #define MX53_OWIRE_BASE_ADDR (MX53_AIPS2_BASE_ADDR + 0x000A4000) #define MX53_FIRI_BASE_ADDR (MX53_AIPS2_BASE_ADDR + 0x000A8000) -#define MX53_CSPI2_BASE_ADDR (MX53_AIPS2_BASE_ADDR + 0x000AC000) +#define MX53_ECSPI2_BASE_ADDR (MX53_AIPS2_BASE_ADDR + 0x000AC000) #define MX53_SDMA_BASE_ADDR (MX53_AIPS2_BASE_ADDR + 0x000B0000) #define MX53_SCC_BASE_ADDR (MX53_AIPS2_BASE_ADDR + 0x000B4000) #define MX53_ROMCP_BASE_ADDR (MX53_AIPS2_BASE_ADDR + 0x000B8000) #define MX53_RTIC_BASE_ADDR (MX53_AIPS2_BASE_ADDR + 0x000BC000) -#define MX53_CSPI3_BASE_ADDR (MX53_AIPS2_BASE_ADDR + 0x000C0000) +#define MX53_CSPI_BASE_ADDR (MX53_AIPS2_BASE_ADDR + 0x000C0000) #define MX53_I2C2_BASE_ADDR (MX53_AIPS2_BASE_ADDR + 0x000C4000) #define MX53_I2C1_BASE_ADDR (MX53_AIPS2_BASE_ADDR + 0x000C8000) #define MX53_SSI1_BASE_ADDR (MX53_AIPS2_BASE_ADDR + 0x000CC000) @@ -136,7 +136,7 @@ #define MX53_MIPI_HSC_BASE_ADDR (MX53_AIPS2_BASE_ADDR + 0x000DC000) #define MX53_MLB_BASE_ADDR (MX53_AIPS2_BASE_ADDR + 0x000E4000) #define MX53_SSI3_BASE_ADDR (MX53_AIPS2_BASE_ADDR + 0x000E8000) -#define MX53_MXC_FEC_BASE_ADDR (MX53_AIPS2_BASE_ADDR + 0x000EC000) +#define MX53_FEC_BASE_ADDR (MX53_AIPS2_BASE_ADDR + 0x000EC000) #define MX53_TVE_BASE_ADDR (MX53_AIPS2_BASE_ADDR + 0x000F0000) #define MX53_VPU_BASE_ADDR (MX53_AIPS2_BASE_ADDR + 0x000F4000) #define MX53_SAHARA_BASE_ADDR (MX53_AIPS2_BASE_ADDR + 0x000F8000) @@ -229,10 +229,10 @@ * Interrupt numbers */ #define MX53_INT_RESV0 0 -#define MX53_INT_MMC_SDHC1 1 -#define MX53_INT_MMC_SDHC2 2 -#define MX53_INT_MMC_SDHC3 3 -#define MX53_INT_MMC_SDHC4 4 +#define MX53_INT_ESDHC1 1 +#define MX53_INT_ESDHC2 2 +#define MX53_INT_ESDHC3 3 +#define MX53_INT_ESDHC4 4 #define MX53_INT_RESV5 5 #define MX53_INT_SDMA 6 #define MX53_INT_IOMUX 7 @@ -264,8 +264,8 @@ #define MX53_INT_UART3 33 #define MX53_INT_RESV34 34 #define MX53_INT_RESV35 35 -#define MX53_INT_CSPI1 36 -#define MX53_INT_CSPI2 37 +#define MX53_INT_ECSPI1 36 +#define MX53_INT_ECSPI2 37 #define MX53_INT_CSPI 38 #define MX53_INT_GPT 39 #define MX53_INT_EPIT1 40 diff --git a/arch/arm/plat-mxc/pwm.c b/arch/arm/plat-mxc/pwm.c index c36f263..7a61ef8 100644 --- a/arch/arm/plat-mxc/pwm.c +++ b/arch/arm/plat-mxc/pwm.c @@ -57,7 +57,7 @@ int pwm_config(struct pwm_device *pwm, int duty_ns, int period_ns) if (pwm == NULL || period_ns == 0 || duty_ns > period_ns) return -EINVAL; - if (cpu_is_mx27() || cpu_is_mx3() || cpu_is_mx25()) { + if (cpu_is_mx27() || cpu_is_mx3() || cpu_is_mx25() || cpu_is_mx51()) { unsigned long long c; unsigned long period_cycles, duty_cycles, prescale; u32 cr; diff --git a/arch/arm/plat-mxc/tzic.c b/arch/arm/plat-mxc/tzic.c index e69ed8a..bc3a6be 100644 --- a/arch/arm/plat-mxc/tzic.c +++ b/arch/arm/plat-mxc/tzic.c @@ -69,50 +69,50 @@ static int tzic_set_irq_fiq(unsigned int irq, unsigned int type) #endif /** - * tzic_mask_irq() - Disable interrupt number "irq" in the TZIC + * tzic_mask_irq() - Disable interrupt source "d" in the TZIC * - * @param irq interrupt source number + * @param d interrupt source */ -static void tzic_mask_irq(unsigned int irq) +static void tzic_mask_irq(struct irq_data *d) { int index, off; - index = irq >> 5; - off = irq & 0x1F; + index = d->irq >> 5; + off = d->irq & 0x1F; __raw_writel(1 << off, tzic_base + TZIC_ENCLEAR0(index)); } /** - * tzic_unmask_irq() - Enable interrupt number "irq" in the TZIC + * tzic_unmask_irq() - Enable interrupt source "d" in the TZIC * - * @param irq interrupt source number + * @param d interrupt source */ -static void tzic_unmask_irq(unsigned int irq) +static void tzic_unmask_irq(struct irq_data *d) { int index, off; - index = irq >> 5; - off = irq & 0x1F; + index = d->irq >> 5; + off = d->irq & 0x1F; __raw_writel(1 << off, tzic_base + TZIC_ENSET0(index)); } static unsigned int wakeup_intr[4]; /** - * tzic_set_wake_irq() - Set interrupt number "irq" in the TZIC as a wake-up source. + * tzic_set_wake_irq() - Set interrupt source "d" in the TZIC as a wake-up source. * - * @param irq interrupt source number + * @param d interrupt source * @param enable enable as wake-up if equal to non-zero * disble as wake-up if equal to zero * * @return This function returns 0 on success. */ -static int tzic_set_wake_irq(unsigned int irq, unsigned int enable) +static int tzic_set_wake_irq(struct irq_data *d, unsigned int enable) { unsigned int index, off; - index = irq >> 5; - off = irq & 0x1F; + index = d->irq >> 5; + off = d->irq & 0x1F; if (index > 3) return -EINVAL; @@ -128,10 +128,10 @@ static int tzic_set_wake_irq(unsigned int irq, unsigned int enable) static struct mxc_irq_chip mxc_tzic_chip = { .base = { .name = "MXC_TZIC", - .ack = tzic_mask_irq, - .mask = tzic_mask_irq, - .unmask = tzic_unmask_irq, - .set_wake = tzic_set_wake_irq, + .irq_ack = tzic_mask_irq, + .irq_mask = tzic_mask_irq, + .irq_unmask = tzic_unmask_irq, + .irq_set_wake = tzic_set_wake_irq, }, #ifdef CONFIG_FIQ .set_irq_fiq = tzic_set_irq_fiq, diff --git a/arch/arm/plat-nomadik/gpio.c b/arch/arm/plat-nomadik/gpio.c index eda4e3a..1e88ecb 100644 --- a/arch/arm/plat-nomadik/gpio.c +++ b/arch/arm/plat-nomadik/gpio.c @@ -356,13 +356,13 @@ static inline int nmk_gpio_get_bitmask(int gpio) return 1 << (gpio % 32); } -static void nmk_gpio_irq_ack(unsigned int irq) +static void nmk_gpio_irq_ack(struct irq_data *d) { int gpio; struct nmk_gpio_chip *nmk_chip; - gpio = NOMADIK_IRQ_TO_GPIO(irq); - nmk_chip = get_irq_chip_data(irq); + gpio = NOMADIK_IRQ_TO_GPIO(d->irq); + nmk_chip = irq_data_get_irq_chip_data(d); if (!nmk_chip) return; writel(nmk_gpio_get_bitmask(gpio), nmk_chip->addr + NMK_GPIO_IC); @@ -401,7 +401,7 @@ static void __nmk_gpio_irq_modify(struct nmk_gpio_chip *nmk_chip, } } -static int nmk_gpio_irq_modify(unsigned int irq, enum nmk_gpio_irq_type which, +static int nmk_gpio_irq_modify(struct irq_data *d, enum nmk_gpio_irq_type which, bool enable) { int gpio; @@ -409,8 +409,8 @@ static int nmk_gpio_irq_modify(unsigned int irq, enum nmk_gpio_irq_type which, unsigned long flags; u32 bitmask; - gpio = NOMADIK_IRQ_TO_GPIO(irq); - nmk_chip = get_irq_chip_data(irq); + gpio = NOMADIK_IRQ_TO_GPIO(d->irq); + nmk_chip = irq_data_get_irq_chip_data(d); bitmask = nmk_gpio_get_bitmask(gpio); if (!nmk_chip) return -EINVAL; @@ -422,24 +422,24 @@ static int nmk_gpio_irq_modify(unsigned int irq, enum nmk_gpio_irq_type which, return 0; } -static void nmk_gpio_irq_mask(unsigned int irq) +static void nmk_gpio_irq_mask(struct irq_data *d) { - nmk_gpio_irq_modify(irq, NORMAL, false); + nmk_gpio_irq_modify(d, NORMAL, false); } -static void nmk_gpio_irq_unmask(unsigned int irq) +static void nmk_gpio_irq_unmask(struct irq_data *d) { - nmk_gpio_irq_modify(irq, NORMAL, true); + nmk_gpio_irq_modify(d, NORMAL, true); } -static int nmk_gpio_irq_set_wake(unsigned int irq, unsigned int on) +static int nmk_gpio_irq_set_wake(struct irq_data *d, unsigned int on) { struct nmk_gpio_chip *nmk_chip; unsigned long flags; int gpio; - gpio = NOMADIK_IRQ_TO_GPIO(irq); - nmk_chip = get_irq_chip_data(irq); + gpio = NOMADIK_IRQ_TO_GPIO(d->irq); + nmk_chip = irq_data_get_irq_chip_data(d); if (!nmk_chip) return -EINVAL; @@ -457,9 +457,9 @@ static int nmk_gpio_irq_set_wake(unsigned int irq, unsigned int on) return 0; } -static int nmk_gpio_irq_set_type(unsigned int irq, unsigned int type) +static int nmk_gpio_irq_set_type(struct irq_data *d, unsigned int type) { - struct irq_desc *desc = irq_to_desc(irq); + struct irq_desc *desc = irq_to_desc(d->irq); bool enabled = !(desc->status & IRQ_DISABLED); bool wake = desc->wake_depth; int gpio; @@ -467,8 +467,8 @@ static int nmk_gpio_irq_set_type(unsigned int irq, unsigned int type) unsigned long flags; u32 bitmask; - gpio = NOMADIK_IRQ_TO_GPIO(irq); - nmk_chip = get_irq_chip_data(irq); + gpio = NOMADIK_IRQ_TO_GPIO(d->irq); + nmk_chip = irq_data_get_irq_chip_data(d); bitmask = nmk_gpio_get_bitmask(gpio); if (!nmk_chip) return -EINVAL; @@ -507,11 +507,11 @@ static int nmk_gpio_irq_set_type(unsigned int irq, unsigned int type) static struct irq_chip nmk_gpio_irq_chip = { .name = "Nomadik-GPIO", - .ack = nmk_gpio_irq_ack, - .mask = nmk_gpio_irq_mask, - .unmask = nmk_gpio_irq_unmask, - .set_type = nmk_gpio_irq_set_type, - .set_wake = nmk_gpio_irq_set_wake, + .irq_ack = nmk_gpio_irq_ack, + .irq_mask = nmk_gpio_irq_mask, + .irq_unmask = nmk_gpio_irq_unmask, + .irq_set_type = nmk_gpio_irq_set_type, + .irq_set_wake = nmk_gpio_irq_set_wake, }; static void nmk_gpio_irq_handler(unsigned int irq, struct irq_desc *desc) @@ -522,12 +522,12 @@ static void nmk_gpio_irq_handler(unsigned int irq, struct irq_desc *desc) u32 pending; unsigned int first_irq; - if (host_chip->mask_ack) - host_chip->mask_ack(irq); + if (host_chip->irq_mask_ack) + host_chip->irq_mask_ack(&desc->irq_data); else { - host_chip->mask(irq); - if (host_chip->ack) - host_chip->ack(irq); + host_chip->irq_mask(&desc->irq_data); + if (host_chip->irq_ack) + host_chip->irq_ack(&desc->irq_data); } nmk_chip = get_irq_data(irq); @@ -537,7 +537,7 @@ static void nmk_gpio_irq_handler(unsigned int irq, struct irq_desc *desc) generic_handle_irq(gpio_irq); } - host_chip->unmask(irq); + host_chip->irq_unmask(&desc->irq_data); } static int nmk_gpio_init_irq(struct nmk_gpio_chip *nmk_chip) diff --git a/arch/arm/plat-nomadik/include/plat/ste_dma40.h b/arch/arm/plat-nomadik/include/plat/ste_dma40.h index 74b62f1..4d6dd4c 100644 --- a/arch/arm/plat-nomadik/include/plat/ste_dma40.h +++ b/arch/arm/plat-nomadik/include/plat/ste_dma40.h @@ -13,6 +13,14 @@ #include <linux/workqueue.h> #include <linux/interrupt.h> +/* + * Maxium size for a single dma descriptor + * Size is limited to 16 bits. + * Size is in the units of addr-widths (1,2,4,8 bytes) + * Larger transfers will be split up to multiple linked desc + */ +#define STEDMA40_MAX_SEG_SIZE 0xFFFF + /* dev types for memcpy */ #define STEDMA40_DEV_DST_MEMORY (-1) #define STEDMA40_DEV_SRC_MEMORY (-1) diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c index ccf2660..971d186 100644 --- a/arch/arm/plat-omap/gpio.c +++ b/arch/arm/plat-omap/gpio.c @@ -729,17 +729,17 @@ bad: return -EINVAL; } -static int gpio_irq_type(unsigned irq, unsigned type) +static int gpio_irq_type(struct irq_data *d, unsigned type) { struct gpio_bank *bank; unsigned gpio; int retval; unsigned long flags; - if (!cpu_class_is_omap2() && irq > IH_MPUIO_BASE) - gpio = OMAP_MPUIO(irq - IH_MPUIO_BASE); + if (!cpu_class_is_omap2() && d->irq > IH_MPUIO_BASE) + gpio = OMAP_MPUIO(d->irq - IH_MPUIO_BASE); else - gpio = irq - IH_GPIO_BASE; + gpio = d->irq - IH_GPIO_BASE; if (check_gpio(gpio) < 0) return -EINVAL; @@ -752,21 +752,21 @@ static int gpio_irq_type(unsigned irq, unsigned type) && (type & (IRQ_TYPE_LEVEL_LOW|IRQ_TYPE_LEVEL_HIGH))) return -EINVAL; - bank = get_irq_chip_data(irq); + bank = irq_data_get_irq_chip_data(d); spin_lock_irqsave(&bank->lock, flags); retval = _set_gpio_triggering(bank, get_gpio_index(gpio), type); if (retval == 0) { - struct irq_desc *d = irq_to_desc(irq); + struct irq_desc *desc = irq_to_desc(d->irq); - d->status &= ~IRQ_TYPE_SENSE_MASK; - d->status |= type; + desc->status &= ~IRQ_TYPE_SENSE_MASK; + desc->status |= type; } spin_unlock_irqrestore(&bank->lock, flags); if (type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH)) - __set_irq_handler_unlocked(irq, handle_level_irq); + __set_irq_handler_unlocked(d->irq, handle_level_irq); else if (type & (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)) - __set_irq_handler_unlocked(irq, handle_edge_irq); + __set_irq_handler_unlocked(d->irq, handle_edge_irq); return retval; } @@ -1023,15 +1023,15 @@ static void _reset_gpio(struct gpio_bank *bank, int gpio) } /* Use disable_irq_wake() and enable_irq_wake() functions from drivers */ -static int gpio_wake_enable(unsigned int irq, unsigned int enable) +static int gpio_wake_enable(struct irq_data *d, unsigned int enable) { - unsigned int gpio = irq - IH_GPIO_BASE; + unsigned int gpio = d->irq - IH_GPIO_BASE; struct gpio_bank *bank; int retval; if (check_gpio(gpio) < 0) return -ENODEV; - bank = get_irq_chip_data(irq); + bank = irq_data_get_irq_chip_data(d); retval = _set_gpio_wakeup(bank, get_gpio_index(gpio), enable); return retval; @@ -1144,7 +1144,7 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc) u32 retrigger = 0; int unmasked = 0; - desc->chip->ack(irq); + desc->irq_data.chip->irq_ack(&desc->irq_data); bank = get_irq_data(irq); #ifdef CONFIG_ARCH_OMAP1 @@ -1201,7 +1201,7 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc) configured, we could unmask GPIO bank interrupt immediately */ if (!level_mask && !unmasked) { unmasked = 1; - desc->chip->unmask(irq); + desc->irq_data.chip->irq_unmask(&desc->irq_data); } isr |= retrigger; @@ -1237,41 +1237,40 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc) interrupt */ exit: if (!unmasked) - desc->chip->unmask(irq); - + desc->irq_data.chip->irq_unmask(&desc->irq_data); } -static void gpio_irq_shutdown(unsigned int irq) +static void gpio_irq_shutdown(struct irq_data *d) { - unsigned int gpio = irq - IH_GPIO_BASE; - struct gpio_bank *bank = get_irq_chip_data(irq); + unsigned int gpio = d->irq - IH_GPIO_BASE; + struct gpio_bank *bank = irq_data_get_irq_chip_data(d); _reset_gpio(bank, gpio); } -static void gpio_ack_irq(unsigned int irq) +static void gpio_ack_irq(struct irq_data *d) { - unsigned int gpio = irq - IH_GPIO_BASE; - struct gpio_bank *bank = get_irq_chip_data(irq); + unsigned int gpio = d->irq - IH_GPIO_BASE; + struct gpio_bank *bank = irq_data_get_irq_chip_data(d); _clear_gpio_irqstatus(bank, gpio); } -static void gpio_mask_irq(unsigned int irq) +static void gpio_mask_irq(struct irq_data *d) { - unsigned int gpio = irq - IH_GPIO_BASE; - struct gpio_bank *bank = get_irq_chip_data(irq); + unsigned int gpio = d->irq - IH_GPIO_BASE; + struct gpio_bank *bank = irq_data_get_irq_chip_data(d); _set_gpio_irqenable(bank, gpio, 0); _set_gpio_triggering(bank, get_gpio_index(gpio), IRQ_TYPE_NONE); } -static void gpio_unmask_irq(unsigned int irq) +static void gpio_unmask_irq(struct irq_data *d) { - unsigned int gpio = irq - IH_GPIO_BASE; - struct gpio_bank *bank = get_irq_chip_data(irq); + unsigned int gpio = d->irq - IH_GPIO_BASE; + struct gpio_bank *bank = irq_data_get_irq_chip_data(d); unsigned int irq_mask = 1 << get_gpio_index(gpio); - struct irq_desc *desc = irq_to_desc(irq); + struct irq_desc *desc = irq_to_desc(d->irq); u32 trigger = desc->status & IRQ_TYPE_SENSE_MASK; if (trigger) @@ -1289,12 +1288,12 @@ static void gpio_unmask_irq(unsigned int irq) static struct irq_chip gpio_irq_chip = { .name = "GPIO", - .shutdown = gpio_irq_shutdown, - .ack = gpio_ack_irq, - .mask = gpio_mask_irq, - .unmask = gpio_unmask_irq, - .set_type = gpio_irq_type, - .set_wake = gpio_wake_enable, + .irq_shutdown = gpio_irq_shutdown, + .irq_ack = gpio_ack_irq, + .irq_mask = gpio_mask_irq, + .irq_unmask = gpio_unmask_irq, + .irq_set_type = gpio_irq_type, + .irq_set_wake = gpio_wake_enable, }; /*---------------------------------------------------------------------*/ @@ -1303,36 +1302,36 @@ static struct irq_chip gpio_irq_chip = { /* MPUIO uses the always-on 32k clock */ -static void mpuio_ack_irq(unsigned int irq) +static void mpuio_ack_irq(struct irq_data *d) { /* The ISR is reset automatically, so do nothing here. */ } -static void mpuio_mask_irq(unsigned int irq) +static void mpuio_mask_irq(struct irq_data *d) { - unsigned int gpio = OMAP_MPUIO(irq - IH_MPUIO_BASE); - struct gpio_bank *bank = get_irq_chip_data(irq); + unsigned int gpio = OMAP_MPUIO(d->irq - IH_MPUIO_BASE); + struct gpio_bank *bank = irq_data_get_irq_chip_data(d); _set_gpio_irqenable(bank, gpio, 0); } -static void mpuio_unmask_irq(unsigned int irq) +static void mpuio_unmask_irq(struct irq_data *d) { - unsigned int gpio = OMAP_MPUIO(irq - IH_MPUIO_BASE); - struct gpio_bank *bank = get_irq_chip_data(irq); + unsigned int gpio = OMAP_MPUIO(d->irq - IH_MPUIO_BASE); + struct gpio_bank *bank = irq_data_get_irq_chip_data(d); _set_gpio_irqenable(bank, gpio, 1); } static struct irq_chip mpuio_irq_chip = { .name = "MPUIO", - .ack = mpuio_ack_irq, - .mask = mpuio_mask_irq, - .unmask = mpuio_unmask_irq, - .set_type = gpio_irq_type, + .irq_ack = mpuio_ack_irq, + .irq_mask = mpuio_mask_irq, + .irq_unmask = mpuio_unmask_irq, + .irq_set_type = gpio_irq_type, #ifdef CONFIG_ARCH_OMAP16XX /* REVISIT: assuming only 16xx supports MPUIO wake events */ - .set_wake = gpio_wake_enable, + .irq_set_wake = gpio_wake_enable, #endif }; diff --git a/arch/arm/plat-omap/include/plat/onenand.h b/arch/arm/plat-omap/include/plat/onenand.h index 72f433d..affe87e 100644 --- a/arch/arm/plat-omap/include/plat/onenand.h +++ b/arch/arm/plat-omap/include/plat/onenand.h @@ -23,6 +23,7 @@ struct omap_onenand_platform_data { int (*onenand_setup)(void __iomem *, int freq); int dma_channel; u8 flags; + u8 regulator_can_sleep; }; #define ONENAND_MAX_PARTITIONS 8 diff --git a/arch/arm/plat-orion/gpio.c b/arch/arm/plat-orion/gpio.c index e814803..5f35223 100644 --- a/arch/arm/plat-orion/gpio.c +++ b/arch/arm/plat-orion/gpio.c @@ -232,20 +232,19 @@ EXPORT_SYMBOL(orion_gpio_set_blink); * polarity LEVEL mask * ****************************************************************************/ - -static void gpio_irq_ack(u32 irq) +static void gpio_irq_ack(struct irq_data *d) { - int type = irq_desc[irq].status & IRQ_TYPE_SENSE_MASK; + int type = irq_desc[d->irq].status & IRQ_TYPE_SENSE_MASK; if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) { - int pin = irq_to_gpio(irq); + int pin = irq_to_gpio(d->irq); writel(~(1 << (pin & 31)), GPIO_EDGE_CAUSE(pin)); } } -static void gpio_irq_mask(u32 irq) +static void gpio_irq_mask(struct irq_data *d) { - int pin = irq_to_gpio(irq); - int type = irq_desc[irq].status & IRQ_TYPE_SENSE_MASK; + int pin = irq_to_gpio(d->irq); + int type = irq_desc[d->irq].status & IRQ_TYPE_SENSE_MASK; u32 reg = (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) ? GPIO_EDGE_MASK(pin) : GPIO_LEVEL_MASK(pin); u32 u = readl(reg); @@ -253,10 +252,10 @@ static void gpio_irq_mask(u32 irq) writel(u, reg); } -static void gpio_irq_unmask(u32 irq) +static void gpio_irq_unmask(struct irq_data *d) { - int pin = irq_to_gpio(irq); - int type = irq_desc[irq].status & IRQ_TYPE_SENSE_MASK; + int pin = irq_to_gpio(d->irq); + int type = irq_desc[d->irq].status & IRQ_TYPE_SENSE_MASK; u32 reg = (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) ? GPIO_EDGE_MASK(pin) : GPIO_LEVEL_MASK(pin); u32 u = readl(reg); @@ -264,20 +263,20 @@ static void gpio_irq_unmask(u32 irq) writel(u, reg); } -static int gpio_irq_set_type(u32 irq, u32 type) +static int gpio_irq_set_type(struct irq_data *d, u32 type) { - int pin = irq_to_gpio(irq); + int pin = irq_to_gpio(d->irq); struct irq_desc *desc; u32 u; u = readl(GPIO_IO_CONF(pin)) & (1 << (pin & 31)); if (!u) { printk(KERN_ERR "orion gpio_irq_set_type failed " - "(irq %d, pin %d).\n", irq, pin); + "(irq %d, pin %d).\n", d->irq, pin); return -EINVAL; } - desc = irq_desc + irq; + desc = irq_desc + d->irq; /* * Set edge/level type. @@ -287,7 +286,7 @@ static int gpio_irq_set_type(u32 irq, u32 type) } else if (type & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) { desc->handle_irq = handle_level_irq; } else { - printk(KERN_ERR "failed to set irq=%d (type=%d)\n", irq, type); + printk(KERN_ERR "failed to set irq=%d (type=%d)\n", d->irq, type); return -EINVAL; } @@ -325,10 +324,10 @@ static int gpio_irq_set_type(u32 irq, u32 type) struct irq_chip orion_gpio_irq_chip = { .name = "orion_gpio_irq", - .ack = gpio_irq_ack, - .mask = gpio_irq_mask, - .unmask = gpio_irq_unmask, - .set_type = gpio_irq_set_type, + .irq_ack = gpio_irq_ack, + .irq_mask = gpio_irq_mask, + .irq_unmask = gpio_irq_unmask, + .irq_set_type = gpio_irq_set_type, }; void orion_gpio_irq_handler(int pinoff) diff --git a/arch/arm/plat-orion/irq.c b/arch/arm/plat-orion/irq.c index 3f9d34f..7d0c7eb 100644 --- a/arch/arm/plat-orion/irq.c +++ b/arch/arm/plat-orion/irq.c @@ -14,31 +14,31 @@ #include <linux/io.h> #include <plat/irq.h> -static void orion_irq_mask(u32 irq) +static void orion_irq_mask(struct irq_data *d) { - void __iomem *maskaddr = get_irq_chip_data(irq); + void __iomem *maskaddr = irq_data_get_irq_chip_data(d); u32 mask; mask = readl(maskaddr); - mask &= ~(1 << (irq & 31)); + mask &= ~(1 << (d->irq & 31)); writel(mask, maskaddr); } -static void orion_irq_unmask(u32 irq) +static void orion_irq_unmask(struct irq_data *d) { - void __iomem *maskaddr = get_irq_chip_data(irq); + void __iomem *maskaddr = irq_data_get_irq_chip_data(d); u32 mask; mask = readl(maskaddr); - mask |= 1 << (irq & 31); + mask |= 1 << (d->irq & 31); writel(mask, maskaddr); } static struct irq_chip orion_irq_chip = { .name = "orion_irq", - .mask = orion_irq_mask, - .mask_ack = orion_irq_mask, - .unmask = orion_irq_unmask, + .irq_mask = orion_irq_mask, + .irq_mask_ack = orion_irq_mask, + .irq_unmask = orion_irq_unmask, }; void __init orion_irq_init(unsigned int irq_start, void __iomem *maskaddr) diff --git a/arch/arm/plat-pxa/gpio.c b/arch/arm/plat-pxa/gpio.c index 98548c6..e7de6ae 100644 --- a/arch/arm/plat-pxa/gpio.c +++ b/arch/arm/plat-pxa/gpio.c @@ -155,10 +155,10 @@ static inline void update_edge_detect(struct pxa_gpio_chip *c) __raw_writel(gfer, c->regbase + GFER_OFFSET); } -static int pxa_gpio_irq_type(unsigned int irq, unsigned int type) +static int pxa_gpio_irq_type(struct irq_data *d, unsigned int type) { struct pxa_gpio_chip *c; - int gpio = irq_to_gpio(irq); + int gpio = irq_to_gpio(d->irq); unsigned long gpdr, mask = GPIO_bit(gpio); c = gpio_to_chip(gpio); @@ -195,7 +195,7 @@ static int pxa_gpio_irq_type(unsigned int irq, unsigned int type) update_edge_detect(c); - pr_debug("%s: IRQ%d (GPIO%d) - edge%s%s\n", __func__, irq, gpio, + pr_debug("%s: IRQ%d (GPIO%d) - edge%s%s\n", __func__, d->irq, gpio, ((type & IRQ_TYPE_EDGE_RISING) ? " rising" : ""), ((type & IRQ_TYPE_EDGE_FALLING) ? " falling" : "")); return 0; @@ -227,17 +227,17 @@ static void pxa_gpio_demux_handler(unsigned int irq, struct irq_desc *desc) } while (loop); } -static void pxa_ack_muxed_gpio(unsigned int irq) +static void pxa_ack_muxed_gpio(struct irq_data *d) { - int gpio = irq_to_gpio(irq); + int gpio = irq_to_gpio(d->irq); struct pxa_gpio_chip *c = gpio_to_chip(gpio); __raw_writel(GPIO_bit(gpio), c->regbase + GEDR_OFFSET); } -static void pxa_mask_muxed_gpio(unsigned int irq) +static void pxa_mask_muxed_gpio(struct irq_data *d) { - int gpio = irq_to_gpio(irq); + int gpio = irq_to_gpio(d->irq); struct pxa_gpio_chip *c = gpio_to_chip(gpio); uint32_t grer, gfer; @@ -249,9 +249,9 @@ static void pxa_mask_muxed_gpio(unsigned int irq) __raw_writel(gfer, c->regbase + GFER_OFFSET); } -static void pxa_unmask_muxed_gpio(unsigned int irq) +static void pxa_unmask_muxed_gpio(struct irq_data *d) { - int gpio = irq_to_gpio(irq); + int gpio = irq_to_gpio(d->irq); struct pxa_gpio_chip *c = gpio_to_chip(gpio); c->irq_mask |= GPIO_bit(gpio); @@ -260,10 +260,10 @@ static void pxa_unmask_muxed_gpio(unsigned int irq) static struct irq_chip pxa_muxed_gpio_chip = { .name = "GPIO", - .ack = pxa_ack_muxed_gpio, - .mask = pxa_mask_muxed_gpio, - .unmask = pxa_unmask_muxed_gpio, - .set_type = pxa_gpio_irq_type, + .irq_ack = pxa_ack_muxed_gpio, + .irq_mask = pxa_mask_muxed_gpio, + .irq_unmask = pxa_unmask_muxed_gpio, + .irq_set_type = pxa_gpio_irq_type, }; void __init pxa_init_gpio(int mux_irq, int start, int end, set_wake_t fn) @@ -291,7 +291,7 @@ void __init pxa_init_gpio(int mux_irq, int start, int end, set_wake_t fn) /* Install handler for GPIO>=2 edge detect interrupts */ set_irq_chained_handler(mux_irq, pxa_gpio_demux_handler); - pxa_muxed_gpio_chip.set_wake = fn; + pxa_muxed_gpio_chip.irq_set_wake = fn; } #ifdef CONFIG_PM diff --git a/arch/arm/plat-pxa/include/plat/gpio.h b/arch/arm/plat-pxa/include/plat/gpio.h index 44248cb..1ddd2b9 100644 --- a/arch/arm/plat-pxa/include/plat/gpio.h +++ b/arch/arm/plat-pxa/include/plat/gpio.h @@ -1,6 +1,8 @@ #ifndef __PLAT_GPIO_H #define __PLAT_GPIO_H +struct irq_data; + /* * We handle the GPIOs by banks, each bank covers up to 32 GPIOs with * one set of registers. The register offsets are organized below: @@ -56,7 +58,7 @@ static inline void gpio_set_value(unsigned gpio, int value) */ extern int pxa_last_gpio; -typedef int (*set_wake_t)(unsigned int irq, unsigned int on); +typedef int (*set_wake_t)(struct irq_data *d, unsigned int on); extern void pxa_init_gpio(int mux_irq, int start, int end, set_wake_t fn); #endif /* __PLAT_GPIO_H */ diff --git a/arch/arm/plat-s3c24xx/devs.c b/arch/arm/plat-s3c24xx/devs.c index 8a42bc4..268f3ed 100644 --- a/arch/arm/plat-s3c24xx/devs.c +++ b/arch/arm/plat-s3c24xx/devs.c @@ -194,7 +194,6 @@ void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *hard_s3c2410ts_ memcpy(&s3c2410ts_info, hard_s3c2410ts_info, sizeof(struct s3c2410_ts_mach_info)); s3c_device_ts.dev.platform_data = &s3c2410ts_info; } -EXPORT_SYMBOL(s3c24xx_ts_set_platdata); /* USB Device (Gadget)*/ diff --git a/arch/arm/plat-s3c24xx/include/plat/irq.h b/arch/arm/plat-s3c24xx/include/plat/irq.h index 69e1be8..ec087d6 100644 --- a/arch/arm/plat-s3c24xx/include/plat/irq.h +++ b/arch/arm/plat-s3c24xx/include/plat/irq.h @@ -107,9 +107,9 @@ s3c_irqsub_ack(unsigned int irqno, unsigned int parentmask, unsigned int group) /* exported for use in arch/arm/mach-s3c2410 */ #ifdef CONFIG_PM -extern int s3c_irq_wake(unsigned int irqno, unsigned int state); +extern int s3c_irq_wake(struct irq_data *data, unsigned int state); #else #define s3c_irq_wake NULL #endif -extern int s3c_irqext_type(unsigned int irq, unsigned int type); +extern int s3c_irqext_type(struct irq_data *d, unsigned int type); diff --git a/arch/arm/plat-s3c24xx/irq-pm.c b/arch/arm/plat-s3c24xx/irq-pm.c index ea8dea3..c3624d8 100644 --- a/arch/arm/plat-s3c24xx/irq-pm.c +++ b/arch/arm/plat-s3c24xx/irq-pm.c @@ -15,11 +15,14 @@ #include <linux/module.h> #include <linux/interrupt.h> #include <linux/sysdev.h> +#include <linux/irq.h> #include <plat/cpu.h> #include <plat/pm.h> #include <plat/irq.h> +#include <asm/irq.h> + /* state for IRQs over sleep */ /* default is to allow for EINT0..EINT15, and IRQ_RTC as wakeup sources @@ -30,15 +33,15 @@ unsigned long s3c_irqwake_intallow = 1L << (IRQ_RTC - IRQ_EINT0) | 0xfL; unsigned long s3c_irqwake_eintallow = 0x0000fff0L; -int s3c_irq_wake(unsigned int irqno, unsigned int state) +int s3c_irq_wake(struct irq_data *data, unsigned int state) { - unsigned long irqbit = 1 << (irqno - IRQ_EINT0); + unsigned long irqbit = 1 << (data->irq - IRQ_EINT0); if (!(s3c_irqwake_intallow & irqbit)) return -ENOENT; printk(KERN_INFO "wake %s for irq %d\n", - state ? "enabled" : "disabled", irqno); + state ? "enabled" : "disabled", data->irq); if (!state) s3c_irqwake_intmask |= irqbit; diff --git a/arch/arm/plat-s3c24xx/irq.c b/arch/arm/plat-s3c24xx/irq.c index ad0d44e..4434cb5 100644 --- a/arch/arm/plat-s3c24xx/irq.c +++ b/arch/arm/plat-s3c24xx/irq.c @@ -34,30 +34,29 @@ #include <plat/irq.h> static void -s3c_irq_mask(unsigned int irqno) +s3c_irq_mask(struct irq_data *data) { + unsigned int irqno = data->irq - IRQ_EINT0; unsigned long mask; - irqno -= IRQ_EINT0; - mask = __raw_readl(S3C2410_INTMSK); mask |= 1UL << irqno; __raw_writel(mask, S3C2410_INTMSK); } static inline void -s3c_irq_ack(unsigned int irqno) +s3c_irq_ack(struct irq_data *data) { - unsigned long bitval = 1UL << (irqno - IRQ_EINT0); + unsigned long bitval = 1UL << (data->irq - IRQ_EINT0); __raw_writel(bitval, S3C2410_SRCPND); __raw_writel(bitval, S3C2410_INTPND); } static inline void -s3c_irq_maskack(unsigned int irqno) +s3c_irq_maskack(struct irq_data *data) { - unsigned long bitval = 1UL << (irqno - IRQ_EINT0); + unsigned long bitval = 1UL << (data->irq - IRQ_EINT0); unsigned long mask; mask = __raw_readl(S3C2410_INTMSK); @@ -69,8 +68,9 @@ s3c_irq_maskack(unsigned int irqno) static void -s3c_irq_unmask(unsigned int irqno) +s3c_irq_unmask(struct irq_data *data) { + unsigned int irqno = data->irq; unsigned long mask; if (irqno != IRQ_TIMER4 && irqno != IRQ_EINT8t23) @@ -85,40 +85,39 @@ s3c_irq_unmask(unsigned int irqno) struct irq_chip s3c_irq_level_chip = { .name = "s3c-level", - .ack = s3c_irq_maskack, - .mask = s3c_irq_mask, - .unmask = s3c_irq_unmask, - .set_wake = s3c_irq_wake + .irq_ack = s3c_irq_maskack, + .irq_mask = s3c_irq_mask, + .irq_unmask = s3c_irq_unmask, + .irq_set_wake = s3c_irq_wake }; struct irq_chip s3c_irq_chip = { .name = "s3c", - .ack = s3c_irq_ack, - .mask = s3c_irq_mask, - .unmask = s3c_irq_unmask, - .set_wake = s3c_irq_wake + .irq_ack = s3c_irq_ack, + .irq_mask = s3c_irq_mask, + .irq_unmask = s3c_irq_unmask, + .irq_set_wake = s3c_irq_wake }; static void -s3c_irqext_mask(unsigned int irqno) +s3c_irqext_mask(struct irq_data *data) { + unsigned int irqno = data->irq - EXTINT_OFF; unsigned long mask; - irqno -= EXTINT_OFF; - mask = __raw_readl(S3C24XX_EINTMASK); mask |= ( 1UL << irqno); __raw_writel(mask, S3C24XX_EINTMASK); } static void -s3c_irqext_ack(unsigned int irqno) +s3c_irqext_ack(struct irq_data *data) { unsigned long req; unsigned long bit; unsigned long mask; - bit = 1UL << (irqno - EXTINT_OFF); + bit = 1UL << (data->irq - EXTINT_OFF); mask = __raw_readl(S3C24XX_EINTMASK); @@ -129,64 +128,57 @@ s3c_irqext_ack(unsigned int irqno) /* not sure if we should be acking the parent irq... */ - if (irqno <= IRQ_EINT7 ) { + if (data->irq <= IRQ_EINT7) { if ((req & 0xf0) == 0) - s3c_irq_ack(IRQ_EINT4t7); + s3c_irq_ack(irq_get_irq_data(IRQ_EINT4t7)); } else { if ((req >> 8) == 0) - s3c_irq_ack(IRQ_EINT8t23); + s3c_irq_ack(irq_get_irq_data(IRQ_EINT8t23)); } } static void -s3c_irqext_unmask(unsigned int irqno) +s3c_irqext_unmask(struct irq_data *data) { + unsigned int irqno = data->irq - EXTINT_OFF; unsigned long mask; - irqno -= EXTINT_OFF; - mask = __raw_readl(S3C24XX_EINTMASK); - mask &= ~( 1UL << irqno); + mask &= ~(1UL << irqno); __raw_writel(mask, S3C24XX_EINTMASK); } int -s3c_irqext_type(unsigned int irq, unsigned int type) +s3c_irqext_type(struct irq_data *data, unsigned int type) { void __iomem *extint_reg; void __iomem *gpcon_reg; unsigned long gpcon_offset, extint_offset; unsigned long newvalue = 0, value; - if ((irq >= IRQ_EINT0) && (irq <= IRQ_EINT3)) - { + if ((data->irq >= IRQ_EINT0) && (data->irq <= IRQ_EINT3)) { gpcon_reg = S3C2410_GPFCON; extint_reg = S3C24XX_EXTINT0; - gpcon_offset = (irq - IRQ_EINT0) * 2; - extint_offset = (irq - IRQ_EINT0) * 4; - } - else if ((irq >= IRQ_EINT4) && (irq <= IRQ_EINT7)) - { + gpcon_offset = (data->irq - IRQ_EINT0) * 2; + extint_offset = (data->irq - IRQ_EINT0) * 4; + } else if ((data->irq >= IRQ_EINT4) && (data->irq <= IRQ_EINT7)) { gpcon_reg = S3C2410_GPFCON; extint_reg = S3C24XX_EXTINT0; - gpcon_offset = (irq - (EXTINT_OFF)) * 2; - extint_offset = (irq - (EXTINT_OFF)) * 4; - } - else if ((irq >= IRQ_EINT8) && (irq <= IRQ_EINT15)) - { + gpcon_offset = (data->irq - (EXTINT_OFF)) * 2; + extint_offset = (data->irq - (EXTINT_OFF)) * 4; + } else if ((data->irq >= IRQ_EINT8) && (data->irq <= IRQ_EINT15)) { gpcon_reg = S3C2410_GPGCON; extint_reg = S3C24XX_EXTINT1; - gpcon_offset = (irq - IRQ_EINT8) * 2; - extint_offset = (irq - IRQ_EINT8) * 4; - } - else if ((irq >= IRQ_EINT16) && (irq <= IRQ_EINT23)) - { + gpcon_offset = (data->irq - IRQ_EINT8) * 2; + extint_offset = (data->irq - IRQ_EINT8) * 4; + } else if ((data->irq >= IRQ_EINT16) && (data->irq <= IRQ_EINT23)) { gpcon_reg = S3C2410_GPGCON; extint_reg = S3C24XX_EXTINT2; - gpcon_offset = (irq - IRQ_EINT8) * 2; - extint_offset = (irq - IRQ_EINT16) * 4; - } else + gpcon_offset = (data->irq - IRQ_EINT8) * 2; + extint_offset = (data->irq - IRQ_EINT16) * 4; + } else { return -1; + } /* Set the GPIO to external interrupt mode */ value = __raw_readl(gpcon_reg); @@ -234,20 +226,20 @@ s3c_irqext_type(unsigned int irq, unsigned int type) static struct irq_chip s3c_irqext_chip = { .name = "s3c-ext", - .mask = s3c_irqext_mask, - .unmask = s3c_irqext_unmask, - .ack = s3c_irqext_ack, - .set_type = s3c_irqext_type, - .set_wake = s3c_irqext_wake + .irq_mask = s3c_irqext_mask, + .irq_unmask = s3c_irqext_unmask, + .irq_ack = s3c_irqext_ack, + .irq_set_type = s3c_irqext_type, + .irq_set_wake = s3c_irqext_wake }; static struct irq_chip s3c_irq_eint0t4 = { .name = "s3c-ext0", - .ack = s3c_irq_ack, - .mask = s3c_irq_mask, - .unmask = s3c_irq_unmask, - .set_wake = s3c_irq_wake, - .set_type = s3c_irqext_type, + .irq_ack = s3c_irq_ack, + .irq_mask = s3c_irq_mask, + .irq_unmask = s3c_irq_unmask, + .irq_set_wake = s3c_irq_wake, + .irq_set_type = s3c_irqext_type, }; /* mask values for the parent registers for each of the interrupt types */ @@ -261,109 +253,109 @@ static struct irq_chip s3c_irq_eint0t4 = { /* UART0 */ static void -s3c_irq_uart0_mask(unsigned int irqno) +s3c_irq_uart0_mask(struct irq_data *data) { - s3c_irqsub_mask(irqno, INTMSK_UART0, 7); + s3c_irqsub_mask(data->irq, INTMSK_UART0, 7); } static void -s3c_irq_uart0_unmask(unsigned int irqno) +s3c_irq_uart0_unmask(struct irq_data *data) { - s3c_irqsub_unmask(irqno, INTMSK_UART0); + s3c_irqsub_unmask(data->irq, INTMSK_UART0); } static void -s3c_irq_uart0_ack(unsigned int irqno) +s3c_irq_uart0_ack(struct irq_data *data) { - s3c_irqsub_maskack(irqno, INTMSK_UART0, 7); + s3c_irqsub_maskack(data->irq, INTMSK_UART0, 7); } static struct irq_chip s3c_irq_uart0 = { .name = "s3c-uart0", - .mask = s3c_irq_uart0_mask, - .unmask = s3c_irq_uart0_unmask, - .ack = s3c_irq_uart0_ack, + .irq_mask = s3c_irq_uart0_mask, + .irq_unmask = s3c_irq_uart0_unmask, + .irq_ack = s3c_irq_uart0_ack, }; /* UART1 */ static void -s3c_irq_uart1_mask(unsigned int irqno) +s3c_irq_uart1_mask(struct irq_data *data) { - s3c_irqsub_mask(irqno, INTMSK_UART1, 7 << 3); + s3c_irqsub_mask(data->irq, INTMSK_UART1, 7 << 3); } static void -s3c_irq_uart1_unmask(unsigned int irqno) +s3c_irq_uart1_unmask(struct irq_data *data) { - s3c_irqsub_unmask(irqno, INTMSK_UART1); + s3c_irqsub_unmask(data->irq, INTMSK_UART1); } static void -s3c_irq_uart1_ack(unsigned int irqno) +s3c_irq_uart1_ack(struct irq_data *data) { - s3c_irqsub_maskack(irqno, INTMSK_UART1, 7 << 3); + s3c_irqsub_maskack(data->irq, INTMSK_UART1, 7 << 3); } static struct irq_chip s3c_irq_uart1 = { .name = "s3c-uart1", - .mask = s3c_irq_uart1_mask, - .unmask = s3c_irq_uart1_unmask, - .ack = s3c_irq_uart1_ack, + .irq_mask = s3c_irq_uart1_mask, + .irq_unmask = s3c_irq_uart1_unmask, + .irq_ack = s3c_irq_uart1_ack, }; /* UART2 */ static void -s3c_irq_uart2_mask(unsigned int irqno) +s3c_irq_uart2_mask(struct irq_data *data) { - s3c_irqsub_mask(irqno, INTMSK_UART2, 7 << 6); + s3c_irqsub_mask(data->irq, INTMSK_UART2, 7 << 6); } static void -s3c_irq_uart2_unmask(unsigned int irqno) +s3c_irq_uart2_unmask(struct irq_data *data) { - s3c_irqsub_unmask(irqno, INTMSK_UART2); + s3c_irqsub_unmask(data->irq, INTMSK_UART2); } static void -s3c_irq_uart2_ack(unsigned int irqno) +s3c_irq_uart2_ack(struct irq_data *data) { - s3c_irqsub_maskack(irqno, INTMSK_UART2, 7 << 6); + s3c_irqsub_maskack(data->irq, INTMSK_UART2, 7 << 6); } static struct irq_chip s3c_irq_uart2 = { .name = "s3c-uart2", - .mask = s3c_irq_uart2_mask, - .unmask = s3c_irq_uart2_unmask, - .ack = s3c_irq_uart2_ack, + .irq_mask = s3c_irq_uart2_mask, + .irq_unmask = s3c_irq_uart2_unmask, + .irq_ack = s3c_irq_uart2_ack, }; /* ADC and Touchscreen */ static void -s3c_irq_adc_mask(unsigned int irqno) +s3c_irq_adc_mask(struct irq_data *d) { - s3c_irqsub_mask(irqno, INTMSK_ADCPARENT, 3 << 9); + s3c_irqsub_mask(d->irq, INTMSK_ADCPARENT, 3 << 9); } static void -s3c_irq_adc_unmask(unsigned int irqno) +s3c_irq_adc_unmask(struct irq_data *d) { - s3c_irqsub_unmask(irqno, INTMSK_ADCPARENT); + s3c_irqsub_unmask(d->irq, INTMSK_ADCPARENT); } static void -s3c_irq_adc_ack(unsigned int irqno) +s3c_irq_adc_ack(struct irq_data *d) { - s3c_irqsub_ack(irqno, INTMSK_ADCPARENT, 3 << 9); + s3c_irqsub_ack(d->irq, INTMSK_ADCPARENT, 3 << 9); } static struct irq_chip s3c_irq_adc = { .name = "s3c-adc", - .mask = s3c_irq_adc_mask, - .unmask = s3c_irq_adc_unmask, - .ack = s3c_irq_adc_ack, + .irq_mask = s3c_irq_adc_mask, + .irq_unmask = s3c_irq_adc_unmask, + .irq_ack = s3c_irq_adc_ack, }; /* irq demux for adc */ diff --git a/arch/arm/plat-s3c24xx/s3c2443-clock.c b/arch/arm/plat-s3c24xx/s3c2443-clock.c index 461f070..82f2d4a 100644 --- a/arch/arm/plat-s3c24xx/s3c2443-clock.c +++ b/arch/arm/plat-s3c24xx/s3c2443-clock.c @@ -271,7 +271,7 @@ static struct clk init_clocks[] = { .ctrlbit = S3C2443_HCLKCON_DMA5, }, { .name = "hsmmc", - .id = 0, + .id = 1, .parent = &clk_h, .enable = s3c2443_clkcon_enable_h, .ctrlbit = S3C2443_HCLKCON_HSMMC, diff --git a/arch/arm/plat-s5p/Kconfig b/arch/arm/plat-s5p/Kconfig index 65dbfa8..deb3995 100644 --- a/arch/arm/plat-s5p/Kconfig +++ b/arch/arm/plat-s5p/Kconfig @@ -56,3 +56,29 @@ config S5P_DEV_ONENAND bool help Compile in platform device definition for OneNAND controller + +config S5P_DEV_CSIS0 + bool + help + Compile in platform device definitions for MIPI-CSIS channel 0 + +config S5P_DEV_CSIS1 + bool + help + Compile in platform device definitions for MIPI-CSIS channel 1 + +menuconfig S5P_SYSMMU + bool "SYSMMU support" + depends on ARCH_S5PV310 + help + This is a System MMU driver for Samsung ARM based Soc. + +if S5P_SYSMMU + +config S5P_SYSMMU_DEBUG + bool "Enables debug messages" + depends on S5P_SYSMMU + help + This enables SYSMMU driver debug massages. + +endif diff --git a/arch/arm/plat-s5p/Makefile b/arch/arm/plat-s5p/Makefile index de65238..92efe1a 100644 --- a/arch/arm/plat-s5p/Makefile +++ b/arch/arm/plat-s5p/Makefile @@ -28,3 +28,6 @@ obj-$(CONFIG_S5P_DEV_FIMC0) += dev-fimc0.o obj-$(CONFIG_S5P_DEV_FIMC1) += dev-fimc1.o obj-$(CONFIG_S5P_DEV_FIMC2) += dev-fimc2.o obj-$(CONFIG_S5P_DEV_ONENAND) += dev-onenand.o +obj-$(CONFIG_S5P_DEV_CSIS0) += dev-csis0.o +obj-$(CONFIG_S5P_DEV_CSIS1) += dev-csis1.o +obj-$(CONFIG_S5P_SYSMMU) += sysmmu.o diff --git a/arch/arm/plat-s5p/cpu.c b/arch/arm/plat-s5p/cpu.c index 74f7f5a..047d31c 100644 --- a/arch/arm/plat-s5p/cpu.c +++ b/arch/arm/plat-s5p/cpu.c @@ -108,6 +108,11 @@ static struct map_desc s5p_iodesc[] __initdata = { .pfn = __phys_to_pfn(S3C_PA_WDT), .length = SZ_4K, .type = MT_DEVICE, + }, { + .virtual = (unsigned long)S5P_VA_SROMC, + .pfn = __phys_to_pfn(S5P_PA_SROMC), + .length = SZ_4K, + .type = MT_DEVICE, }, }; diff --git a/arch/arm/plat-s5p/dev-csis0.c b/arch/arm/plat-s5p/dev-csis0.c new file mode 100644 index 0000000..dfab1c8 --- /dev/null +++ b/arch/arm/plat-s5p/dev-csis0.c @@ -0,0 +1,34 @@ +/* + * Copyright (C) 2010 Samsung Electronics + * + * S5P series device definition for MIPI-CSIS channel 0 + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#include <linux/kernel.h> +#include <linux/interrupt.h> +#include <linux/platform_device.h> +#include <mach/map.h> + +static struct resource s5p_mipi_csis0_resource[] = { + [0] = { + .start = S5P_PA_MIPI_CSIS0, + .end = S5P_PA_MIPI_CSIS0 + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = IRQ_MIPI_CSIS0, + .end = IRQ_MIPI_CSIS0, + .flags = IORESOURCE_IRQ, + } +}; + +struct platform_device s5p_device_mipi_csis0 = { + .name = "s5p-mipi-csis", + .id = 0, + .num_resources = ARRAY_SIZE(s5p_mipi_csis0_resource), + .resource = s5p_mipi_csis0_resource, +}; diff --git a/arch/arm/plat-s5p/dev-csis1.c b/arch/arm/plat-s5p/dev-csis1.c new file mode 100644 index 0000000..e3053f2 --- /dev/null +++ b/arch/arm/plat-s5p/dev-csis1.c @@ -0,0 +1,34 @@ +/* + * Copyright (C) 2010 Samsung Electronics + * + * S5P series device definition for MIPI-CSIS channel 1 + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#include <linux/kernel.h> +#include <linux/interrupt.h> +#include <linux/platform_device.h> +#include <mach/map.h> + +static struct resource s5p_mipi_csis1_resource[] = { + [0] = { + .start = S5P_PA_MIPI_CSIS1, + .end = S5P_PA_MIPI_CSIS1 + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = IRQ_MIPI_CSIS1, + .end = IRQ_MIPI_CSIS1, + .flags = IORESOURCE_IRQ, + }, +}; + +struct platform_device s5p_device_mipi_csis1 = { + .name = "s5p-mipi-csis", + .id = 1, + .num_resources = ARRAY_SIZE(s5p_mipi_csis1_resource), + .resource = s5p_mipi_csis1_resource, +}; diff --git a/arch/arm/plat-s5p/include/plat/csis.h b/arch/arm/plat-s5p/include/plat/csis.h new file mode 100644 index 0000000..51e308c --- /dev/null +++ b/arch/arm/plat-s5p/include/plat/csis.h @@ -0,0 +1,28 @@ +/* + * Copyright (C) 2010 Samsung Electronics + * + * S5P series MIPI CSI slave device support + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef PLAT_S5P_CSIS_H_ +#define PLAT_S5P_CSIS_H_ __FILE__ + +/** + * struct s5p_platform_mipi_csis - platform data for MIPI-CSIS + * @clk_rate: bus clock frequency + * @lanes: number of data lanes used + * @alignment: data alignment in bits + * @hs_settle: HS-RX settle time + */ +struct s5p_platform_mipi_csis { + unsigned long clk_rate; + u8 lanes; + u8 alignment; + u8 hs_settle; +}; + +#endif /* PLAT_S5P_CSIS_H_ */ diff --git a/arch/arm/plat-s5p/include/plat/map-s5p.h b/arch/arm/plat-s5p/include/plat/map-s5p.h index fef353d..d973d39 100644 --- a/arch/arm/plat-s5p/include/plat/map-s5p.h +++ b/arch/arm/plat-s5p/include/plat/map-s5p.h @@ -15,6 +15,7 @@ #define S5P_VA_CHIPID S3C_ADDR(0x02000000) #define S5P_VA_CMU S3C_ADDR(0x02100000) +#define S5P_VA_PMU S3C_ADDR(0x02180000) #define S5P_VA_GPIO S3C_ADDR(0x02200000) #define S5P_VA_GPIO1 S5P_VA_GPIO #define S5P_VA_GPIO2 S3C_ADDR(0x02240000) diff --git a/arch/arm/plat-s5p/include/plat/regs-srom.h b/arch/arm/plat-s5p/include/plat/regs-srom.h new file mode 100644 index 0000000..f121ab5 --- /dev/null +++ b/arch/arm/plat-s5p/include/plat/regs-srom.h @@ -0,0 +1,54 @@ +/* linux/arch/arm/plat-s5p/include/plat/regs-srom.h + * + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * S5P SROMC register definitions + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_PLAT_S5P_REGS_SROM_H +#define __ASM_PLAT_S5P_REGS_SROM_H __FILE__ + +#include <mach/map.h> + +#define S5P_SROMREG(x) (S5P_VA_SROMC + (x)) + +#define S5P_SROM_BW S5P_SROMREG(0x0) +#define S5P_SROM_BC0 S5P_SROMREG(0x4) +#define S5P_SROM_BC1 S5P_SROMREG(0x8) +#define S5P_SROM_BC2 S5P_SROMREG(0xc) +#define S5P_SROM_BC3 S5P_SROMREG(0x10) +#define S5P_SROM_BC4 S5P_SROMREG(0x14) +#define S5P_SROM_BC5 S5P_SROMREG(0x18) + +/* one register BW holds 4 x 4-bit packed settings for NCS0 - NCS3 */ + +#define S5P_SROM_BW__DATAWIDTH__SHIFT 0 +#define S5P_SROM_BW__ADDRMODE__SHIFT 1 +#define S5P_SROM_BW__WAITENABLE__SHIFT 2 +#define S5P_SROM_BW__BYTEENABLE__SHIFT 3 + +#define S5P_SROM_BW__CS_MASK 0xf + +#define S5P_SROM_BW__NCS0__SHIFT 0 +#define S5P_SROM_BW__NCS1__SHIFT 4 +#define S5P_SROM_BW__NCS2__SHIFT 8 +#define S5P_SROM_BW__NCS3__SHIFT 12 +#define S5P_SROM_BW__NCS4__SHIFT 16 +#define S5P_SROM_BW__NCS5__SHIFT 20 + +/* applies to same to BCS0 - BCS3 */ + +#define S5P_SROM_BCX__PMC__SHIFT 0 +#define S5P_SROM_BCX__TACP__SHIFT 4 +#define S5P_SROM_BCX__TCAH__SHIFT 8 +#define S5P_SROM_BCX__TCOH__SHIFT 12 +#define S5P_SROM_BCX__TACC__SHIFT 16 +#define S5P_SROM_BCX__TCOS__SHIFT 24 +#define S5P_SROM_BCX__TACS__SHIFT 28 + +#endif /* __ASM_PLAT_S5P_REGS_SROM_H */ diff --git a/arch/arm/plat-s5p/include/plat/sysmmu.h b/arch/arm/plat-s5p/include/plat/sysmmu.h new file mode 100644 index 0000000..db298fc --- /dev/null +++ b/arch/arm/plat-s5p/include/plat/sysmmu.h @@ -0,0 +1,23 @@ +/* linux/arch/arm/plat-s5p/include/plat/sysmmu.h + * + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * Samsung sysmmu driver + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_PLAT_S5P_SYSMMU_H +#define __ASM_PLAT_S5P_SYSMMU_H __FILE__ + +/* debug macro */ +#ifdef CONFIG_S5P_SYSMMU_DEBUG +#define sysmmu_debug(fmt, arg...) printk(KERN_INFO "[%s] " fmt, __func__, ## arg) +#else +#define sysmmu_debug(fmt, arg...) do { } while (0) +#endif + +#endif /* __ASM_PLAT_S5P_SYSMMU_H */ diff --git a/arch/arm/plat-s5p/irq-eint.c b/arch/arm/plat-s5p/irq-eint.c index 752f1a6..225aa25 100644 --- a/arch/arm/plat-s5p/irq-eint.c +++ b/arch/arm/plat-s5p/irq-eint.c @@ -28,39 +28,40 @@ #include <plat/gpio-cfg.h> #include <mach/regs-gpio.h> -static inline void s5p_irq_eint_mask(unsigned int irq) +static inline void s5p_irq_eint_mask(struct irq_data *data) { u32 mask; - mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(irq))); - mask |= eint_irq_to_bit(irq); - __raw_writel(mask, S5P_EINT_MASK(EINT_REG_NR(irq))); + mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(data->irq))); + mask |= eint_irq_to_bit(data->irq); + __raw_writel(mask, S5P_EINT_MASK(EINT_REG_NR(data->irq))); } -static void s5p_irq_eint_unmask(unsigned int irq) +static void s5p_irq_eint_unmask(struct irq_data *data) { u32 mask; - mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(irq))); - mask &= ~(eint_irq_to_bit(irq)); - __raw_writel(mask, S5P_EINT_MASK(EINT_REG_NR(irq))); + mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(data->irq))); + mask &= ~(eint_irq_to_bit(data->irq)); + __raw_writel(mask, S5P_EINT_MASK(EINT_REG_NR(data->irq))); } -static inline void s5p_irq_eint_ack(unsigned int irq) +static inline void s5p_irq_eint_ack(struct irq_data *data) { - __raw_writel(eint_irq_to_bit(irq), S5P_EINT_PEND(EINT_REG_NR(irq))); + __raw_writel(eint_irq_to_bit(data->irq), + S5P_EINT_PEND(EINT_REG_NR(data->irq))); } -static void s5p_irq_eint_maskack(unsigned int irq) +static void s5p_irq_eint_maskack(struct irq_data *data) { /* compiler should in-line these */ - s5p_irq_eint_mask(irq); - s5p_irq_eint_ack(irq); + s5p_irq_eint_mask(data); + s5p_irq_eint_ack(data); } -static int s5p_irq_eint_set_type(unsigned int irq, unsigned int type) +static int s5p_irq_eint_set_type(struct irq_data *data, unsigned int type) { - int offs = EINT_OFFSET(irq); + int offs = EINT_OFFSET(data->irq); int shift; u32 ctrl, mask; u32 newvalue = 0; @@ -94,10 +95,10 @@ static int s5p_irq_eint_set_type(unsigned int irq, unsigned int type) shift = (offs & 0x7) * 4; mask = 0x7 << shift; - ctrl = __raw_readl(S5P_EINT_CON(EINT_REG_NR(irq))); + ctrl = __raw_readl(S5P_EINT_CON(EINT_REG_NR(data->irq))); ctrl &= ~mask; ctrl |= newvalue << shift; - __raw_writel(ctrl, S5P_EINT_CON(EINT_REG_NR(irq))); + __raw_writel(ctrl, S5P_EINT_CON(EINT_REG_NR(data->irq))); if ((0 <= offs) && (offs < 8)) s3c_gpio_cfgpin(EINT_GPIO_0(offs & 0x7), EINT_MODE); @@ -119,13 +120,13 @@ static int s5p_irq_eint_set_type(unsigned int irq, unsigned int type) static struct irq_chip s5p_irq_eint = { .name = "s5p-eint", - .mask = s5p_irq_eint_mask, - .unmask = s5p_irq_eint_unmask, - .mask_ack = s5p_irq_eint_maskack, - .ack = s5p_irq_eint_ack, - .set_type = s5p_irq_eint_set_type, + .irq_mask = s5p_irq_eint_mask, + .irq_unmask = s5p_irq_eint_unmask, + .irq_mask_ack = s5p_irq_eint_maskack, + .irq_ack = s5p_irq_eint_ack, + .irq_set_type = s5p_irq_eint_set_type, #ifdef CONFIG_PM - .set_wake = s3c_irqext_wake, + .irq_set_wake = s3c_irqext_wake, #endif }; @@ -159,42 +160,43 @@ static void s5p_irq_demux_eint16_31(unsigned int irq, struct irq_desc *desc) s5p_irq_demux_eint(IRQ_EINT(24)); } -static inline void s5p_irq_vic_eint_mask(unsigned int irq) +static inline void s5p_irq_vic_eint_mask(struct irq_data *data) { - void __iomem *base = get_irq_chip_data(irq); + void __iomem *base = irq_data_get_irq_chip_data(data); - s5p_irq_eint_mask(irq); - writel(1 << EINT_OFFSET(irq), base + VIC_INT_ENABLE_CLEAR); + s5p_irq_eint_mask(data); + writel(1 << EINT_OFFSET(data->irq), base + VIC_INT_ENABLE_CLEAR); } -static void s5p_irq_vic_eint_unmask(unsigned int irq) +static void s5p_irq_vic_eint_unmask(struct irq_data *data) { - void __iomem *base = get_irq_chip_data(irq); + void __iomem *base = irq_data_get_irq_chip_data(data); - s5p_irq_eint_unmask(irq); - writel(1 << EINT_OFFSET(irq), base + VIC_INT_ENABLE); + s5p_irq_eint_unmask(data); + writel(1 << EINT_OFFSET(data->irq), base + VIC_INT_ENABLE); } -static inline void s5p_irq_vic_eint_ack(unsigned int irq) +static inline void s5p_irq_vic_eint_ack(struct irq_data *data) { - __raw_writel(eint_irq_to_bit(irq), S5P_EINT_PEND(EINT_REG_NR(irq))); + __raw_writel(eint_irq_to_bit(data->irq), + S5P_EINT_PEND(EINT_REG_NR(data->irq))); } -static void s5p_irq_vic_eint_maskack(unsigned int irq) +static void s5p_irq_vic_eint_maskack(struct irq_data *data) { - s5p_irq_vic_eint_mask(irq); - s5p_irq_vic_eint_ack(irq); + s5p_irq_vic_eint_mask(data); + s5p_irq_vic_eint_ack(data); } static struct irq_chip s5p_irq_vic_eint = { .name = "s5p_vic_eint", - .mask = s5p_irq_vic_eint_mask, - .unmask = s5p_irq_vic_eint_unmask, - .mask_ack = s5p_irq_vic_eint_maskack, - .ack = s5p_irq_vic_eint_ack, - .set_type = s5p_irq_eint_set_type, + .irq_mask = s5p_irq_vic_eint_mask, + .irq_unmask = s5p_irq_vic_eint_unmask, + .irq_mask_ack = s5p_irq_vic_eint_maskack, + .irq_ack = s5p_irq_vic_eint_ack, + .irq_set_type = s5p_irq_eint_set_type, #ifdef CONFIG_PM - .set_wake = s3c_irqext_wake, + .irq_set_wake = s3c_irqext_wake, #endif }; diff --git a/arch/arm/plat-s5p/irq-gpioint.c b/arch/arm/plat-s5p/irq-gpioint.c index 0e5dc8c..3b6bf89 100644 --- a/arch/arm/plat-s5p/irq-gpioint.c +++ b/arch/arm/plat-s5p/irq-gpioint.c @@ -30,9 +30,9 @@ static struct s3c_gpio_chip *irq_chips[S5P_GPIOINT_GROUP_MAXNR]; -static int s5p_gpioint_get_group(unsigned int irq) +static int s5p_gpioint_get_group(struct irq_data *data) { - struct gpio_chip *chip = get_irq_data(irq); + struct gpio_chip *chip = irq_data_get_irq_data(data); struct s3c_gpio_chip *s3c_chip = container_of(chip, struct s3c_gpio_chip, chip); int group; @@ -44,22 +44,22 @@ static int s5p_gpioint_get_group(unsigned int irq) return group; } -static int s5p_gpioint_get_offset(unsigned int irq) +static int s5p_gpioint_get_offset(struct irq_data *data) { - struct gpio_chip *chip = get_irq_data(irq); + struct gpio_chip *chip = irq_data_get_irq_data(data); struct s3c_gpio_chip *s3c_chip = container_of(chip, struct s3c_gpio_chip, chip); - return irq - s3c_chip->irq_base; + return data->irq - s3c_chip->irq_base; } -static void s5p_gpioint_ack(unsigned int irq) +static void s5p_gpioint_ack(struct irq_data *data) { int group, offset, pend_offset; unsigned int value; - group = s5p_gpioint_get_group(irq); - offset = s5p_gpioint_get_offset(irq); + group = s5p_gpioint_get_group(data); + offset = s5p_gpioint_get_offset(data); pend_offset = group << 2; value = __raw_readl(S5P_GPIOREG(GPIOINT_PEND_OFFSET) + pend_offset); @@ -67,13 +67,13 @@ static void s5p_gpioint_ack(unsigned int irq) __raw_writel(value, S5P_GPIOREG(GPIOINT_PEND_OFFSET) + pend_offset); } -static void s5p_gpioint_mask(unsigned int irq) +static void s5p_gpioint_mask(struct irq_data *data) { int group, offset, mask_offset; unsigned int value; - group = s5p_gpioint_get_group(irq); - offset = s5p_gpioint_get_offset(irq); + group = s5p_gpioint_get_group(data); + offset = s5p_gpioint_get_offset(data); mask_offset = group << 2; value = __raw_readl(S5P_GPIOREG(GPIOINT_MASK_OFFSET) + mask_offset); @@ -81,13 +81,13 @@ static void s5p_gpioint_mask(unsigned int irq) __raw_writel(value, S5P_GPIOREG(GPIOINT_MASK_OFFSET) + mask_offset); } -static void s5p_gpioint_unmask(unsigned int irq) +static void s5p_gpioint_unmask(struct irq_data *data) { int group, offset, mask_offset; unsigned int value; - group = s5p_gpioint_get_group(irq); - offset = s5p_gpioint_get_offset(irq); + group = s5p_gpioint_get_group(data); + offset = s5p_gpioint_get_offset(data); mask_offset = group << 2; value = __raw_readl(S5P_GPIOREG(GPIOINT_MASK_OFFSET) + mask_offset); @@ -95,19 +95,19 @@ static void s5p_gpioint_unmask(unsigned int irq) __raw_writel(value, S5P_GPIOREG(GPIOINT_MASK_OFFSET) + mask_offset); } -static void s5p_gpioint_mask_ack(unsigned int irq) +static void s5p_gpioint_mask_ack(struct irq_data *data) { - s5p_gpioint_mask(irq); - s5p_gpioint_ack(irq); + s5p_gpioint_mask(data); + s5p_gpioint_ack(data); } -static int s5p_gpioint_set_type(unsigned int irq, unsigned int type) +static int s5p_gpioint_set_type(struct irq_data *data, unsigned int type) { int group, offset, con_offset; unsigned int value; - group = s5p_gpioint_get_group(irq); - offset = s5p_gpioint_get_offset(irq); + group = s5p_gpioint_get_group(data); + offset = s5p_gpioint_get_offset(data); con_offset = group << 2; switch (type) { @@ -142,11 +142,11 @@ static int s5p_gpioint_set_type(unsigned int irq, unsigned int type) struct irq_chip s5p_gpioint = { .name = "s5p_gpioint", - .ack = s5p_gpioint_ack, - .mask = s5p_gpioint_mask, - .mask_ack = s5p_gpioint_mask_ack, - .unmask = s5p_gpioint_unmask, - .set_type = s5p_gpioint_set_type, + .irq_ack = s5p_gpioint_ack, + .irq_mask = s5p_gpioint_mask, + .irq_mask_ack = s5p_gpioint_mask_ack, + .irq_unmask = s5p_gpioint_unmask, + .irq_set_type = s5p_gpioint_set_type, }; static void s5p_gpioint_handler(unsigned int irq, struct irq_desc *desc) diff --git a/arch/arm/plat-s5p/irq-pm.c b/arch/arm/plat-s5p/irq-pm.c index dc33b9e..5259ad4 100644 --- a/arch/arm/plat-s5p/irq-pm.c +++ b/arch/arm/plat-s5p/irq-pm.c @@ -37,14 +37,14 @@ unsigned long s3c_irqwake_intallow = 0x00000006L; unsigned long s3c_irqwake_eintallow = 0xffffffffL; -int s3c_irq_wake(unsigned int irqno, unsigned int state) +int s3c_irq_wake(struct irq_data *data, unsigned int state) { unsigned long irqbit; - switch (irqno) { + switch (data->irq) { case IRQ_RTC_TIC: case IRQ_RTC_ALARM: - irqbit = 1 << (irqno + 1 - IRQ_RTC_ALARM); + irqbit = 1 << (data->irq + 1 - IRQ_RTC_ALARM); if (!state) s3c_irqwake_intmask |= irqbit; else diff --git a/arch/arm/plat-s5p/sysmmu.c b/arch/arm/plat-s5p/sysmmu.c new file mode 100644 index 0000000..d804914 --- /dev/null +++ b/arch/arm/plat-s5p/sysmmu.c @@ -0,0 +1,328 @@ +/* linux/arch/arm/plat-s5p/sysmmu.c + * + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/io.h> +#include <linux/interrupt.h> +#include <linux/platform_device.h> + +#include <mach/map.h> +#include <mach/regs-sysmmu.h> +#include <mach/sysmmu.h> + +#include <plat/sysmmu.h> + +struct sysmmu_controller s5p_sysmmu_cntlrs[S5P_SYSMMU_TOTAL_IPNUM]; + +void s5p_sysmmu_register(struct sysmmu_controller *sysmmuconp) +{ + unsigned int reg_mmu_ctrl; + unsigned int reg_mmu_status; + unsigned int reg_pt_base_addr; + unsigned int reg_int_status; + unsigned int reg_page_ft_addr; + + reg_int_status = __raw_readl(sysmmuconp->regs + S5P_INT_STATUS); + reg_mmu_ctrl = __raw_readl(sysmmuconp->regs + S5P_MMU_CTRL); + reg_mmu_status = __raw_readl(sysmmuconp->regs + S5P_MMU_STATUS); + reg_pt_base_addr = __raw_readl(sysmmuconp->regs + S5P_PT_BASE_ADDR); + reg_page_ft_addr = __raw_readl(sysmmuconp->regs + S5P_PAGE_FAULT_ADDR); + + printk(KERN_INFO "%s: ips:%s\n", __func__, sysmmuconp->name); + printk(KERN_INFO "%s: MMU_CTRL:0x%X, ", __func__, reg_mmu_ctrl); + printk(KERN_INFO "MMU_STATUS:0x%X, PT_BASE_ADDR:0x%X\n", reg_mmu_status, reg_pt_base_addr); + printk(KERN_INFO "%s: INT_STATUS:0x%X, PAGE_FAULT_ADDR:0x%X\n", __func__, reg_int_status, reg_page_ft_addr); + + switch (reg_int_status & 0xFF) { + case 0x1: + printk(KERN_INFO "%s: Page fault\n", __func__); + printk(KERN_INFO "%s: Virtual address causing last page fault or bus error : 0x%x\n", __func__ , reg_page_ft_addr); + break; + case 0x2: + printk(KERN_INFO "%s: AR multi-hit fault\n", __func__); + break; + case 0x4: + printk(KERN_INFO "%s: AW multi-hit fault\n", __func__); + break; + case 0x8: + printk(KERN_INFO "%s: Bus error\n", __func__); + break; + case 0x10: + printk(KERN_INFO "%s: AR Security protection fault\n", __func__); + break; + case 0x20: + printk(KERN_INFO "%s: AR Access protection fault\n", __func__); + break; + case 0x40: + printk(KERN_INFO "%s: AW Security protection fault\n", __func__); + break; + case 0x80: + printk(KERN_INFO "%s: AW Access protection fault\n", __func__); + break; + } +} + +static irqreturn_t s5p_sysmmu_irq(int irq, void *dev_id) +{ + unsigned int i; + unsigned int reg_int_status; + struct sysmmu_controller *sysmmuconp; + + for (i = 0; i < S5P_SYSMMU_TOTAL_IPNUM; i++) { + sysmmuconp = &s5p_sysmmu_cntlrs[i]; + + if (sysmmuconp->enable == true) { + reg_int_status = __raw_readl(sysmmuconp->regs + S5P_INT_STATUS); + + if (reg_int_status & 0xFF) + s5p_sysmmu_register(sysmmuconp); + } + } + return IRQ_HANDLED; +} + +int s5p_sysmmu_set_tablebase_pgd(sysmmu_ips ips, unsigned long pgd) +{ + struct sysmmu_controller *sysmmuconp = NULL; + + sysmmuconp = &s5p_sysmmu_cntlrs[ips]; + + if (sysmmuconp == NULL) { + printk(KERN_ERR "failed to get ip's sysmmu info\n"); + return 1; + } + + /* Set sysmmu page table base address */ + __raw_writel(pgd, sysmmuconp->regs + S5P_PT_BASE_ADDR); + + if (s5p_sysmmu_tlb_invalidate(ips) != 0) + printk(KERN_ERR "failed s5p_sysmmu_tlb_invalidate\n"); + + return 0; +} + +static int s5p_sysmmu_set_tablebase(sysmmu_ips ips) +{ + unsigned int pg; + struct sysmmu_controller *sysmmuconp; + + sysmmuconp = &s5p_sysmmu_cntlrs[ips]; + + if (sysmmuconp == NULL) { + printk(KERN_ERR "failed to get ip's sysmmu info\n"); + return 1; + } + + __asm__("mrc p15, 0, %0, c2, c0, 0" \ + : "=r" (pg) : : "cc"); \ + pg &= ~0x3fff; + + sysmmu_debug("CP15 TTBR0 : 0x%x\n", pg); + + /* Set sysmmu page table base address */ + __raw_writel(pg, sysmmuconp->regs + S5P_PT_BASE_ADDR); + + return 0; +} + +int s5p_sysmmu_enable(sysmmu_ips ips) +{ + unsigned int reg; + + struct sysmmu_controller *sysmmuconp; + + sysmmuconp = &s5p_sysmmu_cntlrs[ips]; + + if (sysmmuconp == NULL) { + printk(KERN_ERR "failed to get ip's sysmmu info\n"); + return 1; + } + + s5p_sysmmu_set_tablebase(ips); + + /* replacement policy : LRU */ + reg = __raw_readl(sysmmuconp->regs + S5P_MMU_CFG); + reg |= 0x1; + __raw_writel(reg, sysmmuconp->regs + S5P_MMU_CFG); + + /* Enable interrupt, Enable MMU */ + reg = __raw_readl(sysmmuconp->regs + S5P_MMU_CTRL); + reg |= (0x1 << 2) | (0x1 << 0); + + __raw_writel(reg, sysmmuconp->regs + S5P_MMU_CTRL); + + sysmmuconp->enable = true; + + return 0; +} + +int s5p_sysmmu_disable(sysmmu_ips ips) +{ + unsigned int reg; + + struct sysmmu_controller *sysmmuconp = NULL; + + if (ips > S5P_SYSMMU_TOTAL_IPNUM) + printk(KERN_ERR "failed to get ips parameter\n"); + + sysmmuconp = &s5p_sysmmu_cntlrs[ips]; + + if (sysmmuconp == NULL) { + printk(KERN_ERR "failed to get ip's sysmmu info\n"); + return 1; + } + + reg = __raw_readl(sysmmuconp->regs + S5P_MMU_CFG); + + /* replacement policy : LRU */ + reg |= 0x1; + __raw_writel(reg, sysmmuconp->regs + S5P_MMU_CFG); + + reg = __raw_readl(sysmmuconp->regs + S5P_MMU_CTRL); + + /* Disable MMU */ + reg &= ~0x1; + __raw_writel(reg, sysmmuconp->regs + S5P_MMU_CTRL); + + sysmmuconp->enable = false; + + return 0; +} + +int s5p_sysmmu_tlb_invalidate(sysmmu_ips ips) +{ + unsigned int reg; + struct sysmmu_controller *sysmmuconp = NULL; + + sysmmuconp = &s5p_sysmmu_cntlrs[ips]; + + if (sysmmuconp == NULL) { + printk(KERN_ERR "failed to get ip's sysmmu info\n"); + return 1; + } + + /* set Block MMU for flush TLB */ + reg = __raw_readl(sysmmuconp->regs + S5P_MMU_CTRL); + reg |= 0x1 << 1; + __raw_writel(reg, sysmmuconp->regs + S5P_MMU_CTRL); + + /* flush all TLB entry */ + __raw_writel(0x1, sysmmuconp->regs + S5P_MMU_FLUSH); + + /* set Un-block MMU after flush TLB */ + reg = __raw_readl(sysmmuconp->regs + S5P_MMU_CTRL); + reg &= ~(0x1 << 1); + __raw_writel(reg, sysmmuconp->regs + S5P_MMU_CTRL); + + return 0; +} + +static int s5p_sysmmu_probe(struct platform_device *pdev) +{ + int i; + int ret; + struct resource *res; + struct sysmmu_controller *sysmmuconp; + sysmmu_ips ips; + + for (i = 0; i < S5P_SYSMMU_TOTAL_IPNUM; i++) { + sysmmuconp = &s5p_sysmmu_cntlrs[i]; + if (sysmmuconp == NULL) { + printk(KERN_ERR "failed to get ip's sysmmu info\n"); + ret = -ENOENT; + goto err_res; + } + + sysmmuconp->name = sysmmu_ips_name[i]; + + res = platform_get_resource(pdev, IORESOURCE_MEM, i); + if (!res) { + printk(KERN_ERR "failed to get sysmmu resource\n"); + ret = -ENODEV; + goto err_res; + } + + sysmmuconp->mem = request_mem_region(res->start, + ((res->end) - (res->start)) + 1, pdev->name); + if (!sysmmuconp->mem) { + pr_err("failed to request sysmmu memory region\n"); + ret = -EBUSY; + goto err_res; + } + + sysmmuconp->regs = ioremap(res->start, res->end - res->start + 1); + if (!sysmmuconp->regs) { + pr_err("failed to sysmmu ioremap\n"); + ret = -ENXIO; + goto err_reg; + } + + sysmmuconp->irq = platform_get_irq(pdev, i); + if (sysmmuconp->irq <= 0) { + pr_err("failed to get sysmmu irq resource\n"); + ret = -ENOENT; + goto err_map; + } + + ret = request_irq(sysmmuconp->irq, s5p_sysmmu_irq, IRQF_DISABLED, pdev->name, sysmmuconp); + if (ret) { + pr_err("failed to request irq\n"); + ret = -ENOENT; + goto err_map; + } + + ips = (sysmmu_ips)i; + + sysmmuconp->ips = ips; + } + + return 0; + +err_reg: + release_mem_region((resource_size_t)sysmmuconp->mem, (resource_size_t)((res->end) - (res->start) + 1)); +err_map: + iounmap(sysmmuconp->regs); +err_res: + return ret; +} + +static int s5p_sysmmu_remove(struct platform_device *pdev) +{ + return 0; +} +int s5p_sysmmu_runtime_suspend(struct device *dev) +{ + return 0; +} + +int s5p_sysmmu_runtime_resume(struct device *dev) +{ + return 0; +} + +const struct dev_pm_ops s5p_sysmmu_pm_ops = { + .runtime_suspend = s5p_sysmmu_runtime_suspend, + .runtime_resume = s5p_sysmmu_runtime_resume, +}; + +static struct platform_driver s5p_sysmmu_driver = { + .probe = s5p_sysmmu_probe, + .remove = s5p_sysmmu_remove, + .driver = { + .owner = THIS_MODULE, + .name = "s5p-sysmmu", + .pm = &s5p_sysmmu_pm_ops, + } +}; + +static int __init s5p_sysmmu_init(void) +{ + return platform_driver_register(&s5p_sysmmu_driver); +} +arch_initcall(s5p_sysmmu_init); diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig index dcd6eff4e..32be05c 100644 --- a/arch/arm/plat-samsung/Kconfig +++ b/arch/arm/plat-samsung/Kconfig @@ -95,6 +95,12 @@ config S3C_GPIO_PULL_UPDOWN help Internal configuration to enable the correct GPIO pull helper +config S3C_GPIO_PULL_S3C2443 + bool + select S3C_GPIO_PULL_UPDOWN + help + Internal configuration to enable the correct GPIO pull helper for S3C2443-style GPIO + config S3C_GPIO_PULL_DOWN bool help @@ -333,4 +339,12 @@ config SAMSUNG_WAKEMASK and above. This code allows a set of interrupt to wakeup-mask mappings. See <plat/wakeup-mask.h> +comment "Power Domain" + +config SAMSUNG_PD + bool "Samsung Power Domain" + depends on PM_RUNTIME + help + Say Y here if you want to control Power Domain by Runtime PM. + endif diff --git a/arch/arm/plat-samsung/Makefile b/arch/arm/plat-samsung/Makefile index 19d8a16..29932f8 100644 --- a/arch/arm/plat-samsung/Makefile +++ b/arch/arm/plat-samsung/Makefile @@ -74,6 +74,10 @@ obj-$(CONFIG_SAMSUNG_PM_CHECK) += pm-check.o obj-$(CONFIG_SAMSUNG_WAKEMASK) += wakeup-mask.o +# PD support + +obj-$(CONFIG_SAMSUNG_PD) += pd.o + # PWM support obj-$(CONFIG_HAVE_PWM) += pwm.o diff --git a/arch/arm/plat-samsung/clock.c b/arch/arm/plat-samsung/clock.c index e8d20b0..7728928 100644 --- a/arch/arm/plat-samsung/clock.c +++ b/arch/arm/plat-samsung/clock.c @@ -39,6 +39,9 @@ #include <linux/clk.h> #include <linux/spinlock.h> #include <linux/io.h> +#if defined(CONFIG_DEBUG_FS) +#include <linux/debugfs.h> +#endif #include <mach/hardware.h> #include <asm/irq.h> @@ -447,3 +450,92 @@ int __init s3c24xx_register_baseclocks(unsigned long xtal) return 0; } +#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS) +/* debugfs support to trace clock tree hierarchy and attributes */ + +static struct dentry *clk_debugfs_root; + +static int clk_debugfs_register_one(struct clk *c) +{ + int err; + struct dentry *d, *child, *child_tmp; + struct clk *pa = c->parent; + char s[255]; + char *p = s; + + p += sprintf(p, "%s", c->name); + + if (c->id >= 0) + sprintf(p, ":%d", c->id); + + d = debugfs_create_dir(s, pa ? pa->dent : clk_debugfs_root); + if (!d) + return -ENOMEM; + + c->dent = d; + + d = debugfs_create_u8("usecount", S_IRUGO, c->dent, (u8 *)&c->usage); + if (!d) { + err = -ENOMEM; + goto err_out; + } + + d = debugfs_create_u32("rate", S_IRUGO, c->dent, (u32 *)&c->rate); + if (!d) { + err = -ENOMEM; + goto err_out; + } + return 0; + +err_out: + d = c->dent; + list_for_each_entry_safe(child, child_tmp, &d->d_subdirs, d_u.d_child) + debugfs_remove(child); + debugfs_remove(c->dent); + return err; +} + +static int clk_debugfs_register(struct clk *c) +{ + int err; + struct clk *pa = c->parent; + + if (pa && !pa->dent) { + err = clk_debugfs_register(pa); + if (err) + return err; + } + + if (!c->dent) { + err = clk_debugfs_register_one(c); + if (err) + return err; + } + return 0; +} + +static int __init clk_debugfs_init(void) +{ + struct clk *c; + struct dentry *d; + int err; + + d = debugfs_create_dir("clock", NULL); + if (!d) + return -ENOMEM; + clk_debugfs_root = d; + + list_for_each_entry(c, &clocks, list) { + err = clk_debugfs_register(c); + if (err) + goto err_out; + } + return 0; + +err_out: + debugfs_remove_recursive(clk_debugfs_root); + return err; +} +late_initcall(clk_debugfs_init); + +#endif /* defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS) */ diff --git a/arch/arm/plat-samsung/dev-nand.c b/arch/arm/plat-samsung/dev-nand.c index 3a7b889..6927ae8 100644 --- a/arch/arm/plat-samsung/dev-nand.c +++ b/arch/arm/plat-samsung/dev-nand.c @@ -126,5 +126,3 @@ void __init s3c_nand_set_platdata(struct s3c2410_platform_nand *nand) s3c_device_nand.dev.platform_data = npd; } - -EXPORT_SYMBOL_GPL(s3c_nand_set_platdata); diff --git a/arch/arm/plat-samsung/gpio-config.c b/arch/arm/plat-samsung/gpio-config.c index 0aa32f2..1c0b040 100644 --- a/arch/arm/plat-samsung/gpio-config.c +++ b/arch/arm/plat-samsung/gpio-config.c @@ -278,6 +278,48 @@ s3c_gpio_pull_t s3c_gpio_getpull_updown(struct s3c_gpio_chip *chip, pup &= 0x3; return (__force s3c_gpio_pull_t)pup; } + +#ifdef CONFIG_S3C_GPIO_PULL_S3C2443 +int s3c_gpio_setpull_s3c2443(struct s3c_gpio_chip *chip, + unsigned int off, s3c_gpio_pull_t pull) +{ + switch (pull) { + case S3C_GPIO_PULL_NONE: + pull = 0x01; + break; + case S3C_GPIO_PULL_UP: + pull = 0x00; + break; + case S3C_GPIO_PULL_DOWN: + pull = 0x02; + break; + } + return s3c_gpio_setpull_updown(chip, off, pull); +} + +s3c_gpio_pull_t s3c_gpio_getpull_s3c2443(struct s3c_gpio_chip *chip, + unsigned int off) +{ + s3c_gpio_pull_t pull; + + pull = s3c_gpio_getpull_updown(chip, off); + + switch (pull) { + case 0x00: + pull = S3C_GPIO_PULL_UP; + break; + case 0x01: + case 0x03: + pull = S3C_GPIO_PULL_NONE; + break; + case 0x02: + pull = S3C_GPIO_PULL_DOWN; + break; + } + + return pull; +} +#endif #endif #if defined(CONFIG_S3C_GPIO_PULL_UP) || defined(CONFIG_S3C_GPIO_PULL_DOWN) diff --git a/arch/arm/plat-samsung/gpiolib.c b/arch/arm/plat-samsung/gpiolib.c index c354089..ea37c04 100644 --- a/arch/arm/plat-samsung/gpiolib.c +++ b/arch/arm/plat-samsung/gpiolib.c @@ -197,3 +197,10 @@ void __init samsung_gpiolib_add_4bit2_chips(struct s3c_gpio_chip *chip, s3c_gpiolib_add(chip); } } + +void __init samsung_gpiolib_add_2bit_chips(struct s3c_gpio_chip *chip, + int nr_chips) +{ + for (; nr_chips > 0; nr_chips--, chip++) + s3c_gpiolib_add(chip); +} diff --git a/arch/arm/plat-samsung/include/plat/clock.h b/arch/arm/plat-samsung/include/plat/clock.h index 0fbcd0e..9a82b88 100644 --- a/arch/arm/plat-samsung/include/plat/clock.h +++ b/arch/arm/plat-samsung/include/plat/clock.h @@ -47,6 +47,9 @@ struct clk { struct clk_ops *ops; int (*enable)(struct clk *, int enable); +#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS) + struct dentry *dent; /* For visible tree hierarchy */ +#endif }; /* other clocks which may be registered by board support */ diff --git a/arch/arm/plat-samsung/include/plat/devs.h b/arch/arm/plat-samsung/include/plat/devs.h index e9e3b6e..b4d208b 100644 --- a/arch/arm/plat-samsung/include/plat/devs.h +++ b/arch/arm/plat-samsung/include/plat/devs.h @@ -104,6 +104,7 @@ extern struct platform_device s5pv310_device_i2s0; extern struct platform_device s5pv310_device_i2s1; extern struct platform_device s5pv310_device_i2s2; extern struct platform_device s5pv310_device_spdif; +extern struct platform_device s5pv310_device_pd[]; extern struct platform_device s5p6442_device_pcm0; extern struct platform_device s5p6442_device_pcm1; @@ -115,6 +116,8 @@ extern struct platform_device s5p6440_device_pcm; extern struct platform_device s5p6440_device_iis; extern struct platform_device s5p6450_device_iis0; +extern struct platform_device s5p6450_device_iis1; +extern struct platform_device s5p6450_device_iis2; extern struct platform_device s5p6450_device_pcm0; extern struct platform_device s5pc100_device_ac97; @@ -131,6 +134,11 @@ extern struct platform_device s5p_device_fimc0; extern struct platform_device s5p_device_fimc1; extern struct platform_device s5p_device_fimc2; +extern struct platform_device s5p_device_mipi_csis0; +extern struct platform_device s5p_device_mipi_csis1; + +extern struct platform_device s5pv310_device_sysmmu; + /* s3c2440 specific devices */ #ifdef CONFIG_CPU_S3C2440 diff --git a/arch/arm/plat-samsung/include/plat/gpio-cfg-helpers.h b/arch/arm/plat-samsung/include/plat/gpio-cfg-helpers.h index 0d2c570..5603db0 100644 --- a/arch/arm/plat-samsung/include/plat/gpio-cfg-helpers.h +++ b/arch/arm/plat-samsung/include/plat/gpio-cfg-helpers.h @@ -244,7 +244,7 @@ extern int s3c_gpio_setpull_s3c2443(struct s3c_gpio_chip *chip, * This helper function reads the state of the pull-{up,down} resistor for the * given GPIO in the same case as s3c_gpio_setpull_upown. */ -extern s3c_gpio_pull_t s3c_gpio_getpull_s3c24xx(struct s3c_gpio_chip *chip, +extern s3c_gpio_pull_t s3c_gpio_getpull_s3c2443(struct s3c_gpio_chip *chip, unsigned int off); #endif /* __PLAT_GPIO_CFG_HELPERS_H */ diff --git a/arch/arm/plat-samsung/include/plat/gpio-core.h b/arch/arm/plat-samsung/include/plat/gpio-core.h index 13a22b8..dac35d0 100644 --- a/arch/arm/plat-samsung/include/plat/gpio-core.h +++ b/arch/arm/plat-samsung/include/plat/gpio-core.h @@ -118,6 +118,8 @@ extern void samsung_gpiolib_add_4bit_chips(struct s3c_gpio_chip *chip, int nr_chips); extern void samsung_gpiolib_add_4bit2_chips(struct s3c_gpio_chip *chip, int nr_chips); +extern void samsung_gpiolib_add_2bit_chips(struct s3c_gpio_chip *chip, + int nr_chips); extern void samsung_gpiolib_add_4bit(struct s3c_gpio_chip *chip); extern void samsung_gpiolib_add_4bit2(struct s3c_gpio_chip *chip); diff --git a/arch/arm/plat-samsung/include/plat/pd.h b/arch/arm/plat-samsung/include/plat/pd.h new file mode 100644 index 0000000..5f0ad85 --- /dev/null +++ b/arch/arm/plat-samsung/include/plat/pd.h @@ -0,0 +1,30 @@ +/* linux/arch/arm/plat-samsung/include/plat/pd.h + * + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_PLAT_SAMSUNG_PD_H +#define __ASM_PLAT_SAMSUNG_PD_H __FILE__ + +struct samsung_pd_info { + int (*enable)(struct device *dev); + int (*disable)(struct device *dev); + void __iomem *base; +}; + +enum s5pv310_pd_block { + PD_MFC, + PD_G3D, + PD_LCD0, + PD_LCD1, + PD_TV, + PD_CAM, + PD_GPS +}; + +#endif /* __ASM_PLAT_SAMSUNG_PD_H */ diff --git a/arch/arm/plat-samsung/include/plat/pm.h b/arch/arm/plat-samsung/include/plat/pm.h index 245836d..d9025e3 100644 --- a/arch/arm/plat-samsung/include/plat/pm.h +++ b/arch/arm/plat-samsung/include/plat/pm.h @@ -15,6 +15,8 @@ * management */ +#include <linux/irq.h> + #ifdef CONFIG_PM extern __init int s3c_pm_init(void); @@ -100,7 +102,7 @@ extern void s3c_pm_do_restore(struct sleep_save *ptr, int count); extern void s3c_pm_do_restore_core(struct sleep_save *ptr, int count); #ifdef CONFIG_PM -extern int s3c_irqext_wake(unsigned int irqno, unsigned int state); +extern int s3c_irqext_wake(struct irq_data *data, unsigned int state); extern int s3c24xx_irq_suspend(struct sys_device *dev, pm_message_t state); extern int s3c24xx_irq_resume(struct sys_device *dev); #else diff --git a/arch/arm/plat-samsung/include/plat/sdhci.h b/arch/arm/plat-samsung/include/plat/sdhci.h index 85853f8..5a41a0b 100644 --- a/arch/arm/plat-samsung/include/plat/sdhci.h +++ b/arch/arm/plat-samsung/include/plat/sdhci.h @@ -107,6 +107,8 @@ extern struct s3c_sdhci_platdata s3c_hsmmc3_def_platdata; /* Helper function availablity */ +extern void s3c2416_setup_sdhci0_cfg_gpio(struct platform_device *, int w); +extern void s3c2416_setup_sdhci1_cfg_gpio(struct platform_device *, int w); extern void s3c64xx_setup_sdhci0_cfg_gpio(struct platform_device *, int w); extern void s3c64xx_setup_sdhci1_cfg_gpio(struct platform_device *, int w); extern void s5pc100_setup_sdhci0_cfg_gpio(struct platform_device *, int w); @@ -122,6 +124,39 @@ extern void s5pv310_setup_sdhci1_cfg_gpio(struct platform_device *, int w); extern void s5pv310_setup_sdhci2_cfg_gpio(struct platform_device *, int w); extern void s5pv310_setup_sdhci3_cfg_gpio(struct platform_device *, int w); +/* S3C2416 SDHCI setup */ + +#ifdef CONFIG_S3C2416_SETUP_SDHCI +extern char *s3c2416_hsmmc_clksrcs[4]; + +extern void s3c2416_setup_sdhci_cfg_card(struct platform_device *dev, + void __iomem *r, + struct mmc_ios *ios, + struct mmc_card *card); + +static inline void s3c2416_default_sdhci0(void) +{ +#ifdef CONFIG_S3C_DEV_HSMMC + s3c_hsmmc0_def_platdata.clocks = s3c2416_hsmmc_clksrcs; + s3c_hsmmc0_def_platdata.cfg_gpio = s3c2416_setup_sdhci0_cfg_gpio; + s3c_hsmmc0_def_platdata.cfg_card = s3c2416_setup_sdhci_cfg_card; +#endif /* CONFIG_S3C_DEV_HSMMC */ +} + +static inline void s3c2416_default_sdhci1(void) +{ +#ifdef CONFIG_S3C_DEV_HSMMC1 + s3c_hsmmc1_def_platdata.clocks = s3c2416_hsmmc_clksrcs; + s3c_hsmmc1_def_platdata.cfg_gpio = s3c2416_setup_sdhci1_cfg_gpio; + s3c_hsmmc1_def_platdata.cfg_card = s3c2416_setup_sdhci_cfg_card; +#endif /* CONFIG_S3C_DEV_HSMMC1 */ +} + +#else +static inline void s3c2416_default_sdhci0(void) { } +static inline void s3c2416_default_sdhci1(void) { } + +#endif /* CONFIG_S3C2416_SETUP_SDHCI */ /* S3C64XX SDHCI setup */ #ifdef CONFIG_S3C64XX_SETUP_SDHCI diff --git a/arch/arm/plat-samsung/irq-uart.c b/arch/arm/plat-samsung/irq-uart.c index 4f8c102..4e77035 100644 --- a/arch/arm/plat-samsung/irq-uart.c +++ b/arch/arm/plat-samsung/irq-uart.c @@ -28,9 +28,9 @@ * are consecutive when looking up the interrupt in the demux routines. */ -static inline void __iomem *s3c_irq_uart_base(unsigned int irq) +static inline void __iomem *s3c_irq_uart_base(struct irq_data *data) { - struct s3c_uart_irq *uirq = get_irq_chip_data(irq); + struct s3c_uart_irq *uirq = irq_data_get_irq_chip_data(data); return uirq->regs; } @@ -39,10 +39,10 @@ static inline unsigned int s3c_irq_uart_bit(unsigned int irq) return irq & 3; } -static void s3c_irq_uart_mask(unsigned int irq) +static void s3c_irq_uart_mask(struct irq_data *data) { - void __iomem *regs = s3c_irq_uart_base(irq); - unsigned int bit = s3c_irq_uart_bit(irq); + void __iomem *regs = s3c_irq_uart_base(data); + unsigned int bit = s3c_irq_uart_bit(data->irq); u32 reg; reg = __raw_readl(regs + S3C64XX_UINTM); @@ -50,10 +50,10 @@ static void s3c_irq_uart_mask(unsigned int irq) __raw_writel(reg, regs + S3C64XX_UINTM); } -static void s3c_irq_uart_maskack(unsigned int irq) +static void s3c_irq_uart_maskack(struct irq_data *data) { - void __iomem *regs = s3c_irq_uart_base(irq); - unsigned int bit = s3c_irq_uart_bit(irq); + void __iomem *regs = s3c_irq_uart_base(data); + unsigned int bit = s3c_irq_uart_bit(data->irq); u32 reg; reg = __raw_readl(regs + S3C64XX_UINTM); @@ -62,10 +62,10 @@ static void s3c_irq_uart_maskack(unsigned int irq) __raw_writel(1 << bit, regs + S3C64XX_UINTP); } -static void s3c_irq_uart_unmask(unsigned int irq) +static void s3c_irq_uart_unmask(struct irq_data *data) { - void __iomem *regs = s3c_irq_uart_base(irq); - unsigned int bit = s3c_irq_uart_bit(irq); + void __iomem *regs = s3c_irq_uart_base(data); + unsigned int bit = s3c_irq_uart_bit(data->irq); u32 reg; reg = __raw_readl(regs + S3C64XX_UINTM); @@ -73,17 +73,17 @@ static void s3c_irq_uart_unmask(unsigned int irq) __raw_writel(reg, regs + S3C64XX_UINTM); } -static void s3c_irq_uart_ack(unsigned int irq) +static void s3c_irq_uart_ack(struct irq_data *data) { - void __iomem *regs = s3c_irq_uart_base(irq); - unsigned int bit = s3c_irq_uart_bit(irq); + void __iomem *regs = s3c_irq_uart_base(data); + unsigned int bit = s3c_irq_uart_bit(data->irq); __raw_writel(1 << bit, regs + S3C64XX_UINTP); } static void s3c_irq_demux_uart(unsigned int irq, struct irq_desc *desc) { - struct s3c_uart_irq *uirq = desc->handler_data; + struct s3c_uart_irq *uirq = desc->irq_data.handler_data; u32 pend = __raw_readl(uirq->regs + S3C64XX_UINTP); int base = uirq->base_irq; @@ -99,10 +99,10 @@ static void s3c_irq_demux_uart(unsigned int irq, struct irq_desc *desc) static struct irq_chip s3c_irq_uart = { .name = "s3c-uart", - .mask = s3c_irq_uart_mask, - .unmask = s3c_irq_uart_unmask, - .mask_ack = s3c_irq_uart_maskack, - .ack = s3c_irq_uart_ack, + .irq_mask = s3c_irq_uart_mask, + .irq_unmask = s3c_irq_uart_unmask, + .irq_mask_ack = s3c_irq_uart_maskack, + .irq_ack = s3c_irq_uart_ack, }; static void __init s3c_init_uart_irq(struct s3c_uart_irq *uirq) @@ -124,7 +124,7 @@ static void __init s3c_init_uart_irq(struct s3c_uart_irq *uirq) set_irq_flags(irq, IRQF_VALID); } - desc->handler_data = uirq; + desc->irq_data.handler_data = uirq; set_irq_chained_handler(uirq->parent_irq, s3c_irq_demux_uart); } diff --git a/arch/arm/plat-samsung/irq-vic-timer.c b/arch/arm/plat-samsung/irq-vic-timer.c index 0270519..dd8692a 100644 --- a/arch/arm/plat-samsung/irq-vic-timer.c +++ b/arch/arm/plat-samsung/irq-vic-timer.c @@ -24,43 +24,46 @@ static void s3c_irq_demux_vic_timer(unsigned int irq, struct irq_desc *desc) { - generic_handle_irq((int)desc->handler_data); + generic_handle_irq((int)desc->irq_data.handler_data); } /* We assume the IRQ_TIMER0..IRQ_TIMER4 range is continuous. */ -static void s3c_irq_timer_mask(unsigned int irq) +static void s3c_irq_timer_mask(struct irq_data *data) { u32 reg = __raw_readl(S3C64XX_TINT_CSTAT); + u32 mask = (u32)data->chip_data; reg &= 0x1f; /* mask out pending interrupts */ - reg &= ~(1 << (irq - IRQ_TIMER0)); + reg &= ~mask; __raw_writel(reg, S3C64XX_TINT_CSTAT); } -static void s3c_irq_timer_unmask(unsigned int irq) +static void s3c_irq_timer_unmask(struct irq_data *data) { u32 reg = __raw_readl(S3C64XX_TINT_CSTAT); + u32 mask = (u32)data->chip_data; reg &= 0x1f; /* mask out pending interrupts */ - reg |= 1 << (irq - IRQ_TIMER0); + reg |= mask; __raw_writel(reg, S3C64XX_TINT_CSTAT); } -static void s3c_irq_timer_ack(unsigned int irq) +static void s3c_irq_timer_ack(struct irq_data *data) { u32 reg = __raw_readl(S3C64XX_TINT_CSTAT); + u32 mask = (u32)data->chip_data; reg &= 0x1f; - reg |= (1 << 5) << (irq - IRQ_TIMER0); + reg |= mask << 5; __raw_writel(reg, S3C64XX_TINT_CSTAT); } static struct irq_chip s3c_irq_timer = { .name = "s3c-timer", - .mask = s3c_irq_timer_mask, - .unmask = s3c_irq_timer_unmask, - .ack = s3c_irq_timer_ack, + .irq_mask = s3c_irq_timer_mask, + .irq_unmask = s3c_irq_timer_unmask, + .irq_ack = s3c_irq_timer_ack, }; /** @@ -79,8 +82,9 @@ void __init s3c_init_vic_timer_irq(unsigned int parent_irq, set_irq_chained_handler(parent_irq, s3c_irq_demux_vic_timer); set_irq_chip(timer_irq, &s3c_irq_timer); + set_irq_chip_data(timer_irq, (void *)(1 << (timer_irq - IRQ_TIMER0))); set_irq_handler(timer_irq, handle_level_irq); set_irq_flags(timer_irq, IRQF_VALID); - desc->handler_data = (void *)timer_irq; + desc->irq_data.handler_data = (void *)timer_irq; } diff --git a/arch/arm/plat-samsung/pd.c b/arch/arm/plat-samsung/pd.c new file mode 100644 index 0000000..efe1d56 --- /dev/null +++ b/arch/arm/plat-samsung/pd.c @@ -0,0 +1,95 @@ +/* linux/arch/arm/plat-samsung/pd.c + * + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * Samsung Power domain support + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#include <linux/init.h> +#include <linux/module.h> +#include <linux/platform_device.h> +#include <linux/err.h> +#include <linux/pm_runtime.h> + +#include <plat/pd.h> + +static int samsung_pd_probe(struct platform_device *pdev) +{ + struct samsung_pd_info *pdata = pdev->dev.platform_data; + struct device *dev = &pdev->dev; + + if (!pdata) { + dev_err(dev, "no device data specified\n"); + return -ENOENT; + } + + pm_runtime_set_active(dev); + pm_runtime_enable(dev); + + dev_info(dev, "power domain registered\n"); + return 0; +} + +static int __devexit samsung_pd_remove(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + + pm_runtime_disable(dev); + return 0; +} + +static int samsung_pd_runtime_suspend(struct device *dev) +{ + struct samsung_pd_info *pdata = dev->platform_data; + int ret = 0; + + if (pdata->disable) + ret = pdata->disable(dev); + + dev_dbg(dev, "suspended\n"); + return ret; +} + +static int samsung_pd_runtime_resume(struct device *dev) +{ + struct samsung_pd_info *pdata = dev->platform_data; + int ret = 0; + + if (pdata->enable) + ret = pdata->enable(dev); + + dev_dbg(dev, "resumed\n"); + return ret; +} + +static const struct dev_pm_ops samsung_pd_pm_ops = { + .runtime_suspend = samsung_pd_runtime_suspend, + .runtime_resume = samsung_pd_runtime_resume, +}; + +static struct platform_driver samsung_pd_driver = { + .driver = { + .name = "samsung-pd", + .owner = THIS_MODULE, + .pm = &samsung_pd_pm_ops, + }, + .probe = samsung_pd_probe, + .remove = __devexit_p(samsung_pd_remove), +}; + +static int __init samsung_pd_init(void) +{ + int ret; + + ret = platform_driver_register(&samsung_pd_driver); + if (ret) + printk(KERN_ERR "%s: failed to add PD driver\n", __func__); + + return ret; +} +arch_initcall(samsung_pd_init); diff --git a/arch/arm/plat-samsung/pm.c b/arch/arm/plat-samsung/pm.c index 5bf3f2f..02d531f 100644 --- a/arch/arm/plat-samsung/pm.c +++ b/arch/arm/plat-samsung/pm.c @@ -136,15 +136,15 @@ static void s3c_pm_restore_uarts(void) { } unsigned long s3c_irqwake_intmask = 0xffffffffL; unsigned long s3c_irqwake_eintmask = 0xffffffffL; -int s3c_irqext_wake(unsigned int irqno, unsigned int state) +int s3c_irqext_wake(struct irq_data *data, unsigned int state) { - unsigned long bit = 1L << IRQ_EINT_BIT(irqno); + unsigned long bit = 1L << IRQ_EINT_BIT(data->irq); if (!(s3c_irqwake_eintallow & bit)) return -ENOENT; printk(KERN_INFO "wake %s for irq %d\n", - state ? "enabled" : "disabled", irqno); + state ? "enabled" : "disabled", data->irq); if (!state) s3c_irqwake_eintmask |= bit; diff --git a/arch/arm/plat-spear/shirq.c b/arch/arm/plat-spear/shirq.c index 2172d69..7818903 100644 --- a/arch/arm/plat-spear/shirq.c +++ b/arch/arm/plat-spear/shirq.c @@ -20,10 +20,10 @@ struct spear_shirq *shirq; static DEFINE_SPINLOCK(lock); -static void shirq_irq_mask(unsigned irq) +static void shirq_irq_mask(struct irq_data *d) { - struct spear_shirq *shirq = get_irq_chip_data(irq); - u32 val, id = irq - shirq->dev_config[0].virq; + struct spear_shirq *shirq = irq_data_get_irq_chip_data(d); + u32 val, id = d->irq - shirq->dev_config[0].virq; unsigned long flags; if ((shirq->regs.enb_reg == -1) || shirq->dev_config[id].enb_mask == -1) @@ -39,10 +39,10 @@ static void shirq_irq_mask(unsigned irq) spin_unlock_irqrestore(&lock, flags); } -static void shirq_irq_unmask(unsigned irq) +static void shirq_irq_unmask(struct irq_data *d) { - struct spear_shirq *shirq = get_irq_chip_data(irq); - u32 val, id = irq - shirq->dev_config[0].virq; + struct spear_shirq *shirq = irq_data_get_irq_chip_data(d); + u32 val, id = d->irq - shirq->dev_config[0].virq; unsigned long flags; if ((shirq->regs.enb_reg == -1) || shirq->dev_config[id].enb_mask == -1) @@ -60,9 +60,9 @@ static void shirq_irq_unmask(unsigned irq) static struct irq_chip shirq_chip = { .name = "spear_shirq", - .ack = shirq_irq_mask, - .mask = shirq_irq_mask, - .unmask = shirq_irq_unmask, + .irq_ack = shirq_irq_mask, + .irq_mask = shirq_irq_mask, + .irq_unmask = shirq_irq_unmask, }; static void shirq_handler(unsigned irq, struct irq_desc *desc) @@ -70,7 +70,7 @@ static void shirq_handler(unsigned irq, struct irq_desc *desc) u32 i, val, mask; struct spear_shirq *shirq = get_irq_data(irq); - desc->chip->ack(irq); + desc->irq_data.chip->irq_ack(&desc->irq_data); while ((val = readl(shirq->regs.base + shirq->regs.status_reg) & shirq->regs.status_reg_mask)) { for (i = 0; (i < shirq->dev_count) && val; i++) { @@ -92,7 +92,7 @@ static void shirq_handler(unsigned irq, struct irq_desc *desc) writel(mask, shirq->regs.base + shirq->regs.clear_reg); } } - desc->chip->unmask(irq); + desc->irq_data.chip->irq_unmask(&desc->irq_data); } int spear_shirq_register(struct spear_shirq *shirq) diff --git a/arch/arm/plat-stmp3xxx/irq.c b/arch/arm/plat-stmp3xxx/irq.c index 20de4e0..aaa1686 100644 --- a/arch/arm/plat-stmp3xxx/irq.c +++ b/arch/arm/plat-stmp3xxx/irq.c @@ -34,7 +34,7 @@ void __init stmp3xxx_init_irq(struct irq_chip *chip) /* Disable all interrupts initially */ for (i = 0; i < NR_REAL_IRQS; i++) { - chip->mask(i); + chip->irq_mask(irq_get_irq_data(i)); set_irq_chip(i, chip); set_irq_handler(i, handle_level_irq); set_irq_flags(i, IRQF_VALID | IRQF_PROBE); diff --git a/arch/arm/plat-stmp3xxx/pinmux.c b/arch/arm/plat-stmp3xxx/pinmux.c index 6d6b1a4..66d5bac 100644 --- a/arch/arm/plat-stmp3xxx/pinmux.c +++ b/arch/arm/plat-stmp3xxx/pinmux.c @@ -351,27 +351,27 @@ void stmp3xxx_release_pin_group(struct pin_group *pin_group, const char *label) } EXPORT_SYMBOL(stmp3xxx_release_pin_group); -static int stmp3xxx_irq_to_gpio(int irq, +static int stmp3xxx_irq_data_to_gpio(struct irq_data *d, struct stmp3xxx_pinmux_bank **bank, unsigned *gpio) { struct stmp3xxx_pinmux_bank *pm; for (pm = pinmux_banks; pm < pinmux_banks + NR_BANKS; pm++) - if (pm->virq <= irq && irq < pm->virq + 32) { + if (pm->virq <= d->irq && d->irq < pm->virq + 32) { *bank = pm; - *gpio = irq - pm->virq; + *gpio = d->irq - pm->virq; return 0; } return -ENOENT; } -static int stmp3xxx_set_irqtype(unsigned irq, unsigned type) +static int stmp3xxx_set_irqtype(struct irq_data *d, unsigned type) { struct stmp3xxx_pinmux_bank *pm; unsigned gpio; int l, p; - stmp3xxx_irq_to_gpio(irq, &pm, &gpio); + stmp3xxx_irq_data_to_gpio(d, &pm, &gpio); switch (type) { case IRQ_TYPE_EDGE_RISING: l = 0; p = 1; break; @@ -398,33 +398,33 @@ static int stmp3xxx_set_irqtype(unsigned irq, unsigned type) return 0; } -static void stmp3xxx_pin_ack_irq(unsigned irq) +static void stmp3xxx_pin_ack_irq(struct irq_data *d) { u32 stat; struct stmp3xxx_pinmux_bank *pm; unsigned gpio; - stmp3xxx_irq_to_gpio(irq, &pm, &gpio); + stmp3xxx_irq_data_to_gpio(d, &pm, &gpio); stat = __raw_readl(pm->irqstat) & (1 << gpio); stmp3xxx_clearl(stat, pm->irqstat); } -static void stmp3xxx_pin_mask_irq(unsigned irq) +static void stmp3xxx_pin_mask_irq(struct irq_data *d) { struct stmp3xxx_pinmux_bank *pm; unsigned gpio; - stmp3xxx_irq_to_gpio(irq, &pm, &gpio); + stmp3xxx_irq_data_to_gpio(d, &pm, &gpio); stmp3xxx_clearl(1 << gpio, pm->irqen); stmp3xxx_clearl(1 << gpio, pm->pin2irq); } -static void stmp3xxx_pin_unmask_irq(unsigned irq) +static void stmp3xxx_pin_unmask_irq(struct irq_data *d) { struct stmp3xxx_pinmux_bank *pm; unsigned gpio; - stmp3xxx_irq_to_gpio(irq, &pm, &gpio); + stmp3xxx_irq_data_to_gpio(d, &pm, &gpio); stmp3xxx_setl(1 << gpio, pm->irqen); stmp3xxx_setl(1 << gpio, pm->pin2irq); } @@ -503,10 +503,10 @@ static void stmp3xxx_gpio_irq(u32 irq, struct irq_desc *desc) } static struct irq_chip gpio_irq_chip = { - .ack = stmp3xxx_pin_ack_irq, - .mask = stmp3xxx_pin_mask_irq, - .unmask = stmp3xxx_pin_unmask_irq, - .set_type = stmp3xxx_set_irqtype, + .irq_ack = stmp3xxx_pin_ack_irq, + .irq_mask = stmp3xxx_pin_mask_irq, + .irq_unmask = stmp3xxx_pin_unmask_irq, + .irq_set_type = stmp3xxx_set_irqtype, }; int __init stmp3xxx_pinmux_init(int virtual_irq_start) @@ -533,7 +533,7 @@ int __init stmp3xxx_pinmux_init(int virtual_irq_start) pm->virq = virtual_irq_start + b * 32; for (virq = pm->virq; virq < pm->virq; virq++) { - gpio_irq_chip.mask(virq); + gpio_irq_chip.irq_mask(irq_get_irq_data(virq)); set_irq_chip(virq, &gpio_irq_chip); set_irq_handler(virq, handle_level_irq); set_irq_flags(virq, IRQF_VALID); diff --git a/arch/m68k/include/asm/cacheflush_no.h b/arch/m68k/include/asm/cacheflush_no.h index 7085bd5..cb88aa9 100644 --- a/arch/m68k/include/asm/cacheflush_no.h +++ b/arch/m68k/include/asm/cacheflush_no.h @@ -2,21 +2,22 @@ #define _M68KNOMMU_CACHEFLUSH_H /* - * (C) Copyright 2000-2004, Greg Ungerer <gerg@snapgear.com> + * (C) Copyright 2000-2010, Greg Ungerer <gerg@snapgear.com> */ #include <linux/mm.h> +#include <asm/mcfsim.h> #define flush_cache_all() __flush_cache_all() #define flush_cache_mm(mm) do { } while (0) #define flush_cache_dup_mm(mm) do { } while (0) -#define flush_cache_range(vma, start, end) __flush_cache_all() +#define flush_cache_range(vma, start, end) do { } while (0) #define flush_cache_page(vma, vmaddr) do { } while (0) -#define flush_dcache_range(start,len) __flush_cache_all() +#define flush_dcache_range(start, len) __flush_dcache_all() #define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 0 #define flush_dcache_page(page) do { } while (0) #define flush_dcache_mmap_lock(mapping) do { } while (0) #define flush_dcache_mmap_unlock(mapping) do { } while (0) -#define flush_icache_range(start,len) __flush_cache_all() +#define flush_icache_range(start, len) __flush_icache_all() #define flush_icache_page(vma,pg) do { } while (0) #define flush_icache_user_range(vma,pg,adr,len) do { } while (0) #define flush_cache_vmap(start, end) do { } while (0) @@ -27,66 +28,52 @@ #define copy_from_user_page(vma, page, vaddr, dst, src, len) \ memcpy(dst, src, len) +void mcf_cache_push(void); + static inline void __flush_cache_all(void) { -#if defined(CONFIG_M5407) || defined(CONFIG_M548x) - /* - * Use cpushl to push and invalidate all cache lines. - * Gas doesn't seem to know how to generate the ColdFire - * cpushl instruction... Oh well, bit stuff it for now. - */ - __asm__ __volatile__ ( - "nop\n\t" - "clrl %%d0\n\t" - "1:\n\t" - "movel %%d0,%%a0\n\t" - "2:\n\t" - ".word 0xf468\n\t" - "addl #0x10,%%a0\n\t" - "cmpl #0x00000800,%%a0\n\t" - "blt 2b\n\t" - "addql #1,%%d0\n\t" - "cmpil #4,%%d0\n\t" - "bne 1b\n\t" - "movel #0xb6088500,%%d0\n\t" - "movec %%d0,%%CACR\n\t" - : : : "d0", "a0" ); -#endif /* CONFIG_M5407 */ -#if defined(CONFIG_M523x) || defined(CONFIG_M527x) - __asm__ __volatile__ ( - "movel #0x81400100, %%d0\n\t" - "movec %%d0, %%CACR\n\t" - "nop\n\t" - : : : "d0" ); -#endif /* CONFIG_M523x || CONFIG_M527x */ -#if defined(CONFIG_M528x) - __asm__ __volatile__ ( - "movel #0x81000200, %%d0\n\t" - "movec %%d0, %%CACR\n\t" - "nop\n\t" - : : : "d0" ); -#endif /* CONFIG_M528x */ -#if defined(CONFIG_M5206) || defined(CONFIG_M5206e) || defined(CONFIG_M5272) +#ifdef CACHE_PUSH + mcf_cache_push(); +#endif +#ifdef CACHE_INVALIDATE __asm__ __volatile__ ( - "movel #0x81000100, %%d0\n\t" + "movel %0, %%d0\n\t" "movec %%d0, %%CACR\n\t" "nop\n\t" - : : : "d0" ); -#endif /* CONFIG_M5206 || CONFIG_M5206e || CONFIG_M5272 */ -#ifdef CONFIG_M5249 + : : "i" (CACHE_INVALIDATE) : "d0" ); +#endif +} + +/* + * Some ColdFire parts implement separate instruction and data caches, + * on those we should just flush the appropriate cache. If we don't need + * to do any specific flushing then this will be optimized away. + */ +static inline void __flush_icache_all(void) +{ +#ifdef CACHE_INVALIDATEI __asm__ __volatile__ ( - "movel #0xa1000200, %%d0\n\t" + "movel %0, %%d0\n\t" "movec %%d0, %%CACR\n\t" "nop\n\t" - : : : "d0" ); -#endif /* CONFIG_M5249 */ -#ifdef CONFIG_M532x + : : "i" (CACHE_INVALIDATEI) : "d0" ); +#endif +} + +static inline void __flush_dcache_all(void) +{ +#ifdef CACHE_PUSH + mcf_cache_push(); +#endif +#ifdef CACHE_INVALIDATED __asm__ __volatile__ ( - "movel #0x81000200, %%d0\n\t" + "movel %0, %%d0\n\t" "movec %%d0, %%CACR\n\t" "nop\n\t" - : : : "d0" ); -#endif /* CONFIG_M532x */ + : : "i" (CACHE_INVALIDATED) : "d0" ); +#else + /* Flush the wrtite buffer */ + __asm__ __volatile__ ( "nop" ); +#endif } - #endif /* _M68KNOMMU_CACHEFLUSH_H */ diff --git a/arch/m68k/include/asm/coldfire.h b/arch/m68k/include/asm/coldfire.h index 3b0a34d..213028c 100644 --- a/arch/m68k/include/asm/coldfire.h +++ b/arch/m68k/include/asm/coldfire.h @@ -32,7 +32,7 @@ */ #define MCF_MBAR 0x10000000 #define MCF_MBAR2 0x80000000 -#if defined(CONFIG_M548x) +#if defined(CONFIG_M54xx) #define MCF_IPSBAR MCF_MBAR #elif defined(CONFIG_M520x) #define MCF_IPSBAR 0xFC000000 diff --git a/arch/m68k/include/asm/entry_no.h b/arch/m68k/include/asm/entry_no.h index 26be277..627d69b 100644 --- a/arch/m68k/include/asm/entry_no.h +++ b/arch/m68k/include/asm/entry_no.h @@ -42,12 +42,16 @@ */ #ifdef CONFIG_COLDFIRE +#ifdef CONFIG_COLDFIRE_SW_A7 /* - * This is made a little more tricky on the ColdFire. There is no - * separate kernel and user stack pointers. Need to artificially + * This is made a little more tricky on older ColdFires. There is no + * separate supervisor and user stack pointers. Need to artificially * construct a usp in software... When doing this we need to disable - * interrupts, otherwise bad things could happen. + * interrupts, otherwise bad things will happen. */ +.globl sw_usp +.globl sw_ksp + .macro SAVE_ALL move #0x2700,%sr /* disable intrs */ btst #5,%sp@(2) /* from user? */ @@ -74,9 +78,7 @@ 7: .endm -.macro RESTORE_ALL - btst #5,%sp@(PT_SR) /* going user? */ - bnes 8f /* no, skip */ +.macro RESTORE_USER move #0x2700,%sr /* disable intrs */ movel sw_usp,%a0 /* get usp */ movel %sp@(PT_OFF_PC),%a0@- /* copy exception program counter */ @@ -91,19 +93,22 @@ subql #8,sw_usp /* set exception */ movel sw_usp,%sp /* restore usp */ rte - 8: - moveml %sp@,%d1-%d5/%a0-%a2 - lea %sp@(32),%sp /* space for 8 regs */ - movel %sp@+,%d0 - addql #4,%sp /* orig d0 */ - addl %sp@+,%sp /* stkadj */ - rte .endm +.macro RDUSP + movel sw_usp,%a2 +.endm + +.macro WRUSP + movel %a0,sw_usp +.endm + +#else /* !CONFIG_COLDFIRE_SW_A7 */ /* - * Quick exception save, use current stack only. + * Modern ColdFire parts have separate supervisor and user stack + * pointers. Simple load and restore macros for this case. */ -.macro SAVE_LOCAL +.macro SAVE_ALL move #0x2700,%sr /* disable intrs */ clrl %sp@- /* stkadj */ movel %d0,%sp@- /* orig d0 */ @@ -112,7 +117,7 @@ moveml %d1-%d5/%a0-%a2,%sp@ .endm -.macro RESTORE_LOCAL +.macro RESTORE_USER moveml %sp@,%d1-%d5/%a0-%a2 lea %sp@(32),%sp /* space for 8 regs */ movel %sp@+,%d0 @@ -121,6 +126,18 @@ rte .endm +.macro RDUSP + /*move %usp,%a2*/ + .word 0x4e6a +.endm + +.macro WRUSP + /*move %a0,%usp*/ + .word 0x4e60 +.endm + +#endif /* !CONFIG_COLDFIRE_SW_A7 */ + .macro SAVE_SWITCH_STACK lea %sp@(-24),%sp /* 6 regs */ moveml %a3-%a6/%d6-%d7,%sp@ @@ -131,14 +148,6 @@ lea %sp@(24),%sp /* 6 regs */ .endm -/* - * Software copy of the user and kernel stack pointers... Ugh... - * Need these to get around ColdFire not having separate kernel - * and user stack pointers. - */ -.globl sw_usp -.globl sw_ksp - #else /* !CONFIG_COLDFIRE */ /* @@ -167,6 +176,6 @@ moveml %sp@+,%a3-%a6/%d6-%d7 .endm -#endif /* !CONFIG_COLDFIRE */ +#endif /* !COLDFIRE_SW_A7 */ #endif /* __ASSEMBLY__ */ #endif /* __M68KNOMMU_ENTRY_H */ diff --git a/arch/m68k/include/asm/gpio.h b/arch/m68k/include/asm/gpio.h index 1b57adb..c64c7b7 100644 --- a/arch/m68k/include/asm/gpio.h +++ b/arch/m68k/include/asm/gpio.h @@ -37,7 +37,7 @@ #if defined(CONFIG_M5206) || defined(CONFIG_M5206e) || \ defined(CONFIG_M520x) || defined(CONFIG_M523x) || \ defined(CONFIG_M527x) || defined(CONFIG_M528x) || \ - defined(CONFIG_M532x) || defined(CONFIG_M548x) + defined(CONFIG_M532x) || defined(CONFIG_M54xx) /* These parts have GPIO organized by 8 bit ports */ diff --git a/arch/m68k/include/asm/io_no.h b/arch/m68k/include/asm/io_no.h index 6e2413e..cf20f30 100644 --- a/arch/m68k/include/asm/io_no.h +++ b/arch/m68k/include/asm/io_no.h @@ -145,7 +145,6 @@ static inline void io_insl(unsigned int addr, void *buf, int len) #define IOMAP_WRITETHROUGH 3 extern void *__ioremap(unsigned long physaddr, unsigned long size, int cacheflag); -extern void __iounmap(void *addr, unsigned long size); static inline void *ioremap(unsigned long physaddr, unsigned long size) { diff --git a/arch/m68k/include/asm/m5206sim.h b/arch/m68k/include/asm/m5206sim.h index 9c384e2..561b03b5 100644 --- a/arch/m68k/include/asm/m5206sim.h +++ b/arch/m68k/include/asm/m5206sim.h @@ -12,6 +12,10 @@ #define m5206sim_h /****************************************************************************/ +#define CPU_NAME "COLDFIRE(m5206)" +#define CPU_INSTR_PER_JIFFY 3 + +#include <asm/m52xxacr.h> /* * Define the 5206 SIM register set addresses. @@ -88,6 +92,14 @@ #define MCFSIM_PADDR (MCF_MBAR + 0x1c5) /* Parallel Direction (r/w) */ #define MCFSIM_PADAT (MCF_MBAR + 0x1c9) /* Parallel Port Value (r/w) */ +#if defined(CONFIG_NETtel) +#define MCFUART_BASE1 0x180 /* Base address of UART1 */ +#define MCFUART_BASE2 0x140 /* Base address of UART2 */ +#else +#define MCFUART_BASE1 0x140 /* Base address of UART1 */ +#define MCFUART_BASE2 0x180 /* Base address of UART2 */ +#endif + /* * Define system peripheral IRQ usage. */ @@ -95,7 +107,7 @@ #define MCF_IRQ_PROFILER 31 /* Timer1, Level 7 */ /* - * Generic GPIO + * Generic GPIO */ #define MCFGPIO_PIN_MAX 8 #define MCFGPIO_IRQ_VECBASE -1 diff --git a/arch/m68k/include/asm/m520xsim.h b/arch/m68k/include/asm/m520xsim.h index db824a4..88ed823 100644 --- a/arch/m68k/include/asm/m520xsim.h +++ b/arch/m68k/include/asm/m520xsim.h @@ -11,6 +11,11 @@ #define m520xsim_h /****************************************************************************/ +#define CPU_NAME "COLDFIRE(m520x)" +#define CPU_INSTR_PER_JIFFY 3 + +#include <asm/m52xxacr.h> + /* * Define the 520x SIM register set addresses. */ @@ -54,6 +59,9 @@ #define MCFSIM_SDCS0 0x000a8110 /* SDRAM Chip Select 0 Configuration */ #define MCFSIM_SDCS1 0x000a8114 /* SDRAM Chip Select 1 Configuration */ +/* + * EPORT and GPIO registers. + */ #define MCFEPORT_EPDDR 0xFC088002 #define MCFEPORT_EPDR 0xFC088004 #define MCFEPORT_EPPDR 0xFC088005 @@ -97,6 +105,7 @@ #define MCFGPIO_PCLRR_UART 0xFC0A402A #define MCFGPIO_PCLRR_FECH 0xFC0A402B #define MCFGPIO_PCLRR_FECL 0xFC0A402C + /* * Generic GPIO support */ @@ -109,7 +118,6 @@ #define MCFGPIO_PIN_MAX 80 #define MCFGPIO_IRQ_MAX 8 #define MCFGPIO_IRQ_VECBASE MCFINT_VECBASE -/****************************************************************************/ #define MCF_GPIO_PAR_UART (0xA4036) #define MCF_GPIO_PAR_FECI2C (0xA4033) @@ -126,6 +134,13 @@ #define MCF_GPIO_PAR_FECI2C_PAR_SCL_UTXD2 (0x04) /* + * UART module. + */ +#define MCFUART_BASE1 0x60000 /* Base address of UART1 */ +#define MCFUART_BASE2 0x64000 /* Base address of UART2 */ +#define MCFUART_BASE3 0x68000 /* Base address of UART2 */ + +/* * Reset Controll Unit. */ #define MCF_RCR 0xFC0A0000 diff --git a/arch/m68k/include/asm/m523xsim.h b/arch/m68k/include/asm/m523xsim.h index e8d06b2..4ad7a00 100644 --- a/arch/m68k/include/asm/m523xsim.h +++ b/arch/m68k/include/asm/m523xsim.h @@ -11,6 +11,10 @@ #define m523xsim_h /****************************************************************************/ +#define CPU_NAME "COLDFIRE(m523x)" +#define CPU_INSTR_PER_JIFFY 3 + +#include <asm/m52xxacr.h> /* * Define the 523x SIM register set addresses. @@ -50,6 +54,13 @@ #define MCF_RCR_SWRESET 0x80 /* Software reset bit */ #define MCF_RCR_FRCSTOUT 0x40 /* Force external reset */ +/* + * UART module. + */ +#define MCFUART_BASE1 0x200 /* Base address of UART1 */ +#define MCFUART_BASE2 0x240 /* Base address of UART2 */ +#define MCFUART_BASE3 0x280 /* Base address of UART3 */ + #define MCFGPIO_PODR_ADDR (MCF_IPSBAR + 0x100000) #define MCFGPIO_PODR_DATAH (MCF_IPSBAR + 0x100001) #define MCFGPIO_PODR_DATAL (MCF_IPSBAR + 0x100002) diff --git a/arch/m68k/include/asm/m5249sim.h b/arch/m68k/include/asm/m5249sim.h index 79b7b40..4908b11 100644 --- a/arch/m68k/include/asm/m5249sim.h +++ b/arch/m68k/include/asm/m5249sim.h @@ -11,6 +11,11 @@ #define m5249sim_h /****************************************************************************/ +#define CPU_NAME "COLDFIRE(m5249)" +#define CPU_INSTR_PER_JIFFY 3 + +#include <asm/m52xxacr.h> + /* * Define the 5249 SIM register set addresses. */ @@ -56,6 +61,11 @@ #define MCFSIM_DACR1 0x110 /* DRAM 1 Addr and Ctrl (r/w) */ #define MCFSIM_DMR1 0x114 /* DRAM 1 Mask reg (r/w) */ +/* + * UART module. + */ +#define MCFUART_BASE1 0x1c0 /* Base address of UART1 */ +#define MCFUART_BASE2 0x200 /* Base address of UART2 */ /* * Some symbol defines for the above... diff --git a/arch/m68k/include/asm/m5272sim.h b/arch/m68k/include/asm/m5272sim.h index df3332c..b7cc50a 100644 --- a/arch/m68k/include/asm/m5272sim.h +++ b/arch/m68k/include/asm/m5272sim.h @@ -12,6 +12,11 @@ #define m5272sim_h /****************************************************************************/ +#define CPU_NAME "COLDFIRE(m5272)" +#define CPU_INSTR_PER_JIFFY 3 + +#include <asm/m52xxacr.h> + /* * Define the 5272 SIM register set addresses. */ @@ -62,6 +67,9 @@ #define MCFSIM_DCMR1 0x5c /* DRAM 1 Mask reg (r/w) */ #define MCFSIM_DCCR1 0x63 /* DRAM 1 Control reg (r/w) */ +#define MCFUART_BASE1 0x100 /* Base address of UART1 */ +#define MCFUART_BASE2 0x140 /* Base address of UART2 */ + #define MCFSIM_PACNT (MCF_MBAR + 0x80) /* Port A Control (r/w) */ #define MCFSIM_PADDR (MCF_MBAR + 0x84) /* Port A Direction (r/w) */ #define MCFSIM_PADAT (MCF_MBAR + 0x86) /* Port A Data (r/w) */ diff --git a/arch/m68k/include/asm/m527xsim.h b/arch/m68k/include/asm/m527xsim.h index 1feb46f..e8042e8 100644 --- a/arch/m68k/include/asm/m527xsim.h +++ b/arch/m68k/include/asm/m527xsim.h @@ -11,6 +11,10 @@ #define m527xsim_h /****************************************************************************/ +#define CPU_NAME "COLDFIRE(m527x)" +#define CPU_INSTR_PER_JIFFY 3 + +#include <asm/m52xxacr.h> /* * Define the 5270/5271 SIM register set addresses. @@ -55,6 +59,12 @@ #define MCFSIM_DMR1 0x5c /* SDRAM address mask 1 */ #endif +/* + * UART module. + */ +#define MCFUART_BASE1 0x200 /* Base address of UART1 */ +#define MCFUART_BASE2 0x240 /* Base address of UART2 */ +#define MCFUART_BASE3 0x280 /* Base address of UART3 */ #ifdef CONFIG_M5271 #define MCFGPIO_PODR_ADDR (MCF_IPSBAR + 0x100000) diff --git a/arch/m68k/include/asm/m528xsim.h b/arch/m68k/include/asm/m528xsim.h index 891cbed..a6d2f4d 100644 --- a/arch/m68k/include/asm/m528xsim.h +++ b/arch/m68k/include/asm/m528xsim.h @@ -11,6 +11,10 @@ #define m528xsim_h /****************************************************************************/ +#define CPU_NAME "COLDFIRE(m528x)" +#define CPU_INSTR_PER_JIFFY 3 + +#include <asm/m52xxacr.h> /* * Define the 5280/5282 SIM register set addresses. @@ -42,6 +46,13 @@ #define MCFSIM_DMR1 0x54 /* SDRAM address mask 1 */ /* + * UART module. + */ +#define MCFUART_BASE1 0x200 /* Base address of UART1 */ +#define MCFUART_BASE2 0x240 /* Base address of UART2 */ +#define MCFUART_BASE3 0x280 /* Base address of UART3 */ + +/* * GPIO registers */ #define MCFGPIO_PORTA (MCF_IPSBAR + 0x00100000) diff --git a/arch/m68k/include/asm/m52xxacr.h b/arch/m68k/include/asm/m52xxacr.h new file mode 100644 index 0000000..abc391a --- /dev/null +++ b/arch/m68k/include/asm/m52xxacr.h @@ -0,0 +1,94 @@ +/****************************************************************************/ + +/* + * m52xxacr.h -- ColdFire version 2 core cache support + * + * (C) Copyright 2010, Greg Ungerer <gerg@snapgear.com> + */ + +/****************************************************************************/ +#ifndef m52xxacr_h +#define m52xxacr_h +/****************************************************************************/ + +/* + * All varients of the ColdFire using version 2 cores have a similar + * cache setup. Although not absolutely identical the cache register + * definitions are compatible for all of them. Mostly they support a + * configurable cache memory that can be instruction only, data only, + * or split instruction and data. The exception is the very old version 2 + * core based parts, like the 5206(e), 5249 and 5272, which are instruction + * cache only. Cache size varies from 2k up to 16k. + */ + +/* + * Define the Cache Control register flags. + */ +#define CACR_CENB 0x80000000 /* Enable cache */ +#define CACR_CDPI 0x10000000 /* Disable invalidation by CPUSHL */ +#define CACR_CFRZ 0x08000000 /* Cache freeze mode */ +#define CACR_CINV 0x01000000 /* Invalidate cache */ +#define CACR_DISI 0x00800000 /* Disable instruction cache */ +#define CACR_DISD 0x00400000 /* Disable data cache */ +#define CACR_INVI 0x00200000 /* Invalidate instruction cache */ +#define CACR_INVD 0x00100000 /* Invalidate data cache */ +#define CACR_CEIB 0x00000400 /* Non-cachable instruction burst */ +#define CACR_DCM 0x00000200 /* Default cache mode */ +#define CACR_DBWE 0x00000100 /* Buffered write enable */ +#define CACR_DWP 0x00000020 /* Write protection */ +#define CACR_EUSP 0x00000010 /* Enable separate user a7 */ + +/* + * Define the Access Control register flags. + */ +#define ACR_BASE_POS 24 /* Address Base (upper 8 bits) */ +#define ACR_MASK_POS 16 /* Address Mask (next 8 bits) */ +#define ACR_ENABLE 0x00008000 /* Enable this ACR */ +#define ACR_USER 0x00000000 /* Allow only user accesses */ +#define ACR_SUPER 0x00002000 /* Allow supervisor access only */ +#define ACR_ANY 0x00004000 /* Allow any access type */ +#define ACR_CENB 0x00000000 /* Caching of region enabled */ +#define ACR_CDIS 0x00000040 /* Caching of region disabled */ +#define ACR_BWE 0x00000020 /* Write buffer enabled */ +#define ACR_WPROTECT 0x00000004 /* Write protect region */ + +/* + * Set the cache controller settings we will use. On the cores that support + * a split cache configuration we allow all the combinations at Kconfig + * time. For those cores that only have an instruction cache we just set + * that as on. + */ +#if defined(CONFIG_CACHE_I) +#define CACHE_TYPE (CACR_DISD + CACR_EUSP) +#define CACHE_INVTYPEI 0 +#elif defined(CONFIG_CACHE_D) +#define CACHE_TYPE (CACR_DISI + CACR_EUSP) +#define CACHE_INVTYPED 0 +#elif defined(CONFIG_CACHE_BOTH) +#define CACHE_TYPE CACR_EUSP +#define CACHE_INVTYPEI CACR_INVI +#define CACHE_INVTYPED CACR_INVD +#else +/* This is the instruction cache only devices (no split cache, no eusp) */ +#define CACHE_TYPE 0 +#define CACHE_INVTYPEI 0 +#endif + +#define CACHE_INIT (CACR_CINV + CACHE_TYPE) +#define CACHE_MODE (CACR_CENB + CACHE_TYPE + CACR_DCM) + +#define CACHE_INVALIDATE (CACHE_MODE + CACR_CINV) +#if defined(CACHE_INVTYPEI) +#define CACHE_INVALIDATEI (CACHE_MODE + CACR_CINV + CACHE_INVTYPEI) +#endif +#if defined(CACHE_INVTYPED) +#define CACHE_INVALIDATED (CACHE_MODE + CACR_CINV + CACHE_INVTYPED) +#endif + +#define ACR0_MODE ((CONFIG_RAMBASE & 0xff000000) + \ + (0x000f0000) + \ + (ACR_ENABLE + ACR_ANY + ACR_CENB + ACR_BWE)) +#define ACR1_MODE 0 + +/****************************************************************************/ +#endif /* m52xxsim_h */ diff --git a/arch/m68k/include/asm/m5307sim.h b/arch/m68k/include/asm/m5307sim.h index c6830e5..0bf5739 100644 --- a/arch/m68k/include/asm/m5307sim.h +++ b/arch/m68k/include/asm/m5307sim.h @@ -14,6 +14,11 @@ #define m5307sim_h /****************************************************************************/ +#define CPU_NAME "COLDFIRE(m5307)" +#define CPU_INSTR_PER_JIFFY 3 + +#include <asm/m53xxacr.h> + /* * Define the 5307 SIM register set addresses. */ @@ -94,6 +99,17 @@ #define MCFSIM_PADAT (MCF_MBAR + 0x248) /* + * UART module. + */ +#if defined(CONFIG_NETtel) || defined(CONFIG_SECUREEDGEMP3) +#define MCFUART_BASE1 0x200 /* Base address of UART1 */ +#define MCFUART_BASE2 0x1c0 /* Base address of UART2 */ +#else +#define MCFUART_BASE1 0x1c0 /* Base address of UART1 */ +#define MCFUART_BASE2 0x200 /* Base address of UART2 */ +#endif + +/* * Generic GPIO support */ #define MCFGPIO_PIN_MAX 16 @@ -146,32 +162,5 @@ #define MCF_IRQ_TIMER 30 /* Timer0, Level 6 */ #define MCF_IRQ_PROFILER 31 /* Timer1, Level 7 */ -/* - * Define the Cache register flags. - */ -#define CACR_EC (1<<31) -#define CACR_ESB (1<<29) -#define CACR_DPI (1<<28) -#define CACR_HLCK (1<<27) -#define CACR_CINVA (1<<24) -#define CACR_DNFB (1<<10) -#define CACR_DCM_WTHRU (0<<8) -#define CACR_DCM_WBACK (1<<8) -#define CACR_DCM_OFF_PRE (2<<8) -#define CACR_DCM_OFF_IMP (3<<8) -#define CACR_DW (1<<5) - -#define ACR_BASE_POS 24 -#define ACR_MASK_POS 16 -#define ACR_ENABLE (1<<15) -#define ACR_USER (0<<13) -#define ACR_SUPER (1<<13) -#define ACR_ANY (2<<13) -#define ACR_CM_WTHRU (0<<5) -#define ACR_CM_WBACK (1<<5) -#define ACR_CM_OFF_PRE (2<<5) -#define ACR_CM_OFF_IMP (3<<5) -#define ACR_WPROTECT (1<<2) - /****************************************************************************/ #endif /* m5307sim_h */ diff --git a/arch/m68k/include/asm/m532xsim.h b/arch/m68k/include/asm/m532xsim.h index c4bf1c8..e6470f8 100644 --- a/arch/m68k/include/asm/m532xsim.h +++ b/arch/m68k/include/asm/m532xsim.h @@ -9,6 +9,11 @@ #define m532xsim_h /****************************************************************************/ +#define CPU_NAME "COLDFIRE(m532x)" +#define CPU_INSTR_PER_JIFFY 3 + +#include <asm/m53xxacr.h> + #define MCF_REG32(x) (*(volatile unsigned long *)(x)) #define MCF_REG16(x) (*(volatile unsigned short *)(x)) #define MCF_REG08(x) (*(volatile unsigned char *)(x)) @@ -74,31 +79,11 @@ #define MCF_IRQ_PROFILER (64 + 33) /* Timer1 */ /* - * Define the Cache register flags. + * UART module. */ -#define CACR_EC (1<<31) -#define CACR_ESB (1<<29) -#define CACR_DPI (1<<28) -#define CACR_HLCK (1<<27) -#define CACR_CINVA (1<<24) -#define CACR_DNFB (1<<10) -#define CACR_DCM_WTHRU (0<<8) -#define CACR_DCM_WBACK (1<<8) -#define CACR_DCM_OFF_PRE (2<<8) -#define CACR_DCM_OFF_IMP (3<<8) -#define CACR_DW (1<<5) - -#define ACR_BASE_POS 24 -#define ACR_MASK_POS 16 -#define ACR_ENABLE (1<<15) -#define ACR_USER (0<<13) -#define ACR_SUPER (1<<13) -#define ACR_ANY (2<<13) -#define ACR_CM_WTHRU (0<<5) -#define ACR_CM_WBACK (1<<5) -#define ACR_CM_OFF_PRE (2<<5) -#define ACR_CM_OFF_IMP (3<<5) -#define ACR_WPROTECT (1<<2) +#define MCFUART_BASE1 0xFC060000 /* Base address of UART1 */ +#define MCFUART_BASE2 0xFC064000 /* Base address of UART2 */ +#define MCFUART_BASE3 0xFC068000 /* Base address of UART3 */ /********************************************************************* * diff --git a/arch/m68k/include/asm/m53xxacr.h b/arch/m68k/include/asm/m53xxacr.h new file mode 100644 index 0000000..cd952b0 --- /dev/null +++ b/arch/m68k/include/asm/m53xxacr.h @@ -0,0 +1,101 @@ +/****************************************************************************/ + +/* + * m53xxacr.h -- ColdFire version 3 core cache support + * + * (C) Copyright 2010, Greg Ungerer <gerg@snapgear.com> + */ + +/****************************************************************************/ +#ifndef m53xxacr_h +#define m53xxacr_h +/****************************************************************************/ + +/* + * All varients of the ColdFire using version 3 cores have a similar + * cache setup. They have a unified instruction and data cache, with + * configurable write-through or copy-back operation. + */ + +/* + * Define the Cache Control register flags. + */ +#define CACR_EC 0x80000000 /* Enable cache */ +#define CACR_ESB 0x20000000 /* Enable store buffer */ +#define CACR_DPI 0x10000000 /* Disable invalidation by CPUSHL */ +#define CACR_HLCK 0x08000000 /* Half cache lock mode */ +#define CACR_CINVA 0x01000000 /* Invalidate cache */ +#define CACR_DNFB 0x00000400 /* Inhibited fill buffer */ +#define CACR_DCM_WT 0x00000000 /* Cacheable write-through */ +#define CACR_DCM_CB 0x00000100 /* Cacheable copy-back */ +#define CACR_DCM_PRE 0x00000200 /* Cache inhibited, precise */ +#define CACR_DCM_IMPRE 0x00000300 /* Cache inhibited, imprecise */ +#define CACR_WPROTECT 0x00000020 /* Write protect*/ +#define CACR_EUSP 0x00000010 /* Eanble separate user a7 */ + +/* + * Define the Access Control register flags. + */ +#define ACR_BASE_POS 24 /* Address Base (upper 8 bits) */ +#define ACR_MASK_POS 16 /* Address Mask (next 8 bits) */ +#define ACR_ENABLE 0x00008000 /* Enable this ACR */ +#define ACR_USER 0x00000000 /* Allow only user accesses */ +#define ACR_SUPER 0x00002000 /* Allow supervisor access only */ +#define ACR_ANY 0x00004000 /* Allow any access type */ +#define ACR_CM_WT 0x00000000 /* Cacheable, write-through */ +#define ACR_CM_CB 0x00000020 /* Cacheable, copy-back */ +#define ACR_CM_PRE 0x00000040 /* Cache inhibited, precise */ +#define ACR_CM_IMPRE 0x00000060 /* Cache inhibited, imprecise */ +#define ACR_WPROTECT 0x00000004 /* Write protect region */ + +/* + * Define the cache type and arrangement (needed for pushes). + */ +#if defined(CONFIG_M5307) +#define CACHE_SIZE 0x2000 /* 8k of unified cache */ +#define ICACHE_SIZE CACHE_SIZE +#define DCACHE_SIZE CACHE_SIZE +#elif defined(CONFIG_M532x) +#define CACHE_SIZE 0x4000 /* 32k of unified cache */ +#define ICACHE_SIZE CACHE_SIZE +#define DCACHE_SIZE CACHE_SIZE +#endif + +#define CACHE_LINE_SIZE 16 /* 16 byte line size */ +#define CACHE_WAYS 4 /* 4 ways - set associative */ + +/* + * Set the cache controller settings we will use. This default in the + * CACR is cache inhibited, we use the ACR register to set cacheing + * enabled on the regions we want (eg RAM). + */ +#if defined(CONFIG_CACHE_COPYBACK) +#define CACHE_TYPE ACR_CM_CB +#define CACHE_PUSH +#else +#define CACHE_TYPE ACR_CM_WT +#endif + +#ifdef CONFIG_COLDFIRE_SW_A7 +#define CACHE_MODE (CACR_EC + CACR_ESB + CACR_DCM_PRE) +#else +#define CACHE_MODE (CACR_EC + CACR_ESB + CACR_DCM_PRE + CACR_EUSP) +#endif + +/* + * Unified cache means we will never need to flush for coherency of + * instruction fetch. We will need to flush to maintain memory/DMA + * coherency though in all cases. And for copyback caches we will need + * to push cached data as well. + */ +#define CACHE_INIT CACR_CINVA +#define CACHE_INVALIDATE CACR_CINVA +#define CACHE_INVALIDATED CACR_CINVA + +#define ACR0_MODE ((CONFIG_RAMBASE & 0xff000000) + \ + (0x000f0000) + \ + (ACR_ENABLE + ACR_ANY + CACHE_TYPE)) +#define ACR1_MODE 0 + +/****************************************************************************/ +#endif /* m53xxsim_h */ diff --git a/arch/m68k/include/asm/m5407sim.h b/arch/m68k/include/asm/m5407sim.h index c399abb..75f5c28 100644 --- a/arch/m68k/include/asm/m5407sim.h +++ b/arch/m68k/include/asm/m5407sim.h @@ -14,6 +14,11 @@ #define m5407sim_h /****************************************************************************/ +#define CPU_NAME "COLDFIRE(m5407)" +#define CPU_INSTR_PER_JIFFY 3 + +#include <asm/m54xxacr.h> + /* * Define the 5407 SIM register set addresses. */ @@ -73,6 +78,9 @@ #define MCFSIM_DACR1 0x110 /* DRAM 1 Addr and Ctrl (r/w) */ #define MCFSIM_DMR1 0x114 /* DRAM 1 Mask reg (r/w) */ +#define MCFUART_BASE1 0x1c0 /* Base address of UART1 */ +#define MCFUART_BASE2 0x200 /* Base address of UART2 */ + #define MCFSIM_PADDR (MCF_MBAR + 0x244) #define MCFSIM_PADAT (MCF_MBAR + 0x248) @@ -117,39 +125,5 @@ #define MCF_IRQ_TIMER 30 /* Timer0, Level 6 */ #define MCF_IRQ_PROFILER 31 /* Timer1, Level 7 */ -/* - * Define the Cache register flags. - */ -#define CACR_DEC 0x80000000 /* Enable data cache */ -#define CACR_DWP 0x40000000 /* Data write protection */ -#define CACR_DESB 0x20000000 /* Enable data store buffer */ -#define CACR_DDPI 0x10000000 /* Disable CPUSHL */ -#define CACR_DHCLK 0x08000000 /* Half data cache lock mode */ -#define CACR_DDCM_WT 0x00000000 /* Write through cache*/ -#define CACR_DDCM_CP 0x02000000 /* Copyback cache */ -#define CACR_DDCM_P 0x04000000 /* No cache, precise */ -#define CACR_DDCM_IMP 0x06000000 /* No cache, imprecise */ -#define CACR_DCINVA 0x01000000 /* Invalidate data cache */ -#define CACR_BEC 0x00080000 /* Enable branch cache */ -#define CACR_BCINVA 0x00040000 /* Invalidate branch cache */ -#define CACR_IEC 0x00008000 /* Enable instruction cache */ -#define CACR_DNFB 0x00002000 /* Inhibited fill buffer */ -#define CACR_IDPI 0x00001000 /* Disable CPUSHL */ -#define CACR_IHLCK 0x00000800 /* Intruction cache half lock */ -#define CACR_IDCM 0x00000400 /* Intruction cache inhibit */ -#define CACR_ICINVA 0x00000100 /* Invalidate instr cache */ - -#define ACR_BASE_POS 24 /* Address Base */ -#define ACR_MASK_POS 16 /* Address Mask */ -#define ACR_ENABLE 0x00008000 /* Enable address */ -#define ACR_USER 0x00000000 /* User mode access only */ -#define ACR_SUPER 0x00002000 /* Supervisor mode only */ -#define ACR_ANY 0x00004000 /* Match any access mode */ -#define ACR_CM_WT 0x00000000 /* Write through mode */ -#define ACR_CM_CP 0x00000020 /* Copyback mode */ -#define ACR_CM_OFF_PRE 0x00000040 /* No cache, precise */ -#define ACR_CM_OFF_IMP 0x00000060 /* No cache, imprecise */ -#define ACR_WPROTECT 0x00000004 /* Write protect */ - /****************************************************************************/ #endif /* m5407sim_h */ diff --git a/arch/m68k/include/asm/m54xxacr.h b/arch/m68k/include/asm/m54xxacr.h new file mode 100644 index 0000000..16a1835 --- /dev/null +++ b/arch/m68k/include/asm/m54xxacr.h @@ -0,0 +1,97 @@ +/* + * Bit definitions for the MCF54xx ACR and CACR registers. + */ + +#ifndef m54xxacr_h +#define m54xxacr_h + +/* + * Define the Cache register flags. + */ +#define CACR_DEC 0x80000000 /* Enable data cache */ +#define CACR_DWP 0x40000000 /* Data write protection */ +#define CACR_DESB 0x20000000 /* Enable data store buffer */ +#define CACR_DDPI 0x10000000 /* Disable invalidation by CPUSHL */ +#define CACR_DHCLK 0x08000000 /* Half data cache lock mode */ +#define CACR_DDCM_WT 0x00000000 /* Write through cache*/ +#define CACR_DDCM_CP 0x02000000 /* Copyback cache */ +#define CACR_DDCM_P 0x04000000 /* No cache, precise */ +#define CACR_DDCM_IMP 0x06000000 /* No cache, imprecise */ +#define CACR_DCINVA 0x01000000 /* Invalidate data cache */ +#define CACR_BEC 0x00080000 /* Enable branch cache */ +#define CACR_BCINVA 0x00040000 /* Invalidate branch cache */ +#define CACR_IEC 0x00008000 /* Enable instruction cache */ +#define CACR_DNFB 0x00002000 /* Inhibited fill buffer */ +#define CACR_IDPI 0x00001000 /* Disable CPUSHL */ +#define CACR_IHLCK 0x00000800 /* Intruction cache half lock */ +#define CACR_IDCM 0x00000400 /* Intruction cache inhibit */ +#define CACR_ICINVA 0x00000100 /* Invalidate instr cache */ +#define CACR_EUSP 0x00000020 /* Enable separate user a7 */ + +#define ACR_BASE_POS 24 /* Address Base */ +#define ACR_MASK_POS 16 /* Address Mask */ +#define ACR_ENABLE 0x00008000 /* Enable address */ +#define ACR_USER 0x00000000 /* User mode access only */ +#define ACR_SUPER 0x00002000 /* Supervisor mode only */ +#define ACR_ANY 0x00004000 /* Match any access mode */ +#define ACR_CM_WT 0x00000000 /* Write through mode */ +#define ACR_CM_CP 0x00000020 /* Copyback mode */ +#define ACR_CM_OFF_PRE 0x00000040 /* No cache, precise */ +#define ACR_CM_OFF_IMP 0x00000060 /* No cache, imprecise */ +#define ACR_CM 0x00000060 /* Cache mode mask */ +#define ACR_WPROTECT 0x00000004 /* Write protect */ + +#if defined(CONFIG_M5407) + +#define ICACHE_SIZE 0x4000 /* instruction - 16k */ +#define DCACHE_SIZE 0x2000 /* data - 8k */ + +#elif defined(CONFIG_M54xx) + +#define ICACHE_SIZE 0x8000 /* instruction - 32k */ +#define DCACHE_SIZE 0x8000 /* data - 32k */ + +#endif + +#define CACHE_LINE_SIZE 0x0010 /* 16 bytes */ +#define CACHE_WAYS 4 /* 4 ways */ + +/* + * Version 4 cores have a true harvard style separate instruction + * and data cache. Enable data and instruction caches, also enable write + * buffers and branch accelerator. + */ +/* attention : enabling CACR_DESB requires a "nop" to flush the store buffer */ +/* use '+' instead of '|' for assembler's sake */ + + /* Enable data cache */ + /* Enable data store buffer */ + /* outside ACRs : No cache, precise */ + /* Enable instruction+branch caches */ +#if defined(CONFIG_M5407) +#define CACHE_MODE (CACR_DEC+CACR_DESB+CACR_DDCM_P+CACR_BEC+CACR_IEC) +#else +#define CACHE_MODE (CACR_DEC+CACR_DESB+CACR_DDCM_P+CACR_BEC+CACR_IEC+CACR_EUSP) +#endif +#if defined(CONFIG_CACHE_COPYBACK) +#define DATA_CACHE_MODE (ACR_ENABLE+ACR_ANY+ACR_CM_CP) +#else +#define DATA_CACHE_MODE (ACR_ENABLE+ACR_ANY+ACR_CM_WT) +#endif +#define INSN_CACHE_MODE (ACR_ENABLE+ACR_ANY) + +#define CACHE_INIT (CACR_DCINVA+CACR_BCINVA+CACR_ICINVA) +#define CACHE_INVALIDATE (CACHE_MODE+CACR_DCINVA+CACR_BCINVA+CACR_ICINVA) +#define CACHE_INVALIDATEI (CACHE_MODE+CACR_BCINVA+CACR_ICINVA) +#define CACHE_INVALIDATED (CACHE_MODE+CACR_DCINVA) +#define ACR0_MODE (0x000f0000+DATA_CACHE_MODE) +#define ACR1_MODE 0 +#define ACR2_MODE (0x000f0000+INSN_CACHE_MODE) +#define ACR3_MODE 0 + +#if ((DATA_CACHE_MODE & ACR_CM) == ACR_CM_CP) +/* Copyback cache mode must push dirty cache lines first */ +#define CACHE_PUSH +#endif + +#endif /* m54xxacr_h */ diff --git a/arch/m68k/include/asm/m548xgpt.h b/arch/m68k/include/asm/m54xxgpt.h index 33b2eef..df75dd8 100644 --- a/arch/m68k/include/asm/m548xgpt.h +++ b/arch/m68k/include/asm/m54xxgpt.h @@ -1,13 +1,13 @@ /* - * File: m548xgpt.h - * Purpose: Register and bit definitions for the MCF548X + * File: m54xxgpt.h + * Purpose: Register and bit definitions for the MCF54XX * * Notes: * */ -#ifndef m548xgpt_h -#define m548xgpt_h +#ifndef m54xxgpt_h +#define m54xxgpt_h /********************************************************************* * @@ -87,4 +87,4 @@ /********************************************************************/ -#endif /* m548xgpt_h */ +#endif /* m54xxgpt_h */ diff --git a/arch/m68k/include/asm/m548xsim.h b/arch/m68k/include/asm/m54xxsim.h index 149135e..462ae53 100644 --- a/arch/m68k/include/asm/m548xsim.h +++ b/arch/m68k/include/asm/m54xxsim.h @@ -1,11 +1,16 @@ /* - * m548xsim.h -- ColdFire 547x/548x System Integration Unit support. + * m54xxsim.h -- ColdFire 547x/548x System Integration Unit support. */ -#ifndef m548xsim_h -#define m548xsim_h +#ifndef m54xxsim_h +#define m54xxsim_h -#define MCFINT_VECBASE 64 +#define CPU_NAME "COLDFIRE(m54xx)" +#define CPU_INSTR_PER_JIFFY 2 + +#include <asm/m54xxacr.h> + +#define MCFINT_VECBASE 64 /* * Interrupt Controller Registers @@ -22,6 +27,14 @@ #define MCFINTC_ICR0 0x40 /* Base ICR register */ /* + * UART module. + */ +#define MCFUART_BASE1 0x8600 /* Base address of UART1 */ +#define MCFUART_BASE2 0x8700 /* Base address of UART2 */ +#define MCFUART_BASE3 0x8800 /* Base address of UART3 */ +#define MCFUART_BASE4 0x8900 /* Base address of UART4 */ + +/* * Define system peripheral IRQ usage. */ #define MCF_IRQ_TIMER (64 + 54) /* Slice Timer 0 */ @@ -52,4 +65,4 @@ #define MCF_PAR_PSC_RTS_RTS (0x30) #define MCF_PAR_PSC_CANRX (0x40) -#endif /* m548xsim_h */ +#endif /* m54xxsim_h */ diff --git a/arch/m68k/include/asm/mcfcache.h b/arch/m68k/include/asm/mcfcache.h deleted file mode 100644 index f49dfc0..0000000 --- a/arch/m68k/include/asm/mcfcache.h +++ /dev/null @@ -1,150 +0,0 @@ -/****************************************************************************/ - -/* - * mcfcache.h -- ColdFire CPU cache support code - * - * (C) Copyright 2004, Greg Ungerer <gerg@snapgear.com> - */ - -/****************************************************************************/ -#ifndef __M68KNOMMU_MCFCACHE_H -#define __M68KNOMMU_MCFCACHE_H -/****************************************************************************/ - - -/* - * The different ColdFire families have different cache arrangments. - * Everything from a small instruction only cache, to configurable - * data and/or instruction cache, to unified instruction/data, to - * harvard style separate instruction and data caches. - */ - -#if defined(CONFIG_M5206) || defined(CONFIG_M5206e) || defined(CONFIG_M5272) -/* - * Simple version 2 core cache. These have instruction cache only, - * we just need to invalidate it and enable it. - */ -.macro CACHE_ENABLE - movel #0x01000000,%d0 /* invalidate cache cmd */ - movec %d0,%CACR /* do invalidate cache */ - movel #0x80000100,%d0 /* setup cache mask */ - movec %d0,%CACR /* enable cache */ -.endm -#endif /* CONFIG_M5206 || CONFIG_M5206e || CONFIG_M5272 */ - -#if defined(CONFIG_M523x) || defined(CONFIG_M527x) -/* - * New version 2 cores have a configurable split cache arrangement. - * For now I am just enabling instruction cache - but ultimately I - * think a split instruction/data cache would be better. - */ -.macro CACHE_ENABLE - movel #0x01400000,%d0 - movec %d0,%CACR /* invalidate cache */ - nop - movel #0x0000c000,%d0 /* set SDRAM cached only */ - movec %d0,%ACR0 - movel #0x00000000,%d0 /* no other regions cached */ - movec %d0,%ACR1 - movel #0x80400100,%d0 /* configure cache */ - movec %d0,%CACR /* enable cache */ - nop -.endm -#endif /* CONFIG_M523x || CONFIG_M527x */ - -#if defined(CONFIG_M528x) -.macro CACHE_ENABLE - nop - movel #0x01000000, %d0 - movec %d0, %CACR /* Invalidate cache */ - nop - movel #0x0000c020, %d0 /* Set SDRAM cached only */ - movec %d0, %ACR0 - movel #0x00000000, %d0 /* No other regions cached */ - movec %d0, %ACR1 - movel #0x80000200, %d0 /* Setup cache mask */ - movec %d0, %CACR /* Enable cache */ - nop -.endm -#endif /* CONFIG_M528x */ - -#if defined(CONFIG_M5249) || defined(CONFIG_M5307) -/* - * The version 3 core cache. Oddly enough the version 2 core 5249 - * has the same SDRAM and cache setup as the version 3 cores. - * This is a single unified instruction/data cache. - */ -.macro CACHE_ENABLE - movel #0x01000000,%d0 /* invalidate whole cache */ - movec %d0,%CACR - nop -#if defined(DEBUGGER_COMPATIBLE_CACHE) || defined(CONFIG_SECUREEDGEMP3) - movel #0x0000c000,%d0 /* set SDRAM cached (write-thru) */ -#else - movel #0x0000c020,%d0 /* set SDRAM cached (copyback) */ -#endif - movec %d0,%ACR0 - movel #0x00000000,%d0 /* no other regions cached */ - movec %d0,%ACR1 - movel #0xa0000200,%d0 /* enable cache */ - movec %d0,%CACR - nop -.endm -#endif /* CONFIG_M5249 || CONFIG_M5307 */ - -#if defined(CONFIG_M532x) -.macro CACHE_ENABLE - movel #0x01000000,%d0 /* invalidate cache cmd */ - movec %d0,%CACR /* do invalidate cache */ - nop - movel #0x4001C000,%d0 /* set SDRAM cached (write-thru) */ - movec %d0,%ACR0 - movel #0x00000000,%d0 /* no other regions cached */ - movec %d0,%ACR1 - movel #0x80000200,%d0 /* setup cache mask */ - movec %d0,%CACR /* enable cache */ - nop -.endm -#endif /* CONFIG_M532x */ - -#if defined(CONFIG_M5407) || defined(CONFIG_M548x) -/* - * Version 4 cores have a true harvard style separate instruction - * and data cache. Invalidate and enable cache, also enable write - * buffers and branch accelerator. - */ -.macro CACHE_ENABLE - movel #0x01040100,%d0 /* invalidate whole cache */ - movec %d0,%CACR - nop - movel #0x000fc000,%d0 /* set SDRAM cached only */ - movec %d0, %ACR0 - movel #0x00000000,%d0 /* no other regions cached */ - movec %d0, %ACR1 - movel #0x000fc000,%d0 /* set SDRAM cached only */ - movec %d0, %ACR2 - movel #0x00000000,%d0 /* no other regions cached */ - movec %d0, %ACR3 - movel #0xb6088400,%d0 /* enable caches */ - movec %d0,%CACR - nop -.endm -#endif /* CONFIG_M5407 */ - -#if defined(CONFIG_M520x) -.macro CACHE_ENABLE - move.l #0x01000000,%d0 /* invalidate whole cache */ - movec %d0,%CACR - nop - move.l #0x0000c000,%d0 /* set SDRAM cached (write-thru) */ - movec %d0,%ACR0 - move.l #0x00000000,%d0 /* no other regions cached */ - movec %d0,%ACR1 - move.l #0x80400000,%d0 /* enable 8K instruction cache */ - movec %d0,%CACR - nop -.endm -#endif /* CONFIG_M520x */ - -/****************************************************************************/ -#endif /* __M68KNOMMU_MCFCACHE_H */ diff --git a/arch/m68k/include/asm/mcfsim.h b/arch/m68k/include/asm/mcfsim.h index 6901fd6..ebd0304 100644 --- a/arch/m68k/include/asm/mcfsim.h +++ b/arch/m68k/include/asm/mcfsim.h @@ -41,8 +41,8 @@ #elif defined(CONFIG_M5407) #include <asm/m5407sim.h> #include <asm/mcfintc.h> -#elif defined(CONFIG_M548x) -#include <asm/m548xsim.h> +#elif defined(CONFIG_M54xx) +#include <asm/m54xxsim.h> #endif /****************************************************************************/ diff --git a/arch/m68k/include/asm/mcfuart.h b/arch/m68k/include/asm/mcfuart.h index db72e2b..2abedff 100644 --- a/arch/m68k/include/asm/mcfuart.h +++ b/arch/m68k/include/asm/mcfuart.h @@ -12,49 +12,6 @@ #define mcfuart_h /****************************************************************************/ -/* - * Define the base address of the UARTS within the MBAR address - * space. - */ -#if defined(CONFIG_M5272) -#define MCFUART_BASE1 0x100 /* Base address of UART1 */ -#define MCFUART_BASE2 0x140 /* Base address of UART2 */ -#elif defined(CONFIG_M5206) || defined(CONFIG_M5206e) -#if defined(CONFIG_NETtel) -#define MCFUART_BASE1 0x180 /* Base address of UART1 */ -#define MCFUART_BASE2 0x140 /* Base address of UART2 */ -#else -#define MCFUART_BASE1 0x140 /* Base address of UART1 */ -#define MCFUART_BASE2 0x180 /* Base address of UART2 */ -#endif -#elif defined(CONFIG_M523x) || defined(CONFIG_M527x) || defined(CONFIG_M528x) -#define MCFUART_BASE1 0x200 /* Base address of UART1 */ -#define MCFUART_BASE2 0x240 /* Base address of UART2 */ -#define MCFUART_BASE3 0x280 /* Base address of UART3 */ -#elif defined(CONFIG_M5249) || defined(CONFIG_M5307) || defined(CONFIG_M5407) -#if defined(CONFIG_NETtel) || defined(CONFIG_SECUREEDGEMP3) -#define MCFUART_BASE1 0x200 /* Base address of UART1 */ -#define MCFUART_BASE2 0x1c0 /* Base address of UART2 */ -#else -#define MCFUART_BASE1 0x1c0 /* Base address of UART1 */ -#define MCFUART_BASE2 0x200 /* Base address of UART2 */ -#endif -#elif defined(CONFIG_M520x) -#define MCFUART_BASE1 0x60000 /* Base address of UART1 */ -#define MCFUART_BASE2 0x64000 /* Base address of UART2 */ -#define MCFUART_BASE3 0x68000 /* Base address of UART2 */ -#elif defined(CONFIG_M532x) -#define MCFUART_BASE1 0xfc060000 /* Base address of UART1 */ -#define MCFUART_BASE2 0xfc064000 /* Base address of UART2 */ -#define MCFUART_BASE3 0xfc068000 /* Base address of UART3 */ -#elif defined(CONFIG_M548x) -#define MCFUART_BASE1 0x8600 /* on M548x */ -#define MCFUART_BASE2 0x8700 /* on M548x */ -#define MCFUART_BASE3 0x8800 /* on M548x */ -#define MCFUART_BASE4 0x8900 /* on M548x */ -#endif - - #include <linux/serial_core.h> #include <linux/platform_device.h> @@ -217,7 +174,7 @@ struct mcf_platform_uart { #define MCFUART_URF_RXS 0xc0 /* Receiver status */ #endif -#if defined(CONFIG_M548x) +#if defined(CONFIG_M54xx) #define MCFUART_TXFIFOSIZE 512 #elif defined(CONFIG_M5272) #define MCFUART_TXFIFOSIZE 25 diff --git a/arch/m68k/include/asm/processor.h b/arch/m68k/include/asm/processor.h index 7a6a759..278c69b 100644 --- a/arch/m68k/include/asm/processor.h +++ b/arch/m68k/include/asm/processor.h @@ -20,23 +20,26 @@ static inline unsigned long rdusp(void) { -#ifdef CONFIG_COLDFIRE +#ifdef CONFIG_COLDFIRE_SW_A7 extern unsigned int sw_usp; return sw_usp; #else - unsigned long usp; - __asm__ __volatile__("move %/usp,%0" : "=a" (usp)); + register unsigned long usp __asm__("a0"); + /* move %usp,%a0 */ + __asm__ __volatile__(".word 0x4e68" : "=a" (usp)); return usp; #endif } static inline void wrusp(unsigned long usp) { -#ifdef CONFIG_COLDFIRE +#ifdef CONFIG_COLDFIRE_SW_A7 extern unsigned int sw_usp; sw_usp = usp; #else - __asm__ __volatile__("move %0,%/usp" : : "a" (usp)); + register unsigned long a0 __asm__("a0") = usp; + /* move %a0,%usp */ + __asm__ __volatile__(".word 0x4e60" : : "a" (a0) ); #endif } diff --git a/arch/m68knommu/Kconfig b/arch/m68knommu/Kconfig index fa9f746..704e7b9 100644 --- a/arch/m68knommu/Kconfig +++ b/arch/m68knommu/Kconfig @@ -75,6 +75,16 @@ config GENERIC_CLOCKEVENTS config NO_IOPORT def_bool y +config COLDFIRE_SW_A7 + bool + default n + +config HAVE_CACHE_SPLIT + bool + +config HAVE_CACHE_CB + bool + source "init/Kconfig" source "kernel/Kconfig.freezer" @@ -107,69 +117,90 @@ config M68360 config M5206 bool "MCF5206" + select COLDFIRE_SW_A7 help Motorola ColdFire 5206 processor support. config M5206e bool "MCF5206e" + select COLDFIRE_SW_A7 help Motorola ColdFire 5206e processor support. config M520x bool "MCF520x" select GENERIC_CLOCKEVENTS + select HAVE_CACHE_SPLIT help Freescale Coldfire 5207/5208 processor support. config M523x bool "MCF523x" select GENERIC_CLOCKEVENTS + select HAVE_CACHE_SPLIT help Freescale Coldfire 5230/1/2/4/5 processor support config M5249 bool "MCF5249" + select COLDFIRE_SW_A7 help Motorola ColdFire 5249 processor support. config M5271 bool "MCF5271" + select HAVE_CACHE_SPLIT help Freescale (Motorola) ColdFire 5270/5271 processor support. config M5272 bool "MCF5272" + select COLDFIRE_SW_A7 help Motorola ColdFire 5272 processor support. config M5275 bool "MCF5275" + select HAVE_CACHE_SPLIT help Freescale (Motorola) ColdFire 5274/5275 processor support. config M528x bool "MCF528x" select GENERIC_CLOCKEVENTS + select HAVE_CACHE_SPLIT help Motorola ColdFire 5280/5282 processor support. config M5307 bool "MCF5307" + select COLDFIRE_SW_A7 + select HAVE_CACHE_CB help Motorola ColdFire 5307 processor support. config M532x bool "MCF532x" + select HAVE_CACHE_CB help Freescale (Motorola) ColdFire 532x processor support. config M5407 bool "MCF5407" + select COLDFIRE_SW_A7 + select HAVE_CACHE_CB help Motorola ColdFire 5407 processor support. +config M547x + bool "MCF547x" + select HAVE_CACHE_CB + help + Freescale ColdFire 5470/5471/5472/5473/5474/5475 processor support. + config M548x bool "MCF548x" + select HAVE_CACHE_CB help Freescale ColdFire 5480/5481/5482/5483/5484/5485 processor support. @@ -181,9 +212,14 @@ config M527x select GENERIC_CLOCKEVENTS default y +config M54xx + bool + depends on (M548x || M547x) + default y + config COLDFIRE bool - depends on (M5206 || M5206e || M520x || M523x || M5249 || M527x || M5272 || M528x || M5307 || M532x || M5407 || M548x) + depends on (M5206 || M5206e || M520x || M523x || M5249 || M527x || M5272 || M528x || M5307 || M532x || M5407 || M54xx) select GENERIC_GPIO select ARCH_REQUIRE_GPIOLIB default y @@ -230,6 +266,46 @@ config OLDMASK Build support for the older revision ColdFire 5307 silicon. Specifically this is the 1H55J mask revision. +if HAVE_CACHE_SPLIT +choice + prompt "Split Cache Configuration" + default CACHE_I + +config CACHE_I + bool "Instruction" + help + Use all of the ColdFire CPU cache memory as an instruction cache. + +config CACHE_D + bool "Data" + help + Use all of the ColdFire CPU cache memory as a data cache. + +config CACHE_BOTH + bool "Both" + help + Split the ColdFire CPU cache, and use half as an instruction cache + and half as a data cache. +endchoice +endif + +if HAVE_CACHE_CB +choice + prompt "Data cache mode" + default CACHE_WRITETHRU + +config CACHE_WRITETHRU + bool "Write-through" + help + The ColdFire CPU cache is set into Write-through mode. + +config CACHE_COPYBACK + bool "Copy-back" + help + The ColdFire CPU cache is set into Copy-back mode. +endchoice +endif + comment "Platform" config PILOT3 @@ -245,16 +321,16 @@ config XCOPILOT_BUGS Support the bugs of Xcopilot. config UC5272 - bool 'Arcturus Networks uC5272 dimm board support' - depends on M5272 - help - Support for the Arcturus Networks uC5272 dimm board. + bool 'Arcturus Networks uC5272 dimm board support' + depends on M5272 + help + Support for the Arcturus Networks uC5272 dimm board. config UC5282 - bool "Arcturus Networks uC5282 board support" - depends on M528x - help - Support for the Arcturus Networks uC5282 dimm board. + bool "Arcturus Networks uC5282 board support" + depends on M528x + help + Support for the Arcturus Networks uC5282 dimm board. config UCSIMM bool "uCsimm module support" @@ -279,7 +355,7 @@ config DIRECT_IO_ACCESS depends on (UCSIMM || UCDIMM || DRAGEN2) help Disable the CPU internal registers protection in user mode, - to allow a user application to read/write them. + to allow a user application to read/write them. config INIT_LCD bool "Initialize LCD" @@ -517,7 +593,7 @@ config EMAC_INC depends on (SOM5282EM) config SNEHA - bool + bool default y depends on CPU16B diff --git a/arch/m68knommu/Makefile b/arch/m68knommu/Makefile index 026ef16..589613f 100644 --- a/arch/m68knommu/Makefile +++ b/arch/m68knommu/Makefile @@ -25,7 +25,7 @@ platform-$(CONFIG_M528x) := 528x platform-$(CONFIG_M5307) := 5307 platform-$(CONFIG_M532x) := 532x platform-$(CONFIG_M5407) := 5407 -platform-$(CONFIG_M548x) := 548x +platform-$(CONFIG_M54xx) := 54xx PLATFORM := $(platform-y) board-$(CONFIG_PILOT) := pilot @@ -74,7 +74,7 @@ cpuclass-$(CONFIG_M528x) := coldfire cpuclass-$(CONFIG_M5307) := coldfire cpuclass-$(CONFIG_M532x) := coldfire cpuclass-$(CONFIG_M5407) := coldfire -cpuclass-$(CONFIG_M548x) := coldfire +cpuclass-$(CONFIG_M54xx) := coldfire cpuclass-$(CONFIG_M68328) := 68328 cpuclass-$(CONFIG_M68EZ328) := 68328 cpuclass-$(CONFIG_M68VZ328) := 68328 @@ -91,18 +91,18 @@ export PLATFORM BOARD MODEL CPUCLASS # Some CFLAG additions based on specific CPU type. # cflags-$(CONFIG_M5206) := $(call cc-option,-mcpu=5206,-m5200) -cflags-$(CONFIG_M5206e) := $(call cc-option,-m5206e,-m5200) +cflags-$(CONFIG_M5206e) := $(call cc-option,-mcpu=5206e,-m5200) cflags-$(CONFIG_M520x) := $(call cc-option,-mcpu=5208,-m5200) cflags-$(CONFIG_M523x) := $(call cc-option,-mcpu=523x,-m5307) cflags-$(CONFIG_M5249) := $(call cc-option,-mcpu=5249,-m5200) cflags-$(CONFIG_M5271) := $(call cc-option,-mcpu=5271,-m5307) cflags-$(CONFIG_M5272) := $(call cc-option,-mcpu=5272,-m5307) cflags-$(CONFIG_M5275) := $(call cc-option,-mcpu=5275,-m5307) -cflags-$(CONFIG_M528x) := $(call cc-option,-m528x,-m5307) -cflags-$(CONFIG_M5307) := $(call cc-option,-m5307,-m5200) +cflags-$(CONFIG_M528x) := $(call cc-option,-mcpu=528x,-m5307) +cflags-$(CONFIG_M5307) := $(call cc-option,-mcpu=5307,-m5200) cflags-$(CONFIG_M532x) := $(call cc-option,-mcpu=532x,-m5307) -cflags-$(CONFIG_M5407) := $(call cc-option,-m5407,-m5200) -cflags-$(CONFIG_M548x) := $(call cc-option,-m5407,-m5200) +cflags-$(CONFIG_M5407) := $(call cc-option,-mcpu=5407,-m5200) +cflags-$(CONFIG_M54xx) := $(call cc-option,-mcpu=5475,-m5200) cflags-$(CONFIG_M68328) := -m68000 cflags-$(CONFIG_M68EZ328) := -m68000 cflags-$(CONFIG_M68VZ328) := -m68000 diff --git a/arch/m68knommu/kernel/setup.c b/arch/m68knommu/kernel/setup.c index c684adf..16b2de7 100644 --- a/arch/m68knommu/kernel/setup.c +++ b/arch/m68knommu/kernel/setup.c @@ -55,55 +55,29 @@ void (*mach_halt)(void); void (*mach_power_off)(void); #ifdef CONFIG_M68328 - #define CPU "MC68328" +#define CPU_NAME "MC68328" #endif #ifdef CONFIG_M68EZ328 - #define CPU "MC68EZ328" +#define CPU_NAME "MC68EZ328" #endif #ifdef CONFIG_M68VZ328 - #define CPU "MC68VZ328" +#define CPU_NAME "MC68VZ328" #endif #ifdef CONFIG_M68360 - #define CPU "MC68360" +#define CPU_NAME "MC68360" #endif -#if defined(CONFIG_M5206) - #define CPU "COLDFIRE(m5206)" +#ifndef CPU_NAME +#define CPU_NAME "UNKNOWN" #endif -#if defined(CONFIG_M5206e) - #define CPU "COLDFIRE(m5206e)" -#endif -#if defined(CONFIG_M520x) - #define CPU "COLDFIRE(m520x)" -#endif -#if defined(CONFIG_M523x) - #define CPU "COLDFIRE(m523x)" -#endif -#if defined(CONFIG_M5249) - #define CPU "COLDFIRE(m5249)" -#endif -#if defined(CONFIG_M5271) - #define CPU "COLDFIRE(m5270/5271)" -#endif -#if defined(CONFIG_M5272) - #define CPU "COLDFIRE(m5272)" -#endif -#if defined(CONFIG_M5275) - #define CPU "COLDFIRE(m5274/5275)" -#endif -#if defined(CONFIG_M528x) - #define CPU "COLDFIRE(m5280/5282)" -#endif -#if defined(CONFIG_M5307) - #define CPU "COLDFIRE(m5307)" -#endif -#if defined(CONFIG_M532x) - #define CPU "COLDFIRE(m532x)" -#endif -#if defined(CONFIG_M5407) - #define CPU "COLDFIRE(m5407)" -#endif -#ifndef CPU - #define CPU "UNKNOWN" + +/* + * Different cores have different instruction execution timings. + * The old/traditional 68000 cores are basically all the same, at 16. + * The ColdFire cores vary a little, their values are defined in their + * headers. We default to the standard 68000 value here. + */ +#ifndef CPU_INSTR_PER_JIFFY +#define CPU_INSTR_PER_JIFFY 16 #endif extern int _stext, _etext, _sdata, _edata, _sbss, _ebss, _end; @@ -208,7 +182,7 @@ void __init setup_arch(char **cmdline_p) command_line[sizeof(command_line) - 1] = 0; #endif /* CONFIG_UBOOT */ - printk(KERN_INFO "\x0F\r\n\nuClinux/" CPU "\n"); + printk(KERN_INFO "\x0F\r\n\nuClinux/" CPU_NAME "\n"); #ifdef CONFIG_UCDIMM printk(KERN_INFO "uCdimm by Lineo, Inc. <www.lineo.com>\n"); @@ -257,11 +231,6 @@ void __init setup_arch(char **cmdline_p) memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE); boot_command_line[COMMAND_LINE_SIZE-1] = 0; -#ifdef DEBUG - if (strlen(*cmdline_p)) - printk(KERN_DEBUG "Command line: '%s'\n", *cmdline_p); -#endif - #if defined(CONFIG_FRAMEBUFFER_CONSOLE) && defined(CONFIG_DUMMY_CONSOLE) conswitchp = &dummy_con; #endif @@ -303,15 +272,10 @@ static int show_cpuinfo(struct seq_file *m, void *v) char *cpu, *mmu, *fpu; u_long clockfreq; - cpu = CPU; + cpu = CPU_NAME; mmu = "none"; fpu = "none"; - -#ifdef CONFIG_COLDFIRE - clockfreq = (loops_per_jiffy * HZ) * 3; -#else - clockfreq = (loops_per_jiffy * HZ) * 16; -#endif + clockfreq = (loops_per_jiffy * HZ) * CPU_INSTR_PER_JIFFY; seq_printf(m, "CPU:\t\t%s\n" "MMU:\t\t%s\n" diff --git a/arch/m68knommu/mm/Makefile b/arch/m68knommu/mm/Makefile index fc91f25..b54ab6b 100644 --- a/arch/m68knommu/mm/Makefile +++ b/arch/m68knommu/mm/Makefile @@ -2,4 +2,4 @@ # Makefile for the linux m68knommu specific parts of the memory manager. # -obj-y += init.o fault.o memory.o kmap.o +obj-y += init.o kmap.o diff --git a/arch/m68knommu/mm/fault.c b/arch/m68knommu/mm/fault.c deleted file mode 100644 index bc05cf7..0000000 --- a/arch/m68knommu/mm/fault.c +++ /dev/null @@ -1,57 +0,0 @@ -/* - * linux/arch/m68knommu/mm/fault.c - * - * Copyright (C) 1998 D. Jeff Dionne <jeff@lineo.ca>, - * Copyright (C) 2000 Lineo, Inc. (www.lineo.com) - * - * Based on: - * - * linux/arch/m68k/mm/fault.c - * - * Copyright (C) 1995 Hamish Macdonald - */ - -#include <linux/mman.h> -#include <linux/mm.h> -#include <linux/kernel.h> -#include <linux/ptrace.h> - -#include <asm/system.h> -#include <asm/pgtable.h> - -extern void die_if_kernel(char *, struct pt_regs *, long); - -/* - * This routine handles page faults. It determines the problem, and - * then passes it off to one of the appropriate routines. - * - * error_code: - * bit 0 == 0 means no page found, 1 means protection fault - * bit 1 == 0 means read, 1 means write - * - * If this routine detects a bad access, it returns 1, otherwise it - * returns 0. - */ -asmlinkage int do_page_fault(struct pt_regs *regs, unsigned long address, - unsigned long error_code) -{ -#ifdef DEBUG - printk(KERN_DEBUG "regs->sr=%#x, regs->pc=%#lx, address=%#lx, %ld\n", - regs->sr, regs->pc, address, error_code); -#endif - - /* - * Oops. The kernel tried to access some bad page. We'll have to - * terminate things with extreme prejudice. - */ - if ((unsigned long) address < PAGE_SIZE) - printk(KERN_ALERT "Unable to handle kernel NULL pointer dereference"); - else - printk(KERN_ALERT "Unable to handle kernel access"); - printk(KERN_ALERT " at virtual address %08lx\n", address); - die_if_kernel("Oops", regs, error_code); - do_exit(SIGKILL); - - return 1; -} - diff --git a/arch/m68knommu/mm/kmap.c b/arch/m68knommu/mm/kmap.c index 902c1df..ece8d5a 100644 --- a/arch/m68knommu/mm/kmap.c +++ b/arch/m68knommu/mm/kmap.c @@ -36,15 +36,6 @@ void iounmap(void *addr) } /* - * __iounmap unmaps nearly everything, so be careful - * it doesn't free currently pointer/page tables anymore but it - * wans't used anyway and might be added later. - */ -void __iounmap(void *addr, unsigned long size) -{ -} - -/* * Set new cache mode for some kernel address space. * The caller must push data for that range itself, if such data may already * be in the cache. diff --git a/arch/m68knommu/mm/memory.c b/arch/m68knommu/mm/memory.c deleted file mode 100644 index 8f7949e..0000000 --- a/arch/m68knommu/mm/memory.c +++ /dev/null @@ -1,33 +0,0 @@ -/* - * linux/arch/m68knommu/mm/memory.c - * - * Copyright (C) 1998 Kenneth Albanowski <kjahds@kjahds.com>, - * Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com) - * - * Based on: - * - * linux/arch/m68k/mm/memory.c - * - * Copyright (C) 1995 Hamish Macdonald - */ - -#include <linux/mm.h> -#include <linux/kernel.h> -#include <linux/string.h> -#include <linux/types.h> - -#include <asm/segment.h> -#include <asm/page.h> -#include <asm/pgtable.h> -#include <asm/system.h> - -/* - * Map some physical address range into the kernel address space. - */ - -unsigned long kernel_map(unsigned long paddr, unsigned long size, - int nocacheflag, unsigned long *memavailp ) -{ - return paddr; -} - diff --git a/arch/m68knommu/platform/548x/Makefile b/arch/m68knommu/platform/54xx/Makefile index e6035e7..e6035e7 100644 --- a/arch/m68knommu/platform/548x/Makefile +++ b/arch/m68knommu/platform/54xx/Makefile diff --git a/arch/m68knommu/platform/548x/config.c b/arch/m68knommu/platform/54xx/config.c index 9888846..7813098 100644 --- a/arch/m68knommu/platform/548x/config.c +++ b/arch/m68knommu/platform/54xx/config.c @@ -1,7 +1,7 @@ /***************************************************************************/ /* - * linux/arch/m68knommu/platform/548x/config.c + * linux/arch/m68knommu/platform/54xx/config.c * * Copyright (C) 2010, Philippe De Muyter <phdm@macqel.be> */ @@ -15,13 +15,13 @@ #include <linux/io.h> #include <asm/machdep.h> #include <asm/coldfire.h> -#include <asm/m548xsim.h> +#include <asm/m54xxsim.h> #include <asm/mcfuart.h> -#include <asm/m548xgpt.h> +#include <asm/m54xxgpt.h> /***************************************************************************/ -static struct mcf_platform_uart m548x_uart_platform[] = { +static struct mcf_platform_uart m54xx_uart_platform[] = { { .mapbase = MCF_MBAR + MCFUART_BASE1, .irq = 64 + 35, @@ -40,20 +40,20 @@ static struct mcf_platform_uart m548x_uart_platform[] = { }, }; -static struct platform_device m548x_uart = { +static struct platform_device m54xx_uart = { .name = "mcfuart", .id = 0, - .dev.platform_data = m548x_uart_platform, + .dev.platform_data = m54xx_uart_platform, }; -static struct platform_device *m548x_devices[] __initdata = { - &m548x_uart, +static struct platform_device *m54xx_devices[] __initdata = { + &m54xx_uart, }; /***************************************************************************/ -static void __init m548x_uart_init_line(int line, int irq) +static void __init m54xx_uart_init_line(int line, int irq) { int rts_cts; @@ -72,18 +72,18 @@ static void __init m548x_uart_init_line(int line, int irq) MCF_MBAR + MCF_PAR_PSC(line)); } -static void __init m548x_uarts_init(void) +static void __init m54xx_uarts_init(void) { - const int nrlines = ARRAY_SIZE(m548x_uart_platform); + const int nrlines = ARRAY_SIZE(m54xx_uart_platform); int line; for (line = 0; (line < nrlines); line++) - m548x_uart_init_line(line, m548x_uart_platform[line].irq); + m54xx_uart_init_line(line, m54xx_uart_platform[line].irq); } /***************************************************************************/ -static void mcf548x_reset(void) +static void mcf54xx_reset(void) { /* disable interrupts and enable the watchdog */ asm("movew #0x2700, %sr\n"); @@ -97,8 +97,8 @@ static void mcf548x_reset(void) void __init config_BSP(char *commandp, int size) { - mach_reset = mcf548x_reset; - m548x_uarts_init(); + mach_reset = mcf54xx_reset; + m54xx_uarts_init(); } /***************************************************************************/ @@ -106,7 +106,7 @@ void __init config_BSP(char *commandp, int size) static int __init init_BSP(void) { - platform_add_devices(m548x_devices, ARRAY_SIZE(m548x_devices)); + platform_add_devices(m54xx_devices, ARRAY_SIZE(m54xx_devices)); return 0; } diff --git a/arch/m68knommu/platform/68328/ints.c b/arch/m68knommu/platform/68328/ints.c index 8658528..2a3af19 100644 --- a/arch/m68knommu/platform/68328/ints.c +++ b/arch/m68knommu/platform/68328/ints.c @@ -179,8 +179,8 @@ void __init init_IRQ(void) IMR = ~0; for (i = 0; (i < NR_IRQS); i++) { - set_irq_chip(irq, &intc_irq_chip); - set_irq_handler(irq, handle_level_irq); + set_irq_chip(i, &intc_irq_chip); + set_irq_handler(i, handle_level_irq); } } diff --git a/arch/m68knommu/platform/coldfire/Makefile b/arch/m68knommu/platform/coldfire/Makefile index 45f501f..a8967ba 100644 --- a/arch/m68knommu/platform/coldfire/Makefile +++ b/arch/m68knommu/platform/coldfire/Makefile @@ -14,7 +14,7 @@ asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1 -obj-$(CONFIG_COLDFIRE) += clk.o dma.o entry.o vectors.o +obj-$(CONFIG_COLDFIRE) += cache.o clk.o dma.o entry.o vectors.o obj-$(CONFIG_M5206) += timers.o intc.o obj-$(CONFIG_M5206e) += timers.o intc.o obj-$(CONFIG_M520x) += pit.o intc-simr.o @@ -26,7 +26,7 @@ obj-$(CONFIG_M528x) += pit.o intc-2.o obj-$(CONFIG_M5307) += timers.o intc.o obj-$(CONFIG_M532x) += timers.o intc-simr.o obj-$(CONFIG_M5407) += timers.o intc.o -obj-$(CONFIG_M548x) += sltimers.o intc-2.o +obj-$(CONFIG_M54xx) += sltimers.o intc-2.o obj-y += pinmux.o gpio.o extra-y := head.o diff --git a/arch/m68knommu/platform/coldfire/cache.c b/arch/m68knommu/platform/coldfire/cache.c new file mode 100644 index 0000000..235d3c4 --- /dev/null +++ b/arch/m68knommu/platform/coldfire/cache.c @@ -0,0 +1,48 @@ +/***************************************************************************/ + +/* + * cache.c -- general ColdFire Cache maintainence code + * + * Copyright (C) 2010, Greg Ungerer (gerg@snapgear.com) + */ + +/***************************************************************************/ + +#include <linux/kernel.h> +#include <asm/coldfire.h> +#include <asm/mcfsim.h> + +/***************************************************************************/ +#ifdef CACHE_PUSH +/***************************************************************************/ + +/* + * Use cpushl to push all dirty cache lines back to memory. + * Older versions of GAS don't seem to know how to generate the + * ColdFire cpushl instruction... Oh well, bit stuff it for now. + */ + +void mcf_cache_push(void) +{ + __asm__ __volatile__ ( + "clrl %%d0\n\t" + "1:\n\t" + "movel %%d0,%%a0\n\t" + "2:\n\t" + ".word 0xf468\n\t" + "addl %0,%%a0\n\t" + "cmpl %1,%%a0\n\t" + "blt 2b\n\t" + "addql #1,%%d0\n\t" + "cmpil %2,%%d0\n\t" + "bne 1b\n\t" + : /* No output */ + : "i" (CACHE_LINE_SIZE), + "i" (DCACHE_SIZE / CACHE_WAYS), + "i" (CACHE_WAYS) + : "d0", "a0" ); +} + +/***************************************************************************/ +#endif /* CACHE_PUSH */ +/***************************************************************************/ diff --git a/arch/m68knommu/platform/coldfire/entry.S b/arch/m68knommu/platform/coldfire/entry.S index e1debc8..4ddfc3da 100644 --- a/arch/m68knommu/platform/coldfire/entry.S +++ b/arch/m68knommu/platform/coldfire/entry.S @@ -36,13 +36,16 @@ #include <asm/asm-offsets.h> #include <asm/entry.h> +#ifdef CONFIG_COLDFIRE_SW_A7 +/* + * Define software copies of the supervisor and user stack pointers. + */ .bss - sw_ksp: .long 0 - sw_usp: .long 0 +#endif /* CONFIG_COLDFIRE_SW_A7 */ .text @@ -51,7 +54,6 @@ sw_usp: .globl ret_from_exception .globl ret_from_signal .globl sys_call_table -.globl ret_from_interrupt .globl inthandler .globl fasthandler @@ -140,20 +142,7 @@ Luser_return: jne Lwork_to_do /* still work to do */ Lreturn: - move #0x2700,%sr /* disable intrs */ - movel sw_usp,%a0 /* get usp */ - movel %sp@(PT_OFF_PC),%a0@- /* copy exception program counter */ - movel %sp@(PT_OFF_FORMATVEC),%a0@- /* copy exception format/vector/sr */ - moveml %sp@,%d1-%d5/%a0-%a2 - lea %sp@(32),%sp /* space for 8 regs */ - movel %sp@+,%d0 - addql #4,%sp /* orig d0 */ - addl %sp@+,%sp /* stk adj */ - addql #8,%sp /* remove exception */ - movel %sp,sw_ksp /* save ksp */ - subql #8,sw_usp /* set exception */ - movel sw_usp,%sp /* restore usp */ - rte + RESTORE_USER Lwork_to_do: movel %a0@(TI_FLAGS),%d1 /* get thread_info->flags */ @@ -191,31 +180,7 @@ ENTRY(inthandler) jbsr do_IRQ /* call high level irq handler */ lea %sp@(8),%sp /* pop args off stack */ - bra ret_from_interrupt /* this was fallthrough */ - -/* - * This is the fast interrupt handler (for certain hardware interrupt - * sources). Unlike the normal interrupt handler it just uses the - * current stack (doesn't care if it is user or kernel). It also - * doesn't bother doing the bottom half handlers. - */ -ENTRY(fasthandler) - SAVE_LOCAL - - movew %sp@(PT_OFF_FORMATVEC),%d0 - andl #0x03fc,%d0 /* mask out vector only */ - - movel %sp,%sp@- /* push regs arg */ - lsrl #2,%d0 /* calculate real vector # */ - movel %d0,%sp@- /* push vector number */ - jbsr do_IRQ /* call high level irq handler */ - lea %sp@(8),%sp /* pop args off stack */ - - RESTORE_LOCAL - -ENTRY(ret_from_interrupt) - /* the fasthandler is confusing me, haven't seen any user */ - jmp ret_from_exception + bra ret_from_exception /* * Beware - when entering resume, prev (the current task) is @@ -226,9 +191,8 @@ ENTRY(ret_from_interrupt) */ ENTRY(resume) movel %a0, %d1 /* get prev thread in d1 */ - - movel sw_usp,%d0 /* save usp */ - movel %d0,%a0@(TASK_THREAD+THREAD_USP) + RDUSP + movel %a2,%a0@(TASK_THREAD+THREAD_USP) SAVE_SWITCH_STACK movel %sp,%a0@(TASK_THREAD+THREAD_KSP) /* save kernel stack pointer */ @@ -236,5 +200,5 @@ ENTRY(resume) RESTORE_SWITCH_STACK movel %a1@(TASK_THREAD+THREAD_USP),%a0 /* restore thread user stack */ - movel %a0, sw_usp + WRUSP rts diff --git a/arch/m68knommu/platform/coldfire/head.S b/arch/m68knommu/platform/coldfire/head.S index 0b2d7c7..d597790 100644 --- a/arch/m68knommu/platform/coldfire/head.S +++ b/arch/m68knommu/platform/coldfire/head.S @@ -3,7 +3,7 @@ /* * head.S -- common startup code for ColdFire CPUs. * - * (C) Copyright 1999-2006, Greg Ungerer <gerg@snapgear.com>. + * (C) Copyright 1999-2010, Greg Ungerer <gerg@snapgear.com>. */ /*****************************************************************************/ @@ -13,7 +13,6 @@ #include <linux/init.h> #include <asm/asm-offsets.h> #include <asm/coldfire.h> -#include <asm/mcfcache.h> #include <asm/mcfsim.h> #include <asm/thread_info.h> @@ -173,10 +172,27 @@ _start: /* * Now that we know what the memory is, lets enable cache - * and get things moving. This is Coldfire CPU specific. + * and get things moving. This is Coldfire CPU specific. Not + * all version cores have identical cache register setup. But + * it is very similar. Define the exact settings in the headers + * then the code here is the same for all. */ - CACHE_ENABLE /* enable CPU cache */ - + movel #CACHE_INIT,%d0 /* invalidate whole cache */ + movec %d0,%CACR + nop + movel #ACR0_MODE,%d0 /* set RAM region for caching */ + movec %d0,%ACR0 + movel #ACR1_MODE,%d0 /* anything else to cache? */ + movec %d0,%ACR1 +#ifdef ACR2_MODE + movel #ACR2_MODE,%d0 + movec %d0,%ACR2 + movel #ACR3_MODE,%d0 + movec %d0,%ACR3 +#endif + movel #CACHE_MODE,%d0 /* enable cache */ + movec %d0,%CACR + nop #ifdef CONFIG_ROMFS_FS /* diff --git a/arch/microblaze/include/asm/pgtable.h b/arch/microblaze/include/asm/pgtable.h index cae268c2..b23f680 100644 --- a/arch/microblaze/include/asm/pgtable.h +++ b/arch/microblaze/include/asm/pgtable.h @@ -444,8 +444,9 @@ static inline void set_pte_at(struct mm_struct *mm, unsigned long addr, *ptep = pte; } -static inline int ptep_test_and_clear_young(struct mm_struct *mm, - unsigned long addr, pte_t *ptep) +#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG +static inline int ptep_test_and_clear_young(struct vm_area_struct *vma, + unsigned long address, pte_t *ptep) { return (pte_update(ptep, _PAGE_ACCESSED, 0) & _PAGE_ACCESSED) != 0; } @@ -457,6 +458,7 @@ static inline int ptep_test_and_clear_dirty(struct mm_struct *mm, (_PAGE_DIRTY | _PAGE_HWWRITE), 0) & _PAGE_DIRTY) != 0; } +#define __HAVE_ARCH_PTEP_GET_AND_CLEAR static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep) { diff --git a/arch/microblaze/include/asm/tlb.h b/arch/microblaze/include/asm/tlb.h index e8abd4a..8aa9781 100644 --- a/arch/microblaze/include/asm/tlb.h +++ b/arch/microblaze/include/asm/tlb.h @@ -13,6 +13,7 @@ #define tlb_flush(tlb) flush_tlb_mm((tlb)->mm) +#include <linux/pagemap.h> #include <asm-generic/tlb.h> #ifdef CONFIG_MMU diff --git a/arch/microblaze/kernel/prom.c b/arch/microblaze/kernel/prom.c index c881393..bceaa55 100644 --- a/arch/microblaze/kernel/prom.c +++ b/arch/microblaze/kernel/prom.c @@ -47,9 +47,9 @@ void __init early_init_dt_add_memory_arch(u64 base, u64 size) memblock_add(base, size); } -u64 __init early_init_dt_alloc_memory_arch(u64 size, u64 align) +void * __init early_init_dt_alloc_memory_arch(u64 size, u64 align) { - return memblock_alloc(size, align); + return __va(memblock_alloc(size, align)); } #ifdef CONFIG_EARLY_PRINTK diff --git a/arch/mips/kernel/prom.c b/arch/mips/kernel/prom.c index 9dbe583..a19811e9 100644 --- a/arch/mips/kernel/prom.c +++ b/arch/mips/kernel/prom.c @@ -45,11 +45,9 @@ void __init free_mem_mach(unsigned long addr, unsigned long size) return free_bootmem(addr, size); } -u64 __init early_init_dt_alloc_memory_arch(u64 size, u64 align) +void * __init early_init_dt_alloc_memory_arch(u64 size, u64 align) { - return virt_to_phys( - __alloc_bootmem(size, align, __pa(MAX_DMA_ADDRESS)) - ); + return __alloc_bootmem(size, align, __pa(MAX_DMA_ADDRESS)); } #ifdef CONFIG_BLK_DEV_INITRD diff --git a/arch/powerpc/kernel/perf_event.c b/arch/powerpc/kernel/perf_event.c index 5674807..ab6f6be 100644 --- a/arch/powerpc/kernel/perf_event.c +++ b/arch/powerpc/kernel/perf_event.c @@ -1212,6 +1212,7 @@ static void record_and_restart(struct perf_event *event, unsigned long val, if (left <= 0) left = period; record = 1; + event->hw.last_period = event->hw.sample_period; } if (left < 0x80000000LL) val = 0x80000000LL - left; diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c index 9e3132d..7185f0d 100644 --- a/arch/powerpc/kernel/prom.c +++ b/arch/powerpc/kernel/prom.c @@ -519,9 +519,9 @@ void __init early_init_dt_add_memory_arch(u64 base, u64 size) memblock_add(base, size); } -u64 __init early_init_dt_alloc_memory_arch(u64 size, u64 align) +void * __init early_init_dt_alloc_memory_arch(u64 size, u64 align) { - return memblock_alloc(size, align); + return __va(memblock_alloc(size, align)); } #ifdef CONFIG_BLK_DEV_INITRD diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 47ae4a7..3ed5ad9 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -2068,6 +2068,7 @@ config OLPC bool "One Laptop Per Child support" select GPIOLIB select OLPC_OPENFIRMWARE + depends on !X86_64 && !X86_PAE ---help--- Add support for detecting the unique features of the OLPC XO hardware. diff --git a/arch/x86/kernel/apb_timer.c b/arch/x86/kernel/apb_timer.c index 7c9ab59..51ef31a 100644 --- a/arch/x86/kernel/apb_timer.c +++ b/arch/x86/kernel/apb_timer.c @@ -313,14 +313,16 @@ static void apbt_setup_irq(struct apbt_dev *adev) if (adev->irq == 0) return; + irq_modify_status(adev->irq, 0, IRQ_MOVE_PCNTXT); + irq_set_affinity(adev->irq, cpumask_of(adev->cpu)); + /* APB timer irqs are set up as mp_irqs, timer is edge type */ + __set_irq_handler(adev->irq, handle_edge_irq, 0, "edge"); + if (system_state == SYSTEM_BOOTING) { - irq_modify_status(adev->irq, 0, IRQ_MOVE_PCNTXT); - irq_set_affinity(adev->irq, cpumask_of(adev->cpu)); - /* APB timer irqs are set up as mp_irqs, timer is edge type */ - __set_irq_handler(adev->irq, handle_edge_irq, 0, "edge"); if (request_irq(adev->irq, apbt_interrupt_handler, - IRQF_TIMER | IRQF_DISABLED | IRQF_NOBALANCING, - adev->name, adev)) { + IRQF_TIMER | IRQF_DISABLED | + IRQF_NOBALANCING, + adev->name, adev)) { printk(KERN_ERR "Failed request IRQ for APBT%d\n", adev->num); } diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c index 823f79a..ffe5755 100644 --- a/arch/x86/kernel/tsc.c +++ b/arch/x86/kernel/tsc.c @@ -464,7 +464,7 @@ unsigned long native_calibrate_tsc(void) tsc_pit_min = min(tsc_pit_min, tsc_pit_khz); /* hpet or pmtimer available ? */ - if (!hpet && !ref1 && !ref2) + if (ref1 == ref2) continue; /* Check, whether the sampling was disturbed by an SMI */ @@ -935,7 +935,7 @@ static void tsc_refine_calibration_work(struct work_struct *work) tsc_stop = tsc_read_refs(&ref_stop, hpet); /* hpet or pmtimer available ? */ - if (!hpet && !ref_start && !ref_stop) + if (ref_start == ref_stop) goto out; /* Check, whether the sampling was disturbed by an SMI */ diff --git a/drivers/acpi/apei/hest.c b/drivers/acpi/apei/hest.c index 4ee58e7..abda378 100644 --- a/drivers/acpi/apei/hest.c +++ b/drivers/acpi/apei/hest.c @@ -201,14 +201,14 @@ void __init acpi_hest_init(void) int rc = -ENODEV; unsigned int ghes_count = 0; - if (acpi_disabled) - return; - if (hest_disable) { pr_info(HEST_PFX "Table parsing disabled.\n"); return; } + if (acpi_disabled) + goto err; + status = acpi_get_table(ACPI_SIG_HEST, 0, (struct acpi_table_header **)&hest_tab); if (status == AE_NOT_FOUND) { diff --git a/drivers/acpi/numa.c b/drivers/acpi/numa.c index d9926af..5eb25eb 100644 --- a/drivers/acpi/numa.c +++ b/drivers/acpi/numa.c @@ -275,23 +275,19 @@ acpi_table_parse_srat(enum acpi_srat_type id, int __init acpi_numa_init(void) { int ret = 0; - int nr_cpu_entries = nr_cpu_ids; -#ifdef CONFIG_X86 /* * Should not limit number with cpu num that is from NR_CPUS or nr_cpus= * SRAT cpu entries could have different order with that in MADT. * So go over all cpu entries in SRAT to get apicid to node mapping. */ - nr_cpu_entries = MAX_LOCAL_APIC; -#endif /* SRAT: Static Resource Affinity Table */ if (!acpi_table_parse(ACPI_SIG_SRAT, acpi_parse_srat)) { acpi_table_parse_srat(ACPI_SRAT_TYPE_X2APIC_CPU_AFFINITY, - acpi_parse_x2apic_affinity, nr_cpu_entries); + acpi_parse_x2apic_affinity, 0); acpi_table_parse_srat(ACPI_SRAT_TYPE_CPU_AFFINITY, - acpi_parse_processor_affinity, nr_cpu_entries); + acpi_parse_processor_affinity, 0); ret = acpi_table_parse_srat(ACPI_SRAT_TYPE_MEMORY_AFFINITY, acpi_parse_memory_affinity, NR_NODE_MEMBLKS); diff --git a/drivers/acpi/pci_root.c b/drivers/acpi/pci_root.c index d976679..8524939 100644 --- a/drivers/acpi/pci_root.c +++ b/drivers/acpi/pci_root.c @@ -633,11 +633,11 @@ static int acpi_pci_root_remove(struct acpi_device *device, int type) static int __init acpi_pci_root_init(void) { + acpi_hest_init(); + if (acpi_pci_disabled) return 0; - acpi_hest_init(); - pci_acpi_crs_quirks(); if (acpi_bus_register_driver(&acpi_pci_root_driver) < 0) return -ENODEV; diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig index ef13873..1c28816 100644 --- a/drivers/dma/Kconfig +++ b/drivers/dma/Kconfig @@ -200,11 +200,16 @@ config PL330_DMA platform_data for a dma-pl330 device. config PCH_DMA - tristate "Topcliff (Intel EG20T) PCH DMA support" + tristate "Intel EG20T PCH / OKI SEMICONDUCTOR ML7213 IOH DMA support" depends on PCI && X86 select DMA_ENGINE help - Enable support for the Topcliff (Intel EG20T) PCH DMA engine. + Enable support for Intel EG20T PCH DMA engine. + + This driver also can be used for OKI SEMICONDUCTOR ML7213 IOH(Input/ + Output Hub) which is for IVI(In-Vehicle Infotainment) use. + ML7213 is companion chip for Intel Atom E6xx series. + ML7213 is completely compatible for Intel EG20T PCH. config IMX_SDMA tristate "i.MX SDMA support" diff --git a/drivers/dma/amba-pl08x.c b/drivers/dma/amba-pl08x.c index b605cc9..297f48b 100644 --- a/drivers/dma/amba-pl08x.c +++ b/drivers/dma/amba-pl08x.c @@ -19,14 +19,14 @@ * this program; if not, write to the Free Software Foundation, Inc., 59 * Temple Place - Suite 330, Boston, MA 02111-1307, USA. * - * The full GNU General Public License is iin this distribution in the - * file called COPYING. + * The full GNU General Public License is in this distribution in the file + * called COPYING. * * Documentation: ARM DDI 0196G == PL080 - * Documentation: ARM DDI 0218E == PL081 + * Documentation: ARM DDI 0218E == PL081 * - * PL080 & PL081 both have 16 sets of DMA signals that can be routed to - * any channel. + * PL080 & PL081 both have 16 sets of DMA signals that can be routed to any + * channel. * * The PL080 has 8 channels available for simultaneous use, and the PL081 * has only two channels. So on these DMA controllers the number of channels @@ -53,7 +53,23 @@ * * ASSUMES default (little) endianness for DMA transfers * - * Only DMAC flow control is implemented + * The PL08x has two flow control settings: + * - DMAC flow control: the transfer size defines the number of transfers + * which occur for the current LLI entry, and the DMAC raises TC at the + * end of every LLI entry. Observed behaviour shows the DMAC listening + * to both the BREQ and SREQ signals (contrary to documented), + * transferring data if either is active. The LBREQ and LSREQ signals + * are ignored. + * + * - Peripheral flow control: the transfer size is ignored (and should be + * zero). The data is transferred from the current LLI entry, until + * after the final transfer signalled by LBREQ or LSREQ. The DMAC + * will then move to the next LLI entry. + * + * Only the former works sanely with scatter lists, so we only implement + * the DMAC flow control method. However, peripherals which use the LBREQ + * and LSREQ signals (eg, MMCI) are unable to use this mode, which through + * these hardware restrictions prevents them from using scatter DMA. * * Global TODO: * - Break out common code from arch/arm/mach-s3c64xx and share @@ -61,50 +77,39 @@ #include <linux/device.h> #include <linux/init.h> #include <linux/module.h> -#include <linux/pci.h> #include <linux/interrupt.h> #include <linux/slab.h> #include <linux/dmapool.h> -#include <linux/amba/bus.h> #include <linux/dmaengine.h> +#include <linux/amba/bus.h> #include <linux/amba/pl08x.h> #include <linux/debugfs.h> #include <linux/seq_file.h> #include <asm/hardware/pl080.h> -#include <asm/dma.h> -#include <asm/mach/dma.h> -#include <asm/atomic.h> -#include <asm/processor.h> -#include <asm/cacheflush.h> #define DRIVER_NAME "pl08xdmac" /** - * struct vendor_data - vendor-specific config parameters - * for PL08x derivates - * @name: the name of this specific variant + * struct vendor_data - vendor-specific config parameters for PL08x derivatives * @channels: the number of channels available in this variant - * @dualmaster: whether this version supports dual AHB masters - * or not. + * @dualmaster: whether this version supports dual AHB masters or not. */ struct vendor_data { - char *name; u8 channels; bool dualmaster; }; /* * PL08X private data structures - * An LLI struct - see pl08x TRM - * Note that next uses bit[0] as a bus bit, - * start & end do not - their bus bit info - * is in cctl + * An LLI struct - see PL08x TRM. Note that next uses bit[0] as a bus bit, + * start & end do not - their bus bit info is in cctl. Also note that these + * are fixed 32-bit quantities. */ -struct lli { - dma_addr_t src; - dma_addr_t dst; - dma_addr_t next; +struct pl08x_lli { + u32 src; + u32 dst; + u32 lli; u32 cctl; }; @@ -119,6 +124,8 @@ struct lli { * @phy_chans: array of data for the physical channels * @pool: a pool for the LLI descriptors * @pool_ctr: counter of LLIs in the pool + * @lli_buses: bitmask to or in to LLI pointer selecting AHB port for LLI fetches + * @mem_buses: set to indicate memory transfers on AHB2. * @lock: a spinlock for this struct */ struct pl08x_driver_data { @@ -126,11 +133,13 @@ struct pl08x_driver_data { struct dma_device memcpy; void __iomem *base; struct amba_device *adev; - struct vendor_data *vd; + const struct vendor_data *vd; struct pl08x_platform_data *pd; struct pl08x_phy_chan *phy_chans; struct dma_pool *pool; int pool_ctr; + u8 lli_buses; + u8 mem_buses; spinlock_t lock; }; @@ -152,9 +161,9 @@ struct pl08x_driver_data { /* Size (bytes) of each LLI buffer allocated for one transfer */ # define PL08X_LLI_TSFR_SIZE 0x2000 -/* Maximimum times we call dma_pool_alloc on this pool without freeing */ +/* Maximum times we call dma_pool_alloc on this pool without freeing */ #define PL08X_MAX_ALLOCS 0x40 -#define MAX_NUM_TSFR_LLIS (PL08X_LLI_TSFR_SIZE/sizeof(struct lli)) +#define MAX_NUM_TSFR_LLIS (PL08X_LLI_TSFR_SIZE/sizeof(struct pl08x_lli)) #define PL08X_ALIGN 8 static inline struct pl08x_dma_chan *to_pl08x_chan(struct dma_chan *chan) @@ -162,6 +171,11 @@ static inline struct pl08x_dma_chan *to_pl08x_chan(struct dma_chan *chan) return container_of(chan, struct pl08x_dma_chan, chan); } +static inline struct pl08x_txd *to_pl08x_txd(struct dma_async_tx_descriptor *tx) +{ + return container_of(tx, struct pl08x_txd, tx); +} + /* * Physical channel handling */ @@ -177,88 +191,47 @@ static int pl08x_phy_channel_busy(struct pl08x_phy_chan *ch) /* * Set the initial DMA register values i.e. those for the first LLI - * The next lli pointer and the configuration interrupt bit have - * been set when the LLIs were constructed + * The next LLI pointer and the configuration interrupt bit have + * been set when the LLIs were constructed. Poke them into the hardware + * and start the transfer. */ -static void pl08x_set_cregs(struct pl08x_driver_data *pl08x, - struct pl08x_phy_chan *ch) -{ - /* Wait for channel inactive */ - while (pl08x_phy_channel_busy(ch)) - ; - - dev_vdbg(&pl08x->adev->dev, - "WRITE channel %d: csrc=%08x, cdst=%08x, " - "cctl=%08x, clli=%08x, ccfg=%08x\n", - ch->id, - ch->csrc, - ch->cdst, - ch->cctl, - ch->clli, - ch->ccfg); - - writel(ch->csrc, ch->base + PL080_CH_SRC_ADDR); - writel(ch->cdst, ch->base + PL080_CH_DST_ADDR); - writel(ch->clli, ch->base + PL080_CH_LLI); - writel(ch->cctl, ch->base + PL080_CH_CONTROL); - writel(ch->ccfg, ch->base + PL080_CH_CONFIG); -} - -static inline void pl08x_config_phychan_for_txd(struct pl08x_dma_chan *plchan) +static void pl08x_start_txd(struct pl08x_dma_chan *plchan, + struct pl08x_txd *txd) { - struct pl08x_channel_data *cd = plchan->cd; + struct pl08x_driver_data *pl08x = plchan->host; struct pl08x_phy_chan *phychan = plchan->phychan; - struct pl08x_txd *txd = plchan->at; - - /* Copy the basic control register calculated at transfer config */ - phychan->csrc = txd->csrc; - phychan->cdst = txd->cdst; - phychan->clli = txd->clli; - phychan->cctl = txd->cctl; - - /* Assign the signal to the proper control registers */ - phychan->ccfg = cd->ccfg; - phychan->ccfg &= ~PL080_CONFIG_SRC_SEL_MASK; - phychan->ccfg &= ~PL080_CONFIG_DST_SEL_MASK; - /* If it wasn't set from AMBA, ignore it */ - if (txd->direction == DMA_TO_DEVICE) - /* Select signal as destination */ - phychan->ccfg |= - (phychan->signal << PL080_CONFIG_DST_SEL_SHIFT); - else if (txd->direction == DMA_FROM_DEVICE) - /* Select signal as source */ - phychan->ccfg |= - (phychan->signal << PL080_CONFIG_SRC_SEL_SHIFT); - /* Always enable error interrupts */ - phychan->ccfg |= PL080_CONFIG_ERR_IRQ_MASK; - /* Always enable terminal interrupts */ - phychan->ccfg |= PL080_CONFIG_TC_IRQ_MASK; -} - -/* - * Enable the DMA channel - * Assumes all other configuration bits have been set - * as desired before this code is called - */ -static void pl08x_enable_phy_chan(struct pl08x_driver_data *pl08x, - struct pl08x_phy_chan *ch) -{ + struct pl08x_lli *lli = &txd->llis_va[0]; u32 val; - /* - * Do not access config register until channel shows as disabled - */ - while (readl(pl08x->base + PL080_EN_CHAN) & (1 << ch->id)) - ; + plchan->at = txd; - /* - * Do not access config register until channel shows as inactive - */ - val = readl(ch->base + PL080_CH_CONFIG); + /* Wait for channel inactive */ + while (pl08x_phy_channel_busy(phychan)) + cpu_relax(); + + dev_vdbg(&pl08x->adev->dev, + "WRITE channel %d: csrc=0x%08x, cdst=0x%08x, " + "clli=0x%08x, cctl=0x%08x, ccfg=0x%08x\n", + phychan->id, lli->src, lli->dst, lli->lli, lli->cctl, + txd->ccfg); + + writel(lli->src, phychan->base + PL080_CH_SRC_ADDR); + writel(lli->dst, phychan->base + PL080_CH_DST_ADDR); + writel(lli->lli, phychan->base + PL080_CH_LLI); + writel(lli->cctl, phychan->base + PL080_CH_CONTROL); + writel(txd->ccfg, phychan->base + PL080_CH_CONFIG); + + /* Enable the DMA channel */ + /* Do not access config register until channel shows as disabled */ + while (readl(pl08x->base + PL080_EN_CHAN) & (1 << phychan->id)) + cpu_relax(); + + /* Do not access config register until channel shows as inactive */ + val = readl(phychan->base + PL080_CH_CONFIG); while ((val & PL080_CONFIG_ACTIVE) || (val & PL080_CONFIG_ENABLE)) - val = readl(ch->base + PL080_CH_CONFIG); + val = readl(phychan->base + PL080_CH_CONFIG); - writel(val | PL080_CONFIG_ENABLE, ch->base + PL080_CH_CONFIG); + writel(val | PL080_CONFIG_ENABLE, phychan->base + PL080_CH_CONFIG); } /* @@ -266,10 +239,8 @@ static void pl08x_enable_phy_chan(struct pl08x_driver_data *pl08x, * * Disabling individual channels could lose data. * - * Disable the peripheral DMA after disabling the DMAC - * in order to allow the DMAC FIFO to drain, and - * hence allow the channel to show inactive - * + * Disable the peripheral DMA after disabling the DMAC in order to allow + * the DMAC FIFO to drain, and hence allow the channel to show inactive */ static void pl08x_pause_phy_chan(struct pl08x_phy_chan *ch) { @@ -282,7 +253,7 @@ static void pl08x_pause_phy_chan(struct pl08x_phy_chan *ch) /* Wait for channel inactive */ while (pl08x_phy_channel_busy(ch)) - ; + cpu_relax(); } static void pl08x_resume_phy_chan(struct pl08x_phy_chan *ch) @@ -333,54 +304,56 @@ static inline u32 get_bytes_in_cctl(u32 cctl) static u32 pl08x_getbytes_chan(struct pl08x_dma_chan *plchan) { struct pl08x_phy_chan *ch; - struct pl08x_txd *txdi = NULL; struct pl08x_txd *txd; unsigned long flags; - u32 bytes = 0; + size_t bytes = 0; spin_lock_irqsave(&plchan->lock, flags); - ch = plchan->phychan; txd = plchan->at; /* - * Next follow the LLIs to get the number of pending bytes in the - * currently active transaction. + * Follow the LLIs to get the number of remaining + * bytes in the currently active transaction. */ if (ch && txd) { - struct lli *llis_va = txd->llis_va; - struct lli *llis_bus = (struct lli *) txd->llis_bus; - u32 clli = readl(ch->base + PL080_CH_LLI); + u32 clli = readl(ch->base + PL080_CH_LLI) & ~PL080_LLI_LM_AHB2; - /* First get the bytes in the current active LLI */ + /* First get the remaining bytes in the active transfer */ bytes = get_bytes_in_cctl(readl(ch->base + PL080_CH_CONTROL)); if (clli) { - int i = 0; + struct pl08x_lli *llis_va = txd->llis_va; + dma_addr_t llis_bus = txd->llis_bus; + int index; + + BUG_ON(clli < llis_bus || clli >= llis_bus + + sizeof(struct pl08x_lli) * MAX_NUM_TSFR_LLIS); + + /* + * Locate the next LLI - as this is an array, + * it's simple maths to find. + */ + index = (clli - llis_bus) / sizeof(struct pl08x_lli); - /* Forward to the LLI pointed to by clli */ - while ((clli != (u32) &(llis_bus[i])) && - (i < MAX_NUM_TSFR_LLIS)) - i++; + for (; index < MAX_NUM_TSFR_LLIS; index++) { + bytes += get_bytes_in_cctl(llis_va[index].cctl); - while (clli) { - bytes += get_bytes_in_cctl(llis_va[i].cctl); /* - * A clli of 0x00000000 will terminate the - * LLI list + * A LLI pointer of 0 terminates the LLI list */ - clli = llis_va[i].next; - i++; + if (!llis_va[index].lli) + break; } } } /* Sum up all queued transactions */ - if (!list_empty(&plchan->desc_list)) { - list_for_each_entry(txdi, &plchan->desc_list, node) { + if (!list_empty(&plchan->pend_list)) { + struct pl08x_txd *txdi; + list_for_each_entry(txdi, &plchan->pend_list, node) { bytes += txdi->len; } - } spin_unlock_irqrestore(&plchan->lock, flags); @@ -390,6 +363,10 @@ static u32 pl08x_getbytes_chan(struct pl08x_dma_chan *plchan) /* * Allocate a physical channel for a virtual channel + * + * Try to locate a physical channel to be used for this transfer. If all + * are taken return NULL and the requester will have to cope by using + * some fallback PIO mode or retrying later. */ static struct pl08x_phy_chan * pl08x_get_phy_channel(struct pl08x_driver_data *pl08x, @@ -399,12 +376,6 @@ pl08x_get_phy_channel(struct pl08x_driver_data *pl08x, unsigned long flags; int i; - /* - * Try to locate a physical channel to be used for - * this transfer. If all are taken return NULL and - * the requester will have to cope by using some fallback - * PIO mode or retrying later. - */ for (i = 0; i < pl08x->vd->channels; i++) { ch = &pl08x->phy_chans[i]; @@ -465,11 +436,11 @@ static inline unsigned int pl08x_get_bytes_for_cctl(unsigned int coded) } static inline u32 pl08x_cctl_bits(u32 cctl, u8 srcwidth, u8 dstwidth, - u32 tsize) + size_t tsize) { u32 retbits = cctl; - /* Remove all src, dst and transfersize bits */ + /* Remove all src, dst and transfer size bits */ retbits &= ~PL080_CONTROL_DWIDTH_MASK; retbits &= ~PL080_CONTROL_SWIDTH_MASK; retbits &= ~PL080_CONTROL_TRANSFER_SIZE_MASK; @@ -509,95 +480,87 @@ static inline u32 pl08x_cctl_bits(u32 cctl, u8 srcwidth, u8 dstwidth, return retbits; } +struct pl08x_lli_build_data { + struct pl08x_txd *txd; + struct pl08x_driver_data *pl08x; + struct pl08x_bus_data srcbus; + struct pl08x_bus_data dstbus; + size_t remainder; +}; + /* - * Autoselect a master bus to use for the transfer - * this prefers the destination bus if both available - * if fixed address on one bus the other will be chosen + * Autoselect a master bus to use for the transfer this prefers the + * destination bus if both available if fixed address on one bus the + * other will be chosen */ -void pl08x_choose_master_bus(struct pl08x_bus_data *src_bus, - struct pl08x_bus_data *dst_bus, struct pl08x_bus_data **mbus, - struct pl08x_bus_data **sbus, u32 cctl) +static void pl08x_choose_master_bus(struct pl08x_lli_build_data *bd, + struct pl08x_bus_data **mbus, struct pl08x_bus_data **sbus, u32 cctl) { if (!(cctl & PL080_CONTROL_DST_INCR)) { - *mbus = src_bus; - *sbus = dst_bus; + *mbus = &bd->srcbus; + *sbus = &bd->dstbus; } else if (!(cctl & PL080_CONTROL_SRC_INCR)) { - *mbus = dst_bus; - *sbus = src_bus; + *mbus = &bd->dstbus; + *sbus = &bd->srcbus; } else { - if (dst_bus->buswidth == 4) { - *mbus = dst_bus; - *sbus = src_bus; - } else if (src_bus->buswidth == 4) { - *mbus = src_bus; - *sbus = dst_bus; - } else if (dst_bus->buswidth == 2) { - *mbus = dst_bus; - *sbus = src_bus; - } else if (src_bus->buswidth == 2) { - *mbus = src_bus; - *sbus = dst_bus; + if (bd->dstbus.buswidth == 4) { + *mbus = &bd->dstbus; + *sbus = &bd->srcbus; + } else if (bd->srcbus.buswidth == 4) { + *mbus = &bd->srcbus; + *sbus = &bd->dstbus; + } else if (bd->dstbus.buswidth == 2) { + *mbus = &bd->dstbus; + *sbus = &bd->srcbus; + } else if (bd->srcbus.buswidth == 2) { + *mbus = &bd->srcbus; + *sbus = &bd->dstbus; } else { - /* src_bus->buswidth == 1 */ - *mbus = dst_bus; - *sbus = src_bus; + /* bd->srcbus.buswidth == 1 */ + *mbus = &bd->dstbus; + *sbus = &bd->srcbus; } } } /* - * Fills in one LLI for a certain transfer descriptor - * and advance the counter + * Fills in one LLI for a certain transfer descriptor and advance the counter */ -int pl08x_fill_lli_for_desc(struct pl08x_driver_data *pl08x, - struct pl08x_txd *txd, int num_llis, int len, - u32 cctl, u32 *remainder) +static void pl08x_fill_lli_for_desc(struct pl08x_lli_build_data *bd, + int num_llis, int len, u32 cctl) { - struct lli *llis_va = txd->llis_va; - struct lli *llis_bus = (struct lli *) txd->llis_bus; + struct pl08x_lli *llis_va = bd->txd->llis_va; + dma_addr_t llis_bus = bd->txd->llis_bus; BUG_ON(num_llis >= MAX_NUM_TSFR_LLIS); - llis_va[num_llis].cctl = cctl; - llis_va[num_llis].src = txd->srcbus.addr; - llis_va[num_llis].dst = txd->dstbus.addr; - - /* - * On versions with dual masters, you can optionally AND on - * PL080_LLI_LM_AHB2 to the LLI to tell the hardware to read - * in new LLIs with that controller, but we always try to - * choose AHB1 to point into memory. The idea is to have AHB2 - * fixed on the peripheral and AHB1 messing around in the - * memory. So we don't manipulate this bit currently. - */ - - llis_va[num_llis].next = - (dma_addr_t)((u32) &(llis_bus[num_llis + 1])); + llis_va[num_llis].cctl = cctl; + llis_va[num_llis].src = bd->srcbus.addr; + llis_va[num_llis].dst = bd->dstbus.addr; + llis_va[num_llis].lli = llis_bus + (num_llis + 1) * sizeof(struct pl08x_lli); + if (bd->pl08x->lli_buses & PL08X_AHB2) + llis_va[num_llis].lli |= PL080_LLI_LM_AHB2; if (cctl & PL080_CONTROL_SRC_INCR) - txd->srcbus.addr += len; + bd->srcbus.addr += len; if (cctl & PL080_CONTROL_DST_INCR) - txd->dstbus.addr += len; + bd->dstbus.addr += len; - *remainder -= len; + BUG_ON(bd->remainder < len); - return num_llis + 1; + bd->remainder -= len; } /* - * Return number of bytes to fill to boundary, or len + * Return number of bytes to fill to boundary, or len. + * This calculation works for any value of addr. */ -static inline u32 pl08x_pre_boundary(u32 addr, u32 len) +static inline size_t pl08x_pre_boundary(u32 addr, size_t len) { - u32 boundary; - - boundary = ((addr >> PL08X_BOUNDARY_SHIFT) + 1) - << PL08X_BOUNDARY_SHIFT; + size_t boundary_len = PL08X_BOUNDARY_SIZE - + (addr & (PL08X_BOUNDARY_SIZE - 1)); - if (boundary < addr + len) - return boundary - addr; - else - return len; + return min(boundary_len, len); } /* @@ -608,20 +571,13 @@ static inline u32 pl08x_pre_boundary(u32 addr, u32 len) static int pl08x_fill_llis_for_desc(struct pl08x_driver_data *pl08x, struct pl08x_txd *txd) { - struct pl08x_channel_data *cd = txd->cd; struct pl08x_bus_data *mbus, *sbus; - u32 remainder; + struct pl08x_lli_build_data bd; int num_llis = 0; u32 cctl; - int max_bytes_per_lli; - int total_bytes = 0; - struct lli *llis_va; - struct lli *llis_bus; - - if (!txd) { - dev_err(&pl08x->adev->dev, "%s no descriptor\n", __func__); - return 0; - } + size_t max_bytes_per_lli; + size_t total_bytes = 0; + struct pl08x_lli *llis_va; txd->llis_va = dma_pool_alloc(pl08x->pool, GFP_NOWAIT, &txd->llis_bus); @@ -632,121 +588,79 @@ static int pl08x_fill_llis_for_desc(struct pl08x_driver_data *pl08x, pl08x->pool_ctr++; - /* - * Initialize bus values for this transfer - * from the passed optimal values - */ - if (!cd) { - dev_err(&pl08x->adev->dev, "%s no channel data\n", __func__); - return 0; - } + /* Get the default CCTL */ + cctl = txd->cctl; - /* Get the default CCTL from the platform data */ - cctl = cd->cctl; - - /* - * On the PL080 we have two bus masters and we - * should select one for source and one for - * destination. We try to use AHB2 for the - * bus which does not increment (typically the - * peripheral) else we just choose something. - */ - cctl &= ~(PL080_CONTROL_DST_AHB2 | PL080_CONTROL_SRC_AHB2); - if (pl08x->vd->dualmaster) { - if (cctl & PL080_CONTROL_SRC_INCR) - /* Source increments, use AHB2 for destination */ - cctl |= PL080_CONTROL_DST_AHB2; - else if (cctl & PL080_CONTROL_DST_INCR) - /* Destination increments, use AHB2 for source */ - cctl |= PL080_CONTROL_SRC_AHB2; - else - /* Just pick something, source AHB1 dest AHB2 */ - cctl |= PL080_CONTROL_DST_AHB2; - } + bd.txd = txd; + bd.pl08x = pl08x; + bd.srcbus.addr = txd->src_addr; + bd.dstbus.addr = txd->dst_addr; /* Find maximum width of the source bus */ - txd->srcbus.maxwidth = + bd.srcbus.maxwidth = pl08x_get_bytes_for_cctl((cctl & PL080_CONTROL_SWIDTH_MASK) >> PL080_CONTROL_SWIDTH_SHIFT); /* Find maximum width of the destination bus */ - txd->dstbus.maxwidth = + bd.dstbus.maxwidth = pl08x_get_bytes_for_cctl((cctl & PL080_CONTROL_DWIDTH_MASK) >> PL080_CONTROL_DWIDTH_SHIFT); /* Set up the bus widths to the maximum */ - txd->srcbus.buswidth = txd->srcbus.maxwidth; - txd->dstbus.buswidth = txd->dstbus.maxwidth; + bd.srcbus.buswidth = bd.srcbus.maxwidth; + bd.dstbus.buswidth = bd.dstbus.maxwidth; dev_vdbg(&pl08x->adev->dev, "%s source bus is %d bytes wide, dest bus is %d bytes wide\n", - __func__, txd->srcbus.buswidth, txd->dstbus.buswidth); + __func__, bd.srcbus.buswidth, bd.dstbus.buswidth); /* * Bytes transferred == tsize * MIN(buswidths), not max(buswidths) */ - max_bytes_per_lli = min(txd->srcbus.buswidth, txd->dstbus.buswidth) * + max_bytes_per_lli = min(bd.srcbus.buswidth, bd.dstbus.buswidth) * PL080_CONTROL_TRANSFER_SIZE_MASK; dev_vdbg(&pl08x->adev->dev, - "%s max bytes per lli = %d\n", + "%s max bytes per lli = %zu\n", __func__, max_bytes_per_lli); /* We need to count this down to zero */ - remainder = txd->len; + bd.remainder = txd->len; dev_vdbg(&pl08x->adev->dev, - "%s remainder = %d\n", - __func__, remainder); + "%s remainder = %zu\n", + __func__, bd.remainder); /* * Choose bus to align to * - prefers destination bus if both available * - if fixed address on one bus chooses other - * - modifies cctl to choose an apropriate master - */ - pl08x_choose_master_bus(&txd->srcbus, &txd->dstbus, - &mbus, &sbus, cctl); - - - /* - * The lowest bit of the LLI register - * is also used to indicate which master to - * use for reading the LLIs. */ + pl08x_choose_master_bus(&bd, &mbus, &sbus, cctl); if (txd->len < mbus->buswidth) { - /* - * Less than a bus width available - * - send as single bytes - */ - while (remainder) { + /* Less than a bus width available - send as single bytes */ + while (bd.remainder) { dev_vdbg(&pl08x->adev->dev, "%s single byte LLIs for a transfer of " - "less than a bus width (remain %08x)\n", - __func__, remainder); + "less than a bus width (remain 0x%08x)\n", + __func__, bd.remainder); cctl = pl08x_cctl_bits(cctl, 1, 1, 1); - num_llis = - pl08x_fill_lli_for_desc(pl08x, txd, num_llis, 1, - cctl, &remainder); + pl08x_fill_lli_for_desc(&bd, num_llis++, 1, cctl); total_bytes++; } } else { - /* - * Make one byte LLIs until master bus is aligned - * - slave will then be aligned also - */ + /* Make one byte LLIs until master bus is aligned */ while ((mbus->addr) % (mbus->buswidth)) { dev_vdbg(&pl08x->adev->dev, "%s adjustment lli for less than bus width " - "(remain %08x)\n", - __func__, remainder); + "(remain 0x%08x)\n", + __func__, bd.remainder); cctl = pl08x_cctl_bits(cctl, 1, 1, 1); - num_llis = pl08x_fill_lli_for_desc - (pl08x, txd, num_llis, 1, cctl, &remainder); + pl08x_fill_lli_for_desc(&bd, num_llis++, 1, cctl); total_bytes++; } /* - * Master now aligned + * Master now aligned * - if slave is not then we must set its width down */ if (sbus->addr % sbus->buswidth) { @@ -761,63 +675,51 @@ static int pl08x_fill_llis_for_desc(struct pl08x_driver_data *pl08x, * Make largest possible LLIs until less than one bus * width left */ - while (remainder > (mbus->buswidth - 1)) { - int lli_len, target_len; - int tsize; - int odd_bytes; + while (bd.remainder > (mbus->buswidth - 1)) { + size_t lli_len, target_len, tsize, odd_bytes; /* * If enough left try to send max possible, * otherwise try to send the remainder */ - target_len = remainder; - if (remainder > max_bytes_per_lli) - target_len = max_bytes_per_lli; + target_len = min(bd.remainder, max_bytes_per_lli); /* - * Set bus lengths for incrementing busses - * to number of bytes which fill to next memory - * boundary + * Set bus lengths for incrementing buses to the + * number of bytes which fill to next memory boundary, + * limiting on the target length calculated above. */ if (cctl & PL080_CONTROL_SRC_INCR) - txd->srcbus.fill_bytes = - pl08x_pre_boundary( - txd->srcbus.addr, - remainder); + bd.srcbus.fill_bytes = + pl08x_pre_boundary(bd.srcbus.addr, + target_len); else - txd->srcbus.fill_bytes = - max_bytes_per_lli; + bd.srcbus.fill_bytes = target_len; if (cctl & PL080_CONTROL_DST_INCR) - txd->dstbus.fill_bytes = - pl08x_pre_boundary( - txd->dstbus.addr, - remainder); + bd.dstbus.fill_bytes = + pl08x_pre_boundary(bd.dstbus.addr, + target_len); else - txd->dstbus.fill_bytes = - max_bytes_per_lli; + bd.dstbus.fill_bytes = target_len; - /* - * Find the nearest - */ - lli_len = min(txd->srcbus.fill_bytes, - txd->dstbus.fill_bytes); + /* Find the nearest */ + lli_len = min(bd.srcbus.fill_bytes, + bd.dstbus.fill_bytes); - BUG_ON(lli_len > remainder); + BUG_ON(lli_len > bd.remainder); if (lli_len <= 0) { dev_err(&pl08x->adev->dev, - "%s lli_len is %d, <= 0\n", + "%s lli_len is %zu, <= 0\n", __func__, lli_len); return 0; } if (lli_len == target_len) { /* - * Can send what we wanted - */ - /* - * Maintain alignment + * Can send what we wanted. + * Maintain alignment */ lli_len = (lli_len/mbus->buswidth) * mbus->buswidth; @@ -825,17 +727,14 @@ static int pl08x_fill_llis_for_desc(struct pl08x_driver_data *pl08x, } else { /* * So now we know how many bytes to transfer - * to get to the nearest boundary - * The next lli will past the boundary - * - however we may be working to a boundary - * on the slave bus - * We need to ensure the master stays aligned + * to get to the nearest boundary. The next + * LLI will past the boundary. However, we + * may be working to a boundary on the slave + * bus. We need to ensure the master stays + * aligned, and that we are working in + * multiples of the bus widths. */ odd_bytes = lli_len % mbus->buswidth; - /* - * - and that we are working in multiples - * of the bus widths - */ lli_len -= odd_bytes; } @@ -855,41 +754,38 @@ static int pl08x_fill_llis_for_desc(struct pl08x_driver_data *pl08x, if (target_len != lli_len) { dev_vdbg(&pl08x->adev->dev, - "%s can't send what we want. Desired %08x, lli of %08x bytes in txd of %08x\n", + "%s can't send what we want. Desired 0x%08zx, lli of 0x%08zx bytes in txd of 0x%08zx\n", __func__, target_len, lli_len, txd->len); } cctl = pl08x_cctl_bits(cctl, - txd->srcbus.buswidth, - txd->dstbus.buswidth, + bd.srcbus.buswidth, + bd.dstbus.buswidth, tsize); dev_vdbg(&pl08x->adev->dev, - "%s fill lli with single lli chunk of size %08x (remainder %08x)\n", - __func__, lli_len, remainder); - num_llis = pl08x_fill_lli_for_desc(pl08x, txd, - num_llis, lli_len, cctl, - &remainder); + "%s fill lli with single lli chunk of size 0x%08zx (remainder 0x%08zx)\n", + __func__, lli_len, bd.remainder); + pl08x_fill_lli_for_desc(&bd, num_llis++, + lli_len, cctl); total_bytes += lli_len; } if (odd_bytes) { /* - * Creep past the boundary, - * maintaining master alignment + * Creep past the boundary, maintaining + * master alignment */ int j; for (j = 0; (j < mbus->buswidth) - && (remainder); j++) { + && (bd.remainder); j++) { cctl = pl08x_cctl_bits(cctl, 1, 1, 1); dev_vdbg(&pl08x->adev->dev, - "%s align with boundardy, single byte (remain %08x)\n", - __func__, remainder); - num_llis = - pl08x_fill_lli_for_desc(pl08x, - txd, num_llis, 1, - cctl, &remainder); + "%s align with boundary, single byte (remain 0x%08zx)\n", + __func__, bd.remainder); + pl08x_fill_lli_for_desc(&bd, + num_llis++, 1, cctl); total_bytes++; } } @@ -898,25 +794,18 @@ static int pl08x_fill_llis_for_desc(struct pl08x_driver_data *pl08x, /* * Send any odd bytes */ - if (remainder < 0) { - dev_err(&pl08x->adev->dev, "%s remainder not fitted 0x%08x bytes\n", - __func__, remainder); - return 0; - } - - while (remainder) { + while (bd.remainder) { cctl = pl08x_cctl_bits(cctl, 1, 1, 1); dev_vdbg(&pl08x->adev->dev, - "%s align with boundardy, single odd byte (remain %d)\n", - __func__, remainder); - num_llis = pl08x_fill_lli_for_desc(pl08x, txd, num_llis, - 1, cctl, &remainder); + "%s align with boundary, single odd byte (remain %zu)\n", + __func__, bd.remainder); + pl08x_fill_lli_for_desc(&bd, num_llis++, 1, cctl); total_bytes++; } } if (total_bytes != txd->len) { dev_err(&pl08x->adev->dev, - "%s size of encoded lli:s don't match total txd, transferred 0x%08x from size 0x%08x\n", + "%s size of encoded lli:s don't match total txd, transferred 0x%08zx from size 0x%08zx\n", __func__, total_bytes, txd->len); return 0; } @@ -927,41 +816,12 @@ static int pl08x_fill_llis_for_desc(struct pl08x_driver_data *pl08x, __func__, (u32) MAX_NUM_TSFR_LLIS); return 0; } - /* - * Decide whether this is a loop or a terminated transfer - */ - llis_va = txd->llis_va; - llis_bus = (struct lli *) txd->llis_bus; - if (cd->circular_buffer) { - /* - * Loop the circular buffer so that the next element - * points back to the beginning of the LLI. - */ - llis_va[num_llis - 1].next = - (dma_addr_t)((unsigned int)&(llis_bus[0])); - } else { - /* - * On non-circular buffers, the final LLI terminates - * the LLI. - */ - llis_va[num_llis - 1].next = 0; - /* - * The final LLI element shall also fire an interrupt - */ - llis_va[num_llis - 1].cctl |= PL080_CONTROL_TC_IRQ_EN; - } - - /* Now store the channel register values */ - txd->csrc = llis_va[0].src; - txd->cdst = llis_va[0].dst; - if (num_llis > 1) - txd->clli = llis_va[0].next; - else - txd->clli = 0; - - txd->cctl = llis_va[0].cctl; - /* ccfg will be set at physical channel allocation time */ + llis_va = txd->llis_va; + /* The final LLI terminates the LLI. */ + llis_va[num_llis - 1].lli = 0; + /* The final LLI element shall also fire an interrupt. */ + llis_va[num_llis - 1].cctl |= PL080_CONTROL_TC_IRQ_EN; #ifdef VERBOSE_DEBUG { @@ -969,13 +829,13 @@ static int pl08x_fill_llis_for_desc(struct pl08x_driver_data *pl08x, for (i = 0; i < num_llis; i++) { dev_vdbg(&pl08x->adev->dev, - "lli %d @%p: csrc=%08x, cdst=%08x, cctl=%08x, clli=%08x\n", + "lli %d @%p: csrc=0x%08x, cdst=0x%08x, cctl=0x%08x, clli=0x%08x\n", i, &llis_va[i], llis_va[i].src, llis_va[i].dst, llis_va[i].cctl, - llis_va[i].next + llis_va[i].lli ); } } @@ -988,14 +848,8 @@ static int pl08x_fill_llis_for_desc(struct pl08x_driver_data *pl08x, static void pl08x_free_txd(struct pl08x_driver_data *pl08x, struct pl08x_txd *txd) { - if (!txd) - dev_err(&pl08x->adev->dev, - "%s no descriptor to free\n", - __func__); - /* Free the LLI */ - dma_pool_free(pl08x->pool, txd->llis_va, - txd->llis_bus); + dma_pool_free(pl08x->pool, txd->llis_va, txd->llis_bus); pl08x->pool_ctr--; @@ -1008,13 +862,12 @@ static void pl08x_free_txd_list(struct pl08x_driver_data *pl08x, struct pl08x_txd *txdi = NULL; struct pl08x_txd *next; - if (!list_empty(&plchan->desc_list)) { + if (!list_empty(&plchan->pend_list)) { list_for_each_entry_safe(txdi, - next, &plchan->desc_list, node) { + next, &plchan->pend_list, node) { list_del(&txdi->node); pl08x_free_txd(pl08x, txdi); } - } } @@ -1069,6 +922,12 @@ static int prep_phy_channel(struct pl08x_dma_chan *plchan, return -EBUSY; } ch->signal = ret; + + /* Assign the flow control signal to this channel */ + if (txd->direction == DMA_TO_DEVICE) + txd->ccfg |= ch->signal << PL080_CONFIG_DST_SEL_SHIFT; + else if (txd->direction == DMA_FROM_DEVICE) + txd->ccfg |= ch->signal << PL080_CONFIG_SRC_SEL_SHIFT; } dev_dbg(&pl08x->adev->dev, "allocated physical channel %d and signal %d for xfer on %s\n", @@ -1076,19 +935,54 @@ static int prep_phy_channel(struct pl08x_dma_chan *plchan, ch->signal, plchan->name); + plchan->phychan_hold++; plchan->phychan = ch; return 0; } +static void release_phy_channel(struct pl08x_dma_chan *plchan) +{ + struct pl08x_driver_data *pl08x = plchan->host; + + if ((plchan->phychan->signal >= 0) && pl08x->pd->put_signal) { + pl08x->pd->put_signal(plchan); + plchan->phychan->signal = -1; + } + pl08x_put_phy_channel(pl08x, plchan->phychan); + plchan->phychan = NULL; +} + static dma_cookie_t pl08x_tx_submit(struct dma_async_tx_descriptor *tx) { struct pl08x_dma_chan *plchan = to_pl08x_chan(tx->chan); + struct pl08x_txd *txd = to_pl08x_txd(tx); + unsigned long flags; - atomic_inc(&plchan->last_issued); - tx->cookie = atomic_read(&plchan->last_issued); - /* This unlock follows the lock in the prep() function */ - spin_unlock_irqrestore(&plchan->lock, plchan->lockflags); + spin_lock_irqsave(&plchan->lock, flags); + + plchan->chan.cookie += 1; + if (plchan->chan.cookie < 0) + plchan->chan.cookie = 1; + tx->cookie = plchan->chan.cookie; + + /* Put this onto the pending list */ + list_add_tail(&txd->node, &plchan->pend_list); + + /* + * If there was no physical channel available for this memcpy, + * stack the request up and indicate that the channel is waiting + * for a free physical channel. + */ + if (!plchan->slave && !plchan->phychan) { + /* Do this memcpy whenever there is a channel ready */ + plchan->state = PL08X_CHAN_WAITING; + plchan->waiting = txd; + } else { + plchan->phychan_hold--; + } + + spin_unlock_irqrestore(&plchan->lock, flags); return tx->cookie; } @@ -1102,10 +996,9 @@ static struct dma_async_tx_descriptor *pl08x_prep_dma_interrupt( } /* - * Code accessing dma_async_is_complete() in a tight loop - * may give problems - could schedule where indicated. - * If slaves are relying on interrupts to signal completion this - * function must not be called with interrupts disabled + * Code accessing dma_async_is_complete() in a tight loop may give problems. + * If slaves are relying on interrupts to signal completion this function + * must not be called with interrupts disabled. */ static enum dma_status pl08x_dma_tx_status(struct dma_chan *chan, @@ -1118,7 +1011,7 @@ pl08x_dma_tx_status(struct dma_chan *chan, enum dma_status ret; u32 bytesleft = 0; - last_used = atomic_read(&plchan->last_issued); + last_used = plchan->chan.cookie; last_complete = plchan->lc; ret = dma_async_is_complete(cookie, last_complete, last_used); @@ -1128,13 +1021,9 @@ pl08x_dma_tx_status(struct dma_chan *chan, } /* - * schedule(); could be inserted here - */ - - /* * This cookie not complete yet */ - last_used = atomic_read(&plchan->last_issued); + last_used = plchan->chan.cookie; last_complete = plchan->lc; /* Get number of bytes left in the active transactions and queue */ @@ -1199,37 +1088,35 @@ static const struct burst_table burst_sizes[] = { }, }; -static void dma_set_runtime_config(struct dma_chan *chan, - struct dma_slave_config *config) +static int dma_set_runtime_config(struct dma_chan *chan, + struct dma_slave_config *config) { struct pl08x_dma_chan *plchan = to_pl08x_chan(chan); struct pl08x_driver_data *pl08x = plchan->host; struct pl08x_channel_data *cd = plchan->cd; enum dma_slave_buswidth addr_width; + dma_addr_t addr; u32 maxburst; u32 cctl = 0; - /* Mask out all except src and dst channel */ - u32 ccfg = cd->ccfg & 0x000003DEU; - int i = 0; + int i; + + if (!plchan->slave) + return -EINVAL; /* Transfer direction */ plchan->runtime_direction = config->direction; if (config->direction == DMA_TO_DEVICE) { - plchan->runtime_addr = config->dst_addr; - cctl |= PL080_CONTROL_SRC_INCR; - ccfg |= PL080_FLOW_MEM2PER << PL080_CONFIG_FLOW_CONTROL_SHIFT; + addr = config->dst_addr; addr_width = config->dst_addr_width; maxburst = config->dst_maxburst; } else if (config->direction == DMA_FROM_DEVICE) { - plchan->runtime_addr = config->src_addr; - cctl |= PL080_CONTROL_DST_INCR; - ccfg |= PL080_FLOW_PER2MEM << PL080_CONFIG_FLOW_CONTROL_SHIFT; + addr = config->src_addr; addr_width = config->src_addr_width; maxburst = config->src_maxburst; } else { dev_err(&pl08x->adev->dev, "bad runtime_config: alien transfer direction\n"); - return; + return -EINVAL; } switch (addr_width) { @@ -1248,42 +1135,40 @@ static void dma_set_runtime_config(struct dma_chan *chan, default: dev_err(&pl08x->adev->dev, "bad runtime_config: alien address width\n"); - return; + return -EINVAL; } /* * Now decide on a maxburst: - * If this channel will only request single transfers, set - * this down to ONE element. + * If this channel will only request single transfers, set this + * down to ONE element. Also select one element if no maxburst + * is specified. */ - if (plchan->cd->single) { + if (plchan->cd->single || maxburst == 0) { cctl |= (PL080_BSIZE_1 << PL080_CONTROL_SB_SIZE_SHIFT) | (PL080_BSIZE_1 << PL080_CONTROL_DB_SIZE_SHIFT); } else { - while (i < ARRAY_SIZE(burst_sizes)) { + for (i = 0; i < ARRAY_SIZE(burst_sizes); i++) if (burst_sizes[i].burstwords <= maxburst) break; - i++; - } cctl |= burst_sizes[i].reg; } - /* Access the cell in privileged mode, non-bufferable, non-cacheable */ - cctl &= ~PL080_CONTROL_PROT_MASK; - cctl |= PL080_CONTROL_PROT_SYS; + plchan->runtime_addr = addr; /* Modify the default channel data to fit PrimeCell request */ cd->cctl = cctl; - cd->ccfg = ccfg; dev_dbg(&pl08x->adev->dev, "configured channel %s (%s) for %s, data width %d, " - "maxburst %d words, LE, CCTL=%08x, CCFG=%08x\n", + "maxburst %d words, LE, CCTL=0x%08x\n", dma_chan_name(chan), plchan->name, (config->direction == DMA_FROM_DEVICE) ? "RX" : "TX", addr_width, maxburst, - cctl, ccfg); + cctl); + + return 0; } /* @@ -1293,35 +1178,26 @@ static void dma_set_runtime_config(struct dma_chan *chan, static void pl08x_issue_pending(struct dma_chan *chan) { struct pl08x_dma_chan *plchan = to_pl08x_chan(chan); - struct pl08x_driver_data *pl08x = plchan->host; unsigned long flags; spin_lock_irqsave(&plchan->lock, flags); - /* Something is already active */ - if (plchan->at) { - spin_unlock_irqrestore(&plchan->lock, flags); - return; - } - - /* Didn't get a physical channel so waiting for it ... */ - if (plchan->state == PL08X_CHAN_WAITING) + /* Something is already active, or we're waiting for a channel... */ + if (plchan->at || plchan->state == PL08X_CHAN_WAITING) { + spin_unlock_irqrestore(&plchan->lock, flags); return; + } /* Take the first element in the queue and execute it */ - if (!list_empty(&plchan->desc_list)) { + if (!list_empty(&plchan->pend_list)) { struct pl08x_txd *next; - next = list_first_entry(&plchan->desc_list, + next = list_first_entry(&plchan->pend_list, struct pl08x_txd, node); list_del(&next->node); - plchan->at = next; plchan->state = PL08X_CHAN_RUNNING; - /* Configure the physical channel for the active txd */ - pl08x_config_phychan_for_txd(plchan); - pl08x_set_cregs(pl08x, plchan->phychan); - pl08x_enable_phy_chan(pl08x, plchan->phychan); + pl08x_start_txd(plchan, next); } spin_unlock_irqrestore(&plchan->lock, flags); @@ -1330,30 +1206,17 @@ static void pl08x_issue_pending(struct dma_chan *chan) static int pl08x_prep_channel_resources(struct pl08x_dma_chan *plchan, struct pl08x_txd *txd) { - int num_llis; struct pl08x_driver_data *pl08x = plchan->host; - int ret; + unsigned long flags; + int num_llis, ret; num_llis = pl08x_fill_llis_for_desc(pl08x, txd); - - if (!num_llis) + if (!num_llis) { + kfree(txd); return -EINVAL; + } - spin_lock_irqsave(&plchan->lock, plchan->lockflags); - - /* - * If this device is not using a circular buffer then - * queue this new descriptor for transfer. - * The descriptor for a circular buffer continues - * to be used until the channel is freed. - */ - if (txd->cd->circular_buffer) - dev_err(&pl08x->adev->dev, - "%s attempting to queue a circular buffer\n", - __func__); - else - list_add_tail(&txd->node, - &plchan->desc_list); + spin_lock_irqsave(&plchan->lock, flags); /* * See if we already have a physical channel allocated, @@ -1362,45 +1225,74 @@ static int pl08x_prep_channel_resources(struct pl08x_dma_chan *plchan, ret = prep_phy_channel(plchan, txd); if (ret) { /* - * No physical channel available, we will - * stack up the memcpy channels until there is a channel - * available to handle it whereas slave transfers may - * have been denied due to platform channel muxing restrictions - * and since there is no guarantee that this will ever be - * resolved, and since the signal must be aquired AFTER - * aquiring the physical channel, we will let them be NACK:ed - * with -EBUSY here. The drivers can alway retry the prep() - * call if they are eager on doing this using DMA. + * No physical channel was available. + * + * memcpy transfers can be sorted out at submission time. + * + * Slave transfers may have been denied due to platform + * channel muxing restrictions. Since there is no guarantee + * that this will ever be resolved, and the signal must be + * acquired AFTER acquiring the physical channel, we will let + * them be NACK:ed with -EBUSY here. The drivers can retry + * the prep() call if they are eager on doing this using DMA. */ if (plchan->slave) { pl08x_free_txd_list(pl08x, plchan); - spin_unlock_irqrestore(&plchan->lock, plchan->lockflags); + pl08x_free_txd(pl08x, txd); + spin_unlock_irqrestore(&plchan->lock, flags); return -EBUSY; } - /* Do this memcpy whenever there is a channel ready */ - plchan->state = PL08X_CHAN_WAITING; - plchan->waiting = txd; } else /* - * Else we're all set, paused and ready to roll, - * status will switch to PL08X_CHAN_RUNNING when - * we call issue_pending(). If there is something - * running on the channel already we don't change - * its state. + * Else we're all set, paused and ready to roll, status + * will switch to PL08X_CHAN_RUNNING when we call + * issue_pending(). If there is something running on the + * channel already we don't change its state. */ if (plchan->state == PL08X_CHAN_IDLE) plchan->state = PL08X_CHAN_PAUSED; - /* - * Notice that we leave plchan->lock locked on purpose: - * it will be unlocked in the subsequent tx_submit() - * call. This is a consequence of the current API. - */ + spin_unlock_irqrestore(&plchan->lock, flags); return 0; } /* + * Given the source and destination available bus masks, select which + * will be routed to each port. We try to have source and destination + * on separate ports, but always respect the allowable settings. + */ +static u32 pl08x_select_bus(struct pl08x_driver_data *pl08x, u8 src, u8 dst) +{ + u32 cctl = 0; + + if (!(dst & PL08X_AHB1) || ((dst & PL08X_AHB2) && (src & PL08X_AHB1))) + cctl |= PL080_CONTROL_DST_AHB2; + if (!(src & PL08X_AHB1) || ((src & PL08X_AHB2) && !(dst & PL08X_AHB2))) + cctl |= PL080_CONTROL_SRC_AHB2; + + return cctl; +} + +static struct pl08x_txd *pl08x_get_txd(struct pl08x_dma_chan *plchan, + unsigned long flags) +{ + struct pl08x_txd *txd = kzalloc(sizeof(struct pl08x_txd), GFP_NOWAIT); + + if (txd) { + dma_async_tx_descriptor_init(&txd->tx, &plchan->chan); + txd->tx.flags = flags; + txd->tx.tx_submit = pl08x_tx_submit; + INIT_LIST_HEAD(&txd->node); + + /* Always enable error and terminal interrupts */ + txd->ccfg = PL080_CONFIG_ERR_IRQ_MASK | + PL080_CONFIG_TC_IRQ_MASK; + } + return txd; +} + +/* * Initialize a descriptor to be used by memcpy submit */ static struct dma_async_tx_descriptor *pl08x_prep_dma_memcpy( @@ -1412,40 +1304,38 @@ static struct dma_async_tx_descriptor *pl08x_prep_dma_memcpy( struct pl08x_txd *txd; int ret; - txd = kzalloc(sizeof(struct pl08x_txd), GFP_NOWAIT); + txd = pl08x_get_txd(plchan, flags); if (!txd) { dev_err(&pl08x->adev->dev, "%s no memory for descriptor\n", __func__); return NULL; } - dma_async_tx_descriptor_init(&txd->tx, chan); txd->direction = DMA_NONE; - txd->srcbus.addr = src; - txd->dstbus.addr = dest; + txd->src_addr = src; + txd->dst_addr = dest; + txd->len = len; /* Set platform data for m2m */ - txd->cd = &pl08x->pd->memcpy_channel; + txd->ccfg |= PL080_FLOW_MEM2MEM << PL080_CONFIG_FLOW_CONTROL_SHIFT; + txd->cctl = pl08x->pd->memcpy_channel.cctl & + ~(PL080_CONTROL_DST_AHB2 | PL080_CONTROL_SRC_AHB2); + /* Both to be incremented or the code will break */ - txd->cd->cctl |= PL080_CONTROL_SRC_INCR | PL080_CONTROL_DST_INCR; - txd->tx.tx_submit = pl08x_tx_submit; - txd->tx.callback = NULL; - txd->tx.callback_param = NULL; - txd->len = len; + txd->cctl |= PL080_CONTROL_SRC_INCR | PL080_CONTROL_DST_INCR; + + if (pl08x->vd->dualmaster) + txd->cctl |= pl08x_select_bus(pl08x, + pl08x->mem_buses, pl08x->mem_buses); - INIT_LIST_HEAD(&txd->node); ret = pl08x_prep_channel_resources(plchan, txd); if (ret) return NULL; - /* - * NB: the channel lock is held at this point so tx_submit() - * must be called in direct succession. - */ return &txd->tx; } -struct dma_async_tx_descriptor *pl08x_prep_slave_sg( +static struct dma_async_tx_descriptor *pl08x_prep_slave_sg( struct dma_chan *chan, struct scatterlist *sgl, unsigned int sg_len, enum dma_data_direction direction, unsigned long flags) @@ -1453,6 +1343,7 @@ struct dma_async_tx_descriptor *pl08x_prep_slave_sg( struct pl08x_dma_chan *plchan = to_pl08x_chan(chan); struct pl08x_driver_data *pl08x = plchan->host; struct pl08x_txd *txd; + u8 src_buses, dst_buses; int ret; /* @@ -1467,14 +1358,12 @@ struct dma_async_tx_descriptor *pl08x_prep_slave_sg( dev_dbg(&pl08x->adev->dev, "%s prepare transaction of %d bytes from %s\n", __func__, sgl->length, plchan->name); - txd = kzalloc(sizeof(struct pl08x_txd), GFP_NOWAIT); + txd = pl08x_get_txd(plchan, flags); if (!txd) { dev_err(&pl08x->adev->dev, "%s no txd\n", __func__); return NULL; } - dma_async_tx_descriptor_init(&txd->tx, chan); - if (direction != plchan->runtime_direction) dev_err(&pl08x->adev->dev, "%s DMA setup does not match " "the direction configured for the PrimeCell\n", @@ -1486,37 +1375,47 @@ struct dma_async_tx_descriptor *pl08x_prep_slave_sg( * channel target address dynamically at runtime. */ txd->direction = direction; + txd->len = sgl->length; + + txd->cctl = plchan->cd->cctl & + ~(PL080_CONTROL_SRC_AHB2 | PL080_CONTROL_DST_AHB2 | + PL080_CONTROL_SRC_INCR | PL080_CONTROL_DST_INCR | + PL080_CONTROL_PROT_MASK); + + /* Access the cell in privileged mode, non-bufferable, non-cacheable */ + txd->cctl |= PL080_CONTROL_PROT_SYS; + if (direction == DMA_TO_DEVICE) { - txd->srcbus.addr = sgl->dma_address; + txd->ccfg |= PL080_FLOW_MEM2PER << PL080_CONFIG_FLOW_CONTROL_SHIFT; + txd->cctl |= PL080_CONTROL_SRC_INCR; + txd->src_addr = sgl->dma_address; if (plchan->runtime_addr) - txd->dstbus.addr = plchan->runtime_addr; + txd->dst_addr = plchan->runtime_addr; else - txd->dstbus.addr = plchan->cd->addr; + txd->dst_addr = plchan->cd->addr; + src_buses = pl08x->mem_buses; + dst_buses = plchan->cd->periph_buses; } else if (direction == DMA_FROM_DEVICE) { + txd->ccfg |= PL080_FLOW_PER2MEM << PL080_CONFIG_FLOW_CONTROL_SHIFT; + txd->cctl |= PL080_CONTROL_DST_INCR; if (plchan->runtime_addr) - txd->srcbus.addr = plchan->runtime_addr; + txd->src_addr = plchan->runtime_addr; else - txd->srcbus.addr = plchan->cd->addr; - txd->dstbus.addr = sgl->dma_address; + txd->src_addr = plchan->cd->addr; + txd->dst_addr = sgl->dma_address; + src_buses = plchan->cd->periph_buses; + dst_buses = pl08x->mem_buses; } else { dev_err(&pl08x->adev->dev, "%s direction unsupported\n", __func__); return NULL; } - txd->cd = plchan->cd; - txd->tx.tx_submit = pl08x_tx_submit; - txd->tx.callback = NULL; - txd->tx.callback_param = NULL; - txd->len = sgl->length; - INIT_LIST_HEAD(&txd->node); + + txd->cctl |= pl08x_select_bus(pl08x, src_buses, dst_buses); ret = pl08x_prep_channel_resources(plchan, txd); if (ret) return NULL; - /* - * NB: the channel lock is held at this point so tx_submit() - * must be called in direct succession. - */ return &txd->tx; } @@ -1531,10 +1430,8 @@ static int pl08x_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd, /* Controls applicable to inactive channels */ if (cmd == DMA_SLAVE_CONFIG) { - dma_set_runtime_config(chan, - (struct dma_slave_config *) - arg); - return 0; + return dma_set_runtime_config(chan, + (struct dma_slave_config *)arg); } /* @@ -1558,16 +1455,8 @@ static int pl08x_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd, * Mark physical channel as free and free any slave * signal */ - if ((plchan->phychan->signal >= 0) && - pl08x->pd->put_signal) { - pl08x->pd->put_signal(plchan); - plchan->phychan->signal = -1; - } - pl08x_put_phy_channel(pl08x, plchan->phychan); - plchan->phychan = NULL; + release_phy_channel(plchan); } - /* Stop any pending tasklet */ - tasklet_disable(&plchan->tasklet); /* Dequeue jobs and free LLIs */ if (plchan->at) { pl08x_free_txd(pl08x, plchan->at); @@ -1609,10 +1498,9 @@ bool pl08x_filter_id(struct dma_chan *chan, void *chan_id) /* * Just check that the device is there and active - * TODO: turn this bit on/off depending on the number of - * physical channels actually used, if it is zero... well - * shut it off. That will save some power. Cut the clock - * at the same time. + * TODO: turn this bit on/off depending on the number of physical channels + * actually used, if it is zero... well shut it off. That will save some + * power. Cut the clock at the same time. */ static void pl08x_ensure_on(struct pl08x_driver_data *pl08x) { @@ -1620,78 +1508,66 @@ static void pl08x_ensure_on(struct pl08x_driver_data *pl08x) val = readl(pl08x->base + PL080_CONFIG); val &= ~(PL080_CONFIG_M2_BE | PL080_CONFIG_M1_BE | PL080_CONFIG_ENABLE); - /* We implictly clear bit 1 and that means little-endian mode */ + /* We implicitly clear bit 1 and that means little-endian mode */ val |= PL080_CONFIG_ENABLE; writel(val, pl08x->base + PL080_CONFIG); } +static void pl08x_unmap_buffers(struct pl08x_txd *txd) +{ + struct device *dev = txd->tx.chan->device->dev; + + if (!(txd->tx.flags & DMA_COMPL_SKIP_SRC_UNMAP)) { + if (txd->tx.flags & DMA_COMPL_SRC_UNMAP_SINGLE) + dma_unmap_single(dev, txd->src_addr, txd->len, + DMA_TO_DEVICE); + else + dma_unmap_page(dev, txd->src_addr, txd->len, + DMA_TO_DEVICE); + } + if (!(txd->tx.flags & DMA_COMPL_SKIP_DEST_UNMAP)) { + if (txd->tx.flags & DMA_COMPL_DEST_UNMAP_SINGLE) + dma_unmap_single(dev, txd->dst_addr, txd->len, + DMA_FROM_DEVICE); + else + dma_unmap_page(dev, txd->dst_addr, txd->len, + DMA_FROM_DEVICE); + } +} + static void pl08x_tasklet(unsigned long data) { struct pl08x_dma_chan *plchan = (struct pl08x_dma_chan *) data; - struct pl08x_phy_chan *phychan = plchan->phychan; struct pl08x_driver_data *pl08x = plchan->host; + struct pl08x_txd *txd; + unsigned long flags; - if (!plchan) - BUG(); - - spin_lock(&plchan->lock); - - if (plchan->at) { - dma_async_tx_callback callback = - plchan->at->tx.callback; - void *callback_param = - plchan->at->tx.callback_param; - - /* - * Update last completed - */ - plchan->lc = - (plchan->at->tx.cookie); - - /* - * Callback to signal completion - */ - if (callback) - callback(callback_param); + spin_lock_irqsave(&plchan->lock, flags); - /* - * Device callbacks should NOT clear - * the current transaction on the channel - * Linus: sometimes they should? - */ - if (!plchan->at) - BUG(); + txd = plchan->at; + plchan->at = NULL; - /* - * Free the descriptor if it's not for a device - * using a circular buffer - */ - if (!plchan->at->cd->circular_buffer) { - pl08x_free_txd(pl08x, plchan->at); - plchan->at = NULL; - } - /* - * else descriptor for circular - * buffers only freed when - * client has disabled dma - */ + if (txd) { + /* Update last completed */ + plchan->lc = txd->tx.cookie; } - /* - * If a new descriptor is queued, set it up - * plchan->at is NULL here - */ - if (!list_empty(&plchan->desc_list)) { + + /* If a new descriptor is queued, set it up plchan->at is NULL here */ + if (!list_empty(&plchan->pend_list)) { struct pl08x_txd *next; - next = list_first_entry(&plchan->desc_list, + next = list_first_entry(&plchan->pend_list, struct pl08x_txd, node); list_del(&next->node); - plchan->at = next; - /* Configure the physical channel for the next txd */ - pl08x_config_phychan_for_txd(plchan); - pl08x_set_cregs(pl08x, plchan->phychan); - pl08x_enable_phy_chan(pl08x, plchan->phychan); + + pl08x_start_txd(plchan, next); + } else if (plchan->phychan_hold) { + /* + * This channel is still in use - we have a new txd being + * prepared and will soon be queued. Don't give up the + * physical channel. + */ } else { struct pl08x_dma_chan *waiting = NULL; @@ -1699,20 +1575,14 @@ static void pl08x_tasklet(unsigned long data) * No more jobs, so free up the physical channel * Free any allocated signal on slave transfers too */ - if ((phychan->signal >= 0) && pl08x->pd->put_signal) { - pl08x->pd->put_signal(plchan); - phychan->signal = -1; - } - pl08x_put_phy_channel(pl08x, phychan); - plchan->phychan = NULL; + release_phy_channel(plchan); plchan->state = PL08X_CHAN_IDLE; /* - * And NOW before anyone else can grab that free:d - * up physical channel, see if there is some memcpy - * pending that seriously needs to start because of - * being stacked up while we were choking the - * physical channels with data. + * And NOW before anyone else can grab that free:d up + * physical channel, see if there is some memcpy pending + * that seriously needs to start because of being stacked + * up while we were choking the physical channels with data. */ list_for_each_entry(waiting, &pl08x->memcpy.channels, chan.device_node) { @@ -1724,6 +1594,7 @@ static void pl08x_tasklet(unsigned long data) ret = prep_phy_channel(waiting, waiting->waiting); BUG_ON(ret); + waiting->phychan_hold--; waiting->state = PL08X_CHAN_RUNNING; waiting->waiting = NULL; pl08x_issue_pending(&waiting->chan); @@ -1732,7 +1603,25 @@ static void pl08x_tasklet(unsigned long data) } } - spin_unlock(&plchan->lock); + spin_unlock_irqrestore(&plchan->lock, flags); + + if (txd) { + dma_async_tx_callback callback = txd->tx.callback; + void *callback_param = txd->tx.callback_param; + + /* Don't try to unmap buffers on slave channels */ + if (!plchan->slave) + pl08x_unmap_buffers(txd); + + /* Free the descriptor */ + spin_lock_irqsave(&plchan->lock, flags); + pl08x_free_txd(pl08x, txd); + spin_unlock_irqrestore(&plchan->lock, flags); + + /* Callback to signal completion */ + if (callback) + callback(callback_param); + } } static irqreturn_t pl08x_irq(int irq, void *dev) @@ -1744,9 +1633,7 @@ static irqreturn_t pl08x_irq(int irq, void *dev) val = readl(pl08x->base + PL080_ERR_STATUS); if (val) { - /* - * An error interrupt (on one or more channels) - */ + /* An error interrupt (on one or more channels) */ dev_err(&pl08x->adev->dev, "%s error interrupt, register value 0x%08x\n", __func__, val); @@ -1770,9 +1657,7 @@ static irqreturn_t pl08x_irq(int irq, void *dev) mask |= (1 << i); } } - /* - * Clear only the terminal interrupts on channels we processed - */ + /* Clear only the terminal interrupts on channels we processed */ writel(mask, pl08x->base + PL080_TC_CLEAR); return mask ? IRQ_HANDLED : IRQ_NONE; @@ -1791,6 +1676,7 @@ static int pl08x_dma_init_virtual_channels(struct pl08x_driver_data *pl08x, int i; INIT_LIST_HEAD(&dmadev->channels); + /* * Register as many many memcpy as we have physical channels, * we won't always be able to use all but the code will have @@ -1819,16 +1705,23 @@ static int pl08x_dma_init_virtual_channels(struct pl08x_driver_data *pl08x, return -ENOMEM; } } + if (chan->cd->circular_buffer) { + dev_err(&pl08x->adev->dev, + "channel %s: circular buffers not supported\n", + chan->name); + kfree(chan); + continue; + } dev_info(&pl08x->adev->dev, "initialize virtual channel \"%s\"\n", chan->name); chan->chan.device = dmadev; - atomic_set(&chan->last_issued, 0); - chan->lc = atomic_read(&chan->last_issued); + chan->chan.cookie = 0; + chan->lc = 0; spin_lock_init(&chan->lock); - INIT_LIST_HEAD(&chan->desc_list); + INIT_LIST_HEAD(&chan->pend_list); tasklet_init(&chan->tasklet, pl08x_tasklet, (unsigned long) chan); @@ -1898,7 +1791,7 @@ static int pl08x_debugfs_show(struct seq_file *s, void *data) seq_printf(s, "CHANNEL:\tSTATE:\n"); seq_printf(s, "--------\t------\n"); list_for_each_entry(chan, &pl08x->memcpy.channels, chan.device_node) { - seq_printf(s, "%s\t\t\%s\n", chan->name, + seq_printf(s, "%s\t\t%s\n", chan->name, pl08x_state_str(chan->state)); } @@ -1906,7 +1799,7 @@ static int pl08x_debugfs_show(struct seq_file *s, void *data) seq_printf(s, "CHANNEL:\tSTATE:\n"); seq_printf(s, "--------\t------\n"); list_for_each_entry(chan, &pl08x->slave.channels, chan.device_node) { - seq_printf(s, "%s\t\t\%s\n", chan->name, + seq_printf(s, "%s\t\t%s\n", chan->name, pl08x_state_str(chan->state)); } @@ -1942,7 +1835,7 @@ static inline void init_pl08x_debugfs(struct pl08x_driver_data *pl08x) static int pl08x_probe(struct amba_device *adev, struct amba_id *id) { struct pl08x_driver_data *pl08x; - struct vendor_data *vd = id->data; + const struct vendor_data *vd = id->data; int ret = 0; int i; @@ -1990,6 +1883,14 @@ static int pl08x_probe(struct amba_device *adev, struct amba_id *id) pl08x->adev = adev; pl08x->vd = vd; + /* By default, AHB1 only. If dualmaster, from platform */ + pl08x->lli_buses = PL08X_AHB1; + pl08x->mem_buses = PL08X_AHB1; + if (pl08x->vd->dualmaster) { + pl08x->lli_buses = pl08x->pd->lli_buses; + pl08x->mem_buses = pl08x->pd->mem_buses; + } + /* A DMA memory pool for LLIs, align on 1-byte boundary */ pl08x->pool = dma_pool_create(DRIVER_NAME, &pl08x->adev->dev, PL08X_LLI_TSFR_SIZE, PL08X_ALIGN, 0); @@ -2009,14 +1910,12 @@ static int pl08x_probe(struct amba_device *adev, struct amba_id *id) /* Turn on the PL08x */ pl08x_ensure_on(pl08x); - /* - * Attach the interrupt handler - */ + /* Attach the interrupt handler */ writel(0x000000FF, pl08x->base + PL080_ERR_CLEAR); writel(0x000000FF, pl08x->base + PL080_TC_CLEAR); ret = request_irq(adev->irq[0], pl08x_irq, IRQF_DISABLED, - vd->name, pl08x); + DRIVER_NAME, pl08x); if (ret) { dev_err(&adev->dev, "%s failed to request interrupt %d\n", __func__, adev->irq[0]); @@ -2087,8 +1986,9 @@ static int pl08x_probe(struct amba_device *adev, struct amba_id *id) amba_set_drvdata(adev, pl08x); init_pl08x_debugfs(pl08x); - dev_info(&pl08x->adev->dev, "ARM(R) %s DMA block initialized @%08x\n", - vd->name, adev->res.start); + dev_info(&pl08x->adev->dev, "DMA: PL%03x rev%u at 0x%08llx irq %d\n", + amba_part(adev), amba_rev(adev), + (unsigned long long)adev->res.start, adev->irq[0]); return 0; out_no_slave_reg: @@ -2115,13 +2015,11 @@ out_no_pl08x: /* PL080 has 8 channels and the PL080 have just 2 */ static struct vendor_data vendor_pl080 = { - .name = "PL080", .channels = 8, .dualmaster = true, }; static struct vendor_data vendor_pl081 = { - .name = "PL081", .channels = 2, .dualmaster = false, }; @@ -2160,7 +2058,7 @@ static int __init pl08x_init(void) retval = amba_driver_register(&pl08x_amba_driver); if (retval) printk(KERN_WARNING DRIVER_NAME - "failed to register as an amba device (%d)\n", + "failed to register as an AMBA device (%d)\n", retval); return retval; } diff --git a/drivers/dma/at_hdmac.c b/drivers/dma/at_hdmac.c index ea0ee81..3d7d705 100644 --- a/drivers/dma/at_hdmac.c +++ b/drivers/dma/at_hdmac.c @@ -253,7 +253,7 @@ atc_chain_complete(struct at_dma_chan *atchan, struct at_desc *desc) /* move myself to free_list */ list_move(&desc->desc_node, &atchan->free_list); - /* unmap dma addresses */ + /* unmap dma addresses (not on slave channels) */ if (!atchan->chan_common.private) { struct device *parent = chan2parent(&atchan->chan_common); if (!(txd->flags & DMA_COMPL_SKIP_DEST_UNMAP)) { @@ -583,7 +583,6 @@ atc_prep_dma_memcpy(struct dma_chan *chan, dma_addr_t dest, dma_addr_t src, desc->lli.ctrlb = ctrlb; desc->txd.cookie = 0; - async_tx_ack(&desc->txd); if (!first) { first = desc; @@ -604,7 +603,7 @@ atc_prep_dma_memcpy(struct dma_chan *chan, dma_addr_t dest, dma_addr_t src, /* set end-of-link to the last link descriptor of list*/ set_desc_eol(desc); - desc->txd.flags = flags; /* client is in control of this ack */ + first->txd.flags = flags; /* client is in control of this ack */ return &first->txd; @@ -670,7 +669,7 @@ atc_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl, if (!desc) goto err_desc_get; - mem = sg_phys(sg); + mem = sg_dma_address(sg); len = sg_dma_len(sg); mem_width = 2; if (unlikely(mem & 3 || len & 3)) @@ -712,7 +711,7 @@ atc_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl, if (!desc) goto err_desc_get; - mem = sg_phys(sg); + mem = sg_dma_address(sg); len = sg_dma_len(sg); mem_width = 2; if (unlikely(mem & 3 || len & 3)) @@ -749,8 +748,8 @@ atc_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl, first->txd.cookie = -EBUSY; first->len = total_len; - /* last link descriptor of list is responsible of flags */ - prev->txd.flags = flags; /* client is in control of this ack */ + /* first link descriptor of list is responsible of flags */ + first->txd.flags = flags; /* client is in control of this ack */ return &first->txd; @@ -854,11 +853,11 @@ static void atc_issue_pending(struct dma_chan *chan) dev_vdbg(chan2dev(chan), "issue_pending\n"); + spin_lock_bh(&atchan->lock); if (!atc_chan_is_enabled(atchan)) { - spin_lock_bh(&atchan->lock); atc_advance_work(atchan); - spin_unlock_bh(&atchan->lock); } + spin_unlock_bh(&atchan->lock); } /** @@ -1210,7 +1209,7 @@ static int __init at_dma_init(void) { return platform_driver_probe(&at_dma_driver, at_dma_probe); } -module_init(at_dma_init); +subsys_initcall(at_dma_init); static void __exit at_dma_exit(void) { diff --git a/drivers/dma/fsldma.c b/drivers/dma/fsldma.c index e5e172d2..4de947a 100644 --- a/drivers/dma/fsldma.c +++ b/drivers/dma/fsldma.c @@ -1,7 +1,7 @@ /* * Freescale MPC85xx, MPC83xx DMA Engine support * - * Copyright (C) 2007 Freescale Semiconductor, Inc. All rights reserved. + * Copyright (C) 2007-2010 Freescale Semiconductor, Inc. All rights reserved. * * Author: * Zhang Wei <wei.zhang@freescale.com>, Jul 2007 @@ -1324,6 +1324,8 @@ static int __devinit fsldma_of_probe(struct platform_device *op, fdev->common.device_control = fsl_dma_device_control; fdev->common.dev = &op->dev; + dma_set_mask(&(op->dev), DMA_BIT_MASK(36)); + dev_set_drvdata(&op->dev, fdev); /* diff --git a/drivers/dma/intel_mid_dma.c b/drivers/dma/intel_mid_dma.c index 7826638..798f46a 100644 --- a/drivers/dma/intel_mid_dma.c +++ b/drivers/dma/intel_mid_dma.c @@ -664,11 +664,20 @@ static struct dma_async_tx_descriptor *intel_mid_dma_prep_memcpy( /*calculate CTL_LO*/ ctl_lo.ctl_lo = 0; ctl_lo.ctlx.int_en = 1; - ctl_lo.ctlx.dst_tr_width = mids->dma_slave.dst_addr_width; - ctl_lo.ctlx.src_tr_width = mids->dma_slave.src_addr_width; ctl_lo.ctlx.dst_msize = mids->dma_slave.src_maxburst; ctl_lo.ctlx.src_msize = mids->dma_slave.dst_maxburst; + /* + * Here we need some translation from "enum dma_slave_buswidth" + * to the format for our dma controller + * standard intel_mid_dmac's format + * 1 Byte 0b000 + * 2 Bytes 0b001 + * 4 Bytes 0b010 + */ + ctl_lo.ctlx.dst_tr_width = mids->dma_slave.dst_addr_width / 2; + ctl_lo.ctlx.src_tr_width = mids->dma_slave.src_addr_width / 2; + if (mids->cfg_mode == LNW_DMA_MEM_TO_MEM) { ctl_lo.ctlx.tt_fc = 0; ctl_lo.ctlx.sinc = 0; @@ -746,8 +755,18 @@ static struct dma_async_tx_descriptor *intel_mid_dma_prep_slave_sg( BUG_ON(!mids); if (!midc->dma->pimr_mask) { - pr_debug("MDMA: SG list is not supported by this controller\n"); - return NULL; + /* We can still handle sg list with only one item */ + if (sg_len == 1) { + txd = intel_mid_dma_prep_memcpy(chan, + mids->dma_slave.dst_addr, + mids->dma_slave.src_addr, + sgl->length, + flags); + return txd; + } else { + pr_warn("MDMA: SG list is not supported by this controller\n"); + return NULL; + } } pr_debug("MDMA: SG Length = %d, direction = %d, Flags = %#lx\n", @@ -758,6 +777,7 @@ static struct dma_async_tx_descriptor *intel_mid_dma_prep_slave_sg( pr_err("MDMA: Prep memcpy failed\n"); return NULL; } + desc = to_intel_mid_dma_desc(txd); desc->dirn = direction; ctl_lo.ctl_lo = desc->ctl_lo; @@ -1021,11 +1041,6 @@ static irqreturn_t intel_mid_dma_interrupt(int irq, void *data) /*DMA Interrupt*/ pr_debug("MDMA:Got an interrupt on irq %d\n", irq); - if (!mid) { - pr_err("ERR_MDMA:null pointer mid\n"); - return -EINVAL; - } - pr_debug("MDMA: Status %x, Mask %x\n", tfr_status, mid->intr_mask); tfr_status &= mid->intr_mask; if (tfr_status) { diff --git a/drivers/dma/iop-adma.c b/drivers/dma/iop-adma.c index 161c452..c6b01f5 100644 --- a/drivers/dma/iop-adma.c +++ b/drivers/dma/iop-adma.c @@ -1261,7 +1261,7 @@ out: return err; } -#ifdef CONFIG_MD_RAID6_PQ +#ifdef CONFIG_RAID6_PQ static int __devinit iop_adma_pq_zero_sum_self_test(struct iop_adma_device *device) { @@ -1584,7 +1584,7 @@ static int __devinit iop_adma_probe(struct platform_device *pdev) if (dma_has_cap(DMA_PQ, dma_dev->cap_mask) && dma_has_cap(DMA_PQ_VAL, dma_dev->cap_mask)) { - #ifdef CONFIG_MD_RAID6_PQ + #ifdef CONFIG_RAID6_PQ ret = iop_adma_pq_zero_sum_self_test(adev); dev_dbg(&pdev->dev, "pq self test returned %d\n", ret); #else diff --git a/drivers/dma/pch_dma.c b/drivers/dma/pch_dma.c index c064c89..1c38418 100644 --- a/drivers/dma/pch_dma.c +++ b/drivers/dma/pch_dma.c @@ -1,6 +1,7 @@ /* * Topcliff PCH DMA controller driver * Copyright (c) 2010 Intel Corporation + * Copyright (C) 2011 OKI SEMICONDUCTOR CO., LTD. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -921,12 +922,19 @@ static void __devexit pch_dma_remove(struct pci_dev *pdev) } /* PCI Device ID of DMA device */ -#define PCI_DEVICE_ID_PCH_DMA_8CH 0x8810 -#define PCI_DEVICE_ID_PCH_DMA_4CH 0x8815 +#define PCI_VENDOR_ID_ROHM 0x10DB +#define PCI_DEVICE_ID_EG20T_PCH_DMA_8CH 0x8810 +#define PCI_DEVICE_ID_EG20T_PCH_DMA_4CH 0x8815 +#define PCI_DEVICE_ID_ML7213_DMA1_8CH 0x8026 +#define PCI_DEVICE_ID_ML7213_DMA2_8CH 0x802B +#define PCI_DEVICE_ID_ML7213_DMA3_4CH 0x8034 static const struct pci_device_id pch_dma_id_table[] = { - { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_PCH_DMA_8CH), 8 }, - { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_PCH_DMA_4CH), 4 }, + { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_EG20T_PCH_DMA_8CH), 8 }, + { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_EG20T_PCH_DMA_4CH), 4 }, + { PCI_VDEVICE(ROHM, PCI_DEVICE_ID_ML7213_DMA1_8CH), 8}, /* UART Video */ + { PCI_VDEVICE(ROHM, PCI_DEVICE_ID_ML7213_DMA2_8CH), 8}, /* PCMIF SPI */ + { PCI_VDEVICE(ROHM, PCI_DEVICE_ID_ML7213_DMA3_4CH), 4}, /* FPGA */ { 0, }, }; @@ -954,6 +962,7 @@ static void __exit pch_dma_exit(void) module_init(pch_dma_init); module_exit(pch_dma_exit); -MODULE_DESCRIPTION("Topcliff PCH DMA controller driver"); +MODULE_DESCRIPTION("Intel EG20T PCH / OKI SEMICONDUCTOR ML7213 IOH " + "DMA controller driver"); MODULE_AUTHOR("Yong Wang <yong.y.wang@intel.com>"); MODULE_LICENSE("GPL v2"); diff --git a/drivers/dma/ste_dma40.c b/drivers/dma/ste_dma40.c index fab68a5..6e1d46a 100644 --- a/drivers/dma/ste_dma40.c +++ b/drivers/dma/ste_dma40.c @@ -1,5 +1,6 @@ /* - * Copyright (C) ST-Ericsson SA 2007-2010 + * Copyright (C) Ericsson AB 2007-2008 + * Copyright (C) ST-Ericsson SA 2008-2010 * Author: Per Forlin <per.forlin@stericsson.com> for ST-Ericsson * Author: Jonas Aaberg <jonas.aberg@stericsson.com> for ST-Ericsson * License terms: GNU General Public License (GPL) version 2 @@ -554,8 +555,66 @@ static struct d40_desc *d40_last_queued(struct d40_chan *d40c) return d; } -/* Support functions for logical channels */ +static int d40_psize_2_burst_size(bool is_log, int psize) +{ + if (is_log) { + if (psize == STEDMA40_PSIZE_LOG_1) + return 1; + } else { + if (psize == STEDMA40_PSIZE_PHY_1) + return 1; + } + + return 2 << psize; +} + +/* + * The dma only supports transmitting packages up to + * STEDMA40_MAX_SEG_SIZE << data_width. Calculate the total number of + * dma elements required to send the entire sg list + */ +static int d40_size_2_dmalen(int size, u32 data_width1, u32 data_width2) +{ + int dmalen; + u32 max_w = max(data_width1, data_width2); + u32 min_w = min(data_width1, data_width2); + u32 seg_max = ALIGN(STEDMA40_MAX_SEG_SIZE << min_w, 1 << max_w); + + if (seg_max > STEDMA40_MAX_SEG_SIZE) + seg_max -= (1 << max_w); + + if (!IS_ALIGNED(size, 1 << max_w)) + return -EINVAL; + + if (size <= seg_max) + dmalen = 1; + else { + dmalen = size / seg_max; + if (dmalen * seg_max < size) + dmalen++; + } + return dmalen; +} + +static int d40_sg_2_dmalen(struct scatterlist *sgl, int sg_len, + u32 data_width1, u32 data_width2) +{ + struct scatterlist *sg; + int i; + int len = 0; + int ret; + + for_each_sg(sgl, sg, sg_len, i) { + ret = d40_size_2_dmalen(sg_dma_len(sg), + data_width1, data_width2); + if (ret < 0) + return ret; + len += ret; + } + return len; +} +/* Support functions for logical channels */ static int d40_channel_execute_command(struct d40_chan *d40c, enum d40_command command) @@ -1241,6 +1300,21 @@ static int d40_validate_conf(struct d40_chan *d40c, res = -EINVAL; } + if (d40_psize_2_burst_size(is_log, conf->src_info.psize) * + (1 << conf->src_info.data_width) != + d40_psize_2_burst_size(is_log, conf->dst_info.psize) * + (1 << conf->dst_info.data_width)) { + /* + * The DMAC hardware only supports + * src (burst x width) == dst (burst x width) + */ + + dev_err(&d40c->chan.dev->device, + "[%s] src (burst x width) != dst (burst x width)\n", + __func__); + res = -EINVAL; + } + return res; } @@ -1638,13 +1712,21 @@ struct dma_async_tx_descriptor *stedma40_memcpy_sg(struct dma_chan *chan, if (d40d == NULL) goto err; - d40d->lli_len = sgl_len; + d40d->lli_len = d40_sg_2_dmalen(sgl_dst, sgl_len, + d40c->dma_cfg.src_info.data_width, + d40c->dma_cfg.dst_info.data_width); + if (d40d->lli_len < 0) { + dev_err(&d40c->chan.dev->device, + "[%s] Unaligned size\n", __func__); + goto err; + } + d40d->lli_current = 0; d40d->txd.flags = dma_flags; if (d40c->log_num != D40_PHY_CHAN) { - if (d40_pool_lli_alloc(d40d, sgl_len, true) < 0) { + if (d40_pool_lli_alloc(d40d, d40d->lli_len, true) < 0) { dev_err(&d40c->chan.dev->device, "[%s] Out of memory\n", __func__); goto err; @@ -1654,15 +1736,17 @@ struct dma_async_tx_descriptor *stedma40_memcpy_sg(struct dma_chan *chan, sgl_len, d40d->lli_log.src, d40c->log_def.lcsp1, - d40c->dma_cfg.src_info.data_width); + d40c->dma_cfg.src_info.data_width, + d40c->dma_cfg.dst_info.data_width); (void) d40_log_sg_to_lli(sgl_dst, sgl_len, d40d->lli_log.dst, d40c->log_def.lcsp3, - d40c->dma_cfg.dst_info.data_width); + d40c->dma_cfg.dst_info.data_width, + d40c->dma_cfg.src_info.data_width); } else { - if (d40_pool_lli_alloc(d40d, sgl_len, false) < 0) { + if (d40_pool_lli_alloc(d40d, d40d->lli_len, false) < 0) { dev_err(&d40c->chan.dev->device, "[%s] Out of memory\n", __func__); goto err; @@ -1675,6 +1759,7 @@ struct dma_async_tx_descriptor *stedma40_memcpy_sg(struct dma_chan *chan, virt_to_phys(d40d->lli_phy.src), d40c->src_def_cfg, d40c->dma_cfg.src_info.data_width, + d40c->dma_cfg.dst_info.data_width, d40c->dma_cfg.src_info.psize); if (res < 0) @@ -1687,6 +1772,7 @@ struct dma_async_tx_descriptor *stedma40_memcpy_sg(struct dma_chan *chan, virt_to_phys(d40d->lli_phy.dst), d40c->dst_def_cfg, d40c->dma_cfg.dst_info.data_width, + d40c->dma_cfg.src_info.data_width, d40c->dma_cfg.dst_info.psize); if (res < 0) @@ -1826,7 +1912,6 @@ static struct dma_async_tx_descriptor *d40_prep_memcpy(struct dma_chan *chan, struct d40_chan *d40c = container_of(chan, struct d40_chan, chan); unsigned long flags; - int err = 0; if (d40c->phy_chan == NULL) { dev_err(&d40c->chan.dev->device, @@ -1844,6 +1929,15 @@ static struct dma_async_tx_descriptor *d40_prep_memcpy(struct dma_chan *chan, } d40d->txd.flags = dma_flags; + d40d->lli_len = d40_size_2_dmalen(size, + d40c->dma_cfg.src_info.data_width, + d40c->dma_cfg.dst_info.data_width); + if (d40d->lli_len < 0) { + dev_err(&d40c->chan.dev->device, + "[%s] Unaligned size\n", __func__); + goto err; + } + dma_async_tx_descriptor_init(&d40d->txd, chan); @@ -1851,37 +1945,40 @@ static struct dma_async_tx_descriptor *d40_prep_memcpy(struct dma_chan *chan, if (d40c->log_num != D40_PHY_CHAN) { - if (d40_pool_lli_alloc(d40d, 1, true) < 0) { + if (d40_pool_lli_alloc(d40d, d40d->lli_len, true) < 0) { dev_err(&d40c->chan.dev->device, "[%s] Out of memory\n", __func__); goto err; } - d40d->lli_len = 1; d40d->lli_current = 0; - d40_log_fill_lli(d40d->lli_log.src, - src, - size, - d40c->log_def.lcsp1, - d40c->dma_cfg.src_info.data_width, - true); + if (d40_log_buf_to_lli(d40d->lli_log.src, + src, + size, + d40c->log_def.lcsp1, + d40c->dma_cfg.src_info.data_width, + d40c->dma_cfg.dst_info.data_width, + true) == NULL) + goto err; - d40_log_fill_lli(d40d->lli_log.dst, - dst, - size, - d40c->log_def.lcsp3, - d40c->dma_cfg.dst_info.data_width, - true); + if (d40_log_buf_to_lli(d40d->lli_log.dst, + dst, + size, + d40c->log_def.lcsp3, + d40c->dma_cfg.dst_info.data_width, + d40c->dma_cfg.src_info.data_width, + true) == NULL) + goto err; } else { - if (d40_pool_lli_alloc(d40d, 1, false) < 0) { + if (d40_pool_lli_alloc(d40d, d40d->lli_len, false) < 0) { dev_err(&d40c->chan.dev->device, "[%s] Out of memory\n", __func__); goto err; } - err = d40_phy_fill_lli(d40d->lli_phy.src, + if (d40_phy_buf_to_lli(d40d->lli_phy.src, src, size, d40c->dma_cfg.src_info.psize, @@ -1889,11 +1986,11 @@ static struct dma_async_tx_descriptor *d40_prep_memcpy(struct dma_chan *chan, d40c->src_def_cfg, true, d40c->dma_cfg.src_info.data_width, - false); - if (err) - goto err_fill_lli; + d40c->dma_cfg.dst_info.data_width, + false) == NULL) + goto err; - err = d40_phy_fill_lli(d40d->lli_phy.dst, + if (d40_phy_buf_to_lli(d40d->lli_phy.dst, dst, size, d40c->dma_cfg.dst_info.psize, @@ -1901,10 +1998,9 @@ static struct dma_async_tx_descriptor *d40_prep_memcpy(struct dma_chan *chan, d40c->dst_def_cfg, true, d40c->dma_cfg.dst_info.data_width, - false); - - if (err) - goto err_fill_lli; + d40c->dma_cfg.src_info.data_width, + false) == NULL) + goto err; (void) dma_map_single(d40c->base->dev, d40d->lli_phy.src, d40d->lli_pool.size, DMA_TO_DEVICE); @@ -1913,9 +2009,6 @@ static struct dma_async_tx_descriptor *d40_prep_memcpy(struct dma_chan *chan, spin_unlock_irqrestore(&d40c->lock, flags); return &d40d->txd; -err_fill_lli: - dev_err(&d40c->chan.dev->device, - "[%s] Failed filling in PHY LLI\n", __func__); err: if (d40d) d40_desc_free(d40c, d40d); @@ -1945,13 +2038,21 @@ static int d40_prep_slave_sg_log(struct d40_desc *d40d, dma_addr_t dev_addr = 0; int total_size; - if (d40_pool_lli_alloc(d40d, sg_len, true) < 0) { + d40d->lli_len = d40_sg_2_dmalen(sgl, sg_len, + d40c->dma_cfg.src_info.data_width, + d40c->dma_cfg.dst_info.data_width); + if (d40d->lli_len < 0) { + dev_err(&d40c->chan.dev->device, + "[%s] Unaligned size\n", __func__); + return -EINVAL; + } + + if (d40_pool_lli_alloc(d40d, d40d->lli_len, true) < 0) { dev_err(&d40c->chan.dev->device, "[%s] Out of memory\n", __func__); return -ENOMEM; } - d40d->lli_len = sg_len; d40d->lli_current = 0; if (direction == DMA_FROM_DEVICE) @@ -1993,13 +2094,21 @@ static int d40_prep_slave_sg_phy(struct d40_desc *d40d, dma_addr_t dst_dev_addr; int res; - if (d40_pool_lli_alloc(d40d, sgl_len, false) < 0) { + d40d->lli_len = d40_sg_2_dmalen(sgl, sgl_len, + d40c->dma_cfg.src_info.data_width, + d40c->dma_cfg.dst_info.data_width); + if (d40d->lli_len < 0) { + dev_err(&d40c->chan.dev->device, + "[%s] Unaligned size\n", __func__); + return -EINVAL; + } + + if (d40_pool_lli_alloc(d40d, d40d->lli_len, false) < 0) { dev_err(&d40c->chan.dev->device, "[%s] Out of memory\n", __func__); return -ENOMEM; } - d40d->lli_len = sgl_len; d40d->lli_current = 0; if (direction == DMA_FROM_DEVICE) { @@ -2024,6 +2133,7 @@ static int d40_prep_slave_sg_phy(struct d40_desc *d40d, virt_to_phys(d40d->lli_phy.src), d40c->src_def_cfg, d40c->dma_cfg.src_info.data_width, + d40c->dma_cfg.dst_info.data_width, d40c->dma_cfg.src_info.psize); if (res < 0) return res; @@ -2035,6 +2145,7 @@ static int d40_prep_slave_sg_phy(struct d40_desc *d40d, virt_to_phys(d40d->lli_phy.dst), d40c->dst_def_cfg, d40c->dma_cfg.dst_info.data_width, + d40c->dma_cfg.src_info.data_width, d40c->dma_cfg.dst_info.psize); if (res < 0) return res; @@ -2244,6 +2355,8 @@ static void d40_set_runtime_config(struct dma_chan *chan, psize = STEDMA40_PSIZE_PHY_8; else if (config_maxburst >= 4) psize = STEDMA40_PSIZE_PHY_4; + else if (config_maxburst >= 2) + psize = STEDMA40_PSIZE_PHY_2; else psize = STEDMA40_PSIZE_PHY_1; } diff --git a/drivers/dma/ste_dma40_ll.c b/drivers/dma/ste_dma40_ll.c index 8557cb8..0b096a3 100644 --- a/drivers/dma/ste_dma40_ll.c +++ b/drivers/dma/ste_dma40_ll.c @@ -1,6 +1,6 @@ /* * Copyright (C) ST-Ericsson SA 2007-2010 - * Author: Per Friden <per.friden@stericsson.com> for ST-Ericsson + * Author: Per Forlin <per.forlin@stericsson.com> for ST-Ericsson * Author: Jonas Aaberg <jonas.aberg@stericsson.com> for ST-Ericsson * License terms: GNU General Public License (GPL) version 2 */ @@ -122,15 +122,15 @@ void d40_phy_cfg(struct stedma40_chan_cfg *cfg, *dst_cfg = dst; } -int d40_phy_fill_lli(struct d40_phy_lli *lli, - dma_addr_t data, - u32 data_size, - int psize, - dma_addr_t next_lli, - u32 reg_cfg, - bool term_int, - u32 data_width, - bool is_device) +static int d40_phy_fill_lli(struct d40_phy_lli *lli, + dma_addr_t data, + u32 data_size, + int psize, + dma_addr_t next_lli, + u32 reg_cfg, + bool term_int, + u32 data_width, + bool is_device) { int num_elems; @@ -139,13 +139,6 @@ int d40_phy_fill_lli(struct d40_phy_lli *lli, else num_elems = 2 << psize; - /* - * Size is 16bit. data_width is 8, 16, 32 or 64 bit - * Block large than 64 KiB must be split. - */ - if (data_size > (0xffff << data_width)) - return -EINVAL; - /* Must be aligned */ if (!IS_ALIGNED(data, 0x1 << data_width)) return -EINVAL; @@ -187,55 +180,118 @@ int d40_phy_fill_lli(struct d40_phy_lli *lli, return 0; } +static int d40_seg_size(int size, int data_width1, int data_width2) +{ + u32 max_w = max(data_width1, data_width2); + u32 min_w = min(data_width1, data_width2); + u32 seg_max = ALIGN(STEDMA40_MAX_SEG_SIZE << min_w, 1 << max_w); + + if (seg_max > STEDMA40_MAX_SEG_SIZE) + seg_max -= (1 << max_w); + + if (size <= seg_max) + return size; + + if (size <= 2 * seg_max) + return ALIGN(size / 2, 1 << max_w); + + return seg_max; +} + +struct d40_phy_lli *d40_phy_buf_to_lli(struct d40_phy_lli *lli, + dma_addr_t addr, + u32 size, + int psize, + dma_addr_t lli_phys, + u32 reg_cfg, + bool term_int, + u32 data_width1, + u32 data_width2, + bool is_device) +{ + int err; + dma_addr_t next = lli_phys; + int size_rest = size; + int size_seg = 0; + + do { + size_seg = d40_seg_size(size_rest, data_width1, data_width2); + size_rest -= size_seg; + + if (term_int && size_rest == 0) + next = 0; + else + next = ALIGN(next + sizeof(struct d40_phy_lli), + D40_LLI_ALIGN); + + err = d40_phy_fill_lli(lli, + addr, + size_seg, + psize, + next, + reg_cfg, + !next, + data_width1, + is_device); + + if (err) + goto err; + + lli++; + if (!is_device) + addr += size_seg; + } while (size_rest); + + return lli; + + err: + return NULL; +} + int d40_phy_sg_to_lli(struct scatterlist *sg, int sg_len, dma_addr_t target, - struct d40_phy_lli *lli, + struct d40_phy_lli *lli_sg, dma_addr_t lli_phys, u32 reg_cfg, - u32 data_width, + u32 data_width1, + u32 data_width2, int psize) { int total_size = 0; int i; struct scatterlist *current_sg = sg; - dma_addr_t next_lli_phys; dma_addr_t dst; - int err = 0; + struct d40_phy_lli *lli = lli_sg; + dma_addr_t l_phys = lli_phys; for_each_sg(sg, current_sg, sg_len, i) { total_size += sg_dma_len(current_sg); - /* If this scatter list entry is the last one, no next link */ - if (sg_len - 1 == i) - next_lli_phys = 0; - else - next_lli_phys = ALIGN(lli_phys + (i + 1) * - sizeof(struct d40_phy_lli), - D40_LLI_ALIGN); - if (target) dst = target; else dst = sg_phys(current_sg); - err = d40_phy_fill_lli(&lli[i], - dst, - sg_dma_len(current_sg), - psize, - next_lli_phys, - reg_cfg, - !next_lli_phys, - data_width, - target == dst); - if (err) - goto err; + l_phys = ALIGN(lli_phys + (lli - lli_sg) * + sizeof(struct d40_phy_lli), D40_LLI_ALIGN); + + lli = d40_phy_buf_to_lli(lli, + dst, + sg_dma_len(current_sg), + psize, + l_phys, + reg_cfg, + sg_len - 1 == i, + data_width1, + data_width2, + target == dst); + if (lli == NULL) + return -EINVAL; } return total_size; -err: - return err; } @@ -315,17 +371,20 @@ void d40_log_lli_lcla_write(struct d40_log_lli *lcla, writel(lli_dst->lcsp13, &lcla[1].lcsp13); } -void d40_log_fill_lli(struct d40_log_lli *lli, - dma_addr_t data, u32 data_size, - u32 reg_cfg, - u32 data_width, - bool addr_inc) +static void d40_log_fill_lli(struct d40_log_lli *lli, + dma_addr_t data, u32 data_size, + u32 reg_cfg, + u32 data_width, + bool addr_inc) { lli->lcsp13 = reg_cfg; /* The number of elements to transfer */ lli->lcsp02 = ((data_size >> data_width) << D40_MEM_LCSP0_ECNT_POS) & D40_MEM_LCSP0_ECNT_MASK; + + BUG_ON((data_size >> data_width) > STEDMA40_MAX_SEG_SIZE); + /* 16 LSBs address of the current element */ lli->lcsp02 |= data & D40_MEM_LCSP0_SPTR_MASK; /* 16 MSBs address of the current element */ @@ -348,55 +407,94 @@ int d40_log_sg_to_dev(struct scatterlist *sg, int total_size = 0; struct scatterlist *current_sg = sg; int i; + struct d40_log_lli *lli_src = lli->src; + struct d40_log_lli *lli_dst = lli->dst; for_each_sg(sg, current_sg, sg_len, i) { total_size += sg_dma_len(current_sg); if (direction == DMA_TO_DEVICE) { - d40_log_fill_lli(&lli->src[i], - sg_phys(current_sg), - sg_dma_len(current_sg), - lcsp->lcsp1, src_data_width, - true); - d40_log_fill_lli(&lli->dst[i], - dev_addr, - sg_dma_len(current_sg), - lcsp->lcsp3, dst_data_width, - false); + lli_src = + d40_log_buf_to_lli(lli_src, + sg_phys(current_sg), + sg_dma_len(current_sg), + lcsp->lcsp1, src_data_width, + dst_data_width, + true); + lli_dst = + d40_log_buf_to_lli(lli_dst, + dev_addr, + sg_dma_len(current_sg), + lcsp->lcsp3, dst_data_width, + src_data_width, + false); } else { - d40_log_fill_lli(&lli->dst[i], - sg_phys(current_sg), - sg_dma_len(current_sg), - lcsp->lcsp3, dst_data_width, - true); - d40_log_fill_lli(&lli->src[i], - dev_addr, - sg_dma_len(current_sg), - lcsp->lcsp1, src_data_width, - false); + lli_dst = + d40_log_buf_to_lli(lli_dst, + sg_phys(current_sg), + sg_dma_len(current_sg), + lcsp->lcsp3, dst_data_width, + src_data_width, + true); + lli_src = + d40_log_buf_to_lli(lli_src, + dev_addr, + sg_dma_len(current_sg), + lcsp->lcsp1, src_data_width, + dst_data_width, + false); } } return total_size; } +struct d40_log_lli *d40_log_buf_to_lli(struct d40_log_lli *lli_sg, + dma_addr_t addr, + int size, + u32 lcsp13, /* src or dst*/ + u32 data_width1, + u32 data_width2, + bool addr_inc) +{ + struct d40_log_lli *lli = lli_sg; + int size_rest = size; + int size_seg = 0; + + do { + size_seg = d40_seg_size(size_rest, data_width1, data_width2); + size_rest -= size_seg; + + d40_log_fill_lli(lli, + addr, + size_seg, + lcsp13, data_width1, + addr_inc); + if (addr_inc) + addr += size_seg; + lli++; + } while (size_rest); + + return lli; +} + int d40_log_sg_to_lli(struct scatterlist *sg, int sg_len, struct d40_log_lli *lli_sg, u32 lcsp13, /* src or dst*/ - u32 data_width) + u32 data_width1, u32 data_width2) { int total_size = 0; struct scatterlist *current_sg = sg; int i; + struct d40_log_lli *lli = lli_sg; for_each_sg(sg, current_sg, sg_len, i) { total_size += sg_dma_len(current_sg); - - d40_log_fill_lli(&lli_sg[i], - sg_phys(current_sg), - sg_dma_len(current_sg), - lcsp13, data_width, - true); + lli = d40_log_buf_to_lli(lli, + sg_phys(current_sg), + sg_dma_len(current_sg), + lcsp13, + data_width1, data_width2, true); } return total_size; } diff --git a/drivers/dma/ste_dma40_ll.h b/drivers/dma/ste_dma40_ll.h index 9e419b9..9cc4349 100644 --- a/drivers/dma/ste_dma40_ll.h +++ b/drivers/dma/ste_dma40_ll.h @@ -292,18 +292,20 @@ int d40_phy_sg_to_lli(struct scatterlist *sg, struct d40_phy_lli *lli, dma_addr_t lli_phys, u32 reg_cfg, - u32 data_width, + u32 data_width1, + u32 data_width2, int psize); -int d40_phy_fill_lli(struct d40_phy_lli *lli, - dma_addr_t data, - u32 data_size, - int psize, - dma_addr_t next_lli, - u32 reg_cfg, - bool term_int, - u32 data_width, - bool is_device); +struct d40_phy_lli *d40_phy_buf_to_lli(struct d40_phy_lli *lli, + dma_addr_t data, + u32 data_size, + int psize, + dma_addr_t next_lli, + u32 reg_cfg, + bool term_int, + u32 data_width1, + u32 data_width2, + bool is_device); void d40_phy_lli_write(void __iomem *virtbase, u32 phy_chan_num, @@ -312,12 +314,12 @@ void d40_phy_lli_write(void __iomem *virtbase, /* Logical channels */ -void d40_log_fill_lli(struct d40_log_lli *lli, - dma_addr_t data, - u32 data_size, - u32 reg_cfg, - u32 data_width, - bool addr_inc); +struct d40_log_lli *d40_log_buf_to_lli(struct d40_log_lli *lli_sg, + dma_addr_t addr, + int size, + u32 lcsp13, /* src or dst*/ + u32 data_width1, u32 data_width2, + bool addr_inc); int d40_log_sg_to_dev(struct scatterlist *sg, int sg_len, @@ -332,7 +334,7 @@ int d40_log_sg_to_lli(struct scatterlist *sg, int sg_len, struct d40_log_lli *lli_sg, u32 lcsp13, /* src or dst*/ - u32 data_width); + u32 data_width1, u32 data_width2); void d40_log_lli_lcpa_write(struct d40_log_lli_full *lcpa, struct d40_log_lli *lli_dst, diff --git a/drivers/gpu/drm/nouveau/nouveau_drv.h b/drivers/gpu/drm/nouveau/nouveau_drv.h index 46e3257..01bffc4 100644 --- a/drivers/gpu/drm/nouveau/nouveau_drv.h +++ b/drivers/gpu/drm/nouveau/nouveau_drv.h @@ -160,6 +160,7 @@ enum nouveau_flags { #define NVOBJ_FLAG_ZERO_ALLOC (1 << 1) #define NVOBJ_FLAG_ZERO_FREE (1 << 2) #define NVOBJ_FLAG_VM (1 << 3) +#define NVOBJ_FLAG_VM_USER (1 << 4) #define NVOBJ_CINST_GLOBAL 0xdeadbeef @@ -1576,6 +1577,20 @@ nv_match_device(struct drm_device *dev, unsigned device, dev->pdev->subsystem_device == sub_device; } +/* returns 1 if device is one of the nv4x using the 0x4497 object class, + * helpful to determine a number of other hardware features + */ +static inline int +nv44_graph_class(struct drm_device *dev) +{ + struct drm_nouveau_private *dev_priv = dev->dev_private; + + if ((dev_priv->chipset & 0xf0) == 0x60) + return 1; + + return !(0x0baf & (1 << (dev_priv->chipset & 0x0f))); +} + /* memory type/access flags, do not match hardware values */ #define NV_MEM_ACCESS_RO 1 #define NV_MEM_ACCESS_WO 2 diff --git a/drivers/gpu/drm/nouveau/nouveau_fbcon.c b/drivers/gpu/drm/nouveau/nouveau_fbcon.c index 6d56a54..60769d2 100644 --- a/drivers/gpu/drm/nouveau/nouveau_fbcon.c +++ b/drivers/gpu/drm/nouveau/nouveau_fbcon.c @@ -352,8 +352,8 @@ nouveau_fbcon_create(struct nouveau_fbdev *nfbdev, FBINFO_HWACCEL_IMAGEBLIT; info->flags |= FBINFO_CAN_FORCE_OUTPUT; info->fbops = &nouveau_fbcon_sw_ops; - info->fix.smem_start = dev->mode_config.fb_base + - (nvbo->bo.mem.start << PAGE_SHIFT); + info->fix.smem_start = nvbo->bo.mem.bus.base + + nvbo->bo.mem.bus.offset; info->fix.smem_len = size; info->screen_base = nvbo_kmap_obj_iovirtual(nouveau_fb->nvbo); diff --git a/drivers/gpu/drm/nouveau/nouveau_mem.c b/drivers/gpu/drm/nouveau/nouveau_mem.c index 69044eb..26347b7 100644 --- a/drivers/gpu/drm/nouveau/nouveau_mem.c +++ b/drivers/gpu/drm/nouveau/nouveau_mem.c @@ -742,30 +742,24 @@ nouveau_vram_manager_debug(struct ttm_mem_type_manager *man, const char *prefix) { struct nouveau_mm *mm = man->priv; struct nouveau_mm_node *r; - u64 total = 0, ttotal[3] = {}, tused[3] = {}, tfree[3] = {}; - int i; + u32 total = 0, free = 0; mutex_lock(&mm->mutex); list_for_each_entry(r, &mm->nodes, nl_entry) { - printk(KERN_DEBUG "%s %s-%d: 0x%010llx 0x%010llx\n", - prefix, r->free ? "free" : "used", r->type, - ((u64)r->offset << 12), + printk(KERN_DEBUG "%s %d: 0x%010llx 0x%010llx\n", + prefix, r->type, ((u64)r->offset << 12), (((u64)r->offset + r->length) << 12)); + total += r->length; - ttotal[r->type] += r->length; - if (r->free) - tfree[r->type] += r->length; - else - tused[r->type] += r->length; + if (!r->type) + free += r->length; } mutex_unlock(&mm->mutex); - printk(KERN_DEBUG "%s total: 0x%010llx\n", prefix, total << 12); - for (i = 0; i < 3; i++) { - printk(KERN_DEBUG "%s type %d: 0x%010llx, " - "used 0x%010llx, free 0x%010llx\n", prefix, - i, ttotal[i] << 12, tused[i] << 12, tfree[i] << 12); - } + printk(KERN_DEBUG "%s total: 0x%010llx free: 0x%010llx\n", + prefix, (u64)total << 12, (u64)free << 12); + printk(KERN_DEBUG "%s block: 0x%08x\n", + prefix, mm->block_size << 12); } const struct ttm_mem_type_manager_func nouveau_vram_manager = { diff --git a/drivers/gpu/drm/nouveau/nouveau_mm.c b/drivers/gpu/drm/nouveau/nouveau_mm.c index cdbb11e..8844b50c 100644 --- a/drivers/gpu/drm/nouveau/nouveau_mm.c +++ b/drivers/gpu/drm/nouveau/nouveau_mm.c @@ -48,175 +48,76 @@ region_split(struct nouveau_mm *rmm, struct nouveau_mm_node *a, u32 size) b->offset = a->offset; b->length = size; - b->free = a->free; b->type = a->type; a->offset += size; a->length -= size; list_add_tail(&b->nl_entry, &a->nl_entry); - if (b->free) + if (b->type == 0) list_add_tail(&b->fl_entry, &a->fl_entry); return b; } -static struct nouveau_mm_node * -nouveau_mm_merge(struct nouveau_mm *rmm, struct nouveau_mm_node *this) -{ - struct nouveau_mm_node *prev, *next; - - /* try to merge with free adjacent entries of same type */ - prev = list_entry(this->nl_entry.prev, struct nouveau_mm_node, nl_entry); - if (this->nl_entry.prev != &rmm->nodes) { - if (prev->free && prev->type == this->type) { - prev->length += this->length; - region_put(rmm, this); - this = prev; - } - } - - next = list_entry(this->nl_entry.next, struct nouveau_mm_node, nl_entry); - if (this->nl_entry.next != &rmm->nodes) { - if (next->free && next->type == this->type) { - next->offset = this->offset; - next->length += this->length; - region_put(rmm, this); - this = next; - } - } - - return this; -} +#define node(root, dir) ((root)->nl_entry.dir == &rmm->nodes) ? NULL : \ + list_entry((root)->nl_entry.dir, struct nouveau_mm_node, nl_entry) void nouveau_mm_put(struct nouveau_mm *rmm, struct nouveau_mm_node *this) { - u32 block_s, block_l; + struct nouveau_mm_node *prev = node(this, prev); + struct nouveau_mm_node *next = node(this, next); - this->free = true; list_add(&this->fl_entry, &rmm->free); - this = nouveau_mm_merge(rmm, this); - - /* any entirely free blocks now? we'll want to remove typing - * on them now so they can be use for any memory allocation - */ - block_s = roundup(this->offset, rmm->block_size); - if (block_s + rmm->block_size > this->offset + this->length) - return; + this->type = 0; - /* split off any still-typed region at the start */ - if (block_s != this->offset) { - if (!region_split(rmm, this, block_s - this->offset)) - return; + if (prev && prev->type == 0) { + prev->length += this->length; + region_put(rmm, this); + this = prev; } - /* split off the soon-to-be-untyped block(s) */ - block_l = rounddown(this->length, rmm->block_size); - if (block_l != this->length) { - this = region_split(rmm, this, block_l); - if (!this) - return; + if (next && next->type == 0) { + next->offset = this->offset; + next->length += this->length; + region_put(rmm, this); } - - /* mark as having no type, and retry merge with any adjacent - * untyped blocks - */ - this->type = 0; - nouveau_mm_merge(rmm, this); } int nouveau_mm_get(struct nouveau_mm *rmm, int type, u32 size, u32 size_nc, u32 align, struct nouveau_mm_node **pnode) { - struct nouveau_mm_node *this, *tmp, *next; - u32 splitoff, avail, alloc; - - list_for_each_entry_safe(this, tmp, &rmm->free, fl_entry) { - next = list_entry(this->nl_entry.next, struct nouveau_mm_node, nl_entry); - if (this->nl_entry.next == &rmm->nodes) - next = NULL; - - /* skip wrongly typed blocks */ - if (this->type && this->type != type) + struct nouveau_mm_node *prev, *this, *next; + u32 min = size_nc ? size_nc : size; + u32 align_mask = align - 1; + u32 splitoff; + u32 s, e; + + list_for_each_entry(this, &rmm->free, fl_entry) { + e = this->offset + this->length; + s = this->offset; + + prev = node(this, prev); + if (prev && prev->type != type) + s = roundup(s, rmm->block_size); + + next = node(this, next); + if (next && next->type != type) + e = rounddown(e, rmm->block_size); + + s = (s + align_mask) & ~align_mask; + e &= ~align_mask; + if (s > e || e - s < min) continue; - /* account for alignment */ - splitoff = this->offset & (align - 1); - if (splitoff) - splitoff = align - splitoff; - - if (this->length <= splitoff) - continue; - - /* determine total memory available from this, and - * the next block (if appropriate) - */ - avail = this->length; - if (next && next->free && (!next->type || next->type == type)) - avail += next->length; - - avail -= splitoff; - - /* determine allocation size */ - if (size_nc) { - alloc = min(avail, size); - alloc = rounddown(alloc, size_nc); - if (alloc == 0) - continue; - } else { - alloc = size; - if (avail < alloc) - continue; - } - - /* untyped block, split off a chunk that's a multiple - * of block_size and type it - */ - if (!this->type) { - u32 block = roundup(alloc + splitoff, rmm->block_size); - if (this->length < block) - continue; - - this = region_split(rmm, this, block); - if (!this) - return -ENOMEM; - - this->type = type; - } - - /* stealing memory from adjacent block */ - if (alloc > this->length) { - u32 amount = alloc - (this->length - splitoff); - - if (!next->type) { - amount = roundup(amount, rmm->block_size); - - next = region_split(rmm, next, amount); - if (!next) - return -ENOMEM; - - next->type = type; - } - - this->length += amount; - next->offset += amount; - next->length -= amount; - if (!next->length) { - list_del(&next->nl_entry); - list_del(&next->fl_entry); - kfree(next); - } - } - - if (splitoff) { - if (!region_split(rmm, this, splitoff)) - return -ENOMEM; - } + splitoff = s - this->offset; + if (splitoff && !region_split(rmm, this, splitoff)) + return -ENOMEM; - this = region_split(rmm, this, alloc); - if (this == NULL) + this = region_split(rmm, this, min(size, e - s)); + if (!this) return -ENOMEM; - this->free = false; + this->type = type; list_del(&this->fl_entry); *pnode = this; return 0; @@ -234,7 +135,6 @@ nouveau_mm_init(struct nouveau_mm **prmm, u32 offset, u32 length, u32 block) heap = kzalloc(sizeof(*heap), GFP_KERNEL); if (!heap) return -ENOMEM; - heap->free = true; heap->offset = roundup(offset, block); heap->length = rounddown(offset + length, block) - heap->offset; diff --git a/drivers/gpu/drm/nouveau/nouveau_mm.h b/drivers/gpu/drm/nouveau/nouveau_mm.h index af38449..798eaf3 100644 --- a/drivers/gpu/drm/nouveau/nouveau_mm.h +++ b/drivers/gpu/drm/nouveau/nouveau_mm.h @@ -30,9 +30,7 @@ struct nouveau_mm_node { struct list_head fl_entry; struct list_head rl_entry; - bool free; - int type; - + u8 type; u32 offset; u32 length; }; diff --git a/drivers/gpu/drm/nouveau/nv40_graph.c b/drivers/gpu/drm/nouveau/nv40_graph.c index 19ef92a..8870d72 100644 --- a/drivers/gpu/drm/nouveau/nv40_graph.c +++ b/drivers/gpu/drm/nouveau/nv40_graph.c @@ -451,8 +451,7 @@ nv40_graph_register(struct drm_device *dev) NVOBJ_CLASS(dev, 0x309e, GR); /* swzsurf */ /* curie */ - if (dev_priv->chipset >= 0x60 || - 0x00005450 & (1 << (dev_priv->chipset & 0x0f))) + if (nv44_graph_class(dev)) NVOBJ_CLASS(dev, 0x4497, GR); else NVOBJ_CLASS(dev, 0x4097, GR); diff --git a/drivers/gpu/drm/nouveau/nv40_grctx.c b/drivers/gpu/drm/nouveau/nv40_grctx.c index ce58509..f70447d 100644 --- a/drivers/gpu/drm/nouveau/nv40_grctx.c +++ b/drivers/gpu/drm/nouveau/nv40_grctx.c @@ -118,17 +118,6 @@ */ static int -nv40_graph_4097(struct drm_device *dev) -{ - struct drm_nouveau_private *dev_priv = dev->dev_private; - - if ((dev_priv->chipset & 0xf0) == 0x60) - return 0; - - return !!(0x0baf & (1 << dev_priv->chipset)); -} - -static int nv40_graph_vs_count(struct drm_device *dev) { struct drm_nouveau_private *dev_priv = dev->dev_private; @@ -219,7 +208,7 @@ nv40_graph_construct_general(struct nouveau_grctx *ctx) gr_def(ctx, 0x4009dc, 0x80000000); } else { cp_ctx(ctx, 0x400840, 20); - if (!nv40_graph_4097(ctx->dev)) { + if (nv44_graph_class(ctx->dev)) { for (i = 0; i < 8; i++) gr_def(ctx, 0x400860 + (i * 4), 0x00000001); } @@ -228,7 +217,7 @@ nv40_graph_construct_general(struct nouveau_grctx *ctx) gr_def(ctx, 0x400888, 0x00000040); cp_ctx(ctx, 0x400894, 11); gr_def(ctx, 0x400894, 0x00000040); - if (nv40_graph_4097(ctx->dev)) { + if (!nv44_graph_class(ctx->dev)) { for (i = 0; i < 8; i++) gr_def(ctx, 0x4008a0 + (i * 4), 0x80000000); } @@ -546,7 +535,7 @@ nv40_graph_construct_state3d_2(struct nouveau_grctx *ctx) static void nv40_graph_construct_state3d_3(struct nouveau_grctx *ctx) { - int len = nv40_graph_4097(ctx->dev) ? 0x0684 : 0x0084; + int len = nv44_graph_class(ctx->dev) ? 0x0084 : 0x0684; cp_out (ctx, 0x300000); cp_lsr (ctx, len - 4); @@ -582,11 +571,11 @@ nv40_graph_construct_shader(struct nouveau_grctx *ctx) } else { b0_offset = 0x1d40/4; /* 2200 */ b1_offset = 0x3f40/4; /* 0b00 : 0a40 */ - vs_len = nv40_graph_4097(dev) ? 0x4a40/4 : 0x4980/4; + vs_len = nv44_graph_class(dev) ? 0x4980/4 : 0x4a40/4; } cp_lsr(ctx, vs_len * vs_nr + 0x300/4); - cp_out(ctx, nv40_graph_4097(dev) ? 0x800041 : 0x800029); + cp_out(ctx, nv44_graph_class(dev) ? 0x800029 : 0x800041); offset = ctx->ctxvals_pos; ctx->ctxvals_pos += (0x0300/4 + (vs_nr * vs_len)); diff --git a/drivers/gpu/drm/nouveau/nv40_mc.c b/drivers/gpu/drm/nouveau/nv40_mc.c index e4e72c1..03c0d4c 100644 --- a/drivers/gpu/drm/nouveau/nv40_mc.c +++ b/drivers/gpu/drm/nouveau/nv40_mc.c @@ -6,27 +6,17 @@ int nv40_mc_init(struct drm_device *dev) { - struct drm_nouveau_private *dev_priv = dev->dev_private; - uint32_t tmp; - /* Power up everything, resetting each individual unit will * be done later if needed. */ nv_wr32(dev, NV03_PMC_ENABLE, 0xFFFFFFFF); - switch (dev_priv->chipset) { - case 0x44: - case 0x46: /* G72 */ - case 0x4e: - case 0x4c: /* C51_G7X */ - tmp = nv_rd32(dev, NV04_PFB_FIFO_DATA); + if (nv44_graph_class(dev)) { + u32 tmp = nv_rd32(dev, NV04_PFB_FIFO_DATA); nv_wr32(dev, NV40_PMC_1700, tmp); nv_wr32(dev, NV40_PMC_1704, 0); nv_wr32(dev, NV40_PMC_1708, 0); nv_wr32(dev, NV40_PMC_170C, tmp); - break; - default: - break; } return 0; diff --git a/drivers/gpu/drm/nouveau/nv50_instmem.c b/drivers/gpu/drm/nouveau/nv50_instmem.c index 2e1b1cd..ea00418 100644 --- a/drivers/gpu/drm/nouveau/nv50_instmem.c +++ b/drivers/gpu/drm/nouveau/nv50_instmem.c @@ -332,8 +332,11 @@ nv50_instmem_get(struct nouveau_gpuobj *gpuobj, u32 size, u32 align) gpuobj->vinst = node->vram->offset; if (gpuobj->flags & NVOBJ_FLAG_VM) { - ret = nouveau_vm_get(dev_priv->chan_vm, size, 12, - NV_MEM_ACCESS_RW | NV_MEM_ACCESS_SYS, + u32 flags = NV_MEM_ACCESS_RW; + if (!(gpuobj->flags & NVOBJ_FLAG_VM_USER)) + flags |= NV_MEM_ACCESS_SYS; + + ret = nouveau_vm_get(dev_priv->chan_vm, size, 12, flags, &node->chan_vma); if (ret) { vram->put(dev, &node->vram); diff --git a/drivers/gpu/drm/nouveau/nvc0_graph.c b/drivers/gpu/drm/nouveau/nvc0_graph.c index 5feacd5..e6ea7d8 100644 --- a/drivers/gpu/drm/nouveau/nvc0_graph.c +++ b/drivers/gpu/drm/nouveau/nvc0_graph.c @@ -105,7 +105,8 @@ nvc0_graph_create_context_mmio_list(struct nouveau_channel *chan) if (ret) return ret; - ret = nouveau_gpuobj_new(dev, NULL, 384 * 1024, 4096, NVOBJ_FLAG_VM, + ret = nouveau_gpuobj_new(dev, NULL, 384 * 1024, 4096, + NVOBJ_FLAG_VM | NVOBJ_FLAG_VM_USER, &grch->unk418810); if (ret) return ret; diff --git a/drivers/gpu/drm/nouveau/nvc0_vm.c b/drivers/gpu/drm/nouveau/nvc0_vm.c index 4b9251b..e4e83c2 100644 --- a/drivers/gpu/drm/nouveau/nvc0_vm.c +++ b/drivers/gpu/drm/nouveau/nvc0_vm.c @@ -48,8 +48,8 @@ nvc0_vm_addr(struct nouveau_vma *vma, u64 phys, u32 memtype, u32 target) phys >>= 8; phys |= 0x00000001; /* present */ -// if (vma->access & NV_MEM_ACCESS_SYS) -// phys |= 0x00000002; + if (vma->access & NV_MEM_ACCESS_SYS) + phys |= 0x00000002; phys |= ((u64)target << 32); phys |= ((u64)memtype << 36); diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c index 7fe8ebd..a8973ac 100644 --- a/drivers/gpu/drm/radeon/evergreen.c +++ b/drivers/gpu/drm/radeon/evergreen.c @@ -3002,31 +3002,6 @@ int evergreen_copy_blit(struct radeon_device *rdev, return 0; } -static bool evergreen_card_posted(struct radeon_device *rdev) -{ - u32 reg; - - /* first check CRTCs */ - if (rdev->flags & RADEON_IS_IGP) - reg = RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC0_REGISTER_OFFSET) | - RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC1_REGISTER_OFFSET); - else - reg = RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC0_REGISTER_OFFSET) | - RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC1_REGISTER_OFFSET) | - RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC2_REGISTER_OFFSET) | - RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC3_REGISTER_OFFSET) | - RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC4_REGISTER_OFFSET) | - RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC5_REGISTER_OFFSET); - if (reg & EVERGREEN_CRTC_MASTER_EN) - return true; - - /* then check MEM_SIZE, in case the crtcs are off */ - if (RREG32(CONFIG_MEMSIZE)) - return true; - - return false; -} - /* Plan is to move initialization in that function and use * helper function so that radeon_device_init pretty much * do nothing more than calling asic specific function. This @@ -3063,7 +3038,7 @@ int evergreen_init(struct radeon_device *rdev) if (radeon_asic_reset(rdev)) dev_warn(rdev->dev, "GPU reset failed !\n"); /* Post card if necessary */ - if (!evergreen_card_posted(rdev)) { + if (!radeon_card_posted(rdev)) { if (!rdev->bios) { dev_err(rdev->dev, "Card not posted and no BIOS - ignoring\n"); return -EINVAL; @@ -3158,6 +3133,9 @@ static void evergreen_pcie_gen2_enable(struct radeon_device *rdev) { u32 link_width_cntl, speed_cntl; + if (radeon_pcie_gen2 == 0) + return; + if (rdev->flags & RADEON_IS_IGP) return; diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c index f637595..46da5142 100644 --- a/drivers/gpu/drm/radeon/r100.c +++ b/drivers/gpu/drm/radeon/r100.c @@ -2086,12 +2086,13 @@ int r100_asic_reset(struct radeon_device *rdev) { struct r100_mc_save save; u32 status, tmp; + int ret = 0; - r100_mc_stop(rdev, &save); status = RREG32(R_000E40_RBBM_STATUS); if (!G_000E40_GUI_ACTIVE(status)) { return 0; } + r100_mc_stop(rdev, &save); status = RREG32(R_000E40_RBBM_STATUS); dev_info(rdev->dev, "(%s:%d) RBBM_STATUS=0x%08X\n", __func__, __LINE__, status); /* stop CP */ @@ -2131,11 +2132,11 @@ int r100_asic_reset(struct radeon_device *rdev) G_000E40_TAM_BUSY(status) || G_000E40_PB_BUSY(status)) { dev_err(rdev->dev, "failed to reset GPU\n"); rdev->gpu_lockup = true; - return -1; - } + ret = -1; + } else + dev_info(rdev->dev, "GPU reset succeed\n"); r100_mc_resume(rdev, &save); - dev_info(rdev->dev, "GPU reset succeed\n"); - return 0; + return ret; } void r100_set_common_regs(struct radeon_device *rdev) diff --git a/drivers/gpu/drm/radeon/r300.c b/drivers/gpu/drm/radeon/r300.c index fae5e70..cf862ca 100644 --- a/drivers/gpu/drm/radeon/r300.c +++ b/drivers/gpu/drm/radeon/r300.c @@ -405,12 +405,13 @@ int r300_asic_reset(struct radeon_device *rdev) { struct r100_mc_save save; u32 status, tmp; + int ret = 0; - r100_mc_stop(rdev, &save); status = RREG32(R_000E40_RBBM_STATUS); if (!G_000E40_GUI_ACTIVE(status)) { return 0; } + r100_mc_stop(rdev, &save); status = RREG32(R_000E40_RBBM_STATUS); dev_info(rdev->dev, "(%s:%d) RBBM_STATUS=0x%08X\n", __func__, __LINE__, status); /* stop CP */ @@ -451,11 +452,11 @@ int r300_asic_reset(struct radeon_device *rdev) if (G_000E40_GA_BUSY(status) || G_000E40_VAP_BUSY(status)) { dev_err(rdev->dev, "failed to reset GPU\n"); rdev->gpu_lockup = true; - return -1; - } + ret = -1; + } else + dev_info(rdev->dev, "GPU reset succeed\n"); r100_mc_resume(rdev, &save); - dev_info(rdev->dev, "GPU reset succeed\n"); - return 0; + return ret; } /* diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c index 6b50716..aca2236 100644 --- a/drivers/gpu/drm/radeon/r600.c +++ b/drivers/gpu/drm/radeon/r600.c @@ -2358,24 +2358,6 @@ void r600_clear_surface_reg(struct radeon_device *rdev, int reg) /* FIXME: implement */ } - -bool r600_card_posted(struct radeon_device *rdev) -{ - uint32_t reg; - - /* first check CRTCs */ - reg = RREG32(D1CRTC_CONTROL) | - RREG32(D2CRTC_CONTROL); - if (reg & CRTC_EN) - return true; - - /* then check MEM_SIZE, in case the crtcs are off */ - if (RREG32(CONFIG_MEMSIZE)) - return true; - - return false; -} - int r600_startup(struct radeon_device *rdev) { int r; @@ -2536,7 +2518,7 @@ int r600_init(struct radeon_device *rdev) if (r) return r; /* Post card if necessary */ - if (!r600_card_posted(rdev)) { + if (!radeon_card_posted(rdev)) { if (!rdev->bios) { dev_err(rdev->dev, "Card not posted and no BIOS - ignoring\n"); return -EINVAL; @@ -3658,6 +3640,9 @@ static void r600_pcie_gen2_enable(struct radeon_device *rdev) u32 link_width_cntl, lanes, speed_cntl, training_cntl, tmp; u16 link_cntl2; + if (radeon_pcie_gen2 == 0) + return; + if (rdev->flags & RADEON_IS_IGP) return; diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h index e948663..71d2a55 100644 --- a/drivers/gpu/drm/radeon/radeon.h +++ b/drivers/gpu/drm/radeon/radeon.h @@ -92,6 +92,7 @@ extern int radeon_tv; extern int radeon_audio; extern int radeon_disp_priority; extern int radeon_hw_i2c; +extern int radeon_pcie_gen2; /* * Copy from radeon_drv.h so we don't have to include both and have conflicting diff --git a/drivers/gpu/drm/radeon/radeon_drv.c b/drivers/gpu/drm/radeon/radeon_drv.c index be5cb4f..d5680a0 100644 --- a/drivers/gpu/drm/radeon/radeon_drv.c +++ b/drivers/gpu/drm/radeon/radeon_drv.c @@ -104,6 +104,7 @@ int radeon_tv = 1; int radeon_audio = 1; int radeon_disp_priority = 0; int radeon_hw_i2c = 0; +int radeon_pcie_gen2 = 0; MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers"); module_param_named(no_wb, radeon_no_wb, int, 0444); @@ -147,6 +148,9 @@ module_param_named(disp_priority, radeon_disp_priority, int, 0444); MODULE_PARM_DESC(hw_i2c, "hw i2c engine enable (0 = disable)"); module_param_named(hw_i2c, radeon_hw_i2c, int, 0444); +MODULE_PARM_DESC(pcie_gen2, "PCIE Gen2 mode (1 = enable)"); +module_param_named(pcie_gen2, radeon_pcie_gen2, int, 0444); + static int radeon_suspend(struct drm_device *dev, pm_message_t state) { drm_radeon_private_t *dev_priv = dev->dev_private; diff --git a/drivers/gpu/drm/radeon/reg_srcs/evergreen b/drivers/gpu/drm/radeon/reg_srcs/evergreen index ac40fd3..9177f91 100644 --- a/drivers/gpu/drm/radeon/reg_srcs/evergreen +++ b/drivers/gpu/drm/radeon/reg_srcs/evergreen @@ -439,7 +439,7 @@ evergreen 0x9400 0x000286EC SPI_COMPUTE_NUM_THREAD_X 0x000286F0 SPI_COMPUTE_NUM_THREAD_Y 0x000286F4 SPI_COMPUTE_NUM_THREAD_Z -0x000286F8 GDS_ADDR_SIZE +0x00028724 GDS_ADDR_SIZE 0x00028780 CB_BLEND0_CONTROL 0x00028784 CB_BLEND1_CONTROL 0x00028788 CB_BLEND2_CONTROL diff --git a/drivers/gpu/drm/radeon/rs600.c b/drivers/gpu/drm/radeon/rs600.c index b4192ac..5afe294 100644 --- a/drivers/gpu/drm/radeon/rs600.c +++ b/drivers/gpu/drm/radeon/rs600.c @@ -339,16 +339,16 @@ void rs600_bm_disable(struct radeon_device *rdev) int rs600_asic_reset(struct radeon_device *rdev) { - u32 status, tmp; - struct rv515_mc_save save; + u32 status, tmp; + int ret = 0; - /* Stops all mc clients */ - rv515_mc_stop(rdev, &save); status = RREG32(R_000E40_RBBM_STATUS); if (!G_000E40_GUI_ACTIVE(status)) { return 0; } + /* Stops all mc clients */ + rv515_mc_stop(rdev, &save); status = RREG32(R_000E40_RBBM_STATUS); dev_info(rdev->dev, "(%s:%d) RBBM_STATUS=0x%08X\n", __func__, __LINE__, status); /* stop CP */ @@ -392,11 +392,11 @@ int rs600_asic_reset(struct radeon_device *rdev) if (G_000E40_GA_BUSY(status) || G_000E40_VAP_BUSY(status)) { dev_err(rdev->dev, "failed to reset GPU\n"); rdev->gpu_lockup = true; - return -1; - } + ret = -1; + } else + dev_info(rdev->dev, "GPU reset succeed\n"); rv515_mc_resume(rdev, &save); - dev_info(rdev->dev, "GPU reset succeed\n"); - return 0; + return ret; } /* diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c index 3a264aa..491dc90 100644 --- a/drivers/gpu/drm/radeon/rv770.c +++ b/drivers/gpu/drm/radeon/rv770.c @@ -1268,7 +1268,7 @@ int rv770_init(struct radeon_device *rdev) if (r) return r; /* Post card if necessary */ - if (!r600_card_posted(rdev)) { + if (!radeon_card_posted(rdev)) { if (!rdev->bios) { dev_err(rdev->dev, "Card not posted and no BIOS - ignoring\n"); return -EINVAL; @@ -1372,6 +1372,9 @@ static void rv770_pcie_gen2_enable(struct radeon_device *rdev) u32 link_width_cntl, lanes, speed_cntl, tmp; u16 link_cntl2; + if (radeon_pcie_gen2 == 0) + return; + if (rdev->flags & RADEON_IS_IGP) return; diff --git a/drivers/infiniband/core/cache.c b/drivers/infiniband/core/cache.c index 6888356..f9ba7d7 100644 --- a/drivers/infiniband/core/cache.c +++ b/drivers/infiniband/core/cache.c @@ -308,7 +308,7 @@ static void ib_cache_event(struct ib_event_handler *handler, INIT_WORK(&work->work, ib_cache_task); work->device = event->device; work->port_num = event->element.port_num; - schedule_work(&work->work); + queue_work(ib_wq, &work->work); } } } @@ -368,7 +368,7 @@ static void ib_cache_cleanup_one(struct ib_device *device) int p; ib_unregister_event_handler(&device->cache.event_handler); - flush_scheduled_work(); + flush_workqueue(ib_wq); for (p = 0; p <= end_port(device) - start_port(device); ++p) { kfree(device->cache.pkey_cache[p]); diff --git a/drivers/infiniband/core/device.c b/drivers/infiniband/core/device.c index a19effa..f793bf2 100644 --- a/drivers/infiniband/core/device.c +++ b/drivers/infiniband/core/device.c @@ -38,7 +38,6 @@ #include <linux/slab.h> #include <linux/init.h> #include <linux/mutex.h> -#include <linux/workqueue.h> #include "core_priv.h" @@ -52,6 +51,9 @@ struct ib_client_data { void * data; }; +struct workqueue_struct *ib_wq; +EXPORT_SYMBOL_GPL(ib_wq); + static LIST_HEAD(device_list); static LIST_HEAD(client_list); @@ -718,6 +720,10 @@ static int __init ib_core_init(void) { int ret; + ib_wq = alloc_workqueue("infiniband", 0, 0); + if (!ib_wq) + return -ENOMEM; + ret = ib_sysfs_setup(); if (ret) printk(KERN_WARNING "Couldn't create InfiniBand device class\n"); @@ -726,6 +732,7 @@ static int __init ib_core_init(void) if (ret) { printk(KERN_WARNING "Couldn't set up InfiniBand P_Key/GID cache\n"); ib_sysfs_cleanup(); + destroy_workqueue(ib_wq); } return ret; @@ -736,7 +743,7 @@ static void __exit ib_core_cleanup(void) ib_cache_cleanup(); ib_sysfs_cleanup(); /* Make sure that any pending umem accounting work is done. */ - flush_scheduled_work(); + destroy_workqueue(ib_wq); } module_init(ib_core_init); diff --git a/drivers/infiniband/core/sa_query.c b/drivers/infiniband/core/sa_query.c index 91a6603..e38be1bc 100644 --- a/drivers/infiniband/core/sa_query.c +++ b/drivers/infiniband/core/sa_query.c @@ -425,7 +425,7 @@ static void ib_sa_event(struct ib_event_handler *handler, struct ib_event *event port->sm_ah = NULL; spin_unlock_irqrestore(&port->ah_lock, flags); - schedule_work(&sa_dev->port[event->element.port_num - + queue_work(ib_wq, &sa_dev->port[event->element.port_num - sa_dev->start_port].update_task); } } diff --git a/drivers/infiniband/core/umem.c b/drivers/infiniband/core/umem.c index 415e186..b645e55 100644 --- a/drivers/infiniband/core/umem.c +++ b/drivers/infiniband/core/umem.c @@ -262,7 +262,7 @@ void ib_umem_release(struct ib_umem *umem) umem->mm = mm; umem->diff = diff; - schedule_work(&umem->work); + queue_work(ib_wq, &umem->work); return; } } else diff --git a/drivers/infiniband/hw/amso1100/c2_rnic.c b/drivers/infiniband/hw/amso1100/c2_rnic.c index 85cfae4..8c81992 100644 --- a/drivers/infiniband/hw/amso1100/c2_rnic.c +++ b/drivers/infiniband/hw/amso1100/c2_rnic.c @@ -459,13 +459,12 @@ int __devinit c2_rnic_init(struct c2_dev *c2dev) IB_DEVICE_MEM_WINDOW); /* Allocate the qptr_array */ - c2dev->qptr_array = vmalloc(C2_MAX_CQS * sizeof(void *)); + c2dev->qptr_array = vzalloc(C2_MAX_CQS * sizeof(void *)); if (!c2dev->qptr_array) { return -ENOMEM; } - /* Inialize the qptr_array */ - memset(c2dev->qptr_array, 0, C2_MAX_CQS * sizeof(void *)); + /* Initialize the qptr_array */ c2dev->qptr_array[0] = (void *) &c2dev->req_vq; c2dev->qptr_array[1] = (void *) &c2dev->rep_vq; c2dev->qptr_array[2] = (void *) &c2dev->aeq; diff --git a/drivers/infiniband/hw/ehca/ipz_pt_fn.c b/drivers/infiniband/hw/ehca/ipz_pt_fn.c index 1596e30..1898d6e 100644 --- a/drivers/infiniband/hw/ehca/ipz_pt_fn.c +++ b/drivers/infiniband/hw/ehca/ipz_pt_fn.c @@ -222,15 +222,14 @@ int ipz_queue_ctor(struct ehca_pd *pd, struct ipz_queue *queue, queue->small_page = NULL; /* allocate queue page pointers */ - queue->queue_pages = kmalloc(nr_of_pages * sizeof(void *), GFP_KERNEL); + queue->queue_pages = kzalloc(nr_of_pages * sizeof(void *), GFP_KERNEL); if (!queue->queue_pages) { - queue->queue_pages = vmalloc(nr_of_pages * sizeof(void *)); + queue->queue_pages = vzalloc(nr_of_pages * sizeof(void *)); if (!queue->queue_pages) { ehca_gen_err("Couldn't allocate queue page list"); return 0; } } - memset(queue->queue_pages, 0, nr_of_pages * sizeof(void *)); /* allocate actual queue pages */ if (is_small) { diff --git a/drivers/infiniband/hw/ipath/ipath_driver.c b/drivers/infiniband/hw/ipath/ipath_driver.c index b33f045..47db4bf 100644 --- a/drivers/infiniband/hw/ipath/ipath_driver.c +++ b/drivers/infiniband/hw/ipath/ipath_driver.c @@ -199,12 +199,11 @@ static struct ipath_devdata *ipath_alloc_devdata(struct pci_dev *pdev) goto bail; } - dd = vmalloc(sizeof(*dd)); + dd = vzalloc(sizeof(*dd)); if (!dd) { dd = ERR_PTR(-ENOMEM); goto bail; } - memset(dd, 0, sizeof(*dd)); dd->ipath_unit = -1; spin_lock_irqsave(&ipath_devs_lock, flags); @@ -756,7 +755,7 @@ static void __devexit ipath_remove_one(struct pci_dev *pdev) */ ipath_shutdown_device(dd); - flush_scheduled_work(); + flush_workqueue(ib_wq); if (dd->verbs_dev) ipath_unregister_ib_device(dd->verbs_dev); diff --git a/drivers/infiniband/hw/ipath/ipath_file_ops.c b/drivers/infiniband/hw/ipath/ipath_file_ops.c index 9292a15..6d4b29c 100644 --- a/drivers/infiniband/hw/ipath/ipath_file_ops.c +++ b/drivers/infiniband/hw/ipath/ipath_file_ops.c @@ -1530,7 +1530,7 @@ static int init_subports(struct ipath_devdata *dd, } num_subports = uinfo->spu_subport_cnt; - pd->subport_uregbase = vmalloc(PAGE_SIZE * num_subports); + pd->subport_uregbase = vzalloc(PAGE_SIZE * num_subports); if (!pd->subport_uregbase) { ret = -ENOMEM; goto bail; @@ -1538,13 +1538,13 @@ static int init_subports(struct ipath_devdata *dd, /* Note: pd->port_rcvhdrq_size isn't initialized yet. */ size = ALIGN(dd->ipath_rcvhdrcnt * dd->ipath_rcvhdrentsize * sizeof(u32), PAGE_SIZE) * num_subports; - pd->subport_rcvhdr_base = vmalloc(size); + pd->subport_rcvhdr_base = vzalloc(size); if (!pd->subport_rcvhdr_base) { ret = -ENOMEM; goto bail_ureg; } - pd->subport_rcvegrbuf = vmalloc(pd->port_rcvegrbuf_chunks * + pd->subport_rcvegrbuf = vzalloc(pd->port_rcvegrbuf_chunks * pd->port_rcvegrbuf_size * num_subports); if (!pd->subport_rcvegrbuf) { @@ -1556,11 +1556,6 @@ static int init_subports(struct ipath_devdata *dd, pd->port_subport_id = uinfo->spu_subport_id; pd->active_slaves = 1; set_bit(IPATH_PORT_MASTER_UNINIT, &pd->port_flag); - memset(pd->subport_uregbase, 0, PAGE_SIZE * num_subports); - memset(pd->subport_rcvhdr_base, 0, size); - memset(pd->subport_rcvegrbuf, 0, pd->port_rcvegrbuf_chunks * - pd->port_rcvegrbuf_size * - num_subports); goto bail; bail_rhdr: diff --git a/drivers/infiniband/hw/ipath/ipath_init_chip.c b/drivers/infiniband/hw/ipath/ipath_init_chip.c index 7769382..fef0f42 100644 --- a/drivers/infiniband/hw/ipath/ipath_init_chip.c +++ b/drivers/infiniband/hw/ipath/ipath_init_chip.c @@ -442,7 +442,7 @@ static void init_shadow_tids(struct ipath_devdata *dd) struct page **pages; dma_addr_t *addrs; - pages = vmalloc(dd->ipath_cfgports * dd->ipath_rcvtidcnt * + pages = vzalloc(dd->ipath_cfgports * dd->ipath_rcvtidcnt * sizeof(struct page *)); if (!pages) { ipath_dev_err(dd, "failed to allocate shadow page * " @@ -461,9 +461,6 @@ static void init_shadow_tids(struct ipath_devdata *dd) return; } - memset(pages, 0, dd->ipath_cfgports * dd->ipath_rcvtidcnt * - sizeof(struct page *)); - dd->ipath_pageshadow = pages; dd->ipath_physshadow = addrs; } diff --git a/drivers/infiniband/hw/ipath/ipath_user_pages.c b/drivers/infiniband/hw/ipath/ipath_user_pages.c index 5e86d73..bab9f74 100644 --- a/drivers/infiniband/hw/ipath/ipath_user_pages.c +++ b/drivers/infiniband/hw/ipath/ipath_user_pages.c @@ -220,7 +220,7 @@ void ipath_release_user_pages_on_close(struct page **p, size_t num_pages) work->mm = mm; work->num_pages = num_pages; - schedule_work(&work->work); + queue_work(ib_wq, &work->work); return; bail_mm: diff --git a/drivers/infiniband/hw/mlx4/main.c b/drivers/infiniband/hw/mlx4/main.c index 4c85224..c7a6213 100644 --- a/drivers/infiniband/hw/mlx4/main.c +++ b/drivers/infiniband/hw/mlx4/main.c @@ -623,8 +623,9 @@ static int mlx4_ib_mcg_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid) struct mlx4_ib_dev *mdev = to_mdev(ibqp->device); struct mlx4_ib_qp *mqp = to_mqp(ibqp); - err = mlx4_multicast_attach(mdev->dev, &mqp->mqp, gid->raw, !!(mqp->flags & - MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK)); + err = mlx4_multicast_attach(mdev->dev, &mqp->mqp, gid->raw, + !!(mqp->flags & MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK), + MLX4_PROTOCOL_IB); if (err) return err; @@ -635,7 +636,7 @@ static int mlx4_ib_mcg_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid) return 0; err_add: - mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw); + mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw, MLX4_PROTOCOL_IB); return err; } @@ -665,7 +666,7 @@ static int mlx4_ib_mcg_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid) struct mlx4_ib_gid_entry *ge; err = mlx4_multicast_detach(mdev->dev, - &mqp->mqp, gid->raw); + &mqp->mqp, gid->raw, MLX4_PROTOCOL_IB); if (err) return err; @@ -1005,7 +1006,8 @@ static void *mlx4_ib_add(struct mlx4_dev *dev) if (mlx4_uar_alloc(dev, &ibdev->priv_uar)) goto err_pd; - ibdev->uar_map = ioremap(ibdev->priv_uar.pfn << PAGE_SHIFT, PAGE_SIZE); + ibdev->uar_map = ioremap((phys_addr_t) ibdev->priv_uar.pfn << PAGE_SHIFT, + PAGE_SIZE); if (!ibdev->uar_map) goto err_uar; MLX4_INIT_DOORBELL_LOCK(&ibdev->uar_lock); diff --git a/drivers/infiniband/hw/mthca/mthca_catas.c b/drivers/infiniband/hw/mthca/mthca_catas.c index 0aa0110..e4a08c2 100644 --- a/drivers/infiniband/hw/mthca/mthca_catas.c +++ b/drivers/infiniband/hw/mthca/mthca_catas.c @@ -146,7 +146,7 @@ static void poll_catas(unsigned long dev_ptr) void mthca_start_catas_poll(struct mthca_dev *dev) { - unsigned long addr; + phys_addr_t addr; init_timer(&dev->catas_err.timer); dev->catas_err.map = NULL; @@ -158,7 +158,8 @@ void mthca_start_catas_poll(struct mthca_dev *dev) dev->catas_err.map = ioremap(addr, dev->catas_err.size * 4); if (!dev->catas_err.map) { mthca_warn(dev, "couldn't map catastrophic error region " - "at 0x%lx/0x%x\n", addr, dev->catas_err.size * 4); + "at 0x%llx/0x%x\n", (unsigned long long) addr, + dev->catas_err.size * 4); return; } diff --git a/drivers/infiniband/hw/mthca/mthca_cmd.c b/drivers/infiniband/hw/mthca/mthca_cmd.c index f4ceecd..7bfa2a1 100644 --- a/drivers/infiniband/hw/mthca/mthca_cmd.c +++ b/drivers/infiniband/hw/mthca/mthca_cmd.c @@ -713,7 +713,7 @@ int mthca_RUN_FW(struct mthca_dev *dev, u8 *status) static void mthca_setup_cmd_doorbells(struct mthca_dev *dev, u64 base) { - unsigned long addr; + phys_addr_t addr; u16 max_off = 0; int i; diff --git a/drivers/infiniband/hw/mthca/mthca_eq.c b/drivers/infiniband/hw/mthca/mthca_eq.c index 8e8c728..76785c6 100644 --- a/drivers/infiniband/hw/mthca/mthca_eq.c +++ b/drivers/infiniband/hw/mthca/mthca_eq.c @@ -653,7 +653,7 @@ static int mthca_map_reg(struct mthca_dev *dev, unsigned long offset, unsigned long size, void __iomem **map) { - unsigned long base = pci_resource_start(dev->pdev, 0); + phys_addr_t base = pci_resource_start(dev->pdev, 0); *map = ioremap(base + offset, size); if (!*map) diff --git a/drivers/infiniband/hw/mthca/mthca_main.c b/drivers/infiniband/hw/mthca/mthca_main.c index 5eee666..8a40cd53 100644 --- a/drivers/infiniband/hw/mthca/mthca_main.c +++ b/drivers/infiniband/hw/mthca/mthca_main.c @@ -790,7 +790,7 @@ static int mthca_setup_hca(struct mthca_dev *dev) goto err_uar_table_free; } - dev->kar = ioremap(dev->driver_uar.pfn << PAGE_SHIFT, PAGE_SIZE); + dev->kar = ioremap((phys_addr_t) dev->driver_uar.pfn << PAGE_SHIFT, PAGE_SIZE); if (!dev->kar) { mthca_err(dev, "Couldn't map kernel access region, " "aborting.\n"); diff --git a/drivers/infiniband/hw/mthca/mthca_mr.c b/drivers/infiniband/hw/mthca/mthca_mr.c index 065b208..44045c8 100644 --- a/drivers/infiniband/hw/mthca/mthca_mr.c +++ b/drivers/infiniband/hw/mthca/mthca_mr.c @@ -853,7 +853,7 @@ void mthca_arbel_fmr_unmap(struct mthca_dev *dev, struct mthca_fmr *fmr) int mthca_init_mr_table(struct mthca_dev *dev) { - unsigned long addr; + phys_addr_t addr; int mpts, mtts, err, i; err = mthca_alloc_init(&dev->mr_table.mpt_alloc, diff --git a/drivers/infiniband/hw/nes/nes.c b/drivers/infiniband/hw/nes/nes.c index 0c9f0aa..3b4ec32 100644 --- a/drivers/infiniband/hw/nes/nes.c +++ b/drivers/infiniband/hw/nes/nes.c @@ -144,6 +144,7 @@ static int nes_inetaddr_event(struct notifier_block *notifier, struct nes_device *nesdev; struct net_device *netdev; struct nes_vnic *nesvnic; + unsigned int is_bonded; nes_debug(NES_DBG_NETDEV, "nes_inetaddr_event: ip address %pI4, netmask %pI4.\n", &ifa->ifa_address, &ifa->ifa_mask); @@ -152,7 +153,8 @@ static int nes_inetaddr_event(struct notifier_block *notifier, nesdev, nesdev->netdev[0]->name); netdev = nesdev->netdev[0]; nesvnic = netdev_priv(netdev); - if (netdev == event_netdev) { + is_bonded = (netdev->master == event_netdev); + if ((netdev == event_netdev) || is_bonded) { if (nesvnic->rdma_enabled == 0) { nes_debug(NES_DBG_NETDEV, "Returning without processing event for %s since" " RDMA is not enabled.\n", @@ -169,7 +171,10 @@ static int nes_inetaddr_event(struct notifier_block *notifier, nes_manage_arp_cache(netdev, netdev->dev_addr, ntohl(nesvnic->local_ipaddr), NES_ARP_DELETE); nesvnic->local_ipaddr = 0; - return NOTIFY_OK; + if (is_bonded) + continue; + else + return NOTIFY_OK; break; case NETDEV_UP: nes_debug(NES_DBG_NETDEV, "event:UP\n"); @@ -178,15 +183,24 @@ static int nes_inetaddr_event(struct notifier_block *notifier, nes_debug(NES_DBG_NETDEV, "Interface already has local_ipaddr\n"); return NOTIFY_OK; } + /* fall through */ + case NETDEV_CHANGEADDR: /* Add the address to the IP table */ - nesvnic->local_ipaddr = ifa->ifa_address; + if (netdev->master) + nesvnic->local_ipaddr = + ((struct in_device *)netdev->master->ip_ptr)->ifa_list->ifa_address; + else + nesvnic->local_ipaddr = ifa->ifa_address; nes_write_indexed(nesdev, NES_IDX_DST_IP_ADDR+(0x10*PCI_FUNC(nesdev->pcidev->devfn)), - ntohl(ifa->ifa_address)); + ntohl(nesvnic->local_ipaddr)); nes_manage_arp_cache(netdev, netdev->dev_addr, ntohl(nesvnic->local_ipaddr), NES_ARP_ADD); - return NOTIFY_OK; + if (is_bonded) + continue; + else + return NOTIFY_OK; break; default: break; @@ -660,6 +674,8 @@ static int __devinit nes_probe(struct pci_dev *pcidev, const struct pci_device_i } nes_notifiers_registered++; + INIT_DELAYED_WORK(&nesdev->work, nes_recheck_link_status); + /* Initialize network devices */ if ((netdev = nes_netdev_init(nesdev, mmio_regs)) == NULL) goto bail7; @@ -742,6 +758,7 @@ static void __devexit nes_remove(struct pci_dev *pcidev) struct nes_device *nesdev = pci_get_drvdata(pcidev); struct net_device *netdev; int netdev_index = 0; + unsigned long flags; if (nesdev->netdev_count) { netdev = nesdev->netdev[netdev_index]; @@ -768,6 +785,14 @@ static void __devexit nes_remove(struct pci_dev *pcidev) free_irq(pcidev->irq, nesdev); tasklet_kill(&nesdev->dpc_tasklet); + spin_lock_irqsave(&nesdev->nesadapter->phy_lock, flags); + if (nesdev->link_recheck) { + spin_unlock_irqrestore(&nesdev->nesadapter->phy_lock, flags); + cancel_delayed_work_sync(&nesdev->work); + } else { + spin_unlock_irqrestore(&nesdev->nesadapter->phy_lock, flags); + } + /* Deallocate the Adapter Structure */ nes_destroy_adapter(nesdev->nesadapter); diff --git a/drivers/infiniband/hw/nes/nes.h b/drivers/infiniband/hw/nes/nes.h index b3d145e..6fe7987 100644 --- a/drivers/infiniband/hw/nes/nes.h +++ b/drivers/infiniband/hw/nes/nes.h @@ -268,6 +268,9 @@ struct nes_device { u8 napi_isr_ran; u8 disable_rx_flow_control; u8 disable_tx_flow_control; + + struct delayed_work work; + u8 link_recheck; }; @@ -507,6 +510,7 @@ void nes_nic_ce_handler(struct nes_device *, struct nes_hw_nic_cq *); void nes_iwarp_ce_handler(struct nes_device *, struct nes_hw_cq *); int nes_destroy_cqp(struct nes_device *); int nes_nic_cm_xmit(struct sk_buff *, struct net_device *); +void nes_recheck_link_status(struct work_struct *work); /* nes_nic.c */ struct net_device *nes_netdev_init(struct nes_device *, void __iomem *); diff --git a/drivers/infiniband/hw/nes/nes_cm.c b/drivers/infiniband/hw/nes/nes_cm.c index 25ad0f9..009ec81 100644 --- a/drivers/infiniband/hw/nes/nes_cm.c +++ b/drivers/infiniband/hw/nes/nes_cm.c @@ -1107,6 +1107,7 @@ static int nes_addr_resolve_neigh(struct nes_vnic *nesvnic, u32 dst_ip, int arpi struct flowi fl; struct neighbour *neigh; int rc = arpindex; + struct net_device *netdev; struct nes_adapter *nesadapter = nesvnic->nesdev->nesadapter; memset(&fl, 0, sizeof fl); @@ -1117,7 +1118,12 @@ static int nes_addr_resolve_neigh(struct nes_vnic *nesvnic, u32 dst_ip, int arpi return rc; } - neigh = neigh_lookup(&arp_tbl, &rt->rt_gateway, nesvnic->netdev); + if (nesvnic->netdev->master) + netdev = nesvnic->netdev->master; + else + netdev = nesvnic->netdev; + + neigh = neigh_lookup(&arp_tbl, &rt->rt_gateway, netdev); if (neigh) { if (neigh->nud_state & NUD_VALID) { nes_debug(NES_DBG_CM, "Neighbor MAC address for 0x%08X" diff --git a/drivers/infiniband/hw/nes/nes_hw.c b/drivers/infiniband/hw/nes/nes_hw.c index 1980a46..8b606fd 100644 --- a/drivers/infiniband/hw/nes/nes_hw.c +++ b/drivers/infiniband/hw/nes/nes_hw.c @@ -2608,6 +2608,13 @@ static void nes_process_mac_intr(struct nes_device *nesdev, u32 mac_number) netif_start_queue(nesvnic->netdev); nesvnic->linkup = 1; netif_carrier_on(nesvnic->netdev); + + spin_lock(&nesvnic->port_ibevent_lock); + if (nesdev->iw_status == 0) { + nesdev->iw_status = 1; + nes_port_ibevent(nesvnic); + } + spin_unlock(&nesvnic->port_ibevent_lock); } } } else { @@ -2633,9 +2640,23 @@ static void nes_process_mac_intr(struct nes_device *nesdev, u32 mac_number) netif_stop_queue(nesvnic->netdev); nesvnic->linkup = 0; netif_carrier_off(nesvnic->netdev); + + spin_lock(&nesvnic->port_ibevent_lock); + if (nesdev->iw_status == 1) { + nesdev->iw_status = 0; + nes_port_ibevent(nesvnic); + } + spin_unlock(&nesvnic->port_ibevent_lock); } } } + if (nesadapter->phy_type[mac_index] == NES_PHY_TYPE_SFP_D) { + if (nesdev->link_recheck) + cancel_delayed_work(&nesdev->work); + nesdev->link_recheck = 1; + schedule_delayed_work(&nesdev->work, + NES_LINK_RECHECK_DELAY); + } } spin_unlock_irqrestore(&nesadapter->phy_lock, flags); @@ -2643,6 +2664,80 @@ static void nes_process_mac_intr(struct nes_device *nesdev, u32 mac_number) nesadapter->mac_sw_state[mac_number] = NES_MAC_SW_IDLE; } +void nes_recheck_link_status(struct work_struct *work) +{ + unsigned long flags; + struct nes_device *nesdev = container_of(work, struct nes_device, work.work); + struct nes_adapter *nesadapter = nesdev->nesadapter; + struct nes_vnic *nesvnic; + u32 mac_index = nesdev->mac_index; + u16 phy_data; + u16 temp_phy_data; + + spin_lock_irqsave(&nesadapter->phy_lock, flags); + + /* check link status */ + nes_read_10G_phy_reg(nesdev, nesadapter->phy_index[mac_index], 1, 0x9003); + temp_phy_data = (u16)nes_read_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL); + + nes_read_10G_phy_reg(nesdev, nesadapter->phy_index[mac_index], 3, 0x0021); + nes_read_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL); + nes_read_10G_phy_reg(nesdev, nesadapter->phy_index[mac_index], 3, 0x0021); + phy_data = (u16)nes_read_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL); + + phy_data = (!temp_phy_data && (phy_data == 0x8000)) ? 0x4 : 0x0; + + nes_debug(NES_DBG_PHY, "%s: Phy data = 0x%04X, link was %s.\n", + __func__, phy_data, + nesadapter->mac_link_down[mac_index] ? "DOWN" : "UP"); + + if (phy_data & 0x0004) { + nesadapter->mac_link_down[mac_index] = 0; + list_for_each_entry(nesvnic, &nesadapter->nesvnic_list[mac_index], list) { + if (nesvnic->linkup == 0) { + printk(PFX "The Link is now up for port %s, netdev %p.\n", + nesvnic->netdev->name, nesvnic->netdev); + if (netif_queue_stopped(nesvnic->netdev)) + netif_start_queue(nesvnic->netdev); + nesvnic->linkup = 1; + netif_carrier_on(nesvnic->netdev); + + spin_lock(&nesvnic->port_ibevent_lock); + if (nesdev->iw_status == 0) { + nesdev->iw_status = 1; + nes_port_ibevent(nesvnic); + } + spin_unlock(&nesvnic->port_ibevent_lock); + } + } + + } else { + nesadapter->mac_link_down[mac_index] = 1; + list_for_each_entry(nesvnic, &nesadapter->nesvnic_list[mac_index], list) { + if (nesvnic->linkup == 1) { + printk(PFX "The Link is now down for port %s, netdev %p.\n", + nesvnic->netdev->name, nesvnic->netdev); + if (!(netif_queue_stopped(nesvnic->netdev))) + netif_stop_queue(nesvnic->netdev); + nesvnic->linkup = 0; + netif_carrier_off(nesvnic->netdev); + + spin_lock(&nesvnic->port_ibevent_lock); + if (nesdev->iw_status == 1) { + nesdev->iw_status = 0; + nes_port_ibevent(nesvnic); + } + spin_unlock(&nesvnic->port_ibevent_lock); + } + } + } + if (nesdev->link_recheck++ < NES_LINK_RECHECK_MAX) + schedule_delayed_work(&nesdev->work, NES_LINK_RECHECK_DELAY); + else + nesdev->link_recheck = 0; + + spin_unlock_irqrestore(&nesadapter->phy_lock, flags); +} static void nes_nic_napi_ce_handler(struct nes_device *nesdev, struct nes_hw_nic_cq *cq) diff --git a/drivers/infiniband/hw/nes/nes_hw.h b/drivers/infiniband/hw/nes/nes_hw.h index 1204c34..d2abe07 100644 --- a/drivers/infiniband/hw/nes/nes_hw.h +++ b/drivers/infiniband/hw/nes/nes_hw.h @@ -1193,6 +1193,8 @@ struct nes_listener { struct nes_ib_device; +#define NES_EVENT_DELAY msecs_to_jiffies(100) + struct nes_vnic { struct nes_ib_device *nesibdev; u64 sq_full; @@ -1247,6 +1249,10 @@ struct nes_vnic { u32 lro_max_aggr; struct net_lro_mgr lro_mgr; struct net_lro_desc lro_desc[NES_MAX_LRO_DESCRIPTORS]; + struct timer_list event_timer; + enum ib_event_type delayed_event; + enum ib_event_type last_dispatched_event; + spinlock_t port_ibevent_lock; }; struct nes_ib_device { @@ -1348,6 +1354,10 @@ struct nes_terminate_hdr { #define BAD_FRAME_OFFSET 64 #define CQE_MAJOR_DRV 0x8000 +/* Used for link status recheck after interrupt processing */ +#define NES_LINK_RECHECK_DELAY msecs_to_jiffies(50) +#define NES_LINK_RECHECK_MAX 60 + #define nes_vlan_rx vlan_hwaccel_receive_skb #define nes_netif_rx netif_receive_skb diff --git a/drivers/infiniband/hw/nes/nes_nic.c b/drivers/infiniband/hw/nes/nes_nic.c index 5a4c364..2c9c193 100644 --- a/drivers/infiniband/hw/nes/nes_nic.c +++ b/drivers/infiniband/hw/nes/nes_nic.c @@ -144,6 +144,7 @@ static int nes_netdev_open(struct net_device *netdev) u32 nic_active_bit; u32 nic_active; struct list_head *list_pos, *list_temp; + unsigned long flags; assert(nesdev != NULL); @@ -233,18 +234,36 @@ static int nes_netdev_open(struct net_device *netdev) first_nesvnic = nesvnic; } - if (nesvnic->of_device_registered) { - nesdev->iw_status = 1; - nesdev->nesadapter->send_term_ok = 1; - nes_port_ibevent(nesvnic); - } - if (first_nesvnic->linkup) { /* Enable network packets */ nesvnic->linkup = 1; netif_start_queue(netdev); netif_carrier_on(netdev); } + + spin_lock_irqsave(&nesdev->nesadapter->phy_lock, flags); + if (nesdev->nesadapter->phy_type[nesdev->mac_index] == NES_PHY_TYPE_SFP_D) { + if (nesdev->link_recheck) + cancel_delayed_work(&nesdev->work); + nesdev->link_recheck = 1; + schedule_delayed_work(&nesdev->work, NES_LINK_RECHECK_DELAY); + } + spin_unlock_irqrestore(&nesdev->nesadapter->phy_lock, flags); + + spin_lock_irqsave(&nesvnic->port_ibevent_lock, flags); + if (nesvnic->of_device_registered) { + nesdev->nesadapter->send_term_ok = 1; + if (nesvnic->linkup == 1) { + if (nesdev->iw_status == 0) { + nesdev->iw_status = 1; + nes_port_ibevent(nesvnic); + } + } else { + nesdev->iw_status = 0; + } + } + spin_unlock_irqrestore(&nesvnic->port_ibevent_lock, flags); + napi_enable(&nesvnic->napi); nesvnic->netdev_open = 1; @@ -263,6 +282,7 @@ static int nes_netdev_stop(struct net_device *netdev) u32 nic_active; struct nes_vnic *first_nesvnic = NULL; struct list_head *list_pos, *list_temp; + unsigned long flags; nes_debug(NES_DBG_SHUTDOWN, "nesvnic=%p, nesdev=%p, netdev=%p %s\n", nesvnic, nesdev, netdev, netdev->name); @@ -315,12 +335,17 @@ static int nes_netdev_stop(struct net_device *netdev) nic_active &= nic_active_mask; nes_write_indexed(nesdev, NES_IDX_NIC_BROADCAST_ON, nic_active); - + spin_lock_irqsave(&nesvnic->port_ibevent_lock, flags); if (nesvnic->of_device_registered) { nesdev->nesadapter->send_term_ok = 0; nesdev->iw_status = 0; - nes_port_ibevent(nesvnic); + if (nesvnic->linkup == 1) + nes_port_ibevent(nesvnic); } + del_timer_sync(&nesvnic->event_timer); + nesvnic->event_timer.function = NULL; + spin_unlock_irqrestore(&nesvnic->port_ibevent_lock, flags); + nes_destroy_nic_qp(nesvnic); nesvnic->netdev_open = 0; @@ -1750,7 +1775,10 @@ struct net_device *nes_netdev_init(struct nes_device *nesdev, nesvnic->rdma_enabled = 0; } nesvnic->nic_cq.cq_number = nesvnic->nic.qp_id; + init_timer(&nesvnic->event_timer); + nesvnic->event_timer.function = NULL; spin_lock_init(&nesvnic->tx_lock); + spin_lock_init(&nesvnic->port_ibevent_lock); nesdev->netdev[nesdev->netdev_count] = netdev; nes_debug(NES_DBG_INIT, "Adding nesvnic (%p) to the adapters nesvnic_list for MAC%d.\n", @@ -1763,8 +1791,11 @@ struct net_device *nes_netdev_init(struct nes_device *nesdev, (((PCI_FUNC(nesdev->pcidev->devfn) == 1) && (nesdev->mac_index == 2)) || ((PCI_FUNC(nesdev->pcidev->devfn) == 2) && (nesdev->mac_index == 1)))))) { u32 u32temp; - u32 link_mask; - u32 link_val; + u32 link_mask = 0; + u32 link_val = 0; + u16 temp_phy_data; + u16 phy_data = 0; + unsigned long flags; u32temp = nes_read_indexed(nesdev, NES_IDX_PHY_PCS_CONTROL_STATUS0 + (0x200 * (nesdev->mac_index & 1))); @@ -1786,6 +1817,23 @@ struct net_device *nes_netdev_init(struct nes_device *nesdev, link_val = 0x02020000; } break; + case NES_PHY_TYPE_SFP_D: + spin_lock_irqsave(&nesdev->nesadapter->phy_lock, flags); + nes_read_10G_phy_reg(nesdev, + nesdev->nesadapter->phy_index[nesdev->mac_index], + 1, 0x9003); + temp_phy_data = (u16)nes_read_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL); + nes_read_10G_phy_reg(nesdev, + nesdev->nesadapter->phy_index[nesdev->mac_index], + 3, 0x0021); + nes_read_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL); + nes_read_10G_phy_reg(nesdev, + nesdev->nesadapter->phy_index[nesdev->mac_index], + 3, 0x0021); + phy_data = (u16)nes_read_indexed(nesdev, NES_IDX_MAC_MDIO_CONTROL); + spin_unlock_irqrestore(&nesdev->nesadapter->phy_lock, flags); + phy_data = (!temp_phy_data && (phy_data == 0x8000)) ? 0x4 : 0x0; + break; default: link_mask = 0x0f1f0000; link_val = 0x0f0f0000; @@ -1795,8 +1843,14 @@ struct net_device *nes_netdev_init(struct nes_device *nesdev, u32temp = nes_read_indexed(nesdev, NES_IDX_PHY_PCS_CONTROL_STATUS0 + (0x200 * (nesdev->mac_index & 1))); - if ((u32temp & link_mask) == link_val) - nesvnic->linkup = 1; + + if (phy_type == NES_PHY_TYPE_SFP_D) { + if (phy_data & 0x0004) + nesvnic->linkup = 1; + } else { + if ((u32temp & link_mask) == link_val) + nesvnic->linkup = 1; + } /* clear the MAC interrupt status, assumes direct logical to physical mapping */ u32temp = nes_read_indexed(nesdev, NES_IDX_MAC_INT_STATUS + (0x200 * nesdev->mac_index)); diff --git a/drivers/infiniband/hw/nes/nes_verbs.c b/drivers/infiniband/hw/nes/nes_verbs.c index 99933e4..26d8018 100644 --- a/drivers/infiniband/hw/nes/nes_verbs.c +++ b/drivers/infiniband/hw/nes/nes_verbs.c @@ -3936,6 +3936,30 @@ struct nes_ib_device *nes_init_ofa_device(struct net_device *netdev) return nesibdev; } + +/** + * nes_handle_delayed_event + */ +static void nes_handle_delayed_event(unsigned long data) +{ + struct nes_vnic *nesvnic = (void *) data; + + if (nesvnic->delayed_event != nesvnic->last_dispatched_event) { + struct ib_event event; + + event.device = &nesvnic->nesibdev->ibdev; + if (!event.device) + goto stop_timer; + event.event = nesvnic->delayed_event; + event.element.port_num = nesvnic->logical_port + 1; + ib_dispatch_event(&event); + } + +stop_timer: + nesvnic->event_timer.function = NULL; +} + + void nes_port_ibevent(struct nes_vnic *nesvnic) { struct nes_ib_device *nesibdev = nesvnic->nesibdev; @@ -3944,7 +3968,18 @@ void nes_port_ibevent(struct nes_vnic *nesvnic) event.device = &nesibdev->ibdev; event.element.port_num = nesvnic->logical_port + 1; event.event = nesdev->iw_status ? IB_EVENT_PORT_ACTIVE : IB_EVENT_PORT_ERR; - ib_dispatch_event(&event); + + if (!nesvnic->event_timer.function) { + ib_dispatch_event(&event); + nesvnic->last_dispatched_event = event.event; + nesvnic->event_timer.function = nes_handle_delayed_event; + nesvnic->event_timer.data = (unsigned long) nesvnic; + nesvnic->event_timer.expires = jiffies + NES_EVENT_DELAY; + add_timer(&nesvnic->event_timer); + } else { + mod_timer(&nesvnic->event_timer, jiffies + NES_EVENT_DELAY); + } + nesvnic->delayed_event = event.event; } diff --git a/drivers/infiniband/hw/qib/qib_iba7220.c b/drivers/infiniband/hw/qib/qib_iba7220.c index 127a0d5..de799f1 100644 --- a/drivers/infiniband/hw/qib/qib_iba7220.c +++ b/drivers/infiniband/hw/qib/qib_iba7220.c @@ -1692,8 +1692,7 @@ static void qib_7220_quiet_serdes(struct qib_pportdata *ppd) ppd->lflags &= ~QIBL_IB_AUTONEG_INPROG; spin_unlock_irqrestore(&ppd->lflags_lock, flags); wake_up(&ppd->cpspec->autoneg_wait); - cancel_delayed_work(&ppd->cpspec->autoneg_work); - flush_scheduled_work(); + cancel_delayed_work_sync(&ppd->cpspec->autoneg_work); shutdown_7220_relock_poll(ppd->dd); val = qib_read_kreg64(ppd->dd, kr_xgxs_cfg); @@ -3515,8 +3514,8 @@ static void try_7220_autoneg(struct qib_pportdata *ppd) toggle_7220_rclkrls(ppd->dd); /* 2 msec is minimum length of a poll cycle */ - schedule_delayed_work(&ppd->cpspec->autoneg_work, - msecs_to_jiffies(2)); + queue_delayed_work(ib_wq, &ppd->cpspec->autoneg_work, + msecs_to_jiffies(2)); } /* diff --git a/drivers/infiniband/hw/qib/qib_iba7322.c b/drivers/infiniband/hw/qib/qib_iba7322.c index abd409d..50cceb3 100644 --- a/drivers/infiniband/hw/qib/qib_iba7322.c +++ b/drivers/infiniband/hw/qib/qib_iba7322.c @@ -2406,10 +2406,9 @@ static void qib_7322_mini_quiet_serdes(struct qib_pportdata *ppd) ppd->lflags &= ~QIBL_IB_AUTONEG_INPROG; spin_unlock_irqrestore(&ppd->lflags_lock, flags); wake_up(&ppd->cpspec->autoneg_wait); - cancel_delayed_work(&ppd->cpspec->autoneg_work); + cancel_delayed_work_sync(&ppd->cpspec->autoneg_work); if (ppd->dd->cspec->r1) - cancel_delayed_work(&ppd->cpspec->ipg_work); - flush_scheduled_work(); + cancel_delayed_work_sync(&ppd->cpspec->ipg_work); ppd->cpspec->chase_end = 0; if (ppd->cpspec->chase_timer.data) /* if initted */ @@ -2706,7 +2705,7 @@ static noinline void unknown_7322_gpio_intr(struct qib_devdata *dd) if (!(pins & mask)) { ++handled; qd->t_insert = get_jiffies_64(); - schedule_work(&qd->work); + queue_work(ib_wq, &qd->work); } } } @@ -4990,8 +4989,8 @@ static void try_7322_autoneg(struct qib_pportdata *ppd) set_7322_ibspeed_fast(ppd, QIB_IB_DDR); qib_7322_mini_pcs_reset(ppd); /* 2 msec is minimum length of a poll cycle */ - schedule_delayed_work(&ppd->cpspec->autoneg_work, - msecs_to_jiffies(2)); + queue_delayed_work(ib_wq, &ppd->cpspec->autoneg_work, + msecs_to_jiffies(2)); } /* @@ -5121,7 +5120,8 @@ static void try_7322_ipg(struct qib_pportdata *ppd) ib_free_send_mad(send_buf); retry: delay = 2 << ppd->cpspec->ipg_tries; - schedule_delayed_work(&ppd->cpspec->ipg_work, msecs_to_jiffies(delay)); + queue_delayed_work(ib_wq, &ppd->cpspec->ipg_work, + msecs_to_jiffies(delay)); } /* diff --git a/drivers/infiniband/hw/qib/qib_init.c b/drivers/infiniband/hw/qib/qib_init.c index 7896afb..ffefb78 100644 --- a/drivers/infiniband/hw/qib/qib_init.c +++ b/drivers/infiniband/hw/qib/qib_init.c @@ -80,7 +80,6 @@ unsigned qib_wc_pat = 1; /* default (1) is to use PAT, not MTRR */ module_param_named(wc_pat, qib_wc_pat, uint, S_IRUGO); MODULE_PARM_DESC(wc_pat, "enable write-combining via PAT mechanism"); -struct workqueue_struct *qib_wq; struct workqueue_struct *qib_cq_wq; static void verify_interrupt(unsigned long); @@ -270,23 +269,20 @@ static void init_shadow_tids(struct qib_devdata *dd) struct page **pages; dma_addr_t *addrs; - pages = vmalloc(dd->cfgctxts * dd->rcvtidcnt * sizeof(struct page *)); + pages = vzalloc(dd->cfgctxts * dd->rcvtidcnt * sizeof(struct page *)); if (!pages) { qib_dev_err(dd, "failed to allocate shadow page * " "array, no expected sends!\n"); goto bail; } - addrs = vmalloc(dd->cfgctxts * dd->rcvtidcnt * sizeof(dma_addr_t)); + addrs = vzalloc(dd->cfgctxts * dd->rcvtidcnt * sizeof(dma_addr_t)); if (!addrs) { qib_dev_err(dd, "failed to allocate shadow dma handle " "array, no expected sends!\n"); goto bail_free; } - memset(pages, 0, dd->cfgctxts * dd->rcvtidcnt * sizeof(struct page *)); - memset(addrs, 0, dd->cfgctxts * dd->rcvtidcnt * sizeof(dma_addr_t)); - dd->pageshadow = pages; dd->physshadow = addrs; return; @@ -1047,24 +1043,10 @@ static int __init qlogic_ib_init(void) if (ret) goto bail; - /* - * We create our own workqueue mainly because we want to be - * able to flush it when devices are being removed. We can't - * use schedule_work()/flush_scheduled_work() because both - * unregister_netdev() and linkwatch_event take the rtnl lock, - * so flush_scheduled_work() can deadlock during device - * removal. - */ - qib_wq = create_workqueue("qib"); - if (!qib_wq) { - ret = -ENOMEM; - goto bail_dev; - } - qib_cq_wq = create_singlethread_workqueue("qib_cq"); if (!qib_cq_wq) { ret = -ENOMEM; - goto bail_wq; + goto bail_dev; } /* @@ -1094,8 +1076,6 @@ bail_unit: idr_destroy(&qib_unit_table); bail_cq_wq: destroy_workqueue(qib_cq_wq); -bail_wq: - destroy_workqueue(qib_wq); bail_dev: qib_dev_cleanup(); bail: @@ -1119,7 +1099,6 @@ static void __exit qlogic_ib_cleanup(void) pci_unregister_driver(&qib_driver); - destroy_workqueue(qib_wq); destroy_workqueue(qib_cq_wq); qib_cpulist_count = 0; @@ -1292,7 +1271,7 @@ static int __devinit qib_init_one(struct pci_dev *pdev, if (qib_mini_init || initfail || ret) { qib_stop_timers(dd); - flush_scheduled_work(); + flush_workqueue(ib_wq); for (pidx = 0; pidx < dd->num_pports; ++pidx) dd->f_quiet_serdes(dd->pport + pidx); if (qib_mini_init) @@ -1341,8 +1320,8 @@ static void __devexit qib_remove_one(struct pci_dev *pdev) qib_stop_timers(dd); - /* wait until all of our (qsfp) schedule_work() calls complete */ - flush_scheduled_work(); + /* wait until all of our (qsfp) queue_work() calls complete */ + flush_workqueue(ib_wq); ret = qibfs_remove(dd); if (ret) diff --git a/drivers/infiniband/hw/qib/qib_qsfp.c b/drivers/infiniband/hw/qib/qib_qsfp.c index 35b3604..3374a52 100644 --- a/drivers/infiniband/hw/qib/qib_qsfp.c +++ b/drivers/infiniband/hw/qib/qib_qsfp.c @@ -485,7 +485,7 @@ void qib_qsfp_init(struct qib_qsfp_data *qd, goto bail; /* We see a module, but it may be unwise to look yet. Just schedule */ qd->t_insert = get_jiffies_64(); - schedule_work(&qd->work); + queue_work(ib_wq, &qd->work); bail: return; } @@ -493,10 +493,9 @@ bail: void qib_qsfp_deinit(struct qib_qsfp_data *qd) { /* - * There is nothing to do here for now. our - * work is scheduled with schedule_work(), and - * flush_scheduled_work() from remove_one will - * block until all work ssetup with schedule_work() + * There is nothing to do here for now. our work is scheduled + * with queue_work(), and flush_workqueue() from remove_one + * will block until all work setup with queue_work() * completes. */ } diff --git a/drivers/infiniband/hw/qib/qib_verbs.h b/drivers/infiniband/hw/qib/qib_verbs.h index 63b22a9..95e5b47 100644 --- a/drivers/infiniband/hw/qib/qib_verbs.h +++ b/drivers/infiniband/hw/qib/qib_verbs.h @@ -805,7 +805,6 @@ static inline int qib_send_ok(struct qib_qp *qp) !(qp->s_flags & QIB_S_ANY_WAIT_SEND)); } -extern struct workqueue_struct *qib_wq; extern struct workqueue_struct *qib_cq_wq; /* @@ -814,7 +813,7 @@ extern struct workqueue_struct *qib_cq_wq; static inline void qib_schedule_send(struct qib_qp *qp) { if (qib_send_ok(qp)) - queue_work(qib_wq, &qp->s_work); + queue_work(ib_wq, &qp->s_work); } static inline int qib_pkey_ok(u16 pkey1, u16 pkey2) diff --git a/drivers/infiniband/ulp/ipoib/ipoib_cm.c b/drivers/infiniband/ulp/ipoib/ipoib_cm.c index c1c49f2..93d5580 100644 --- a/drivers/infiniband/ulp/ipoib/ipoib_cm.c +++ b/drivers/infiniband/ulp/ipoib/ipoib_cm.c @@ -352,15 +352,13 @@ static int ipoib_cm_nonsrq_init_rx(struct net_device *dev, struct ib_cm_id *cm_i int ret; int i; - rx->rx_ring = vmalloc(ipoib_recvq_size * sizeof *rx->rx_ring); + rx->rx_ring = vzalloc(ipoib_recvq_size * sizeof *rx->rx_ring); if (!rx->rx_ring) { printk(KERN_WARNING "%s: failed to allocate CM non-SRQ ring (%d entries)\n", priv->ca->name, ipoib_recvq_size); return -ENOMEM; } - memset(rx->rx_ring, 0, ipoib_recvq_size * sizeof *rx->rx_ring); - t = kmalloc(sizeof *t, GFP_KERNEL); if (!t) { ret = -ENOMEM; @@ -1097,13 +1095,12 @@ static int ipoib_cm_tx_init(struct ipoib_cm_tx *p, u32 qpn, struct ipoib_dev_priv *priv = netdev_priv(p->dev); int ret; - p->tx_ring = vmalloc(ipoib_sendq_size * sizeof *p->tx_ring); + p->tx_ring = vzalloc(ipoib_sendq_size * sizeof *p->tx_ring); if (!p->tx_ring) { ipoib_warn(priv, "failed to allocate tx ring\n"); ret = -ENOMEM; goto err_tx; } - memset(p->tx_ring, 0, ipoib_sendq_size * sizeof *p->tx_ring); p->qp = ipoib_cm_create_tx_qp(p->dev, p); if (IS_ERR(p->qp)) { @@ -1521,7 +1518,7 @@ static void ipoib_cm_create_srq(struct net_device *dev, int max_sge) return; } - priv->cm.srq_ring = vmalloc(ipoib_recvq_size * sizeof *priv->cm.srq_ring); + priv->cm.srq_ring = vzalloc(ipoib_recvq_size * sizeof *priv->cm.srq_ring); if (!priv->cm.srq_ring) { printk(KERN_WARNING "%s: failed to allocate CM SRQ ring (%d entries)\n", priv->ca->name, ipoib_recvq_size); @@ -1530,7 +1527,6 @@ static void ipoib_cm_create_srq(struct net_device *dev, int max_sge) return; } - memset(priv->cm.srq_ring, 0, ipoib_recvq_size * sizeof *priv->cm.srq_ring); } int ipoib_cm_dev_init(struct net_device *dev) diff --git a/drivers/infiniband/ulp/ipoib/ipoib_main.c b/drivers/infiniband/ulp/ipoib/ipoib_main.c index 7a07a72..aca3b44 100644 --- a/drivers/infiniband/ulp/ipoib/ipoib_main.c +++ b/drivers/infiniband/ulp/ipoib/ipoib_main.c @@ -916,13 +916,12 @@ int ipoib_dev_init(struct net_device *dev, struct ib_device *ca, int port) goto out; } - priv->tx_ring = vmalloc(ipoib_sendq_size * sizeof *priv->tx_ring); + priv->tx_ring = vzalloc(ipoib_sendq_size * sizeof *priv->tx_ring); if (!priv->tx_ring) { printk(KERN_WARNING "%s: failed to allocate TX ring (%d entries)\n", ca->name, ipoib_sendq_size); goto out_rx_ring_cleanup; } - memset(priv->tx_ring, 0, ipoib_sendq_size * sizeof *priv->tx_ring); /* priv->tx_head, tx_tail & tx_outstanding are already 0 */ diff --git a/drivers/infiniband/ulp/srp/ib_srp.c b/drivers/infiniband/ulp/srp/ib_srp.c index 4b62105..83664ed 100644 --- a/drivers/infiniband/ulp/srp/ib_srp.c +++ b/drivers/infiniband/ulp/srp/ib_srp.c @@ -638,7 +638,7 @@ err: if (target->state == SRP_TARGET_CONNECTING) { target->state = SRP_TARGET_DEAD; INIT_WORK(&target->work, srp_remove_work); - schedule_work(&target->work); + queue_work(ib_wq, &target->work); } spin_unlock_irq(&target->lock); @@ -1132,15 +1132,12 @@ static int srp_queuecommand(struct Scsi_Host *shost, struct scsi_cmnd *scmnd) spin_lock_irqsave(&target->lock, flags); iu = __srp_get_tx_iu(target, SRP_IU_CMD); - if (iu) { - req = list_first_entry(&target->free_reqs, struct srp_request, - list); - list_del(&req->list); - } - spin_unlock_irqrestore(&target->lock, flags); - if (!iu) - goto err; + goto err_unlock; + + req = list_first_entry(&target->free_reqs, struct srp_request, list); + list_del(&req->list); + spin_unlock_irqrestore(&target->lock, flags); dev = target->srp_host->srp_dev->dev; ib_dma_sync_single_for_cpu(dev, iu->dma, srp_max_iu_len, @@ -1185,6 +1182,8 @@ err_iu: spin_lock_irqsave(&target->lock, flags); list_add(&req->list, &target->free_reqs); + +err_unlock: spin_unlock_irqrestore(&target->lock, flags); err: @@ -2199,7 +2198,7 @@ static void srp_remove_one(struct ib_device *device) * started before we marked our target ports as * removed, and any target port removal tasks. */ - flush_scheduled_work(); + flush_workqueue(ib_wq); list_for_each_entry_safe(target, tmp_target, &host->target_list, list) { diff --git a/drivers/mtd/Kconfig b/drivers/mtd/Kconfig index b1f7689..7741470 100644 --- a/drivers/mtd/Kconfig +++ b/drivers/mtd/Kconfig @@ -53,9 +53,10 @@ config MTD_PARTITIONS devices. Partitioning on NFTL 'devices' is a different - that's the 'normal' form of partitioning used on a block device. +if MTD_PARTITIONS + config MTD_REDBOOT_PARTS tristate "RedBoot partition table parsing" - depends on MTD_PARTITIONS ---help--- RedBoot is a ROM monitor and bootloader which deals with multiple 'images' in flash devices by putting a table one of the erase @@ -72,9 +73,10 @@ config MTD_REDBOOT_PARTS SA1100 map driver (CONFIG_MTD_SA1100) has an option for this, for example. +if MTD_REDBOOT_PARTS + config MTD_REDBOOT_DIRECTORY_BLOCK int "Location of RedBoot partition table" - depends on MTD_REDBOOT_PARTS default "-1" ---help--- This option is the Linux counterpart to the @@ -91,18 +93,18 @@ config MTD_REDBOOT_DIRECTORY_BLOCK config MTD_REDBOOT_PARTS_UNALLOCATED bool "Include unallocated flash regions" - depends on MTD_REDBOOT_PARTS help If you need to register each unallocated flash region as a MTD 'partition', enable this option. config MTD_REDBOOT_PARTS_READONLY bool "Force read-only for RedBoot system images" - depends on MTD_REDBOOT_PARTS help If you need to force read-only for 'RedBoot', 'RedBoot Config' and 'FIS directory' images, enable this option. +endif # MTD_REDBOOT_PARTS + config MTD_CMDLINE_PARTS bool "Command line partition table parsing" depends on MTD_PARTITIONS = "y" && MTD = "y" @@ -142,7 +144,7 @@ config MTD_CMDLINE_PARTS config MTD_AFS_PARTS tristate "ARM Firmware Suite partition parsing" - depends on ARM && MTD_PARTITIONS + depends on ARM ---help--- The ARM Firmware Suite allows the user to divide flash devices into multiple 'images'. Each such image has a header containing its name @@ -158,8 +160,8 @@ config MTD_AFS_PARTS example. config MTD_OF_PARTS - tristate "Flash partition map based on OF description" - depends on OF && MTD_PARTITIONS + def_bool y + depends on OF help This provides a partition parsing function which derives the partition map from the children of the flash node, @@ -167,10 +169,11 @@ config MTD_OF_PARTS config MTD_AR7_PARTS tristate "TI AR7 partitioning support" - depends on MTD_PARTITIONS ---help--- TI AR7 partitioning support +endif # MTD_PARTITIONS + comment "User Modules And Translation Layers" config MTD_CHAR diff --git a/drivers/mtd/Makefile b/drivers/mtd/Makefile index 760abc5..d4e7f25 100644 --- a/drivers/mtd/Makefile +++ b/drivers/mtd/Makefile @@ -6,13 +6,13 @@ obj-$(CONFIG_MTD) += mtd.o mtd-y := mtdcore.o mtdsuper.o mtd-$(CONFIG_MTD_PARTITIONS) += mtdpart.o +mtd-$(CONFIG_MTD_OF_PARTS) += ofpart.o obj-$(CONFIG_MTD_CONCAT) += mtdconcat.o obj-$(CONFIG_MTD_REDBOOT_PARTS) += redboot.o obj-$(CONFIG_MTD_CMDLINE_PARTS) += cmdlinepart.o obj-$(CONFIG_MTD_AFS_PARTS) += afs.o obj-$(CONFIG_MTD_AR7_PARTS) += ar7part.o -obj-$(CONFIG_MTD_OF_PARTS) += ofpart.o # 'Users' - code which presents functionality to userspace. obj-$(CONFIG_MTD_CHAR) += mtdchar.o diff --git a/drivers/mtd/chips/cfi_cmdset_0001.c b/drivers/mtd/chips/cfi_cmdset_0001.c index ad9268b..a8c3e1c 100644 --- a/drivers/mtd/chips/cfi_cmdset_0001.c +++ b/drivers/mtd/chips/cfi_cmdset_0001.c @@ -162,7 +162,7 @@ static void cfi_tell_features(struct cfi_pri_intelext *extp) #endif /* Atmel chips don't use the same PRI format as Intel chips */ -static void fixup_convert_atmel_pri(struct mtd_info *mtd, void *param) +static void fixup_convert_atmel_pri(struct mtd_info *mtd) { struct map_info *map = mtd->priv; struct cfi_private *cfi = map->fldrv_priv; @@ -202,7 +202,7 @@ static void fixup_convert_atmel_pri(struct mtd_info *mtd, void *param) cfi->cfiq->BufWriteTimeoutMax = 0; } -static void fixup_at49bv640dx_lock(struct mtd_info *mtd, void *param) +static void fixup_at49bv640dx_lock(struct mtd_info *mtd) { struct map_info *map = mtd->priv; struct cfi_private *cfi = map->fldrv_priv; @@ -214,7 +214,7 @@ static void fixup_at49bv640dx_lock(struct mtd_info *mtd, void *param) #ifdef CMDSET0001_DISABLE_ERASE_SUSPEND_ON_WRITE /* Some Intel Strata Flash prior to FPO revision C has bugs in this area */ -static void fixup_intel_strataflash(struct mtd_info *mtd, void* param) +static void fixup_intel_strataflash(struct mtd_info *mtd) { struct map_info *map = mtd->priv; struct cfi_private *cfi = map->fldrv_priv; @@ -227,7 +227,7 @@ static void fixup_intel_strataflash(struct mtd_info *mtd, void* param) #endif #ifdef CMDSET0001_DISABLE_WRITE_SUSPEND -static void fixup_no_write_suspend(struct mtd_info *mtd, void* param) +static void fixup_no_write_suspend(struct mtd_info *mtd) { struct map_info *map = mtd->priv; struct cfi_private *cfi = map->fldrv_priv; @@ -240,7 +240,7 @@ static void fixup_no_write_suspend(struct mtd_info *mtd, void* param) } #endif -static void fixup_st_m28w320ct(struct mtd_info *mtd, void* param) +static void fixup_st_m28w320ct(struct mtd_info *mtd) { struct map_info *map = mtd->priv; struct cfi_private *cfi = map->fldrv_priv; @@ -249,7 +249,7 @@ static void fixup_st_m28w320ct(struct mtd_info *mtd, void* param) cfi->cfiq->BufWriteTimeoutMax = 0; /* Not supported */ } -static void fixup_st_m28w320cb(struct mtd_info *mtd, void* param) +static void fixup_st_m28w320cb(struct mtd_info *mtd) { struct map_info *map = mtd->priv; struct cfi_private *cfi = map->fldrv_priv; @@ -259,7 +259,7 @@ static void fixup_st_m28w320cb(struct mtd_info *mtd, void* param) (cfi->cfiq->EraseRegionInfo[1] & 0xffff0000) | 0x3e; }; -static void fixup_use_point(struct mtd_info *mtd, void *param) +static void fixup_use_point(struct mtd_info *mtd) { struct map_info *map = mtd->priv; if (!mtd->point && map_is_linear(map)) { @@ -268,7 +268,7 @@ static void fixup_use_point(struct mtd_info *mtd, void *param) } } -static void fixup_use_write_buffers(struct mtd_info *mtd, void *param) +static void fixup_use_write_buffers(struct mtd_info *mtd) { struct map_info *map = mtd->priv; struct cfi_private *cfi = map->fldrv_priv; @@ -282,7 +282,7 @@ static void fixup_use_write_buffers(struct mtd_info *mtd, void *param) /* * Some chips power-up with all sectors locked by default. */ -static void fixup_unlock_powerup_lock(struct mtd_info *mtd, void *param) +static void fixup_unlock_powerup_lock(struct mtd_info *mtd) { struct map_info *map = mtd->priv; struct cfi_private *cfi = map->fldrv_priv; @@ -295,31 +295,31 @@ static void fixup_unlock_powerup_lock(struct mtd_info *mtd, void *param) } static struct cfi_fixup cfi_fixup_table[] = { - { CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri, NULL }, - { CFI_MFR_ATMEL, AT49BV640D, fixup_at49bv640dx_lock, NULL }, - { CFI_MFR_ATMEL, AT49BV640DT, fixup_at49bv640dx_lock, NULL }, + { CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri }, + { CFI_MFR_ATMEL, AT49BV640D, fixup_at49bv640dx_lock }, + { CFI_MFR_ATMEL, AT49BV640DT, fixup_at49bv640dx_lock }, #ifdef CMDSET0001_DISABLE_ERASE_SUSPEND_ON_WRITE - { CFI_MFR_ANY, CFI_ID_ANY, fixup_intel_strataflash, NULL }, + { CFI_MFR_ANY, CFI_ID_ANY, fixup_intel_strataflash }, #endif #ifdef CMDSET0001_DISABLE_WRITE_SUSPEND - { CFI_MFR_ANY, CFI_ID_ANY, fixup_no_write_suspend, NULL }, + { CFI_MFR_ANY, CFI_ID_ANY, fixup_no_write_suspend }, #endif #if !FORCE_WORD_WRITE - { CFI_MFR_ANY, CFI_ID_ANY, fixup_use_write_buffers, NULL }, + { CFI_MFR_ANY, CFI_ID_ANY, fixup_use_write_buffers }, #endif - { CFI_MFR_ST, 0x00ba, /* M28W320CT */ fixup_st_m28w320ct, NULL }, - { CFI_MFR_ST, 0x00bb, /* M28W320CB */ fixup_st_m28w320cb, NULL }, - { CFI_MFR_INTEL, CFI_ID_ANY, fixup_unlock_powerup_lock, NULL, }, - { 0, 0, NULL, NULL } + { CFI_MFR_ST, 0x00ba, /* M28W320CT */ fixup_st_m28w320ct }, + { CFI_MFR_ST, 0x00bb, /* M28W320CB */ fixup_st_m28w320cb }, + { CFI_MFR_INTEL, CFI_ID_ANY, fixup_unlock_powerup_lock }, + { 0, 0, NULL } }; static struct cfi_fixup jedec_fixup_table[] = { - { CFI_MFR_INTEL, I82802AB, fixup_use_fwh_lock, NULL, }, - { CFI_MFR_INTEL, I82802AC, fixup_use_fwh_lock, NULL, }, - { CFI_MFR_ST, M50LPW080, fixup_use_fwh_lock, NULL, }, - { CFI_MFR_ST, M50FLW080A, fixup_use_fwh_lock, NULL, }, - { CFI_MFR_ST, M50FLW080B, fixup_use_fwh_lock, NULL, }, - { 0, 0, NULL, NULL } + { CFI_MFR_INTEL, I82802AB, fixup_use_fwh_lock }, + { CFI_MFR_INTEL, I82802AC, fixup_use_fwh_lock }, + { CFI_MFR_ST, M50LPW080, fixup_use_fwh_lock }, + { CFI_MFR_ST, M50FLW080A, fixup_use_fwh_lock }, + { CFI_MFR_ST, M50FLW080B, fixup_use_fwh_lock }, + { 0, 0, NULL } }; static struct cfi_fixup fixup_table[] = { /* The CFI vendor ids and the JEDEC vendor IDs appear @@ -327,8 +327,8 @@ static struct cfi_fixup fixup_table[] = { * well. This table is to pick all cases where * we know that is the case. */ - { CFI_MFR_ANY, CFI_ID_ANY, fixup_use_point, NULL }, - { 0, 0, NULL, NULL } + { CFI_MFR_ANY, CFI_ID_ANY, fixup_use_point }, + { 0, 0, NULL } }; static void cfi_fixup_major_minor(struct cfi_private *cfi, @@ -455,6 +455,7 @@ struct mtd_info *cfi_cmdset_0001(struct map_info *map, int primary) mtd->flags = MTD_CAP_NORFLASH; mtd->name = map->name; mtd->writesize = 1; + mtd->writebufsize = 1 << cfi->cfiq->MaxBufWriteSize; mtd->reboot_notifier.notifier_call = cfi_intelext_reboot; diff --git a/drivers/mtd/chips/cfi_cmdset_0002.c b/drivers/mtd/chips/cfi_cmdset_0002.c index 3b8e32d..f072fcf 100644 --- a/drivers/mtd/chips/cfi_cmdset_0002.c +++ b/drivers/mtd/chips/cfi_cmdset_0002.c @@ -134,7 +134,7 @@ static void cfi_tell_features(struct cfi_pri_amdstd *extp) #ifdef AMD_BOOTLOC_BUG /* Wheee. Bring me the head of someone at AMD. */ -static void fixup_amd_bootblock(struct mtd_info *mtd, void* param) +static void fixup_amd_bootblock(struct mtd_info *mtd) { struct map_info *map = mtd->priv; struct cfi_private *cfi = map->fldrv_priv; @@ -186,7 +186,7 @@ static void fixup_amd_bootblock(struct mtd_info *mtd, void* param) } #endif -static void fixup_use_write_buffers(struct mtd_info *mtd, void *param) +static void fixup_use_write_buffers(struct mtd_info *mtd) { struct map_info *map = mtd->priv; struct cfi_private *cfi = map->fldrv_priv; @@ -197,7 +197,7 @@ static void fixup_use_write_buffers(struct mtd_info *mtd, void *param) } /* Atmel chips don't use the same PRI format as AMD chips */ -static void fixup_convert_atmel_pri(struct mtd_info *mtd, void *param) +static void fixup_convert_atmel_pri(struct mtd_info *mtd) { struct map_info *map = mtd->priv; struct cfi_private *cfi = map->fldrv_priv; @@ -228,14 +228,14 @@ static void fixup_convert_atmel_pri(struct mtd_info *mtd, void *param) cfi->cfiq->BufWriteTimeoutMax = 0; } -static void fixup_use_secsi(struct mtd_info *mtd, void *param) +static void fixup_use_secsi(struct mtd_info *mtd) { /* Setup for chips with a secsi area */ mtd->read_user_prot_reg = cfi_amdstd_secsi_read; mtd->read_fact_prot_reg = cfi_amdstd_secsi_read; } -static void fixup_use_erase_chip(struct mtd_info *mtd, void *param) +static void fixup_use_erase_chip(struct mtd_info *mtd) { struct map_info *map = mtd->priv; struct cfi_private *cfi = map->fldrv_priv; @@ -250,7 +250,7 @@ static void fixup_use_erase_chip(struct mtd_info *mtd, void *param) * Some Atmel chips (e.g. the AT49BV6416) power-up with all sectors * locked by default. */ -static void fixup_use_atmel_lock(struct mtd_info *mtd, void *param) +static void fixup_use_atmel_lock(struct mtd_info *mtd) { mtd->lock = cfi_atmel_lock; mtd->unlock = cfi_atmel_unlock; @@ -271,7 +271,7 @@ static void fixup_old_sst_eraseregion(struct mtd_info *mtd) cfi->cfiq->NumEraseRegions = 1; } -static void fixup_sst39vf(struct mtd_info *mtd, void *param) +static void fixup_sst39vf(struct mtd_info *mtd) { struct map_info *map = mtd->priv; struct cfi_private *cfi = map->fldrv_priv; @@ -282,7 +282,7 @@ static void fixup_sst39vf(struct mtd_info *mtd, void *param) cfi->addr_unlock2 = 0x2AAA; } -static void fixup_sst39vf_rev_b(struct mtd_info *mtd, void *param) +static void fixup_sst39vf_rev_b(struct mtd_info *mtd) { struct map_info *map = mtd->priv; struct cfi_private *cfi = map->fldrv_priv; @@ -295,12 +295,12 @@ static void fixup_sst39vf_rev_b(struct mtd_info *mtd, void *param) cfi->sector_erase_cmd = CMD(0x50); } -static void fixup_sst38vf640x_sectorsize(struct mtd_info *mtd, void *param) +static void fixup_sst38vf640x_sectorsize(struct mtd_info *mtd) { struct map_info *map = mtd->priv; struct cfi_private *cfi = map->fldrv_priv; - fixup_sst39vf_rev_b(mtd, param); + fixup_sst39vf_rev_b(mtd); /* * CFI reports 1024 sectors (0x03ff+1) of 64KBytes (0x0100*256) where @@ -310,7 +310,7 @@ static void fixup_sst38vf640x_sectorsize(struct mtd_info *mtd, void *param) pr_warning("%s: Bad 38VF640x CFI data; adjusting sector size from 64 to 8KiB\n", mtd->name); } -static void fixup_s29gl064n_sectors(struct mtd_info *mtd, void *param) +static void fixup_s29gl064n_sectors(struct mtd_info *mtd) { struct map_info *map = mtd->priv; struct cfi_private *cfi = map->fldrv_priv; @@ -321,7 +321,7 @@ static void fixup_s29gl064n_sectors(struct mtd_info *mtd, void *param) } } -static void fixup_s29gl032n_sectors(struct mtd_info *mtd, void *param) +static void fixup_s29gl032n_sectors(struct mtd_info *mtd) { struct map_info *map = mtd->priv; struct cfi_private *cfi = map->fldrv_priv; @@ -334,47 +334,47 @@ static void fixup_s29gl032n_sectors(struct mtd_info *mtd, void *param) /* Used to fix CFI-Tables of chips without Extended Query Tables */ static struct cfi_fixup cfi_nopri_fixup_table[] = { - { CFI_MFR_SST, 0x234A, fixup_sst39vf, NULL, }, /* SST39VF1602 */ - { CFI_MFR_SST, 0x234B, fixup_sst39vf, NULL, }, /* SST39VF1601 */ - { CFI_MFR_SST, 0x235A, fixup_sst39vf, NULL, }, /* SST39VF3202 */ - { CFI_MFR_SST, 0x235B, fixup_sst39vf, NULL, }, /* SST39VF3201 */ - { CFI_MFR_SST, 0x235C, fixup_sst39vf_rev_b, NULL, }, /* SST39VF3202B */ - { CFI_MFR_SST, 0x235D, fixup_sst39vf_rev_b, NULL, }, /* SST39VF3201B */ - { CFI_MFR_SST, 0x236C, fixup_sst39vf_rev_b, NULL, }, /* SST39VF6402B */ - { CFI_MFR_SST, 0x236D, fixup_sst39vf_rev_b, NULL, }, /* SST39VF6401B */ - { 0, 0, NULL, NULL } + { CFI_MFR_SST, 0x234a, fixup_sst39vf }, /* SST39VF1602 */ + { CFI_MFR_SST, 0x234b, fixup_sst39vf }, /* SST39VF1601 */ + { CFI_MFR_SST, 0x235a, fixup_sst39vf }, /* SST39VF3202 */ + { CFI_MFR_SST, 0x235b, fixup_sst39vf }, /* SST39VF3201 */ + { CFI_MFR_SST, 0x235c, fixup_sst39vf_rev_b }, /* SST39VF3202B */ + { CFI_MFR_SST, 0x235d, fixup_sst39vf_rev_b }, /* SST39VF3201B */ + { CFI_MFR_SST, 0x236c, fixup_sst39vf_rev_b }, /* SST39VF6402B */ + { CFI_MFR_SST, 0x236d, fixup_sst39vf_rev_b }, /* SST39VF6401B */ + { 0, 0, NULL } }; static struct cfi_fixup cfi_fixup_table[] = { - { CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri, NULL }, + { CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri }, #ifdef AMD_BOOTLOC_BUG - { CFI_MFR_AMD, CFI_ID_ANY, fixup_amd_bootblock, NULL }, - { CFI_MFR_MACRONIX, CFI_ID_ANY, fixup_amd_bootblock, NULL }, + { CFI_MFR_AMD, CFI_ID_ANY, fixup_amd_bootblock }, + { CFI_MFR_MACRONIX, CFI_ID_ANY, fixup_amd_bootblock }, #endif - { CFI_MFR_AMD, 0x0050, fixup_use_secsi, NULL, }, - { CFI_MFR_AMD, 0x0053, fixup_use_secsi, NULL, }, - { CFI_MFR_AMD, 0x0055, fixup_use_secsi, NULL, }, - { CFI_MFR_AMD, 0x0056, fixup_use_secsi, NULL, }, - { CFI_MFR_AMD, 0x005C, fixup_use_secsi, NULL, }, - { CFI_MFR_AMD, 0x005F, fixup_use_secsi, NULL, }, - { CFI_MFR_AMD, 0x0c01, fixup_s29gl064n_sectors, NULL, }, - { CFI_MFR_AMD, 0x1301, fixup_s29gl064n_sectors, NULL, }, - { CFI_MFR_AMD, 0x1a00, fixup_s29gl032n_sectors, NULL, }, - { CFI_MFR_AMD, 0x1a01, fixup_s29gl032n_sectors, NULL, }, - { CFI_MFR_SST, 0x536A, fixup_sst38vf640x_sectorsize, NULL, }, /* SST38VF6402 */ - { CFI_MFR_SST, 0x536B, fixup_sst38vf640x_sectorsize, NULL, }, /* SST38VF6401 */ - { CFI_MFR_SST, 0x536C, fixup_sst38vf640x_sectorsize, NULL, }, /* SST38VF6404 */ - { CFI_MFR_SST, 0x536D, fixup_sst38vf640x_sectorsize, NULL, }, /* SST38VF6403 */ + { CFI_MFR_AMD, 0x0050, fixup_use_secsi }, + { CFI_MFR_AMD, 0x0053, fixup_use_secsi }, + { CFI_MFR_AMD, 0x0055, fixup_use_secsi }, + { CFI_MFR_AMD, 0x0056, fixup_use_secsi }, + { CFI_MFR_AMD, 0x005C, fixup_use_secsi }, + { CFI_MFR_AMD, 0x005F, fixup_use_secsi }, + { CFI_MFR_AMD, 0x0c01, fixup_s29gl064n_sectors }, + { CFI_MFR_AMD, 0x1301, fixup_s29gl064n_sectors }, + { CFI_MFR_AMD, 0x1a00, fixup_s29gl032n_sectors }, + { CFI_MFR_AMD, 0x1a01, fixup_s29gl032n_sectors }, + { CFI_MFR_SST, 0x536a, fixup_sst38vf640x_sectorsize }, /* SST38VF6402 */ + { CFI_MFR_SST, 0x536b, fixup_sst38vf640x_sectorsize }, /* SST38VF6401 */ + { CFI_MFR_SST, 0x536c, fixup_sst38vf640x_sectorsize }, /* SST38VF6404 */ + { CFI_MFR_SST, 0x536d, fixup_sst38vf640x_sectorsize }, /* SST38VF6403 */ #if !FORCE_WORD_WRITE - { CFI_MFR_ANY, CFI_ID_ANY, fixup_use_write_buffers, NULL, }, + { CFI_MFR_ANY, CFI_ID_ANY, fixup_use_write_buffers }, #endif - { 0, 0, NULL, NULL } + { 0, 0, NULL } }; static struct cfi_fixup jedec_fixup_table[] = { - { CFI_MFR_SST, SST49LF004B, fixup_use_fwh_lock, NULL, }, - { CFI_MFR_SST, SST49LF040B, fixup_use_fwh_lock, NULL, }, - { CFI_MFR_SST, SST49LF008A, fixup_use_fwh_lock, NULL, }, - { 0, 0, NULL, NULL } + { CFI_MFR_SST, SST49LF004B, fixup_use_fwh_lock }, + { CFI_MFR_SST, SST49LF040B, fixup_use_fwh_lock }, + { CFI_MFR_SST, SST49LF008A, fixup_use_fwh_lock }, + { 0, 0, NULL } }; static struct cfi_fixup fixup_table[] = { @@ -383,18 +383,30 @@ static struct cfi_fixup fixup_table[] = { * well. This table is to pick all cases where * we know that is the case. */ - { CFI_MFR_ANY, CFI_ID_ANY, fixup_use_erase_chip, NULL }, - { CFI_MFR_ATMEL, AT49BV6416, fixup_use_atmel_lock, NULL }, - { 0, 0, NULL, NULL } + { CFI_MFR_ANY, CFI_ID_ANY, fixup_use_erase_chip }, + { CFI_MFR_ATMEL, AT49BV6416, fixup_use_atmel_lock }, + { 0, 0, NULL } }; static void cfi_fixup_major_minor(struct cfi_private *cfi, struct cfi_pri_amdstd *extp) { - if (cfi->mfr == CFI_MFR_SAMSUNG && cfi->id == 0x257e && - extp->MajorVersion == '0') - extp->MajorVersion = '1'; + if (cfi->mfr == CFI_MFR_SAMSUNG) { + if ((extp->MajorVersion == '0' && extp->MinorVersion == '0') || + (extp->MajorVersion == '3' && extp->MinorVersion == '3')) { + /* + * Samsung K8P2815UQB and K8D6x16UxM chips + * report major=0 / minor=0. + * K8D3x16UxC chips report major=3 / minor=3. + */ + printk(KERN_NOTICE " Fixing Samsung's Amd/Fujitsu" + " Extended Query version to 1.%c\n", + extp->MinorVersion); + extp->MajorVersion = '1'; + } + } + /* * SST 38VF640x chips report major=0xFF / minor=0xFF. */ @@ -428,6 +440,10 @@ struct mtd_info *cfi_cmdset_0002(struct map_info *map, int primary) mtd->flags = MTD_CAP_NORFLASH; mtd->name = map->name; mtd->writesize = 1; + mtd->writebufsize = 1 << cfi->cfiq->MaxBufWriteSize; + + DEBUG(MTD_DEBUG_LEVEL3, "MTD %s(): write buffer size %d\n", + __func__, mtd->writebufsize); mtd->reboot_notifier.notifier_call = cfi_amdstd_reboot; diff --git a/drivers/mtd/chips/cfi_cmdset_0020.c b/drivers/mtd/chips/cfi_cmdset_0020.c index 314af1f..c04b765 100644 --- a/drivers/mtd/chips/cfi_cmdset_0020.c +++ b/drivers/mtd/chips/cfi_cmdset_0020.c @@ -238,6 +238,7 @@ static struct mtd_info *cfi_staa_setup(struct map_info *map) mtd->resume = cfi_staa_resume; mtd->flags = MTD_CAP_NORFLASH & ~MTD_BIT_WRITEABLE; mtd->writesize = 8; /* FIXME: Should be 0 for STMicro flashes w/out ECC */ + mtd->writebufsize = 1 << cfi->cfiq->MaxBufWriteSize; map->fldrv = &cfi_staa_chipdrv; __module_get(THIS_MODULE); mtd->name = map->name; diff --git a/drivers/mtd/chips/cfi_util.c b/drivers/mtd/chips/cfi_util.c index 360525c..6ae3d11 100644 --- a/drivers/mtd/chips/cfi_util.c +++ b/drivers/mtd/chips/cfi_util.c @@ -156,7 +156,7 @@ void cfi_fixup(struct mtd_info *mtd, struct cfi_fixup *fixups) for (f=fixups; f->fixup; f++) { if (((f->mfr == CFI_MFR_ANY) || (f->mfr == cfi->mfr)) && ((f->id == CFI_ID_ANY) || (f->id == cfi->id))) { - f->fixup(mtd, f->param); + f->fixup(mtd); } } } diff --git a/drivers/mtd/chips/fwh_lock.h b/drivers/mtd/chips/fwh_lock.h index d180649..5e3cc80 100644 --- a/drivers/mtd/chips/fwh_lock.h +++ b/drivers/mtd/chips/fwh_lock.h @@ -98,7 +98,7 @@ static int fwh_unlock_varsize(struct mtd_info *mtd, loff_t ofs, uint64_t len) return ret; } -static void fixup_use_fwh_lock(struct mtd_info *mtd, void *param) +static void fixup_use_fwh_lock(struct mtd_info *mtd) { printk(KERN_NOTICE "using fwh lock/unlock method\n"); /* Setup for the chips with the fwh lock method */ diff --git a/drivers/mtd/devices/m25p80.c b/drivers/mtd/devices/m25p80.c index bf5a002..e4eba6c 100644 --- a/drivers/mtd/devices/m25p80.c +++ b/drivers/mtd/devices/m25p80.c @@ -51,6 +51,10 @@ #define OPCODE_WRDI 0x04 /* Write disable */ #define OPCODE_AAI_WP 0xad /* Auto address increment word program */ +/* Used for Macronix flashes only. */ +#define OPCODE_EN4B 0xb7 /* Enter 4-byte mode */ +#define OPCODE_EX4B 0xe9 /* Exit 4-byte mode */ + /* Status Register bits. */ #define SR_WIP 1 /* Write in progress */ #define SR_WEL 2 /* Write enable latch */ @@ -62,7 +66,7 @@ /* Define max times to check status register before we give up. */ #define MAX_READY_WAIT_JIFFIES (40 * HZ) /* M25P16 specs 40s max chip erase */ -#define MAX_CMD_SIZE 4 +#define MAX_CMD_SIZE 5 #ifdef CONFIG_M25PXX_USE_FAST_READ #define OPCODE_READ OPCODE_FAST_READ @@ -152,6 +156,16 @@ static inline int write_disable(struct m25p *flash) } /* + * Enable/disable 4-byte addressing mode. + */ +static inline int set_4byte(struct m25p *flash, int enable) +{ + u8 code = enable ? OPCODE_EN4B : OPCODE_EX4B; + + return spi_write_then_read(flash->spi, &code, 1, NULL, 0); +} + +/* * Service routine to read status register until ready, or timeout occurs. * Returns non-zero if error. */ @@ -207,6 +221,7 @@ static void m25p_addr2cmd(struct m25p *flash, unsigned int addr, u8 *cmd) cmd[1] = addr >> (flash->addr_width * 8 - 8); cmd[2] = addr >> (flash->addr_width * 8 - 16); cmd[3] = addr >> (flash->addr_width * 8 - 24); + cmd[4] = addr >> (flash->addr_width * 8 - 32); } static int m25p_cmdsz(struct m25p *flash) @@ -482,6 +497,10 @@ static int sst_write(struct mtd_info *mtd, loff_t to, size_t len, size_t actual; int cmd_sz, ret; + DEBUG(MTD_DEBUG_LEVEL2, "%s: %s %s 0x%08x, len %zd\n", + dev_name(&flash->spi->dev), __func__, "to", + (u32)to, len); + *retlen = 0; /* sanity checks */ @@ -607,7 +626,6 @@ struct flash_info { .sector_size = (_sector_size), \ .n_sectors = (_n_sectors), \ .page_size = 256, \ - .addr_width = 3, \ .flags = (_flags), \ }) @@ -635,7 +653,7 @@ static const struct spi_device_id m25p_ids[] = { { "at26f004", INFO(0x1f0400, 0, 64 * 1024, 8, SECT_4K) }, { "at26df081a", INFO(0x1f4501, 0, 64 * 1024, 16, SECT_4K) }, { "at26df161a", INFO(0x1f4601, 0, 64 * 1024, 32, SECT_4K) }, - { "at26df321", INFO(0x1f4701, 0, 64 * 1024, 64, SECT_4K) }, + { "at26df321", INFO(0x1f4700, 0, 64 * 1024, 64, SECT_4K) }, /* EON -- en25pxx */ { "en25p32", INFO(0x1c2016, 0, 64 * 1024, 64, 0) }, @@ -653,6 +671,8 @@ static const struct spi_device_id m25p_ids[] = { { "mx25l6405d", INFO(0xc22017, 0, 64 * 1024, 128, 0) }, { "mx25l12805d", INFO(0xc22018, 0, 64 * 1024, 256, 0) }, { "mx25l12855e", INFO(0xc22618, 0, 64 * 1024, 256, 0) }, + { "mx25l25635e", INFO(0xc22019, 0, 64 * 1024, 512, 0) }, + { "mx25l25655e", INFO(0xc22619, 0, 64 * 1024, 512, 0) }, /* Spansion -- single (large) sector size only, at least * for the chips listed here (without boot sectors). @@ -764,6 +784,7 @@ static const struct spi_device_id *__devinit jedec_probe(struct spi_device *spi) return &m25p_ids[tmp]; } } + dev_err(&spi->dev, "unrecognized JEDEC id %06x\n", jedec); return ERR_PTR(-ENODEV); } @@ -883,7 +904,17 @@ static int __devinit m25p_probe(struct spi_device *spi) flash->mtd.dev.parent = &spi->dev; flash->page_size = info->page_size; - flash->addr_width = info->addr_width; + + if (info->addr_width) + flash->addr_width = info->addr_width; + else { + /* enable 4-byte addressing if the device exceeds 16MiB */ + if (flash->mtd.size > 0x1000000) { + flash->addr_width = 4; + set_4byte(flash, 1); + } else + flash->addr_width = 3; + } dev_info(&spi->dev, "%s (%lld Kbytes)\n", id->name, (long long)flash->mtd.size >> 10); diff --git a/drivers/mtd/devices/sst25l.c b/drivers/mtd/devices/sst25l.c index 684247a..c163e61 100644 --- a/drivers/mtd/devices/sst25l.c +++ b/drivers/mtd/devices/sst25l.c @@ -335,7 +335,7 @@ out: return ret; } -static struct flash_info *__init sst25l_match_device(struct spi_device *spi) +static struct flash_info *__devinit sst25l_match_device(struct spi_device *spi) { struct flash_info *flash_info = NULL; struct spi_message m; @@ -375,7 +375,7 @@ static struct flash_info *__init sst25l_match_device(struct spi_device *spi) return flash_info; } -static int __init sst25l_probe(struct spi_device *spi) +static int __devinit sst25l_probe(struct spi_device *spi) { struct flash_info *flash_info; struct sst25l_flash *flash; diff --git a/drivers/mtd/maps/amd76xrom.c b/drivers/mtd/maps/amd76xrom.c index 19fe92d..77d64ce 100644 --- a/drivers/mtd/maps/amd76xrom.c +++ b/drivers/mtd/maps/amd76xrom.c @@ -149,11 +149,8 @@ static int __devinit amd76xrom_init_one (struct pci_dev *pdev, if (request_resource(&iomem_resource, &window->rsrc)) { window->rsrc.parent = NULL; printk(KERN_ERR MOD_NAME - " %s(): Unable to register resource" - " 0x%.16llx-0x%.16llx - kernel bug?\n", - __func__, - (unsigned long long)window->rsrc.start, - (unsigned long long)window->rsrc.end); + " %s(): Unable to register resource %pR - kernel bug?\n", + __func__, &window->rsrc); } diff --git a/drivers/mtd/maps/bcm963xx-flash.c b/drivers/mtd/maps/bcm963xx-flash.c index d175c12..1f30495 100644 --- a/drivers/mtd/maps/bcm963xx-flash.c +++ b/drivers/mtd/maps/bcm963xx-flash.c @@ -196,10 +196,15 @@ static int bcm963xx_probe(struct platform_device *pdev) bcm963xx_mtd_info = do_map_probe("cfi_probe", &bcm963xx_map); if (!bcm963xx_mtd_info) { dev_err(&pdev->dev, "failed to probe using CFI\n"); + bcm963xx_mtd_info = do_map_probe("jedec_probe", &bcm963xx_map); + if (bcm963xx_mtd_info) + goto probe_ok; + dev_err(&pdev->dev, "failed to probe using JEDEC\n"); err = -EIO; goto err_probe; } +probe_ok: bcm963xx_mtd_info->owner = THIS_MODULE; /* This is mutually exclusive */ diff --git a/drivers/mtd/maps/ck804xrom.c b/drivers/mtd/maps/ck804xrom.c index ddb462b..5fdb7b2 100644 --- a/drivers/mtd/maps/ck804xrom.c +++ b/drivers/mtd/maps/ck804xrom.c @@ -178,11 +178,8 @@ static int __devinit ck804xrom_init_one (struct pci_dev *pdev, if (request_resource(&iomem_resource, &window->rsrc)) { window->rsrc.parent = NULL; printk(KERN_ERR MOD_NAME - " %s(): Unable to register resource" - " 0x%.016llx-0x%.016llx - kernel bug?\n", - __func__, - (unsigned long long)window->rsrc.start, - (unsigned long long)window->rsrc.end); + " %s(): Unable to register resource %pR - kernel bug?\n", + __func__, &window->rsrc); } diff --git a/drivers/mtd/maps/esb2rom.c b/drivers/mtd/maps/esb2rom.c index d12c93d..4feb750 100644 --- a/drivers/mtd/maps/esb2rom.c +++ b/drivers/mtd/maps/esb2rom.c @@ -242,12 +242,9 @@ static int __devinit esb2rom_init_one(struct pci_dev *pdev, window->rsrc.flags = IORESOURCE_MEM | IORESOURCE_BUSY; if (request_resource(&iomem_resource, &window->rsrc)) { window->rsrc.parent = NULL; - printk(KERN_DEBUG MOD_NAME - ": %s(): Unable to register resource" - " 0x%.08llx-0x%.08llx - kernel bug?\n", - __func__, - (unsigned long long)window->rsrc.start, - (unsigned long long)window->rsrc.end); + printk(KERN_DEBUG MOD_NAME ": " + "%s(): Unable to register resource %pR - kernel bug?\n", + __func__, &window->rsrc); } /* Map the firmware hub into my address space. */ diff --git a/drivers/mtd/maps/ichxrom.c b/drivers/mtd/maps/ichxrom.c index f102bf2..1337a41 100644 --- a/drivers/mtd/maps/ichxrom.c +++ b/drivers/mtd/maps/ichxrom.c @@ -175,12 +175,9 @@ static int __devinit ichxrom_init_one (struct pci_dev *pdev, window->rsrc.flags = IORESOURCE_MEM | IORESOURCE_BUSY; if (request_resource(&iomem_resource, &window->rsrc)) { window->rsrc.parent = NULL; - printk(KERN_DEBUG MOD_NAME - ": %s(): Unable to register resource" - " 0x%.16llx-0x%.16llx - kernel bug?\n", - __func__, - (unsigned long long)window->rsrc.start, - (unsigned long long)window->rsrc.end); + printk(KERN_DEBUG MOD_NAME ": " + "%s(): Unable to register resource %pR - kernel bug?\n", + __func__, &window->rsrc); } /* Map the firmware hub into my address space. */ diff --git a/drivers/mtd/maps/physmap_of.c b/drivers/mtd/maps/physmap_of.c index 9861814..8506578 100644 --- a/drivers/mtd/maps/physmap_of.c +++ b/drivers/mtd/maps/physmap_of.c @@ -274,9 +274,7 @@ static int __devinit of_flash_probe(struct platform_device *dev, continue; } - dev_dbg(&dev->dev, "of_flash device: %.8llx-%.8llx\n", - (unsigned long long)res.start, - (unsigned long long)res.end); + dev_dbg(&dev->dev, "of_flash device: %pR\n", &res); err = -EBUSY; res_size = resource_size(&res); diff --git a/drivers/mtd/maps/scx200_docflash.c b/drivers/mtd/maps/scx200_docflash.c index b5391eb..027e628 100644 --- a/drivers/mtd/maps/scx200_docflash.c +++ b/drivers/mtd/maps/scx200_docflash.c @@ -166,9 +166,8 @@ static int __init init_scx200_docflash(void) outl(pmr, scx200_cb_base + SCx200_PMR); } - printk(KERN_INFO NAME ": DOCCS mapped at 0x%llx-0x%llx, width %d\n", - (unsigned long long)docmem.start, - (unsigned long long)docmem.end, width); + printk(KERN_INFO NAME ": DOCCS mapped at %pR, width %d\n", + &docmem, width); scx200_docflash_map.size = size; if (width == 8) diff --git a/drivers/mtd/maps/tqm8xxl.c b/drivers/mtd/maps/tqm8xxl.c index 6014698..c08e140 100644 --- a/drivers/mtd/maps/tqm8xxl.c +++ b/drivers/mtd/maps/tqm8xxl.c @@ -139,7 +139,7 @@ static int __init init_tqm_mtd(void) goto error_mem; } - map_banks[idx]->name = (char *)kmalloc(16, GFP_KERNEL); + map_banks[idx]->name = kmalloc(16, GFP_KERNEL); if (!map_banks[idx]->name) { ret = -ENOMEM; diff --git a/drivers/mtd/mtdchar.c b/drivers/mtd/mtdchar.c index ee4bb33..145b3d0d 100644 --- a/drivers/mtd/mtdchar.c +++ b/drivers/mtd/mtdchar.c @@ -522,10 +522,6 @@ static int mtd_blkpg_ioctl(struct mtd_info *mtd, if (!capable(CAP_SYS_ADMIN)) return -EPERM; - /* Only master mtd device must be used to control partitions */ - if (!mtd_is_master(mtd)) - return -EINVAL; - if (copy_from_user(&a, arg, sizeof(struct blkpg_ioctl_arg))) return -EFAULT; @@ -535,6 +531,10 @@ static int mtd_blkpg_ioctl(struct mtd_info *mtd, switch (a.op) { case BLKPG_ADD_PARTITION: + /* Only master mtd device must be used to add partitions */ + if (mtd_is_partition(mtd)) + return -EINVAL; + return mtd_add_partition(mtd, p.devname, p.start, p.length); case BLKPG_DEL_PARTITION: @@ -601,6 +601,7 @@ static int mtd_ioctl(struct file *file, u_int cmd, u_long arg) } case MEMGETINFO: + memset(&info, 0, sizeof(info)); info.type = mtd->type; info.flags = mtd->flags; info.size = mtd->size; @@ -609,7 +610,6 @@ static int mtd_ioctl(struct file *file, u_int cmd, u_long arg) info.oobsize = mtd->oobsize; /* The below fields are obsolete */ info.ecctype = -1; - info.eccsize = 0; if (copy_to_user(argp, &info, sizeof(struct mtd_info_user))) return -EFAULT; break; @@ -1201,7 +1201,7 @@ err_unregister_chdev: static void __exit cleanup_mtdchar(void) { unregister_mtd_user(&mtdchar_notifier); - mntput_long(mtd_inode_mnt); + mntput(mtd_inode_mnt); unregister_filesystem(&mtd_inodefs_type); __unregister_chrdev(MTD_CHAR_MAJOR, 0, 1 << MINORBITS, "mtd"); } diff --git a/drivers/mtd/mtdconcat.c b/drivers/mtd/mtdconcat.c index bf8de09..5f5777b 100644 --- a/drivers/mtd/mtdconcat.c +++ b/drivers/mtd/mtdconcat.c @@ -776,6 +776,7 @@ struct mtd_info *mtd_concat_create(struct mtd_info *subdev[], /* subdevices to c concat->mtd.size = subdev[0]->size; concat->mtd.erasesize = subdev[0]->erasesize; concat->mtd.writesize = subdev[0]->writesize; + concat->mtd.writebufsize = subdev[0]->writebufsize; concat->mtd.subpage_sft = subdev[0]->subpage_sft; concat->mtd.oobsize = subdev[0]->oobsize; concat->mtd.oobavail = subdev[0]->oobavail; diff --git a/drivers/mtd/mtdoops.c b/drivers/mtd/mtdoops.c index c948150..e3e40f4 100644 --- a/drivers/mtd/mtdoops.c +++ b/drivers/mtd/mtdoops.c @@ -401,7 +401,8 @@ static void mtdoops_notify_remove(struct mtd_info *mtd) printk(KERN_WARNING "mtdoops: could not unregister kmsg_dumper\n"); cxt->mtd = NULL; - flush_scheduled_work(); + flush_work_sync(&cxt->work_erase); + flush_work_sync(&cxt->work_write); } diff --git a/drivers/mtd/mtdpart.c b/drivers/mtd/mtdpart.c index 79e3689..0a47601 100644 --- a/drivers/mtd/mtdpart.c +++ b/drivers/mtd/mtdpart.c @@ -120,8 +120,25 @@ static int part_read_oob(struct mtd_info *mtd, loff_t from, return -EINVAL; if (ops->datbuf && from + ops->len > mtd->size) return -EINVAL; - res = part->master->read_oob(part->master, from + part->offset, ops); + /* + * If OOB is also requested, make sure that we do not read past the end + * of this partition. + */ + if (ops->oobbuf) { + size_t len, pages; + + if (ops->mode == MTD_OOB_AUTO) + len = mtd->oobavail; + else + len = mtd->oobsize; + pages = mtd_div_by_ws(mtd->size, mtd); + pages -= mtd_div_by_ws(from, mtd); + if (ops->ooboffs + ops->ooblen > pages * len) + return -EINVAL; + } + + res = part->master->read_oob(part->master, from + part->offset, ops); if (unlikely(res)) { if (res == -EUCLEAN) mtd->ecc_stats.corrected++; @@ -384,6 +401,7 @@ static struct mtd_part *allocate_partition(struct mtd_info *master, slave->mtd.flags = master->flags & ~part->mask_flags; slave->mtd.size = part->size; slave->mtd.writesize = master->writesize; + slave->mtd.writebufsize = master->writebufsize; slave->mtd.oobsize = master->oobsize; slave->mtd.oobavail = master->oobavail; slave->mtd.subpage_sft = master->subpage_sft; @@ -720,19 +738,19 @@ int parse_mtd_partitions(struct mtd_info *master, const char **types, } EXPORT_SYMBOL_GPL(parse_mtd_partitions); -int mtd_is_master(struct mtd_info *mtd) +int mtd_is_partition(struct mtd_info *mtd) { struct mtd_part *part; - int nopart = 0; + int ispart = 0; mutex_lock(&mtd_partitions_mutex); list_for_each_entry(part, &mtd_partitions, list) if (&part->mtd == mtd) { - nopart = 1; + ispart = 1; break; } mutex_unlock(&mtd_partitions_mutex); - return nopart; + return ispart; } -EXPORT_SYMBOL_GPL(mtd_is_master); +EXPORT_SYMBOL_GPL(mtd_is_partition); diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig index 8229802..c895922 100644 --- a/drivers/mtd/nand/Kconfig +++ b/drivers/mtd/nand/Kconfig @@ -96,6 +96,7 @@ config MTD_NAND_SPIA config MTD_NAND_AMS_DELTA tristate "NAND Flash device on Amstrad E3" depends on MACH_AMS_DELTA + default y help Support for NAND flash on Amstrad E3 (Delta). diff --git a/drivers/mtd/nand/ams-delta.c b/drivers/mtd/nand/ams-delta.c index 2548e10..a067d09 100644 --- a/drivers/mtd/nand/ams-delta.c +++ b/drivers/mtd/nand/ams-delta.c @@ -4,6 +4,8 @@ * Copyright (C) 2006 Jonathan McDowell <noodles@earth.li> * * Derived from drivers/mtd/toto.c + * Converted to platform driver by Janusz Krzysztofik <jkrzyszt@tis.icnet.pl> + * Partially stolen from drivers/mtd/nand/plat_nand.c * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -62,9 +64,10 @@ static struct mtd_partition partition_info[] = { static void ams_delta_write_byte(struct mtd_info *mtd, u_char byte) { struct nand_chip *this = mtd->priv; + void __iomem *io_base = this->priv; - omap_writew(0, (OMAP1_MPUIO_BASE + OMAP_MPUIO_IO_CNTL)); - omap_writew(byte, this->IO_ADDR_W); + writew(0, io_base + OMAP_MPUIO_IO_CNTL); + writew(byte, this->IO_ADDR_W); ams_delta_latch2_write(AMS_DELTA_LATCH2_NAND_NWE, 0); ndelay(40); ams_delta_latch2_write(AMS_DELTA_LATCH2_NAND_NWE, @@ -75,11 +78,12 @@ static u_char ams_delta_read_byte(struct mtd_info *mtd) { u_char res; struct nand_chip *this = mtd->priv; + void __iomem *io_base = this->priv; ams_delta_latch2_write(AMS_DELTA_LATCH2_NAND_NRE, 0); ndelay(40); - omap_writew(~0, (OMAP1_MPUIO_BASE + OMAP_MPUIO_IO_CNTL)); - res = omap_readw(this->IO_ADDR_R); + writew(~0, io_base + OMAP_MPUIO_IO_CNTL); + res = readw(this->IO_ADDR_R); ams_delta_latch2_write(AMS_DELTA_LATCH2_NAND_NRE, AMS_DELTA_LATCH2_NAND_NRE); @@ -151,11 +155,16 @@ static int ams_delta_nand_ready(struct mtd_info *mtd) /* * Main initialization routine */ -static int __init ams_delta_init(void) +static int __devinit ams_delta_init(struct platform_device *pdev) { struct nand_chip *this; + struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + void __iomem *io_base; int err = 0; + if (!res) + return -ENXIO; + /* Allocate memory for MTD device structure and private data */ ams_delta_mtd = kmalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip), GFP_KERNEL); @@ -177,9 +186,25 @@ static int __init ams_delta_init(void) /* Link the private data with the MTD structure */ ams_delta_mtd->priv = this; + if (!request_mem_region(res->start, resource_size(res), + dev_name(&pdev->dev))) { + dev_err(&pdev->dev, "request_mem_region failed\n"); + err = -EBUSY; + goto out_free; + } + + io_base = ioremap(res->start, resource_size(res)); + if (io_base == NULL) { + dev_err(&pdev->dev, "ioremap failed\n"); + err = -EIO; + goto out_release_io; + } + + this->priv = io_base; + /* Set address of NAND IO lines */ - this->IO_ADDR_R = (OMAP1_MPUIO_BASE + OMAP_MPUIO_INPUT_LATCH); - this->IO_ADDR_W = (OMAP1_MPUIO_BASE + OMAP_MPUIO_OUTPUT); + this->IO_ADDR_R = io_base + OMAP_MPUIO_INPUT_LATCH; + this->IO_ADDR_W = io_base + OMAP_MPUIO_OUTPUT; this->read_byte = ams_delta_read_byte; this->write_buf = ams_delta_write_buf; this->read_buf = ams_delta_read_buf; @@ -195,6 +220,8 @@ static int __init ams_delta_init(void) this->chip_delay = 30; this->ecc.mode = NAND_ECC_SOFT; + platform_set_drvdata(pdev, io_base); + /* Set chip enabled, but */ ams_delta_latch2_write(NAND_MASK, AMS_DELTA_LATCH2_NAND_NRE | AMS_DELTA_LATCH2_NAND_NWE | @@ -214,25 +241,56 @@ static int __init ams_delta_init(void) goto out; out_mtd: + platform_set_drvdata(pdev, NULL); + iounmap(io_base); +out_release_io: + release_mem_region(res->start, resource_size(res)); +out_free: kfree(ams_delta_mtd); out: return err; } -module_init(ams_delta_init); - /* * Clean up routine */ -static void __exit ams_delta_cleanup(void) +static int __devexit ams_delta_cleanup(struct platform_device *pdev) { + void __iomem *io_base = platform_get_drvdata(pdev); + struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + /* Release resources, unregister device */ nand_release(ams_delta_mtd); + iounmap(io_base); + release_mem_region(res->start, resource_size(res)); + /* Free the MTD device structure */ kfree(ams_delta_mtd); + + return 0; +} + +static struct platform_driver ams_delta_nand_driver = { + .probe = ams_delta_init, + .remove = __devexit_p(ams_delta_cleanup), + .driver = { + .name = "ams-delta-nand", + .owner = THIS_MODULE, + }, +}; + +static int __init ams_delta_nand_init(void) +{ + return platform_driver_register(&ams_delta_nand_driver); +} +module_init(ams_delta_nand_init); + +static void __exit ams_delta_nand_exit(void) +{ + platform_driver_unregister(&ams_delta_nand_driver); } -module_exit(ams_delta_cleanup); +module_exit(ams_delta_nand_exit); MODULE_LICENSE("GPL"); MODULE_AUTHOR("Jonathan McDowell <noodles@earth.li>"); diff --git a/drivers/mtd/nand/fsl_elbc_nand.c b/drivers/mtd/nand/fsl_elbc_nand.c index c141b07..7a13d42 100644 --- a/drivers/mtd/nand/fsl_elbc_nand.c +++ b/drivers/mtd/nand/fsl_elbc_nand.c @@ -388,6 +388,8 @@ static void fsl_elbc_cmdfunc(struct mtd_info *mtd, unsigned int command, "page_addr: 0x%x, column: 0x%x.\n", page_addr, column); + elbc_fcm_ctrl->column = column; + elbc_fcm_ctrl->oob = 0; elbc_fcm_ctrl->use_mdr = 1; fcr = (NAND_CMD_STATUS << FCR_CMD1_SHIFT) | diff --git a/drivers/mtd/nand/fsmc_nand.c b/drivers/mtd/nand/fsmc_nand.c index 02edfba..205b10b 100644 --- a/drivers/mtd/nand/fsmc_nand.c +++ b/drivers/mtd/nand/fsmc_nand.c @@ -31,6 +31,7 @@ #include <linux/io.h> #include <linux/slab.h> #include <linux/mtd/fsmc.h> +#include <linux/amba/bus.h> #include <mtd/mtd-abi.h> static struct nand_ecclayout fsmc_ecc1_layout = { @@ -119,21 +120,36 @@ static struct fsmc_eccplace fsmc_ecc4_sp_place = { } }; -/* - * Default partition tables to be used if the partition information not - * provided through platform data - */ -#define PARTITION(n, off, sz) {.name = n, .offset = off, .size = sz} +#ifdef CONFIG_MTD_PARTITIONS /* + * Default partition tables to be used if the partition information not + * provided through platform data. + * * Default partition layout for small page(= 512 bytes) devices * Size for "Root file system" is updated in driver based on actual device size */ static struct mtd_partition partition_info_16KB_blk[] = { - PARTITION("X-loader", 0, 4 * 0x4000), - PARTITION("U-Boot", 0x10000, 20 * 0x4000), - PARTITION("Kernel", 0x60000, 256 * 0x4000), - PARTITION("Root File System", 0x460000, 0), + { + .name = "X-loader", + .offset = 0, + .size = 4*0x4000, + }, + { + .name = "U-Boot", + .offset = 0x10000, + .size = 20*0x4000, + }, + { + .name = "Kernel", + .offset = 0x60000, + .size = 256*0x4000, + }, + { + .name = "Root File System", + .offset = 0x460000, + .size = 0, + }, }; /* @@ -141,19 +157,37 @@ static struct mtd_partition partition_info_16KB_blk[] = { * Size for "Root file system" is updated in driver based on actual device size */ static struct mtd_partition partition_info_128KB_blk[] = { - PARTITION("X-loader", 0, 4 * 0x20000), - PARTITION("U-Boot", 0x80000, 12 * 0x20000), - PARTITION("Kernel", 0x200000, 48 * 0x20000), - PARTITION("Root File System", 0x800000, 0), + { + .name = "X-loader", + .offset = 0, + .size = 4*0x20000, + }, + { + .name = "U-Boot", + .offset = 0x80000, + .size = 12*0x20000, + }, + { + .name = "Kernel", + .offset = 0x200000, + .size = 48*0x20000, + }, + { + .name = "Root File System", + .offset = 0x800000, + .size = 0, + }, }; #ifdef CONFIG_MTD_CMDLINE_PARTS const char *part_probes[] = { "cmdlinepart", NULL }; #endif +#endif /** - * struct fsmc_nand_data - atructure for FSMC NAND device state + * struct fsmc_nand_data - structure for FSMC NAND device state * + * @pid: Part ID on the AMBA PrimeCell format * @mtd: MTD info for a NAND flash. * @nand: Chip related info for a NAND flash. * @partitions: Partition info for a NAND Flash. @@ -169,6 +203,7 @@ const char *part_probes[] = { "cmdlinepart", NULL }; * @regs_va: FSMC regs base address. */ struct fsmc_nand_data { + u32 pid; struct mtd_info mtd; struct nand_chip nand; struct mtd_partition *partitions; @@ -508,7 +543,9 @@ static int __init fsmc_nand_probe(struct platform_device *pdev) struct nand_chip *nand; struct fsmc_regs *regs; struct resource *res; - int nr_parts, ret = 0; + int ret = 0; + u32 pid; + int i; if (!pdata) { dev_err(&pdev->dev, "platform data is NULL\n"); @@ -598,6 +635,18 @@ static int __init fsmc_nand_probe(struct platform_device *pdev) if (ret) goto err_probe1; + /* + * This device ID is actually a common AMBA ID as used on the + * AMBA PrimeCell bus. However it is not a PrimeCell. + */ + for (pid = 0, i = 0; i < 4; i++) + pid |= (readl(host->regs_va + resource_size(res) - 0x20 + 4 * i) & 255) << (i * 8); + host->pid = pid; + dev_info(&pdev->dev, "FSMC device partno %03x, manufacturer %02x, " + "revision %02x, config %02x\n", + AMBA_PART_BITS(pid), AMBA_MANF_BITS(pid), + AMBA_REV_BITS(pid), AMBA_CONFIG_BITS(pid)); + host->bank = pdata->bank; host->select_chip = pdata->select_bank; regs = host->regs_va; @@ -625,7 +674,7 @@ static int __init fsmc_nand_probe(struct platform_device *pdev) fsmc_nand_setup(regs, host->bank, nand->options & NAND_BUSWIDTH_16); - if (get_fsmc_version(host->regs_va) == FSMC_VER8) { + if (AMBA_REV_BITS(host->pid) >= 8) { nand->ecc.read_page = fsmc_read_page_hwecc; nand->ecc.calculate = fsmc_read_hwecc_ecc4; nand->ecc.correct = fsmc_correct_data; @@ -645,7 +694,7 @@ static int __init fsmc_nand_probe(struct platform_device *pdev) goto err_probe; } - if (get_fsmc_version(host->regs_va) == FSMC_VER8) { + if (AMBA_REV_BITS(host->pid) >= 8) { if (host->mtd.writesize == 512) { nand->ecc.layout = &fsmc_ecc4_sp_layout; host->ecc_place = &fsmc_ecc4_sp_place; @@ -676,11 +725,9 @@ static int __init fsmc_nand_probe(struct platform_device *pdev) * Check if partition info passed via command line */ host->mtd.name = "nand"; - nr_parts = parse_mtd_partitions(&host->mtd, part_probes, + host->nr_partitions = parse_mtd_partitions(&host->mtd, part_probes, &host->partitions, 0); - if (nr_parts > 0) { - host->nr_partitions = nr_parts; - } else { + if (host->nr_partitions <= 0) { #endif /* * Check if partition info passed via command line diff --git a/drivers/mtd/nand/jz4740_nand.c b/drivers/mtd/nand/jz4740_nand.c index 67343fc..cea38a5 100644 --- a/drivers/mtd/nand/jz4740_nand.c +++ b/drivers/mtd/nand/jz4740_nand.c @@ -251,58 +251,6 @@ static int jz_nand_correct_ecc_rs(struct mtd_info *mtd, uint8_t *dat, return 0; } - -/* Copy paste of nand_read_page_hwecc_oob_first except for different eccpos - * handling. The ecc area is for 4k chips 72 bytes long and thus does not fit - * into the eccpos array. */ -static int jz_nand_read_page_hwecc_oob_first(struct mtd_info *mtd, - struct nand_chip *chip, uint8_t *buf, int page) -{ - int i, eccsize = chip->ecc.size; - int eccbytes = chip->ecc.bytes; - int eccsteps = chip->ecc.steps; - uint8_t *p = buf; - unsigned int ecc_offset = chip->page_shift; - - /* Read the OOB area first */ - chip->cmdfunc(mtd, NAND_CMD_READOOB, 0, page); - chip->read_buf(mtd, chip->oob_poi, mtd->oobsize); - chip->cmdfunc(mtd, NAND_CMD_READ0, 0, page); - - for (i = ecc_offset; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { - int stat; - - chip->ecc.hwctl(mtd, NAND_ECC_READ); - chip->read_buf(mtd, p, eccsize); - - stat = chip->ecc.correct(mtd, p, &chip->oob_poi[i], NULL); - if (stat < 0) - mtd->ecc_stats.failed++; - else - mtd->ecc_stats.corrected += stat; - } - return 0; -} - -/* Copy-and-paste of nand_write_page_hwecc with different eccpos handling. */ -static void jz_nand_write_page_hwecc(struct mtd_info *mtd, - struct nand_chip *chip, const uint8_t *buf) -{ - int i, eccsize = chip->ecc.size; - int eccbytes = chip->ecc.bytes; - int eccsteps = chip->ecc.steps; - const uint8_t *p = buf; - unsigned int ecc_offset = chip->page_shift; - - for (i = ecc_offset; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { - chip->ecc.hwctl(mtd, NAND_ECC_WRITE); - chip->write_buf(mtd, p, eccsize); - chip->ecc.calculate(mtd, p, &chip->oob_poi[i]); - } - - chip->write_buf(mtd, chip->oob_poi, mtd->oobsize); -} - #ifdef CONFIG_MTD_CMDLINE_PARTS static const char *part_probes[] = {"cmdline", NULL}; #endif @@ -393,9 +341,6 @@ static int __devinit jz_nand_probe(struct platform_device *pdev) chip->ecc.size = 512; chip->ecc.bytes = 9; - chip->ecc.read_page = jz_nand_read_page_hwecc_oob_first; - chip->ecc.write_page = jz_nand_write_page_hwecc; - if (pdata) chip->ecc.layout = pdata->ecc_layout; @@ -489,7 +434,7 @@ static int __devexit jz_nand_remove(struct platform_device *pdev) return 0; } -struct platform_driver jz_nand_driver = { +static struct platform_driver jz_nand_driver = { .probe = jz_nand_probe, .remove = __devexit_p(jz_nand_remove), .driver = { diff --git a/drivers/mtd/nand/mxc_nand.c b/drivers/mtd/nand/mxc_nand.c index 214b03a..ef932ba 100644 --- a/drivers/mtd/nand/mxc_nand.c +++ b/drivers/mtd/nand/mxc_nand.c @@ -1009,7 +1009,7 @@ static int __init mxcnd_probe(struct platform_device *pdev) struct mxc_nand_platform_data *pdata = pdev->dev.platform_data; struct mxc_nand_host *host; struct resource *res; - int err = 0, nr_parts = 0; + int err = 0, __maybe_unused nr_parts = 0; struct nand_ecclayout *oob_smallpage, *oob_largepage; /* Allocate memory for MTD device structure and private data */ diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c index 31bf376..a9c6ce7 100644 --- a/drivers/mtd/nand/nand_base.c +++ b/drivers/mtd/nand/nand_base.c @@ -2865,20 +2865,24 @@ static int nand_flash_detect_onfi(struct mtd_info *mtd, struct nand_chip *chip, /* check version */ val = le16_to_cpu(p->revision); - if (val == 1 || val > (1 << 4)) { - printk(KERN_INFO "%s: unsupported ONFI version: %d\n", - __func__, val); - return 0; - } - - if (val & (1 << 4)) + if (val & (1 << 5)) + chip->onfi_version = 23; + else if (val & (1 << 4)) chip->onfi_version = 22; else if (val & (1 << 3)) chip->onfi_version = 21; else if (val & (1 << 2)) chip->onfi_version = 20; - else + else if (val & (1 << 1)) chip->onfi_version = 10; + else + chip->onfi_version = 0; + + if (!chip->onfi_version) { + printk(KERN_INFO "%s: unsupported ONFI version: %d\n", + __func__, val); + return 0; + } sanitize_string(p->manufacturer, sizeof(p->manufacturer)); sanitize_string(p->model, sizeof(p->model)); @@ -2887,7 +2891,7 @@ static int nand_flash_detect_onfi(struct mtd_info *mtd, struct nand_chip *chip, mtd->writesize = le32_to_cpu(p->byte_per_page); mtd->erasesize = le32_to_cpu(p->pages_per_block) * mtd->writesize; mtd->oobsize = le16_to_cpu(p->spare_bytes_per_page); - chip->chipsize = le32_to_cpu(p->blocks_per_lun) * mtd->erasesize; + chip->chipsize = (uint64_t)le32_to_cpu(p->blocks_per_lun) * mtd->erasesize; busw = 0; if (le16_to_cpu(p->features) & 1) busw = NAND_BUSWIDTH_16; @@ -3157,7 +3161,7 @@ ident_done: printk(KERN_INFO "NAND device: Manufacturer ID:" " 0x%02x, Chip ID: 0x%02x (%s %s)\n", *maf_id, *dev_id, nand_manuf_ids[maf_idx].name, - chip->onfi_version ? type->name : chip->onfi_params.model); + chip->onfi_version ? chip->onfi_params.model : type->name); return type; } @@ -3435,6 +3439,7 @@ int nand_scan_tail(struct mtd_info *mtd) mtd->resume = nand_resume; mtd->block_isbad = nand_block_isbad; mtd->block_markbad = nand_block_markbad; + mtd->writebufsize = mtd->writesize; /* propagate ecc.layout to mtd_info */ mtd->ecclayout = chip->ecc.layout; diff --git a/drivers/mtd/nand/nand_bbt.c b/drivers/mtd/nand/nand_bbt.c index 586b981..6ebd869 100644 --- a/drivers/mtd/nand/nand_bbt.c +++ b/drivers/mtd/nand/nand_bbt.c @@ -1092,7 +1092,8 @@ static void mark_bbt_region(struct mtd_info *mtd, struct nand_bbt_descr *td) /** * verify_bbt_descr - verify the bad block description - * @bd: the table to verify + * @mtd: MTD device structure + * @bd: the table to verify * * This functions performs a few sanity checks on the bad block description * table. diff --git a/drivers/mtd/nand/nandsim.c b/drivers/mtd/nand/nandsim.c index a6a73aa..a5aa99f 100644 --- a/drivers/mtd/nand/nandsim.c +++ b/drivers/mtd/nand/nandsim.c @@ -210,12 +210,12 @@ MODULE_PARM_DESC(bbt, "0 OOB, 1 BBT with marker in OOB, 2 BBT with marker in d #define STATE_CMD_READ0 0x00000001 /* read data from the beginning of page */ #define STATE_CMD_READ1 0x00000002 /* read data from the second half of page */ #define STATE_CMD_READSTART 0x00000003 /* read data second command (large page devices) */ -#define STATE_CMD_PAGEPROG 0x00000004 /* start page programm */ +#define STATE_CMD_PAGEPROG 0x00000004 /* start page program */ #define STATE_CMD_READOOB 0x00000005 /* read OOB area */ #define STATE_CMD_ERASE1 0x00000006 /* sector erase first command */ #define STATE_CMD_STATUS 0x00000007 /* read status */ #define STATE_CMD_STATUS_M 0x00000008 /* read multi-plane status (isn't implemented) */ -#define STATE_CMD_SEQIN 0x00000009 /* sequential data imput */ +#define STATE_CMD_SEQIN 0x00000009 /* sequential data input */ #define STATE_CMD_READID 0x0000000A /* read ID */ #define STATE_CMD_ERASE2 0x0000000B /* sector erase second command */ #define STATE_CMD_RESET 0x0000000C /* reset */ @@ -230,7 +230,7 @@ MODULE_PARM_DESC(bbt, "0 OOB, 1 BBT with marker in OOB, 2 BBT with marker in d #define STATE_ADDR_ZERO 0x00000040 /* one byte zero address was accepted */ #define STATE_ADDR_MASK 0x00000070 /* address states mask */ -/* Durind data input/output the simulator is in these states */ +/* During data input/output the simulator is in these states */ #define STATE_DATAIN 0x00000100 /* waiting for data input */ #define STATE_DATAIN_MASK 0x00000100 /* data input states mask */ @@ -248,7 +248,7 @@ MODULE_PARM_DESC(bbt, "0 OOB, 1 BBT with marker in OOB, 2 BBT with marker in d /* Simulator's actions bit masks */ #define ACTION_CPY 0x00100000 /* copy page/OOB to the internal buffer */ -#define ACTION_PRGPAGE 0x00200000 /* programm the internal buffer to flash */ +#define ACTION_PRGPAGE 0x00200000 /* program the internal buffer to flash */ #define ACTION_SECERASE 0x00300000 /* erase sector */ #define ACTION_ZEROOFF 0x00400000 /* don't add any offset to address */ #define ACTION_HALFOFF 0x00500000 /* add to address half of page */ @@ -263,18 +263,18 @@ MODULE_PARM_DESC(bbt, "0 OOB, 1 BBT with marker in OOB, 2 BBT with marker in d #define OPT_PAGE512 0x00000002 /* 512-byte page chips */ #define OPT_PAGE2048 0x00000008 /* 2048-byte page chips */ #define OPT_SMARTMEDIA 0x00000010 /* SmartMedia technology chips */ -#define OPT_AUTOINCR 0x00000020 /* page number auto inctimentation is possible */ +#define OPT_AUTOINCR 0x00000020 /* page number auto incrementation is possible */ #define OPT_PAGE512_8BIT 0x00000040 /* 512-byte page chips with 8-bit bus width */ #define OPT_PAGE4096 0x00000080 /* 4096-byte page chips */ #define OPT_LARGEPAGE (OPT_PAGE2048 | OPT_PAGE4096) /* 2048 & 4096-byte page chips */ #define OPT_SMALLPAGE (OPT_PAGE256 | OPT_PAGE512) /* 256 and 512-byte page chips */ -/* Remove action bits ftom state */ +/* Remove action bits from state */ #define NS_STATE(x) ((x) & ~ACTION_MASK) /* * Maximum previous states which need to be saved. Currently saving is - * only needed for page programm operation with preceeded read command + * only needed for page program operation with preceded read command * (which is only valid for 512-byte pages). */ #define NS_MAX_PREVSTATES 1 @@ -380,16 +380,16 @@ static struct nandsim_operations { /* Read OOB */ {OPT_SMALLPAGE, {STATE_CMD_READOOB | ACTION_OOBOFF, STATE_ADDR_PAGE | ACTION_CPY, STATE_DATAOUT, STATE_READY}}, - /* Programm page starting from the beginning */ + /* Program page starting from the beginning */ {OPT_ANY, {STATE_CMD_SEQIN, STATE_ADDR_PAGE, STATE_DATAIN, STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}}, - /* Programm page starting from the beginning */ + /* Program page starting from the beginning */ {OPT_SMALLPAGE, {STATE_CMD_READ0, STATE_CMD_SEQIN | ACTION_ZEROOFF, STATE_ADDR_PAGE, STATE_DATAIN, STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}}, - /* Programm page starting from the second half */ + /* Program page starting from the second half */ {OPT_PAGE512, {STATE_CMD_READ1, STATE_CMD_SEQIN | ACTION_HALFOFF, STATE_ADDR_PAGE, STATE_DATAIN, STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}}, - /* Programm OOB */ + /* Program OOB */ {OPT_SMALLPAGE, {STATE_CMD_READOOB, STATE_CMD_SEQIN | ACTION_OOBOFF, STATE_ADDR_PAGE, STATE_DATAIN, STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}}, /* Erase sector */ @@ -470,7 +470,7 @@ static int alloc_device(struct nandsim *ns) err = -EINVAL; goto err_close; } - ns->pages_written = vmalloc(ns->geom.pgnum); + ns->pages_written = vzalloc(ns->geom.pgnum); if (!ns->pages_written) { NS_ERR("alloc_device: unable to allocate pages written array\n"); err = -ENOMEM; @@ -483,7 +483,6 @@ static int alloc_device(struct nandsim *ns) goto err_free; } ns->cfile = cfile; - memset(ns->pages_written, 0, ns->geom.pgnum); return 0; } @@ -1171,9 +1170,9 @@ static inline void switch_to_ready_state(struct nandsim *ns, u_char status) * of supported operations. * * Operation can be unknown because of the following. - * 1. New command was accepted and this is the firs call to find the + * 1. New command was accepted and this is the first call to find the * correspondent states chain. In this case ns->npstates = 0; - * 2. There is several operations which begin with the same command(s) + * 2. There are several operations which begin with the same command(s) * (for example program from the second half and read from the * second half operations both begin with the READ1 command). In this * case the ns->pstates[] array contains previous states. @@ -1186,7 +1185,7 @@ static inline void switch_to_ready_state(struct nandsim *ns, u_char status) * ns->ops, ns->state, ns->nxstate are initialized, ns->npstate is * zeroed). * - * If there are several maches, the current state is pushed to the + * If there are several matches, the current state is pushed to the * ns->pstates. * * The operation can be unknown only while commands are input to the chip. @@ -1195,10 +1194,10 @@ static inline void switch_to_ready_state(struct nandsim *ns, u_char status) * operation is searched using the following pattern: * ns->pstates[0], ... ns->pstates[ns->npstates], <address input> * - * It is supposed that this pattern must either match one operation on + * It is supposed that this pattern must either match one operation or * none. There can't be ambiguity in that case. * - * If no matches found, the functions does the following: + * If no matches found, the function does the following: * 1. if there are saved states present, try to ignore them and search * again only using the last command. If nothing was found, switch * to the STATE_READY state. @@ -1668,7 +1667,7 @@ static int do_state_action(struct nandsim *ns, uint32_t action) case ACTION_PRGPAGE: /* - * Programm page - move internal buffer data to the page. + * Program page - move internal buffer data to the page. */ if (ns->lines.wp) { @@ -1933,7 +1932,7 @@ static u_char ns_nand_read_byte(struct mtd_info *mtd) NS_DBG("read_byte: all bytes were read\n"); /* - * The OPT_AUTOINCR allows to read next conseqitive pages without + * The OPT_AUTOINCR allows to read next consecutive pages without * new read operation cycle. */ if ((ns->options & OPT_AUTOINCR) && NS_STATE(ns->state) == STATE_DATAOUT) { diff --git a/drivers/mtd/nand/pasemi_nand.c b/drivers/mtd/nand/pasemi_nand.c index 6ddb246..bb277a5 100644 --- a/drivers/mtd/nand/pasemi_nand.c +++ b/drivers/mtd/nand/pasemi_nand.c @@ -107,7 +107,7 @@ static int __devinit pasemi_nand_probe(struct platform_device *ofdev, if (pasemi_nand_mtd) return -ENODEV; - pr_debug("pasemi_nand at %llx-%llx\n", res.start, res.end); + pr_debug("pasemi_nand at %pR\n", &res); /* Allocate memory for MTD device structure and private data */ pasemi_nand_mtd = kzalloc(sizeof(struct mtd_info) + diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c index 17f8518..ea2c288 100644 --- a/drivers/mtd/nand/pxa3xx_nand.c +++ b/drivers/mtd/nand/pxa3xx_nand.c @@ -885,6 +885,7 @@ static int pxa3xx_nand_detect_config(struct pxa3xx_nand_info *info) /* set info fields needed to __readid */ info->read_id_bytes = (info->page_size == 2048) ? 4 : 2; info->reg_ndcr = ndcr; + info->cmdset = &default_cmdset; if (__readid(info, &id)) return -ENODEV; @@ -915,7 +916,6 @@ static int pxa3xx_nand_detect_config(struct pxa3xx_nand_info *info) info->ndtr0cs0 = nand_readl(info, NDTR0CS0); info->ndtr1cs0 = nand_readl(info, NDTR1CS0); - info->cmdset = &default_cmdset; return 0; } diff --git a/drivers/mtd/nand/txx9ndfmc.c b/drivers/mtd/nand/txx9ndfmc.c index 054a41c..ca270a4 100644 --- a/drivers/mtd/nand/txx9ndfmc.c +++ b/drivers/mtd/nand/txx9ndfmc.c @@ -277,8 +277,9 @@ static int txx9ndfmc_nand_scan(struct mtd_info *mtd) ret = nand_scan_ident(mtd, 1, NULL); if (!ret) { if (mtd->writesize >= 512) { - chip->ecc.size = mtd->writesize; - chip->ecc.bytes = 3 * (mtd->writesize / 256); + /* Hardware ECC 6 byte ECC per 512 Byte data */ + chip->ecc.size = 512; + chip->ecc.bytes = 6; } ret = nand_scan_tail(mtd); } diff --git a/drivers/mtd/onenand/omap2.c b/drivers/mtd/onenand/omap2.c index d0894ca7..ac31f46 100644 --- a/drivers/mtd/onenand/omap2.c +++ b/drivers/mtd/onenand/omap2.c @@ -35,6 +35,7 @@ #include <linux/dma-mapping.h> #include <linux/io.h> #include <linux/slab.h> +#include <linux/regulator/consumer.h> #include <asm/mach/flash.h> #include <plat/gpmc.h> @@ -63,8 +64,13 @@ struct omap2_onenand { int dma_channel; int freq; int (*setup)(void __iomem *base, int freq); + struct regulator *regulator; }; +#ifdef CONFIG_MTD_PARTITIONS +static const char *part_probes[] = { "cmdlinepart", NULL, }; +#endif + static void omap2_onenand_dma_cb(int lch, u16 ch_status, void *data) { struct omap2_onenand *c = data; @@ -108,8 +114,9 @@ static void wait_warn(char *msg, int state, unsigned int ctrl, static int omap2_onenand_wait(struct mtd_info *mtd, int state) { struct omap2_onenand *c = container_of(mtd, struct omap2_onenand, mtd); + struct onenand_chip *this = mtd->priv; unsigned int intr = 0; - unsigned int ctrl; + unsigned int ctrl, ctrl_mask; unsigned long timeout; u32 syscfg; @@ -180,7 +187,8 @@ retry: if (result == 0) { /* Timeout after 20ms */ ctrl = read_reg(c, ONENAND_REG_CTRL_STATUS); - if (ctrl & ONENAND_CTRL_ONGO) { + if (ctrl & ONENAND_CTRL_ONGO && + !this->ongoing) { /* * The operation seems to be still going * so give it some more time. @@ -269,7 +277,11 @@ retry: return -EIO; } - if (ctrl & 0xFE9F) + ctrl_mask = 0xFE9F; + if (this->ongoing) + ctrl_mask &= ~0x8000; + + if (ctrl & ctrl_mask) wait_warn("unexpected controller status", state, ctrl, intr); return 0; @@ -591,6 +603,30 @@ static void omap2_onenand_shutdown(struct platform_device *pdev) memset((__force void *)c->onenand.base, 0, ONENAND_BUFRAM_SIZE); } +static int omap2_onenand_enable(struct mtd_info *mtd) +{ + int ret; + struct omap2_onenand *c = container_of(mtd, struct omap2_onenand, mtd); + + ret = regulator_enable(c->regulator); + if (ret != 0) + dev_err(&c->pdev->dev, "cant enable regulator\n"); + + return ret; +} + +static int omap2_onenand_disable(struct mtd_info *mtd) +{ + int ret; + struct omap2_onenand *c = container_of(mtd, struct omap2_onenand, mtd); + + ret = regulator_disable(c->regulator); + if (ret != 0) + dev_err(&c->pdev->dev, "cant disable regulator\n"); + + return ret; +} + static int __devinit omap2_onenand_probe(struct platform_device *pdev) { struct omap_onenand_platform_data *pdata; @@ -705,8 +741,18 @@ static int __devinit omap2_onenand_probe(struct platform_device *pdev) } } + if (pdata->regulator_can_sleep) { + c->regulator = regulator_get(&pdev->dev, "vonenand"); + if (IS_ERR(c->regulator)) { + dev_err(&pdev->dev, "Failed to get regulator\n"); + goto err_release_dma; + } + c->onenand.enable = omap2_onenand_enable; + c->onenand.disable = omap2_onenand_disable; + } + if ((r = onenand_scan(&c->mtd, 1)) < 0) - goto err_release_dma; + goto err_release_regulator; switch ((c->onenand.version_id >> 4) & 0xf) { case 0: @@ -727,13 +773,15 @@ static int __devinit omap2_onenand_probe(struct platform_device *pdev) } #ifdef CONFIG_MTD_PARTITIONS - if (pdata->parts != NULL) - r = add_mtd_partitions(&c->mtd, pdata->parts, - pdata->nr_parts); + r = parse_mtd_partitions(&c->mtd, part_probes, &c->parts, 0); + if (r > 0) + r = add_mtd_partitions(&c->mtd, c->parts, r); + else if (pdata->parts != NULL) + r = add_mtd_partitions(&c->mtd, pdata->parts, pdata->nr_parts); else #endif r = add_mtd_device(&c->mtd); - if (r < 0) + if (r) goto err_release_onenand; platform_set_drvdata(pdev, c); @@ -742,6 +790,8 @@ static int __devinit omap2_onenand_probe(struct platform_device *pdev) err_release_onenand: onenand_release(&c->mtd); +err_release_regulator: + regulator_put(c->regulator); err_release_dma: if (c->dma_channel != -1) omap_free_dma(c->dma_channel); @@ -757,6 +807,7 @@ err_release_mem_region: err_free_cs: gpmc_cs_free(c->gpmc_cs); err_kfree: + kfree(c->parts); kfree(c); return r; @@ -766,18 +817,8 @@ static int __devexit omap2_onenand_remove(struct platform_device *pdev) { struct omap2_onenand *c = dev_get_drvdata(&pdev->dev); - BUG_ON(c == NULL); - -#ifdef CONFIG_MTD_PARTITIONS - if (c->parts) - del_mtd_partitions(&c->mtd); - else - del_mtd_device(&c->mtd); -#else - del_mtd_device(&c->mtd); -#endif - onenand_release(&c->mtd); + regulator_put(c->regulator); if (c->dma_channel != -1) omap_free_dma(c->dma_channel); omap2_onenand_shutdown(pdev); @@ -789,6 +830,7 @@ static int __devexit omap2_onenand_remove(struct platform_device *pdev) iounmap(c->onenand.base); release_mem_region(c->phys_base, ONENAND_IO_SIZE); gpmc_cs_free(c->gpmc_cs); + kfree(c->parts); kfree(c); return 0; diff --git a/drivers/mtd/onenand/onenand_base.c b/drivers/mtd/onenand/onenand_base.c index 6b3a875..bac41ca 100644 --- a/drivers/mtd/onenand/onenand_base.c +++ b/drivers/mtd/onenand/onenand_base.c @@ -400,8 +400,7 @@ static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, size_t le value = onenand_bufferram_address(this, block); this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2); - if (ONENAND_IS_MLC(this) || ONENAND_IS_2PLANE(this) || - ONENAND_IS_4KB_PAGE(this)) + if (ONENAND_IS_2PLANE(this) || ONENAND_IS_4KB_PAGE(this)) /* It is always BufferRAM0 */ ONENAND_SET_BUFFERRAM0(this); else @@ -430,7 +429,7 @@ static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, size_t le case FLEXONENAND_CMD_RECOVER_LSB: case ONENAND_CMD_READ: case ONENAND_CMD_READOOB: - if (ONENAND_IS_MLC(this) || ONENAND_IS_4KB_PAGE(this)) + if (ONENAND_IS_4KB_PAGE(this)) /* It is always BufferRAM0 */ dataram = ONENAND_SET_BUFFERRAM0(this); else @@ -949,6 +948,8 @@ static int onenand_get_device(struct mtd_info *mtd, int new_state) if (this->state == FL_READY) { this->state = new_state; spin_unlock(&this->chip_lock); + if (new_state != FL_PM_SUSPENDED && this->enable) + this->enable(mtd); break; } if (new_state == FL_PM_SUSPENDED) { @@ -975,6 +976,8 @@ static void onenand_release_device(struct mtd_info *mtd) { struct onenand_chip *this = mtd->priv; + if (this->state != FL_PM_SUSPENDED && this->disable) + this->disable(mtd); /* Release the chip */ spin_lock(&this->chip_lock); this->state = FL_READY; @@ -1353,7 +1356,7 @@ static int onenand_read_oob_nolock(struct mtd_info *mtd, loff_t from, stats = mtd->ecc_stats; - readcmd = ONENAND_IS_MLC(this) ? ONENAND_CMD_READ : ONENAND_CMD_READOOB; + readcmd = ONENAND_IS_4KB_PAGE(this) ? ONENAND_CMD_READ : ONENAND_CMD_READOOB; while (read < len) { cond_resched(); @@ -1429,7 +1432,7 @@ static int onenand_read(struct mtd_info *mtd, loff_t from, size_t len, int ret; onenand_get_device(mtd, FL_READING); - ret = ONENAND_IS_MLC(this) || ONENAND_IS_4KB_PAGE(this) ? + ret = ONENAND_IS_4KB_PAGE(this) ? onenand_mlc_read_ops_nolock(mtd, from, &ops) : onenand_read_ops_nolock(mtd, from, &ops); onenand_release_device(mtd); @@ -1464,7 +1467,7 @@ static int onenand_read_oob(struct mtd_info *mtd, loff_t from, onenand_get_device(mtd, FL_READING); if (ops->datbuf) - ret = ONENAND_IS_MLC(this) || ONENAND_IS_4KB_PAGE(this) ? + ret = ONENAND_IS_4KB_PAGE(this) ? onenand_mlc_read_ops_nolock(mtd, from, ops) : onenand_read_ops_nolock(mtd, from, ops); else @@ -1485,8 +1488,7 @@ static int onenand_bbt_wait(struct mtd_info *mtd, int state) { struct onenand_chip *this = mtd->priv; unsigned long timeout; - unsigned int interrupt; - unsigned int ctrl; + unsigned int interrupt, ctrl, ecc, addr1, addr8; /* The 20 msec is enough */ timeout = jiffies + msecs_to_jiffies(20); @@ -1498,25 +1500,28 @@ static int onenand_bbt_wait(struct mtd_info *mtd, int state) /* To get correct interrupt status in timeout case */ interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT); ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS); + addr1 = this->read_word(this->base + ONENAND_REG_START_ADDRESS1); + addr8 = this->read_word(this->base + ONENAND_REG_START_ADDRESS8); if (interrupt & ONENAND_INT_READ) { - int ecc = onenand_read_ecc(this); + ecc = onenand_read_ecc(this); if (ecc & ONENAND_ECC_2BIT_ALL) { - printk(KERN_WARNING "%s: ecc error = 0x%04x, " - "controller error 0x%04x\n", - __func__, ecc, ctrl); + printk(KERN_DEBUG "%s: ecc 0x%04x ctrl 0x%04x " + "intr 0x%04x addr1 %#x addr8 %#x\n", + __func__, ecc, ctrl, interrupt, addr1, addr8); return ONENAND_BBT_READ_ECC_ERROR; } } else { - printk(KERN_ERR "%s: read timeout! ctrl=0x%04x intr=0x%04x\n", - __func__, ctrl, interrupt); + printk(KERN_ERR "%s: read timeout! ctrl 0x%04x " + "intr 0x%04x addr1 %#x addr8 %#x\n", + __func__, ctrl, interrupt, addr1, addr8); return ONENAND_BBT_READ_FATAL_ERROR; } /* Initial bad block case: 0x2400 or 0x0400 */ if (ctrl & ONENAND_CTRL_ERROR) { - printk(KERN_DEBUG "%s: controller error = 0x%04x\n", - __func__, ctrl); + printk(KERN_DEBUG "%s: ctrl 0x%04x intr 0x%04x addr1 %#x " + "addr8 %#x\n", __func__, ctrl, interrupt, addr1, addr8); return ONENAND_BBT_READ_ERROR; } @@ -1558,7 +1563,7 @@ int onenand_bbt_read_oob(struct mtd_info *mtd, loff_t from, column = from & (mtd->oobsize - 1); - readcmd = ONENAND_IS_MLC(this) ? ONENAND_CMD_READ : ONENAND_CMD_READOOB; + readcmd = ONENAND_IS_4KB_PAGE(this) ? ONENAND_CMD_READ : ONENAND_CMD_READOOB; while (read < len) { cond_resched(); @@ -1612,7 +1617,7 @@ static int onenand_verify_oob(struct mtd_info *mtd, const u_char *buf, loff_t to u_char *oob_buf = this->oob_buf; int status, i, readcmd; - readcmd = ONENAND_IS_MLC(this) ? ONENAND_CMD_READ : ONENAND_CMD_READOOB; + readcmd = ONENAND_IS_4KB_PAGE(this) ? ONENAND_CMD_READ : ONENAND_CMD_READOOB; this->command(mtd, readcmd, to, mtd->oobsize); onenand_update_bufferram(mtd, to, 0); @@ -1845,7 +1850,7 @@ static int onenand_write_ops_nolock(struct mtd_info *mtd, loff_t to, const u_char *buf = ops->datbuf; const u_char *oob = ops->oobbuf; u_char *oobbuf; - int ret = 0; + int ret = 0, cmd; DEBUG(MTD_DEBUG_LEVEL3, "%s: to = 0x%08x, len = %i\n", __func__, (unsigned int) to, (int) len); @@ -1954,7 +1959,19 @@ static int onenand_write_ops_nolock(struct mtd_info *mtd, loff_t to, ONENAND_SET_NEXT_BUFFERRAM(this); } - this->command(mtd, ONENAND_CMD_PROG, to, mtd->writesize); + this->ongoing = 0; + cmd = ONENAND_CMD_PROG; + + /* Exclude 1st OTP and OTP blocks for cache program feature */ + if (ONENAND_IS_CACHE_PROGRAM(this) && + likely(onenand_block(this, to) != 0) && + ONENAND_IS_4KB_PAGE(this) && + ((written + thislen) < len)) { + cmd = ONENAND_CMD_2X_CACHE_PROG; + this->ongoing = 1; + } + + this->command(mtd, cmd, to, mtd->writesize); /* * 2 PLANE, MLC, and Flex-OneNAND wait here @@ -2067,7 +2084,7 @@ static int onenand_write_oob_nolock(struct mtd_info *mtd, loff_t to, oobbuf = this->oob_buf; - oobcmd = ONENAND_IS_MLC(this) ? ONENAND_CMD_PROG : ONENAND_CMD_PROGOOB; + oobcmd = ONENAND_IS_4KB_PAGE(this) ? ONENAND_CMD_PROG : ONENAND_CMD_PROGOOB; /* Loop until all data write */ while (written < len) { @@ -2086,7 +2103,7 @@ static int onenand_write_oob_nolock(struct mtd_info *mtd, loff_t to, memcpy(oobbuf + column, buf, thislen); this->write_bufferram(mtd, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize); - if (ONENAND_IS_MLC(this) || ONENAND_IS_4KB_PAGE(this)) { + if (ONENAND_IS_4KB_PAGE(this)) { /* Set main area of DataRAM to 0xff*/ memset(this->page_buf, 0xff, mtd->writesize); this->write_bufferram(mtd, ONENAND_DATARAM, @@ -2481,7 +2498,8 @@ static int onenand_erase(struct mtd_info *mtd, struct erase_info *instr) /* Grab the lock and see if the device is available */ onenand_get_device(mtd, FL_ERASING); - if (region || instr->len < MB_ERASE_MIN_BLK_COUNT * block_size) { + if (ONENAND_IS_4KB_PAGE(this) || region || + instr->len < MB_ERASE_MIN_BLK_COUNT * block_size) { /* region is set for Flex-OneNAND (no mb erase) */ ret = onenand_block_by_block_erase(mtd, instr, region, block_size); @@ -3029,7 +3047,7 @@ static int do_otp_read(struct mtd_info *mtd, loff_t from, size_t len, this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0); this->wait(mtd, FL_OTPING); - ret = ONENAND_IS_MLC(this) || ONENAND_IS_4KB_PAGE(this) ? + ret = ONENAND_IS_4KB_PAGE(this) ? onenand_mlc_read_ops_nolock(mtd, from, &ops) : onenand_read_ops_nolock(mtd, from, &ops); @@ -3377,8 +3395,10 @@ static void onenand_check_features(struct mtd_info *mtd) case ONENAND_DEVICE_DENSITY_4Gb: if (ONENAND_IS_DDP(this)) this->options |= ONENAND_HAS_2PLANE; - else if (numbufs == 1) + else if (numbufs == 1) { this->options |= ONENAND_HAS_4KB_PAGE; + this->options |= ONENAND_HAS_CACHE_PROGRAM; + } case ONENAND_DEVICE_DENSITY_2Gb: /* 2Gb DDP does not have 2 plane */ @@ -3399,7 +3419,11 @@ static void onenand_check_features(struct mtd_info *mtd) break; } - if (ONENAND_IS_MLC(this) || ONENAND_IS_4KB_PAGE(this)) + /* The MLC has 4KiB pagesize. */ + if (ONENAND_IS_MLC(this)) + this->options |= ONENAND_HAS_4KB_PAGE; + + if (ONENAND_IS_4KB_PAGE(this)) this->options &= ~ONENAND_HAS_2PLANE; if (FLEXONENAND(this)) { @@ -3415,6 +3439,8 @@ static void onenand_check_features(struct mtd_info *mtd) printk(KERN_DEBUG "Chip has 2 plane\n"); if (this->options & ONENAND_HAS_4KB_PAGE) printk(KERN_DEBUG "Chip has 4KiB pagesize\n"); + if (this->options & ONENAND_HAS_CACHE_PROGRAM) + printk(KERN_DEBUG "Chip has cache program feature\n"); } /** @@ -3831,7 +3857,7 @@ static int onenand_probe(struct mtd_info *mtd) /* The data buffer size is equal to page size */ mtd->writesize = this->read_word(this->base + ONENAND_REG_DATA_BUFFER_SIZE); /* We use the full BufferRAM */ - if (ONENAND_IS_MLC(this) || ONENAND_IS_4KB_PAGE(this)) + if (ONENAND_IS_4KB_PAGE(this)) mtd->writesize <<= 1; mtd->oobsize = mtd->writesize >> 5; @@ -4054,6 +4080,7 @@ int onenand_scan(struct mtd_info *mtd, int maxchips) mtd->block_isbad = onenand_block_isbad; mtd->block_markbad = onenand_block_markbad; mtd->owner = THIS_MODULE; + mtd->writebufsize = mtd->writesize; /* Unlock whole block */ this->unlock_all(mtd); diff --git a/drivers/mtd/onenand/onenand_bbt.c b/drivers/mtd/onenand/onenand_bbt.c index 01ab5b3..fc2c16a 100644 --- a/drivers/mtd/onenand/onenand_bbt.c +++ b/drivers/mtd/onenand/onenand_bbt.c @@ -91,16 +91,18 @@ static int create_bbt(struct mtd_info *mtd, uint8_t *buf, struct nand_bbt_descr for (j = 0; j < len; j++) { /* No need to read pages fully, * just read required OOB bytes */ - ret = onenand_bbt_read_oob(mtd, from + j * mtd->writesize + bd->offs, &ops); + ret = onenand_bbt_read_oob(mtd, + from + j * this->writesize + bd->offs, &ops); /* If it is a initial bad block, just ignore it */ if (ret == ONENAND_BBT_READ_FATAL_ERROR) return -EIO; - if (ret || check_short_pattern(&buf[j * scanlen], scanlen, mtd->writesize, bd)) { + if (ret || check_short_pattern(&buf[j * scanlen], + scanlen, this->writesize, bd)) { bbm->bbt[i >> 3] |= 0x03 << (i & 0x6); - printk(KERN_WARNING "Bad eraseblock %d at 0x%08x\n", - i >> 1, (unsigned int) from); + printk(KERN_INFO "OneNAND eraseblock %d is an " + "initial bad block\n", i >> 1); mtd->ecc_stats.badblocks++; break; } diff --git a/drivers/mtd/onenand/samsung.c b/drivers/mtd/onenand/samsung.c index 0de7a05..a4c74a9 100644 --- a/drivers/mtd/onenand/samsung.c +++ b/drivers/mtd/onenand/samsung.c @@ -651,7 +651,7 @@ static int s5pc110_read_bufferram(struct mtd_info *mtd, int area, void __iomem *p; void *buf = (void *) buffer; dma_addr_t dma_src, dma_dst; - int err, page_dma = 0; + int err, ofs, page_dma = 0; struct device *dev = &onenand->pdev->dev; p = this->base + area; @@ -677,10 +677,13 @@ static int s5pc110_read_bufferram(struct mtd_info *mtd, int area, if (!page) goto normal; + /* Page offset */ + ofs = ((size_t) buf & ~PAGE_MASK); page_dma = 1; + /* DMA routine */ dma_src = onenand->phys_base + (p - this->base); - dma_dst = dma_map_page(dev, page, 0, count, DMA_FROM_DEVICE); + dma_dst = dma_map_page(dev, page, ofs, count, DMA_FROM_DEVICE); } else { /* DMA routine */ dma_src = onenand->phys_base + (p - this->base); diff --git a/drivers/mtd/ubi/build.c b/drivers/mtd/ubi/build.c index 5ebe280..f49e49d 100644 --- a/drivers/mtd/ubi/build.c +++ b/drivers/mtd/ubi/build.c @@ -672,7 +672,33 @@ static int io_init(struct ubi_device *ubi) ubi->nor_flash = 1; } - ubi->min_io_size = ubi->mtd->writesize; + /* + * Set UBI min. I/O size (@ubi->min_io_size). We use @mtd->writebufsize + * for these purposes, not @mtd->writesize. At the moment this does not + * matter for NAND, because currently @mtd->writebufsize is equivalent to + * @mtd->writesize for all NANDs. However, some CFI NOR flashes may + * have @mtd->writebufsize which is multiple of @mtd->writesize. + * + * The reason we use @mtd->writebufsize for @ubi->min_io_size is that + * UBI and UBIFS recovery algorithms rely on the fact that if there was + * an unclean power cut, then we can find offset of the last corrupted + * node, align the offset to @ubi->min_io_size, read the rest of the + * eraseblock starting from this offset, and check whether there are + * only 0xFF bytes. If yes, then we are probably dealing with a + * corruption caused by a power cut, if not, then this is probably some + * severe corruption. + * + * Thus, we have to use the maximum write unit size of the flash, which + * is @mtd->writebufsize, because @mtd->writesize is the minimum write + * size, not the maximum. + */ + if (ubi->mtd->type == MTD_NANDFLASH) + ubi_assert(ubi->mtd->writebufsize == ubi->mtd->writesize); + else if (ubi->mtd->type == MTD_NORFLASH) + ubi_assert(ubi->mtd->writebufsize % ubi->mtd->writesize == 0); + + ubi->min_io_size = ubi->mtd->writebufsize; + ubi->hdrs_min_io_size = ubi->mtd->writesize >> ubi->mtd->subpage_sft; /* diff --git a/drivers/mtd/ubi/vtbl.c b/drivers/mtd/ubi/vtbl.c index fcdb7f6..0b8141f 100644 --- a/drivers/mtd/ubi/vtbl.c +++ b/drivers/mtd/ubi/vtbl.c @@ -425,12 +425,11 @@ static struct ubi_vtbl_record *process_lvol(struct ubi_device *ubi, /* Read both LEB 0 and LEB 1 into memory */ ubi_rb_for_each_entry(rb, seb, &sv->root, u.rb) { - leb[seb->lnum] = vmalloc(ubi->vtbl_size); + leb[seb->lnum] = vzalloc(ubi->vtbl_size); if (!leb[seb->lnum]) { err = -ENOMEM; goto out_free; } - memset(leb[seb->lnum], 0, ubi->vtbl_size); err = ubi_io_read_data(ubi, leb[seb->lnum], seb->pnum, 0, ubi->vtbl_size); @@ -516,10 +515,9 @@ static struct ubi_vtbl_record *create_empty_lvol(struct ubi_device *ubi, int i; struct ubi_vtbl_record *vtbl; - vtbl = vmalloc(ubi->vtbl_size); + vtbl = vzalloc(ubi->vtbl_size); if (!vtbl) return ERR_PTR(-ENOMEM); - memset(vtbl, 0, ubi->vtbl_size); for (i = 0; i < ubi->vtbl_slots; i++) memcpy(&vtbl[i], &empty_vtbl_record, UBI_VTBL_RECORD_SIZE); diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index 4c8bfc9..16fe4f9 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig @@ -3389,8 +3389,7 @@ config NETCONSOLE config NETCONSOLE_DYNAMIC bool "Dynamic reconfiguration of logging targets" - depends on NETCONSOLE && SYSFS - select CONFIGFS_FS + depends on NETCONSOLE && SYSFS && CONFIGFS_FS help This option enables the ability to dynamically reconfigure target parameters (interface, IP addresses, port numbers, MAC addresses) diff --git a/drivers/net/mlx4/catas.c b/drivers/net/mlx4/catas.c index 68aaa42..32f9471 100644 --- a/drivers/net/mlx4/catas.c +++ b/drivers/net/mlx4/catas.c @@ -113,7 +113,7 @@ static void catas_reset(struct work_struct *work) void mlx4_start_catas_poll(struct mlx4_dev *dev) { struct mlx4_priv *priv = mlx4_priv(dev); - unsigned long addr; + phys_addr_t addr; INIT_LIST_HEAD(&priv->catas_err.list); init_timer(&priv->catas_err.timer); @@ -124,8 +124,8 @@ void mlx4_start_catas_poll(struct mlx4_dev *dev) priv->catas_err.map = ioremap(addr, priv->fw.catas_size * 4); if (!priv->catas_err.map) { - mlx4_warn(dev, "Failed to map internal error buffer at 0x%lx\n", - addr); + mlx4_warn(dev, "Failed to map internal error buffer at 0x%llx\n", + (unsigned long long) addr); return; } diff --git a/drivers/net/mlx4/en_main.c b/drivers/net/mlx4/en_main.c index f6e0d40..1ff6ca6 100644 --- a/drivers/net/mlx4/en_main.c +++ b/drivers/net/mlx4/en_main.c @@ -202,7 +202,8 @@ static void *mlx4_en_add(struct mlx4_dev *dev) if (mlx4_uar_alloc(dev, &mdev->priv_uar)) goto err_pd; - mdev->uar_map = ioremap(mdev->priv_uar.pfn << PAGE_SHIFT, PAGE_SIZE); + mdev->uar_map = ioremap((phys_addr_t) mdev->priv_uar.pfn << PAGE_SHIFT, + PAGE_SIZE); if (!mdev->uar_map) goto err_uar; spin_lock_init(&mdev->uar_lock); diff --git a/drivers/net/mlx4/main.c b/drivers/net/mlx4/main.c index 782f11d..4ffdc18 100644 --- a/drivers/net/mlx4/main.c +++ b/drivers/net/mlx4/main.c @@ -829,7 +829,7 @@ static int mlx4_setup_hca(struct mlx4_dev *dev) goto err_uar_table_free; } - priv->kar = ioremap(priv->driver_uar.pfn << PAGE_SHIFT, PAGE_SIZE); + priv->kar = ioremap((phys_addr_t) priv->driver_uar.pfn << PAGE_SHIFT, PAGE_SIZE); if (!priv->kar) { mlx4_err(dev, "Couldn't map kernel access region, " "aborting.\n"); diff --git a/drivers/net/mlx4/mcg.c b/drivers/net/mlx4/mcg.c index c4f88b7..79cf42d 100644 --- a/drivers/net/mlx4/mcg.c +++ b/drivers/net/mlx4/mcg.c @@ -95,7 +95,8 @@ static int mlx4_MGID_HASH(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox * entry in hash chain and *mgm holds end of hash chain. */ static int find_mgm(struct mlx4_dev *dev, - u8 *gid, struct mlx4_cmd_mailbox *mgm_mailbox, + u8 *gid, enum mlx4_protocol protocol, + struct mlx4_cmd_mailbox *mgm_mailbox, u16 *hash, int *prev, int *index) { struct mlx4_cmd_mailbox *mailbox; @@ -134,7 +135,8 @@ static int find_mgm(struct mlx4_dev *dev, return err; } - if (!memcmp(mgm->gid, gid, 16)) + if (!memcmp(mgm->gid, gid, 16) && + be32_to_cpu(mgm->members_count) >> 30 == protocol) return err; *prev = *index; @@ -146,7 +148,7 @@ static int find_mgm(struct mlx4_dev *dev, } int mlx4_multicast_attach(struct mlx4_dev *dev, struct mlx4_qp *qp, u8 gid[16], - int block_mcast_loopback) + int block_mcast_loopback, enum mlx4_protocol protocol) { struct mlx4_priv *priv = mlx4_priv(dev); struct mlx4_cmd_mailbox *mailbox; @@ -165,7 +167,7 @@ int mlx4_multicast_attach(struct mlx4_dev *dev, struct mlx4_qp *qp, u8 gid[16], mutex_lock(&priv->mcg_table.mutex); - err = find_mgm(dev, gid, mailbox, &hash, &prev, &index); + err = find_mgm(dev, gid, protocol, mailbox, &hash, &prev, &index); if (err) goto out; @@ -187,7 +189,7 @@ int mlx4_multicast_attach(struct mlx4_dev *dev, struct mlx4_qp *qp, u8 gid[16], memcpy(mgm->gid, gid, 16); } - members_count = be32_to_cpu(mgm->members_count); + members_count = be32_to_cpu(mgm->members_count) & 0xffffff; if (members_count == MLX4_QP_PER_MGM) { mlx4_err(dev, "MGM at index %x is full.\n", index); err = -ENOMEM; @@ -207,7 +209,7 @@ int mlx4_multicast_attach(struct mlx4_dev *dev, struct mlx4_qp *qp, u8 gid[16], else mgm->qp[members_count++] = cpu_to_be32(qp->qpn & MGM_QPN_MASK); - mgm->members_count = cpu_to_be32(members_count); + mgm->members_count = cpu_to_be32(members_count | (u32) protocol << 30); err = mlx4_WRITE_MCG(dev, index, mailbox); if (err) @@ -242,7 +244,8 @@ out: } EXPORT_SYMBOL_GPL(mlx4_multicast_attach); -int mlx4_multicast_detach(struct mlx4_dev *dev, struct mlx4_qp *qp, u8 gid[16]) +int mlx4_multicast_detach(struct mlx4_dev *dev, struct mlx4_qp *qp, u8 gid[16], + enum mlx4_protocol protocol) { struct mlx4_priv *priv = mlx4_priv(dev); struct mlx4_cmd_mailbox *mailbox; @@ -260,7 +263,7 @@ int mlx4_multicast_detach(struct mlx4_dev *dev, struct mlx4_qp *qp, u8 gid[16]) mutex_lock(&priv->mcg_table.mutex); - err = find_mgm(dev, gid, mailbox, &hash, &prev, &index); + err = find_mgm(dev, gid, protocol, mailbox, &hash, &prev, &index); if (err) goto out; @@ -270,7 +273,7 @@ int mlx4_multicast_detach(struct mlx4_dev *dev, struct mlx4_qp *qp, u8 gid[16]) goto out; } - members_count = be32_to_cpu(mgm->members_count); + members_count = be32_to_cpu(mgm->members_count) & 0xffffff; for (loc = -1, i = 0; i < members_count; ++i) if ((be32_to_cpu(mgm->qp[i]) & MGM_QPN_MASK) == qp->qpn) loc = i; @@ -282,7 +285,7 @@ int mlx4_multicast_detach(struct mlx4_dev *dev, struct mlx4_qp *qp, u8 gid[16]) } - mgm->members_count = cpu_to_be32(--members_count); + mgm->members_count = cpu_to_be32(--members_count | (u32) protocol << 30); mgm->qp[loc] = mgm->qp[i - 1]; mgm->qp[i - 1] = 0; diff --git a/drivers/nfc/pn544.c b/drivers/nfc/pn544.c index 401c44b..bae6472 100644 --- a/drivers/nfc/pn544.c +++ b/drivers/nfc/pn544.c @@ -69,7 +69,7 @@ struct pn544_info { struct mutex read_mutex; /* Serialize read_irq access */ struct mutex mutex; /* Serialize info struct access */ u8 *buf; - unsigned int buflen; + size_t buflen; }; static const char reg_vdd_io[] = "Vdd_IO"; diff --git a/drivers/of/fdt.c b/drivers/of/fdt.c index c787c3d..af824e7 100644 --- a/drivers/of/fdt.c +++ b/drivers/of/fdt.c @@ -692,12 +692,6 @@ int __init early_init_dt_scan_chosen(unsigned long node, const char *uname, return 1; } -static void *__init early_device_tree_alloc(u64 size, u64 align) -{ - unsigned long mem = early_init_dt_alloc_memory_arch(size, align); - return __va(mem); -} - /** * unflatten_device_tree - create tree of device_nodes from flat blob * @@ -709,7 +703,7 @@ static void *__init early_device_tree_alloc(u64 size, u64 align) void __init unflatten_device_tree(void) { __unflatten_device_tree(initial_boot_params, &allnodes, - early_device_tree_alloc); + early_init_dt_alloc_memory_arch); /* Get pointer to OF "/chosen" node for use everywhere */ of_chosen = of_find_node_by_path("/chosen"); diff --git a/drivers/serial/samsung.c b/drivers/serial/samsung.c index 7ac2bf5..2335eda 100644 --- a/drivers/serial/samsung.c +++ b/drivers/serial/samsung.c @@ -883,10 +883,10 @@ static struct uart_ops s3c24xx_serial_ops = { static struct uart_driver s3c24xx_uart_drv = { .owner = THIS_MODULE, - .dev_name = "s3c2410_serial", + .driver_name = "s3c2410_serial", .nr = CONFIG_SERIAL_SAMSUNG_UARTS, .cons = S3C24XX_SERIAL_CONSOLE, - .driver_name = S3C24XX_SERIAL_NAME, + .dev_name = S3C24XX_SERIAL_NAME, .major = S3C24XX_SERIAL_MAJOR, .minor = S3C24XX_SERIAL_MINOR, }; diff --git a/drivers/spi/spi_sh_msiof.c b/drivers/spi/spi_sh_msiof.c index d93b667..56f60c8 100644 --- a/drivers/spi/spi_sh_msiof.c +++ b/drivers/spi/spi_sh_msiof.c @@ -635,7 +635,7 @@ static int sh_msiof_spi_remove(struct platform_device *pdev) ret = spi_bitbang_stop(&p->bitbang); if (!ret) { pm_runtime_disable(&pdev->dev); - free_irq(platform_get_irq(pdev, 0), sh_msiof_spi_irq); + free_irq(platform_get_irq(pdev, 0), p); iounmap(p->mapbase); clk_put(p->clk); spi_master_put(p->bitbang.master); diff --git a/drivers/staging/autofs/dirhash.c b/drivers/staging/autofs/dirhash.c index d3f42c8..a08bd73 100644 --- a/drivers/staging/autofs/dirhash.c +++ b/drivers/staging/autofs/dirhash.c @@ -88,14 +88,13 @@ struct autofs_dir_ent *autofs_expire(struct super_block *sb, } path.mnt = mnt; path_get(&path); - if (!follow_down(&path)) { + if (!follow_down_one(&path)) { path_put(&path); DPRINTK(("autofs: not expirable\ (not a mounted directory): %s\n", ent->name)); continue; } - while (d_mountpoint(path.dentry) && follow_down(&path)) - ; + follow_down(&path, false); // TODO: need to check error umount_ok = may_umount(path.mnt); path_put(&path); diff --git a/drivers/staging/bcm/Qos.c b/drivers/staging/bcm/Qos.c index 8ce4536..feade94 100644 --- a/drivers/staging/bcm/Qos.c +++ b/drivers/staging/bcm/Qos.c @@ -359,12 +359,11 @@ static VOID PruneQueue(PMINI_ADAPTER Adapter, INT iIndex) if(PacketToDrop) { - struct netdev_queue *txq = netdev_get_tx_queue(Adapter->dev, iIndex); if (netif_msg_tx_err(Adapter)) pr_info(PFX "%s: tx queue %d overlimit\n", Adapter->dev->name, iIndex); - txq->tx_dropped++; + netstats->tx_dropped++; DEQUEUEPACKET(Adapter->PackInfo[iIndex].FirstTxQueue, Adapter->PackInfo[iIndex].LastTxQueue); @@ -404,7 +403,7 @@ VOID flush_all_queues(PMINI_ADAPTER Adapter) // down(&Adapter->data_packet_queue_lock); for(iQIndex=LowPriority; iQIndex<HiPriority; iQIndex++) { - struct netdev_queue *txq = netdev_get_tx_queue(Adapter->dev, iQIndex); + struct net_device_stats *netstats = &Adapter->dev->stats; spin_lock_bh(&Adapter->PackInfo[iQIndex].SFQueueLock); while(Adapter->PackInfo[iQIndex].FirstTxQueue) @@ -413,7 +412,7 @@ VOID flush_all_queues(PMINI_ADAPTER Adapter) if(PacketToDrop) { uiTotalPacketLength = PacketToDrop->len; - txq->tx_dropped++; + netstats->tx_dropped++; } else uiTotalPacketLength = 0; diff --git a/drivers/staging/bcm/Transmit.c b/drivers/staging/bcm/Transmit.c index 0f70009..d5e4a74 100644 --- a/drivers/staging/bcm/Transmit.c +++ b/drivers/staging/bcm/Transmit.c @@ -157,11 +157,11 @@ INT SetupNextSend(PMINI_ADAPTER Adapter, struct sk_buff *Packet, USHORT Vcid) } else { - struct netdev_queue *txq = netdev_get_tx_queue(Adapter->dev, QueueIndex); + struct net_device_stats *netstats = &Adapter->dev->stats; Adapter->PackInfo[QueueIndex].uiTotalTxBytes += Leader.PLength; - txq->tx_bytes += Leader.PLength; - ++txq->tx_packets; + netstats->tx_bytes += Leader.PLength; + ++netstats->tx_packets; Adapter->PackInfo[QueueIndex].uiCurrentTokenCount -= Leader.PLength << 3; Adapter->PackInfo[QueueIndex].uiSentBytes += (Packet->len); diff --git a/drivers/staging/smbfs/dir.c b/drivers/staging/smbfs/dir.c index 87a3a9b..f204d33 100644 --- a/drivers/staging/smbfs/dir.c +++ b/drivers/staging/smbfs/dir.c @@ -283,7 +283,7 @@ static int smb_compare_dentry(const struct dentry *, unsigned int, const char *, const struct qstr *); static int smb_delete_dentry(const struct dentry *); -static const struct dentry_operations smbfs_dentry_operations = +const struct dentry_operations smbfs_dentry_operations = { .d_revalidate = smb_lookup_validate, .d_hash = smb_hash_dentry, @@ -291,7 +291,7 @@ static const struct dentry_operations smbfs_dentry_operations = .d_delete = smb_delete_dentry, }; -static const struct dentry_operations smbfs_dentry_operations_case = +const struct dentry_operations smbfs_dentry_operations_case = { .d_revalidate = smb_lookup_validate, .d_delete = smb_delete_dentry, diff --git a/drivers/video/ep93xx-fb.c b/drivers/video/ep93xx-fb.c index 0c99de0..b358d04 100644 --- a/drivers/video/ep93xx-fb.c +++ b/drivers/video/ep93xx-fb.c @@ -483,7 +483,7 @@ static void ep93xxfb_dealloc_videomem(struct fb_info *info) info->screen_base, info->fix.smem_start); } -static int __init ep93xxfb_probe(struct platform_device *pdev) +static int __devinit ep93xxfb_probe(struct platform_device *pdev) { struct ep93xxfb_mach_info *mach_info = pdev->dev.platform_data; struct fb_info *info; @@ -598,7 +598,7 @@ failed: return err; } -static int ep93xxfb_remove(struct platform_device *pdev) +static int __devexit ep93xxfb_remove(struct platform_device *pdev) { struct fb_info *info = platform_get_drvdata(pdev); struct ep93xx_fbi *fbi = info->par; @@ -622,7 +622,7 @@ static int ep93xxfb_remove(struct platform_device *pdev) static struct platform_driver ep93xxfb_driver = { .probe = ep93xxfb_probe, - .remove = ep93xxfb_remove, + .remove = __devexit_p(ep93xxfb_remove), .driver = { .name = "ep93xx-fb", .owner = THIS_MODULE, @@ -30,15 +30,6 @@ config FS_MBCACHE source "fs/reiserfs/Kconfig" source "fs/jfs/Kconfig" -config FS_POSIX_ACL -# Posix ACL utility routines (for now, only ext2/ext3/jfs/reiserfs/nfs4) -# -# NOTE: you can implement Posix ACLs without these helpers (XFS does). -# Never use this symbol for ifdefs. -# - bool - default n - source "fs/xfs/Kconfig" source "fs/gfs2/Kconfig" source "fs/ocfs2/Kconfig" @@ -47,6 +38,14 @@ source "fs/nilfs2/Kconfig" endif # BLOCK +# Posix ACL utility routines +# +# Note: Posix ACLs can be implemented without these helpers. Never use +# this symbol for ifdefs in core code. +# +config FS_POSIX_ACL + def_bool n + config EXPORTFS tristate diff --git a/fs/afs/dir.c b/fs/afs/dir.c index e6a4ab9..20c106f 100644 --- a/fs/afs/dir.c +++ b/fs/afs/dir.c @@ -66,6 +66,7 @@ const struct dentry_operations afs_fs_dentry_operations = { .d_revalidate = afs_d_revalidate, .d_delete = afs_d_delete, .d_release = afs_d_release, + .d_automount = afs_d_automount, }; #define AFS_DIR_HASHTBL_SIZE 128 diff --git a/fs/afs/inode.c b/fs/afs/inode.c index 0747339..db66c52 100644 --- a/fs/afs/inode.c +++ b/fs/afs/inode.c @@ -184,7 +184,8 @@ struct inode *afs_iget_autocell(struct inode *dir, const char *dev_name, inode->i_generation = 0; set_bit(AFS_VNODE_PSEUDODIR, &vnode->flags); - inode->i_flags |= S_NOATIME; + set_bit(AFS_VNODE_MOUNTPOINT, &vnode->flags); + inode->i_flags |= S_AUTOMOUNT | S_NOATIME; unlock_new_inode(inode); _leave(" = %p", inode); return inode; diff --git a/fs/afs/internal.h b/fs/afs/internal.h index 58c633b..5a9b684 100644 --- a/fs/afs/internal.h +++ b/fs/afs/internal.h @@ -592,6 +592,7 @@ extern const struct inode_operations afs_mntpt_inode_operations; extern const struct inode_operations afs_autocell_inode_operations; extern const struct file_operations afs_mntpt_file_operations; +extern struct vfsmount *afs_d_automount(struct path *); extern int afs_mntpt_check_symlink(struct afs_vnode *, struct key *); extern void afs_mntpt_kill_timer(void); diff --git a/fs/afs/mntpt.c b/fs/afs/mntpt.c index e83c033..aa59184 100644 --- a/fs/afs/mntpt.c +++ b/fs/afs/mntpt.c @@ -24,7 +24,6 @@ static struct dentry *afs_mntpt_lookup(struct inode *dir, struct dentry *dentry, struct nameidata *nd); static int afs_mntpt_open(struct inode *inode, struct file *file); -static void *afs_mntpt_follow_link(struct dentry *dentry, struct nameidata *nd); static void afs_mntpt_expiry_timed_out(struct work_struct *work); const struct file_operations afs_mntpt_file_operations = { @@ -34,13 +33,11 @@ const struct file_operations afs_mntpt_file_operations = { const struct inode_operations afs_mntpt_inode_operations = { .lookup = afs_mntpt_lookup, - .follow_link = afs_mntpt_follow_link, .readlink = page_readlink, .getattr = afs_getattr, }; const struct inode_operations afs_autocell_inode_operations = { - .follow_link = afs_mntpt_follow_link, .getattr = afs_getattr, }; @@ -88,6 +85,7 @@ int afs_mntpt_check_symlink(struct afs_vnode *vnode, struct key *key) _debug("symlink is a mountpoint"); spin_lock(&vnode->lock); set_bit(AFS_VNODE_MOUNTPOINT, &vnode->flags); + vnode->vfs_inode.i_flags |= S_AUTOMOUNT; spin_unlock(&vnode->lock); } @@ -238,52 +236,24 @@ error_no_devname: } /* - * follow a link from a mountpoint directory, thus causing it to be mounted + * handle an automount point */ -static void *afs_mntpt_follow_link(struct dentry *dentry, struct nameidata *nd) +struct vfsmount *afs_d_automount(struct path *path) { struct vfsmount *newmnt; - int err; - _enter("%p{%s},{%s:%p{%s},}", - dentry, - dentry->d_name.name, - nd->path.mnt->mnt_devname, - dentry, - nd->path.dentry->d_name.name); - - dput(nd->path.dentry); - nd->path.dentry = dget(dentry); - - newmnt = afs_mntpt_do_automount(nd->path.dentry); - if (IS_ERR(newmnt)) { - path_put(&nd->path); - return (void *)newmnt; - } + _enter("{%s,%s}", path->mnt->mnt_devname, path->dentry->d_name.name); - mntget(newmnt); - err = do_add_mount(newmnt, &nd->path, MNT_SHRINKABLE, &afs_vfsmounts); - switch (err) { - case 0: - path_put(&nd->path); - nd->path.mnt = newmnt; - nd->path.dentry = dget(newmnt->mnt_root); - queue_delayed_work(afs_wq, &afs_mntpt_expiry_timer, - afs_mntpt_expiry_timeout * HZ); - break; - case -EBUSY: - /* someone else made a mount here whilst we were busy */ - while (d_mountpoint(nd->path.dentry) && - follow_down(&nd->path)) - ; - err = 0; - default: - mntput(newmnt); - break; - } + newmnt = afs_mntpt_do_automount(path->dentry); + if (IS_ERR(newmnt)) + return newmnt; - _leave(" = %d", err); - return ERR_PTR(err); + mntget(newmnt); /* prevent immediate expiration */ + mnt_set_expiry(newmnt, &afs_vfsmounts); + queue_delayed_work(afs_wq, &afs_mntpt_expiry_timer, + afs_mntpt_expiry_timeout * HZ); + _leave(" = %p {%s}", newmnt, newmnt->mnt_devname); + return newmnt; } /* @@ -87,7 +87,7 @@ static int __init aio_setup(void) aio_wq = create_workqueue("aio"); abe_pool = mempool_create_kmalloc_pool(1, sizeof(struct aio_batch_entry)); - BUG_ON(!abe_pool); + BUG_ON(!aio_wq || !abe_pool); pr_debug("aio_setup: sizeof(struct page) = %d\n", (int)sizeof(struct page)); diff --git a/fs/anon_inodes.c b/fs/anon_inodes.c index cbe57f3..c5567cb 100644 --- a/fs/anon_inodes.c +++ b/fs/anon_inodes.c @@ -233,7 +233,7 @@ static int __init anon_inode_init(void) return 0; err_mntput: - mntput_long(anon_inode_mnt); + mntput(anon_inode_mnt); err_unregister_filesystem: unregister_filesystem(&anon_inode_fs_type); err_exit: diff --git a/fs/autofs4/autofs_i.h b/fs/autofs4/autofs_i.h index 0fffe1c..54f9237 100644 --- a/fs/autofs4/autofs_i.h +++ b/fs/autofs4/autofs_i.h @@ -88,18 +88,9 @@ struct autofs_info { uid_t uid; gid_t gid; - - mode_t mode; - size_t size; - - void (*free)(struct autofs_info *); - union { - const char *symlink; - } u; }; #define AUTOFS_INF_EXPIRING (1<<0) /* dentry is in the process of expiring */ -#define AUTOFS_INF_MOUNTPOINT (1<<1) /* mountpoint status for direct expire */ #define AUTOFS_INF_PENDING (1<<2) /* dentry pending mount */ struct autofs_wait_queue { @@ -176,14 +167,7 @@ static inline int autofs4_ispending(struct dentry *dentry) return 0; } -static inline void autofs4_copy_atime(struct file *src, struct file *dst) -{ - dst->f_path.dentry->d_inode->i_atime = - src->f_path.dentry->d_inode->i_atime; - return; -} - -struct inode *autofs4_get_inode(struct super_block *, struct autofs_info *); +struct inode *autofs4_get_inode(struct super_block *, mode_t); void autofs4_free_ino(struct autofs_info *); /* Expiration */ @@ -212,16 +196,89 @@ void autofs_dev_ioctl_exit(void); extern const struct inode_operations autofs4_symlink_inode_operations; extern const struct inode_operations autofs4_dir_inode_operations; -extern const struct inode_operations autofs4_root_inode_operations; -extern const struct inode_operations autofs4_indirect_root_inode_operations; -extern const struct inode_operations autofs4_direct_root_inode_operations; extern const struct file_operations autofs4_dir_operations; extern const struct file_operations autofs4_root_operations; +extern const struct dentry_operations autofs4_dentry_operations; + +/* VFS automount flags management functions */ + +static inline void __managed_dentry_set_automount(struct dentry *dentry) +{ + dentry->d_flags |= DCACHE_NEED_AUTOMOUNT; +} + +static inline void managed_dentry_set_automount(struct dentry *dentry) +{ + spin_lock(&dentry->d_lock); + __managed_dentry_set_automount(dentry); + spin_unlock(&dentry->d_lock); +} + +static inline void __managed_dentry_clear_automount(struct dentry *dentry) +{ + dentry->d_flags &= ~DCACHE_NEED_AUTOMOUNT; +} + +static inline void managed_dentry_clear_automount(struct dentry *dentry) +{ + spin_lock(&dentry->d_lock); + __managed_dentry_clear_automount(dentry); + spin_unlock(&dentry->d_lock); +} + +static inline void __managed_dentry_set_transit(struct dentry *dentry) +{ + dentry->d_flags |= DCACHE_MANAGE_TRANSIT; +} + +static inline void managed_dentry_set_transit(struct dentry *dentry) +{ + spin_lock(&dentry->d_lock); + __managed_dentry_set_transit(dentry); + spin_unlock(&dentry->d_lock); +} + +static inline void __managed_dentry_clear_transit(struct dentry *dentry) +{ + dentry->d_flags &= ~DCACHE_MANAGE_TRANSIT; +} + +static inline void managed_dentry_clear_transit(struct dentry *dentry) +{ + spin_lock(&dentry->d_lock); + __managed_dentry_clear_transit(dentry); + spin_unlock(&dentry->d_lock); +} + +static inline void __managed_dentry_set_managed(struct dentry *dentry) +{ + dentry->d_flags |= (DCACHE_NEED_AUTOMOUNT|DCACHE_MANAGE_TRANSIT); +} + +static inline void managed_dentry_set_managed(struct dentry *dentry) +{ + spin_lock(&dentry->d_lock); + __managed_dentry_set_managed(dentry); + spin_unlock(&dentry->d_lock); +} + +static inline void __managed_dentry_clear_managed(struct dentry *dentry) +{ + dentry->d_flags &= ~(DCACHE_NEED_AUTOMOUNT|DCACHE_MANAGE_TRANSIT); +} + +static inline void managed_dentry_clear_managed(struct dentry *dentry) +{ + spin_lock(&dentry->d_lock); + __managed_dentry_clear_managed(dentry); + spin_unlock(&dentry->d_lock); +} /* Initializing function */ int autofs4_fill_super(struct super_block *, void *, int); -struct autofs_info *autofs4_init_ino(struct autofs_info *, struct autofs_sb_info *sbi, mode_t mode); +struct autofs_info *autofs4_new_ino(struct autofs_sb_info *); +void autofs4_clean_ino(struct autofs_info *); /* Queue management functions */ @@ -229,19 +286,6 @@ int autofs4_wait(struct autofs_sb_info *,struct dentry *, enum autofs_notify); int autofs4_wait_release(struct autofs_sb_info *,autofs_wqt_t,int); void autofs4_catatonic_mode(struct autofs_sb_info *); -static inline int autofs4_follow_mount(struct path *path) -{ - int res = 0; - - while (d_mountpoint(path->dentry)) { - int followed = follow_down(path); - if (!followed) - break; - res = 1; - } - return res; -} - static inline u32 autofs4_get_dev(struct autofs_sb_info *sbi) { return new_encode_dev(sbi->sb->s_dev); @@ -294,5 +338,4 @@ static inline void autofs4_del_expiring(struct dentry *dentry) return; } -void autofs4_dentry_release(struct dentry *); extern void autofs4_kill_sb(struct super_block *); diff --git a/fs/autofs4/dev-ioctl.c b/fs/autofs4/dev-ioctl.c index eff9a41..1442da4 100644 --- a/fs/autofs4/dev-ioctl.c +++ b/fs/autofs4/dev-ioctl.c @@ -551,7 +551,7 @@ static int autofs_dev_ioctl_ismountpoint(struct file *fp, err = have_submounts(path.dentry); - if (follow_down(&path)) + if (follow_down_one(&path)) magic = path.mnt->mnt_sb->s_magic; } diff --git a/fs/autofs4/expire.c b/fs/autofs4/expire.c index cc1d013..f43100b 100644 --- a/fs/autofs4/expire.c +++ b/fs/autofs4/expire.c @@ -26,10 +26,6 @@ static inline int autofs4_can_expire(struct dentry *dentry, if (ino == NULL) return 0; - /* No point expiring a pending mount */ - if (ino->flags & AUTOFS_INF_PENDING) - return 0; - if (!do_now) { /* Too young to die */ if (!timeout || time_after(ino->last_used + timeout, now)) @@ -56,7 +52,7 @@ static int autofs4_mount_busy(struct vfsmount *mnt, struct dentry *dentry) path_get(&path); - if (!follow_down(&path)) + if (!follow_down_one(&path)) goto done; if (is_autofs4_dentry(path.dentry)) { @@ -100,7 +96,7 @@ static struct dentry *get_next_positive_dentry(struct dentry *prev, struct dentry *p, *ret; if (prev == NULL) - return dget(prev); + return dget(root); spin_lock(&autofs4_lock); relock: @@ -137,7 +133,7 @@ again: spin_lock_nested(&ret->d_lock, DENTRY_D_LOCK_NESTED); /* Negative dentry - try next */ if (!simple_positive(ret)) { - spin_unlock(&ret->d_lock); + spin_unlock(&p->d_lock); p = ret; goto again; } @@ -283,6 +279,7 @@ struct dentry *autofs4_expire_direct(struct super_block *sb, unsigned long timeout; struct dentry *root = dget(sb->s_root); int do_now = how & AUTOFS_EXP_IMMEDIATE; + struct autofs_info *ino; if (!root) return NULL; @@ -291,19 +288,21 @@ struct dentry *autofs4_expire_direct(struct super_block *sb, timeout = sbi->exp_timeout; spin_lock(&sbi->fs_lock); + ino = autofs4_dentry_ino(root); + /* No point expiring a pending mount */ + if (ino->flags & AUTOFS_INF_PENDING) { + spin_unlock(&sbi->fs_lock); + return NULL; + } + managed_dentry_set_transit(root); if (!autofs4_direct_busy(mnt, root, timeout, do_now)) { struct autofs_info *ino = autofs4_dentry_ino(root); - if (d_mountpoint(root)) { - ino->flags |= AUTOFS_INF_MOUNTPOINT; - spin_lock(&root->d_lock); - root->d_flags &= ~DCACHE_MOUNTED; - spin_unlock(&root->d_lock); - } ino->flags |= AUTOFS_INF_EXPIRING; init_completion(&ino->expire_complete); spin_unlock(&sbi->fs_lock); return root; } + managed_dentry_clear_transit(root); spin_unlock(&sbi->fs_lock); dput(root); @@ -340,6 +339,10 @@ struct dentry *autofs4_expire_indirect(struct super_block *sb, while ((dentry = get_next_positive_dentry(dentry, root))) { spin_lock(&sbi->fs_lock); ino = autofs4_dentry_ino(dentry); + /* No point expiring a pending mount */ + if (ino->flags & AUTOFS_INF_PENDING) + goto cont; + managed_dentry_set_transit(dentry); /* * Case 1: (i) indirect mount or top level pseudo direct mount @@ -399,6 +402,8 @@ struct dentry *autofs4_expire_indirect(struct super_block *sb, } } next: + managed_dentry_clear_transit(dentry); +cont: spin_unlock(&sbi->fs_lock); } return NULL; @@ -479,6 +484,8 @@ int autofs4_expire_run(struct super_block *sb, spin_lock(&sbi->fs_lock); ino = autofs4_dentry_ino(dentry); ino->flags &= ~AUTOFS_INF_EXPIRING; + if (!d_unhashed(dentry)) + managed_dentry_clear_transit(dentry); complete_all(&ino->expire_complete); spin_unlock(&sbi->fs_lock); @@ -504,18 +511,18 @@ int autofs4_do_expire_multi(struct super_block *sb, struct vfsmount *mnt, ret = autofs4_wait(sbi, dentry, NFY_EXPIRE); spin_lock(&sbi->fs_lock); - if (ino->flags & AUTOFS_INF_MOUNTPOINT) { - spin_lock(&sb->s_root->d_lock); - /* - * If we haven't been expired away, then reset - * mounted status. - */ - if (mnt->mnt_parent != mnt) - sb->s_root->d_flags |= DCACHE_MOUNTED; - spin_unlock(&sb->s_root->d_lock); - ino->flags &= ~AUTOFS_INF_MOUNTPOINT; - } ino->flags &= ~AUTOFS_INF_EXPIRING; + spin_lock(&dentry->d_lock); + if (ret) + __managed_dentry_clear_transit(dentry); + else { + if ((IS_ROOT(dentry) || + (autofs_type_indirect(sbi->type) && + IS_ROOT(dentry->d_parent))) && + !(dentry->d_flags & DCACHE_NEED_AUTOMOUNT)) + __managed_dentry_set_automount(dentry); + } + spin_unlock(&dentry->d_lock); complete_all(&ino->expire_complete); spin_unlock(&sbi->fs_lock); dput(dentry); diff --git a/fs/autofs4/inode.c b/fs/autofs4/inode.c index a7bdb9d..180fa24 100644 --- a/fs/autofs4/inode.c +++ b/fs/autofs4/inode.c @@ -22,77 +22,27 @@ #include "autofs_i.h" #include <linux/module.h> -static void ino_lnkfree(struct autofs_info *ino) +struct autofs_info *autofs4_new_ino(struct autofs_sb_info *sbi) { - if (ino->u.symlink) { - kfree(ino->u.symlink); - ino->u.symlink = NULL; - } -} - -struct autofs_info *autofs4_init_ino(struct autofs_info *ino, - struct autofs_sb_info *sbi, mode_t mode) -{ - int reinit = 1; - - if (ino == NULL) { - reinit = 0; - ino = kmalloc(sizeof(*ino), GFP_KERNEL); - } - - if (ino == NULL) - return NULL; - - if (!reinit) { - ino->flags = 0; - ino->inode = NULL; - ino->dentry = NULL; - ino->size = 0; + struct autofs_info *ino = kzalloc(sizeof(*ino), GFP_KERNEL); + if (ino) { INIT_LIST_HEAD(&ino->active); - ino->active_count = 0; INIT_LIST_HEAD(&ino->expiring); - atomic_set(&ino->count, 0); + ino->last_used = jiffies; + ino->sbi = sbi; } + return ino; +} +void autofs4_clean_ino(struct autofs_info *ino) +{ ino->uid = 0; ino->gid = 0; - ino->mode = mode; ino->last_used = jiffies; - - ino->sbi = sbi; - - if (reinit && ino->free) - (ino->free)(ino); - - memset(&ino->u, 0, sizeof(ino->u)); - - ino->free = NULL; - - if (S_ISLNK(mode)) - ino->free = ino_lnkfree; - - return ino; } void autofs4_free_ino(struct autofs_info *ino) { - struct autofs_info *p_ino; - - if (ino->dentry) { - ino->dentry->d_fsdata = NULL; - if (ino->dentry->d_inode) { - struct dentry *parent = ino->dentry->d_parent; - if (atomic_dec_and_test(&ino->count)) { - p_ino = autofs4_dentry_ino(parent); - if (p_ino && parent != ino->dentry) - atomic_dec(&p_ino->count); - } - dput(ino->dentry); - } - ino->dentry = NULL; - } - if (ino->free) - (ino->free)(ino); kfree(ino); } @@ -148,9 +98,16 @@ static int autofs4_show_options(struct seq_file *m, struct vfsmount *mnt) return 0; } +static void autofs4_evict_inode(struct inode *inode) +{ + end_writeback(inode); + kfree(inode->i_private); +} + static const struct super_operations autofs4_sops = { .statfs = simple_statfs, .show_options = autofs4_show_options, + .evict_inode = autofs4_evict_inode, }; enum {Opt_err, Opt_fd, Opt_uid, Opt_gid, Opt_pgrp, Opt_minproto, Opt_maxproto, @@ -240,21 +197,6 @@ static int parse_options(char *options, int *pipefd, uid_t *uid, gid_t *gid, return (*pipefd < 0); } -static struct autofs_info *autofs4_mkroot(struct autofs_sb_info *sbi) -{ - struct autofs_info *ino; - - ino = autofs4_init_ino(NULL, sbi, S_IFDIR | 0755); - if (!ino) - return NULL; - - return ino; -} - -static const struct dentry_operations autofs4_sb_dentry_operations = { - .d_release = autofs4_dentry_release, -}; - int autofs4_fill_super(struct super_block *s, void *data, int silent) { struct inode * root_inode; @@ -292,15 +234,16 @@ int autofs4_fill_super(struct super_block *s, void *data, int silent) s->s_blocksize_bits = 10; s->s_magic = AUTOFS_SUPER_MAGIC; s->s_op = &autofs4_sops; + s->s_d_op = &autofs4_dentry_operations; s->s_time_gran = 1; /* * Get the root inode and dentry, but defer checking for errors. */ - ino = autofs4_mkroot(sbi); + ino = autofs4_new_ino(sbi); if (!ino) goto fail_free; - root_inode = autofs4_get_inode(s, ino); + root_inode = autofs4_get_inode(s, S_IFDIR | 0755); if (!root_inode) goto fail_ino; @@ -309,7 +252,6 @@ int autofs4_fill_super(struct super_block *s, void *data, int silent) goto fail_iput; pipe = NULL; - d_set_d_op(root, &autofs4_sb_dentry_operations); root->d_fsdata = ino; /* Can this call block? */ @@ -320,10 +262,11 @@ int autofs4_fill_super(struct super_block *s, void *data, int silent) goto fail_dput; } + if (autofs_type_trigger(sbi->type)) + __managed_dentry_set_managed(root); + root_inode->i_fop = &autofs4_root_operations; - root_inode->i_op = autofs_type_trigger(sbi->type) ? - &autofs4_direct_root_inode_operations : - &autofs4_indirect_root_inode_operations; + root_inode->i_op = &autofs4_dir_inode_operations; /* Couldn't this be tested earlier? */ if (sbi->max_proto < AUTOFS_MIN_PROTO_VERSION || @@ -383,16 +326,14 @@ fail_unlock: return -EINVAL; } -struct inode *autofs4_get_inode(struct super_block *sb, - struct autofs_info *inf) +struct inode *autofs4_get_inode(struct super_block *sb, mode_t mode) { struct inode *inode = new_inode(sb); if (inode == NULL) return NULL; - inf->inode = inode; - inode->i_mode = inf->mode; + inode->i_mode = mode; if (sb->s_root) { inode->i_uid = sb->s_root->d_inode->i_uid; inode->i_gid = sb->s_root->d_inode->i_gid; @@ -400,12 +341,11 @@ struct inode *autofs4_get_inode(struct super_block *sb, inode->i_atime = inode->i_mtime = inode->i_ctime = CURRENT_TIME; inode->i_ino = get_next_ino(); - if (S_ISDIR(inf->mode)) { + if (S_ISDIR(mode)) { inode->i_nlink = 2; inode->i_op = &autofs4_dir_inode_operations; inode->i_fop = &autofs4_dir_operations; - } else if (S_ISLNK(inf->mode)) { - inode->i_size = inf->size; + } else if (S_ISLNK(mode)) { inode->i_op = &autofs4_symlink_inode_operations; } diff --git a/fs/autofs4/root.c b/fs/autofs4/root.c index 651e4ef..014e7ab 100644 --- a/fs/autofs4/root.c +++ b/fs/autofs4/root.c @@ -35,10 +35,9 @@ static long autofs4_root_compat_ioctl(struct file *,unsigned int,unsigned long); #endif static int autofs4_dir_open(struct inode *inode, struct file *file); static struct dentry *autofs4_lookup(struct inode *,struct dentry *, struct nameidata *); -static void *autofs4_follow_link(struct dentry *, struct nameidata *); - -#define TRIGGER_FLAGS (LOOKUP_CONTINUE | LOOKUP_DIRECTORY) -#define TRIGGER_INTENTS (LOOKUP_OPEN | LOOKUP_CREATE) +static struct vfsmount *autofs4_d_automount(struct path *); +static int autofs4_d_manage(struct dentry *, bool, bool); +static void autofs4_dentry_release(struct dentry *); const struct file_operations autofs4_root_operations = { .open = dcache_dir_open, @@ -60,7 +59,7 @@ const struct file_operations autofs4_dir_operations = { .llseek = dcache_dir_lseek, }; -const struct inode_operations autofs4_indirect_root_inode_operations = { +const struct inode_operations autofs4_dir_inode_operations = { .lookup = autofs4_lookup, .unlink = autofs4_dir_unlink, .symlink = autofs4_dir_symlink, @@ -68,20 +67,10 @@ const struct inode_operations autofs4_indirect_root_inode_operations = { .rmdir = autofs4_dir_rmdir, }; -const struct inode_operations autofs4_direct_root_inode_operations = { - .lookup = autofs4_lookup, - .unlink = autofs4_dir_unlink, - .mkdir = autofs4_dir_mkdir, - .rmdir = autofs4_dir_rmdir, - .follow_link = autofs4_follow_link, -}; - -const struct inode_operations autofs4_dir_inode_operations = { - .lookup = autofs4_lookup, - .unlink = autofs4_dir_unlink, - .symlink = autofs4_dir_symlink, - .mkdir = autofs4_dir_mkdir, - .rmdir = autofs4_dir_rmdir, +const struct dentry_operations autofs4_dentry_operations = { + .d_automount = autofs4_d_automount, + .d_manage = autofs4_d_manage, + .d_release = autofs4_dentry_release, }; static void autofs4_add_active(struct dentry *dentry) @@ -116,14 +105,6 @@ static void autofs4_del_active(struct dentry *dentry) return; } -static unsigned int autofs4_need_mount(unsigned int flags) -{ - unsigned int res = 0; - if (flags & (TRIGGER_FLAGS | TRIGGER_INTENTS)) - res = 1; - return res; -} - static int autofs4_dir_open(struct inode *inode, struct file *file) { struct dentry *dentry = file->f_path.dentry; @@ -158,278 +139,27 @@ out: return dcache_dir_open(inode, file); } -static int try_to_fill_dentry(struct dentry *dentry, int flags) -{ - struct autofs_sb_info *sbi = autofs4_sbi(dentry->d_sb); - struct autofs_info *ino = autofs4_dentry_ino(dentry); - int status; - - DPRINTK("dentry=%p %.*s ino=%p", - dentry, dentry->d_name.len, dentry->d_name.name, dentry->d_inode); - - /* - * Wait for a pending mount, triggering one if there - * isn't one already - */ - if (dentry->d_inode == NULL) { - DPRINTK("waiting for mount name=%.*s", - dentry->d_name.len, dentry->d_name.name); - - status = autofs4_wait(sbi, dentry, NFY_MOUNT); - - DPRINTK("mount done status=%d", status); - - /* Turn this into a real negative dentry? */ - if (status == -ENOENT) { - spin_lock(&sbi->fs_lock); - ino->flags &= ~AUTOFS_INF_PENDING; - spin_unlock(&sbi->fs_lock); - return status; - } else if (status) { - /* Return a negative dentry, but leave it "pending" */ - return status; - } - /* Trigger mount for path component or follow link */ - } else if (ino->flags & AUTOFS_INF_PENDING || - autofs4_need_mount(flags)) { - DPRINTK("waiting for mount name=%.*s", - dentry->d_name.len, dentry->d_name.name); - - spin_lock(&sbi->fs_lock); - ino->flags |= AUTOFS_INF_PENDING; - spin_unlock(&sbi->fs_lock); - status = autofs4_wait(sbi, dentry, NFY_MOUNT); - - DPRINTK("mount done status=%d", status); - - if (status) { - spin_lock(&sbi->fs_lock); - ino->flags &= ~AUTOFS_INF_PENDING; - spin_unlock(&sbi->fs_lock); - return status; - } - } - - /* Initialize expiry counter after successful mount */ - ino->last_used = jiffies; - - spin_lock(&sbi->fs_lock); - ino->flags &= ~AUTOFS_INF_PENDING; - spin_unlock(&sbi->fs_lock); - - return 0; -} - -/* For autofs direct mounts the follow link triggers the mount */ -static void *autofs4_follow_link(struct dentry *dentry, struct nameidata *nd) -{ - struct autofs_sb_info *sbi = autofs4_sbi(dentry->d_sb); - struct autofs_info *ino = autofs4_dentry_ino(dentry); - int oz_mode = autofs4_oz_mode(sbi); - unsigned int lookup_type; - int status; - - DPRINTK("dentry=%p %.*s oz_mode=%d nd->flags=%d", - dentry, dentry->d_name.len, dentry->d_name.name, oz_mode, - nd->flags); - /* - * For an expire of a covered direct or offset mount we need - * to break out of follow_down() at the autofs mount trigger - * (d_mounted--), so we can see the expiring flag, and manage - * the blocking and following here until the expire is completed. - */ - if (oz_mode) { - spin_lock(&sbi->fs_lock); - if (ino->flags & AUTOFS_INF_EXPIRING) { - spin_unlock(&sbi->fs_lock); - /* Follow down to our covering mount. */ - if (!follow_down(&nd->path)) - goto done; - goto follow; - } - spin_unlock(&sbi->fs_lock); - goto done; - } - - /* If an expire request is pending everyone must wait. */ - autofs4_expire_wait(dentry); - - /* We trigger a mount for almost all flags */ - lookup_type = autofs4_need_mount(nd->flags); - spin_lock(&sbi->fs_lock); - spin_lock(&autofs4_lock); - spin_lock(&dentry->d_lock); - if (!(lookup_type || ino->flags & AUTOFS_INF_PENDING)) { - spin_unlock(&dentry->d_lock); - spin_unlock(&autofs4_lock); - spin_unlock(&sbi->fs_lock); - goto follow; - } - - /* - * If the dentry contains directories then it is an autofs - * multi-mount with no root mount offset. So don't try to - * mount it again. - */ - if (ino->flags & AUTOFS_INF_PENDING || - (!d_mountpoint(dentry) && list_empty(&dentry->d_subdirs))) { - spin_unlock(&dentry->d_lock); - spin_unlock(&autofs4_lock); - spin_unlock(&sbi->fs_lock); - - status = try_to_fill_dentry(dentry, nd->flags); - if (status) - goto out_error; - - goto follow; - } - spin_unlock(&dentry->d_lock); - spin_unlock(&autofs4_lock); - spin_unlock(&sbi->fs_lock); -follow: - /* - * If there is no root mount it must be an autofs - * multi-mount with no root offset so we don't need - * to follow it. - */ - if (d_mountpoint(dentry)) { - if (!autofs4_follow_mount(&nd->path)) { - status = -ENOENT; - goto out_error; - } - } - -done: - return NULL; - -out_error: - path_put(&nd->path); - return ERR_PTR(status); -} - -/* - * Revalidate is called on every cache lookup. Some of those - * cache lookups may actually happen while the dentry is not - * yet completely filled in, and revalidate has to delay such - * lookups.. - */ -static int autofs4_revalidate(struct dentry *dentry, struct nameidata *nd) +static void autofs4_dentry_release(struct dentry *de) { - struct inode *dir; - struct autofs_sb_info *sbi; - int oz_mode; - int flags = nd ? nd->flags : 0; - int status = 1; - - if (flags & LOOKUP_RCU) - return -ECHILD; - - dir = dentry->d_parent->d_inode; - sbi = autofs4_sbi(dir->i_sb); - oz_mode = autofs4_oz_mode(sbi); - - /* Pending dentry */ - spin_lock(&sbi->fs_lock); - if (autofs4_ispending(dentry)) { - /* The daemon never causes a mount to trigger */ - spin_unlock(&sbi->fs_lock); - - if (oz_mode) - return 1; - - /* - * If the directory has gone away due to an expire - * we have been called as ->d_revalidate() and so - * we need to return false and proceed to ->lookup(). - */ - if (autofs4_expire_wait(dentry) == -EAGAIN) - return 0; - - /* - * A zero status is success otherwise we have a - * negative error code. - */ - status = try_to_fill_dentry(dentry, flags); - if (status == 0) - return 1; - - return status; - } - spin_unlock(&sbi->fs_lock); - - /* Negative dentry.. invalidate if "old" */ - if (dentry->d_inode == NULL) - return 0; - - /* Check for a non-mountpoint directory with no contents */ - spin_lock(&autofs4_lock); - spin_lock(&dentry->d_lock); - if (S_ISDIR(dentry->d_inode->i_mode) && - !d_mountpoint(dentry) && list_empty(&dentry->d_subdirs)) { - DPRINTK("dentry=%p %.*s, emptydir", - dentry, dentry->d_name.len, dentry->d_name.name); - spin_unlock(&dentry->d_lock); - spin_unlock(&autofs4_lock); - - /* The daemon never causes a mount to trigger */ - if (oz_mode) - return 1; - - /* - * A zero status is success otherwise we have a - * negative error code. - */ - status = try_to_fill_dentry(dentry, flags); - if (status == 0) - return 1; - - return status; - } - spin_unlock(&dentry->d_lock); - spin_unlock(&autofs4_lock); - - return 1; -} - -void autofs4_dentry_release(struct dentry *de) -{ - struct autofs_info *inf; + struct autofs_info *ino = autofs4_dentry_ino(de); + struct autofs_sb_info *sbi = autofs4_sbi(de->d_sb); DPRINTK("releasing %p", de); - inf = autofs4_dentry_ino(de); - de->d_fsdata = NULL; - - if (inf) { - struct autofs_sb_info *sbi = autofs4_sbi(de->d_sb); - - if (sbi) { - spin_lock(&sbi->lookup_lock); - if (!list_empty(&inf->active)) - list_del(&inf->active); - if (!list_empty(&inf->expiring)) - list_del(&inf->expiring); - spin_unlock(&sbi->lookup_lock); - } - - inf->dentry = NULL; - inf->inode = NULL; + if (!ino) + return; - autofs4_free_ino(inf); + if (sbi) { + spin_lock(&sbi->lookup_lock); + if (!list_empty(&ino->active)) + list_del(&ino->active); + if (!list_empty(&ino->expiring)) + list_del(&ino->expiring); + spin_unlock(&sbi->lookup_lock); } -} -/* For dentries of directories in the root dir */ -static const struct dentry_operations autofs4_root_dentry_operations = { - .d_revalidate = autofs4_revalidate, - .d_release = autofs4_dentry_release, -}; - -/* For other dentries */ -static const struct dentry_operations autofs4_dentry_operations = { - .d_revalidate = autofs4_revalidate, - .d_release = autofs4_dentry_release, -}; + autofs4_free_ino(ino); +} static struct dentry *autofs4_lookup_active(struct dentry *dentry) { @@ -541,51 +271,246 @@ next: return NULL; } +static int autofs4_mount_wait(struct dentry *dentry) +{ + struct autofs_sb_info *sbi = autofs4_sbi(dentry->d_sb); + struct autofs_info *ino = autofs4_dentry_ino(dentry); + int status; + + if (ino->flags & AUTOFS_INF_PENDING) { + DPRINTK("waiting for mount name=%.*s", + dentry->d_name.len, dentry->d_name.name); + status = autofs4_wait(sbi, dentry, NFY_MOUNT); + DPRINTK("mount wait done status=%d", status); + ino->last_used = jiffies; + return status; + } + return 0; +} + +static int do_expire_wait(struct dentry *dentry) +{ + struct dentry *expiring; + + expiring = autofs4_lookup_expiring(dentry); + if (!expiring) + return autofs4_expire_wait(dentry); + else { + /* + * If we are racing with expire the request might not + * be quite complete, but the directory has been removed + * so it must have been successful, just wait for it. + */ + autofs4_expire_wait(expiring); + autofs4_del_expiring(expiring); + dput(expiring); + } + return 0; +} + +static struct dentry *autofs4_mountpoint_changed(struct path *path) +{ + struct dentry *dentry = path->dentry; + struct autofs_sb_info *sbi = autofs4_sbi(dentry->d_sb); + + /* + * If this is an indirect mount the dentry could have gone away + * as a result of an expire and a new one created. + */ + if (autofs_type_indirect(sbi->type) && d_unhashed(dentry)) { + struct dentry *parent = dentry->d_parent; + struct dentry *new = d_lookup(parent, &dentry->d_name); + if (!new) + return NULL; + dput(path->dentry); + path->dentry = new; + } + return path->dentry; +} + +static struct vfsmount *autofs4_d_automount(struct path *path) +{ + struct dentry *dentry = path->dentry; + struct autofs_sb_info *sbi = autofs4_sbi(dentry->d_sb); + struct autofs_info *ino = autofs4_dentry_ino(dentry); + int status; + + DPRINTK("dentry=%p %.*s", + dentry, dentry->d_name.len, dentry->d_name.name); + + /* + * Someone may have manually umounted this or it was a submount + * that has gone away. + */ + spin_lock(&dentry->d_lock); + if (!d_mountpoint(dentry) && list_empty(&dentry->d_subdirs)) { + if (!(dentry->d_flags & DCACHE_MANAGE_TRANSIT) && + (dentry->d_flags & DCACHE_NEED_AUTOMOUNT)) + __managed_dentry_set_transit(path->dentry); + } + spin_unlock(&dentry->d_lock); + + /* The daemon never triggers a mount. */ + if (autofs4_oz_mode(sbi)) + return NULL; + + /* + * If an expire request is pending everyone must wait. + * If the expire fails we're still mounted so continue + * the follow and return. A return of -EAGAIN (which only + * happens with indirect mounts) means the expire completed + * and the directory was removed, so just go ahead and try + * the mount. + */ + status = do_expire_wait(dentry); + if (status && status != -EAGAIN) + return NULL; + + /* Callback to the daemon to perform the mount or wait */ + spin_lock(&sbi->fs_lock); + if (ino->flags & AUTOFS_INF_PENDING) { + spin_unlock(&sbi->fs_lock); + status = autofs4_mount_wait(dentry); + if (status) + return ERR_PTR(status); + spin_lock(&sbi->fs_lock); + goto done; + } + + /* + * If the dentry is a symlink it's equivalent to a directory + * having d_mountpoint() true, so there's no need to call back + * to the daemon. + */ + if (dentry->d_inode && S_ISLNK(dentry->d_inode->i_mode)) + goto done; + if (!d_mountpoint(dentry)) { + /* + * It's possible that user space hasn't removed directories + * after umounting a rootless multi-mount, although it + * should. For v5 have_submounts() is sufficient to handle + * this because the leaves of the directory tree under the + * mount never trigger mounts themselves (they have an autofs + * trigger mount mounted on them). But v4 pseudo direct mounts + * do need the leaves to to trigger mounts. In this case we + * have no choice but to use the list_empty() check and + * require user space behave. + */ + if (sbi->version > 4) { + if (have_submounts(dentry)) + goto done; + } else { + spin_lock(&dentry->d_lock); + if (!list_empty(&dentry->d_subdirs)) { + spin_unlock(&dentry->d_lock); + goto done; + } + spin_unlock(&dentry->d_lock); + } + ino->flags |= AUTOFS_INF_PENDING; + spin_unlock(&sbi->fs_lock); + status = autofs4_mount_wait(dentry); + if (status) + return ERR_PTR(status); + spin_lock(&sbi->fs_lock); + ino->flags &= ~AUTOFS_INF_PENDING; + } +done: + if (!(ino->flags & AUTOFS_INF_EXPIRING)) { + /* + * Any needed mounting has been completed and the path updated + * so turn this into a normal dentry so we don't continually + * call ->d_automount() and ->d_manage(). + */ + spin_lock(&dentry->d_lock); + __managed_dentry_clear_transit(dentry); + /* + * Only clear DMANAGED_AUTOMOUNT for rootless multi-mounts and + * symlinks as in all other cases the dentry will be covered by + * an actual mount so ->d_automount() won't be called during + * the follow. + */ + if ((!d_mountpoint(dentry) && + !list_empty(&dentry->d_subdirs)) || + (dentry->d_inode && S_ISLNK(dentry->d_inode->i_mode))) + __managed_dentry_clear_automount(dentry); + spin_unlock(&dentry->d_lock); + } + spin_unlock(&sbi->fs_lock); + + /* Mount succeeded, check if we ended up with a new dentry */ + dentry = autofs4_mountpoint_changed(path); + if (!dentry) + return ERR_PTR(-ENOENT); + + return NULL; +} + +int autofs4_d_manage(struct dentry *dentry, bool mounting_here, bool rcu_walk) +{ + struct autofs_sb_info *sbi = autofs4_sbi(dentry->d_sb); + + DPRINTK("dentry=%p %.*s", + dentry, dentry->d_name.len, dentry->d_name.name); + + /* The daemon never waits. */ + if (autofs4_oz_mode(sbi) || mounting_here) { + if (!d_mountpoint(dentry)) + return -EISDIR; + return 0; + } + + /* We need to sleep, so we need pathwalk to be in ref-mode */ + if (rcu_walk) + return -ECHILD; + + /* Wait for pending expires */ + do_expire_wait(dentry); + + /* + * This dentry may be under construction so wait on mount + * completion. + */ + return autofs4_mount_wait(dentry); +} + /* Lookups in the root directory */ static struct dentry *autofs4_lookup(struct inode *dir, struct dentry *dentry, struct nameidata *nd) { struct autofs_sb_info *sbi; struct autofs_info *ino; - struct dentry *expiring, *active; - int oz_mode; + struct dentry *active; - DPRINTK("name = %.*s", - dentry->d_name.len, dentry->d_name.name); + DPRINTK("name = %.*s", dentry->d_name.len, dentry->d_name.name); /* File name too long to exist */ if (dentry->d_name.len > NAME_MAX) return ERR_PTR(-ENAMETOOLONG); sbi = autofs4_sbi(dir->i_sb); - oz_mode = autofs4_oz_mode(sbi); DPRINTK("pid = %u, pgrp = %u, catatonic = %d, oz_mode = %d", - current->pid, task_pgrp_nr(current), sbi->catatonic, oz_mode); + current->pid, task_pgrp_nr(current), sbi->catatonic, + autofs4_oz_mode(sbi)); active = autofs4_lookup_active(dentry); if (active) { - dentry = active; - ino = autofs4_dentry_ino(dentry); + return active; } else { /* - * Mark the dentry incomplete but don't hash it. We do this - * to serialize our inode creation operations (symlink and - * mkdir) which prevents deadlock during the callback to - * the daemon. Subsequent user space lookups for the same - * dentry are placed on the wait queue while the daemon - * itself is allowed passage unresticted so the create - * operation itself can then hash the dentry. Finally, - * we check for the hashed dentry and return the newly - * hashed dentry. + * A dentry that is not within the root can never trigger a + * mount operation, unless the directory already exists, so we + * can return fail immediately. The daemon however does need + * to create directories within the file system. */ - d_set_d_op(dentry, &autofs4_root_dentry_operations); + if (!autofs4_oz_mode(sbi) && !IS_ROOT(dentry->d_parent)) + return ERR_PTR(-ENOENT); - /* - * And we need to ensure that the same dentry is used for - * all following lookup calls until it is hashed so that - * the dentry flags are persistent throughout the request. - */ - ino = autofs4_init_ino(NULL, sbi, 0555); + /* Mark entries in the root as mount triggers */ + if (autofs_type_indirect(sbi->type) && IS_ROOT(dentry->d_parent)) + __managed_dentry_set_managed(dentry); + + ino = autofs4_new_ino(sbi); if (!ino) return ERR_PTR(-ENOMEM); @@ -596,82 +521,6 @@ static struct dentry *autofs4_lookup(struct inode *dir, struct dentry *dentry, s d_instantiate(dentry, NULL); } - - if (!oz_mode) { - mutex_unlock(&dir->i_mutex); - expiring = autofs4_lookup_expiring(dentry); - if (expiring) { - /* - * If we are racing with expire the request might not - * be quite complete but the directory has been removed - * so it must have been successful, so just wait for it. - */ - autofs4_expire_wait(expiring); - autofs4_del_expiring(expiring); - dput(expiring); - } - - spin_lock(&sbi->fs_lock); - ino->flags |= AUTOFS_INF_PENDING; - spin_unlock(&sbi->fs_lock); - if (dentry->d_op && dentry->d_op->d_revalidate) - (dentry->d_op->d_revalidate)(dentry, nd); - mutex_lock(&dir->i_mutex); - } - - /* - * If we are still pending, check if we had to handle - * a signal. If so we can force a restart.. - */ - if (ino->flags & AUTOFS_INF_PENDING) { - /* See if we were interrupted */ - if (signal_pending(current)) { - sigset_t *sigset = ¤t->pending.signal; - if (sigismember (sigset, SIGKILL) || - sigismember (sigset, SIGQUIT) || - sigismember (sigset, SIGINT)) { - if (active) - dput(active); - return ERR_PTR(-ERESTARTNOINTR); - } - } - if (!oz_mode) { - spin_lock(&sbi->fs_lock); - ino->flags &= ~AUTOFS_INF_PENDING; - spin_unlock(&sbi->fs_lock); - } - } - - /* - * If this dentry is unhashed, then we shouldn't honour this - * lookup. Returning ENOENT here doesn't do the right thing - * for all system calls, but it should be OK for the operations - * we permit from an autofs. - */ - if (!oz_mode && d_unhashed(dentry)) { - /* - * A user space application can (and has done in the past) - * remove and re-create this directory during the callback. - * This can leave us with an unhashed dentry, but a - * successful mount! So we need to perform another - * cached lookup in case the dentry now exists. - */ - struct dentry *parent = dentry->d_parent; - struct dentry *new = d_lookup(parent, &dentry->d_name); - if (new != NULL) - dentry = new; - else - dentry = ERR_PTR(-ENOENT); - - if (active) - dput(active); - - return dentry; - } - - if (active) - return active; - return NULL; } @@ -683,6 +532,7 @@ static int autofs4_dir_symlink(struct inode *dir, struct autofs_info *ino = autofs4_dentry_ino(dentry); struct autofs_info *p_ino; struct inode *inode; + size_t size = strlen(symname); char *cp; DPRINTK("%s <- %.*s", symname, @@ -691,45 +541,35 @@ static int autofs4_dir_symlink(struct inode *dir, if (!autofs4_oz_mode(sbi)) return -EACCES; - ino = autofs4_init_ino(ino, sbi, S_IFLNK | 0555); - if (!ino) - return -ENOMEM; + BUG_ON(!ino); + + autofs4_clean_ino(ino); autofs4_del_active(dentry); - ino->size = strlen(symname); - cp = kmalloc(ino->size + 1, GFP_KERNEL); - if (!cp) { - if (!dentry->d_fsdata) - kfree(ino); + cp = kmalloc(size + 1, GFP_KERNEL); + if (!cp) return -ENOMEM; - } strcpy(cp, symname); - inode = autofs4_get_inode(dir->i_sb, ino); + inode = autofs4_get_inode(dir->i_sb, S_IFLNK | 0555); if (!inode) { kfree(cp); if (!dentry->d_fsdata) kfree(ino); return -ENOMEM; } + inode->i_private = cp; + inode->i_size = size; d_add(dentry, inode); - if (dir == dir->i_sb->s_root->d_inode) - d_set_d_op(dentry, &autofs4_root_dentry_operations); - else - d_set_d_op(dentry, &autofs4_dentry_operations); - - dentry->d_fsdata = ino; - ino->dentry = dget(dentry); + dget(dentry); atomic_inc(&ino->count); p_ino = autofs4_dentry_ino(dentry->d_parent); if (p_ino && dentry->d_parent != dentry) atomic_inc(&p_ino->count); - ino->inode = inode; - ino->u.symlink = cp; dir->i_mtime = CURRENT_TIME; return 0; @@ -782,6 +622,58 @@ static int autofs4_dir_unlink(struct inode *dir, struct dentry *dentry) return 0; } +/* + * Version 4 of autofs provides a pseudo direct mount implementation + * that relies on directories at the leaves of a directory tree under + * an indirect mount to trigger mounts. To allow for this we need to + * set the DMANAGED_AUTOMOUNT and DMANAGED_TRANSIT flags on the leaves + * of the directory tree. There is no need to clear the automount flag + * following a mount or restore it after an expire because these mounts + * are always covered. However, it is neccessary to ensure that these + * flags are clear on non-empty directories to avoid unnecessary calls + * during path walks. + */ +static void autofs_set_leaf_automount_flags(struct dentry *dentry) +{ + struct dentry *parent; + + /* root and dentrys in the root are already handled */ + if (IS_ROOT(dentry->d_parent)) + return; + + managed_dentry_set_managed(dentry); + + parent = dentry->d_parent; + /* only consider parents below dentrys in the root */ + if (IS_ROOT(parent->d_parent)) + return; + managed_dentry_clear_managed(parent); + return; +} + +static void autofs_clear_leaf_automount_flags(struct dentry *dentry) +{ + struct list_head *d_child; + struct dentry *parent; + + /* flags for dentrys in the root are handled elsewhere */ + if (IS_ROOT(dentry->d_parent)) + return; + + managed_dentry_clear_managed(dentry); + + parent = dentry->d_parent; + /* only consider parents below dentrys in the root */ + if (IS_ROOT(parent->d_parent)) + return; + d_child = &dentry->d_u.d_child; + /* Set parent managed if it's becoming empty */ + if (d_child->next == &parent->d_subdirs && + d_child->prev == &parent->d_subdirs) + managed_dentry_set_managed(parent); + return; +} + static int autofs4_dir_rmdir(struct inode *dir, struct dentry *dentry) { struct autofs_sb_info *sbi = autofs4_sbi(dir->i_sb); @@ -809,6 +701,9 @@ static int autofs4_dir_rmdir(struct inode *dir, struct dentry *dentry) spin_unlock(&dentry->d_lock); spin_unlock(&autofs4_lock); + if (sbi->version < 5) + autofs_clear_leaf_automount_flags(dentry); + if (atomic_dec_and_test(&ino->count)) { p_ino = autofs4_dentry_ino(dentry->d_parent); if (p_ino && dentry->d_parent != dentry) @@ -837,32 +732,25 @@ static int autofs4_dir_mkdir(struct inode *dir, struct dentry *dentry, int mode) DPRINTK("dentry %p, creating %.*s", dentry, dentry->d_name.len, dentry->d_name.name); - ino = autofs4_init_ino(ino, sbi, S_IFDIR | 0555); - if (!ino) - return -ENOMEM; + BUG_ON(!ino); + + autofs4_clean_ino(ino); autofs4_del_active(dentry); - inode = autofs4_get_inode(dir->i_sb, ino); - if (!inode) { - if (!dentry->d_fsdata) - kfree(ino); + inode = autofs4_get_inode(dir->i_sb, S_IFDIR | 0555); + if (!inode) return -ENOMEM; - } d_add(dentry, inode); - if (dir == dir->i_sb->s_root->d_inode) - d_set_d_op(dentry, &autofs4_root_dentry_operations); - else - d_set_d_op(dentry, &autofs4_dentry_operations); + if (sbi->version < 5) + autofs_set_leaf_automount_flags(dentry); - dentry->d_fsdata = ino; - ino->dentry = dget(dentry); + dget(dentry); atomic_inc(&ino->count); p_ino = autofs4_dentry_ino(dentry->d_parent); if (p_ino && dentry->d_parent != dentry) atomic_inc(&p_ino->count); - ino->inode = inode; inc_nlink(dir); dir->i_mtime = CURRENT_TIME; @@ -944,8 +832,7 @@ static inline int autofs4_ask_umount(struct vfsmount *mnt, int __user *p) int is_autofs4_dentry(struct dentry *dentry) { return dentry && dentry->d_inode && - (dentry->d_op == &autofs4_root_dentry_operations || - dentry->d_op == &autofs4_dentry_operations) && + dentry->d_op == &autofs4_dentry_operations && dentry->d_fsdata != NULL; } diff --git a/fs/autofs4/symlink.c b/fs/autofs4/symlink.c index b4ea829..f27c094 100644 --- a/fs/autofs4/symlink.c +++ b/fs/autofs4/symlink.c @@ -14,8 +14,7 @@ static void *autofs4_follow_link(struct dentry *dentry, struct nameidata *nd) { - struct autofs_info *ino = autofs4_dentry_ino(dentry); - nd_set_link(nd, (char *)ino->u.symlink); + nd_set_link(nd, dentry->d_inode->i_private); return NULL; } diff --git a/fs/autofs4/waitq.c b/fs/autofs4/waitq.c index c5f8459..5601005 100644 --- a/fs/autofs4/waitq.c +++ b/fs/autofs4/waitq.c @@ -309,6 +309,9 @@ static int validate_request(struct autofs_wait_queue **wait, * completed while we waited on the mutex ... */ if (notify == NFY_MOUNT) { + struct dentry *new = NULL; + int valid = 1; + /* * If the dentry was successfully mounted while we slept * on the wait queue mutex we can return success. If it @@ -316,8 +319,20 @@ static int validate_request(struct autofs_wait_queue **wait, * a multi-mount with no mount at it's base) we can * continue on and create a new request. */ + if (!IS_ROOT(dentry)) { + if (dentry->d_inode && d_unhashed(dentry)) { + struct dentry *parent = dentry->d_parent; + new = d_lookup(parent, &dentry->d_name); + if (new) + dentry = new; + } + } if (have_submounts(dentry)) - return 0; + valid = 0; + + if (new) + dput(new); + return valid; } return 1; diff --git a/fs/btrfs/Kconfig b/fs/btrfs/Kconfig index 7bb3c02..ecb9fd3 100644 --- a/fs/btrfs/Kconfig +++ b/fs/btrfs/Kconfig @@ -4,6 +4,8 @@ config BTRFS_FS select LIBCRC32C select ZLIB_INFLATE select ZLIB_DEFLATE + select LZO_COMPRESS + select LZO_DECOMPRESS help Btrfs is a new filesystem with extents, writable snapshotting, support for multiple devices and many more features. diff --git a/fs/btrfs/Makefile b/fs/btrfs/Makefile index a35eb36..31610ea 100644 --- a/fs/btrfs/Makefile +++ b/fs/btrfs/Makefile @@ -6,5 +6,5 @@ btrfs-y += super.o ctree.o extent-tree.o print-tree.o root-tree.o dir-item.o \ transaction.o inode.o file.o tree-defrag.o \ extent_map.o sysfs.o struct-funcs.o xattr.o ordered-data.o \ extent_io.o volumes.o async-thread.o ioctl.o locking.o orphan.o \ - export.o tree-log.o acl.o free-space-cache.o zlib.o \ + export.o tree-log.o acl.o free-space-cache.o zlib.o lzo.o \ compression.o delayed-ref.o relocation.o diff --git a/fs/btrfs/acl.c b/fs/btrfs/acl.c index 6ae2c8c..15b5ca2 100644 --- a/fs/btrfs/acl.c +++ b/fs/btrfs/acl.c @@ -60,8 +60,10 @@ static struct posix_acl *btrfs_get_acl(struct inode *inode, int type) size = __btrfs_getxattr(inode, name, value, size); if (size > 0) { acl = posix_acl_from_xattr(value, size); - if (IS_ERR(acl)) + if (IS_ERR(acl)) { + kfree(value); return acl; + } set_cached_acl(inode, type, acl); } kfree(value); diff --git a/fs/btrfs/btrfs_inode.h b/fs/btrfs/btrfs_inode.h index 6ad63f1..ccc991c 100644 --- a/fs/btrfs/btrfs_inode.h +++ b/fs/btrfs/btrfs_inode.h @@ -157,7 +157,7 @@ struct btrfs_inode { /* * always compress this one file */ - unsigned force_compress:1; + unsigned force_compress:4; struct inode vfs_inode; }; diff --git a/fs/btrfs/compression.c b/fs/btrfs/compression.c index b50bc4b..f745287 100644 --- a/fs/btrfs/compression.c +++ b/fs/btrfs/compression.c @@ -62,6 +62,9 @@ struct compressed_bio { /* number of bytes on disk */ unsigned long compressed_len; + /* the compression algorithm for this bio */ + int compress_type; + /* number of compressed pages in the array */ unsigned long nr_pages; @@ -173,11 +176,12 @@ static void end_compressed_bio_read(struct bio *bio, int err) /* ok, we're the last bio for this extent, lets start * the decompression. */ - ret = btrfs_zlib_decompress_biovec(cb->compressed_pages, - cb->start, - cb->orig_bio->bi_io_vec, - cb->orig_bio->bi_vcnt, - cb->compressed_len); + ret = btrfs_decompress_biovec(cb->compress_type, + cb->compressed_pages, + cb->start, + cb->orig_bio->bi_io_vec, + cb->orig_bio->bi_vcnt, + cb->compressed_len); csum_failed: if (ret) cb->errors = 1; @@ -588,6 +592,7 @@ int btrfs_submit_compressed_read(struct inode *inode, struct bio *bio, cb->len = uncompressed_len; cb->compressed_len = compressed_len; + cb->compress_type = extent_compress_type(bio_flags); cb->orig_bio = bio; nr_pages = (compressed_len + PAGE_CACHE_SIZE - 1) / @@ -677,3 +682,317 @@ int btrfs_submit_compressed_read(struct inode *inode, struct bio *bio, bio_put(comp_bio); return 0; } + +static struct list_head comp_idle_workspace[BTRFS_COMPRESS_TYPES]; +static spinlock_t comp_workspace_lock[BTRFS_COMPRESS_TYPES]; +static int comp_num_workspace[BTRFS_COMPRESS_TYPES]; +static atomic_t comp_alloc_workspace[BTRFS_COMPRESS_TYPES]; +static wait_queue_head_t comp_workspace_wait[BTRFS_COMPRESS_TYPES]; + +struct btrfs_compress_op *btrfs_compress_op[] = { + &btrfs_zlib_compress, + &btrfs_lzo_compress, +}; + +int __init btrfs_init_compress(void) +{ + int i; + + for (i = 0; i < BTRFS_COMPRESS_TYPES; i++) { + INIT_LIST_HEAD(&comp_idle_workspace[i]); + spin_lock_init(&comp_workspace_lock[i]); + atomic_set(&comp_alloc_workspace[i], 0); + init_waitqueue_head(&comp_workspace_wait[i]); + } + return 0; +} + +/* + * this finds an available workspace or allocates a new one + * ERR_PTR is returned if things go bad. + */ +static struct list_head *find_workspace(int type) +{ + struct list_head *workspace; + int cpus = num_online_cpus(); + int idx = type - 1; + + struct list_head *idle_workspace = &comp_idle_workspace[idx]; + spinlock_t *workspace_lock = &comp_workspace_lock[idx]; + atomic_t *alloc_workspace = &comp_alloc_workspace[idx]; + wait_queue_head_t *workspace_wait = &comp_workspace_wait[idx]; + int *num_workspace = &comp_num_workspace[idx]; +again: + spin_lock(workspace_lock); + if (!list_empty(idle_workspace)) { + workspace = idle_workspace->next; + list_del(workspace); + (*num_workspace)--; + spin_unlock(workspace_lock); + return workspace; + + } + if (atomic_read(alloc_workspace) > cpus) { + DEFINE_WAIT(wait); + + spin_unlock(workspace_lock); + prepare_to_wait(workspace_wait, &wait, TASK_UNINTERRUPTIBLE); + if (atomic_read(alloc_workspace) > cpus && !*num_workspace) + schedule(); + finish_wait(workspace_wait, &wait); + goto again; + } + atomic_inc(alloc_workspace); + spin_unlock(workspace_lock); + + workspace = btrfs_compress_op[idx]->alloc_workspace(); + if (IS_ERR(workspace)) { + atomic_dec(alloc_workspace); + wake_up(workspace_wait); + } + return workspace; +} + +/* + * put a workspace struct back on the list or free it if we have enough + * idle ones sitting around + */ +static void free_workspace(int type, struct list_head *workspace) +{ + int idx = type - 1; + struct list_head *idle_workspace = &comp_idle_workspace[idx]; + spinlock_t *workspace_lock = &comp_workspace_lock[idx]; + atomic_t *alloc_workspace = &comp_alloc_workspace[idx]; + wait_queue_head_t *workspace_wait = &comp_workspace_wait[idx]; + int *num_workspace = &comp_num_workspace[idx]; + + spin_lock(workspace_lock); + if (*num_workspace < num_online_cpus()) { + list_add_tail(workspace, idle_workspace); + (*num_workspace)++; + spin_unlock(workspace_lock); + goto wake; + } + spin_unlock(workspace_lock); + + btrfs_compress_op[idx]->free_workspace(workspace); + atomic_dec(alloc_workspace); +wake: + if (waitqueue_active(workspace_wait)) + wake_up(workspace_wait); +} + +/* + * cleanup function for module exit + */ +static void free_workspaces(void) +{ + struct list_head *workspace; + int i; + + for (i = 0; i < BTRFS_COMPRESS_TYPES; i++) { + while (!list_empty(&comp_idle_workspace[i])) { + workspace = comp_idle_workspace[i].next; + list_del(workspace); + btrfs_compress_op[i]->free_workspace(workspace); + atomic_dec(&comp_alloc_workspace[i]); + } + } +} + +/* + * given an address space and start/len, compress the bytes. + * + * pages are allocated to hold the compressed result and stored + * in 'pages' + * + * out_pages is used to return the number of pages allocated. There + * may be pages allocated even if we return an error + * + * total_in is used to return the number of bytes actually read. It + * may be smaller then len if we had to exit early because we + * ran out of room in the pages array or because we cross the + * max_out threshold. + * + * total_out is used to return the total number of compressed bytes + * + * max_out tells us the max number of bytes that we're allowed to + * stuff into pages + */ +int btrfs_compress_pages(int type, struct address_space *mapping, + u64 start, unsigned long len, + struct page **pages, + unsigned long nr_dest_pages, + unsigned long *out_pages, + unsigned long *total_in, + unsigned long *total_out, + unsigned long max_out) +{ + struct list_head *workspace; + int ret; + + workspace = find_workspace(type); + if (IS_ERR(workspace)) + return -1; + + ret = btrfs_compress_op[type-1]->compress_pages(workspace, mapping, + start, len, pages, + nr_dest_pages, out_pages, + total_in, total_out, + max_out); + free_workspace(type, workspace); + return ret; +} + +/* + * pages_in is an array of pages with compressed data. + * + * disk_start is the starting logical offset of this array in the file + * + * bvec is a bio_vec of pages from the file that we want to decompress into + * + * vcnt is the count of pages in the biovec + * + * srclen is the number of bytes in pages_in + * + * The basic idea is that we have a bio that was created by readpages. + * The pages in the bio are for the uncompressed data, and they may not + * be contiguous. They all correspond to the range of bytes covered by + * the compressed extent. + */ +int btrfs_decompress_biovec(int type, struct page **pages_in, u64 disk_start, + struct bio_vec *bvec, int vcnt, size_t srclen) +{ + struct list_head *workspace; + int ret; + + workspace = find_workspace(type); + if (IS_ERR(workspace)) + return -ENOMEM; + + ret = btrfs_compress_op[type-1]->decompress_biovec(workspace, pages_in, + disk_start, + bvec, vcnt, srclen); + free_workspace(type, workspace); + return ret; +} + +/* + * a less complex decompression routine. Our compressed data fits in a + * single page, and we want to read a single page out of it. + * start_byte tells us the offset into the compressed data we're interested in + */ +int btrfs_decompress(int type, unsigned char *data_in, struct page *dest_page, + unsigned long start_byte, size_t srclen, size_t destlen) +{ + struct list_head *workspace; + int ret; + + workspace = find_workspace(type); + if (IS_ERR(workspace)) + return -ENOMEM; + + ret = btrfs_compress_op[type-1]->decompress(workspace, data_in, + dest_page, start_byte, + srclen, destlen); + + free_workspace(type, workspace); + return ret; +} + +void __exit btrfs_exit_compress(void) +{ + free_workspaces(); +} + +/* + * Copy uncompressed data from working buffer to pages. + * + * buf_start is the byte offset we're of the start of our workspace buffer. + * + * total_out is the last byte of the buffer + */ +int btrfs_decompress_buf2page(char *buf, unsigned long buf_start, + unsigned long total_out, u64 disk_start, + struct bio_vec *bvec, int vcnt, + unsigned long *page_index, + unsigned long *pg_offset) +{ + unsigned long buf_offset; + unsigned long current_buf_start; + unsigned long start_byte; + unsigned long working_bytes = total_out - buf_start; + unsigned long bytes; + char *kaddr; + struct page *page_out = bvec[*page_index].bv_page; + + /* + * start byte is the first byte of the page we're currently + * copying into relative to the start of the compressed data. + */ + start_byte = page_offset(page_out) - disk_start; + + /* we haven't yet hit data corresponding to this page */ + if (total_out <= start_byte) + return 1; + + /* + * the start of the data we care about is offset into + * the middle of our working buffer + */ + if (total_out > start_byte && buf_start < start_byte) { + buf_offset = start_byte - buf_start; + working_bytes -= buf_offset; + } else { + buf_offset = 0; + } + current_buf_start = buf_start; + + /* copy bytes from the working buffer into the pages */ + while (working_bytes > 0) { + bytes = min(PAGE_CACHE_SIZE - *pg_offset, + PAGE_CACHE_SIZE - buf_offset); + bytes = min(bytes, working_bytes); + kaddr = kmap_atomic(page_out, KM_USER0); + memcpy(kaddr + *pg_offset, buf + buf_offset, bytes); + kunmap_atomic(kaddr, KM_USER0); + flush_dcache_page(page_out); + + *pg_offset += bytes; + buf_offset += bytes; + working_bytes -= bytes; + current_buf_start += bytes; + + /* check if we need to pick another page */ + if (*pg_offset == PAGE_CACHE_SIZE) { + (*page_index)++; + if (*page_index >= vcnt) + return 0; + + page_out = bvec[*page_index].bv_page; + *pg_offset = 0; + start_byte = page_offset(page_out) - disk_start; + + /* + * make sure our new page is covered by this + * working buffer + */ + if (total_out <= start_byte) + return 1; + + /* + * the next page in the biovec might not be adjacent + * to the last page, but it might still be found + * inside this working buffer. bump our offset pointer + */ + if (total_out > start_byte && + current_buf_start < start_byte) { + buf_offset = start_byte - buf_start; + working_bytes = total_out - start_byte; + current_buf_start = buf_start + buf_offset; + } + } + } + + return 1; +} diff --git a/fs/btrfs/compression.h b/fs/btrfs/compression.h index 421f5b4..5100017 100644 --- a/fs/btrfs/compression.h +++ b/fs/btrfs/compression.h @@ -19,24 +19,27 @@ #ifndef __BTRFS_COMPRESSION_ #define __BTRFS_COMPRESSION_ -int btrfs_zlib_decompress(unsigned char *data_in, - struct page *dest_page, - unsigned long start_byte, - size_t srclen, size_t destlen); -int btrfs_zlib_compress_pages(struct address_space *mapping, - u64 start, unsigned long len, - struct page **pages, - unsigned long nr_dest_pages, - unsigned long *out_pages, - unsigned long *total_in, - unsigned long *total_out, - unsigned long max_out); -int btrfs_zlib_decompress_biovec(struct page **pages_in, - u64 disk_start, - struct bio_vec *bvec, - int vcnt, - size_t srclen); -void btrfs_zlib_exit(void); +int btrfs_init_compress(void); +void btrfs_exit_compress(void); + +int btrfs_compress_pages(int type, struct address_space *mapping, + u64 start, unsigned long len, + struct page **pages, + unsigned long nr_dest_pages, + unsigned long *out_pages, + unsigned long *total_in, + unsigned long *total_out, + unsigned long max_out); +int btrfs_decompress_biovec(int type, struct page **pages_in, u64 disk_start, + struct bio_vec *bvec, int vcnt, size_t srclen); +int btrfs_decompress(int type, unsigned char *data_in, struct page *dest_page, + unsigned long start_byte, size_t srclen, size_t destlen); +int btrfs_decompress_buf2page(char *buf, unsigned long buf_start, + unsigned long total_out, u64 disk_start, + struct bio_vec *bvec, int vcnt, + unsigned long *page_index, + unsigned long *pg_offset); + int btrfs_submit_compressed_write(struct inode *inode, u64 start, unsigned long len, u64 disk_start, unsigned long compressed_len, @@ -44,4 +47,37 @@ int btrfs_submit_compressed_write(struct inode *inode, u64 start, unsigned long nr_pages); int btrfs_submit_compressed_read(struct inode *inode, struct bio *bio, int mirror_num, unsigned long bio_flags); + +struct btrfs_compress_op { + struct list_head *(*alloc_workspace)(void); + + void (*free_workspace)(struct list_head *workspace); + + int (*compress_pages)(struct list_head *workspace, + struct address_space *mapping, + u64 start, unsigned long len, + struct page **pages, + unsigned long nr_dest_pages, + unsigned long *out_pages, + unsigned long *total_in, + unsigned long *total_out, + unsigned long max_out); + + int (*decompress_biovec)(struct list_head *workspace, + struct page **pages_in, + u64 disk_start, + struct bio_vec *bvec, + int vcnt, + size_t srclen); + + int (*decompress)(struct list_head *workspace, + unsigned char *data_in, + struct page *dest_page, + unsigned long start_byte, + size_t srclen, size_t destlen); +}; + +extern struct btrfs_compress_op btrfs_zlib_compress; +extern struct btrfs_compress_op btrfs_lzo_compress; + #endif diff --git a/fs/btrfs/ctree.c b/fs/btrfs/ctree.c index 9ac1715..b5baff0 100644 --- a/fs/btrfs/ctree.c +++ b/fs/btrfs/ctree.c @@ -105,6 +105,8 @@ noinline void btrfs_clear_path_blocking(struct btrfs_path *p, /* this also releases the path */ void btrfs_free_path(struct btrfs_path *p) { + if (!p) + return; btrfs_release_path(NULL, p); kmem_cache_free(btrfs_path_cachep, p); } @@ -2514,6 +2516,9 @@ static int push_leaf_right(struct btrfs_trans_handle *trans, struct btrfs_root btrfs_assert_tree_locked(path->nodes[1]); right = read_node_slot(root, upper, slot + 1); + if (right == NULL) + return 1; + btrfs_tree_lock(right); btrfs_set_lock_blocking(right); @@ -2764,6 +2769,9 @@ static int push_leaf_left(struct btrfs_trans_handle *trans, struct btrfs_root btrfs_assert_tree_locked(path->nodes[1]); left = read_node_slot(root, path->nodes[1], slot - 1); + if (left == NULL) + return 1; + btrfs_tree_lock(left); btrfs_set_lock_blocking(left); diff --git a/fs/btrfs/ctree.h b/fs/btrfs/ctree.h index a142d20..2c98b3a 100644 --- a/fs/btrfs/ctree.h +++ b/fs/btrfs/ctree.h @@ -27,6 +27,7 @@ #include <linux/backing-dev.h> #include <linux/wait.h> #include <linux/slab.h> +#include <linux/kobject.h> #include <asm/kmap_types.h> #include "extent_io.h" #include "extent_map.h" @@ -294,6 +295,14 @@ static inline unsigned long btrfs_chunk_item_size(int num_stripes) #define BTRFS_FSID_SIZE 16 #define BTRFS_HEADER_FLAG_WRITTEN (1ULL << 0) #define BTRFS_HEADER_FLAG_RELOC (1ULL << 1) + +/* + * File system states + */ + +/* Errors detected */ +#define BTRFS_SUPER_FLAG_ERROR (1ULL << 2) + #define BTRFS_SUPER_FLAG_SEEDING (1ULL << 32) #define BTRFS_SUPER_FLAG_METADUMP (1ULL << 33) @@ -398,13 +407,15 @@ struct btrfs_super_block { #define BTRFS_FEATURE_INCOMPAT_MIXED_BACKREF (1ULL << 0) #define BTRFS_FEATURE_INCOMPAT_DEFAULT_SUBVOL (1ULL << 1) #define BTRFS_FEATURE_INCOMPAT_MIXED_GROUPS (1ULL << 2) +#define BTRFS_FEATURE_INCOMPAT_COMPRESS_LZO (1ULL << 3) #define BTRFS_FEATURE_COMPAT_SUPP 0ULL #define BTRFS_FEATURE_COMPAT_RO_SUPP 0ULL #define BTRFS_FEATURE_INCOMPAT_SUPP \ (BTRFS_FEATURE_INCOMPAT_MIXED_BACKREF | \ BTRFS_FEATURE_INCOMPAT_DEFAULT_SUBVOL | \ - BTRFS_FEATURE_INCOMPAT_MIXED_GROUPS) + BTRFS_FEATURE_INCOMPAT_MIXED_GROUPS | \ + BTRFS_FEATURE_INCOMPAT_COMPRESS_LZO) /* * A leaf is full of items. offset and size tell us where to find @@ -551,9 +562,11 @@ struct btrfs_timespec { } __attribute__ ((__packed__)); enum btrfs_compression_type { - BTRFS_COMPRESS_NONE = 0, - BTRFS_COMPRESS_ZLIB = 1, - BTRFS_COMPRESS_LAST = 2, + BTRFS_COMPRESS_NONE = 0, + BTRFS_COMPRESS_ZLIB = 1, + BTRFS_COMPRESS_LZO = 2, + BTRFS_COMPRESS_TYPES = 2, + BTRFS_COMPRESS_LAST = 3, }; struct btrfs_inode_item { @@ -597,6 +610,8 @@ struct btrfs_dir_item { u8 type; } __attribute__ ((__packed__)); +#define BTRFS_ROOT_SUBVOL_RDONLY (1ULL << 0) + struct btrfs_root_item { struct btrfs_inode_item inode; __le64 generation; @@ -895,7 +910,8 @@ struct btrfs_fs_info { */ u64 last_trans_log_full_commit; u64 open_ioctl_trans; - unsigned long mount_opt; + unsigned long mount_opt:20; + unsigned long compress_type:4; u64 max_inline; u64 alloc_start; struct btrfs_transaction *running_transaction; @@ -1050,6 +1066,9 @@ struct btrfs_fs_info { unsigned metadata_ratio; void *bdev_holder; + + /* filesystem state */ + u64 fs_state; }; /* @@ -1893,6 +1912,11 @@ BTRFS_SETGET_STACK_FUNCS(root_limit, struct btrfs_root_item, byte_limit, 64); BTRFS_SETGET_STACK_FUNCS(root_last_snapshot, struct btrfs_root_item, last_snapshot, 64); +static inline bool btrfs_root_readonly(struct btrfs_root *root) +{ + return root->root_item.flags & BTRFS_ROOT_SUBVOL_RDONLY; +} + /* struct btrfs_super_block */ BTRFS_SETGET_STACK_FUNCS(super_bytenr, struct btrfs_super_block, bytenr, 64); @@ -2145,6 +2169,7 @@ int btrfs_make_block_group(struct btrfs_trans_handle *trans, int btrfs_remove_block_group(struct btrfs_trans_handle *trans, struct btrfs_root *root, u64 group_start); u64 btrfs_reduce_alloc_profile(struct btrfs_root *root, u64 flags); +u64 btrfs_get_alloc_profile(struct btrfs_root *root, int data); void btrfs_set_inode_space_info(struct btrfs_root *root, struct inode *ionde); void btrfs_clear_space_info_full(struct btrfs_fs_info *info); int btrfs_check_data_free_space(struct inode *inode, u64 bytes); @@ -2188,6 +2213,12 @@ int btrfs_set_block_group_ro(struct btrfs_root *root, int btrfs_set_block_group_rw(struct btrfs_root *root, struct btrfs_block_group_cache *cache); void btrfs_put_block_group_cache(struct btrfs_fs_info *info); +u64 btrfs_account_ro_block_groups_free_space(struct btrfs_space_info *sinfo); +int btrfs_error_unpin_extent_range(struct btrfs_root *root, + u64 start, u64 end); +int btrfs_error_discard_extent(struct btrfs_root *root, u64 bytenr, + u64 num_bytes); + /* ctree.c */ int btrfs_bin_search(struct extent_buffer *eb, struct btrfs_key *key, int level, int *slot); @@ -2541,6 +2572,14 @@ ssize_t btrfs_listxattr(struct dentry *dentry, char *buffer, size_t size); /* super.c */ int btrfs_parse_options(struct btrfs_root *root, char *options); int btrfs_sync_fs(struct super_block *sb, int wait); +void __btrfs_std_error(struct btrfs_fs_info *fs_info, const char *function, + unsigned int line, int errno); + +#define btrfs_std_error(fs_info, errno) \ +do { \ + if ((errno)) \ + __btrfs_std_error((fs_info), __func__, __LINE__, (errno));\ +} while (0) /* acl.c */ #ifdef CONFIG_BTRFS_FS_POSIX_ACL diff --git a/fs/btrfs/disk-io.c b/fs/btrfs/disk-io.c index 51d2e4d..b531c36 100644 --- a/fs/btrfs/disk-io.c +++ b/fs/btrfs/disk-io.c @@ -44,6 +44,20 @@ static struct extent_io_ops btree_extent_io_ops; static void end_workqueue_fn(struct btrfs_work *work); static void free_fs_root(struct btrfs_root *root); +static void btrfs_check_super_valid(struct btrfs_fs_info *fs_info, + int read_only); +static int btrfs_destroy_ordered_operations(struct btrfs_root *root); +static int btrfs_destroy_ordered_extents(struct btrfs_root *root); +static int btrfs_destroy_delayed_refs(struct btrfs_transaction *trans, + struct btrfs_root *root); +static int btrfs_destroy_pending_snapshots(struct btrfs_transaction *t); +static int btrfs_destroy_delalloc_inodes(struct btrfs_root *root); +static int btrfs_destroy_marked_extents(struct btrfs_root *root, + struct extent_io_tree *dirty_pages, + int mark); +static int btrfs_destroy_pinned_extent(struct btrfs_root *root, + struct extent_io_tree *pinned_extents); +static int btrfs_cleanup_transaction(struct btrfs_root *root); /* * end_io_wq structs are used to do processing in task context when an IO is @@ -353,6 +367,10 @@ static int csum_dirty_buffer(struct btrfs_root *root, struct page *page) WARN_ON(len == 0); eb = alloc_extent_buffer(tree, start, len, page, GFP_NOFS); + if (eb == NULL) { + WARN_ON(1); + goto out; + } ret = btree_read_extent_buffer_pages(root, eb, start + PAGE_CACHE_SIZE, btrfs_header_generation(eb)); BUG_ON(ret); @@ -427,6 +445,10 @@ static int btree_readpage_end_io_hook(struct page *page, u64 start, u64 end, WARN_ON(len == 0); eb = alloc_extent_buffer(tree, start, len, page, GFP_NOFS); + if (eb == NULL) { + ret = -EIO; + goto out; + } found_start = btrfs_header_bytenr(eb); if (found_start != start) { @@ -1145,6 +1167,7 @@ struct btrfs_root *btrfs_read_fs_root_no_radix(struct btrfs_root *tree_root, } btrfs_free_path(path); if (ret) { + kfree(root); if (ret > 0) ret = -ENOENT; return ERR_PTR(ret); @@ -1713,8 +1736,10 @@ struct btrfs_root *open_ctree(struct super_block *sb, fs_info, BTRFS_ROOT_TREE_OBJECTID); bh = btrfs_read_dev_super(fs_devices->latest_bdev); - if (!bh) + if (!bh) { + err = -EINVAL; goto fail_iput; + } memcpy(&fs_info->super_copy, bh->b_data, sizeof(fs_info->super_copy)); memcpy(&fs_info->super_for_commit, &fs_info->super_copy, @@ -1727,6 +1752,11 @@ struct btrfs_root *open_ctree(struct super_block *sb, if (!btrfs_super_root(disk_super)) goto fail_iput; + /* check FS state, whether FS is broken. */ + fs_info->fs_state |= btrfs_super_flags(disk_super); + + btrfs_check_super_valid(fs_info, sb->s_flags & MS_RDONLY); + ret = btrfs_parse_options(tree_root, options); if (ret) { err = ret; @@ -1744,10 +1774,10 @@ struct btrfs_root *open_ctree(struct super_block *sb, } features = btrfs_super_incompat_flags(disk_super); - if (!(features & BTRFS_FEATURE_INCOMPAT_MIXED_BACKREF)) { - features |= BTRFS_FEATURE_INCOMPAT_MIXED_BACKREF; - btrfs_set_super_incompat_flags(disk_super, features); - } + features |= BTRFS_FEATURE_INCOMPAT_MIXED_BACKREF; + if (tree_root->fs_info->compress_type & BTRFS_COMPRESS_LZO) + features |= BTRFS_FEATURE_INCOMPAT_COMPRESS_LZO; + btrfs_set_super_incompat_flags(disk_super, features); features = btrfs_super_compat_ro_flags(disk_super) & ~BTRFS_FEATURE_COMPAT_RO_SUPP; @@ -1957,7 +1987,9 @@ struct btrfs_root *open_ctree(struct super_block *sb, btrfs_set_opt(fs_info->mount_opt, SSD); } - if (btrfs_super_log_root(disk_super) != 0) { + /* do not make disk changes in broken FS */ + if (btrfs_super_log_root(disk_super) != 0 && + !(fs_info->fs_state & BTRFS_SUPER_FLAG_ERROR)) { u64 bytenr = btrfs_super_log_root(disk_super); if (fs_devices->rw_devices == 0) { @@ -2442,8 +2474,28 @@ int close_ctree(struct btrfs_root *root) smp_mb(); btrfs_put_block_group_cache(fs_info); + + /* + * Here come 2 situations when btrfs is broken to flip readonly: + * + * 1. when btrfs flips readonly somewhere else before + * btrfs_commit_super, sb->s_flags has MS_RDONLY flag, + * and btrfs will skip to write sb directly to keep + * ERROR state on disk. + * + * 2. when btrfs flips readonly just in btrfs_commit_super, + * and in such case, btrfs cannnot write sb via btrfs_commit_super, + * and since fs_state has been set BTRFS_SUPER_FLAG_ERROR flag, + * btrfs will cleanup all FS resources first and write sb then. + */ if (!(fs_info->sb->s_flags & MS_RDONLY)) { - ret = btrfs_commit_super(root); + ret = btrfs_commit_super(root); + if (ret) + printk(KERN_ERR "btrfs: commit super ret %d\n", ret); + } + + if (fs_info->fs_state & BTRFS_SUPER_FLAG_ERROR) { + ret = btrfs_error_commit_super(root); if (ret) printk(KERN_ERR "btrfs: commit super ret %d\n", ret); } @@ -2619,6 +2671,352 @@ out: return 0; } +static void btrfs_check_super_valid(struct btrfs_fs_info *fs_info, + int read_only) +{ + if (read_only) + return; + + if (fs_info->fs_state & BTRFS_SUPER_FLAG_ERROR) + printk(KERN_WARNING "warning: mount fs with errors, " + "running btrfsck is recommended\n"); +} + +int btrfs_error_commit_super(struct btrfs_root *root) +{ + int ret; + + mutex_lock(&root->fs_info->cleaner_mutex); + btrfs_run_delayed_iputs(root); + mutex_unlock(&root->fs_info->cleaner_mutex); + + down_write(&root->fs_info->cleanup_work_sem); + up_write(&root->fs_info->cleanup_work_sem); + + /* cleanup FS via transaction */ + btrfs_cleanup_transaction(root); + + ret = write_ctree_super(NULL, root, 0); + + return ret; +} + +static int btrfs_destroy_ordered_operations(struct btrfs_root *root) +{ + struct btrfs_inode *btrfs_inode; + struct list_head splice; + + INIT_LIST_HEAD(&splice); + + mutex_lock(&root->fs_info->ordered_operations_mutex); + spin_lock(&root->fs_info->ordered_extent_lock); + + list_splice_init(&root->fs_info->ordered_operations, &splice); + while (!list_empty(&splice)) { + btrfs_inode = list_entry(splice.next, struct btrfs_inode, + ordered_operations); + + list_del_init(&btrfs_inode->ordered_operations); + + btrfs_invalidate_inodes(btrfs_inode->root); + } + + spin_unlock(&root->fs_info->ordered_extent_lock); + mutex_unlock(&root->fs_info->ordered_operations_mutex); + + return 0; +} + +static int btrfs_destroy_ordered_extents(struct btrfs_root *root) +{ + struct list_head splice; + struct btrfs_ordered_extent *ordered; + struct inode *inode; + + INIT_LIST_HEAD(&splice); + + spin_lock(&root->fs_info->ordered_extent_lock); + + list_splice_init(&root->fs_info->ordered_extents, &splice); + while (!list_empty(&splice)) { + ordered = list_entry(splice.next, struct btrfs_ordered_extent, + root_extent_list); + + list_del_init(&ordered->root_extent_list); + atomic_inc(&ordered->refs); + + /* the inode may be getting freed (in sys_unlink path). */ + inode = igrab(ordered->inode); + + spin_unlock(&root->fs_info->ordered_extent_lock); + if (inode) + iput(inode); + + atomic_set(&ordered->refs, 1); + btrfs_put_ordered_extent(ordered); + + spin_lock(&root->fs_info->ordered_extent_lock); + } + + spin_unlock(&root->fs_info->ordered_extent_lock); + + return 0; +} + +static int btrfs_destroy_delayed_refs(struct btrfs_transaction *trans, + struct btrfs_root *root) +{ + struct rb_node *node; + struct btrfs_delayed_ref_root *delayed_refs; + struct btrfs_delayed_ref_node *ref; + int ret = 0; + + delayed_refs = &trans->delayed_refs; + + spin_lock(&delayed_refs->lock); + if (delayed_refs->num_entries == 0) { + printk(KERN_INFO "delayed_refs has NO entry\n"); + return ret; + } + + node = rb_first(&delayed_refs->root); + while (node) { + ref = rb_entry(node, struct btrfs_delayed_ref_node, rb_node); + node = rb_next(node); + + ref->in_tree = 0; + rb_erase(&ref->rb_node, &delayed_refs->root); + delayed_refs->num_entries--; + + atomic_set(&ref->refs, 1); + if (btrfs_delayed_ref_is_head(ref)) { + struct btrfs_delayed_ref_head *head; + + head = btrfs_delayed_node_to_head(ref); + mutex_lock(&head->mutex); + kfree(head->extent_op); + delayed_refs->num_heads--; + if (list_empty(&head->cluster)) + delayed_refs->num_heads_ready--; + list_del_init(&head->cluster); + mutex_unlock(&head->mutex); + } + + spin_unlock(&delayed_refs->lock); + btrfs_put_delayed_ref(ref); + + cond_resched(); + spin_lock(&delayed_refs->lock); + } + + spin_unlock(&delayed_refs->lock); + + return ret; +} + +static int btrfs_destroy_pending_snapshots(struct btrfs_transaction *t) +{ + struct btrfs_pending_snapshot *snapshot; + struct list_head splice; + + INIT_LIST_HEAD(&splice); + + list_splice_init(&t->pending_snapshots, &splice); + + while (!list_empty(&splice)) { + snapshot = list_entry(splice.next, + struct btrfs_pending_snapshot, + list); + + list_del_init(&snapshot->list); + + kfree(snapshot); + } + + return 0; +} + +static int btrfs_destroy_delalloc_inodes(struct btrfs_root *root) +{ + struct btrfs_inode *btrfs_inode; + struct list_head splice; + + INIT_LIST_HEAD(&splice); + + list_splice_init(&root->fs_info->delalloc_inodes, &splice); + + spin_lock(&root->fs_info->delalloc_lock); + + while (!list_empty(&splice)) { + btrfs_inode = list_entry(splice.next, struct btrfs_inode, + delalloc_inodes); + + list_del_init(&btrfs_inode->delalloc_inodes); + + btrfs_invalidate_inodes(btrfs_inode->root); + } + + spin_unlock(&root->fs_info->delalloc_lock); + + return 0; +} + +static int btrfs_destroy_marked_extents(struct btrfs_root *root, + struct extent_io_tree *dirty_pages, + int mark) +{ + int ret; + struct page *page; + struct inode *btree_inode = root->fs_info->btree_inode; + struct extent_buffer *eb; + u64 start = 0; + u64 end; + u64 offset; + unsigned long index; + + while (1) { + ret = find_first_extent_bit(dirty_pages, start, &start, &end, + mark); + if (ret) + break; + + clear_extent_bits(dirty_pages, start, end, mark, GFP_NOFS); + while (start <= end) { + index = start >> PAGE_CACHE_SHIFT; + start = (u64)(index + 1) << PAGE_CACHE_SHIFT; + page = find_get_page(btree_inode->i_mapping, index); + if (!page) + continue; + offset = page_offset(page); + + spin_lock(&dirty_pages->buffer_lock); + eb = radix_tree_lookup( + &(&BTRFS_I(page->mapping->host)->io_tree)->buffer, + offset >> PAGE_CACHE_SHIFT); + spin_unlock(&dirty_pages->buffer_lock); + if (eb) { + ret = test_and_clear_bit(EXTENT_BUFFER_DIRTY, + &eb->bflags); + atomic_set(&eb->refs, 1); + } + if (PageWriteback(page)) + end_page_writeback(page); + + lock_page(page); + if (PageDirty(page)) { + clear_page_dirty_for_io(page); + spin_lock_irq(&page->mapping->tree_lock); + radix_tree_tag_clear(&page->mapping->page_tree, + page_index(page), + PAGECACHE_TAG_DIRTY); + spin_unlock_irq(&page->mapping->tree_lock); + } + + page->mapping->a_ops->invalidatepage(page, 0); + unlock_page(page); + } + } + + return ret; +} + +static int btrfs_destroy_pinned_extent(struct btrfs_root *root, + struct extent_io_tree *pinned_extents) +{ + struct extent_io_tree *unpin; + u64 start; + u64 end; + int ret; + + unpin = pinned_extents; + while (1) { + ret = find_first_extent_bit(unpin, 0, &start, &end, + EXTENT_DIRTY); + if (ret) + break; + + /* opt_discard */ + ret = btrfs_error_discard_extent(root, start, end + 1 - start); + + clear_extent_dirty(unpin, start, end, GFP_NOFS); + btrfs_error_unpin_extent_range(root, start, end); + cond_resched(); + } + + return 0; +} + +static int btrfs_cleanup_transaction(struct btrfs_root *root) +{ + struct btrfs_transaction *t; + LIST_HEAD(list); + + WARN_ON(1); + + mutex_lock(&root->fs_info->trans_mutex); + mutex_lock(&root->fs_info->transaction_kthread_mutex); + + list_splice_init(&root->fs_info->trans_list, &list); + while (!list_empty(&list)) { + t = list_entry(list.next, struct btrfs_transaction, list); + if (!t) + break; + + btrfs_destroy_ordered_operations(root); + + btrfs_destroy_ordered_extents(root); + + btrfs_destroy_delayed_refs(t, root); + + btrfs_block_rsv_release(root, + &root->fs_info->trans_block_rsv, + t->dirty_pages.dirty_bytes); + + /* FIXME: cleanup wait for commit */ + t->in_commit = 1; + t->blocked = 1; + if (waitqueue_active(&root->fs_info->transaction_blocked_wait)) + wake_up(&root->fs_info->transaction_blocked_wait); + + t->blocked = 0; + if (waitqueue_active(&root->fs_info->transaction_wait)) + wake_up(&root->fs_info->transaction_wait); + mutex_unlock(&root->fs_info->trans_mutex); + + mutex_lock(&root->fs_info->trans_mutex); + t->commit_done = 1; + if (waitqueue_active(&t->commit_wait)) + wake_up(&t->commit_wait); + mutex_unlock(&root->fs_info->trans_mutex); + + mutex_lock(&root->fs_info->trans_mutex); + + btrfs_destroy_pending_snapshots(t); + + btrfs_destroy_delalloc_inodes(root); + + spin_lock(&root->fs_info->new_trans_lock); + root->fs_info->running_transaction = NULL; + spin_unlock(&root->fs_info->new_trans_lock); + + btrfs_destroy_marked_extents(root, &t->dirty_pages, + EXTENT_DIRTY); + + btrfs_destroy_pinned_extent(root, + root->fs_info->pinned_extents); + + t->use_count = 0; + list_del_init(&t->list); + memset(t, 0, sizeof(*t)); + kmem_cache_free(btrfs_transaction_cachep, t); + } + + mutex_unlock(&root->fs_info->transaction_kthread_mutex); + mutex_unlock(&root->fs_info->trans_mutex); + + return 0; +} + static struct extent_io_ops btree_extent_io_ops = { .write_cache_pages_lock_hook = btree_lock_page_hook, .readpage_end_io_hook = btree_readpage_end_io_hook, diff --git a/fs/btrfs/disk-io.h b/fs/btrfs/disk-io.h index 88e825a..07b20dc 100644 --- a/fs/btrfs/disk-io.h +++ b/fs/btrfs/disk-io.h @@ -52,6 +52,7 @@ int write_ctree_super(struct btrfs_trans_handle *trans, struct btrfs_root *root, int max_mirrors); struct buffer_head *btrfs_read_dev_super(struct block_device *bdev); int btrfs_commit_super(struct btrfs_root *root); +int btrfs_error_commit_super(struct btrfs_root *root); struct extent_buffer *btrfs_find_tree_block(struct btrfs_root *root, u64 bytenr, u32 blocksize); struct btrfs_root *btrfs_lookup_fs_root(struct btrfs_fs_info *fs_info, diff --git a/fs/btrfs/extent-tree.c b/fs/btrfs/extent-tree.c index 227e581..b552693 100644 --- a/fs/btrfs/extent-tree.c +++ b/fs/btrfs/extent-tree.c @@ -3089,7 +3089,7 @@ static u64 get_alloc_profile(struct btrfs_root *root, u64 flags) return btrfs_reduce_alloc_profile(root, flags); } -static u64 btrfs_get_alloc_profile(struct btrfs_root *root, int data) +u64 btrfs_get_alloc_profile(struct btrfs_root *root, int data) { u64 flags; @@ -3161,8 +3161,12 @@ alloc: bytes + 2 * 1024 * 1024, alloc_target, 0); btrfs_end_transaction(trans, root); - if (ret < 0) - return ret; + if (ret < 0) { + if (ret != -ENOSPC) + return ret; + else + goto commit_trans; + } if (!data_sinfo) { btrfs_set_inode_space_info(root, inode); @@ -3173,6 +3177,7 @@ alloc: spin_unlock(&data_sinfo->lock); /* commit the current transaction and try again */ +commit_trans: if (!committed && !root->fs_info->open_ioctl_trans) { committed = 1; trans = btrfs_join_transaction(root, 1); @@ -3721,11 +3726,6 @@ int btrfs_block_rsv_check(struct btrfs_trans_handle *trans, return 0; } - WARN_ON(1); - printk(KERN_INFO"block_rsv size %llu reserved %llu freed %llu %llu\n", - block_rsv->size, block_rsv->reserved, - block_rsv->freed[0], block_rsv->freed[1]); - return -ENOSPC; } @@ -7970,13 +7970,14 @@ static int set_block_group_ro(struct btrfs_block_group_cache *cache) if (sinfo->bytes_used + sinfo->bytes_reserved + sinfo->bytes_pinned + sinfo->bytes_may_use + sinfo->bytes_readonly + - cache->reserved_pinned + num_bytes < sinfo->total_bytes) { + cache->reserved_pinned + num_bytes <= sinfo->total_bytes) { sinfo->bytes_readonly += num_bytes; sinfo->bytes_reserved += cache->reserved_pinned; cache->reserved_pinned = 0; cache->ro = 1; ret = 0; } + spin_unlock(&cache->lock); spin_unlock(&sinfo->lock); return ret; @@ -8012,6 +8013,62 @@ out: return ret; } +/* + * helper to account the unused space of all the readonly block group in the + * list. takes mirrors into account. + */ +static u64 __btrfs_get_ro_block_group_free_space(struct list_head *groups_list) +{ + struct btrfs_block_group_cache *block_group; + u64 free_bytes = 0; + int factor; + + list_for_each_entry(block_group, groups_list, list) { + spin_lock(&block_group->lock); + + if (!block_group->ro) { + spin_unlock(&block_group->lock); + continue; + } + + if (block_group->flags & (BTRFS_BLOCK_GROUP_RAID1 | + BTRFS_BLOCK_GROUP_RAID10 | + BTRFS_BLOCK_GROUP_DUP)) + factor = 2; + else + factor = 1; + + free_bytes += (block_group->key.offset - + btrfs_block_group_used(&block_group->item)) * + factor; + + spin_unlock(&block_group->lock); + } + + return free_bytes; +} + +/* + * helper to account the unused space of all the readonly block group in the + * space_info. takes mirrors into account. + */ +u64 btrfs_account_ro_block_groups_free_space(struct btrfs_space_info *sinfo) +{ + int i; + u64 free_bytes = 0; + + spin_lock(&sinfo->lock); + + for(i = 0; i < BTRFS_NR_RAID_TYPES; i++) + if (!list_empty(&sinfo->block_groups[i])) + free_bytes += __btrfs_get_ro_block_group_free_space( + &sinfo->block_groups[i]); + + spin_unlock(&sinfo->lock); + + return free_bytes; +} + int btrfs_set_block_group_rw(struct btrfs_root *root, struct btrfs_block_group_cache *cache) { @@ -8092,7 +8149,7 @@ int btrfs_can_relocate(struct btrfs_root *root, u64 bytenr) mutex_lock(&root->fs_info->chunk_mutex); list_for_each_entry(device, &fs_devices->alloc_list, dev_alloc_list) { u64 min_free = btrfs_block_group_used(&block_group->item); - u64 dev_offset, max_avail; + u64 dev_offset; /* * check to make sure we can actually find a chunk with enough @@ -8100,7 +8157,7 @@ int btrfs_can_relocate(struct btrfs_root *root, u64 bytenr) */ if (device->total_bytes > device->bytes_used + min_free) { ret = find_free_dev_extent(NULL, device, min_free, - &dev_offset, &max_avail); + &dev_offset, NULL); if (!ret) break; ret = -1; @@ -8584,3 +8641,14 @@ out: btrfs_free_path(path); return ret; } + +int btrfs_error_unpin_extent_range(struct btrfs_root *root, u64 start, u64 end) +{ + return unpin_extent_range(root, start, end); +} + +int btrfs_error_discard_extent(struct btrfs_root *root, u64 bytenr, + u64 num_bytes) +{ + return btrfs_discard_extent(root, bytenr, num_bytes); +} diff --git a/fs/btrfs/extent_io.c b/fs/btrfs/extent_io.c index 3e86b9f..2e993cf 100644 --- a/fs/btrfs/extent_io.c +++ b/fs/btrfs/extent_io.c @@ -2028,8 +2028,11 @@ static int __extent_read_full_page(struct extent_io_tree *tree, BUG_ON(extent_map_end(em) <= cur); BUG_ON(end < cur); - if (test_bit(EXTENT_FLAG_COMPRESSED, &em->flags)) + if (test_bit(EXTENT_FLAG_COMPRESSED, &em->flags)) { this_bio_flag = EXTENT_BIO_COMPRESSED; + extent_set_compress_type(&this_bio_flag, + em->compress_type); + } iosize = min(extent_map_end(em) - cur, end - cur + 1); cur_end = min(extent_map_end(em) - 1, end); @@ -3072,6 +3075,8 @@ static struct extent_buffer *__alloc_extent_buffer(struct extent_io_tree *tree, #endif eb = kmem_cache_zalloc(extent_buffer_cache, mask); + if (eb == NULL) + return NULL; eb->start = start; eb->len = len; spin_lock_init(&eb->lock); diff --git a/fs/btrfs/extent_io.h b/fs/btrfs/extent_io.h index 4183c81..7083cfa 100644 --- a/fs/btrfs/extent_io.h +++ b/fs/btrfs/extent_io.h @@ -20,8 +20,12 @@ #define EXTENT_IOBITS (EXTENT_LOCKED | EXTENT_WRITEBACK) #define EXTENT_CTLBITS (EXTENT_DO_ACCOUNTING | EXTENT_FIRST_DELALLOC) -/* flags for bio submission */ +/* + * flags for bio submission. The high bits indicate the compression + * type for this bio + */ #define EXTENT_BIO_COMPRESSED 1 +#define EXTENT_BIO_FLAG_SHIFT 16 /* these are bit numbers for test/set bit */ #define EXTENT_BUFFER_UPTODATE 0 @@ -135,6 +139,17 @@ struct extent_buffer { wait_queue_head_t lock_wq; }; +static inline void extent_set_compress_type(unsigned long *bio_flags, + int compress_type) +{ + *bio_flags |= compress_type << EXTENT_BIO_FLAG_SHIFT; +} + +static inline int extent_compress_type(unsigned long bio_flags) +{ + return bio_flags >> EXTENT_BIO_FLAG_SHIFT; +} + struct extent_map_tree; static inline struct extent_state *extent_state_next(struct extent_state *state) diff --git a/fs/btrfs/extent_map.c b/fs/btrfs/extent_map.c index 23cb8da..b0e1fce 100644 --- a/fs/btrfs/extent_map.c +++ b/fs/btrfs/extent_map.c @@ -3,6 +3,7 @@ #include <linux/module.h> #include <linux/spinlock.h> #include <linux/hardirq.h> +#include "ctree.h" #include "extent_map.h" @@ -54,6 +55,7 @@ struct extent_map *alloc_extent_map(gfp_t mask) return em; em->in_tree = 0; em->flags = 0; + em->compress_type = BTRFS_COMPRESS_NONE; atomic_set(&em->refs, 1); return em; } diff --git a/fs/btrfs/extent_map.h b/fs/btrfs/extent_map.h index ab6d74b..28b44db 100644 --- a/fs/btrfs/extent_map.h +++ b/fs/btrfs/extent_map.h @@ -26,7 +26,8 @@ struct extent_map { unsigned long flags; struct block_device *bdev; atomic_t refs; - int in_tree; + unsigned int in_tree:1; + unsigned int compress_type:4; }; struct extent_map_tree { diff --git a/fs/btrfs/file.c b/fs/btrfs/file.c index 66836d8..c800d58 100644 --- a/fs/btrfs/file.c +++ b/fs/btrfs/file.c @@ -24,6 +24,7 @@ #include <linux/string.h> #include <linux/backing-dev.h> #include <linux/mpage.h> +#include <linux/falloc.h> #include <linux/swap.h> #include <linux/writeback.h> #include <linux/statfs.h> @@ -224,6 +225,7 @@ int btrfs_drop_extent_cache(struct inode *inode, u64 start, u64 end, split->bdev = em->bdev; split->flags = flags; + split->compress_type = em->compress_type; ret = add_extent_mapping(em_tree, split); BUG_ON(ret); free_extent_map(split); @@ -238,6 +240,7 @@ int btrfs_drop_extent_cache(struct inode *inode, u64 start, u64 end, split->len = em->start + em->len - (start + len); split->bdev = em->bdev; split->flags = flags; + split->compress_type = em->compress_type; if (compressed) { split->block_len = em->block_len; @@ -890,6 +893,17 @@ static ssize_t btrfs_file_aio_write(struct kiocb *iocb, if (err) goto out; + /* + * If BTRFS flips readonly due to some impossible error + * (fs_info->fs_state now has BTRFS_SUPER_FLAG_ERROR), + * although we have opened a file as writable, we have + * to stop this write operation to ensure FS consistency. + */ + if (root->fs_info->fs_state & BTRFS_SUPER_FLAG_ERROR) { + err = -EROFS; + goto out; + } + file_update_time(file); BTRFS_I(inode)->sequence++; @@ -1237,6 +1251,117 @@ static int btrfs_file_mmap(struct file *filp, struct vm_area_struct *vma) return 0; } +static long btrfs_fallocate(struct file *file, int mode, + loff_t offset, loff_t len) +{ + struct inode *inode = file->f_path.dentry->d_inode; + struct extent_state *cached_state = NULL; + u64 cur_offset; + u64 last_byte; + u64 alloc_start; + u64 alloc_end; + u64 alloc_hint = 0; + u64 locked_end; + u64 mask = BTRFS_I(inode)->root->sectorsize - 1; + struct extent_map *em; + int ret; + + alloc_start = offset & ~mask; + alloc_end = (offset + len + mask) & ~mask; + + /* We only support the FALLOC_FL_KEEP_SIZE mode */ + if (mode & ~FALLOC_FL_KEEP_SIZE) + return -EOPNOTSUPP; + + /* + * wait for ordered IO before we have any locks. We'll loop again + * below with the locks held. + */ + btrfs_wait_ordered_range(inode, alloc_start, alloc_end - alloc_start); + + mutex_lock(&inode->i_mutex); + ret = inode_newsize_ok(inode, alloc_end); + if (ret) + goto out; + + if (alloc_start > inode->i_size) { + ret = btrfs_cont_expand(inode, alloc_start); + if (ret) + goto out; + } + + ret = btrfs_check_data_free_space(inode, alloc_end - alloc_start); + if (ret) + goto out; + + locked_end = alloc_end - 1; + while (1) { + struct btrfs_ordered_extent *ordered; + + /* the extent lock is ordered inside the running + * transaction + */ + lock_extent_bits(&BTRFS_I(inode)->io_tree, alloc_start, + locked_end, 0, &cached_state, GFP_NOFS); + ordered = btrfs_lookup_first_ordered_extent(inode, + alloc_end - 1); + if (ordered && + ordered->file_offset + ordered->len > alloc_start && + ordered->file_offset < alloc_end) { + btrfs_put_ordered_extent(ordered); + unlock_extent_cached(&BTRFS_I(inode)->io_tree, + alloc_start, locked_end, + &cached_state, GFP_NOFS); + /* + * we can't wait on the range with the transaction + * running or with the extent lock held + */ + btrfs_wait_ordered_range(inode, alloc_start, + alloc_end - alloc_start); + } else { + if (ordered) + btrfs_put_ordered_extent(ordered); + break; + } + } + + cur_offset = alloc_start; + while (1) { + em = btrfs_get_extent(inode, NULL, 0, cur_offset, + alloc_end - cur_offset, 0); + BUG_ON(IS_ERR(em) || !em); + last_byte = min(extent_map_end(em), alloc_end); + last_byte = (last_byte + mask) & ~mask; + if (em->block_start == EXTENT_MAP_HOLE || + (cur_offset >= inode->i_size && + !test_bit(EXTENT_FLAG_PREALLOC, &em->flags))) { + ret = btrfs_prealloc_file_range(inode, mode, cur_offset, + last_byte - cur_offset, + 1 << inode->i_blkbits, + offset + len, + &alloc_hint); + if (ret < 0) { + free_extent_map(em); + break; + } + } + free_extent_map(em); + + cur_offset = last_byte; + if (cur_offset >= alloc_end) { + ret = 0; + break; + } + } + unlock_extent_cached(&BTRFS_I(inode)->io_tree, alloc_start, locked_end, + &cached_state, GFP_NOFS); + + btrfs_free_reserved_data_space(inode, alloc_end - alloc_start); +out: + mutex_unlock(&inode->i_mutex); + return ret; +} + const struct file_operations btrfs_file_operations = { .llseek = generic_file_llseek, .read = do_sync_read, @@ -1248,6 +1373,7 @@ const struct file_operations btrfs_file_operations = { .open = generic_file_open, .release = btrfs_release_file, .fsync = btrfs_sync_file, + .fallocate = btrfs_fallocate, .unlocked_ioctl = btrfs_ioctl, #ifdef CONFIG_COMPAT .compat_ioctl = btrfs_ioctl, diff --git a/fs/btrfs/inode.c b/fs/btrfs/inode.c index a3798a3..160b55b 100644 --- a/fs/btrfs/inode.c +++ b/fs/btrfs/inode.c @@ -122,10 +122,10 @@ static noinline int insert_inline_extent(struct btrfs_trans_handle *trans, size_t cur_size = size; size_t datasize; unsigned long offset; - int use_compress = 0; + int compress_type = BTRFS_COMPRESS_NONE; if (compressed_size && compressed_pages) { - use_compress = 1; + compress_type = root->fs_info->compress_type; cur_size = compressed_size; } @@ -159,7 +159,7 @@ static noinline int insert_inline_extent(struct btrfs_trans_handle *trans, btrfs_set_file_extent_ram_bytes(leaf, ei, size); ptr = btrfs_file_extent_inline_start(ei); - if (use_compress) { + if (compress_type != BTRFS_COMPRESS_NONE) { struct page *cpage; int i = 0; while (compressed_size > 0) { @@ -176,7 +176,7 @@ static noinline int insert_inline_extent(struct btrfs_trans_handle *trans, compressed_size -= cur_size; } btrfs_set_file_extent_compression(leaf, ei, - BTRFS_COMPRESS_ZLIB); + compress_type); } else { page = find_get_page(inode->i_mapping, start >> PAGE_CACHE_SHIFT); @@ -263,6 +263,7 @@ struct async_extent { u64 compressed_size; struct page **pages; unsigned long nr_pages; + int compress_type; struct list_head list; }; @@ -280,7 +281,8 @@ static noinline int add_async_extent(struct async_cow *cow, u64 start, u64 ram_size, u64 compressed_size, struct page **pages, - unsigned long nr_pages) + unsigned long nr_pages, + int compress_type) { struct async_extent *async_extent; @@ -290,6 +292,7 @@ static noinline int add_async_extent(struct async_cow *cow, async_extent->compressed_size = compressed_size; async_extent->pages = pages; async_extent->nr_pages = nr_pages; + async_extent->compress_type = compress_type; list_add_tail(&async_extent->list, &cow->extents); return 0; } @@ -332,6 +335,7 @@ static noinline int compress_file_range(struct inode *inode, unsigned long max_uncompressed = 128 * 1024; int i; int will_compress; + int compress_type = root->fs_info->compress_type; actual_end = min_t(u64, isize, end + 1); again: @@ -381,12 +385,16 @@ again: WARN_ON(pages); pages = kzalloc(sizeof(struct page *) * nr_pages, GFP_NOFS); - ret = btrfs_zlib_compress_pages(inode->i_mapping, start, - total_compressed, pages, - nr_pages, &nr_pages_ret, - &total_in, - &total_compressed, - max_compressed); + if (BTRFS_I(inode)->force_compress) + compress_type = BTRFS_I(inode)->force_compress; + + ret = btrfs_compress_pages(compress_type, + inode->i_mapping, start, + total_compressed, pages, + nr_pages, &nr_pages_ret, + &total_in, + &total_compressed, + max_compressed); if (!ret) { unsigned long offset = total_compressed & @@ -493,7 +501,8 @@ again: * and will submit them to the elevator. */ add_async_extent(async_cow, start, num_bytes, - total_compressed, pages, nr_pages_ret); + total_compressed, pages, nr_pages_ret, + compress_type); if (start + num_bytes < end) { start += num_bytes; @@ -515,7 +524,8 @@ cleanup_and_bail_uncompressed: __set_page_dirty_nobuffers(locked_page); /* unlocked later on in the async handlers */ } - add_async_extent(async_cow, start, end - start + 1, 0, NULL, 0); + add_async_extent(async_cow, start, end - start + 1, + 0, NULL, 0, BTRFS_COMPRESS_NONE); *num_added += 1; } @@ -640,6 +650,7 @@ retry: em->block_start = ins.objectid; em->block_len = ins.offset; em->bdev = root->fs_info->fs_devices->latest_bdev; + em->compress_type = async_extent->compress_type; set_bit(EXTENT_FLAG_PINNED, &em->flags); set_bit(EXTENT_FLAG_COMPRESSED, &em->flags); @@ -656,11 +667,13 @@ retry: async_extent->ram_size - 1, 0); } - ret = btrfs_add_ordered_extent(inode, async_extent->start, - ins.objectid, - async_extent->ram_size, - ins.offset, - BTRFS_ORDERED_COMPRESSED); + ret = btrfs_add_ordered_extent_compress(inode, + async_extent->start, + ins.objectid, + async_extent->ram_size, + ins.offset, + BTRFS_ORDERED_COMPRESSED, + async_extent->compress_type); BUG_ON(ret); /* @@ -1670,7 +1683,7 @@ static int btrfs_finish_ordered_io(struct inode *inode, u64 start, u64 end) struct btrfs_ordered_extent *ordered_extent = NULL; struct extent_io_tree *io_tree = &BTRFS_I(inode)->io_tree; struct extent_state *cached_state = NULL; - int compressed = 0; + int compress_type = 0; int ret; bool nolock = false; @@ -1711,9 +1724,9 @@ static int btrfs_finish_ordered_io(struct inode *inode, u64 start, u64 end) trans->block_rsv = &root->fs_info->delalloc_block_rsv; if (test_bit(BTRFS_ORDERED_COMPRESSED, &ordered_extent->flags)) - compressed = 1; + compress_type = ordered_extent->compress_type; if (test_bit(BTRFS_ORDERED_PREALLOC, &ordered_extent->flags)) { - BUG_ON(compressed); + BUG_ON(compress_type); ret = btrfs_mark_extent_written(trans, inode, ordered_extent->file_offset, ordered_extent->file_offset + @@ -1727,7 +1740,7 @@ static int btrfs_finish_ordered_io(struct inode *inode, u64 start, u64 end) ordered_extent->disk_len, ordered_extent->len, ordered_extent->len, - compressed, 0, 0, + compress_type, 0, 0, BTRFS_FILE_EXTENT_REG); unpin_extent_cache(&BTRFS_I(inode)->extent_tree, ordered_extent->file_offset, @@ -1829,6 +1842,8 @@ static int btrfs_io_failed_hook(struct bio *failed_bio, if (test_bit(EXTENT_FLAG_COMPRESSED, &em->flags)) { logical = em->block_start; failrec->bio_flags = EXTENT_BIO_COMPRESSED; + extent_set_compress_type(&failrec->bio_flags, + em->compress_type); } failrec->logical = logical; free_extent_map(em); @@ -3671,8 +3686,12 @@ static int btrfs_setattr_size(struct inode *inode, struct iattr *attr) static int btrfs_setattr(struct dentry *dentry, struct iattr *attr) { struct inode *inode = dentry->d_inode; + struct btrfs_root *root = BTRFS_I(inode)->root; int err; + if (btrfs_root_readonly(root)) + return -EROFS; + err = inode_change_ok(inode, attr); if (err) return err; @@ -4928,8 +4947,10 @@ static noinline int uncompress_inline(struct btrfs_path *path, size_t max_size; unsigned long inline_size; unsigned long ptr; + int compress_type; WARN_ON(pg_offset != 0); + compress_type = btrfs_file_extent_compression(leaf, item); max_size = btrfs_file_extent_ram_bytes(leaf, item); inline_size = btrfs_file_extent_inline_item_len(leaf, btrfs_item_nr(leaf, path->slots[0])); @@ -4939,8 +4960,8 @@ static noinline int uncompress_inline(struct btrfs_path *path, read_extent_buffer(leaf, tmp, ptr, inline_size); max_size = min_t(unsigned long, PAGE_CACHE_SIZE, max_size); - ret = btrfs_zlib_decompress(tmp, page, extent_offset, - inline_size, max_size); + ret = btrfs_decompress(compress_type, tmp, page, + extent_offset, inline_size, max_size); if (ret) { char *kaddr = kmap_atomic(page, KM_USER0); unsigned long copy_size = min_t(u64, @@ -4982,7 +5003,7 @@ struct extent_map *btrfs_get_extent(struct inode *inode, struct page *page, struct extent_map_tree *em_tree = &BTRFS_I(inode)->extent_tree; struct extent_io_tree *io_tree = &BTRFS_I(inode)->io_tree; struct btrfs_trans_handle *trans = NULL; - int compressed; + int compress_type; again: read_lock(&em_tree->lock); @@ -5041,7 +5062,7 @@ again: found_type = btrfs_file_extent_type(leaf, item); extent_start = found_key.offset; - compressed = btrfs_file_extent_compression(leaf, item); + compress_type = btrfs_file_extent_compression(leaf, item); if (found_type == BTRFS_FILE_EXTENT_REG || found_type == BTRFS_FILE_EXTENT_PREALLOC) { extent_end = extent_start + @@ -5087,8 +5108,9 @@ again: em->block_start = EXTENT_MAP_HOLE; goto insert; } - if (compressed) { + if (compress_type != BTRFS_COMPRESS_NONE) { set_bit(EXTENT_FLAG_COMPRESSED, &em->flags); + em->compress_type = compress_type; em->block_start = bytenr; em->block_len = btrfs_file_extent_disk_num_bytes(leaf, item); @@ -5122,12 +5144,14 @@ again: em->len = (copy_size + root->sectorsize - 1) & ~((u64)root->sectorsize - 1); em->orig_start = EXTENT_MAP_INLINE; - if (compressed) + if (compress_type) { set_bit(EXTENT_FLAG_COMPRESSED, &em->flags); + em->compress_type = compress_type; + } ptr = btrfs_file_extent_inline_start(item) + extent_offset; if (create == 0 && !PageUptodate(page)) { - if (btrfs_file_extent_compression(leaf, item) == - BTRFS_COMPRESS_ZLIB) { + if (btrfs_file_extent_compression(leaf, item) != + BTRFS_COMPRESS_NONE) { ret = uncompress_inline(path, inode, page, pg_offset, extent_offset, item); @@ -6477,7 +6501,7 @@ struct inode *btrfs_alloc_inode(struct super_block *sb) ei->ordered_data_close = 0; ei->orphan_meta_reserved = 0; ei->dummy_inode = 0; - ei->force_compress = 0; + ei->force_compress = BTRFS_COMPRESS_NONE; inode = &ei->vfs_inode; extent_map_tree_init(&ei->extent_tree, GFP_NOFS); @@ -7098,116 +7122,6 @@ int btrfs_prealloc_file_range_trans(struct inode *inode, min_size, actual_len, alloc_hint, trans); } -static long btrfs_fallocate(struct inode *inode, int mode, - loff_t offset, loff_t len) -{ - struct extent_state *cached_state = NULL; - u64 cur_offset; - u64 last_byte; - u64 alloc_start; - u64 alloc_end; - u64 alloc_hint = 0; - u64 locked_end; - u64 mask = BTRFS_I(inode)->root->sectorsize - 1; - struct extent_map *em; - int ret; - - alloc_start = offset & ~mask; - alloc_end = (offset + len + mask) & ~mask; - - /* We only support the FALLOC_FL_KEEP_SIZE mode */ - if (mode && (mode != FALLOC_FL_KEEP_SIZE)) - return -EOPNOTSUPP; - - /* - * wait for ordered IO before we have any locks. We'll loop again - * below with the locks held. - */ - btrfs_wait_ordered_range(inode, alloc_start, alloc_end - alloc_start); - - mutex_lock(&inode->i_mutex); - ret = inode_newsize_ok(inode, alloc_end); - if (ret) - goto out; - - if (alloc_start > inode->i_size) { - ret = btrfs_cont_expand(inode, alloc_start); - if (ret) - goto out; - } - - ret = btrfs_check_data_free_space(inode, alloc_end - alloc_start); - if (ret) - goto out; - - locked_end = alloc_end - 1; - while (1) { - struct btrfs_ordered_extent *ordered; - - /* the extent lock is ordered inside the running - * transaction - */ - lock_extent_bits(&BTRFS_I(inode)->io_tree, alloc_start, - locked_end, 0, &cached_state, GFP_NOFS); - ordered = btrfs_lookup_first_ordered_extent(inode, - alloc_end - 1); - if (ordered && - ordered->file_offset + ordered->len > alloc_start && - ordered->file_offset < alloc_end) { - btrfs_put_ordered_extent(ordered); - unlock_extent_cached(&BTRFS_I(inode)->io_tree, - alloc_start, locked_end, - &cached_state, GFP_NOFS); - /* - * we can't wait on the range with the transaction - * running or with the extent lock held - */ - btrfs_wait_ordered_range(inode, alloc_start, - alloc_end - alloc_start); - } else { - if (ordered) - btrfs_put_ordered_extent(ordered); - break; - } - } - - cur_offset = alloc_start; - while (1) { - em = btrfs_get_extent(inode, NULL, 0, cur_offset, - alloc_end - cur_offset, 0); - BUG_ON(IS_ERR(em) || !em); - last_byte = min(extent_map_end(em), alloc_end); - last_byte = (last_byte + mask) & ~mask; - if (em->block_start == EXTENT_MAP_HOLE || - (cur_offset >= inode->i_size && - !test_bit(EXTENT_FLAG_PREALLOC, &em->flags))) { - ret = btrfs_prealloc_file_range(inode, mode, cur_offset, - last_byte - cur_offset, - 1 << inode->i_blkbits, - offset + len, - &alloc_hint); - if (ret < 0) { - free_extent_map(em); - break; - } - } - free_extent_map(em); - - cur_offset = last_byte; - if (cur_offset >= alloc_end) { - ret = 0; - break; - } - } - unlock_extent_cached(&BTRFS_I(inode)->io_tree, alloc_start, locked_end, - &cached_state, GFP_NOFS); - - btrfs_free_reserved_data_space(inode, alloc_end - alloc_start); -out: - mutex_unlock(&inode->i_mutex); - return ret; -} - static int btrfs_set_page_dirty(struct page *page) { return __set_page_dirty_nobuffers(page); @@ -7215,6 +7129,10 @@ static int btrfs_set_page_dirty(struct page *page) static int btrfs_permission(struct inode *inode, int mask, unsigned int flags) { + struct btrfs_root *root = BTRFS_I(inode)->root; + + if (btrfs_root_readonly(root) && (mask & MAY_WRITE)) + return -EROFS; if ((BTRFS_I(inode)->flags & BTRFS_INODE_READONLY) && (mask & MAY_WRITE)) return -EACCES; return generic_permission(inode, mask, flags, btrfs_check_acl); @@ -7310,7 +7228,6 @@ static const struct inode_operations btrfs_file_inode_operations = { .listxattr = btrfs_listxattr, .removexattr = btrfs_removexattr, .permission = btrfs_permission, - .fallocate = btrfs_fallocate, .fiemap = btrfs_fiemap, }; static const struct inode_operations btrfs_special_inode_operations = { diff --git a/fs/btrfs/ioctl.c b/fs/btrfs/ioctl.c index f87552a..a506a22 100644 --- a/fs/btrfs/ioctl.c +++ b/fs/btrfs/ioctl.c @@ -147,6 +147,9 @@ static int btrfs_ioctl_setflags(struct file *file, void __user *arg) unsigned int flags, oldflags; int ret; + if (btrfs_root_readonly(root)) + return -EROFS; + if (copy_from_user(&flags, arg, sizeof(flags))) return -EFAULT; @@ -360,7 +363,8 @@ fail: } static int create_snapshot(struct btrfs_root *root, struct dentry *dentry, - char *name, int namelen, u64 *async_transid) + char *name, int namelen, u64 *async_transid, + bool readonly) { struct inode *inode; struct dentry *parent; @@ -378,6 +382,7 @@ static int create_snapshot(struct btrfs_root *root, struct dentry *dentry, btrfs_init_block_rsv(&pending_snapshot->block_rsv); pending_snapshot->dentry = dentry; pending_snapshot->root = root; + pending_snapshot->readonly = readonly; trans = btrfs_start_transaction(root->fs_info->extent_root, 5); if (IS_ERR(trans)) { @@ -509,7 +514,7 @@ static inline int btrfs_may_create(struct inode *dir, struct dentry *child) static noinline int btrfs_mksubvol(struct path *parent, char *name, int namelen, struct btrfs_root *snap_src, - u64 *async_transid) + u64 *async_transid, bool readonly) { struct inode *dir = parent->dentry->d_inode; struct dentry *dentry; @@ -541,7 +546,7 @@ static noinline int btrfs_mksubvol(struct path *parent, if (snap_src) { error = create_snapshot(snap_src, dentry, - name, namelen, async_transid); + name, namelen, async_transid, readonly); } else { error = create_subvol(BTRFS_I(dir)->root, dentry, name, namelen, async_transid); @@ -638,9 +643,11 @@ static int btrfs_defrag_file(struct file *file, struct extent_io_tree *io_tree = &BTRFS_I(inode)->io_tree; struct btrfs_ordered_extent *ordered; struct page *page; + struct btrfs_super_block *disk_super; unsigned long last_index; unsigned long ra_pages = root->fs_info->bdi.ra_pages; unsigned long total_read = 0; + u64 features; u64 page_start; u64 page_end; u64 last_len = 0; @@ -648,6 +655,14 @@ static int btrfs_defrag_file(struct file *file, u64 defrag_end = 0; unsigned long i; int ret; + int compress_type = BTRFS_COMPRESS_ZLIB; + + if (range->flags & BTRFS_DEFRAG_RANGE_COMPRESS) { + if (range->compress_type > BTRFS_COMPRESS_TYPES) + return -EINVAL; + if (range->compress_type) + compress_type = range->compress_type; + } if (inode->i_size == 0) return 0; @@ -683,7 +698,7 @@ static int btrfs_defrag_file(struct file *file, total_read++; mutex_lock(&inode->i_mutex); if (range->flags & BTRFS_DEFRAG_RANGE_COMPRESS) - BTRFS_I(inode)->force_compress = 1; + BTRFS_I(inode)->force_compress = compress_type; ret = btrfs_delalloc_reserve_space(inode, PAGE_CACHE_SIZE); if (ret) @@ -781,10 +796,17 @@ loop_unlock: atomic_dec(&root->fs_info->async_submit_draining); mutex_lock(&inode->i_mutex); - BTRFS_I(inode)->force_compress = 0; + BTRFS_I(inode)->force_compress = BTRFS_COMPRESS_NONE; mutex_unlock(&inode->i_mutex); } + disk_super = &root->fs_info->super_copy; + features = btrfs_super_incompat_flags(disk_super); + if (range->compress_type == BTRFS_COMPRESS_LZO) { + features |= BTRFS_FEATURE_INCOMPAT_COMPRESS_LZO; + btrfs_set_super_incompat_flags(disk_super, features); + } + return 0; err_reservations: @@ -901,7 +923,8 @@ static noinline int btrfs_ioctl_snap_create_transid(struct file *file, char *name, unsigned long fd, int subvol, - u64 *transid) + u64 *transid, + bool readonly) { struct btrfs_root *root = BTRFS_I(fdentry(file)->d_inode)->root; struct file *src_file; @@ -919,7 +942,7 @@ static noinline int btrfs_ioctl_snap_create_transid(struct file *file, if (subvol) { ret = btrfs_mksubvol(&file->f_path, name, namelen, - NULL, transid); + NULL, transid, readonly); } else { struct inode *src_inode; src_file = fget(fd); @@ -938,7 +961,7 @@ static noinline int btrfs_ioctl_snap_create_transid(struct file *file, } ret = btrfs_mksubvol(&file->f_path, name, namelen, BTRFS_I(src_inode)->root, - transid); + transid, readonly); fput(src_file); } out: @@ -946,58 +969,139 @@ out: } static noinline int btrfs_ioctl_snap_create(struct file *file, - void __user *arg, int subvol, - int v2) + void __user *arg, int subvol) { - struct btrfs_ioctl_vol_args *vol_args = NULL; - struct btrfs_ioctl_vol_args_v2 *vol_args_v2 = NULL; - char *name; - u64 fd; + struct btrfs_ioctl_vol_args *vol_args; int ret; - if (v2) { - u64 transid = 0; - u64 *ptr = NULL; + vol_args = memdup_user(arg, sizeof(*vol_args)); + if (IS_ERR(vol_args)) + return PTR_ERR(vol_args); + vol_args->name[BTRFS_PATH_NAME_MAX] = '\0'; - vol_args_v2 = memdup_user(arg, sizeof(*vol_args_v2)); - if (IS_ERR(vol_args_v2)) - return PTR_ERR(vol_args_v2); + ret = btrfs_ioctl_snap_create_transid(file, vol_args->name, + vol_args->fd, subvol, + NULL, false); - if (vol_args_v2->flags & ~BTRFS_SUBVOL_CREATE_ASYNC) { - ret = -EINVAL; - goto out; - } - - name = vol_args_v2->name; - fd = vol_args_v2->fd; - vol_args_v2->name[BTRFS_SUBVOL_NAME_MAX] = '\0'; + kfree(vol_args); + return ret; +} - if (vol_args_v2->flags & BTRFS_SUBVOL_CREATE_ASYNC) - ptr = &transid; +static noinline int btrfs_ioctl_snap_create_v2(struct file *file, + void __user *arg, int subvol) +{ + struct btrfs_ioctl_vol_args_v2 *vol_args; + int ret; + u64 transid = 0; + u64 *ptr = NULL; + bool readonly = false; - ret = btrfs_ioctl_snap_create_transid(file, name, fd, - subvol, ptr); + vol_args = memdup_user(arg, sizeof(*vol_args)); + if (IS_ERR(vol_args)) + return PTR_ERR(vol_args); + vol_args->name[BTRFS_SUBVOL_NAME_MAX] = '\0'; - if (ret == 0 && ptr && - copy_to_user(arg + - offsetof(struct btrfs_ioctl_vol_args_v2, - transid), ptr, sizeof(*ptr))) - ret = -EFAULT; - } else { - vol_args = memdup_user(arg, sizeof(*vol_args)); - if (IS_ERR(vol_args)) - return PTR_ERR(vol_args); - name = vol_args->name; - fd = vol_args->fd; - vol_args->name[BTRFS_PATH_NAME_MAX] = '\0'; - - ret = btrfs_ioctl_snap_create_transid(file, name, fd, - subvol, NULL); + if (vol_args->flags & + ~(BTRFS_SUBVOL_CREATE_ASYNC | BTRFS_SUBVOL_RDONLY)) { + ret = -EOPNOTSUPP; + goto out; } + + if (vol_args->flags & BTRFS_SUBVOL_CREATE_ASYNC) + ptr = &transid; + if (vol_args->flags & BTRFS_SUBVOL_RDONLY) + readonly = true; + + ret = btrfs_ioctl_snap_create_transid(file, vol_args->name, + vol_args->fd, subvol, + ptr, readonly); + + if (ret == 0 && ptr && + copy_to_user(arg + + offsetof(struct btrfs_ioctl_vol_args_v2, + transid), ptr, sizeof(*ptr))) + ret = -EFAULT; out: kfree(vol_args); - kfree(vol_args_v2); + return ret; +} +static noinline int btrfs_ioctl_subvol_getflags(struct file *file, + void __user *arg) +{ + struct inode *inode = fdentry(file)->d_inode; + struct btrfs_root *root = BTRFS_I(inode)->root; + int ret = 0; + u64 flags = 0; + + if (inode->i_ino != BTRFS_FIRST_FREE_OBJECTID) + return -EINVAL; + + down_read(&root->fs_info->subvol_sem); + if (btrfs_root_readonly(root)) + flags |= BTRFS_SUBVOL_RDONLY; + up_read(&root->fs_info->subvol_sem); + + if (copy_to_user(arg, &flags, sizeof(flags))) + ret = -EFAULT; + + return ret; +} + +static noinline int btrfs_ioctl_subvol_setflags(struct file *file, + void __user *arg) +{ + struct inode *inode = fdentry(file)->d_inode; + struct btrfs_root *root = BTRFS_I(inode)->root; + struct btrfs_trans_handle *trans; + u64 root_flags; + u64 flags; + int ret = 0; + + if (root->fs_info->sb->s_flags & MS_RDONLY) + return -EROFS; + + if (inode->i_ino != BTRFS_FIRST_FREE_OBJECTID) + return -EINVAL; + + if (copy_from_user(&flags, arg, sizeof(flags))) + return -EFAULT; + + if (flags & ~BTRFS_SUBVOL_CREATE_ASYNC) + return -EINVAL; + + if (flags & ~BTRFS_SUBVOL_RDONLY) + return -EOPNOTSUPP; + + down_write(&root->fs_info->subvol_sem); + + /* nothing to do */ + if (!!(flags & BTRFS_SUBVOL_RDONLY) == btrfs_root_readonly(root)) + goto out; + + root_flags = btrfs_root_flags(&root->root_item); + if (flags & BTRFS_SUBVOL_RDONLY) + btrfs_set_root_flags(&root->root_item, + root_flags | BTRFS_ROOT_SUBVOL_RDONLY); + else + btrfs_set_root_flags(&root->root_item, + root_flags & ~BTRFS_ROOT_SUBVOL_RDONLY); + + trans = btrfs_start_transaction(root, 1); + if (IS_ERR(trans)) { + ret = PTR_ERR(trans); + goto out_reset; + } + + ret = btrfs_update_root(trans, root, + &root->root_key, &root->root_item); + + btrfs_commit_transaction(trans, root); +out_reset: + if (ret) + btrfs_set_root_flags(&root->root_item, root_flags); +out: + up_write(&root->fs_info->subvol_sem); return ret; } @@ -1509,6 +1613,9 @@ static int btrfs_ioctl_defrag(struct file *file, void __user *argp) struct btrfs_ioctl_defrag_range_args *range; int ret; + if (btrfs_root_readonly(root)) + return -EROFS; + ret = mnt_want_write(file->f_path.mnt); if (ret) return ret; @@ -1637,6 +1744,9 @@ static noinline long btrfs_ioctl_clone(struct file *file, unsigned long srcfd, if (!(file->f_mode & FMODE_WRITE) || (file->f_flags & O_APPEND)) return -EINVAL; + if (btrfs_root_readonly(root)) + return -EROFS; + ret = mnt_want_write(file->f_path.mnt); if (ret) return ret; @@ -1958,6 +2068,10 @@ static long btrfs_ioctl_trans_start(struct file *file) if (file->private_data) goto out; + ret = -EROFS; + if (btrfs_root_readonly(root)) + goto out; + ret = mnt_want_write(file->f_path.mnt); if (ret) goto out; @@ -2257,13 +2371,17 @@ long btrfs_ioctl(struct file *file, unsigned int case FS_IOC_GETVERSION: return btrfs_ioctl_getversion(file, argp); case BTRFS_IOC_SNAP_CREATE: - return btrfs_ioctl_snap_create(file, argp, 0, 0); + return btrfs_ioctl_snap_create(file, argp, 0); case BTRFS_IOC_SNAP_CREATE_V2: - return btrfs_ioctl_snap_create(file, argp, 0, 1); + return btrfs_ioctl_snap_create_v2(file, argp, 0); case BTRFS_IOC_SUBVOL_CREATE: - return btrfs_ioctl_snap_create(file, argp, 1, 0); + return btrfs_ioctl_snap_create(file, argp, 1); case BTRFS_IOC_SNAP_DESTROY: return btrfs_ioctl_snap_destroy(file, argp); + case BTRFS_IOC_SUBVOL_GETFLAGS: + return btrfs_ioctl_subvol_getflags(file, argp); + case BTRFS_IOC_SUBVOL_SETFLAGS: + return btrfs_ioctl_subvol_setflags(file, argp); case BTRFS_IOC_DEFAULT_SUBVOL: return btrfs_ioctl_default_subvol(file, argp); case BTRFS_IOC_DEFRAG: diff --git a/fs/btrfs/ioctl.h b/fs/btrfs/ioctl.h index c344d12..8fb3821 100644 --- a/fs/btrfs/ioctl.h +++ b/fs/btrfs/ioctl.h @@ -31,6 +31,7 @@ struct btrfs_ioctl_vol_args { }; #define BTRFS_SUBVOL_CREATE_ASYNC (1ULL << 0) +#define BTRFS_SUBVOL_RDONLY (1ULL << 1) #define BTRFS_SUBVOL_NAME_MAX 4039 struct btrfs_ioctl_vol_args_v2 { @@ -133,8 +134,15 @@ struct btrfs_ioctl_defrag_range_args { */ __u32 extent_thresh; + /* + * which compression method to use if turning on compression + * for this defrag operation. If unspecified, zlib will + * be used + */ + __u32 compress_type; + /* spare for later */ - __u32 unused[5]; + __u32 unused[4]; }; struct btrfs_ioctl_space_info { @@ -193,4 +201,6 @@ struct btrfs_ioctl_space_args { #define BTRFS_IOC_WAIT_SYNC _IOW(BTRFS_IOCTL_MAGIC, 22, __u64) #define BTRFS_IOC_SNAP_CREATE_V2 _IOW(BTRFS_IOCTL_MAGIC, 23, \ struct btrfs_ioctl_vol_args_v2) +#define BTRFS_IOC_SUBVOL_GETFLAGS _IOW(BTRFS_IOCTL_MAGIC, 25, __u64) +#define BTRFS_IOC_SUBVOL_SETFLAGS _IOW(BTRFS_IOCTL_MAGIC, 26, __u64) #endif diff --git a/fs/btrfs/lzo.c b/fs/btrfs/lzo.c new file mode 100644 index 0000000..cc9b450 --- /dev/null +++ b/fs/btrfs/lzo.c @@ -0,0 +1,420 @@ +/* + * Copyright (C) 2008 Oracle. All rights reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public + * License v2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public + * License along with this program; if not, write to the + * Free Software Foundation, Inc., 59 Temple Place - Suite 330, + * Boston, MA 021110-1307, USA. + */ + +#include <linux/kernel.h> +#include <linux/slab.h> +#include <linux/vmalloc.h> +#include <linux/init.h> +#include <linux/err.h> +#include <linux/sched.h> +#include <linux/pagemap.h> +#include <linux/bio.h> +#include <linux/lzo.h> +#include "compression.h" + +#define LZO_LEN 4 + +struct workspace { + void *mem; + void *buf; /* where compressed data goes */ + void *cbuf; /* where decompressed data goes */ + struct list_head list; +}; + +static void lzo_free_workspace(struct list_head *ws) +{ + struct workspace *workspace = list_entry(ws, struct workspace, list); + + vfree(workspace->buf); + vfree(workspace->cbuf); + vfree(workspace->mem); + kfree(workspace); +} + +static struct list_head *lzo_alloc_workspace(void) +{ + struct workspace *workspace; + + workspace = kzalloc(sizeof(*workspace), GFP_NOFS); + if (!workspace) + return ERR_PTR(-ENOMEM); + + workspace->mem = vmalloc(LZO1X_MEM_COMPRESS); + workspace->buf = vmalloc(lzo1x_worst_compress(PAGE_CACHE_SIZE)); + workspace->cbuf = vmalloc(lzo1x_worst_compress(PAGE_CACHE_SIZE)); + if (!workspace->mem || !workspace->buf || !workspace->cbuf) + goto fail; + + INIT_LIST_HEAD(&workspace->list); + + return &workspace->list; +fail: + lzo_free_workspace(&workspace->list); + return ERR_PTR(-ENOMEM); +} + +static inline void write_compress_length(char *buf, size_t len) +{ + __le32 dlen; + + dlen = cpu_to_le32(len); + memcpy(buf, &dlen, LZO_LEN); +} + +static inline size_t read_compress_length(char *buf) +{ + __le32 dlen; + + memcpy(&dlen, buf, LZO_LEN); + return le32_to_cpu(dlen); +} + +static int lzo_compress_pages(struct list_head *ws, + struct address_space *mapping, + u64 start, unsigned long len, + struct page **pages, + unsigned long nr_dest_pages, + unsigned long *out_pages, + unsigned long *total_in, + unsigned long *total_out, + unsigned long max_out) +{ + struct workspace *workspace = list_entry(ws, struct workspace, list); + int ret = 0; + char *data_in; + char *cpage_out; + int nr_pages = 0; + struct page *in_page = NULL; + struct page *out_page = NULL; + unsigned long bytes_left; + + size_t in_len; + size_t out_len; + char *buf; + unsigned long tot_in = 0; + unsigned long tot_out = 0; + unsigned long pg_bytes_left; + unsigned long out_offset; + unsigned long bytes; + + *out_pages = 0; + *total_out = 0; + *total_in = 0; + + in_page = find_get_page(mapping, start >> PAGE_CACHE_SHIFT); + data_in = kmap(in_page); + + /* + * store the size of all chunks of compressed data in + * the first 4 bytes + */ + out_page = alloc_page(GFP_NOFS | __GFP_HIGHMEM); + if (out_page == NULL) { + ret = -ENOMEM; + goto out; + } + cpage_out = kmap(out_page); + out_offset = LZO_LEN; + tot_out = LZO_LEN; + pages[0] = out_page; + nr_pages = 1; + pg_bytes_left = PAGE_CACHE_SIZE - LZO_LEN; + + /* compress at most one page of data each time */ + in_len = min(len, PAGE_CACHE_SIZE); + while (tot_in < len) { + ret = lzo1x_1_compress(data_in, in_len, workspace->cbuf, + &out_len, workspace->mem); + if (ret != LZO_E_OK) { + printk(KERN_DEBUG "btrfs deflate in loop returned %d\n", + ret); + ret = -1; + goto out; + } + + /* store the size of this chunk of compressed data */ + write_compress_length(cpage_out + out_offset, out_len); + tot_out += LZO_LEN; + out_offset += LZO_LEN; + pg_bytes_left -= LZO_LEN; + + tot_in += in_len; + tot_out += out_len; + + /* copy bytes from the working buffer into the pages */ + buf = workspace->cbuf; + while (out_len) { + bytes = min_t(unsigned long, pg_bytes_left, out_len); + + memcpy(cpage_out + out_offset, buf, bytes); + + out_len -= bytes; + pg_bytes_left -= bytes; + buf += bytes; + out_offset += bytes; + + /* + * we need another page for writing out. + * + * Note if there's less than 4 bytes left, we just + * skip to a new page. + */ + if ((out_len == 0 && pg_bytes_left < LZO_LEN) || + pg_bytes_left == 0) { + if (pg_bytes_left) { + memset(cpage_out + out_offset, 0, + pg_bytes_left); + tot_out += pg_bytes_left; + } + + /* we're done, don't allocate new page */ + if (out_len == 0 && tot_in >= len) + break; + + kunmap(out_page); + if (nr_pages == nr_dest_pages) { + out_page = NULL; + ret = -1; + goto out; + } + + out_page = alloc_page(GFP_NOFS | __GFP_HIGHMEM); + if (out_page == NULL) { + ret = -ENOMEM; + goto out; + } + cpage_out = kmap(out_page); + pages[nr_pages++] = out_page; + + pg_bytes_left = PAGE_CACHE_SIZE; + out_offset = 0; + } + } + + /* we're making it bigger, give up */ + if (tot_in > 8192 && tot_in < tot_out) + goto out; + + /* we're all done */ + if (tot_in >= len) + break; + + if (tot_out > max_out) + break; + + bytes_left = len - tot_in; + kunmap(in_page); + page_cache_release(in_page); + + start += PAGE_CACHE_SIZE; + in_page = find_get_page(mapping, start >> PAGE_CACHE_SHIFT); + data_in = kmap(in_page); + in_len = min(bytes_left, PAGE_CACHE_SIZE); + } + + if (tot_out > tot_in) + goto out; + + /* store the size of all chunks of compressed data */ + cpage_out = kmap(pages[0]); + write_compress_length(cpage_out, tot_out); + + kunmap(pages[0]); + + ret = 0; + *total_out = tot_out; + *total_in = tot_in; +out: + *out_pages = nr_pages; + if (out_page) + kunmap(out_page); + + if (in_page) { + kunmap(in_page); + page_cache_release(in_page); + } + + return ret; +} + +static int lzo_decompress_biovec(struct list_head *ws, + struct page **pages_in, + u64 disk_start, + struct bio_vec *bvec, + int vcnt, + size_t srclen) +{ + struct workspace *workspace = list_entry(ws, struct workspace, list); + int ret = 0, ret2; + char *data_in; + unsigned long page_in_index = 0; + unsigned long page_out_index = 0; + unsigned long total_pages_in = (srclen + PAGE_CACHE_SIZE - 1) / + PAGE_CACHE_SIZE; + unsigned long buf_start; + unsigned long buf_offset = 0; + unsigned long bytes; + unsigned long working_bytes; + unsigned long pg_offset; + + size_t in_len; + size_t out_len; + unsigned long in_offset; + unsigned long in_page_bytes_left; + unsigned long tot_in; + unsigned long tot_out; + unsigned long tot_len; + char *buf; + + data_in = kmap(pages_in[0]); + tot_len = read_compress_length(data_in); + + tot_in = LZO_LEN; + in_offset = LZO_LEN; + tot_len = min_t(size_t, srclen, tot_len); + in_page_bytes_left = PAGE_CACHE_SIZE - LZO_LEN; + + tot_out = 0; + pg_offset = 0; + + while (tot_in < tot_len) { + in_len = read_compress_length(data_in + in_offset); + in_page_bytes_left -= LZO_LEN; + in_offset += LZO_LEN; + tot_in += LZO_LEN; + + tot_in += in_len; + working_bytes = in_len; + + /* fast path: avoid using the working buffer */ + if (in_page_bytes_left >= in_len) { + buf = data_in + in_offset; + bytes = in_len; + goto cont; + } + + /* copy bytes from the pages into the working buffer */ + buf = workspace->cbuf; + buf_offset = 0; + while (working_bytes) { + bytes = min(working_bytes, in_page_bytes_left); + + memcpy(buf + buf_offset, data_in + in_offset, bytes); + buf_offset += bytes; +cont: + working_bytes -= bytes; + in_page_bytes_left -= bytes; + in_offset += bytes; + + /* check if we need to pick another page */ + if ((working_bytes == 0 && in_page_bytes_left < LZO_LEN) + || in_page_bytes_left == 0) { + tot_in += in_page_bytes_left; + + if (working_bytes == 0 && tot_in >= tot_len) + break; + + kunmap(pages_in[page_in_index]); + page_in_index++; + if (page_in_index >= total_pages_in) { + ret = -1; + data_in = NULL; + goto done; + } + data_in = kmap(pages_in[page_in_index]); + + in_page_bytes_left = PAGE_CACHE_SIZE; + in_offset = 0; + } + } + + out_len = lzo1x_worst_compress(PAGE_CACHE_SIZE); + ret = lzo1x_decompress_safe(buf, in_len, workspace->buf, + &out_len); + if (ret != LZO_E_OK) { + printk(KERN_WARNING "btrfs decompress failed\n"); + ret = -1; + break; + } + + buf_start = tot_out; + tot_out += out_len; + + ret2 = btrfs_decompress_buf2page(workspace->buf, buf_start, + tot_out, disk_start, + bvec, vcnt, + &page_out_index, &pg_offset); + if (ret2 == 0) + break; + } +done: + if (data_in) + kunmap(pages_in[page_in_index]); + return ret; +} + +static int lzo_decompress(struct list_head *ws, unsigned char *data_in, + struct page *dest_page, + unsigned long start_byte, + size_t srclen, size_t destlen) +{ + struct workspace *workspace = list_entry(ws, struct workspace, list); + size_t in_len; + size_t out_len; + size_t tot_len; + int ret = 0; + char *kaddr; + unsigned long bytes; + + BUG_ON(srclen < LZO_LEN); + + tot_len = read_compress_length(data_in); + data_in += LZO_LEN; + + in_len = read_compress_length(data_in); + data_in += LZO_LEN; + + out_len = PAGE_CACHE_SIZE; + ret = lzo1x_decompress_safe(data_in, in_len, workspace->buf, &out_len); + if (ret != LZO_E_OK) { + printk(KERN_WARNING "btrfs decompress failed!\n"); + ret = -1; + goto out; + } + + if (out_len < start_byte) { + ret = -1; + goto out; + } + + bytes = min_t(unsigned long, destlen, out_len - start_byte); + + kaddr = kmap_atomic(dest_page, KM_USER0); + memcpy(kaddr, workspace->buf + start_byte, bytes); + kunmap_atomic(kaddr, KM_USER0); +out: + return ret; +} + +struct btrfs_compress_op btrfs_lzo_compress = { + .alloc_workspace = lzo_alloc_workspace, + .free_workspace = lzo_free_workspace, + .compress_pages = lzo_compress_pages, + .decompress_biovec = lzo_decompress_biovec, + .decompress = lzo_decompress, +}; diff --git a/fs/btrfs/ordered-data.c b/fs/btrfs/ordered-data.c index ae7737e..2b61e1d 100644 --- a/fs/btrfs/ordered-data.c +++ b/fs/btrfs/ordered-data.c @@ -172,7 +172,7 @@ static inline struct rb_node *tree_search(struct btrfs_ordered_inode_tree *tree, */ static int __btrfs_add_ordered_extent(struct inode *inode, u64 file_offset, u64 start, u64 len, u64 disk_len, - int type, int dio) + int type, int dio, int compress_type) { struct btrfs_ordered_inode_tree *tree; struct rb_node *node; @@ -189,6 +189,7 @@ static int __btrfs_add_ordered_extent(struct inode *inode, u64 file_offset, entry->disk_len = disk_len; entry->bytes_left = len; entry->inode = inode; + entry->compress_type = compress_type; if (type != BTRFS_ORDERED_IO_DONE && type != BTRFS_ORDERED_COMPLETE) set_bit(type, &entry->flags); @@ -220,14 +221,25 @@ int btrfs_add_ordered_extent(struct inode *inode, u64 file_offset, u64 start, u64 len, u64 disk_len, int type) { return __btrfs_add_ordered_extent(inode, file_offset, start, len, - disk_len, type, 0); + disk_len, type, 0, + BTRFS_COMPRESS_NONE); } int btrfs_add_ordered_extent_dio(struct inode *inode, u64 file_offset, u64 start, u64 len, u64 disk_len, int type) { return __btrfs_add_ordered_extent(inode, file_offset, start, len, - disk_len, type, 1); + disk_len, type, 1, + BTRFS_COMPRESS_NONE); +} + +int btrfs_add_ordered_extent_compress(struct inode *inode, u64 file_offset, + u64 start, u64 len, u64 disk_len, + int type, int compress_type) +{ + return __btrfs_add_ordered_extent(inode, file_offset, start, len, + disk_len, type, 0, + compress_type); } /* diff --git a/fs/btrfs/ordered-data.h b/fs/btrfs/ordered-data.h index 61dca83..ff1f69a 100644 --- a/fs/btrfs/ordered-data.h +++ b/fs/btrfs/ordered-data.h @@ -68,7 +68,7 @@ struct btrfs_ordered_sum { #define BTRFS_ORDERED_NOCOW 2 /* set when we want to write in place */ -#define BTRFS_ORDERED_COMPRESSED 3 /* writing a compressed extent */ +#define BTRFS_ORDERED_COMPRESSED 3 /* writing a zlib compressed extent */ #define BTRFS_ORDERED_PREALLOC 4 /* set when writing to prealloced extent */ @@ -93,6 +93,9 @@ struct btrfs_ordered_extent { /* flags (described above) */ unsigned long flags; + /* compression algorithm */ + int compress_type; + /* reference count */ atomic_t refs; @@ -148,6 +151,9 @@ int btrfs_add_ordered_extent(struct inode *inode, u64 file_offset, u64 start, u64 len, u64 disk_len, int type); int btrfs_add_ordered_extent_dio(struct inode *inode, u64 file_offset, u64 start, u64 len, u64 disk_len, int type); +int btrfs_add_ordered_extent_compress(struct inode *inode, u64 file_offset, + u64 start, u64 len, u64 disk_len, + int type, int compress_type); int btrfs_add_ordered_sum(struct inode *inode, struct btrfs_ordered_extent *entry, struct btrfs_ordered_sum *sum); diff --git a/fs/btrfs/super.c b/fs/btrfs/super.c index 22acdaa..b2130c4 100644 --- a/fs/btrfs/super.c +++ b/fs/btrfs/super.c @@ -54,6 +54,90 @@ static const struct super_operations btrfs_super_ops; +static const char *btrfs_decode_error(struct btrfs_fs_info *fs_info, int errno, + char nbuf[16]) +{ + char *errstr = NULL; + + switch (errno) { + case -EIO: + errstr = "IO failure"; + break; + case -ENOMEM: + errstr = "Out of memory"; + break; + case -EROFS: + errstr = "Readonly filesystem"; + break; + default: + if (nbuf) { + if (snprintf(nbuf, 16, "error %d", -errno) >= 0) + errstr = nbuf; + } + break; + } + + return errstr; +} + +static void __save_error_info(struct btrfs_fs_info *fs_info) +{ + /* + * today we only save the error info into ram. Long term we'll + * also send it down to the disk + */ + fs_info->fs_state = BTRFS_SUPER_FLAG_ERROR; +} + +/* NOTE: + * We move write_super stuff at umount in order to avoid deadlock + * for umount hold all lock. + */ +static void save_error_info(struct btrfs_fs_info *fs_info) +{ + __save_error_info(fs_info); +} + +/* btrfs handle error by forcing the filesystem readonly */ +static void btrfs_handle_error(struct btrfs_fs_info *fs_info) +{ + struct super_block *sb = fs_info->sb; + + if (sb->s_flags & MS_RDONLY) + return; + + if (fs_info->fs_state & BTRFS_SUPER_FLAG_ERROR) { + sb->s_flags |= MS_RDONLY; + printk(KERN_INFO "btrfs is forced readonly\n"); + } +} + +/* + * __btrfs_std_error decodes expected errors from the caller and + * invokes the approciate error response. + */ +void __btrfs_std_error(struct btrfs_fs_info *fs_info, const char *function, + unsigned int line, int errno) +{ + struct super_block *sb = fs_info->sb; + char nbuf[16]; + const char *errstr; + + /* + * Special case: if the error is EROFS, and we're already + * under MS_RDONLY, then it is safe here. + */ + if (errno == -EROFS && (sb->s_flags & MS_RDONLY)) + return; + + errstr = btrfs_decode_error(fs_info, errno, nbuf); + printk(KERN_CRIT "BTRFS error (device %s) in %s:%d: %s\n", + sb->s_id, function, line, errstr); + save_error_info(fs_info); + + btrfs_handle_error(fs_info); +} + static void btrfs_put_super(struct super_block *sb) { struct btrfs_root *root = btrfs_sb(sb); @@ -69,9 +153,9 @@ enum { Opt_degraded, Opt_subvol, Opt_subvolid, Opt_device, Opt_nodatasum, Opt_nodatacow, Opt_max_inline, Opt_alloc_start, Opt_nobarrier, Opt_ssd, Opt_nossd, Opt_ssd_spread, Opt_thread_pool, Opt_noacl, Opt_compress, - Opt_compress_force, Opt_notreelog, Opt_ratio, Opt_flushoncommit, - Opt_discard, Opt_space_cache, Opt_clear_cache, Opt_err, - Opt_user_subvol_rm_allowed, + Opt_compress_type, Opt_compress_force, Opt_compress_force_type, + Opt_notreelog, Opt_ratio, Opt_flushoncommit, Opt_discard, + Opt_space_cache, Opt_clear_cache, Opt_user_subvol_rm_allowed, Opt_err, }; static match_table_t tokens = { @@ -86,7 +170,9 @@ static match_table_t tokens = { {Opt_alloc_start, "alloc_start=%s"}, {Opt_thread_pool, "thread_pool=%d"}, {Opt_compress, "compress"}, + {Opt_compress_type, "compress=%s"}, {Opt_compress_force, "compress-force"}, + {Opt_compress_force_type, "compress-force=%s"}, {Opt_ssd, "ssd"}, {Opt_ssd_spread, "ssd_spread"}, {Opt_nossd, "nossd"}, @@ -112,6 +198,8 @@ int btrfs_parse_options(struct btrfs_root *root, char *options) char *p, *num, *orig; int intarg; int ret = 0; + char *compress_type; + bool compress_force = false; if (!options) return 0; @@ -154,14 +242,32 @@ int btrfs_parse_options(struct btrfs_root *root, char *options) btrfs_set_opt(info->mount_opt, NODATACOW); btrfs_set_opt(info->mount_opt, NODATASUM); break; - case Opt_compress: - printk(KERN_INFO "btrfs: use compression\n"); - btrfs_set_opt(info->mount_opt, COMPRESS); - break; case Opt_compress_force: - printk(KERN_INFO "btrfs: forcing compression\n"); - btrfs_set_opt(info->mount_opt, FORCE_COMPRESS); + case Opt_compress_force_type: + compress_force = true; + case Opt_compress: + case Opt_compress_type: + if (token == Opt_compress || + token == Opt_compress_force || + strcmp(args[0].from, "zlib") == 0) { + compress_type = "zlib"; + info->compress_type = BTRFS_COMPRESS_ZLIB; + } else if (strcmp(args[0].from, "lzo") == 0) { + compress_type = "lzo"; + info->compress_type = BTRFS_COMPRESS_LZO; + } else { + ret = -EINVAL; + goto out; + } + btrfs_set_opt(info->mount_opt, COMPRESS); + if (compress_force) { + btrfs_set_opt(info->mount_opt, FORCE_COMPRESS); + pr_info("btrfs: force %s compression\n", + compress_type); + } else + pr_info("btrfs: use %s compression\n", + compress_type); break; case Opt_ssd: printk(KERN_INFO "btrfs: use ssd allocation scheme\n"); @@ -753,6 +859,127 @@ static int btrfs_remount(struct super_block *sb, int *flags, char *data) return 0; } +/* + * The helper to calc the free space on the devices that can be used to store + * file data. + */ +static int btrfs_calc_avail_data_space(struct btrfs_root *root, u64 *free_bytes) +{ + struct btrfs_fs_info *fs_info = root->fs_info; + struct btrfs_device_info *devices_info; + struct btrfs_fs_devices *fs_devices = fs_info->fs_devices; + struct btrfs_device *device; + u64 skip_space; + u64 type; + u64 avail_space; + u64 used_space; + u64 min_stripe_size; + int min_stripes = 1; + int i = 0, nr_devices; + int ret; + + nr_devices = fs_info->fs_devices->rw_devices; + BUG_ON(!nr_devices); + + devices_info = kmalloc(sizeof(*devices_info) * nr_devices, + GFP_NOFS); + if (!devices_info) + return -ENOMEM; + + /* calc min stripe number for data space alloction */ + type = btrfs_get_alloc_profile(root, 1); + if (type & BTRFS_BLOCK_GROUP_RAID0) + min_stripes = 2; + else if (type & BTRFS_BLOCK_GROUP_RAID1) + min_stripes = 2; + else if (type & BTRFS_BLOCK_GROUP_RAID10) + min_stripes = 4; + + if (type & BTRFS_BLOCK_GROUP_DUP) + min_stripe_size = 2 * BTRFS_STRIPE_LEN; + else + min_stripe_size = BTRFS_STRIPE_LEN; + + list_for_each_entry(device, &fs_devices->alloc_list, dev_alloc_list) { + if (!device->in_fs_metadata) + continue; + + avail_space = device->total_bytes - device->bytes_used; + + /* align with stripe_len */ + do_div(avail_space, BTRFS_STRIPE_LEN); + avail_space *= BTRFS_STRIPE_LEN; + + /* + * In order to avoid overwritting the superblock on the drive, + * btrfs starts at an offset of at least 1MB when doing chunk + * allocation. + */ + skip_space = 1024 * 1024; + + /* user can set the offset in fs_info->alloc_start. */ + if (fs_info->alloc_start + BTRFS_STRIPE_LEN <= + device->total_bytes) + skip_space = max(fs_info->alloc_start, skip_space); + + /* + * btrfs can not use the free space in [0, skip_space - 1], + * we must subtract it from the total. In order to implement + * it, we account the used space in this range first. + */ + ret = btrfs_account_dev_extents_size(device, 0, skip_space - 1, + &used_space); + if (ret) { + kfree(devices_info); + return ret; + } + + /* calc the free space in [0, skip_space - 1] */ + skip_space -= used_space; + + /* + * we can use the free space in [0, skip_space - 1], subtract + * it from the total. + */ + if (avail_space && avail_space >= skip_space) + avail_space -= skip_space; + else + avail_space = 0; + + if (avail_space < min_stripe_size) + continue; + + devices_info[i].dev = device; + devices_info[i].max_avail = avail_space; + + i++; + } + + nr_devices = i; + + btrfs_descending_sort_devices(devices_info, nr_devices); + + i = nr_devices - 1; + avail_space = 0; + while (nr_devices >= min_stripes) { + if (devices_info[i].max_avail >= min_stripe_size) { + int j; + u64 alloc_size; + + avail_space += devices_info[i].max_avail * min_stripes; + alloc_size = devices_info[i].max_avail; + for (j = i + 1 - min_stripes; j <= i; j++) + devices_info[j].max_avail -= alloc_size; + } + i--; + nr_devices--; + } + + kfree(devices_info); + *free_bytes = avail_space; + return 0; +} + static int btrfs_statfs(struct dentry *dentry, struct kstatfs *buf) { struct btrfs_root *root = btrfs_sb(dentry->d_sb); @@ -760,17 +987,21 @@ static int btrfs_statfs(struct dentry *dentry, struct kstatfs *buf) struct list_head *head = &root->fs_info->space_info; struct btrfs_space_info *found; u64 total_used = 0; - u64 total_used_data = 0; + u64 total_free_data = 0; int bits = dentry->d_sb->s_blocksize_bits; __be32 *fsid = (__be32 *)root->fs_info->fsid; + int ret; + /* holding chunk_muext to avoid allocating new chunks */ + mutex_lock(&root->fs_info->chunk_mutex); rcu_read_lock(); list_for_each_entry_rcu(found, head, list) { - if (found->flags & (BTRFS_BLOCK_GROUP_METADATA | - BTRFS_BLOCK_GROUP_SYSTEM)) - total_used_data += found->disk_total; - else - total_used_data += found->disk_used; + if (found->flags & BTRFS_BLOCK_GROUP_DATA) { + total_free_data += found->disk_total - found->disk_used; + total_free_data -= + btrfs_account_ro_block_groups_free_space(found); + } + total_used += found->disk_used; } rcu_read_unlock(); @@ -778,9 +1009,17 @@ static int btrfs_statfs(struct dentry *dentry, struct kstatfs *buf) buf->f_namelen = BTRFS_NAME_LEN; buf->f_blocks = btrfs_super_total_bytes(disk_super) >> bits; buf->f_bfree = buf->f_blocks - (total_used >> bits); - buf->f_bavail = buf->f_blocks - (total_used_data >> bits); buf->f_bsize = dentry->d_sb->s_blocksize; buf->f_type = BTRFS_SUPER_MAGIC; + buf->f_bavail = total_free_data; + ret = btrfs_calc_avail_data_space(root, &total_free_data); + if (ret) { + mutex_unlock(&root->fs_info->chunk_mutex); + return ret; + } + buf->f_bavail += total_free_data; + buf->f_bavail = buf->f_bavail >> bits; + mutex_unlock(&root->fs_info->chunk_mutex); /* We treat it as constant endianness (it doesn't matter _which_) because we want the fsid to come out the same whether mounted @@ -897,10 +1136,14 @@ static int __init init_btrfs_fs(void) if (err) return err; - err = btrfs_init_cachep(); + err = btrfs_init_compress(); if (err) goto free_sysfs; + err = btrfs_init_cachep(); + if (err) + goto free_compress; + err = extent_io_init(); if (err) goto free_cachep; @@ -928,6 +1171,8 @@ free_extent_io: extent_io_exit(); free_cachep: btrfs_destroy_cachep(); +free_compress: + btrfs_exit_compress(); free_sysfs: btrfs_exit_sysfs(); return err; @@ -942,7 +1187,7 @@ static void __exit exit_btrfs_fs(void) unregister_filesystem(&btrfs_fs_type); btrfs_exit_sysfs(); btrfs_cleanup_fs_uuids(); - btrfs_zlib_exit(); + btrfs_exit_compress(); } module_init(init_btrfs_fs) diff --git a/fs/btrfs/transaction.c b/fs/btrfs/transaction.c index f50e931..bae5c7b 100644 --- a/fs/btrfs/transaction.c +++ b/fs/btrfs/transaction.c @@ -181,6 +181,9 @@ static struct btrfs_trans_handle *start_transaction(struct btrfs_root *root, struct btrfs_trans_handle *h; struct btrfs_transaction *cur_trans; int ret; + + if (root->fs_info->fs_state & BTRFS_SUPER_FLAG_ERROR) + return ERR_PTR(-EROFS); again: h = kmem_cache_alloc(btrfs_trans_handle_cachep, GFP_NOFS); if (!h) @@ -910,6 +913,7 @@ static noinline int create_pending_snapshot(struct btrfs_trans_handle *trans, u64 to_reserve = 0; u64 index = 0; u64 objectid; + u64 root_flags; new_root_item = kmalloc(sizeof(*new_root_item), GFP_NOFS); if (!new_root_item) { @@ -967,6 +971,13 @@ static noinline int create_pending_snapshot(struct btrfs_trans_handle *trans, btrfs_set_root_last_snapshot(&root->root_item, trans->transid); memcpy(new_root_item, &root->root_item, sizeof(*new_root_item)); + root_flags = btrfs_root_flags(new_root_item); + if (pending->readonly) + root_flags |= BTRFS_ROOT_SUBVOL_RDONLY; + else + root_flags &= ~BTRFS_ROOT_SUBVOL_RDONLY; + btrfs_set_root_flags(new_root_item, root_flags); + old = btrfs_lock_root_node(root); btrfs_cow_block(trans, root, old, NULL, 0, &old); btrfs_set_lock_blocking(old); diff --git a/fs/btrfs/transaction.h b/fs/btrfs/transaction.h index f104b57..229a594 100644 --- a/fs/btrfs/transaction.h +++ b/fs/btrfs/transaction.h @@ -62,6 +62,7 @@ struct btrfs_pending_snapshot { struct btrfs_block_rsv block_rsv; /* extra metadata reseration for relocation */ int error; + bool readonly; struct list_head list; }; diff --git a/fs/btrfs/volumes.c b/fs/btrfs/volumes.c index 1718e1a..d158530 100644 --- a/fs/btrfs/volumes.c +++ b/fs/btrfs/volumes.c @@ -22,6 +22,7 @@ #include <linux/blkdev.h> #include <linux/random.h> #include <linux/iocontext.h> +#include <linux/capability.h> #include <asm/div64.h> #include "compat.h" #include "ctree.h" @@ -600,8 +601,10 @@ static int __btrfs_open_devices(struct btrfs_fs_devices *fs_devices, set_blocksize(bdev, 4096); bh = btrfs_read_dev_super(bdev); - if (!bh) + if (!bh) { + ret = -EINVAL; goto error_close; + } disk_super = (struct btrfs_super_block *)bh->b_data; devid = btrfs_stack_device_id(&disk_super->dev_item); @@ -703,7 +706,7 @@ int btrfs_scan_one_device(const char *path, fmode_t flags, void *holder, goto error_close; bh = btrfs_read_dev_super(bdev); if (!bh) { - ret = -EIO; + ret = -EINVAL; goto error_close; } disk_super = (struct btrfs_super_block *)bh->b_data; @@ -729,59 +732,167 @@ error: return ret; } +/* helper to account the used device space in the range */ +int btrfs_account_dev_extents_size(struct btrfs_device *device, u64 start, + u64 end, u64 *length) +{ + struct btrfs_key key; + struct btrfs_root *root = device->dev_root; + struct btrfs_dev_extent *dev_extent; + struct btrfs_path *path; + u64 extent_end; + int ret; + int slot; + struct extent_buffer *l; + + *length = 0; + + if (start >= device->total_bytes) + return 0; + + path = btrfs_alloc_path(); + if (!path) + return -ENOMEM; + path->reada = 2; + + key.objectid = device->devid; + key.offset = start; + key.type = BTRFS_DEV_EXTENT_KEY; + + ret = btrfs_search_slot(NULL, root, &key, path, 0, 0); + if (ret < 0) + goto out; + if (ret > 0) { + ret = btrfs_previous_item(root, path, key.objectid, key.type); + if (ret < 0) + goto out; + } + + while (1) { + l = path->nodes[0]; + slot = path->slots[0]; + if (slot >= btrfs_header_nritems(l)) { + ret = btrfs_next_leaf(root, path); + if (ret == 0) + continue; + if (ret < 0) + goto out; + + break; + } + btrfs_item_key_to_cpu(l, &key, slot); + + if (key.objectid < device->devid) + goto next; + + if (key.objectid > device->devid) + break; + + if (btrfs_key_type(&key) != BTRFS_DEV_EXTENT_KEY) + goto next; + + dev_extent = btrfs_item_ptr(l, slot, struct btrfs_dev_extent); + extent_end = key.offset + btrfs_dev_extent_length(l, + dev_extent); + if (key.offset <= start && extent_end > end) { + *length = end - start + 1; + break; + } else if (key.offset <= start && extent_end > start) + *length += extent_end - start; + else if (key.offset > start && extent_end <= end) + *length += extent_end - key.offset; + else if (key.offset > start && key.offset <= end) { + *length += end - key.offset + 1; + break; + } else if (key.offset > end) + break; + +next: + path->slots[0]++; + } + ret = 0; +out: + btrfs_free_path(path); + return ret; +} + /* + * find_free_dev_extent - find free space in the specified device + * @trans: transaction handler + * @device: the device which we search the free space in + * @num_bytes: the size of the free space that we need + * @start: store the start of the free space. + * @len: the size of the free space. that we find, or the size of the max + * free space if we don't find suitable free space + * * this uses a pretty simple search, the expectation is that it is * called very infrequently and that a given device has a small number * of extents + * + * @start is used to store the start of the free space if we find. But if we + * don't find suitable free space, it will be used to store the start position + * of the max free space. + * + * @len is used to store the size of the free space that we find. + * But if we don't find suitable free space, it is used to store the size of + * the max free space. */ int find_free_dev_extent(struct btrfs_trans_handle *trans, struct btrfs_device *device, u64 num_bytes, - u64 *start, u64 *max_avail) + u64 *start, u64 *len) { struct btrfs_key key; struct btrfs_root *root = device->dev_root; - struct btrfs_dev_extent *dev_extent = NULL; + struct btrfs_dev_extent *dev_extent; struct btrfs_path *path; - u64 hole_size = 0; - u64 last_byte = 0; - u64 search_start = 0; + u64 hole_size; + u64 max_hole_start; + u64 max_hole_size; + u64 extent_end; + u64 search_start; u64 search_end = device->total_bytes; int ret; - int slot = 0; - int start_found; + int slot; struct extent_buffer *l; - path = btrfs_alloc_path(); - if (!path) - return -ENOMEM; - path->reada = 2; - start_found = 0; - /* FIXME use last free of some kind */ /* we don't want to overwrite the superblock on the drive, * so we make sure to start at an offset of at least 1MB */ - search_start = max((u64)1024 * 1024, search_start); + search_start = 1024 * 1024; - if (root->fs_info->alloc_start + num_bytes <= device->total_bytes) + if (root->fs_info->alloc_start + num_bytes <= search_end) search_start = max(root->fs_info->alloc_start, search_start); + max_hole_start = search_start; + max_hole_size = 0; + + if (search_start >= search_end) { + ret = -ENOSPC; + goto error; + } + + path = btrfs_alloc_path(); + if (!path) { + ret = -ENOMEM; + goto error; + } + path->reada = 2; + key.objectid = device->devid; key.offset = search_start; key.type = BTRFS_DEV_EXTENT_KEY; + ret = btrfs_search_slot(trans, root, &key, path, 0, 0); if (ret < 0) - goto error; + goto out; if (ret > 0) { ret = btrfs_previous_item(root, path, key.objectid, key.type); if (ret < 0) - goto error; - if (ret > 0) - start_found = 1; + goto out; } - l = path->nodes[0]; - btrfs_item_key_to_cpu(l, &key, path->slots[0]); + while (1) { l = path->nodes[0]; slot = path->slots[0]; @@ -790,24 +901,9 @@ int find_free_dev_extent(struct btrfs_trans_handle *trans, if (ret == 0) continue; if (ret < 0) - goto error; -no_more_items: - if (!start_found) { - if (search_start >= search_end) { - ret = -ENOSPC; - goto error; - } - *start = search_start; - start_found = 1; - goto check_pending; - } - *start = last_byte > search_start ? - last_byte : search_start; - if (search_end <= *start) { - ret = -ENOSPC; - goto error; - } - goto check_pending; + goto out; + + break; } btrfs_item_key_to_cpu(l, &key, slot); @@ -815,48 +911,62 @@ no_more_items: goto next; if (key.objectid > device->devid) - goto no_more_items; + break; - if (key.offset >= search_start && key.offset > last_byte && - start_found) { - if (last_byte < search_start) - last_byte = search_start; - hole_size = key.offset - last_byte; + if (btrfs_key_type(&key) != BTRFS_DEV_EXTENT_KEY) + goto next; - if (hole_size > *max_avail) - *max_avail = hole_size; + if (key.offset > search_start) { + hole_size = key.offset - search_start; - if (key.offset > last_byte && - hole_size >= num_bytes) { - *start = last_byte; - goto check_pending; + if (hole_size > max_hole_size) { + max_hole_start = search_start; + max_hole_size = hole_size; + } + + /* + * If this free space is greater than which we need, + * it must be the max free space that we have found + * until now, so max_hole_start must point to the start + * of this free space and the length of this free space + * is stored in max_hole_size. Thus, we return + * max_hole_start and max_hole_size and go back to the + * caller. + */ + if (hole_size >= num_bytes) { + ret = 0; + goto out; } } - if (btrfs_key_type(&key) != BTRFS_DEV_EXTENT_KEY) - goto next; - start_found = 1; dev_extent = btrfs_item_ptr(l, slot, struct btrfs_dev_extent); - last_byte = key.offset + btrfs_dev_extent_length(l, dev_extent); + extent_end = key.offset + btrfs_dev_extent_length(l, + dev_extent); + if (extent_end > search_start) + search_start = extent_end; next: path->slots[0]++; cond_resched(); } -check_pending: - /* we have to make sure we didn't find an extent that has already - * been allocated by the map tree or the original allocation - */ - BUG_ON(*start < search_start); - if (*start + num_bytes > search_end) { - ret = -ENOSPC; - goto error; + hole_size = search_end- search_start; + if (hole_size > max_hole_size) { + max_hole_start = search_start; + max_hole_size = hole_size; } - /* check for pending inserts here */ - ret = 0; -error: + /* See above. */ + if (hole_size < num_bytes) + ret = -ENOSPC; + else + ret = 0; + +out: btrfs_free_path(path); +error: + *start = max_hole_start; + if (len) + *len = max_hole_size; return ret; } @@ -1196,7 +1306,7 @@ int btrfs_rm_device(struct btrfs_root *root, char *device_path) set_blocksize(bdev, 4096); bh = btrfs_read_dev_super(bdev); if (!bh) { - ret = -EIO; + ret = -EINVAL; goto error_close; } disk_super = (struct btrfs_super_block *)bh->b_data; @@ -1916,6 +2026,9 @@ int btrfs_balance(struct btrfs_root *dev_root) if (dev_root->fs_info->sb->s_flags & MS_RDONLY) return -EROFS; + if (!capable(CAP_SYS_ADMIN)) + return -EPERM; + mutex_lock(&dev_root->fs_info->volume_mutex); dev_root = dev_root->fs_info->dev_root; @@ -2154,66 +2267,67 @@ static noinline u64 chunk_bytes_by_type(u64 type, u64 calc_size, return calc_size * num_stripes; } -static int __btrfs_alloc_chunk(struct btrfs_trans_handle *trans, - struct btrfs_root *extent_root, - struct map_lookup **map_ret, - u64 *num_bytes, u64 *stripe_size, - u64 start, u64 type) +/* Used to sort the devices by max_avail(descending sort) */ +int btrfs_cmp_device_free_bytes(const void *dev_info1, const void *dev_info2) { - struct btrfs_fs_info *info = extent_root->fs_info; - struct btrfs_device *device = NULL; - struct btrfs_fs_devices *fs_devices = info->fs_devices; - struct list_head *cur; - struct map_lookup *map = NULL; - struct extent_map_tree *em_tree; - struct extent_map *em; - struct list_head private_devs; - int min_stripe_size = 1 * 1024 * 1024; - u64 calc_size = 1024 * 1024 * 1024; - u64 max_chunk_size = calc_size; - u64 min_free; - u64 avail; - u64 max_avail = 0; - u64 dev_offset; - int num_stripes = 1; - int min_stripes = 1; - int sub_stripes = 0; - int looped = 0; - int ret; - int index; - int stripe_len = 64 * 1024; + if (((struct btrfs_device_info *)dev_info1)->max_avail > + ((struct btrfs_device_info *)dev_info2)->max_avail) + return -1; + else if (((struct btrfs_device_info *)dev_info1)->max_avail < + ((struct btrfs_device_info *)dev_info2)->max_avail) + return 1; + else + return 0; +} - if ((type & BTRFS_BLOCK_GROUP_RAID1) && - (type & BTRFS_BLOCK_GROUP_DUP)) { - WARN_ON(1); - type &= ~BTRFS_BLOCK_GROUP_DUP; - } - if (list_empty(&fs_devices->alloc_list)) - return -ENOSPC; +static int __btrfs_calc_nstripes(struct btrfs_fs_devices *fs_devices, u64 type, + int *num_stripes, int *min_stripes, + int *sub_stripes) +{ + *num_stripes = 1; + *min_stripes = 1; + *sub_stripes = 0; if (type & (BTRFS_BLOCK_GROUP_RAID0)) { - num_stripes = fs_devices->rw_devices; - min_stripes = 2; + *num_stripes = fs_devices->rw_devices; + *min_stripes = 2; } if (type & (BTRFS_BLOCK_GROUP_DUP)) { - num_stripes = 2; - min_stripes = 2; + *num_stripes = 2; + *min_stripes = 2; } if (type & (BTRFS_BLOCK_GROUP_RAID1)) { if (fs_devices->rw_devices < 2) return -ENOSPC; - num_stripes = 2; - min_stripes = 2; + *num_stripes = 2; + *min_stripes = 2; } if (type & (BTRFS_BLOCK_GROUP_RAID10)) { - num_stripes = fs_devices->rw_devices; - if (num_stripes < 4) + *num_stripes = fs_devices->rw_devices; + if (*num_stripes < 4) return -ENOSPC; - num_stripes &= ~(u32)1; - sub_stripes = 2; - min_stripes = 4; + *num_stripes &= ~(u32)1; + *sub_stripes = 2; + *min_stripes = 4; } + return 0; +} + +static u64 __btrfs_calc_stripe_size(struct btrfs_fs_devices *fs_devices, + u64 proposed_size, u64 type, + int num_stripes, int small_stripe) +{ + int min_stripe_size = 1 * 1024 * 1024; + u64 calc_size = proposed_size; + u64 max_chunk_size = calc_size; + int ncopies = 1; + + if (type & (BTRFS_BLOCK_GROUP_RAID1 | + BTRFS_BLOCK_GROUP_DUP | + BTRFS_BLOCK_GROUP_RAID10)) + ncopies = 2; + if (type & BTRFS_BLOCK_GROUP_DATA) { max_chunk_size = 10 * calc_size; min_stripe_size = 64 * 1024 * 1024; @@ -2230,51 +2344,209 @@ static int __btrfs_alloc_chunk(struct btrfs_trans_handle *trans, max_chunk_size = min(div_factor(fs_devices->total_rw_bytes, 1), max_chunk_size); -again: - max_avail = 0; - if (!map || map->num_stripes != num_stripes) { - kfree(map); - map = kmalloc(map_lookup_size(num_stripes), GFP_NOFS); - if (!map) - return -ENOMEM; - map->num_stripes = num_stripes; - } - - if (calc_size * num_stripes > max_chunk_size) { - calc_size = max_chunk_size; + if (calc_size * num_stripes > max_chunk_size * ncopies) { + calc_size = max_chunk_size * ncopies; do_div(calc_size, num_stripes); - do_div(calc_size, stripe_len); - calc_size *= stripe_len; + do_div(calc_size, BTRFS_STRIPE_LEN); + calc_size *= BTRFS_STRIPE_LEN; } /* we don't want tiny stripes */ - if (!looped) + if (!small_stripe) calc_size = max_t(u64, min_stripe_size, calc_size); /* - * we're about to do_div by the stripe_len so lets make sure + * we're about to do_div by the BTRFS_STRIPE_LEN so lets make sure * we end up with something bigger than a stripe */ - calc_size = max_t(u64, calc_size, stripe_len * 4); + calc_size = max_t(u64, calc_size, BTRFS_STRIPE_LEN); + + do_div(calc_size, BTRFS_STRIPE_LEN); + calc_size *= BTRFS_STRIPE_LEN; + + return calc_size; +} + +static struct map_lookup *__shrink_map_lookup_stripes(struct map_lookup *map, + int num_stripes) +{ + struct map_lookup *new; + size_t len = map_lookup_size(num_stripes); + + BUG_ON(map->num_stripes < num_stripes); + + if (map->num_stripes == num_stripes) + return map; + + new = kmalloc(len, GFP_NOFS); + if (!new) { + /* just change map->num_stripes */ + map->num_stripes = num_stripes; + return map; + } + + memcpy(new, map, len); + new->num_stripes = num_stripes; + kfree(map); + return new; +} + +/* + * helper to allocate device space from btrfs_device_info, in which we stored + * max free space information of every device. It is used when we can not + * allocate chunks by default size. + * + * By this helper, we can allocate a new chunk as larger as possible. + */ +static int __btrfs_alloc_tiny_space(struct btrfs_trans_handle *trans, + struct btrfs_fs_devices *fs_devices, + struct btrfs_device_info *devices, + int nr_device, u64 type, + struct map_lookup **map_lookup, + int min_stripes, u64 *stripe_size) +{ + int i, index, sort_again = 0; + int min_devices = min_stripes; + u64 max_avail, min_free; + struct map_lookup *map = *map_lookup; + int ret; + + if (nr_device < min_stripes) + return -ENOSPC; + + btrfs_descending_sort_devices(devices, nr_device); + + max_avail = devices[0].max_avail; + if (!max_avail) + return -ENOSPC; + + for (i = 0; i < nr_device; i++) { + /* + * if dev_offset = 0, it means the free space of this device + * is less than what we need, and we didn't search max avail + * extent on this device, so do it now. + */ + if (!devices[i].dev_offset) { + ret = find_free_dev_extent(trans, devices[i].dev, + max_avail, + &devices[i].dev_offset, + &devices[i].max_avail); + if (ret != 0 && ret != -ENOSPC) + return ret; + sort_again = 1; + } + } + + /* we update the max avail free extent of each devices, sort again */ + if (sort_again) + btrfs_descending_sort_devices(devices, nr_device); + + if (type & BTRFS_BLOCK_GROUP_DUP) + min_devices = 1; + + if (!devices[min_devices - 1].max_avail) + return -ENOSPC; + + max_avail = devices[min_devices - 1].max_avail; + if (type & BTRFS_BLOCK_GROUP_DUP) + do_div(max_avail, 2); + + max_avail = __btrfs_calc_stripe_size(fs_devices, max_avail, type, + min_stripes, 1); + if (type & BTRFS_BLOCK_GROUP_DUP) + min_free = max_avail * 2; + else + min_free = max_avail; + + if (min_free > devices[min_devices - 1].max_avail) + return -ENOSPC; + + map = __shrink_map_lookup_stripes(map, min_stripes); + *stripe_size = max_avail; + + index = 0; + for (i = 0; i < min_stripes; i++) { + map->stripes[i].dev = devices[index].dev; + map->stripes[i].physical = devices[index].dev_offset; + if (type & BTRFS_BLOCK_GROUP_DUP) { + i++; + map->stripes[i].dev = devices[index].dev; + map->stripes[i].physical = devices[index].dev_offset + + max_avail; + } + index++; + } + *map_lookup = map; + + return 0; +} - do_div(calc_size, stripe_len); - calc_size *= stripe_len; +static int __btrfs_alloc_chunk(struct btrfs_trans_handle *trans, + struct btrfs_root *extent_root, + struct map_lookup **map_ret, + u64 *num_bytes, u64 *stripe_size, + u64 start, u64 type) +{ + struct btrfs_fs_info *info = extent_root->fs_info; + struct btrfs_device *device = NULL; + struct btrfs_fs_devices *fs_devices = info->fs_devices; + struct list_head *cur; + struct map_lookup *map; + struct extent_map_tree *em_tree; + struct extent_map *em; + struct btrfs_device_info *devices_info; + struct list_head private_devs; + u64 calc_size = 1024 * 1024 * 1024; + u64 min_free; + u64 avail; + u64 dev_offset; + int num_stripes; + int min_stripes; + int sub_stripes; + int min_devices; /* the min number of devices we need */ + int i; + int ret; + int index; + + if ((type & BTRFS_BLOCK_GROUP_RAID1) && + (type & BTRFS_BLOCK_GROUP_DUP)) { + WARN_ON(1); + type &= ~BTRFS_BLOCK_GROUP_DUP; + } + if (list_empty(&fs_devices->alloc_list)) + return -ENOSPC; + + ret = __btrfs_calc_nstripes(fs_devices, type, &num_stripes, + &min_stripes, &sub_stripes); + if (ret) + return ret; + + devices_info = kzalloc(sizeof(*devices_info) * fs_devices->rw_devices, + GFP_NOFS); + if (!devices_info) + return -ENOMEM; + + map = kmalloc(map_lookup_size(num_stripes), GFP_NOFS); + if (!map) { + ret = -ENOMEM; + goto error; + } + map->num_stripes = num_stripes; cur = fs_devices->alloc_list.next; index = 0; + i = 0; - if (type & BTRFS_BLOCK_GROUP_DUP) + calc_size = __btrfs_calc_stripe_size(fs_devices, calc_size, type, + num_stripes, 0); + + if (type & BTRFS_BLOCK_GROUP_DUP) { min_free = calc_size * 2; - else + min_devices = 1; + } else { min_free = calc_size; - - /* - * we add 1MB because we never use the first 1MB of the device, unless - * we've looped, then we are likely allocating the maximum amount of - * space left already - */ - if (!looped) - min_free += 1024 * 1024; + min_devices = min_stripes; + } INIT_LIST_HEAD(&private_devs); while (index < num_stripes) { @@ -2287,27 +2559,39 @@ again: cur = cur->next; if (device->in_fs_metadata && avail >= min_free) { - ret = find_free_dev_extent(trans, device, - min_free, &dev_offset, - &max_avail); + ret = find_free_dev_extent(trans, device, min_free, + &devices_info[i].dev_offset, + &devices_info[i].max_avail); if (ret == 0) { list_move_tail(&device->dev_alloc_list, &private_devs); map->stripes[index].dev = device; - map->stripes[index].physical = dev_offset; + map->stripes[index].physical = + devices_info[i].dev_offset; index++; if (type & BTRFS_BLOCK_GROUP_DUP) { map->stripes[index].dev = device; map->stripes[index].physical = - dev_offset + calc_size; + devices_info[i].dev_offset + + calc_size; index++; } - } - } else if (device->in_fs_metadata && avail > max_avail) - max_avail = avail; + } else if (ret != -ENOSPC) + goto error; + + devices_info[i].dev = device; + i++; + } else if (device->in_fs_metadata && + avail >= BTRFS_STRIPE_LEN) { + devices_info[i].dev = device; + devices_info[i].max_avail = avail; + i++; + } + if (cur == &fs_devices->alloc_list) break; } + list_splice(&private_devs, &fs_devices->alloc_list); if (index < num_stripes) { if (index >= min_stripes) { @@ -2316,34 +2600,36 @@ again: num_stripes /= sub_stripes; num_stripes *= sub_stripes; } - looped = 1; - goto again; - } - if (!looped && max_avail > 0) { - looped = 1; - calc_size = max_avail; - goto again; + + map = __shrink_map_lookup_stripes(map, num_stripes); + } else if (i >= min_devices) { + ret = __btrfs_alloc_tiny_space(trans, fs_devices, + devices_info, i, type, + &map, min_stripes, + &calc_size); + if (ret) + goto error; + } else { + ret = -ENOSPC; + goto error; } - kfree(map); - return -ENOSPC; } map->sector_size = extent_root->sectorsize; - map->stripe_len = stripe_len; - map->io_align = stripe_len; - map->io_width = stripe_len; + map->stripe_len = BTRFS_STRIPE_LEN; + map->io_align = BTRFS_STRIPE_LEN; + map->io_width = BTRFS_STRIPE_LEN; map->type = type; - map->num_stripes = num_stripes; map->sub_stripes = sub_stripes; *map_ret = map; *stripe_size = calc_size; *num_bytes = chunk_bytes_by_type(type, calc_size, - num_stripes, sub_stripes); + map->num_stripes, sub_stripes); em = alloc_extent_map(GFP_NOFS); if (!em) { - kfree(map); - return -ENOMEM; + ret = -ENOMEM; + goto error; } em->bdev = (struct block_device *)map; em->start = start; @@ -2376,7 +2662,13 @@ again: index++; } + kfree(devices_info); return 0; + +error: + kfree(map); + kfree(devices_info); + return ret; } static int __finish_chunk_alloc(struct btrfs_trans_handle *trans, diff --git a/fs/btrfs/volumes.h b/fs/btrfs/volumes.h index 1be7810..7fb59d4 100644 --- a/fs/btrfs/volumes.h +++ b/fs/btrfs/volumes.h @@ -20,8 +20,11 @@ #define __BTRFS_VOLUMES_ #include <linux/bio.h> +#include <linux/sort.h> #include "async-thread.h" +#define BTRFS_STRIPE_LEN (64 * 1024) + struct buffer_head; struct btrfs_pending_bios { struct bio *head; @@ -136,6 +139,30 @@ struct btrfs_multi_bio { struct btrfs_bio_stripe stripes[]; }; +struct btrfs_device_info { + struct btrfs_device *dev; + u64 dev_offset; + u64 max_avail; +}; + +/* Used to sort the devices by max_avail(descending sort) */ +int btrfs_cmp_device_free_bytes(const void *dev_info1, const void *dev_info2); + +/* + * sort the devices by max_avail, in which max free extent size of each device + * is stored.(Descending Sort) + */ +static inline void btrfs_descending_sort_devices( + struct btrfs_device_info *devices, + size_t nr_devices) +{ + sort(devices, nr_devices, sizeof(struct btrfs_device_info), + btrfs_cmp_device_free_bytes, NULL); +} + +int btrfs_account_dev_extents_size(struct btrfs_device *device, u64 start, + u64 end, u64 *length); + #define btrfs_multi_bio_size(n) (sizeof(struct btrfs_multi_bio) + \ (sizeof(struct btrfs_bio_stripe) * (n))) diff --git a/fs/btrfs/xattr.c b/fs/btrfs/xattr.c index 698fdd2..a577653 100644 --- a/fs/btrfs/xattr.c +++ b/fs/btrfs/xattr.c @@ -316,6 +316,15 @@ ssize_t btrfs_getxattr(struct dentry *dentry, const char *name, int btrfs_setxattr(struct dentry *dentry, const char *name, const void *value, size_t size, int flags) { + struct btrfs_root *root = BTRFS_I(dentry->d_inode)->root; + + /* + * The permission on security.* and system.* is not checked + * in permission(). + */ + if (btrfs_root_readonly(root)) + return -EROFS; + /* * If this is a request for a synthetic attribute in the system.* * namespace use the generic infrastructure to resolve a handler @@ -336,6 +345,15 @@ int btrfs_setxattr(struct dentry *dentry, const char *name, const void *value, int btrfs_removexattr(struct dentry *dentry, const char *name) { + struct btrfs_root *root = BTRFS_I(dentry->d_inode)->root; + + /* + * The permission on security.* and system.* is not checked + * in permission(). + */ + if (btrfs_root_readonly(root)) + return -EROFS; + /* * If this is a request for a synthetic attribute in the system.* * namespace use the generic infrastructure to resolve a handler diff --git a/fs/btrfs/zlib.c b/fs/btrfs/zlib.c index b9cd544..f5ec2d4 100644 --- a/fs/btrfs/zlib.c +++ b/fs/btrfs/zlib.c @@ -32,15 +32,6 @@ #include <linux/bio.h> #include "compression.h" -/* Plan: call deflate() with avail_in == *sourcelen, - avail_out = *dstlen - 12 and flush == Z_FINISH. - If it doesn't manage to finish, call it again with - avail_in == 0 and avail_out set to the remaining 12 - bytes for it to clean up. - Q: Is 12 bytes sufficient? -*/ -#define STREAM_END_SPACE 12 - struct workspace { z_stream inf_strm; z_stream def_strm; @@ -48,152 +39,51 @@ struct workspace { struct list_head list; }; -static LIST_HEAD(idle_workspace); -static DEFINE_SPINLOCK(workspace_lock); -static unsigned long num_workspace; -static atomic_t alloc_workspace = ATOMIC_INIT(0); -static DECLARE_WAIT_QUEUE_HEAD(workspace_wait); +static void zlib_free_workspace(struct list_head *ws) +{ + struct workspace *workspace = list_entry(ws, struct workspace, list); -/* - * this finds an available zlib workspace or allocates a new one - * NULL or an ERR_PTR is returned if things go bad. - */ -static struct workspace *find_zlib_workspace(void) + vfree(workspace->def_strm.workspace); + vfree(workspace->inf_strm.workspace); + kfree(workspace->buf); + kfree(workspace); +} + +static struct list_head *zlib_alloc_workspace(void) { struct workspace *workspace; - int ret; - int cpus = num_online_cpus(); - -again: - spin_lock(&workspace_lock); - if (!list_empty(&idle_workspace)) { - workspace = list_entry(idle_workspace.next, struct workspace, - list); - list_del(&workspace->list); - num_workspace--; - spin_unlock(&workspace_lock); - return workspace; - } - spin_unlock(&workspace_lock); - if (atomic_read(&alloc_workspace) > cpus) { - DEFINE_WAIT(wait); - prepare_to_wait(&workspace_wait, &wait, TASK_UNINTERRUPTIBLE); - if (atomic_read(&alloc_workspace) > cpus) - schedule(); - finish_wait(&workspace_wait, &wait); - goto again; - } - atomic_inc(&alloc_workspace); workspace = kzalloc(sizeof(*workspace), GFP_NOFS); - if (!workspace) { - ret = -ENOMEM; - goto fail; - } + if (!workspace) + return ERR_PTR(-ENOMEM); workspace->def_strm.workspace = vmalloc(zlib_deflate_workspacesize()); - if (!workspace->def_strm.workspace) { - ret = -ENOMEM; - goto fail; - } workspace->inf_strm.workspace = vmalloc(zlib_inflate_workspacesize()); - if (!workspace->inf_strm.workspace) { - ret = -ENOMEM; - goto fail_inflate; - } workspace->buf = kmalloc(PAGE_CACHE_SIZE, GFP_NOFS); - if (!workspace->buf) { - ret = -ENOMEM; - goto fail_kmalloc; - } - return workspace; - -fail_kmalloc: - vfree(workspace->inf_strm.workspace); -fail_inflate: - vfree(workspace->def_strm.workspace); -fail: - kfree(workspace); - atomic_dec(&alloc_workspace); - wake_up(&workspace_wait); - return ERR_PTR(ret); -} - -/* - * put a workspace struct back on the list or free it if we have enough - * idle ones sitting around - */ -static int free_workspace(struct workspace *workspace) -{ - spin_lock(&workspace_lock); - if (num_workspace < num_online_cpus()) { - list_add_tail(&workspace->list, &idle_workspace); - num_workspace++; - spin_unlock(&workspace_lock); - if (waitqueue_active(&workspace_wait)) - wake_up(&workspace_wait); - return 0; - } - spin_unlock(&workspace_lock); - vfree(workspace->def_strm.workspace); - vfree(workspace->inf_strm.workspace); - kfree(workspace->buf); - kfree(workspace); + if (!workspace->def_strm.workspace || + !workspace->inf_strm.workspace || !workspace->buf) + goto fail; - atomic_dec(&alloc_workspace); - if (waitqueue_active(&workspace_wait)) - wake_up(&workspace_wait); - return 0; -} + INIT_LIST_HEAD(&workspace->list); -/* - * cleanup function for module exit - */ -static void free_workspaces(void) -{ - struct workspace *workspace; - while (!list_empty(&idle_workspace)) { - workspace = list_entry(idle_workspace.next, struct workspace, - list); - list_del(&workspace->list); - vfree(workspace->def_strm.workspace); - vfree(workspace->inf_strm.workspace); - kfree(workspace->buf); - kfree(workspace); - atomic_dec(&alloc_workspace); - } + return &workspace->list; +fail: + zlib_free_workspace(&workspace->list); + return ERR_PTR(-ENOMEM); } -/* - * given an address space and start/len, compress the bytes. - * - * pages are allocated to hold the compressed result and stored - * in 'pages' - * - * out_pages is used to return the number of pages allocated. There - * may be pages allocated even if we return an error - * - * total_in is used to return the number of bytes actually read. It - * may be smaller then len if we had to exit early because we - * ran out of room in the pages array or because we cross the - * max_out threshold. - * - * total_out is used to return the total number of compressed bytes - * - * max_out tells us the max number of bytes that we're allowed to - * stuff into pages - */ -int btrfs_zlib_compress_pages(struct address_space *mapping, - u64 start, unsigned long len, - struct page **pages, - unsigned long nr_dest_pages, - unsigned long *out_pages, - unsigned long *total_in, - unsigned long *total_out, - unsigned long max_out) +static int zlib_compress_pages(struct list_head *ws, + struct address_space *mapping, + u64 start, unsigned long len, + struct page **pages, + unsigned long nr_dest_pages, + unsigned long *out_pages, + unsigned long *total_in, + unsigned long *total_out, + unsigned long max_out) { + struct workspace *workspace = list_entry(ws, struct workspace, list); int ret; - struct workspace *workspace; char *data_in; char *cpage_out; int nr_pages = 0; @@ -205,10 +95,6 @@ int btrfs_zlib_compress_pages(struct address_space *mapping, *total_out = 0; *total_in = 0; - workspace = find_zlib_workspace(); - if (IS_ERR(workspace)) - return -1; - if (Z_OK != zlib_deflateInit(&workspace->def_strm, 3)) { printk(KERN_WARNING "deflateInit failed\n"); ret = -1; @@ -222,6 +108,10 @@ int btrfs_zlib_compress_pages(struct address_space *mapping, data_in = kmap(in_page); out_page = alloc_page(GFP_NOFS | __GFP_HIGHMEM); + if (out_page == NULL) { + ret = -1; + goto out; + } cpage_out = kmap(out_page); pages[0] = out_page; nr_pages = 1; @@ -260,6 +150,10 @@ int btrfs_zlib_compress_pages(struct address_space *mapping, goto out; } out_page = alloc_page(GFP_NOFS | __GFP_HIGHMEM); + if (out_page == NULL) { + ret = -1; + goto out; + } cpage_out = kmap(out_page); pages[nr_pages] = out_page; nr_pages++; @@ -314,55 +208,26 @@ out: kunmap(in_page); page_cache_release(in_page); } - free_workspace(workspace); return ret; } -/* - * pages_in is an array of pages with compressed data. - * - * disk_start is the starting logical offset of this array in the file - * - * bvec is a bio_vec of pages from the file that we want to decompress into - * - * vcnt is the count of pages in the biovec - * - * srclen is the number of bytes in pages_in - * - * The basic idea is that we have a bio that was created by readpages. - * The pages in the bio are for the uncompressed data, and they may not - * be contiguous. They all correspond to the range of bytes covered by - * the compressed extent. - */ -int btrfs_zlib_decompress_biovec(struct page **pages_in, - u64 disk_start, - struct bio_vec *bvec, - int vcnt, - size_t srclen) +static int zlib_decompress_biovec(struct list_head *ws, struct page **pages_in, + u64 disk_start, + struct bio_vec *bvec, + int vcnt, + size_t srclen) { - int ret = 0; + struct workspace *workspace = list_entry(ws, struct workspace, list); + int ret = 0, ret2; int wbits = MAX_WBITS; - struct workspace *workspace; char *data_in; size_t total_out = 0; - unsigned long page_bytes_left; unsigned long page_in_index = 0; unsigned long page_out_index = 0; - struct page *page_out; unsigned long total_pages_in = (srclen + PAGE_CACHE_SIZE - 1) / PAGE_CACHE_SIZE; unsigned long buf_start; - unsigned long buf_offset; - unsigned long bytes; - unsigned long working_bytes; unsigned long pg_offset; - unsigned long start_byte; - unsigned long current_buf_start; - char *kaddr; - - workspace = find_zlib_workspace(); - if (IS_ERR(workspace)) - return -ENOMEM; data_in = kmap(pages_in[page_in_index]); workspace->inf_strm.next_in = data_in; @@ -372,8 +237,6 @@ int btrfs_zlib_decompress_biovec(struct page **pages_in, workspace->inf_strm.total_out = 0; workspace->inf_strm.next_out = workspace->buf; workspace->inf_strm.avail_out = PAGE_CACHE_SIZE; - page_out = bvec[page_out_index].bv_page; - page_bytes_left = PAGE_CACHE_SIZE; pg_offset = 0; /* If it's deflate, and it's got no preset dictionary, then @@ -389,107 +252,29 @@ int btrfs_zlib_decompress_biovec(struct page **pages_in, if (Z_OK != zlib_inflateInit2(&workspace->inf_strm, wbits)) { printk(KERN_WARNING "inflateInit failed\n"); - ret = -1; - goto out; + return -1; } while (workspace->inf_strm.total_in < srclen) { ret = zlib_inflate(&workspace->inf_strm, Z_NO_FLUSH); if (ret != Z_OK && ret != Z_STREAM_END) break; - /* - * buf start is the byte offset we're of the start of - * our workspace buffer - */ - buf_start = total_out; - /* total_out is the last byte of the workspace buffer */ + buf_start = total_out; total_out = workspace->inf_strm.total_out; - working_bytes = total_out - buf_start; - - /* - * start byte is the first byte of the page we're currently - * copying into relative to the start of the compressed data. - */ - start_byte = page_offset(page_out) - disk_start; - - if (working_bytes == 0) { - /* we didn't make progress in this inflate - * call, we're done - */ - if (ret != Z_STREAM_END) - ret = -1; + /* we didn't make progress in this inflate call, we're done */ + if (buf_start == total_out) break; - } - /* we haven't yet hit data corresponding to this page */ - if (total_out <= start_byte) - goto next; - - /* - * the start of the data we care about is offset into - * the middle of our working buffer - */ - if (total_out > start_byte && buf_start < start_byte) { - buf_offset = start_byte - buf_start; - working_bytes -= buf_offset; - } else { - buf_offset = 0; - } - current_buf_start = buf_start; - - /* copy bytes from the working buffer into the pages */ - while (working_bytes > 0) { - bytes = min(PAGE_CACHE_SIZE - pg_offset, - PAGE_CACHE_SIZE - buf_offset); - bytes = min(bytes, working_bytes); - kaddr = kmap_atomic(page_out, KM_USER0); - memcpy(kaddr + pg_offset, workspace->buf + buf_offset, - bytes); - kunmap_atomic(kaddr, KM_USER0); - flush_dcache_page(page_out); - - pg_offset += bytes; - page_bytes_left -= bytes; - buf_offset += bytes; - working_bytes -= bytes; - current_buf_start += bytes; - - /* check if we need to pick another page */ - if (page_bytes_left == 0) { - page_out_index++; - if (page_out_index >= vcnt) { - ret = 0; - goto done; - } - - page_out = bvec[page_out_index].bv_page; - pg_offset = 0; - page_bytes_left = PAGE_CACHE_SIZE; - start_byte = page_offset(page_out) - disk_start; - - /* - * make sure our new page is covered by this - * working buffer - */ - if (total_out <= start_byte) - goto next; - - /* the next page in the biovec might not - * be adjacent to the last page, but it - * might still be found inside this working - * buffer. bump our offset pointer - */ - if (total_out > start_byte && - current_buf_start < start_byte) { - buf_offset = start_byte - buf_start; - working_bytes = total_out - start_byte; - current_buf_start = buf_start + - buf_offset; - } - } + ret2 = btrfs_decompress_buf2page(workspace->buf, buf_start, + total_out, disk_start, + bvec, vcnt, + &page_out_index, &pg_offset); + if (ret2 == 0) { + ret = 0; + goto done; } -next: + workspace->inf_strm.next_out = workspace->buf; workspace->inf_strm.avail_out = PAGE_CACHE_SIZE; @@ -516,35 +301,21 @@ done: zlib_inflateEnd(&workspace->inf_strm); if (data_in) kunmap(pages_in[page_in_index]); -out: - free_workspace(workspace); return ret; } -/* - * a less complex decompression routine. Our compressed data fits in a - * single page, and we want to read a single page out of it. - * start_byte tells us the offset into the compressed data we're interested in - */ -int btrfs_zlib_decompress(unsigned char *data_in, - struct page *dest_page, - unsigned long start_byte, - size_t srclen, size_t destlen) +static int zlib_decompress(struct list_head *ws, unsigned char *data_in, + struct page *dest_page, + unsigned long start_byte, + size_t srclen, size_t destlen) { + struct workspace *workspace = list_entry(ws, struct workspace, list); int ret = 0; int wbits = MAX_WBITS; - struct workspace *workspace; unsigned long bytes_left = destlen; unsigned long total_out = 0; char *kaddr; - if (destlen > PAGE_CACHE_SIZE) - return -ENOMEM; - - workspace = find_zlib_workspace(); - if (IS_ERR(workspace)) - return -ENOMEM; - workspace->inf_strm.next_in = data_in; workspace->inf_strm.avail_in = srclen; workspace->inf_strm.total_in = 0; @@ -565,8 +336,7 @@ int btrfs_zlib_decompress(unsigned char *data_in, if (Z_OK != zlib_inflateInit2(&workspace->inf_strm, wbits)) { printk(KERN_WARNING "inflateInit failed\n"); - ret = -1; - goto out; + return -1; } while (bytes_left > 0) { @@ -616,12 +386,13 @@ next: ret = 0; zlib_inflateEnd(&workspace->inf_strm); -out: - free_workspace(workspace); return ret; } -void btrfs_zlib_exit(void) -{ - free_workspaces(); -} +struct btrfs_compress_op btrfs_zlib_compress = { + .alloc_workspace = zlib_alloc_workspace, + .free_workspace = zlib_free_workspace, + .compress_pages = zlib_compress_pages, + .decompress_biovec = zlib_decompress_biovec, + .decompress = zlib_decompress, +}; diff --git a/fs/cifs/cifs_dfs_ref.c b/fs/cifs/cifs_dfs_ref.c index c68a056..7ed3653 100644 --- a/fs/cifs/cifs_dfs_ref.c +++ b/fs/cifs/cifs_dfs_ref.c @@ -255,35 +255,6 @@ static struct vfsmount *cifs_dfs_do_refmount(struct cifs_sb_info *cifs_sb, } -static int add_mount_helper(struct vfsmount *newmnt, struct nameidata *nd, - struct list_head *mntlist) -{ - /* stolen from afs code */ - int err; - - mntget(newmnt); - err = do_add_mount(newmnt, &nd->path, nd->path.mnt->mnt_flags | MNT_SHRINKABLE, mntlist); - switch (err) { - case 0: - path_put(&nd->path); - nd->path.mnt = newmnt; - nd->path.dentry = dget(newmnt->mnt_root); - schedule_delayed_work(&cifs_dfs_automount_task, - cifs_dfs_mountpoint_expiry_timeout); - break; - case -EBUSY: - /* someone else made a mount here whilst we were busy */ - while (d_mountpoint(nd->path.dentry) && - follow_down(&nd->path)) - ; - err = 0; - default: - mntput(newmnt); - break; - } - return err; -} - static void dump_referral(const struct dfs_info3_param *ref) { cFYI(1, "DFS: ref path: %s", ref->path_name); @@ -293,45 +264,43 @@ static void dump_referral(const struct dfs_info3_param *ref) ref->path_consumed); } - -static void* -cifs_dfs_follow_mountpoint(struct dentry *dentry, struct nameidata *nd) +/* + * Create a vfsmount that we can automount + */ +static struct vfsmount *cifs_dfs_do_automount(struct dentry *mntpt) { struct dfs_info3_param *referrals = NULL; unsigned int num_referrals = 0; struct cifs_sb_info *cifs_sb; struct cifsSesInfo *ses; - char *full_path = NULL; + char *full_path; int xid, i; - int rc = 0; - struct vfsmount *mnt = ERR_PTR(-ENOENT); + int rc; + struct vfsmount *mnt; struct tcon_link *tlink; cFYI(1, "in %s", __func__); - BUG_ON(IS_ROOT(dentry)); + BUG_ON(IS_ROOT(mntpt)); xid = GetXid(); - dput(nd->path.dentry); - nd->path.dentry = dget(dentry); - /* * The MSDFS spec states that paths in DFS referral requests and * responses must be prefixed by a single '\' character instead of * the double backslashes usually used in the UNC. This function * gives us the latter, so we must adjust the result. */ - full_path = build_path_from_dentry(dentry); - if (full_path == NULL) { - rc = -ENOMEM; - goto out_err; - } + mnt = ERR_PTR(-ENOMEM); + full_path = build_path_from_dentry(mntpt); + if (full_path == NULL) + goto free_xid; - cifs_sb = CIFS_SB(dentry->d_inode->i_sb); + cifs_sb = CIFS_SB(mntpt->d_inode->i_sb); tlink = cifs_sb_tlink(cifs_sb); + mnt = ERR_PTR(-EINVAL); if (IS_ERR(tlink)) { - rc = PTR_ERR(tlink); - goto out_err; + mnt = ERR_CAST(tlink); + goto free_full_path; } ses = tlink_tcon(tlink)->ses; @@ -341,46 +310,63 @@ cifs_dfs_follow_mountpoint(struct dentry *dentry, struct nameidata *nd) cifs_put_tlink(tlink); + mnt = ERR_PTR(-ENOENT); for (i = 0; i < num_referrals; i++) { int len; - dump_referral(referrals+i); + dump_referral(referrals + i); /* connect to a node */ len = strlen(referrals[i].node_name); if (len < 2) { cERROR(1, "%s: Net Address path too short: %s", __func__, referrals[i].node_name); - rc = -EINVAL; - goto out_err; + mnt = ERR_PTR(-EINVAL); + break; } mnt = cifs_dfs_do_refmount(cifs_sb, full_path, referrals + i); cFYI(1, "%s: cifs_dfs_do_refmount:%s , mnt:%p", __func__, referrals[i].node_name, mnt); - - /* complete mount procedure if we accured submount */ if (!IS_ERR(mnt)) - break; + goto success; } - /* we need it cause for() above could exit without valid submount */ - rc = PTR_ERR(mnt); - if (IS_ERR(mnt)) - goto out_err; - - rc = add_mount_helper(mnt, nd, &cifs_dfs_automount_list); + /* no valid submounts were found; return error from get_dfs_path() by + * preference */ + if (rc != 0) + mnt = ERR_PTR(rc); -out: - FreeXid(xid); +success: free_dfs_info_array(referrals, num_referrals); +free_full_path: kfree(full_path); +free_xid: + FreeXid(xid); cFYI(1, "leaving %s" , __func__); - return ERR_PTR(rc); -out_err: - path_put(&nd->path); - goto out; + return mnt; +} + +/* + * Attempt to automount the referral + */ +struct vfsmount *cifs_dfs_d_automount(struct path *path) +{ + struct vfsmount *newmnt; + + cFYI(1, "in %s", __func__); + + newmnt = cifs_dfs_do_automount(path->dentry); + if (IS_ERR(newmnt)) { + cFYI(1, "leaving %s [automount failed]" , __func__); + return newmnt; + } + + mntget(newmnt); /* prevent immediate expiration */ + mnt_set_expiry(newmnt, &cifs_dfs_automount_list); + schedule_delayed_work(&cifs_dfs_automount_task, + cifs_dfs_mountpoint_expiry_timeout); + cFYI(1, "leaving %s [ok]" , __func__); + return newmnt; } const struct inode_operations cifs_dfs_referral_inode_operations = { - .follow_link = cifs_dfs_follow_mountpoint, }; - diff --git a/fs/cifs/cifsfs.h b/fs/cifs/cifsfs.h index 897b2b2..851030f 100644 --- a/fs/cifs/cifsfs.h +++ b/fs/cifs/cifsfs.h @@ -93,6 +93,12 @@ extern int cifs_readdir(struct file *file, void *direntry, filldir_t filldir); extern const struct dentry_operations cifs_dentry_ops; extern const struct dentry_operations cifs_ci_dentry_ops; +#ifdef CONFIG_CIFS_DFS_UPCALL +extern struct vfsmount *cifs_dfs_d_automount(struct path *path); +#else +#define cifs_dfs_d_automount NULL +#endif + /* Functions related to symlinks */ extern void *cifs_follow_link(struct dentry *direntry, struct nameidata *nd); extern void cifs_put_link(struct dentry *direntry, diff --git a/fs/cifs/connect.c b/fs/cifs/connect.c index a65d311..9f59887 100644 --- a/fs/cifs/connect.c +++ b/fs/cifs/connect.c @@ -1113,6 +1113,8 @@ cifs_parse_mount_options(char *options, const char *devname, } else if (!strnicmp(data, "uid", 3) && value && *value) { vol->linux_uid = simple_strtoul(value, &value, 0); uid_specified = true; + } else if (!strnicmp(data, "cruid", 5) && value && *value) { + vol->cred_uid = simple_strtoul(value, &value, 0); } else if (!strnicmp(data, "forceuid", 8)) { override_uid = 1; } else if (!strnicmp(data, "noforceuid", 10)) { diff --git a/fs/cifs/dir.c b/fs/cifs/dir.c index 1e95dd6..dd5f229 100644 --- a/fs/cifs/dir.c +++ b/fs/cifs/dir.c @@ -675,6 +675,7 @@ cifs_d_revalidate(struct dentry *direntry, struct nameidata *nd) const struct dentry_operations cifs_dentry_ops = { .d_revalidate = cifs_d_revalidate, + .d_automount = cifs_dfs_d_automount, /* d_delete: cifs_d_delete, */ /* not needed except for debugging */ }; @@ -711,4 +712,5 @@ const struct dentry_operations cifs_ci_dentry_ops = { .d_revalidate = cifs_d_revalidate, .d_hash = cifs_ci_hash, .d_compare = cifs_ci_compare, + .d_automount = cifs_dfs_d_automount, }; diff --git a/fs/cifs/inode.c b/fs/cifs/inode.c index b06b606..6c9ee80 100644 --- a/fs/cifs/inode.c +++ b/fs/cifs/inode.c @@ -32,7 +32,7 @@ #include "fscache.h" -static void cifs_set_ops(struct inode *inode, const bool is_dfs_referral) +static void cifs_set_ops(struct inode *inode) { struct cifs_sb_info *cifs_sb = CIFS_SB(inode->i_sb); @@ -60,7 +60,7 @@ static void cifs_set_ops(struct inode *inode, const bool is_dfs_referral) break; case S_IFDIR: #ifdef CONFIG_CIFS_DFS_UPCALL - if (is_dfs_referral) { + if (IS_AUTOMOUNT(inode)) { inode->i_op = &cifs_dfs_referral_inode_operations; } else { #else /* NO DFS support, treat as a directory */ @@ -167,7 +167,9 @@ cifs_fattr_to_inode(struct inode *inode, struct cifs_fattr *fattr) } spin_unlock(&inode->i_lock); - cifs_set_ops(inode, fattr->cf_flags & CIFS_FATTR_DFS_REFERRAL); + if (fattr->cf_flags & CIFS_FATTR_DFS_REFERRAL) + inode->i_flags |= S_AUTOMOUNT; + cifs_set_ops(inode); } void diff --git a/fs/cifs/netmisc.c b/fs/cifs/netmisc.c index 9aad47a..6783ce6 100644 --- a/fs/cifs/netmisc.c +++ b/fs/cifs/netmisc.c @@ -899,8 +899,8 @@ map_smb_to_linux_error(struct smb_hdr *smb, int logErr) } /* else ERRHRD class errors or junk - return EIO */ - cFYI(1, "Mapping smb error code %d to POSIX err %d", - smberrcode, rc); + cFYI(1, "Mapping smb error code 0x%x to POSIX err %d", + le32_to_cpu(smb->Status.CifsError), rc); /* generic corrective action e.g. reconnect SMB session on * ERRbaduid could be added */ diff --git a/fs/compat.c b/fs/compat.c index eb1740a..f6fd0a0 100644 --- a/fs/compat.c +++ b/fs/compat.c @@ -257,7 +257,7 @@ static int put_compat_statfs(struct compat_statfs __user *ubuf, struct kstatfs * } /* - * The following statfs calls are copies of code from fs/open.c and + * The following statfs calls are copies of code from fs/statfs.c and * should be checked against those from time to time */ asmlinkage long compat_sys_statfs(const char __user *pathname, struct compat_statfs __user *buf) @@ -320,7 +320,9 @@ static int put_compat_statfs64(struct compat_statfs64 __user *ubuf, struct kstat __put_user(kbuf->f_namelen, &ubuf->f_namelen) || __put_user(kbuf->f_fsid.val[0], &ubuf->f_fsid.val[0]) || __put_user(kbuf->f_fsid.val[1], &ubuf->f_fsid.val[1]) || - __put_user(kbuf->f_frsize, &ubuf->f_frsize)) + __put_user(kbuf->f_frsize, &ubuf->f_frsize) || + __put_user(kbuf->f_flags, &ubuf->f_flags) || + __clear_user(ubuf->f_spare, sizeof(ubuf->f_spare))) return -EFAULT; return 0; } @@ -597,10 +599,8 @@ ssize_t compat_rw_copy_check_uvector(int type, if (nr_segs > fast_segs) { ret = -ENOMEM; iov = kmalloc(nr_segs*sizeof(struct iovec), GFP_KERNEL); - if (iov == NULL) { - *ret_pointer = fast_pointer; + if (iov == NULL) goto out; - } } *ret_pointer = iov; diff --git a/fs/configfs/Kconfig b/fs/configfs/Kconfig index 13587cc..9febcde 100644 --- a/fs/configfs/Kconfig +++ b/fs/configfs/Kconfig @@ -1,8 +1,8 @@ config CONFIGFS_FS tristate "Userspace-driven configuration filesystem" - depends on SYSFS + select SYSFS help - configfs is a ram-based filesystem that provides the converse + configfs is a RAM-based filesystem that provides the converse of sysfs's functionality. Where sysfs is a filesystem-based view of kernel objects, configfs is a filesystem-based manager of kernel objects, or config_items. diff --git a/fs/dcache.c b/fs/dcache.c index 274a222..9f493ee 100644 --- a/fs/dcache.c +++ b/fs/dcache.c @@ -1380,8 +1380,11 @@ EXPORT_SYMBOL(d_set_d_op); static void __d_instantiate(struct dentry *dentry, struct inode *inode) { spin_lock(&dentry->d_lock); - if (inode) + if (inode) { + if (unlikely(IS_AUTOMOUNT(inode))) + dentry->d_flags |= DCACHE_NEED_AUTOMOUNT; list_add(&dentry->d_alias, &inode->i_dentry); + } dentry->d_inode = inode; dentry_rcuwalk_barrier(dentry); spin_unlock(&dentry->d_lock); diff --git a/fs/dlm/Kconfig b/fs/dlm/Kconfig index 2dbb422..1897eb1b 100644 --- a/fs/dlm/Kconfig +++ b/fs/dlm/Kconfig @@ -1,8 +1,7 @@ menuconfig DLM tristate "Distributed Lock Manager (DLM)" depends on EXPERIMENTAL && INET - depends on SYSFS && (IPV6 || IPV6=n) - select CONFIGFS_FS + depends on SYSFS && CONFIGFS_FS && (IPV6 || IPV6=n) select IP_SCTP help A general purpose distributed lock manager for kernel or userspace diff --git a/fs/ecryptfs/crypto.c b/fs/ecryptfs/crypto.c index cbadc1b..bfd8b68 100644 --- a/fs/ecryptfs/crypto.c +++ b/fs/ecryptfs/crypto.c @@ -348,7 +348,7 @@ static int encrypt_scatterlist(struct ecryptfs_crypt_stat *crypt_stat, BUG_ON(!crypt_stat || !crypt_stat->tfm || !(crypt_stat->flags & ECRYPTFS_STRUCT_INITIALIZED)); if (unlikely(ecryptfs_verbosity > 0)) { - ecryptfs_printk(KERN_DEBUG, "Key size [%d]; key:\n", + ecryptfs_printk(KERN_DEBUG, "Key size [%zd]; key:\n", crypt_stat->key_size); ecryptfs_dump_hex(crypt_stat->key, crypt_stat->key_size); @@ -413,10 +413,9 @@ static int ecryptfs_encrypt_extent(struct page *enc_extent_page, rc = ecryptfs_derive_iv(extent_iv, crypt_stat, (extent_base + extent_offset)); if (rc) { - ecryptfs_printk(KERN_ERR, "Error attempting to " - "derive IV for extent [0x%.16x]; " - "rc = [%d]\n", (extent_base + extent_offset), - rc); + ecryptfs_printk(KERN_ERR, "Error attempting to derive IV for " + "extent [0x%.16llx]; rc = [%d]\n", + (unsigned long long)(extent_base + extent_offset), rc); goto out; } if (unlikely(ecryptfs_verbosity > 0)) { @@ -443,9 +442,9 @@ static int ecryptfs_encrypt_extent(struct page *enc_extent_page, } rc = 0; if (unlikely(ecryptfs_verbosity > 0)) { - ecryptfs_printk(KERN_DEBUG, "Encrypt extent [0x%.16x]; " - "rc = [%d]\n", (extent_base + extent_offset), - rc); + ecryptfs_printk(KERN_DEBUG, "Encrypt extent [0x%.16llx]; " + "rc = [%d]\n", + (unsigned long long)(extent_base + extent_offset), rc); ecryptfs_printk(KERN_DEBUG, "First 8 bytes after " "encryption:\n"); ecryptfs_dump_hex((char *)(page_address(enc_extent_page)), 8); @@ -540,10 +539,9 @@ static int ecryptfs_decrypt_extent(struct page *page, rc = ecryptfs_derive_iv(extent_iv, crypt_stat, (extent_base + extent_offset)); if (rc) { - ecryptfs_printk(KERN_ERR, "Error attempting to " - "derive IV for extent [0x%.16x]; " - "rc = [%d]\n", (extent_base + extent_offset), - rc); + ecryptfs_printk(KERN_ERR, "Error attempting to derive IV for " + "extent [0x%.16llx]; rc = [%d]\n", + (unsigned long long)(extent_base + extent_offset), rc); goto out; } if (unlikely(ecryptfs_verbosity > 0)) { @@ -571,9 +569,9 @@ static int ecryptfs_decrypt_extent(struct page *page, } rc = 0; if (unlikely(ecryptfs_verbosity > 0)) { - ecryptfs_printk(KERN_DEBUG, "Decrypt extent [0x%.16x]; " - "rc = [%d]\n", (extent_base + extent_offset), - rc); + ecryptfs_printk(KERN_DEBUG, "Decrypt extent [0x%.16llx]; " + "rc = [%d]\n", + (unsigned long long)(extent_base + extent_offset), rc); ecryptfs_printk(KERN_DEBUG, "First 8 bytes after " "decryption:\n"); ecryptfs_dump_hex((char *)(page_address(page) @@ -780,7 +778,7 @@ int ecryptfs_init_crypt_ctx(struct ecryptfs_crypt_stat *crypt_stat) } ecryptfs_printk(KERN_DEBUG, "Initializing cipher [%s]; strlen = [%d]; " - "key_size_bits = [%d]\n", + "key_size_bits = [%zd]\n", crypt_stat->cipher, (int)strlen(crypt_stat->cipher), crypt_stat->key_size << 3); if (crypt_stat->tfm) { diff --git a/fs/ecryptfs/ecryptfs_kernel.h b/fs/ecryptfs/ecryptfs_kernel.h index 413a3c4..dbc84ed 100644 --- a/fs/ecryptfs/ecryptfs_kernel.h +++ b/fs/ecryptfs/ecryptfs_kernel.h @@ -192,7 +192,6 @@ ecryptfs_get_key_payload_data(struct key *key) (((struct user_key_payload*)key->payload.data)->data); } -#define ECRYPTFS_SUPER_MAGIC 0xf15f #define ECRYPTFS_MAX_KEYSET_SIZE 1024 #define ECRYPTFS_MAX_CIPHER_NAME_SIZE 32 #define ECRYPTFS_MAX_NUM_ENC_KEYS 64 @@ -584,6 +583,7 @@ ecryptfs_set_dentry_lower_mnt(struct dentry *dentry, struct vfsmount *lower_mnt) #define ecryptfs_printk(type, fmt, arg...) \ __ecryptfs_printk(type "%s: " fmt, __func__, ## arg); +__attribute__ ((format(printf, 1, 2))) void __ecryptfs_printk(const char *fmt, ...); extern const struct file_operations ecryptfs_main_fops; diff --git a/fs/ecryptfs/file.c b/fs/ecryptfs/file.c index 91da029..81e10e6 100644 --- a/fs/ecryptfs/file.c +++ b/fs/ecryptfs/file.c @@ -47,7 +47,7 @@ static ssize_t ecryptfs_read_update_atime(struct kiocb *iocb, const struct iovec *iov, unsigned long nr_segs, loff_t pos) { - int rc; + ssize_t rc; struct dentry *lower_dentry; struct vfsmount *lower_vfsmount; struct file *file = iocb->ki_filp; @@ -191,18 +191,16 @@ static int ecryptfs_open(struct inode *inode, struct file *file) | ECRYPTFS_ENCRYPTED); } mutex_unlock(&crypt_stat->cs_mutex); - if (!ecryptfs_inode_to_private(inode)->lower_file) { - rc = ecryptfs_init_persistent_file(ecryptfs_dentry); - if (rc) { - printk(KERN_ERR "%s: Error attempting to initialize " - "the persistent file for the dentry with name " - "[%s]; rc = [%d]\n", __func__, - ecryptfs_dentry->d_name.name, rc); - goto out_free; - } + rc = ecryptfs_init_persistent_file(ecryptfs_dentry); + if (rc) { + printk(KERN_ERR "%s: Error attempting to initialize " + "the persistent file for the dentry with name " + "[%s]; rc = [%d]\n", __func__, + ecryptfs_dentry->d_name.name, rc); + goto out_free; } - if ((ecryptfs_inode_to_private(inode)->lower_file->f_flags & O_RDONLY) - && !(file->f_flags & O_RDONLY)) { + if ((ecryptfs_inode_to_private(inode)->lower_file->f_flags & O_ACCMODE) + == O_RDONLY && (file->f_flags & O_ACCMODE) != O_RDONLY) { rc = -EPERM; printk(KERN_WARNING "%s: Lower persistent file is RO; eCryptfs " "file must hence be opened RO\n", __func__); @@ -243,9 +241,9 @@ static int ecryptfs_open(struct inode *inode, struct file *file) } } mutex_unlock(&crypt_stat->cs_mutex); - ecryptfs_printk(KERN_DEBUG, "inode w/ addr = [0x%p], i_ino = [0x%.16x] " - "size: [0x%.16x]\n", inode, inode->i_ino, - i_size_read(inode)); + ecryptfs_printk(KERN_DEBUG, "inode w/ addr = [0x%p], i_ino = " + "[0x%.16lx] size: [0x%.16llx]\n", inode, inode->i_ino, + (unsigned long long)i_size_read(inode)); goto out; out_free: kmem_cache_free(ecryptfs_file_info_cache, diff --git a/fs/ecryptfs/inode.c b/fs/ecryptfs/inode.c index 64ff023..bd33f87 100644 --- a/fs/ecryptfs/inode.c +++ b/fs/ecryptfs/inode.c @@ -185,15 +185,13 @@ static int ecryptfs_initialize_file(struct dentry *ecryptfs_dentry) "context; rc = [%d]\n", rc); goto out; } - if (!ecryptfs_inode_to_private(ecryptfs_dentry->d_inode)->lower_file) { - rc = ecryptfs_init_persistent_file(ecryptfs_dentry); - if (rc) { - printk(KERN_ERR "%s: Error attempting to initialize " - "the persistent file for the dentry with name " - "[%s]; rc = [%d]\n", __func__, - ecryptfs_dentry->d_name.name, rc); - goto out; - } + rc = ecryptfs_init_persistent_file(ecryptfs_dentry); + if (rc) { + printk(KERN_ERR "%s: Error attempting to initialize " + "the persistent file for the dentry with name " + "[%s]; rc = [%d]\n", __func__, + ecryptfs_dentry->d_name.name, rc); + goto out; } rc = ecryptfs_write_metadata(ecryptfs_dentry); if (rc) { @@ -302,15 +300,13 @@ int ecryptfs_lookup_and_interpose_lower(struct dentry *ecryptfs_dentry, rc = -ENOMEM; goto out; } - if (!ecryptfs_inode_to_private(ecryptfs_dentry->d_inode)->lower_file) { - rc = ecryptfs_init_persistent_file(ecryptfs_dentry); - if (rc) { - printk(KERN_ERR "%s: Error attempting to initialize " - "the persistent file for the dentry with name " - "[%s]; rc = [%d]\n", __func__, - ecryptfs_dentry->d_name.name, rc); - goto out_free_kmem; - } + rc = ecryptfs_init_persistent_file(ecryptfs_dentry); + if (rc) { + printk(KERN_ERR "%s: Error attempting to initialize " + "the persistent file for the dentry with name " + "[%s]; rc = [%d]\n", __func__, + ecryptfs_dentry->d_name.name, rc); + goto out_free_kmem; } crypt_stat = &ecryptfs_inode_to_private( ecryptfs_dentry->d_inode)->crypt_stat; diff --git a/fs/ecryptfs/keystore.c b/fs/ecryptfs/keystore.c index b1f6858..c1436cf 100644 --- a/fs/ecryptfs/keystore.c +++ b/fs/ecryptfs/keystore.c @@ -59,7 +59,7 @@ static int process_request_key_err(long err_code) break; default: ecryptfs_printk(KERN_WARNING, "Unknown error code: " - "[0x%.16x]\n", err_code); + "[0x%.16lx]\n", err_code); rc = -EINVAL; } return rc; @@ -130,7 +130,7 @@ int ecryptfs_write_packet_length(char *dest, size_t size, } else { rc = -EINVAL; ecryptfs_printk(KERN_WARNING, - "Unsupported packet size: [%d]\n", size); + "Unsupported packet size: [%zd]\n", size); } return rc; } @@ -1672,7 +1672,7 @@ decrypt_passphrase_encrypted_session_key(struct ecryptfs_auth_tok *auth_tok, auth_tok->session_key.decrypted_key_size); crypt_stat->flags |= ECRYPTFS_KEY_VALID; if (unlikely(ecryptfs_verbosity > 0)) { - ecryptfs_printk(KERN_DEBUG, "FEK of size [%d]:\n", + ecryptfs_printk(KERN_DEBUG, "FEK of size [%zd]:\n", crypt_stat->key_size); ecryptfs_dump_hex(crypt_stat->key, crypt_stat->key_size); @@ -1754,7 +1754,7 @@ int ecryptfs_parse_packet_set(struct ecryptfs_crypt_stat *crypt_stat, if (ECRYPTFS_SIG_SIZE != tag_11_contents_size) { ecryptfs_printk(KERN_ERR, "Expected " "signature of size [%d]; " - "read size [%d]\n", + "read size [%zd]\n", ECRYPTFS_SIG_SIZE, tag_11_contents_size); rc = -EIO; @@ -1787,8 +1787,8 @@ int ecryptfs_parse_packet_set(struct ecryptfs_crypt_stat *crypt_stat, goto out_wipe_list; break; default: - ecryptfs_printk(KERN_DEBUG, "No packet at offset " - "[%d] of the file header; hex value of " + ecryptfs_printk(KERN_DEBUG, "No packet at offset [%zd] " + "of the file header; hex value of " "character is [0x%.2x]\n", i, src[i]); next_packet_is_auth_tok_packet = 0; } @@ -1864,8 +1864,8 @@ found_matching_auth_tok: "session key for authentication token with sig " "[%.*s]; rc = [%d]. Removing auth tok " "candidate from the list and searching for " - "the next match.\n", candidate_auth_tok_sig, - ECRYPTFS_SIG_SIZE_HEX, rc); + "the next match.\n", ECRYPTFS_SIG_SIZE_HEX, + candidate_auth_tok_sig, rc); list_for_each_entry_safe(auth_tok_list_item, auth_tok_list_item_tmp, &auth_tok_list, list) { @@ -2168,7 +2168,7 @@ write_tag_3_packet(char *dest, size_t *remaining_bytes, if (encrypted_session_key_valid) { ecryptfs_printk(KERN_DEBUG, "encrypted_session_key_valid != 0; " "using auth_tok->session_key.encrypted_key, " - "where key_rec->enc_key_size = [%d]\n", + "where key_rec->enc_key_size = [%zd]\n", key_rec->enc_key_size); memcpy(key_rec->enc_key, auth_tok->session_key.encrypted_key, @@ -2198,7 +2198,7 @@ write_tag_3_packet(char *dest, size_t *remaining_bytes, if (rc < 1 || rc > 2) { ecryptfs_printk(KERN_ERR, "Error generating scatterlist " "for crypt_stat session key; expected rc = 1; " - "got rc = [%d]. key_rec->enc_key_size = [%d]\n", + "got rc = [%d]. key_rec->enc_key_size = [%zd]\n", rc, key_rec->enc_key_size); rc = -ENOMEM; goto out; @@ -2209,7 +2209,7 @@ write_tag_3_packet(char *dest, size_t *remaining_bytes, ecryptfs_printk(KERN_ERR, "Error generating scatterlist " "for crypt_stat encrypted session key; " "expected rc = 1; got rc = [%d]. " - "key_rec->enc_key_size = [%d]\n", rc, + "key_rec->enc_key_size = [%zd]\n", rc, key_rec->enc_key_size); rc = -ENOMEM; goto out; @@ -2224,7 +2224,7 @@ write_tag_3_packet(char *dest, size_t *remaining_bytes, goto out; } rc = 0; - ecryptfs_printk(KERN_DEBUG, "Encrypting [%d] bytes of the key\n", + ecryptfs_printk(KERN_DEBUG, "Encrypting [%zd] bytes of the key\n", crypt_stat->key_size); rc = crypto_blkcipher_encrypt(&desc, dst_sg, src_sg, (*key_rec).enc_key_size); @@ -2235,7 +2235,7 @@ write_tag_3_packet(char *dest, size_t *remaining_bytes, } ecryptfs_printk(KERN_DEBUG, "This should be the encrypted key:\n"); if (ecryptfs_verbosity > 0) { - ecryptfs_printk(KERN_DEBUG, "EFEK of size [%d]:\n", + ecryptfs_printk(KERN_DEBUG, "EFEK of size [%zd]:\n", key_rec->enc_key_size); ecryptfs_dump_hex(key_rec->enc_key, key_rec->enc_key_size); diff --git a/fs/ecryptfs/main.c b/fs/ecryptfs/main.c index d3b28ab..758323a 100644 --- a/fs/ecryptfs/main.c +++ b/fs/ecryptfs/main.c @@ -36,6 +36,7 @@ #include <linux/parser.h> #include <linux/fs_stack.h> #include <linux/slab.h> +#include <linux/magic.h> #include "ecryptfs_kernel.h" /** @@ -564,6 +565,7 @@ static struct dentry *ecryptfs_mount(struct file_system_type *fs_type, int flags ecryptfs_set_superblock_lower(s, path.dentry->d_sb); s->s_maxbytes = path.dentry->d_sb->s_maxbytes; s->s_blocksize = path.dentry->d_sb->s_blocksize; + s->s_magic = ECRYPTFS_SUPER_MAGIC; inode = ecryptfs_get_inode(path.dentry->d_inode, s); rc = PTR_ERR(inode); @@ -808,9 +810,10 @@ static int __init ecryptfs_init(void) ecryptfs_printk(KERN_ERR, "The eCryptfs extent size is " "larger than the host's page size, and so " "eCryptfs cannot run on this system. The " - "default eCryptfs extent size is [%d] bytes; " - "the page size is [%d] bytes.\n", - ECRYPTFS_DEFAULT_EXTENT_SIZE, PAGE_CACHE_SIZE); + "default eCryptfs extent size is [%u] bytes; " + "the page size is [%lu] bytes.\n", + ECRYPTFS_DEFAULT_EXTENT_SIZE, + (unsigned long)PAGE_CACHE_SIZE); goto out; } rc = ecryptfs_init_kmem_caches(); diff --git a/fs/ecryptfs/mmap.c b/fs/ecryptfs/mmap.c index b1d8275..cc64fca 100644 --- a/fs/ecryptfs/mmap.c +++ b/fs/ecryptfs/mmap.c @@ -65,7 +65,7 @@ static int ecryptfs_writepage(struct page *page, struct writeback_control *wbc) rc = ecryptfs_encrypt_page(page); if (rc) { ecryptfs_printk(KERN_WARNING, "Error encrypting " - "page (upper index [0x%.16x])\n", page->index); + "page (upper index [0x%.16lx])\n", page->index); ClearPageUptodate(page); goto out; } @@ -237,7 +237,7 @@ out: ClearPageUptodate(page); else SetPageUptodate(page); - ecryptfs_printk(KERN_DEBUG, "Unlocking page with index = [0x%.16x]\n", + ecryptfs_printk(KERN_DEBUG, "Unlocking page with index = [0x%.16lx]\n", page->index); unlock_page(page); return rc; @@ -290,6 +290,7 @@ static int ecryptfs_write_begin(struct file *file, return -ENOMEM; *pagep = page; + prev_page_end_size = ((loff_t)index << PAGE_CACHE_SHIFT); if (!PageUptodate(page)) { struct ecryptfs_crypt_stat *crypt_stat = &ecryptfs_inode_to_private(mapping->host)->crypt_stat; @@ -335,18 +336,23 @@ static int ecryptfs_write_begin(struct file *file, SetPageUptodate(page); } } else { - rc = ecryptfs_decrypt_page(page); - if (rc) { - printk(KERN_ERR "%s: Error decrypting page " - "at index [%ld]; rc = [%d]\n", - __func__, page->index, rc); - ClearPageUptodate(page); - goto out; + if (prev_page_end_size + >= i_size_read(page->mapping->host)) { + zero_user(page, 0, PAGE_CACHE_SIZE); + } else { + rc = ecryptfs_decrypt_page(page); + if (rc) { + printk(KERN_ERR "%s: Error decrypting " + "page at index [%ld]; " + "rc = [%d]\n", + __func__, page->index, rc); + ClearPageUptodate(page); + goto out; + } } SetPageUptodate(page); } } - prev_page_end_size = ((loff_t)index << PAGE_CACHE_SHIFT); /* If creating a page or more of holes, zero them out via truncate. * Note, this will increase i_size. */ if (index != 0) { @@ -488,7 +494,7 @@ static int ecryptfs_write_end(struct file *file, } else ecryptfs_printk(KERN_DEBUG, "Not a new file\n"); ecryptfs_printk(KERN_DEBUG, "Calling fill_zeros_to_end_of_page" - "(page w/ index = [0x%.16x], to = [%d])\n", index, to); + "(page w/ index = [0x%.16lx], to = [%d])\n", index, to); if (!(crypt_stat->flags & ECRYPTFS_ENCRYPTED)) { rc = ecryptfs_write_lower_page_segment(ecryptfs_inode, page, 0, to); @@ -503,19 +509,20 @@ static int ecryptfs_write_end(struct file *file, rc = fill_zeros_to_end_of_page(page, to); if (rc) { ecryptfs_printk(KERN_WARNING, "Error attempting to fill " - "zeros in page with index = [0x%.16x]\n", index); + "zeros in page with index = [0x%.16lx]\n", index); goto out; } rc = ecryptfs_encrypt_page(page); if (rc) { ecryptfs_printk(KERN_WARNING, "Error encrypting page (upper " - "index [0x%.16x])\n", index); + "index [0x%.16lx])\n", index); goto out; } if (pos + copied > i_size_read(ecryptfs_inode)) { i_size_write(ecryptfs_inode, pos + copied); ecryptfs_printk(KERN_DEBUG, "Expanded file size to " - "[0x%.16x]\n", i_size_read(ecryptfs_inode)); + "[0x%.16llx]\n", + (unsigned long long)i_size_read(ecryptfs_inode)); } rc = ecryptfs_write_inode_size_to_metadata(ecryptfs_inode); if (rc) diff --git a/fs/ext4/ext4.h b/fs/ext4/ext4.h index 1de65f5..0c8d97b 100644 --- a/fs/ext4/ext4.h +++ b/fs/ext4/ext4.h @@ -2065,7 +2065,7 @@ extern int ext4_ext_map_blocks(handle_t *handle, struct inode *inode, extern void ext4_ext_truncate(struct inode *); extern void ext4_ext_init(struct super_block *); extern void ext4_ext_release(struct super_block *); -extern long ext4_fallocate(struct inode *inode, int mode, loff_t offset, +extern long ext4_fallocate(struct file *file, int mode, loff_t offset, loff_t len); extern int ext4_convert_unwritten_extents(struct inode *inode, loff_t offset, ssize_t len); diff --git a/fs/ext4/extents.c b/fs/ext4/extents.c index c4068f6..63a7581 100644 --- a/fs/ext4/extents.c +++ b/fs/ext4/extents.c @@ -3627,14 +3627,15 @@ static void ext4_falloc_update_inode(struct inode *inode, } /* - * preallocate space for a file. This implements ext4's fallocate inode + * preallocate space for a file. This implements ext4's fallocate file * operation, which gets called from sys_fallocate system call. * For block-mapped files, posix_fallocate should fall back to the method * of writing zeroes to the required new blocks (the same behavior which is * expected for file systems which do not support fallocate() system call). */ -long ext4_fallocate(struct inode *inode, int mode, loff_t offset, loff_t len) +long ext4_fallocate(struct file *file, int mode, loff_t offset, loff_t len) { + struct inode *inode = file->f_path.dentry->d_inode; handle_t *handle; loff_t new_size; unsigned int max_blocks; @@ -3645,7 +3646,7 @@ long ext4_fallocate(struct inode *inode, int mode, loff_t offset, loff_t len) unsigned int credits, blkbits = inode->i_blkbits; /* We only support the FALLOC_FL_KEEP_SIZE mode */ - if (mode && (mode != FALLOC_FL_KEEP_SIZE)) + if (mode & ~FALLOC_FL_KEEP_SIZE) return -EOPNOTSUPP; /* @@ -3655,10 +3656,6 @@ long ext4_fallocate(struct inode *inode, int mode, loff_t offset, loff_t len) if (!(ext4_test_inode_flag(inode, EXT4_INODE_EXTENTS))) return -EOPNOTSUPP; - /* preallocation to directories is currently not supported */ - if (S_ISDIR(inode->i_mode)) - return -ENODEV; - map.m_lblk = offset >> blkbits; /* * We can't just convert len to max_blocks because diff --git a/fs/ext4/file.c b/fs/ext4/file.c index bb003dc..2e8322c 100644 --- a/fs/ext4/file.c +++ b/fs/ext4/file.c @@ -210,6 +210,7 @@ const struct file_operations ext4_file_operations = { .fsync = ext4_sync_file, .splice_read = generic_file_splice_read, .splice_write = generic_file_splice_write, + .fallocate = ext4_fallocate, }; const struct inode_operations ext4_file_inode_operations = { @@ -223,7 +224,6 @@ const struct inode_operations ext4_file_inode_operations = { .removexattr = generic_removexattr, #endif .check_acl = ext4_check_acl, - .fallocate = ext4_fallocate, .fiemap = ext4_fiemap, }; diff --git a/fs/file_table.c b/fs/file_table.c index c3dee38..c3e89ad 100644 --- a/fs/file_table.c +++ b/fs/file_table.c @@ -311,7 +311,7 @@ struct file *fget_light(unsigned int fd, int *fput_needed) struct files_struct *files = current->files; *fput_needed = 0; - if (likely((atomic_read(&files->count) == 1))) { + if (atomic_read(&files->count) == 1) { file = fcheck_files(files, fd); } else { rcu_read_lock(); diff --git a/fs/fs_struct.c b/fs/fs_struct.c index 68ca487..78b519c 100644 --- a/fs/fs_struct.c +++ b/fs/fs_struct.c @@ -4,6 +4,19 @@ #include <linux/path.h> #include <linux/slab.h> #include <linux/fs_struct.h> +#include "internal.h" + +static inline void path_get_longterm(struct path *path) +{ + path_get(path); + mnt_make_longterm(path->mnt); +} + +static inline void path_put_longterm(struct path *path) +{ + mnt_make_shortterm(path->mnt); + path_put(path); +} /* * Replace the fs->{rootmnt,root} with {mnt,dentry}. Put the old values. @@ -17,11 +30,11 @@ void set_fs_root(struct fs_struct *fs, struct path *path) write_seqcount_begin(&fs->seq); old_root = fs->root; fs->root = *path; - path_get_long(path); + path_get_longterm(path); write_seqcount_end(&fs->seq); spin_unlock(&fs->lock); if (old_root.dentry) - path_put_long(&old_root); + path_put_longterm(&old_root); } /* @@ -36,12 +49,12 @@ void set_fs_pwd(struct fs_struct *fs, struct path *path) write_seqcount_begin(&fs->seq); old_pwd = fs->pwd; fs->pwd = *path; - path_get_long(path); + path_get_longterm(path); write_seqcount_end(&fs->seq); spin_unlock(&fs->lock); if (old_pwd.dentry) - path_put_long(&old_pwd); + path_put_longterm(&old_pwd); } void chroot_fs_refs(struct path *old_root, struct path *new_root) @@ -59,13 +72,13 @@ void chroot_fs_refs(struct path *old_root, struct path *new_root) write_seqcount_begin(&fs->seq); if (fs->root.dentry == old_root->dentry && fs->root.mnt == old_root->mnt) { - path_get_long(new_root); + path_get_longterm(new_root); fs->root = *new_root; count++; } if (fs->pwd.dentry == old_root->dentry && fs->pwd.mnt == old_root->mnt) { - path_get_long(new_root); + path_get_longterm(new_root); fs->pwd = *new_root; count++; } @@ -76,13 +89,13 @@ void chroot_fs_refs(struct path *old_root, struct path *new_root) } while_each_thread(g, p); read_unlock(&tasklist_lock); while (count--) - path_put_long(old_root); + path_put_longterm(old_root); } void free_fs_struct(struct fs_struct *fs) { - path_put_long(&fs->root); - path_put_long(&fs->pwd); + path_put_longterm(&fs->root); + path_put_longterm(&fs->pwd); kmem_cache_free(fs_cachep, fs); } @@ -118,9 +131,9 @@ struct fs_struct *copy_fs_struct(struct fs_struct *old) spin_lock(&old->lock); fs->root = old->root; - path_get_long(&fs->root); + path_get_longterm(&fs->root); fs->pwd = old->pwd; - path_get_long(&fs->pwd); + path_get_longterm(&fs->pwd); spin_unlock(&old->lock); } return fs; diff --git a/fs/gfs2/file.c b/fs/gfs2/file.c index fca6689..7cfdcb9 100644 --- a/fs/gfs2/file.c +++ b/fs/gfs2/file.c @@ -19,6 +19,8 @@ #include <linux/fs.h> #include <linux/gfs2_ondisk.h> #include <linux/ext2_fs.h> +#include <linux/falloc.h> +#include <linux/swap.h> #include <linux/crc32.h> #include <linux/writeback.h> #include <asm/uaccess.h> @@ -610,6 +612,260 @@ static ssize_t gfs2_file_aio_write(struct kiocb *iocb, const struct iovec *iov, return generic_file_aio_write(iocb, iov, nr_segs, pos); } +static void empty_write_end(struct page *page, unsigned from, + unsigned to) +{ + struct gfs2_inode *ip = GFS2_I(page->mapping->host); + + page_zero_new_buffers(page, from, to); + flush_dcache_page(page); + mark_page_accessed(page); + + if (!gfs2_is_writeback(ip)) + gfs2_page_add_databufs(ip, page, from, to); + + block_commit_write(page, from, to); +} + +static int write_empty_blocks(struct page *page, unsigned from, unsigned to) +{ + unsigned start, end, next; + struct buffer_head *bh, *head; + int error; + + if (!page_has_buffers(page)) { + error = __block_write_begin(page, from, to - from, gfs2_block_map); + if (unlikely(error)) + return error; + + empty_write_end(page, from, to); + return 0; + } + + bh = head = page_buffers(page); + next = end = 0; + while (next < from) { + next += bh->b_size; + bh = bh->b_this_page; + } + start = next; + do { + next += bh->b_size; + if (buffer_mapped(bh)) { + if (end) { + error = __block_write_begin(page, start, end - start, + gfs2_block_map); + if (unlikely(error)) + return error; + empty_write_end(page, start, end); + end = 0; + } + start = next; + } + else + end = next; + bh = bh->b_this_page; + } while (next < to); + + if (end) { + error = __block_write_begin(page, start, end - start, gfs2_block_map); + if (unlikely(error)) + return error; + empty_write_end(page, start, end); + } + + return 0; +} + +static int fallocate_chunk(struct inode *inode, loff_t offset, loff_t len, + int mode) +{ + struct gfs2_inode *ip = GFS2_I(inode); + struct buffer_head *dibh; + int error; + u64 start = offset >> PAGE_CACHE_SHIFT; + unsigned int start_offset = offset & ~PAGE_CACHE_MASK; + u64 end = (offset + len - 1) >> PAGE_CACHE_SHIFT; + pgoff_t curr; + struct page *page; + unsigned int end_offset = (offset + len) & ~PAGE_CACHE_MASK; + unsigned int from, to; + + if (!end_offset) + end_offset = PAGE_CACHE_SIZE; + + error = gfs2_meta_inode_buffer(ip, &dibh); + if (unlikely(error)) + goto out; + + gfs2_trans_add_bh(ip->i_gl, dibh, 1); + + if (gfs2_is_stuffed(ip)) { + error = gfs2_unstuff_dinode(ip, NULL); + if (unlikely(error)) + goto out; + } + + curr = start; + offset = start << PAGE_CACHE_SHIFT; + from = start_offset; + to = PAGE_CACHE_SIZE; + while (curr <= end) { + page = grab_cache_page_write_begin(inode->i_mapping, curr, + AOP_FLAG_NOFS); + if (unlikely(!page)) { + error = -ENOMEM; + goto out; + } + + if (curr == end) + to = end_offset; + error = write_empty_blocks(page, from, to); + if (!error && offset + to > inode->i_size && + !(mode & FALLOC_FL_KEEP_SIZE)) { + i_size_write(inode, offset + to); + } + unlock_page(page); + page_cache_release(page); + if (error) + goto out; + curr++; + offset += PAGE_CACHE_SIZE; + from = 0; + } + + gfs2_dinode_out(ip, dibh->b_data); + mark_inode_dirty(inode); + + brelse(dibh); + +out: + return error; +} + +static void calc_max_reserv(struct gfs2_inode *ip, loff_t max, loff_t *len, + unsigned int *data_blocks, unsigned int *ind_blocks) +{ + const struct gfs2_sbd *sdp = GFS2_SB(&ip->i_inode); + unsigned int max_blocks = ip->i_alloc->al_rgd->rd_free_clone; + unsigned int tmp, max_data = max_blocks - 3 * (sdp->sd_max_height - 1); + + for (tmp = max_data; tmp > sdp->sd_diptrs;) { + tmp = DIV_ROUND_UP(tmp, sdp->sd_inptrs); + max_data -= tmp; + } + /* This calculation isn't the exact reverse of gfs2_write_calc_reserve, + so it might end up with fewer data blocks */ + if (max_data <= *data_blocks) + return; + *data_blocks = max_data; + *ind_blocks = max_blocks - max_data; + *len = ((loff_t)max_data - 3) << sdp->sd_sb.sb_bsize_shift; + if (*len > max) { + *len = max; + gfs2_write_calc_reserv(ip, max, data_blocks, ind_blocks); + } +} + +static long gfs2_fallocate(struct file *file, int mode, loff_t offset, + loff_t len) +{ + struct inode *inode = file->f_path.dentry->d_inode; + struct gfs2_sbd *sdp = GFS2_SB(inode); + struct gfs2_inode *ip = GFS2_I(inode); + unsigned int data_blocks = 0, ind_blocks = 0, rblocks; + loff_t bytes, max_bytes; + struct gfs2_alloc *al; + int error; + loff_t next = (offset + len - 1) >> sdp->sd_sb.sb_bsize_shift; + next = (next + 1) << sdp->sd_sb.sb_bsize_shift; + + /* We only support the FALLOC_FL_KEEP_SIZE mode */ + if (mode & ~FALLOC_FL_KEEP_SIZE) + return -EOPNOTSUPP; + + offset = (offset >> sdp->sd_sb.sb_bsize_shift) << + sdp->sd_sb.sb_bsize_shift; + + len = next - offset; + bytes = sdp->sd_max_rg_data * sdp->sd_sb.sb_bsize / 2; + if (!bytes) + bytes = UINT_MAX; + + gfs2_holder_init(ip->i_gl, LM_ST_EXCLUSIVE, 0, &ip->i_gh); + error = gfs2_glock_nq(&ip->i_gh); + if (unlikely(error)) + goto out_uninit; + + if (!gfs2_write_alloc_required(ip, offset, len)) + goto out_unlock; + + while (len > 0) { + if (len < bytes) + bytes = len; + al = gfs2_alloc_get(ip); + if (!al) { + error = -ENOMEM; + goto out_unlock; + } + + error = gfs2_quota_lock_check(ip); + if (error) + goto out_alloc_put; + +retry: + gfs2_write_calc_reserv(ip, bytes, &data_blocks, &ind_blocks); + + al->al_requested = data_blocks + ind_blocks; + error = gfs2_inplace_reserve(ip); + if (error) { + if (error == -ENOSPC && bytes > sdp->sd_sb.sb_bsize) { + bytes >>= 1; + goto retry; + } + goto out_qunlock; + } + max_bytes = bytes; + calc_max_reserv(ip, len, &max_bytes, &data_blocks, &ind_blocks); + al->al_requested = data_blocks + ind_blocks; + + rblocks = RES_DINODE + ind_blocks + RES_STATFS + RES_QUOTA + + RES_RG_HDR + gfs2_rg_blocks(al); + if (gfs2_is_jdata(ip)) + rblocks += data_blocks ? data_blocks : 1; + + error = gfs2_trans_begin(sdp, rblocks, + PAGE_CACHE_SIZE/sdp->sd_sb.sb_bsize); + if (error) + goto out_trans_fail; + + error = fallocate_chunk(inode, offset, max_bytes, mode); + gfs2_trans_end(sdp); + + if (error) + goto out_trans_fail; + + len -= max_bytes; + offset += max_bytes; + gfs2_inplace_release(ip); + gfs2_quota_unlock(ip); + gfs2_alloc_put(ip); + } + goto out_unlock; + +out_trans_fail: + gfs2_inplace_release(ip); +out_qunlock: + gfs2_quota_unlock(ip); +out_alloc_put: + gfs2_alloc_put(ip); +out_unlock: + gfs2_glock_dq(&ip->i_gh); +out_uninit: + gfs2_holder_uninit(&ip->i_gh); + return error; +} + #ifdef CONFIG_GFS2_FS_LOCKING_DLM /** @@ -765,6 +1021,7 @@ const struct file_operations gfs2_file_fops = { .splice_read = generic_file_splice_read, .splice_write = generic_file_splice_write, .setlease = gfs2_setlease, + .fallocate = gfs2_fallocate, }; const struct file_operations gfs2_dir_fops = { @@ -794,6 +1051,7 @@ const struct file_operations gfs2_file_fops_nolock = { .splice_read = generic_file_splice_read, .splice_write = generic_file_splice_write, .setlease = generic_setlease, + .fallocate = gfs2_fallocate, }; const struct file_operations gfs2_dir_fops_nolock = { diff --git a/fs/gfs2/ops_inode.c b/fs/gfs2/ops_inode.c index 040b5a2..d8b26ac 100644 --- a/fs/gfs2/ops_inode.c +++ b/fs/gfs2/ops_inode.c @@ -18,8 +18,6 @@ #include <linux/gfs2_ondisk.h> #include <linux/crc32.h> #include <linux/fiemap.h> -#include <linux/swap.h> -#include <linux/falloc.h> #include <asm/uaccess.h> #include "gfs2.h" @@ -1257,261 +1255,6 @@ static int gfs2_removexattr(struct dentry *dentry, const char *name) return ret; } -static void empty_write_end(struct page *page, unsigned from, - unsigned to) -{ - struct gfs2_inode *ip = GFS2_I(page->mapping->host); - - page_zero_new_buffers(page, from, to); - flush_dcache_page(page); - mark_page_accessed(page); - - if (!gfs2_is_writeback(ip)) - gfs2_page_add_databufs(ip, page, from, to); - - block_commit_write(page, from, to); -} - - -static int write_empty_blocks(struct page *page, unsigned from, unsigned to) -{ - unsigned start, end, next; - struct buffer_head *bh, *head; - int error; - - if (!page_has_buffers(page)) { - error = __block_write_begin(page, from, to - from, gfs2_block_map); - if (unlikely(error)) - return error; - - empty_write_end(page, from, to); - return 0; - } - - bh = head = page_buffers(page); - next = end = 0; - while (next < from) { - next += bh->b_size; - bh = bh->b_this_page; - } - start = next; - do { - next += bh->b_size; - if (buffer_mapped(bh)) { - if (end) { - error = __block_write_begin(page, start, end - start, - gfs2_block_map); - if (unlikely(error)) - return error; - empty_write_end(page, start, end); - end = 0; - } - start = next; - } - else - end = next; - bh = bh->b_this_page; - } while (next < to); - - if (end) { - error = __block_write_begin(page, start, end - start, gfs2_block_map); - if (unlikely(error)) - return error; - empty_write_end(page, start, end); - } - - return 0; -} - -static int fallocate_chunk(struct inode *inode, loff_t offset, loff_t len, - int mode) -{ - struct gfs2_inode *ip = GFS2_I(inode); - struct buffer_head *dibh; - int error; - u64 start = offset >> PAGE_CACHE_SHIFT; - unsigned int start_offset = offset & ~PAGE_CACHE_MASK; - u64 end = (offset + len - 1) >> PAGE_CACHE_SHIFT; - pgoff_t curr; - struct page *page; - unsigned int end_offset = (offset + len) & ~PAGE_CACHE_MASK; - unsigned int from, to; - - if (!end_offset) - end_offset = PAGE_CACHE_SIZE; - - error = gfs2_meta_inode_buffer(ip, &dibh); - if (unlikely(error)) - goto out; - - gfs2_trans_add_bh(ip->i_gl, dibh, 1); - - if (gfs2_is_stuffed(ip)) { - error = gfs2_unstuff_dinode(ip, NULL); - if (unlikely(error)) - goto out; - } - - curr = start; - offset = start << PAGE_CACHE_SHIFT; - from = start_offset; - to = PAGE_CACHE_SIZE; - while (curr <= end) { - page = grab_cache_page_write_begin(inode->i_mapping, curr, - AOP_FLAG_NOFS); - if (unlikely(!page)) { - error = -ENOMEM; - goto out; - } - - if (curr == end) - to = end_offset; - error = write_empty_blocks(page, from, to); - if (!error && offset + to > inode->i_size && - !(mode & FALLOC_FL_KEEP_SIZE)) { - i_size_write(inode, offset + to); - } - unlock_page(page); - page_cache_release(page); - if (error) - goto out; - curr++; - offset += PAGE_CACHE_SIZE; - from = 0; - } - - gfs2_dinode_out(ip, dibh->b_data); - mark_inode_dirty(inode); - - brelse(dibh); - -out: - return error; -} - -static void calc_max_reserv(struct gfs2_inode *ip, loff_t max, loff_t *len, - unsigned int *data_blocks, unsigned int *ind_blocks) -{ - const struct gfs2_sbd *sdp = GFS2_SB(&ip->i_inode); - unsigned int max_blocks = ip->i_alloc->al_rgd->rd_free_clone; - unsigned int tmp, max_data = max_blocks - 3 * (sdp->sd_max_height - 1); - - for (tmp = max_data; tmp > sdp->sd_diptrs;) { - tmp = DIV_ROUND_UP(tmp, sdp->sd_inptrs); - max_data -= tmp; - } - /* This calculation isn't the exact reverse of gfs2_write_calc_reserve, - so it might end up with fewer data blocks */ - if (max_data <= *data_blocks) - return; - *data_blocks = max_data; - *ind_blocks = max_blocks - max_data; - *len = ((loff_t)max_data - 3) << sdp->sd_sb.sb_bsize_shift; - if (*len > max) { - *len = max; - gfs2_write_calc_reserv(ip, max, data_blocks, ind_blocks); - } -} - -static long gfs2_fallocate(struct inode *inode, int mode, loff_t offset, - loff_t len) -{ - struct gfs2_sbd *sdp = GFS2_SB(inode); - struct gfs2_inode *ip = GFS2_I(inode); - unsigned int data_blocks = 0, ind_blocks = 0, rblocks; - loff_t bytes, max_bytes; - struct gfs2_alloc *al; - int error; - loff_t next = (offset + len - 1) >> sdp->sd_sb.sb_bsize_shift; - next = (next + 1) << sdp->sd_sb.sb_bsize_shift; - - /* We only support the FALLOC_FL_KEEP_SIZE mode */ - if (mode && (mode != FALLOC_FL_KEEP_SIZE)) - return -EOPNOTSUPP; - - offset = (offset >> sdp->sd_sb.sb_bsize_shift) << - sdp->sd_sb.sb_bsize_shift; - - len = next - offset; - bytes = sdp->sd_max_rg_data * sdp->sd_sb.sb_bsize / 2; - if (!bytes) - bytes = UINT_MAX; - - gfs2_holder_init(ip->i_gl, LM_ST_EXCLUSIVE, 0, &ip->i_gh); - error = gfs2_glock_nq(&ip->i_gh); - if (unlikely(error)) - goto out_uninit; - - if (!gfs2_write_alloc_required(ip, offset, len)) - goto out_unlock; - - while (len > 0) { - if (len < bytes) - bytes = len; - al = gfs2_alloc_get(ip); - if (!al) { - error = -ENOMEM; - goto out_unlock; - } - - error = gfs2_quota_lock_check(ip); - if (error) - goto out_alloc_put; - -retry: - gfs2_write_calc_reserv(ip, bytes, &data_blocks, &ind_blocks); - - al->al_requested = data_blocks + ind_blocks; - error = gfs2_inplace_reserve(ip); - if (error) { - if (error == -ENOSPC && bytes > sdp->sd_sb.sb_bsize) { - bytes >>= 1; - goto retry; - } - goto out_qunlock; - } - max_bytes = bytes; - calc_max_reserv(ip, len, &max_bytes, &data_blocks, &ind_blocks); - al->al_requested = data_blocks + ind_blocks; - - rblocks = RES_DINODE + ind_blocks + RES_STATFS + RES_QUOTA + - RES_RG_HDR + gfs2_rg_blocks(al); - if (gfs2_is_jdata(ip)) - rblocks += data_blocks ? data_blocks : 1; - - error = gfs2_trans_begin(sdp, rblocks, - PAGE_CACHE_SIZE/sdp->sd_sb.sb_bsize); - if (error) - goto out_trans_fail; - - error = fallocate_chunk(inode, offset, max_bytes, mode); - gfs2_trans_end(sdp); - - if (error) - goto out_trans_fail; - - len -= max_bytes; - offset += max_bytes; - gfs2_inplace_release(ip); - gfs2_quota_unlock(ip); - gfs2_alloc_put(ip); - } - goto out_unlock; - -out_trans_fail: - gfs2_inplace_release(ip); -out_qunlock: - gfs2_quota_unlock(ip); -out_alloc_put: - gfs2_alloc_put(ip); -out_unlock: - gfs2_glock_dq(&ip->i_gh); -out_uninit: - gfs2_holder_uninit(&ip->i_gh); - return error; -} - - static int gfs2_fiemap(struct inode *inode, struct fiemap_extent_info *fieinfo, u64 start, u64 len) { @@ -1562,7 +1305,6 @@ const struct inode_operations gfs2_file_iops = { .getxattr = gfs2_getxattr, .listxattr = gfs2_listxattr, .removexattr = gfs2_removexattr, - .fallocate = gfs2_fallocate, .fiemap = gfs2_fiemap, }; diff --git a/fs/hpfs/inode.c b/fs/hpfs/inode.c index 56f0da1..1ae35ba 100644 --- a/fs/hpfs/inode.c +++ b/fs/hpfs/inode.c @@ -281,7 +281,7 @@ int hpfs_setattr(struct dentry *dentry, struct iattr *attr) attr->ia_size != i_size_read(inode)) { error = vmtruncate(inode, attr->ia_size); if (error) - return error; + goto out_unlock; } setattr_copy(inode, attr); diff --git a/fs/internal.h b/fs/internal.h index 9687c2e..0663568 100644 --- a/fs/internal.h +++ b/fs/internal.h @@ -70,6 +70,10 @@ extern void mnt_set_mountpoint(struct vfsmount *, struct dentry *, extern void release_mounts(struct list_head *); extern void umount_tree(struct vfsmount *, int, struct list_head *); extern struct vfsmount *copy_tree(struct vfsmount *, struct dentry *, int); +extern int finish_automount(struct vfsmount *, struct path *); + +extern void mnt_make_longterm(struct vfsmount *); +extern void mnt_make_shortterm(struct vfsmount *); extern void __init mnt_init(void); @@ -86,7 +86,7 @@ int fiemap_fill_next_extent(struct fiemap_extent_info *fieinfo, u64 logical, u64 phys, u64 len, u32 flags) { struct fiemap_extent extent; - struct fiemap_extent *dest = fieinfo->fi_extents_start; + struct fiemap_extent __user *dest = fieinfo->fi_extents_start; /* only count the extents */ if (fieinfo->fi_extents_max == 0) { @@ -173,6 +173,7 @@ static int fiemap_check_ranges(struct super_block *sb, static int ioctl_fiemap(struct file *filp, unsigned long arg) { struct fiemap fiemap; + struct fiemap __user *ufiemap = (struct fiemap __user *) arg; struct fiemap_extent_info fieinfo = { 0, }; struct inode *inode = filp->f_path.dentry->d_inode; struct super_block *sb = inode->i_sb; @@ -182,8 +183,7 @@ static int ioctl_fiemap(struct file *filp, unsigned long arg) if (!inode->i_op->fiemap) return -EOPNOTSUPP; - if (copy_from_user(&fiemap, (struct fiemap __user *)arg, - sizeof(struct fiemap))) + if (copy_from_user(&fiemap, ufiemap, sizeof(fiemap))) return -EFAULT; if (fiemap.fm_extent_count > FIEMAP_MAX_EXTENTS) @@ -196,7 +196,7 @@ static int ioctl_fiemap(struct file *filp, unsigned long arg) fieinfo.fi_flags = fiemap.fm_flags; fieinfo.fi_extents_max = fiemap.fm_extent_count; - fieinfo.fi_extents_start = (struct fiemap_extent *)(arg + sizeof(fiemap)); + fieinfo.fi_extents_start = ufiemap->fm_extents; if (fiemap.fm_extent_count != 0 && !access_ok(VERIFY_WRITE, fieinfo.fi_extents_start, @@ -209,7 +209,7 @@ static int ioctl_fiemap(struct file *filp, unsigned long arg) error = inode->i_op->fiemap(inode, &fieinfo, fiemap.fm_start, len); fiemap.fm_flags = fieinfo.fi_flags; fiemap.fm_mapped_extents = fieinfo.fi_extents_mapped; - if (copy_to_user((char *)arg, &fiemap, sizeof(fiemap))) + if (copy_to_user(ufiemap, &fiemap, sizeof(fiemap))) error = -EFAULT; return error; diff --git a/fs/jffs2/build.c b/fs/jffs2/build.c index 85c6be2..3005ec4 100644 --- a/fs/jffs2/build.c +++ b/fs/jffs2/build.c @@ -336,14 +336,13 @@ int jffs2_do_mount_fs(struct jffs2_sb_info *c) size = sizeof(struct jffs2_eraseblock) * c->nr_blocks; #ifndef __ECOS if (jffs2_blocks_use_vmalloc(c)) - c->blocks = vmalloc(size); + c->blocks = vzalloc(size); else #endif - c->blocks = kmalloc(size, GFP_KERNEL); + c->blocks = kzalloc(size, GFP_KERNEL); if (!c->blocks) return -ENOMEM; - memset(c->blocks, 0, size); for (i=0; i<c->nr_blocks; i++) { INIT_LIST_HEAD(&c->blocks[i].list); c->blocks[i].offset = i * c->sector_size; diff --git a/fs/jffs2/jffs2_fs_sb.h b/fs/jffs2/jffs2_fs_sb.h index f864005..0bc6a6c 100644 --- a/fs/jffs2/jffs2_fs_sb.h +++ b/fs/jffs2/jffs2_fs_sb.h @@ -144,4 +144,4 @@ struct jffs2_sb_info { void *os_priv; }; -#endif /* _JFFS2_FB_SB */ +#endif /* _JFFS2_FS_SB */ diff --git a/fs/jffs2/xattr.c b/fs/jffs2/xattr.c index 9b572ca..4f9cc04 100644 --- a/fs/jffs2/xattr.c +++ b/fs/jffs2/xattr.c @@ -151,7 +151,7 @@ static int do_verify_xattr_datum(struct jffs2_sb_info *c, struct jffs2_xattr_dat JFFS2_ERROR("node CRC failed at %#08x, read=%#08x, calc=%#08x\n", offset, je32_to_cpu(rx.hdr_crc), crc); xd->flags |= JFFS2_XFLAGS_INVALID; - return EIO; + return -EIO; } totlen = PAD(sizeof(rx) + rx.name_len + 1 + je16_to_cpu(rx.value_len)); if (je16_to_cpu(rx.magic) != JFFS2_MAGIC_BITMASK @@ -167,7 +167,7 @@ static int do_verify_xattr_datum(struct jffs2_sb_info *c, struct jffs2_xattr_dat je32_to_cpu(rx.xid), xd->xid, je32_to_cpu(rx.version), xd->version); xd->flags |= JFFS2_XFLAGS_INVALID; - return EIO; + return -EIO; } xd->xprefix = rx.xprefix; xd->name_len = rx.name_len; @@ -230,7 +230,7 @@ static int do_load_xattr_datum(struct jffs2_sb_info *c, struct jffs2_xattr_datum ref_offset(xd->node), xd->data_crc, crc); kfree(data); xd->flags |= JFFS2_XFLAGS_INVALID; - return EIO; + return -EIO; } xd->flags |= JFFS2_XFLAGS_HOT; @@ -268,7 +268,7 @@ static int load_xattr_datum(struct jffs2_sb_info *c, struct jffs2_xattr_datum *x if (xd->xname) return 0; if (xd->flags & JFFS2_XFLAGS_INVALID) - return EIO; + return -EIO; if (unlikely(is_xattr_datum_unchecked(c, xd))) rc = do_verify_xattr_datum(c, xd); if (!rc) @@ -460,7 +460,7 @@ static int verify_xattr_ref(struct jffs2_sb_info *c, struct jffs2_xattr_ref *ref if (crc != je32_to_cpu(rr.node_crc)) { JFFS2_ERROR("node CRC failed at %#08x, read=%#08x, calc=%#08x\n", offset, je32_to_cpu(rr.node_crc), crc); - return EIO; + return -EIO; } if (je16_to_cpu(rr.magic) != JFFS2_MAGIC_BITMASK || je16_to_cpu(rr.nodetype) != JFFS2_NODETYPE_XREF @@ -470,7 +470,7 @@ static int verify_xattr_ref(struct jffs2_sb_info *c, struct jffs2_xattr_ref *ref offset, je16_to_cpu(rr.magic), JFFS2_MAGIC_BITMASK, je16_to_cpu(rr.nodetype), JFFS2_NODETYPE_XREF, je32_to_cpu(rr.totlen), PAD(sizeof(rr))); - return EIO; + return -EIO; } ref->ino = je32_to_cpu(rr.ino); ref->xid = je32_to_cpu(rr.xid); @@ -368,18 +368,6 @@ void path_get(struct path *path) EXPORT_SYMBOL(path_get); /** - * path_get_long - get a long reference to a path - * @path: path to get the reference to - * - * Given a path increment the reference count to the dentry and the vfsmount. - */ -void path_get_long(struct path *path) -{ - mntget_long(path->mnt); - dget(path->dentry); -} - -/** * path_put - put a reference to a path * @path: path to put the reference to * @@ -393,18 +381,6 @@ void path_put(struct path *path) EXPORT_SYMBOL(path_put); /** - * path_put_long - put a long reference to a path - * @path: path to put the reference to - * - * Given a path decrement the reference count to the dentry and the vfsmount. - */ -void path_put_long(struct path *path) -{ - dput(path->dentry); - mntput_long(path->mnt); -} - -/** * nameidata_drop_rcu - drop this nameidata out of rcu-walk * @nd: nameidata pathwalk data to drop * Returns: 0 on success, -ECHILD on failure @@ -800,12 +776,8 @@ __do_follow_link(const struct path *link, struct nameidata *nd, void **p) touch_atime(link->mnt, dentry); nd_set_link(nd, NULL); - if (link->mnt != nd->path.mnt) { - path_to_nameidata(link, nd); - nd->inode = nd->path.dentry->d_inode; - dget(dentry); - } - mntget(link->mnt); + if (link->mnt == nd->path.mnt) + mntget(link->mnt); nd->last_type = LAST_BIND; *p = dentry->d_inode->i_op->follow_link(dentry, nd); @@ -896,54 +868,148 @@ int follow_up(struct path *path) } /* - * serialization is taken care of in namespace.c + * Perform an automount + * - return -EISDIR to tell follow_managed() to stop and return the path we + * were called with. */ -static void __follow_mount_rcu(struct nameidata *nd, struct path *path, - struct inode **inode) +static int follow_automount(struct path *path, unsigned flags, + bool *need_mntput) { - while (d_mountpoint(path->dentry)) { - struct vfsmount *mounted; - mounted = __lookup_mnt(path->mnt, path->dentry, 1); - if (!mounted) - return; - path->mnt = mounted; - path->dentry = mounted->mnt_root; - nd->seq = read_seqcount_begin(&path->dentry->d_seq); - *inode = path->dentry->d_inode; + struct vfsmount *mnt; + int err; + + if (!path->dentry->d_op || !path->dentry->d_op->d_automount) + return -EREMOTE; + + /* We don't want to mount if someone supplied AT_NO_AUTOMOUNT + * and this is the terminal part of the path. + */ + if ((flags & LOOKUP_NO_AUTOMOUNT) && !(flags & LOOKUP_CONTINUE)) + return -EISDIR; /* we actually want to stop here */ + + /* We want to mount if someone is trying to open/create a file of any + * type under the mountpoint, wants to traverse through the mountpoint + * or wants to open the mounted directory. + * + * We don't want to mount if someone's just doing a stat and they've + * set AT_SYMLINK_NOFOLLOW - unless they're stat'ing a directory and + * appended a '/' to the name. + */ + if (!(flags & LOOKUP_FOLLOW) && + !(flags & (LOOKUP_CONTINUE | LOOKUP_DIRECTORY | + LOOKUP_OPEN | LOOKUP_CREATE))) + return -EISDIR; + + current->total_link_count++; + if (current->total_link_count >= 40) + return -ELOOP; + + mnt = path->dentry->d_op->d_automount(path); + if (IS_ERR(mnt)) { + /* + * The filesystem is allowed to return -EISDIR here to indicate + * it doesn't want to automount. For instance, autofs would do + * this so that its userspace daemon can mount on this dentry. + * + * However, we can only permit this if it's a terminal point in + * the path being looked up; if it wasn't then the remainder of + * the path is inaccessible and we should say so. + */ + if (PTR_ERR(mnt) == -EISDIR && (flags & LOOKUP_CONTINUE)) + return -EREMOTE; + return PTR_ERR(mnt); } -} -static int __follow_mount(struct path *path) -{ - int res = 0; - while (d_mountpoint(path->dentry)) { - struct vfsmount *mounted = lookup_mnt(path); - if (!mounted) - break; + if (!mnt) /* mount collision */ + return 0; + + err = finish_automount(mnt, path); + + switch (err) { + case -EBUSY: + /* Someone else made a mount here whilst we were busy */ + return 0; + case 0: dput(path->dentry); - if (res) + if (*need_mntput) mntput(path->mnt); - path->mnt = mounted; - path->dentry = dget(mounted->mnt_root); - res = 1; + path->mnt = mnt; + path->dentry = dget(mnt->mnt_root); + *need_mntput = true; + return 0; + default: + return err; } - return res; + } -static void follow_mount(struct path *path) +/* + * Handle a dentry that is managed in some way. + * - Flagged for transit management (autofs) + * - Flagged as mountpoint + * - Flagged as automount point + * + * This may only be called in refwalk mode. + * + * Serialization is taken care of in namespace.c + */ +static int follow_managed(struct path *path, unsigned flags) { - while (d_mountpoint(path->dentry)) { - struct vfsmount *mounted = lookup_mnt(path); - if (!mounted) - break; - dput(path->dentry); - mntput(path->mnt); - path->mnt = mounted; - path->dentry = dget(mounted->mnt_root); + unsigned managed; + bool need_mntput = false; + int ret; + + /* Given that we're not holding a lock here, we retain the value in a + * local variable for each dentry as we look at it so that we don't see + * the components of that value change under us */ + while (managed = ACCESS_ONCE(path->dentry->d_flags), + managed &= DCACHE_MANAGED_DENTRY, + unlikely(managed != 0)) { + /* Allow the filesystem to manage the transit without i_mutex + * being held. */ + if (managed & DCACHE_MANAGE_TRANSIT) { + BUG_ON(!path->dentry->d_op); + BUG_ON(!path->dentry->d_op->d_manage); + ret = path->dentry->d_op->d_manage(path->dentry, + false, false); + if (ret < 0) + return ret == -EISDIR ? 0 : ret; + } + + /* Transit to a mounted filesystem. */ + if (managed & DCACHE_MOUNTED) { + struct vfsmount *mounted = lookup_mnt(path); + if (mounted) { + dput(path->dentry); + if (need_mntput) + mntput(path->mnt); + path->mnt = mounted; + path->dentry = dget(mounted->mnt_root); + need_mntput = true; + continue; + } + + /* Something is mounted on this dentry in another + * namespace and/or whatever was mounted there in this + * namespace got unmounted before we managed to get the + * vfsmount_lock */ + } + + /* Handle an automount point */ + if (managed & DCACHE_NEED_AUTOMOUNT) { + ret = follow_automount(path, flags, &need_mntput); + if (ret < 0) + return ret == -EISDIR ? 0 : ret; + continue; + } + + /* We didn't change the current path point */ + break; } + return 0; } -int follow_down(struct path *path) +int follow_down_one(struct path *path) { struct vfsmount *mounted; @@ -958,13 +1024,41 @@ int follow_down(struct path *path) return 0; } +/* + * Skip to top of mountpoint pile in rcuwalk mode. We abort the rcu-walk if we + * meet a managed dentry and we're not walking to "..". True is returned to + * continue, false to abort. + */ +static bool __follow_mount_rcu(struct nameidata *nd, struct path *path, + struct inode **inode, bool reverse_transit) +{ + while (d_mountpoint(path->dentry)) { + struct vfsmount *mounted; + if (unlikely(path->dentry->d_flags & DCACHE_MANAGE_TRANSIT) && + !reverse_transit && + path->dentry->d_op->d_manage(path->dentry, false, true) < 0) + return false; + mounted = __lookup_mnt(path->mnt, path->dentry, 1); + if (!mounted) + break; + path->mnt = mounted; + path->dentry = mounted->mnt_root; + nd->seq = read_seqcount_begin(&path->dentry->d_seq); + *inode = path->dentry->d_inode; + } + + if (unlikely(path->dentry->d_flags & DCACHE_NEED_AUTOMOUNT)) + return reverse_transit; + return true; +} + static int follow_dotdot_rcu(struct nameidata *nd) { struct inode *inode = nd->inode; set_root_rcu(nd); - while(1) { + while (1) { if (nd->path.dentry == nd->root.dentry && nd->path.mnt == nd->root.mnt) { break; @@ -987,12 +1081,80 @@ static int follow_dotdot_rcu(struct nameidata *nd) nd->seq = read_seqcount_begin(&nd->path.dentry->d_seq); inode = nd->path.dentry->d_inode; } - __follow_mount_rcu(nd, &nd->path, &inode); + __follow_mount_rcu(nd, &nd->path, &inode, true); nd->inode = inode; return 0; } +/* + * Follow down to the covering mount currently visible to userspace. At each + * point, the filesystem owning that dentry may be queried as to whether the + * caller is permitted to proceed or not. + * + * Care must be taken as namespace_sem may be held (indicated by mounting_here + * being true). + */ +int follow_down(struct path *path, bool mounting_here) +{ + unsigned managed; + int ret; + + while (managed = ACCESS_ONCE(path->dentry->d_flags), + unlikely(managed & DCACHE_MANAGED_DENTRY)) { + /* Allow the filesystem to manage the transit without i_mutex + * being held. + * + * We indicate to the filesystem if someone is trying to mount + * something here. This gives autofs the chance to deny anyone + * other than its daemon the right to mount on its + * superstructure. + * + * The filesystem may sleep at this point. + */ + if (managed & DCACHE_MANAGE_TRANSIT) { + BUG_ON(!path->dentry->d_op); + BUG_ON(!path->dentry->d_op->d_manage); + ret = path->dentry->d_op->d_manage( + path->dentry, mounting_here, false); + if (ret < 0) + return ret == -EISDIR ? 0 : ret; + } + + /* Transit to a mounted filesystem. */ + if (managed & DCACHE_MOUNTED) { + struct vfsmount *mounted = lookup_mnt(path); + if (!mounted) + break; + dput(path->dentry); + mntput(path->mnt); + path->mnt = mounted; + path->dentry = dget(mounted->mnt_root); + continue; + } + + /* Don't handle automount points here */ + break; + } + return 0; +} + +/* + * Skip to top of mountpoint pile in refwalk mode for follow_dotdot() + */ +static void follow_mount(struct path *path) +{ + while (d_mountpoint(path->dentry)) { + struct vfsmount *mounted = lookup_mnt(path); + if (!mounted) + break; + dput(path->dentry); + mntput(path->mnt); + path->mnt = mounted; + path->dentry = dget(mounted->mnt_root); + } +} + static void follow_dotdot(struct nameidata *nd) { set_root(nd); @@ -1057,12 +1219,14 @@ static int do_lookup(struct nameidata *nd, struct qstr *name, struct vfsmount *mnt = nd->path.mnt; struct dentry *dentry, *parent = nd->path.dentry; struct inode *dir; + int err; + /* * See if the low-level filesystem might want * to use its own hash.. */ if (unlikely(parent->d_flags & DCACHE_OP_HASH)) { - int err = parent->d_op->d_hash(parent, nd->inode, name); + err = parent->d_op->d_hash(parent, nd->inode, name); if (err < 0) return err; } @@ -1089,22 +1253,30 @@ static int do_lookup(struct nameidata *nd, struct qstr *name, nd->seq = seq; if (dentry->d_flags & DCACHE_OP_REVALIDATE) goto need_revalidate; +done2: path->mnt = mnt; path->dentry = dentry; - __follow_mount_rcu(nd, path, inode); - } else { - dentry = __d_lookup(parent, name); - if (!dentry) - goto need_lookup; + if (likely(__follow_mount_rcu(nd, path, inode, false))) + return 0; + if (nameidata_drop_rcu(nd)) + return -ECHILD; + /* fallthru */ + } + dentry = __d_lookup(parent, name); + if (!dentry) + goto need_lookup; found: - if (dentry->d_flags & DCACHE_OP_REVALIDATE) - goto need_revalidate; + if (dentry->d_flags & DCACHE_OP_REVALIDATE) + goto need_revalidate; done: - path->mnt = mnt; - path->dentry = dentry; - __follow_mount(path); - *inode = path->dentry->d_inode; - } + path->mnt = mnt; + path->dentry = dentry; + err = follow_managed(path, nd->flags); + if (unlikely(err < 0)) { + path_put_conditional(path, nd); + return err; + } + *inode = path->dentry->d_inode; return 0; need_lookup: @@ -1143,6 +1315,8 @@ need_revalidate: goto need_lookup; if (IS_ERR(dentry)) goto fail; + if (nd->flags & LOOKUP_RCU) + goto done2; goto done; fail: @@ -1150,17 +1324,6 @@ fail: } /* - * This is a temporary kludge to deal with "automount" symlinks; proper - * solution is to trigger them on follow_mount(), so that do_lookup() - * would DTRT. To be killed before 2.6.34-final. - */ -static inline int follow_on_final(struct inode *inode, unsigned lookup_flags) -{ - return inode && unlikely(inode->i_op->follow_link) && - ((lookup_flags & LOOKUP_FOLLOW) || S_ISDIR(inode->i_mode)); -} - -/* * Name resolution. * This is the basic name resolution function, turning a pathname into * the final dentry. We expect 'base' to be positive and a directory. @@ -1298,7 +1461,8 @@ last_component: err = do_lookup(nd, &this, &next, &inode); if (err) break; - if (follow_on_final(inode, lookup_flags)) { + if (inode && unlikely(inode->i_op->follow_link) && + (lookup_flags & LOOKUP_FOLLOW)) { if (nameidata_dentry_drop_rcu_maybe(nd, next.dentry)) return -ECHILD; BUG_ON(inode != next.dentry->d_inode); @@ -2200,11 +2364,9 @@ static struct file *do_last(struct nameidata *nd, struct path *path, if (open_flag & O_EXCL) goto exit_dput; - if (__follow_mount(path)) { - error = -ELOOP; - if (open_flag & O_NOFOLLOW) - goto exit_dput; - } + error = follow_managed(path, nd->flags); + if (error < 0) + goto exit_dput; error = -ENOENT; if (!path->dentry->d_inode) @@ -2353,8 +2515,7 @@ reval: struct inode *linki = link.dentry->d_inode; void *cookie; error = -ELOOP; - /* S_ISDIR part is a temporary automount kludge */ - if (!(nd.flags & LOOKUP_FOLLOW) && !S_ISDIR(linki->i_mode)) + if (!(nd.flags & LOOKUP_FOLLOW)) goto exit_dput; if (count++ == 32) goto exit_dput; @@ -3413,6 +3574,7 @@ const struct inode_operations page_symlink_inode_operations = { }; EXPORT_SYMBOL(user_path_at); +EXPORT_SYMBOL(follow_down_one); EXPORT_SYMBOL(follow_down); EXPORT_SYMBOL(follow_up); EXPORT_SYMBOL(get_write_access); /* binfmt_aout */ diff --git a/fs/namespace.c b/fs/namespace.c index 3ddfd90..7b0b953 100644 --- a/fs/namespace.c +++ b/fs/namespace.c @@ -183,7 +183,7 @@ static inline void mnt_dec_count(struct vfsmount *mnt) unsigned int mnt_get_count(struct vfsmount *mnt) { #ifdef CONFIG_SMP - unsigned int count = atomic_read(&mnt->mnt_longrefs); + unsigned int count = 0; int cpu; for_each_possible_cpu(cpu) { @@ -217,7 +217,7 @@ struct vfsmount *alloc_vfsmnt(const char *name) if (!mnt->mnt_pcp) goto out_free_devname; - atomic_set(&mnt->mnt_longrefs, 1); + this_cpu_add(mnt->mnt_pcp->mnt_count, 1); #else mnt->mnt_count = 1; mnt->mnt_writers = 0; @@ -611,6 +611,21 @@ static void attach_mnt(struct vfsmount *mnt, struct path *path) list_add_tail(&mnt->mnt_child, &path->mnt->mnt_mounts); } +static inline void __mnt_make_longterm(struct vfsmount *mnt) +{ +#ifdef CONFIG_SMP + atomic_inc(&mnt->mnt_longterm); +#endif +} + +/* needs vfsmount lock for write */ +static inline void __mnt_make_shortterm(struct vfsmount *mnt) +{ +#ifdef CONFIG_SMP + atomic_dec(&mnt->mnt_longterm); +#endif +} + /* * vfsmount lock must be held for write */ @@ -624,8 +639,11 @@ static void commit_tree(struct vfsmount *mnt) BUG_ON(parent == mnt); list_add_tail(&head, &mnt->mnt_list); - list_for_each_entry(m, &head, mnt_list) + list_for_each_entry(m, &head, mnt_list) { m->mnt_ns = n; + __mnt_make_longterm(m); + } + list_splice(&head, n->list.prev); list_add_tail(&mnt->mnt_hash, mount_hashtable + @@ -734,51 +752,30 @@ static inline void mntfree(struct vfsmount *mnt) deactivate_super(sb); } -#ifdef CONFIG_SMP -static inline void __mntput(struct vfsmount *mnt, int longrefs) +static void mntput_no_expire(struct vfsmount *mnt) { - if (!longrefs) { put_again: - br_read_lock(vfsmount_lock); - if (likely(atomic_read(&mnt->mnt_longrefs))) { - mnt_dec_count(mnt); - br_read_unlock(vfsmount_lock); - return; - } +#ifdef CONFIG_SMP + br_read_lock(vfsmount_lock); + if (likely(atomic_read(&mnt->mnt_longterm))) { + mnt_dec_count(mnt); br_read_unlock(vfsmount_lock); - } else { - BUG_ON(!atomic_read(&mnt->mnt_longrefs)); - if (atomic_add_unless(&mnt->mnt_longrefs, -1, 1)) - return; + return; } + br_read_unlock(vfsmount_lock); br_write_lock(vfsmount_lock); - if (!longrefs) - mnt_dec_count(mnt); - else - atomic_dec(&mnt->mnt_longrefs); + mnt_dec_count(mnt); if (mnt_get_count(mnt)) { br_write_unlock(vfsmount_lock); return; } - if (unlikely(mnt->mnt_pinned)) { - mnt_add_count(mnt, mnt->mnt_pinned + 1); - mnt->mnt_pinned = 0; - br_write_unlock(vfsmount_lock); - acct_auto_close_mnt(mnt); - goto put_again; - } - br_write_unlock(vfsmount_lock); - mntfree(mnt); -} #else -static inline void __mntput(struct vfsmount *mnt, int longrefs) -{ -put_again: mnt_dec_count(mnt); if (likely(mnt_get_count(mnt))) return; br_write_lock(vfsmount_lock); +#endif if (unlikely(mnt->mnt_pinned)) { mnt_add_count(mnt, mnt->mnt_pinned + 1); mnt->mnt_pinned = 0; @@ -789,12 +786,6 @@ put_again: br_write_unlock(vfsmount_lock); mntfree(mnt); } -#endif - -static void mntput_no_expire(struct vfsmount *mnt) -{ - __mntput(mnt, 0); -} void mntput(struct vfsmount *mnt) { @@ -802,7 +793,7 @@ void mntput(struct vfsmount *mnt) /* avoid cacheline pingpong, hope gcc doesn't get "smart" */ if (unlikely(mnt->mnt_expiry_mark)) mnt->mnt_expiry_mark = 0; - __mntput(mnt, 0); + mntput_no_expire(mnt); } } EXPORT_SYMBOL(mntput); @@ -815,33 +806,6 @@ struct vfsmount *mntget(struct vfsmount *mnt) } EXPORT_SYMBOL(mntget); -void mntput_long(struct vfsmount *mnt) -{ -#ifdef CONFIG_SMP - if (mnt) { - /* avoid cacheline pingpong, hope gcc doesn't get "smart" */ - if (unlikely(mnt->mnt_expiry_mark)) - mnt->mnt_expiry_mark = 0; - __mntput(mnt, 1); - } -#else - mntput(mnt); -#endif -} -EXPORT_SYMBOL(mntput_long); - -struct vfsmount *mntget_long(struct vfsmount *mnt) -{ -#ifdef CONFIG_SMP - if (mnt) - atomic_inc(&mnt->mnt_longrefs); - return mnt; -#else - return mntget(mnt); -#endif -} -EXPORT_SYMBOL(mntget_long); - void mnt_pin(struct vfsmount *mnt) { br_write_lock(vfsmount_lock); @@ -1216,7 +1180,7 @@ void release_mounts(struct list_head *head) dput(dentry); mntput(m); } - mntput_long(mnt); + mntput(mnt); } } @@ -1226,19 +1190,21 @@ void release_mounts(struct list_head *head) */ void umount_tree(struct vfsmount *mnt, int propagate, struct list_head *kill) { + LIST_HEAD(tmp_list); struct vfsmount *p; for (p = mnt; p; p = next_mnt(p, mnt)) - list_move(&p->mnt_hash, kill); + list_move(&p->mnt_hash, &tmp_list); if (propagate) - propagate_umount(kill); + propagate_umount(&tmp_list); - list_for_each_entry(p, kill, mnt_hash) { + list_for_each_entry(p, &tmp_list, mnt_hash) { list_del_init(&p->mnt_expire); list_del_init(&p->mnt_list); __touch_mnt_namespace(p->mnt_ns); p->mnt_ns = NULL; + __mnt_make_shortterm(p); list_del_init(&p->mnt_child); if (p->mnt_parent != p) { p->mnt_parent->mnt_ghosts++; @@ -1246,6 +1212,7 @@ void umount_tree(struct vfsmount *mnt, int propagate, struct list_head *kill) } change_mnt_propagation(p, MS_PRIVATE); } + list_splice(&tmp_list, kill); } static void shrink_submounts(struct vfsmount *mnt, struct list_head *umounts); @@ -1844,9 +1811,10 @@ static int do_move_mount(struct path *path, char *old_name) return err; down_write(&namespace_sem); - while (d_mountpoint(path->dentry) && - follow_down(path)) - ; + err = follow_down(path, true); + if (err < 0) + goto out; + err = -EINVAL; if (!check_mnt(path->mnt) || !check_mnt(old_path.mnt)) goto out; @@ -1904,6 +1872,8 @@ out: return err; } +static int do_add_mount(struct vfsmount *, struct path *, int); + /* * create a new mount for userspace and request it to be added into the * namespace's tree @@ -1912,6 +1882,7 @@ static int do_new_mount(struct path *path, char *type, int flags, int mnt_flags, char *name, void *data) { struct vfsmount *mnt; + int err; if (!type) return -EINVAL; @@ -1924,15 +1895,47 @@ static int do_new_mount(struct path *path, char *type, int flags, if (IS_ERR(mnt)) return PTR_ERR(mnt); - return do_add_mount(mnt, path, mnt_flags, NULL); + err = do_add_mount(mnt, path, mnt_flags); + if (err) + mntput(mnt); + return err; +} + +int finish_automount(struct vfsmount *m, struct path *path) +{ + int err; + /* The new mount record should have at least 2 refs to prevent it being + * expired before we get a chance to add it + */ + BUG_ON(mnt_get_count(m) < 2); + + if (m->mnt_sb == path->mnt->mnt_sb && + m->mnt_root == path->dentry) { + err = -ELOOP; + goto fail; + } + + err = do_add_mount(m, path, path->mnt->mnt_flags | MNT_SHRINKABLE); + if (!err) + return 0; +fail: + /* remove m from any expiration list it may be on */ + if (!list_empty(&m->mnt_expire)) { + down_write(&namespace_sem); + br_write_lock(vfsmount_lock); + list_del_init(&m->mnt_expire); + br_write_unlock(vfsmount_lock); + up_write(&namespace_sem); + } + mntput(m); + mntput(m); + return err; } /* * add a mount into a namespace's mount tree - * - provide the option of adding the new mount to an expiration list */ -int do_add_mount(struct vfsmount *newmnt, struct path *path, - int mnt_flags, struct list_head *fslist) +static int do_add_mount(struct vfsmount *newmnt, struct path *path, int mnt_flags) { int err; @@ -1940,9 +1943,10 @@ int do_add_mount(struct vfsmount *newmnt, struct path *path, down_write(&namespace_sem); /* Something was mounted here while we slept */ - while (d_mountpoint(path->dentry) && - follow_down(path)) - ; + err = follow_down(path, true); + if (err < 0) + goto unlock; + err = -EINVAL; if (!(mnt_flags & MNT_SHRINKABLE) && !check_mnt(path->mnt)) goto unlock; @@ -1958,22 +1962,29 @@ int do_add_mount(struct vfsmount *newmnt, struct path *path, goto unlock; newmnt->mnt_flags = mnt_flags; - if ((err = graft_tree(newmnt, path))) - goto unlock; - - if (fslist) /* add to the specified expiration list */ - list_add_tail(&newmnt->mnt_expire, fslist); - - up_write(&namespace_sem); - return 0; + err = graft_tree(newmnt, path); unlock: up_write(&namespace_sem); - mntput_long(newmnt); return err; } -EXPORT_SYMBOL_GPL(do_add_mount); +/** + * mnt_set_expiry - Put a mount on an expiration list + * @mnt: The mount to list. + * @expiry_list: The list to add the mount to. + */ +void mnt_set_expiry(struct vfsmount *mnt, struct list_head *expiry_list) +{ + down_write(&namespace_sem); + br_write_lock(vfsmount_lock); + + list_add_tail(&mnt->mnt_expire, expiry_list); + + br_write_unlock(vfsmount_lock); + up_write(&namespace_sem); +} +EXPORT_SYMBOL(mnt_set_expiry); /* * process a list of expirable mountpoints with the intent of discarding any @@ -2262,6 +2273,22 @@ static struct mnt_namespace *alloc_mnt_ns(void) return new_ns; } +void mnt_make_longterm(struct vfsmount *mnt) +{ + __mnt_make_longterm(mnt); +} + +void mnt_make_shortterm(struct vfsmount *mnt) +{ +#ifdef CONFIG_SMP + if (atomic_add_unless(&mnt->mnt_longterm, -1, 1)) + return; + br_write_lock(vfsmount_lock); + atomic_dec(&mnt->mnt_longterm); + br_write_unlock(vfsmount_lock); +#endif +} + /* * Allocate a new namespace structure and populate it with contents * copied from the namespace of the passed in task structure. @@ -2299,14 +2326,19 @@ static struct mnt_namespace *dup_mnt_ns(struct mnt_namespace *mnt_ns, q = new_ns->root; while (p) { q->mnt_ns = new_ns; + __mnt_make_longterm(q); if (fs) { if (p == fs->root.mnt) { + fs->root.mnt = mntget(q); + __mnt_make_longterm(q); + mnt_make_shortterm(p); rootmnt = p; - fs->root.mnt = mntget_long(q); } if (p == fs->pwd.mnt) { + fs->pwd.mnt = mntget(q); + __mnt_make_longterm(q); + mnt_make_shortterm(p); pwdmnt = p; - fs->pwd.mnt = mntget_long(q); } } p = next_mnt(p, mnt_ns->root); @@ -2315,9 +2347,9 @@ static struct mnt_namespace *dup_mnt_ns(struct mnt_namespace *mnt_ns, up_write(&namespace_sem); if (rootmnt) - mntput_long(rootmnt); + mntput(rootmnt); if (pwdmnt) - mntput_long(pwdmnt); + mntput(pwdmnt); return new_ns; } @@ -2350,6 +2382,7 @@ struct mnt_namespace *create_mnt_ns(struct vfsmount *mnt) new_ns = alloc_mnt_ns(); if (!IS_ERR(new_ns)) { mnt->mnt_ns = new_ns; + __mnt_make_longterm(mnt); new_ns->root = mnt; list_add(&new_ns->list, &new_ns->root->mnt_list); } diff --git a/fs/nfs/dir.c b/fs/nfs/dir.c index df8c03a..2c3eb33 100644 --- a/fs/nfs/dir.c +++ b/fs/nfs/dir.c @@ -970,7 +970,7 @@ int nfs_lookup_verify_inode(struct inode *inode, struct nameidata *nd) { struct nfs_server *server = NFS_SERVER(inode); - if (test_bit(NFS_INO_MOUNTPOINT, &NFS_I(inode)->flags)) + if (IS_AUTOMOUNT(inode)) return 0; if (nd != NULL) { /* VFS wants an on-the-wire revalidation */ @@ -1173,6 +1173,7 @@ const struct dentry_operations nfs_dentry_operations = { .d_revalidate = nfs_lookup_revalidate, .d_delete = nfs_dentry_delete, .d_iput = nfs_dentry_iput, + .d_automount = nfs_d_automount, }; static struct dentry *nfs_lookup(struct inode *dir, struct dentry * dentry, struct nameidata *nd) @@ -1246,6 +1247,7 @@ const struct dentry_operations nfs4_dentry_operations = { .d_revalidate = nfs_open_revalidate, .d_delete = nfs_dentry_delete, .d_iput = nfs_dentry_iput, + .d_automount = nfs_d_automount, }; /* diff --git a/fs/nfs/inode.c b/fs/nfs/inode.c index ce00b70..d851242 100644 --- a/fs/nfs/inode.c +++ b/fs/nfs/inode.c @@ -300,7 +300,7 @@ nfs_fhget(struct super_block *sb, struct nfs_fh *fh, struct nfs_fattr *fattr) else inode->i_op = &nfs_mountpoint_inode_operations; inode->i_fop = NULL; - set_bit(NFS_INO_MOUNTPOINT, &nfsi->flags); + inode->i_flags |= S_AUTOMOUNT; } } else if (S_ISLNK(inode->i_mode)) inode->i_op = &nfs_symlink_inode_operations; @@ -1208,7 +1208,7 @@ static int nfs_update_inode(struct inode *inode, struct nfs_fattr *fattr) /* Update the fsid? */ if (S_ISDIR(inode->i_mode) && (fattr->valid & NFS_ATTR_FATTR_FSID) && !nfs_fsid_equal(&server->fsid, &fattr->fsid) && - !test_bit(NFS_INO_MOUNTPOINT, &nfsi->flags)) + !IS_AUTOMOUNT(inode)) server->fsid = fattr->fsid; /* diff --git a/fs/nfs/internal.h b/fs/nfs/internal.h index bfa3a34..4644f04 100644 --- a/fs/nfs/internal.h +++ b/fs/nfs/internal.h @@ -252,6 +252,7 @@ extern char *nfs_path(const char *base, const struct dentry *droot, const struct dentry *dentry, char *buffer, ssize_t buflen); +extern struct vfsmount *nfs_d_automount(struct path *path); /* getroot.c */ extern struct dentry *nfs_get_root(struct super_block *, struct nfs_fh *); diff --git a/fs/nfs/namespace.c b/fs/nfs/namespace.c index 74aaf39..f32b860 100644 --- a/fs/nfs/namespace.c +++ b/fs/nfs/namespace.c @@ -97,9 +97,8 @@ Elong: } /* - * nfs_follow_mountpoint - handle crossing a mountpoint on the server - * @dentry - dentry of mountpoint - * @nd - nameidata info + * nfs_d_automount - Handle crossing a mountpoint on the server + * @path - The mountpoint * * When we encounter a mountpoint on the server, we want to set up * a mountpoint on the client too, to prevent inode numbers from @@ -109,87 +108,65 @@ Elong: * situation, and that different filesystems may want to use * different security flavours. */ -static void * nfs_follow_mountpoint(struct dentry *dentry, struct nameidata *nd) +struct vfsmount *nfs_d_automount(struct path *path) { struct vfsmount *mnt; - struct nfs_server *server = NFS_SERVER(dentry->d_inode); + struct nfs_server *server = NFS_SERVER(path->dentry->d_inode); struct dentry *parent; struct nfs_fh *fh = NULL; struct nfs_fattr *fattr = NULL; int err; - dprintk("--> nfs_follow_mountpoint()\n"); + dprintk("--> nfs_d_automount()\n"); - err = -ESTALE; - if (IS_ROOT(dentry)) - goto out_err; + mnt = ERR_PTR(-ESTALE); + if (IS_ROOT(path->dentry)) + goto out_nofree; - err = -ENOMEM; + mnt = ERR_PTR(-ENOMEM); fh = nfs_alloc_fhandle(); fattr = nfs_alloc_fattr(); if (fh == NULL || fattr == NULL) - goto out_err; + goto out; dprintk("%s: enter\n", __func__); - dput(nd->path.dentry); - nd->path.dentry = dget(dentry); - /* Look it up again */ - parent = dget_parent(nd->path.dentry); + /* Look it up again to get its attributes */ + parent = dget_parent(path->dentry); err = server->nfs_client->rpc_ops->lookup(parent->d_inode, - &nd->path.dentry->d_name, + &path->dentry->d_name, fh, fattr); dput(parent); - if (err != 0) - goto out_err; + if (err != 0) { + mnt = ERR_PTR(err); + goto out; + } if (fattr->valid & NFS_ATTR_FATTR_V4_REFERRAL) - mnt = nfs_do_refmount(nd->path.mnt, nd->path.dentry); + mnt = nfs_do_refmount(path->mnt, path->dentry); else - mnt = nfs_do_submount(nd->path.mnt, nd->path.dentry, fh, - fattr); - err = PTR_ERR(mnt); + mnt = nfs_do_submount(path->mnt, path->dentry, fh, fattr); if (IS_ERR(mnt)) - goto out_err; + goto out; - mntget(mnt); - err = do_add_mount(mnt, &nd->path, nd->path.mnt->mnt_flags|MNT_SHRINKABLE, - &nfs_automount_list); - if (err < 0) { - mntput(mnt); - if (err == -EBUSY) - goto out_follow; - goto out_err; - } - path_put(&nd->path); - nd->path.mnt = mnt; - nd->path.dentry = dget(mnt->mnt_root); + dprintk("%s: done, success\n", __func__); + mntget(mnt); /* prevent immediate expiration */ + mnt_set_expiry(mnt, &nfs_automount_list); schedule_delayed_work(&nfs_automount_task, nfs_mountpoint_expiry_timeout); + out: nfs_free_fattr(fattr); nfs_free_fhandle(fh); - dprintk("%s: done, returned %d\n", __func__, err); - - dprintk("<-- nfs_follow_mountpoint() = %d\n", err); - return ERR_PTR(err); -out_err: - path_put(&nd->path); - goto out; -out_follow: - while (d_mountpoint(nd->path.dentry) && - follow_down(&nd->path)) - ; - err = 0; - goto out; +out_nofree: + dprintk("<-- nfs_follow_mountpoint() = %p\n", mnt); + return mnt; } const struct inode_operations nfs_mountpoint_inode_operations = { - .follow_link = nfs_follow_mountpoint, .getattr = nfs_getattr, }; const struct inode_operations nfs_referral_inode_operations = { - .follow_link = nfs_follow_mountpoint, }; static void nfs_expire_automounts(struct work_struct *work) diff --git a/fs/nfsd/vfs.c b/fs/nfsd/vfs.c index a3c7f70..641117f 100644 --- a/fs/nfsd/vfs.c +++ b/fs/nfsd/vfs.c @@ -87,8 +87,9 @@ nfsd_cross_mnt(struct svc_rqst *rqstp, struct dentry **dpp, .dentry = dget(dentry)}; int err = 0; - while (d_mountpoint(path.dentry) && follow_down(&path)) - ; + err = follow_down(&path, false); + if (err < 0) + goto out; exp2 = rqst_exp_get_by_name(rqstp, &path); if (IS_ERR(exp2)) { diff --git a/fs/ocfs2/Kconfig b/fs/ocfs2/Kconfig index ab152c0..77a8de5 100644 --- a/fs/ocfs2/Kconfig +++ b/fs/ocfs2/Kconfig @@ -1,7 +1,6 @@ config OCFS2_FS tristate "OCFS2 file system support" - depends on NET && SYSFS - select CONFIGFS_FS + depends on NET && SYSFS && CONFIGFS_FS select JBD2 select CRC32 select QUOTA diff --git a/fs/ocfs2/file.c b/fs/ocfs2/file.c index 63e3fca..a665195 100644 --- a/fs/ocfs2/file.c +++ b/fs/ocfs2/file.c @@ -1989,20 +1989,20 @@ int ocfs2_change_file_space(struct file *file, unsigned int cmd, return __ocfs2_change_file_space(file, inode, file->f_pos, cmd, sr, 0); } -static long ocfs2_fallocate(struct inode *inode, int mode, loff_t offset, +static long ocfs2_fallocate(struct file *file, int mode, loff_t offset, loff_t len) { + struct inode *inode = file->f_path.dentry->d_inode; struct ocfs2_super *osb = OCFS2_SB(inode->i_sb); struct ocfs2_space_resv sr; int change_size = 1; int cmd = OCFS2_IOC_RESVSP64; + if (mode & ~(FALLOC_FL_KEEP_SIZE | FALLOC_FL_PUNCH_HOLE)) + return -EOPNOTSUPP; if (!ocfs2_writes_unwritten_extents(osb)) return -EOPNOTSUPP; - if (S_ISDIR(inode->i_mode)) - return -ENODEV; - if (mode & FALLOC_FL_KEEP_SIZE) change_size = 0; @@ -2610,7 +2610,6 @@ const struct inode_operations ocfs2_file_iops = { .getxattr = generic_getxattr, .listxattr = ocfs2_listxattr, .removexattr = generic_removexattr, - .fallocate = ocfs2_fallocate, .fiemap = ocfs2_fiemap, }; @@ -2642,6 +2641,7 @@ const struct file_operations ocfs2_fops = { .flock = ocfs2_flock, .splice_read = ocfs2_file_splice_read, .splice_write = ocfs2_file_splice_write, + .fallocate = ocfs2_fallocate, }; const struct file_operations ocfs2_dops = { @@ -255,10 +255,10 @@ int do_fallocate(struct file *file, int mode, loff_t offset, loff_t len) if (((offset + len) > inode->i_sb->s_maxbytes) || ((offset + len) < 0)) return -EFBIG; - if (!inode->i_op->fallocate) + if (!file->f_op->fallocate) return -EOPNOTSUPP; - return inode->i_op->fallocate(inode, mode, offset, len); + return file->f_op->fallocate(file, mode, offset, len); } SYSCALL_DEFINE(fallocate)(int fd, int mode, loff_t offset, loff_t len) @@ -1292,7 +1292,7 @@ static int __init init_pipe_fs(void) static void __exit exit_pipe_fs(void) { unregister_filesystem(&pipe_fs_type); - mntput_long(pipe_mnt); + mntput(pipe_mnt); } fs_initcall(init_pipe_fs); diff --git a/fs/squashfs/Kconfig b/fs/squashfs/Kconfig index e5f63da..aa68a8a 100644 --- a/fs/squashfs/Kconfig +++ b/fs/squashfs/Kconfig @@ -29,7 +29,6 @@ config SQUASHFS config SQUASHFS_XATTR bool "Squashfs XATTR support" depends on SQUASHFS - default n help Saying Y here includes support for extended attributes (xattrs). Xattrs are name:value pairs associated with inodes by @@ -40,7 +39,6 @@ config SQUASHFS_XATTR config SQUASHFS_LZO bool "Include support for LZO compressed file systems" depends on SQUASHFS - default n select LZO_DECOMPRESS help Saying Y here includes support for reading Squashfs file systems @@ -53,10 +51,24 @@ config SQUASHFS_LZO If unsure, say N. +config SQUASHFS_XZ + bool "Include support for XZ compressed file systems" + depends on SQUASHFS + select XZ_DEC + help + Saying Y here includes support for reading Squashfs file systems + compressed with XZ compresssion. XZ gives better compression than + the default zlib compression, at the expense of greater CPU and + memory overhead. + + XZ is not the standard compression used in Squashfs and so most + file systems will be readable without selecting this option. + + If unsure, say N. + config SQUASHFS_EMBEDDED bool "Additional option for memory-constrained systems" depends on SQUASHFS - default n help Saying Y here allows you to specify cache size. diff --git a/fs/squashfs/Makefile b/fs/squashfs/Makefile index 7672bac..cecf2be 100644 --- a/fs/squashfs/Makefile +++ b/fs/squashfs/Makefile @@ -7,3 +7,4 @@ squashfs-y += block.o cache.o dir.o export.o file.o fragment.o id.o inode.o squashfs-y += namei.o super.o symlink.o zlib_wrapper.o decompressor.o squashfs-$(CONFIG_SQUASHFS_XATTR) += xattr.o xattr_id.o squashfs-$(CONFIG_SQUASHFS_LZO) += lzo_wrapper.o +squashfs-$(CONFIG_SQUASHFS_XZ) += xz_wrapper.o diff --git a/fs/squashfs/block.c b/fs/squashfs/block.c index 653c030..2fb2882 100644 --- a/fs/squashfs/block.c +++ b/fs/squashfs/block.c @@ -34,7 +34,6 @@ #include "squashfs_fs.h" #include "squashfs_fs_sb.h" -#include "squashfs_fs_i.h" #include "squashfs.h" #include "decompressor.h" diff --git a/fs/squashfs/cache.c b/fs/squashfs/cache.c index 57314be..26b15ae 100644 --- a/fs/squashfs/cache.c +++ b/fs/squashfs/cache.c @@ -55,7 +55,6 @@ #include "squashfs_fs.h" #include "squashfs_fs_sb.h" -#include "squashfs_fs_i.h" #include "squashfs.h" /* diff --git a/fs/squashfs/decompressor.c b/fs/squashfs/decompressor.c index 24af9ce..a5940e5 100644 --- a/fs/squashfs/decompressor.c +++ b/fs/squashfs/decompressor.c @@ -27,7 +27,6 @@ #include "squashfs_fs.h" #include "squashfs_fs_sb.h" -#include "squashfs_fs_i.h" #include "decompressor.h" #include "squashfs.h" @@ -41,23 +40,26 @@ static const struct squashfs_decompressor squashfs_lzma_unsupported_comp_ops = { }; #ifndef CONFIG_SQUASHFS_LZO -static const struct squashfs_decompressor squashfs_lzo_unsupported_comp_ops = { +static const struct squashfs_decompressor squashfs_lzo_comp_ops = { NULL, NULL, NULL, LZO_COMPRESSION, "lzo", 0 }; #endif +#ifndef CONFIG_SQUASHFS_XZ +static const struct squashfs_decompressor squashfs_xz_comp_ops = { + NULL, NULL, NULL, XZ_COMPRESSION, "xz", 0 +}; +#endif + static const struct squashfs_decompressor squashfs_unknown_comp_ops = { NULL, NULL, NULL, 0, "unknown", 0 }; static const struct squashfs_decompressor *decompressor[] = { &squashfs_zlib_comp_ops, - &squashfs_lzma_unsupported_comp_ops, -#ifdef CONFIG_SQUASHFS_LZO &squashfs_lzo_comp_ops, -#else - &squashfs_lzo_unsupported_comp_ops, -#endif + &squashfs_xz_comp_ops, + &squashfs_lzma_unsupported_comp_ops, &squashfs_unknown_comp_ops }; diff --git a/fs/squashfs/decompressor.h b/fs/squashfs/decompressor.h index 7425f80..3b305a7 100644 --- a/fs/squashfs/decompressor.h +++ b/fs/squashfs/decompressor.h @@ -52,4 +52,13 @@ static inline int squashfs_decompress(struct squashfs_sb_info *msblk, return msblk->decompressor->decompress(msblk, buffer, bh, b, offset, length, srclength, pages); } + +#ifdef CONFIG_SQUASHFS_XZ +extern const struct squashfs_decompressor squashfs_xz_comp_ops; +#endif + +#ifdef CONFIG_SQUASHFS_LZO +extern const struct squashfs_decompressor squashfs_lzo_comp_ops; +#endif + #endif diff --git a/fs/squashfs/fragment.c b/fs/squashfs/fragment.c index 7c90bbd..7eef571 100644 --- a/fs/squashfs/fragment.c +++ b/fs/squashfs/fragment.c @@ -39,7 +39,6 @@ #include "squashfs_fs.h" #include "squashfs_fs_sb.h" -#include "squashfs_fs_i.h" #include "squashfs.h" /* diff --git a/fs/squashfs/id.c b/fs/squashfs/id.c index b7f64bc..d8f3245 100644 --- a/fs/squashfs/id.c +++ b/fs/squashfs/id.c @@ -37,7 +37,6 @@ #include "squashfs_fs.h" #include "squashfs_fs_sb.h" -#include "squashfs_fs_i.h" #include "squashfs.h" /* diff --git a/fs/squashfs/lzo_wrapper.c b/fs/squashfs/lzo_wrapper.c index 5d87789..7da759e 100644 --- a/fs/squashfs/lzo_wrapper.c +++ b/fs/squashfs/lzo_wrapper.c @@ -29,7 +29,6 @@ #include "squashfs_fs.h" #include "squashfs_fs_sb.h" -#include "squashfs_fs_i.h" #include "squashfs.h" #include "decompressor.h" diff --git a/fs/squashfs/squashfs.h b/fs/squashfs/squashfs.h index 5d45569..ba729d8 100644 --- a/fs/squashfs/squashfs.h +++ b/fs/squashfs/squashfs.h @@ -27,11 +27,6 @@ #define WARNING(s, args...) pr_warning("SQUASHFS: "s, ## args) -static inline struct squashfs_inode_info *squashfs_i(struct inode *inode) -{ - return list_entry(inode, struct squashfs_inode_info, vfs_inode); -} - /* block.c */ extern int squashfs_read_data(struct super_block *, void **, u64, int, u64 *, int, int); @@ -104,6 +99,3 @@ extern const struct xattr_handler *squashfs_xattr_handlers[]; /* zlib_wrapper.c */ extern const struct squashfs_decompressor squashfs_zlib_comp_ops; - -/* lzo_wrapper.c */ -extern const struct squashfs_decompressor squashfs_lzo_comp_ops; diff --git a/fs/squashfs/squashfs_fs.h b/fs/squashfs/squashfs_fs.h index c5137fc..39533fe 100644 --- a/fs/squashfs/squashfs_fs.h +++ b/fs/squashfs/squashfs_fs.h @@ -238,6 +238,7 @@ struct meta_index { #define ZLIB_COMPRESSION 1 #define LZMA_COMPRESSION 2 #define LZO_COMPRESSION 3 +#define XZ_COMPRESSION 4 struct squashfs_super_block { __le32 s_magic; diff --git a/fs/squashfs/squashfs_fs_i.h b/fs/squashfs/squashfs_fs_i.h index d3e3a37..359baef 100644 --- a/fs/squashfs/squashfs_fs_i.h +++ b/fs/squashfs/squashfs_fs_i.h @@ -45,4 +45,10 @@ struct squashfs_inode_info { }; struct inode vfs_inode; }; + + +static inline struct squashfs_inode_info *squashfs_i(struct inode *inode) +{ + return list_entry(inode, struct squashfs_inode_info, vfs_inode); +} #endif diff --git a/fs/squashfs/xattr_id.c b/fs/squashfs/xattr_id.c index d33be5d..05385db 100644 --- a/fs/squashfs/xattr_id.c +++ b/fs/squashfs/xattr_id.c @@ -32,7 +32,6 @@ #include "squashfs_fs.h" #include "squashfs_fs_sb.h" -#include "squashfs_fs_i.h" #include "squashfs.h" #include "xattr.h" diff --git a/fs/squashfs/xz_wrapper.c b/fs/squashfs/xz_wrapper.c new file mode 100644 index 0000000..856756c --- /dev/null +++ b/fs/squashfs/xz_wrapper.c @@ -0,0 +1,153 @@ +/* + * Squashfs - a compressed read only filesystem for Linux + * + * Copyright (c) 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010 + * Phillip Lougher <phillip@lougher.demon.co.uk> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2, + * or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. + * + * xz_wrapper.c + */ + + +#include <linux/mutex.h> +#include <linux/buffer_head.h> +#include <linux/slab.h> +#include <linux/xz.h> + +#include "squashfs_fs.h" +#include "squashfs_fs_sb.h" +#include "squashfs_fs_i.h" +#include "squashfs.h" +#include "decompressor.h" + +struct squashfs_xz { + struct xz_dec *state; + struct xz_buf buf; +}; + +static void *squashfs_xz_init(struct squashfs_sb_info *msblk) +{ + int block_size = max_t(int, msblk->block_size, SQUASHFS_METADATA_SIZE); + + struct squashfs_xz *stream = kmalloc(sizeof(*stream), GFP_KERNEL); + if (stream == NULL) + goto failed; + + stream->state = xz_dec_init(XZ_PREALLOC, block_size); + if (stream->state == NULL) + goto failed; + + return stream; + +failed: + ERROR("Failed to allocate xz workspace\n"); + kfree(stream); + return NULL; +} + + +static void squashfs_xz_free(void *strm) +{ + struct squashfs_xz *stream = strm; + + if (stream) { + xz_dec_end(stream->state); + kfree(stream); + } +} + + +static int squashfs_xz_uncompress(struct squashfs_sb_info *msblk, void **buffer, + struct buffer_head **bh, int b, int offset, int length, int srclength, + int pages) +{ + enum xz_ret xz_err; + int avail, total = 0, k = 0, page = 0; + struct squashfs_xz *stream = msblk->stream; + + mutex_lock(&msblk->read_data_mutex); + + xz_dec_reset(stream->state); + stream->buf.in_pos = 0; + stream->buf.in_size = 0; + stream->buf.out_pos = 0; + stream->buf.out_size = PAGE_CACHE_SIZE; + stream->buf.out = buffer[page++]; + + do { + if (stream->buf.in_pos == stream->buf.in_size && k < b) { + avail = min(length, msblk->devblksize - offset); + length -= avail; + wait_on_buffer(bh[k]); + if (!buffer_uptodate(bh[k])) + goto release_mutex; + + if (avail == 0) { + offset = 0; + put_bh(bh[k++]); + continue; + } + + stream->buf.in = bh[k]->b_data + offset; + stream->buf.in_size = avail; + stream->buf.in_pos = 0; + offset = 0; + } + + if (stream->buf.out_pos == stream->buf.out_size + && page < pages) { + stream->buf.out = buffer[page++]; + stream->buf.out_pos = 0; + total += PAGE_CACHE_SIZE; + } + + xz_err = xz_dec_run(stream->state, &stream->buf); + + if (stream->buf.in_pos == stream->buf.in_size && k < b) + put_bh(bh[k++]); + } while (xz_err == XZ_OK); + + if (xz_err != XZ_STREAM_END) { + ERROR("xz_dec_run error, data probably corrupt\n"); + goto release_mutex; + } + + if (k < b) { + ERROR("xz_uncompress error, input remaining\n"); + goto release_mutex; + } + + total += stream->buf.out_pos; + mutex_unlock(&msblk->read_data_mutex); + return total; + +release_mutex: + mutex_unlock(&msblk->read_data_mutex); + + for (; k < b; k++) + put_bh(bh[k]); + + return -EIO; +} + +const struct squashfs_decompressor squashfs_xz_comp_ops = { + .init = squashfs_xz_init, + .free = squashfs_xz_free, + .decompress = squashfs_xz_uncompress, + .id = XZ_COMPRESSION, + .name = "xz", + .supported = 1 +}; diff --git a/fs/squashfs/zlib_wrapper.c b/fs/squashfs/zlib_wrapper.c index 7a60387..818a5e0 100644 --- a/fs/squashfs/zlib_wrapper.c +++ b/fs/squashfs/zlib_wrapper.c @@ -29,7 +29,6 @@ #include "squashfs_fs.h" #include "squashfs_fs_sb.h" -#include "squashfs_fs_i.h" #include "squashfs.h" #include "decompressor.h" @@ -66,8 +65,8 @@ static int zlib_uncompress(struct squashfs_sb_info *msblk, void **buffer, struct buffer_head **bh, int b, int offset, int length, int srclength, int pages) { - int zlib_err = 0, zlib_init = 0; - int avail, bytes, k = 0, page = 0; + int zlib_err, zlib_init = 0; + int k = 0, page = 0; z_stream *stream = msblk->stream; mutex_lock(&msblk->read_data_mutex); @@ -75,11 +74,10 @@ static int zlib_uncompress(struct squashfs_sb_info *msblk, void **buffer, stream->avail_out = 0; stream->avail_in = 0; - bytes = length; do { if (stream->avail_in == 0 && k < b) { - avail = min(bytes, msblk->devblksize - offset); - bytes -= avail; + int avail = min(length, msblk->devblksize - offset); + length -= avail; wait_on_buffer(bh[k]); if (!buffer_uptodate(bh[k])) goto release_mutex; @@ -128,6 +126,11 @@ static int zlib_uncompress(struct squashfs_sb_info *msblk, void **buffer, goto release_mutex; } + if (k < b) { + ERROR("zlib_uncompress error, data remaining\n"); + goto release_mutex; + } + length = stream->total_out; mutex_unlock(&msblk->read_data_mutex); return length; @@ -75,11 +75,13 @@ int vfs_fstatat(int dfd, const char __user *filename, struct kstat *stat, int error = -EINVAL; int lookup_flags = 0; - if ((flag & ~AT_SYMLINK_NOFOLLOW) != 0) + if ((flag & ~(AT_SYMLINK_NOFOLLOW | AT_NO_AUTOMOUNT)) != 0) goto out; if (!(flag & AT_SYMLINK_NOFOLLOW)) lookup_flags |= LOOKUP_FOLLOW; + if (flag & AT_NO_AUTOMOUNT) + lookup_flags |= LOOKUP_NO_AUTOMOUNT; error = user_path_at(dfd, filename, lookup_flags, &path); if (error) @@ -1141,7 +1141,7 @@ static struct vfsmount *fs_set_subtype(struct vfsmount *mnt, const char *fstype) return mnt; err: - mntput_long(mnt); + mntput(mnt); return ERR_PTR(err); } diff --git a/fs/xfs/linux-2.6/xfs_file.c b/fs/xfs/linux-2.6/xfs_file.c index ef51eb43e..a55c1b4 100644 --- a/fs/xfs/linux-2.6/xfs_file.c +++ b/fs/xfs/linux-2.6/xfs_file.c @@ -37,6 +37,7 @@ #include "xfs_trace.h" #include <linux/dcache.h> +#include <linux/falloc.h> static const struct vm_operations_struct xfs_file_vm_ops; @@ -882,6 +883,60 @@ out_unlock: return ret; } +STATIC long +xfs_file_fallocate( + struct file *file, + int mode, + loff_t offset, + loff_t len) +{ + struct inode *inode = file->f_path.dentry->d_inode; + long error; + loff_t new_size = 0; + xfs_flock64_t bf; + xfs_inode_t *ip = XFS_I(inode); + int cmd = XFS_IOC_RESVSP; + + if (mode & ~(FALLOC_FL_KEEP_SIZE | FALLOC_FL_PUNCH_HOLE)) + return -EOPNOTSUPP; + + bf.l_whence = 0; + bf.l_start = offset; + bf.l_len = len; + + xfs_ilock(ip, XFS_IOLOCK_EXCL); + + if (mode & FALLOC_FL_PUNCH_HOLE) + cmd = XFS_IOC_UNRESVSP; + + /* check the new inode size is valid before allocating */ + if (!(mode & FALLOC_FL_KEEP_SIZE) && + offset + len > i_size_read(inode)) { + new_size = offset + len; + error = inode_newsize_ok(inode, new_size); + if (error) + goto out_unlock; + } + + error = -xfs_change_file_space(ip, cmd, &bf, 0, XFS_ATTR_NOLOCK); + if (error) + goto out_unlock; + + /* Change file size if needed */ + if (new_size) { + struct iattr iattr; + + iattr.ia_valid = ATTR_SIZE; + iattr.ia_size = new_size; + error = -xfs_setattr(ip, &iattr, XFS_ATTR_NOLOCK); + } + +out_unlock: + xfs_iunlock(ip, XFS_IOLOCK_EXCL); + return error; +} + + STATIC int xfs_file_open( struct inode *inode, @@ -1000,6 +1055,7 @@ const struct file_operations xfs_file_operations = { .open = xfs_file_open, .release = xfs_file_release, .fsync = xfs_file_fsync, + .fallocate = xfs_file_fallocate, }; const struct file_operations xfs_dir_file_operations = { diff --git a/fs/xfs/linux-2.6/xfs_iops.c b/fs/xfs/linux-2.6/xfs_iops.c index da54403..bd57278 100644 --- a/fs/xfs/linux-2.6/xfs_iops.c +++ b/fs/xfs/linux-2.6/xfs_iops.c @@ -46,7 +46,6 @@ #include <linux/namei.h> #include <linux/posix_acl.h> #include <linux/security.h> -#include <linux/falloc.h> #include <linux/fiemap.h> #include <linux/slab.h> @@ -505,61 +504,6 @@ xfs_vn_setattr( return -xfs_setattr(XFS_I(dentry->d_inode), iattr, 0); } -STATIC long -xfs_vn_fallocate( - struct inode *inode, - int mode, - loff_t offset, - loff_t len) -{ - long error; - loff_t new_size = 0; - xfs_flock64_t bf; - xfs_inode_t *ip = XFS_I(inode); - int cmd = XFS_IOC_RESVSP; - - /* preallocation on directories not yet supported */ - error = -ENODEV; - if (S_ISDIR(inode->i_mode)) - goto out_error; - - bf.l_whence = 0; - bf.l_start = offset; - bf.l_len = len; - - xfs_ilock(ip, XFS_IOLOCK_EXCL); - - if (mode & FALLOC_FL_PUNCH_HOLE) - cmd = XFS_IOC_UNRESVSP; - - /* check the new inode size is valid before allocating */ - if (!(mode & FALLOC_FL_KEEP_SIZE) && - offset + len > i_size_read(inode)) { - new_size = offset + len; - error = inode_newsize_ok(inode, new_size); - if (error) - goto out_unlock; - } - - error = -xfs_change_file_space(ip, cmd, &bf, 0, XFS_ATTR_NOLOCK); - if (error) - goto out_unlock; - - /* Change file size if needed */ - if (new_size) { - struct iattr iattr; - - iattr.ia_valid = ATTR_SIZE; - iattr.ia_size = new_size; - error = -xfs_setattr(ip, &iattr, XFS_ATTR_NOLOCK); - } - -out_unlock: - xfs_iunlock(ip, XFS_IOLOCK_EXCL); -out_error: - return error; -} - #define XFS_FIEMAP_FLAGS (FIEMAP_FLAG_SYNC|FIEMAP_FLAG_XATTR) /* @@ -653,7 +597,6 @@ static const struct inode_operations xfs_inode_operations = { .getxattr = generic_getxattr, .removexattr = generic_removexattr, .listxattr = xfs_vn_listxattr, - .fallocate = xfs_vn_fallocate, .fiemap = xfs_vn_fiemap, }; diff --git a/fs/xfs/support/debug.c b/fs/xfs/support/debug.c index e6cf955..0df8889 100644 --- a/fs/xfs/support/debug.c +++ b/fs/xfs/support/debug.c @@ -75,11 +75,11 @@ xfs_cmn_err( { struct va_format vaf; va_list args; - int panic = 0; + int do_panic = 0; if (xfs_panic_mask && (xfs_panic_mask & panic_tag)) { printk(KERN_ALERT "XFS: Transforming an alert into a BUG."); - panic = 1; + do_panic = 1; } va_start(args, fmt); @@ -89,7 +89,7 @@ xfs_cmn_err( printk(KERN_ALERT "Filesystem %s: %pV", mp->m_fsname, &vaf); va_end(args); - BUG_ON(panic); + BUG_ON(do_panic); } void diff --git a/include/asm-generic/pgtable.h b/include/asm-generic/pgtable.h index f1eddf7..31b6188 100644 --- a/include/asm-generic/pgtable.h +++ b/include/asm-generic/pgtable.h @@ -87,14 +87,6 @@ static inline pmd_t pmdp_get_and_clear(struct mm_struct *mm, pmd_clear(mm, address, pmdp); return pmd; }) -#else /* CONFIG_TRANSPARENT_HUGEPAGE */ -static inline pmd_t pmdp_get_and_clear(struct mm_struct *mm, - unsigned long address, - pmd_t *pmdp) -{ - BUG(); - return __pmd(0); -} #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ #endif @@ -163,9 +155,9 @@ static inline void pmdp_set_wrprotect(struct mm_struct *mm, #endif #ifndef __HAVE_ARCH_PMDP_SPLITTING_FLUSH -extern pmd_t pmdp_clear_flush(struct vm_area_struct *vma, - unsigned long address, - pmd_t *pmdp); +extern pmd_t pmdp_splitting_flush(struct vm_area_struct *vma, + unsigned long address, + pmd_t *pmdp); #endif #ifndef __HAVE_ARCH_PTE_SAME diff --git a/include/linux/amba/pl08x.h b/include/linux/amba/pl08x.h index 521a0f8..3111385 100644 --- a/include/linux/amba/pl08x.h +++ b/include/linux/amba/pl08x.h @@ -12,7 +12,6 @@ * * Please credit ARM.com * Documentation: ARM DDI 0196D - * */ #ifndef AMBA_PL08X_H @@ -22,6 +21,15 @@ #include <linux/dmaengine.h> #include <linux/interrupt.h> +struct pl08x_lli; +struct pl08x_driver_data; + +/* Bitmasks for selecting AHB ports for DMA transfers */ +enum { + PL08X_AHB1 = (1 << 0), + PL08X_AHB2 = (1 << 1) +}; + /** * struct pl08x_channel_data - data structure to pass info between * platform and PL08x driver regarding channel configuration @@ -46,8 +54,10 @@ * @circular_buffer: whether the buffer passed in is circular and * shall simply be looped round round (like a record baby round * round round round) - * @single: the device connected to this channel will request single - * DMA transfers, not bursts. (Bursts are default.) + * @single: the device connected to this channel will request single DMA + * transfers, not bursts. (Bursts are default.) + * @periph_buses: the device connected to this channel is accessible via + * these buses (use PL08X_AHB1 | PL08X_AHB2). */ struct pl08x_channel_data { char *bus_id; @@ -55,10 +65,10 @@ struct pl08x_channel_data { int max_signal; u32 muxval; u32 cctl; - u32 ccfg; dma_addr_t addr; bool circular_buffer; bool single; + u8 periph_buses; }; /** @@ -67,24 +77,23 @@ struct pl08x_channel_data { * @addr: current address * @maxwidth: the maximum width of a transfer on this bus * @buswidth: the width of this bus in bytes: 1, 2 or 4 - * @fill_bytes: bytes required to fill to the next bus memory - * boundary + * @fill_bytes: bytes required to fill to the next bus memory boundary */ struct pl08x_bus_data { dma_addr_t addr; u8 maxwidth; u8 buswidth; - u32 fill_bytes; + size_t fill_bytes; }; /** * struct pl08x_phy_chan - holder for the physical channels * @id: physical index to this channel * @lock: a lock to use when altering an instance of this struct - * @signal: the physical signal (aka channel) serving this - * physical channel right now - * @serving: the virtual channel currently being served by this - * physical channel + * @signal: the physical signal (aka channel) serving this physical channel + * right now + * @serving: the virtual channel currently being served by this physical + * channel */ struct pl08x_phy_chan { unsigned int id; @@ -92,11 +101,6 @@ struct pl08x_phy_chan { spinlock_t lock; int signal; struct pl08x_dma_chan *serving; - u32 csrc; - u32 cdst; - u32 clli; - u32 cctl; - u32 ccfg; }; /** @@ -108,26 +112,23 @@ struct pl08x_txd { struct dma_async_tx_descriptor tx; struct list_head node; enum dma_data_direction direction; - struct pl08x_bus_data srcbus; - struct pl08x_bus_data dstbus; - int len; + dma_addr_t src_addr; + dma_addr_t dst_addr; + size_t len; dma_addr_t llis_bus; - void *llis_va; - struct pl08x_channel_data *cd; - bool active; + struct pl08x_lli *llis_va; + /* Default cctl value for LLIs */ + u32 cctl; /* * Settings to be put into the physical channel when we - * trigger this txd + * trigger this txd. Other registers are in llis_va[0]. */ - u32 csrc; - u32 cdst; - u32 clli; - u32 cctl; + u32 ccfg; }; /** - * struct pl08x_dma_chan_state - holds the PL08x specific virtual - * channel states + * struct pl08x_dma_chan_state - holds the PL08x specific virtual channel + * states * @PL08X_CHAN_IDLE: the channel is idle * @PL08X_CHAN_RUNNING: the channel has allocated a physical transport * channel and is running a transfer on it @@ -147,6 +148,8 @@ enum pl08x_dma_chan_state { * struct pl08x_dma_chan - this structure wraps a DMA ENGINE channel * @chan: wrappped abstract channel * @phychan: the physical channel utilized by this channel, if there is one + * @phychan_hold: if non-zero, hold on to the physical channel even if we + * have no pending entries * @tasklet: tasklet scheduled by the IRQ to handle actual work etc * @name: name of channel * @cd: channel platform data @@ -154,53 +157,49 @@ enum pl08x_dma_chan_state { * @runtime_direction: current direction of this channel according to * runtime config * @lc: last completed transaction on this channel - * @desc_list: queued transactions pending on this channel + * @pend_list: queued transactions pending on this channel * @at: active transaction on this channel - * @lockflags: sometimes we let a lock last between two function calls, - * especially prep/submit, and then we need to store the IRQ flags - * in the channel state, here * @lock: a lock for this channel data * @host: a pointer to the host (internal use) * @state: whether the channel is idle, paused, running etc * @slave: whether this channel is a device (slave) or for memcpy - * @waiting: a TX descriptor on this channel which is waiting for - * a physical channel to become available + * @waiting: a TX descriptor on this channel which is waiting for a physical + * channel to become available */ struct pl08x_dma_chan { struct dma_chan chan; struct pl08x_phy_chan *phychan; + int phychan_hold; struct tasklet_struct tasklet; char *name; struct pl08x_channel_data *cd; dma_addr_t runtime_addr; enum dma_data_direction runtime_direction; - atomic_t last_issued; dma_cookie_t lc; - struct list_head desc_list; + struct list_head pend_list; struct pl08x_txd *at; - unsigned long lockflags; spinlock_t lock; - void *host; + struct pl08x_driver_data *host; enum pl08x_dma_chan_state state; bool slave; struct pl08x_txd *waiting; }; /** - * struct pl08x_platform_data - the platform configuration for the - * PL08x PrimeCells. + * struct pl08x_platform_data - the platform configuration for the PL08x + * PrimeCells. * @slave_channels: the channels defined for the different devices on the * platform, all inclusive, including multiplexed channels. The available - * physical channels will be multiplexed around these signals as they - * are requested, just enumerate all possible channels. - * @get_signal: request a physical signal to be used for a DMA - * transfer immediately: if there is some multiplexing or similar blocking - * the use of the channel the transfer can be denied by returning - * less than zero, else it returns the allocated signal number + * physical channels will be multiplexed around these signals as they are + * requested, just enumerate all possible channels. + * @get_signal: request a physical signal to be used for a DMA transfer + * immediately: if there is some multiplexing or similar blocking the use + * of the channel the transfer can be denied by returning less than zero, + * else it returns the allocated signal number * @put_signal: indicate to the platform that this physical signal is not * running any DMA transfer and multiplexing can be recycled - * @bus_bit_lli: Bit[0] of the address indicated which AHB bus master the - * LLI addresses are on 0/1 Master 1/2. + * @lli_buses: buses which LLIs can be fetched from: PL08X_AHB1 | PL08X_AHB2 + * @mem_buses: buses which memory can be accessed from: PL08X_AHB1 | PL08X_AHB2 */ struct pl08x_platform_data { struct pl08x_channel_data *slave_channels; @@ -208,6 +207,8 @@ struct pl08x_platform_data { struct pl08x_channel_data memcpy_channel; int (*get_signal)(struct pl08x_dma_chan *); void (*put_signal)(struct pl08x_dma_chan *); + u8 lli_buses; + u8 mem_buses; }; #ifdef CONFIG_AMBA_PL08X diff --git a/include/linux/auto_fs4.h b/include/linux/auto_fs4.h index 8b49ac4..e02982f 100644 --- a/include/linux/auto_fs4.h +++ b/include/linux/auto_fs4.h @@ -24,7 +24,7 @@ #define AUTOFS_MIN_PROTO_VERSION 3 #define AUTOFS_MAX_PROTO_VERSION 5 -#define AUTOFS_PROTO_SUBVERSION 1 +#define AUTOFS_PROTO_SUBVERSION 2 /* Mask for expire behaviour */ #define AUTOFS_EXP_IMMEDIATE 1 diff --git a/include/linux/dcache.h b/include/linux/dcache.h index 59fcd24..f958c19 100644 --- a/include/linux/dcache.h +++ b/include/linux/dcache.h @@ -167,6 +167,8 @@ struct dentry_operations { void (*d_release)(struct dentry *); void (*d_iput)(struct dentry *, struct inode *); char *(*d_dname)(struct dentry *, char *, int); + struct vfsmount *(*d_automount)(struct path *); + int (*d_manage)(struct dentry *, bool, bool); } ____cacheline_aligned; /* @@ -205,13 +207,18 @@ struct dentry_operations { #define DCACHE_CANT_MOUNT 0x0100 #define DCACHE_GENOCIDE 0x0200 -#define DCACHE_MOUNTED 0x0400 /* is a mountpoint */ #define DCACHE_OP_HASH 0x1000 #define DCACHE_OP_COMPARE 0x2000 #define DCACHE_OP_REVALIDATE 0x4000 #define DCACHE_OP_DELETE 0x8000 +#define DCACHE_MOUNTED 0x10000 /* is a mountpoint */ +#define DCACHE_NEED_AUTOMOUNT 0x20000 /* handle automount on this dir */ +#define DCACHE_MANAGE_TRANSIT 0x40000 /* manage transit from this dirent */ +#define DCACHE_MANAGED_DENTRY \ + (DCACHE_MOUNTED|DCACHE_NEED_AUTOMOUNT|DCACHE_MANAGE_TRANSIT) + extern seqlock_t rename_lock; static inline int dname_external(struct dentry *dentry) @@ -399,7 +406,12 @@ static inline void dont_mount(struct dentry *dentry) extern void dput(struct dentry *); -static inline int d_mountpoint(struct dentry *dentry) +static inline bool d_managed(struct dentry *dentry) +{ + return dentry->d_flags & DCACHE_MANAGED_DENTRY; +} + +static inline bool d_mountpoint(struct dentry *dentry) { return dentry->d_flags & DCACHE_MOUNTED; } diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h index 8cd00ad..9bebd7f 100644 --- a/include/linux/dmaengine.h +++ b/include/linux/dmaengine.h @@ -532,7 +532,7 @@ static inline int dmaengine_resume(struct dma_chan *chan) return dmaengine_device_control(chan, DMA_RESUME, 0); } -static inline int dmaengine_submit(struct dma_async_tx_descriptor *desc) +static inline dma_cookie_t dmaengine_submit(struct dma_async_tx_descriptor *desc) { return desc->tx_submit(desc); } diff --git a/include/linux/fcntl.h b/include/linux/fcntl.h index afc00af..a562fa5 100644 --- a/include/linux/fcntl.h +++ b/include/linux/fcntl.h @@ -45,6 +45,7 @@ #define AT_REMOVEDIR 0x200 /* Remove directory instead of unlinking file. */ #define AT_SYMLINK_FOLLOW 0x400 /* Follow symbolic links. */ +#define AT_NO_AUTOMOUNT 0x800 /* Suppress terminal automount traversal */ #ifdef __KERNEL__ diff --git a/include/linux/file.h b/include/linux/file.h index b1e1297..e85baeb 100644 --- a/include/linux/file.h +++ b/include/linux/file.h @@ -23,7 +23,7 @@ extern struct file *alloc_file(struct path *, fmode_t mode, static inline void fput_light(struct file *file, int fput_needed) { - if (unlikely(fput_needed)) + if (fput_needed) fput(file); } diff --git a/include/linux/fs.h b/include/linux/fs.h index 08824e0..32b38cd 100644 --- a/include/linux/fs.h +++ b/include/linux/fs.h @@ -242,6 +242,7 @@ struct inodes_stat_t { #define S_SWAPFILE 256 /* Do not truncate: swapon got its bmaps */ #define S_PRIVATE 512 /* Inode is fs-internal */ #define S_IMA 1024 /* Inode has an associated IMA struct */ +#define S_AUTOMOUNT 2048 /* Automount/referral quasi-directory */ /* * Note that nosuid etc flags are inode-specific: setting some file-system @@ -277,6 +278,7 @@ struct inodes_stat_t { #define IS_SWAPFILE(inode) ((inode)->i_flags & S_SWAPFILE) #define IS_PRIVATE(inode) ((inode)->i_flags & S_PRIVATE) #define IS_IMA(inode) ((inode)->i_flags & S_IMA) +#define IS_AUTOMOUNT(inode) ((inode)->i_flags & S_AUTOMOUNT) /* the read-only stuff doesn't really belong here, but any other place is probably as bad and I don't want to create yet another include file. */ @@ -1481,8 +1483,8 @@ struct fiemap_extent_info { unsigned int fi_flags; /* Flags as passed from user */ unsigned int fi_extents_mapped; /* Number of mapped extents */ unsigned int fi_extents_max; /* Size of fiemap_extent array */ - struct fiemap_extent *fi_extents_start; /* Start of fiemap_extent - * array */ + struct fiemap_extent __user *fi_extents_start; /* Start of + fiemap_extent array */ }; int fiemap_fill_next_extent(struct fiemap_extent_info *info, u64 logical, u64 phys, u64 len, u32 flags); @@ -1550,6 +1552,8 @@ struct file_operations { ssize_t (*splice_write)(struct pipe_inode_info *, struct file *, loff_t *, size_t, unsigned int); ssize_t (*splice_read)(struct file *, loff_t *, struct pipe_inode_info *, size_t, unsigned int); int (*setlease)(struct file *, long, struct file_lock **); + long (*fallocate)(struct file *file, int mode, loff_t offset, + loff_t len); }; #define IPERM_FLAG_RCU 0x0001 @@ -1580,8 +1584,6 @@ struct inode_operations { ssize_t (*listxattr) (struct dentry *, char *, size_t); int (*removexattr) (struct dentry *, const char *); void (*truncate_range)(struct inode *, loff_t, loff_t); - long (*fallocate)(struct inode *inode, int mode, loff_t offset, - loff_t len); int (*fiemap)(struct inode *, struct fiemap_extent_info *, u64 start, u64 len); } ____cacheline_aligned; diff --git a/include/linux/magic.h b/include/linux/magic.h index ff690d0..62730ea 100644 --- a/include/linux/magic.h +++ b/include/linux/magic.h @@ -16,6 +16,7 @@ #define TMPFS_MAGIC 0x01021994 #define HUGETLBFS_MAGIC 0x958458f6 /* some random number */ #define SQUASHFS_MAGIC 0x73717368 +#define ECRYPTFS_SUPER_MAGIC 0xf15f #define EFS_SUPER_MAGIC 0x414A53 #define EXT2_SUPER_MAGIC 0xEF53 #define EXT3_SUPER_MAGIC 0xEF53 diff --git a/include/linux/memory_hotplug.h b/include/linux/memory_hotplug.h index 24376fe..8122018d 100644 --- a/include/linux/memory_hotplug.h +++ b/include/linux/memory_hotplug.h @@ -165,6 +165,12 @@ extern void register_page_bootmem_info_node(struct pglist_data *pgdat); extern void put_page_bootmem(struct page *page); #endif +/* + * Lock for memory hotplug guarantees 1) all callbacks for memory hotplug + * notifier will be called under this. 2) offline/online/add/remove memory + * will not run simultaneously. + */ + void lock_memory_hotplug(void); void unlock_memory_hotplug(void); diff --git a/include/linux/mlx4/device.h b/include/linux/mlx4/device.h index a7b15bc..0492146 100644 --- a/include/linux/mlx4/device.h +++ b/include/linux/mlx4/device.h @@ -144,6 +144,11 @@ enum { MLX4_STAT_RATE_OFFSET = 5 }; +enum mlx4_protocol { + MLX4_PROTOCOL_IB, + MLX4_PROTOCOL_EN, +}; + enum { MLX4_MTT_FLAG_PRESENT = 1 }; @@ -500,8 +505,9 @@ int mlx4_INIT_PORT(struct mlx4_dev *dev, int port); int mlx4_CLOSE_PORT(struct mlx4_dev *dev, int port); int mlx4_multicast_attach(struct mlx4_dev *dev, struct mlx4_qp *qp, u8 gid[16], - int block_mcast_loopback); -int mlx4_multicast_detach(struct mlx4_dev *dev, struct mlx4_qp *qp, u8 gid[16]); + int block_mcast_loopback, enum mlx4_protocol protocol); +int mlx4_multicast_detach(struct mlx4_dev *dev, struct mlx4_qp *qp, u8 gid[16], + enum mlx4_protocol protocol); int mlx4_register_mac(struct mlx4_dev *dev, u8 port, u64 mac, int *index); void mlx4_unregister_mac(struct mlx4_dev *dev, u8 port, int index); diff --git a/include/linux/mlx4/driver.h b/include/linux/mlx4/driver.h index f407cd4..e1eebf7 100644 --- a/include/linux/mlx4/driver.h +++ b/include/linux/mlx4/driver.h @@ -34,6 +34,7 @@ #define MLX4_DRIVER_H #include <linux/device.h> +#include <linux/mlx4/device.h> struct mlx4_dev; @@ -44,11 +45,6 @@ enum mlx4_dev_event { MLX4_DEV_EVENT_PORT_REINIT, }; -enum mlx4_protocol { - MLX4_PROTOCOL_IB, - MLX4_PROTOCOL_EN, -}; - struct mlx4_interface { void * (*add) (struct mlx4_dev *dev); void (*remove)(struct mlx4_dev *dev, void *context); diff --git a/include/linux/mount.h b/include/linux/mount.h index 1869ea2..604f122 100644 --- a/include/linux/mount.h +++ b/include/linux/mount.h @@ -60,7 +60,7 @@ struct vfsmount { struct super_block *mnt_sb; /* pointer to superblock */ #ifdef CONFIG_SMP struct mnt_pcp __percpu *mnt_pcp; - atomic_t mnt_longrefs; + atomic_t mnt_longterm; /* how many of the refs are longterm */ #else int mnt_count; int mnt_writers; @@ -96,8 +96,6 @@ extern int mnt_clone_write(struct vfsmount *mnt); extern void mnt_drop_write(struct vfsmount *mnt); extern void mntput(struct vfsmount *mnt); extern struct vfsmount *mntget(struct vfsmount *mnt); -extern void mntput_long(struct vfsmount *mnt); -extern struct vfsmount *mntget_long(struct vfsmount *mnt); extern void mnt_pin(struct vfsmount *mnt); extern void mnt_unpin(struct vfsmount *mnt); extern int __mnt_is_readonly(struct vfsmount *mnt); @@ -110,12 +108,7 @@ extern struct vfsmount *vfs_kern_mount(struct file_system_type *type, int flags, const char *name, void *data); -struct nameidata; - -struct path; -extern int do_add_mount(struct vfsmount *newmnt, struct path *path, - int mnt_flags, struct list_head *fslist); - +extern void mnt_set_expiry(struct vfsmount *mnt, struct list_head *expiry_list); extern void mark_mounts_for_expiry(struct list_head *mounts); extern dev_t name_to_dev_t(char *name); diff --git a/include/linux/mtd/cfi.h b/include/linux/mtd/cfi.h index 4dd0c2c..a9baee6 100644 --- a/include/linux/mtd/cfi.h +++ b/include/linux/mtd/cfi.h @@ -527,8 +527,7 @@ struct cfi_extquery *cfi_read_pri(struct map_info *map, uint16_t adr, uint16_t s struct cfi_fixup { uint16_t mfr; uint16_t id; - void (*fixup)(struct mtd_info *mtd, void* param); - void* param; + void (*fixup)(struct mtd_info *mtd); }; #define CFI_MFR_ANY 0xFFFF diff --git a/include/linux/mtd/fsmc.h b/include/linux/mtd/fsmc.h index 5d25567..6987995 100644 --- a/include/linux/mtd/fsmc.h +++ b/include/linux/mtd/fsmc.h @@ -16,6 +16,7 @@ #ifndef __MTD_FSMC_H #define __MTD_FSMC_H +#include <linux/io.h> #include <linux/platform_device.h> #include <linux/mtd/physmap.h> #include <linux/types.h> @@ -27,7 +28,7 @@ /* * The placement of the Command Latch Enable (CLE) and - * Address Latch Enable (ALE) is twised around in the + * Address Latch Enable (ALE) is twisted around in the * SPEAR310 implementation. */ #if defined(CONFIG_MACH_SPEAR310) @@ -62,7 +63,7 @@ struct fsmc_nor_bank_regs { /* ctrl_tim register definitions */ -struct fsms_nand_bank_regs { +struct fsmc_nand_bank_regs { uint32_t pc; uint32_t sts; uint32_t comm; @@ -78,7 +79,7 @@ struct fsms_nand_bank_regs { struct fsmc_regs { struct fsmc_nor_bank_regs nor_bank_regs[FSMC_MAX_NOR_BANKS]; uint8_t reserved_1[0x40 - 0x20]; - struct fsms_nand_bank_regs bank_regs[FSMC_MAX_NAND_BANKS]; + struct fsmc_nand_bank_regs bank_regs[FSMC_MAX_NAND_BANKS]; uint8_t reserved_2[0xfe0 - 0xc0]; uint32_t peripid0; /* 0xfe0 */ uint32_t peripid1; /* 0xfe4 */ @@ -114,25 +115,6 @@ struct fsmc_regs { #define FSMC_THOLD_4 (4 << 16) #define FSMC_THIZ_1 (1 << 24) -/* peripid2 register definitions */ -#define FSMC_REVISION_MSK (0xf) -#define FSMC_REVISION_SHFT (0x4) - -#define FSMC_VER1 1 -#define FSMC_VER2 2 -#define FSMC_VER3 3 -#define FSMC_VER4 4 -#define FSMC_VER5 5 -#define FSMC_VER6 6 -#define FSMC_VER7 7 -#define FSMC_VER8 8 - -static inline uint32_t get_fsmc_version(struct fsmc_regs *regs) -{ - return (readl(®s->peripid2) >> FSMC_REVISION_SHFT) & - FSMC_REVISION_MSK; -} - /* * There are 13 bytes of ecc for every 512 byte block in FSMC version 8 * and it has to be read consecutively and immediately after the 512 diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h index fe8d77e..9d5306b 100644 --- a/include/linux/mtd/mtd.h +++ b/include/linux/mtd/mtd.h @@ -144,6 +144,17 @@ struct mtd_info { */ uint32_t writesize; + /* + * Size of the write buffer used by the MTD. MTD devices having a write + * buffer can write multiple writesize chunks at a time. E.g. while + * writing 4 * writesize bytes to a device with 2 * writesize bytes + * buffer the MTD driver can (but doesn't have to) do 2 writesize + * operations, but not 4. Currently, all NANDs have writebufsize + * equivalent to writesize (NAND page size). Some NOR flashes do have + * writebufsize greater than writesize. + */ + uint32_t writebufsize; + uint32_t oobsize; // Amount of OOB data per block (e.g. 16) uint32_t oobavail; // Available OOB bytes per block diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h index 63e17d0..1f489b2 100644 --- a/include/linux/mtd/nand.h +++ b/include/linux/mtd/nand.h @@ -448,6 +448,8 @@ struct nand_buffers { * See the defines for further explanation. * @badblockpos: [INTERN] position of the bad block marker in the oob * area. + * @badblockbits: [INTERN] number of bits to left-shift the bad block + * number * @cellinfo: [INTERN] MLC/multichip data from chip ident * @numchips: [INTERN] number of physical chips * @chipsize: [INTERN] the size of one chip for multichip arrays diff --git a/include/linux/mtd/onenand.h b/include/linux/mtd/onenand.h index 0c8815b..ae418e4 100644 --- a/include/linux/mtd/onenand.h +++ b/include/linux/mtd/onenand.h @@ -118,6 +118,8 @@ struct onenand_chip { int (*chip_probe)(struct mtd_info *mtd); int (*block_markbad)(struct mtd_info *mtd, loff_t ofs); int (*scan_bbt)(struct mtd_info *mtd); + int (*enable)(struct mtd_info *mtd); + int (*disable)(struct mtd_info *mtd); struct completion complete; int irq; @@ -137,6 +139,14 @@ struct onenand_chip { void *bbm; void *priv; + + /* + * Shows that the current operation is composed + * of sequence of commands. For example, cache program. + * Such command status OnGo bit is checked at the end of + * sequence. + */ + unsigned int ongoing; }; /* @@ -171,6 +181,9 @@ struct onenand_chip { #define ONENAND_IS_2PLANE(this) (0) #endif +#define ONENAND_IS_CACHE_PROGRAM(this) \ + (this->options & ONENAND_HAS_CACHE_PROGRAM) + /* Check byte access in OneNAND */ #define ONENAND_CHECK_BYTE_ACCESS(addr) (addr & 0x1) @@ -181,6 +194,7 @@ struct onenand_chip { #define ONENAND_HAS_UNLOCK_ALL (0x0002) #define ONENAND_HAS_2PLANE (0x0004) #define ONENAND_HAS_4KB_PAGE (0x0008) +#define ONENAND_HAS_CACHE_PROGRAM (0x0010) #define ONENAND_SKIP_UNLOCK_CHECK (0x0100) #define ONENAND_PAGEBUF_ALLOC (0x1000) #define ONENAND_OOBBUF_ALLOC (0x2000) diff --git a/include/linux/mtd/partitions.h b/include/linux/mtd/partitions.h index 2b54316..4a0a8ba 100644 --- a/include/linux/mtd/partitions.h +++ b/include/linux/mtd/partitions.h @@ -89,7 +89,7 @@ static inline int mtd_has_cmdlinepart(void) { return 1; } static inline int mtd_has_cmdlinepart(void) { return 0; } #endif -int mtd_is_master(struct mtd_info *mtd); +int mtd_is_partition(struct mtd_info *mtd); int mtd_add_partition(struct mtd_info *master, char *name, long long offset, long long length); int mtd_del_partition(struct mtd_info *master, int partno); diff --git a/include/linux/namei.h b/include/linux/namei.h index 18d06ad..f276d4f 100644 --- a/include/linux/namei.h +++ b/include/linux/namei.h @@ -45,6 +45,7 @@ enum {LAST_NORM, LAST_ROOT, LAST_DOT, LAST_DOTDOT, LAST_BIND}; * - ending slashes ok even for nonexistent files * - internal "there are more path components" flag * - dentry cache is untrusted; force a real lookup + * - suppress terminal automount */ #define LOOKUP_FOLLOW 0x0001 #define LOOKUP_DIRECTORY 0x0002 @@ -53,6 +54,7 @@ enum {LAST_NORM, LAST_ROOT, LAST_DOT, LAST_DOTDOT, LAST_BIND}; #define LOOKUP_PARENT 0x0010 #define LOOKUP_REVAL 0x0020 #define LOOKUP_RCU 0x0040 +#define LOOKUP_NO_AUTOMOUNT 0x0080 /* * Intent data */ @@ -79,7 +81,8 @@ extern struct file *lookup_instantiate_filp(struct nameidata *nd, struct dentry extern struct dentry *lookup_one_len(const char *, struct dentry *, int); -extern int follow_down(struct path *); +extern int follow_down_one(struct path *); +extern int follow_down(struct path *, bool); extern int follow_up(struct path *); extern struct dentry *lock_rename(struct dentry *, struct dentry *); diff --git a/include/linux/nfs_fs.h b/include/linux/nfs_fs.h index 0779bb8..6023efa 100644 --- a/include/linux/nfs_fs.h +++ b/include/linux/nfs_fs.h @@ -215,7 +215,6 @@ struct nfs_inode { #define NFS_INO_ADVISE_RDPLUS (0) /* advise readdirplus */ #define NFS_INO_STALE (1) /* possible stale inode */ #define NFS_INO_ACL_LRU_SET (2) /* Inode is on the LRU list */ -#define NFS_INO_MOUNTPOINT (3) /* inode is remote mountpoint */ #define NFS_INO_FLUSHING (4) /* inode is flushing out data */ #define NFS_INO_FSCACHE (5) /* inode can be cached by FS-Cache */ #define NFS_INO_FSCACHE_LOCK (6) /* FS-Cache cookie management lock */ diff --git a/include/linux/of_fdt.h b/include/linux/of_fdt.h index 0ef22a1..c84d900 100644 --- a/include/linux/of_fdt.h +++ b/include/linux/of_fdt.h @@ -97,7 +97,7 @@ extern void early_init_dt_check_for_initrd(unsigned long node); extern int early_init_dt_scan_memory(unsigned long node, const char *uname, int depth, void *data); extern void early_init_dt_add_memory_arch(u64 base, u64 size); -extern u64 early_init_dt_alloc_memory_arch(u64 size, u64 align); +extern void * early_init_dt_alloc_memory_arch(u64 size, u64 align); extern u64 dt_mem_next_cell(int s, __be32 **cellp); /* diff --git a/include/linux/path.h b/include/linux/path.h index a581e8c..edc98de 100644 --- a/include/linux/path.h +++ b/include/linux/path.h @@ -10,9 +10,7 @@ struct path { }; extern void path_get(struct path *); -extern void path_get_long(struct path *); extern void path_put(struct path *); -extern void path_put_long(struct path *); static inline int path_equal(const struct path *path1, const struct path *path2) { diff --git a/include/linux/pci-acpi.h b/include/linux/pci-acpi.h index 479d9bb..4462350 100644 --- a/include/linux/pci-acpi.h +++ b/include/linux/pci-acpi.h @@ -35,9 +35,6 @@ static inline acpi_handle acpi_pci_get_bridge_handle(struct pci_bus *pbus) return acpi_get_pci_rootbridge_handle(pci_domain_nr(pbus), pbus->number); } -#else -static inline acpi_handle acpi_find_root_bridge_handle(struct pci_dev *pdev) -{ return NULL; } #endif #ifdef CONFIG_ACPI_APEI diff --git a/include/rdma/ib_verbs.h b/include/rdma/ib_verbs.h index e04c488..55cd0a0 100644 --- a/include/rdma/ib_verbs.h +++ b/include/rdma/ib_verbs.h @@ -47,10 +47,13 @@ #include <linux/list.h> #include <linux/rwsem.h> #include <linux/scatterlist.h> +#include <linux/workqueue.h> #include <asm/atomic.h> #include <asm/uaccess.h> +extern struct workqueue_struct *ib_wq; + union ib_gid { u8 raw[16]; struct { diff --git a/include/sound/ac97_codec.h b/include/sound/ac97_codec.h index 4940045..b602f47 100644 --- a/include/sound/ac97_codec.h +++ b/include/sound/ac97_codec.h @@ -477,7 +477,7 @@ struct snd_ac97_template { struct snd_ac97 { /* -- lowlevel (hardware) driver specific -- */ - struct snd_ac97_build_ops * build_ops; + const struct snd_ac97_build_ops *build_ops; void *private_data; void (*private_free) (struct snd_ac97 *ac97); /* --- */ diff --git a/include/trace/events/module.h b/include/trace/events/module.h index c7bb2f0..c6bae36 100644 --- a/include/trace/events/module.h +++ b/include/trace/events/module.h @@ -1,5 +1,15 @@ +/* + * Because linux/module.h has tracepoints in the header, and ftrace.h + * eventually includes this file, define_trace.h includes linux/module.h + * But we do not want the module.h to override the TRACE_SYSTEM macro + * variable that define_trace.h is processing, so we only set it + * when module events are being processed, which would happen when + * CREATE_TRACE_POINTS is defined. + */ +#ifdef CREATE_TRACE_POINTS #undef TRACE_SYSTEM #define TRACE_SYSTEM module +#endif #if !defined(_TRACE_MODULE_H) || defined(TRACE_HEADER_MULTI_READ) #define _TRACE_MODULE_H diff --git a/init/Kconfig b/init/Kconfig index 4f6cdbf..4e33790 100644 --- a/init/Kconfig +++ b/init/Kconfig @@ -515,21 +515,6 @@ config RCU_BOOST_DELAY Accept the default if unsure. -config SRCU_SYNCHRONIZE_DELAY - int "Microseconds to delay before waiting for readers" - range 0 20 - default 10 - help - This option controls how long SRCU delays before entering its - loop waiting on SRCU readers. The purpose of this loop is - to avoid the unconditional context-switch penalty that would - otherwise be incurred if there was an active SRCU reader, - in a manner similar to adaptive locking schemes. This should - be set to be a bit longer than the common-case SRCU read-side - critical-section overhead. - - Accept the default if unsure. - endmenu # "RCU Subsystem" config IKCONFIG diff --git a/kernel/futex.c b/kernel/futex.c index 5207563..b766d28 100644 --- a/kernel/futex.c +++ b/kernel/futex.c @@ -826,10 +826,9 @@ static int wake_futex_pi(u32 __user *uaddr, u32 uval, struct futex_q *this) new_owner = rt_mutex_next_owner(&pi_state->pi_mutex); /* - * This happens when we have stolen the lock and the original - * pending owner did not enqueue itself back on the rt_mutex. - * Thats not a tragedy. We know that way, that a lock waiter - * is on the fly. We make the futex_q waiter the pending owner. + * It is possible that the next waiter (the one that brought + * this owner to the kernel) timed out and is no longer + * waiting on the lock. */ if (!new_owner) new_owner = this->task; diff --git a/kernel/rcutiny.c b/kernel/rcutiny.c index 0344937..0c343b9 100644 --- a/kernel/rcutiny.c +++ b/kernel/rcutiny.c @@ -189,7 +189,8 @@ static int rcu_kthread(void *arg) unsigned long flags; for (;;) { - wait_event(rcu_kthread_wq, have_rcu_kthread_work != 0); + wait_event_interruptible(rcu_kthread_wq, + have_rcu_kthread_work != 0); morework = rcu_boost(); local_irq_save(flags); work = have_rcu_kthread_work; diff --git a/kernel/srcu.c b/kernel/srcu.c index 98d8c1e..73ce23f 100644 --- a/kernel/srcu.c +++ b/kernel/srcu.c @@ -156,6 +156,16 @@ void __srcu_read_unlock(struct srcu_struct *sp, int idx) EXPORT_SYMBOL_GPL(__srcu_read_unlock); /* + * We use an adaptive strategy for synchronize_srcu() and especially for + * synchronize_srcu_expedited(). We spin for a fixed time period + * (defined below) to allow SRCU readers to exit their read-side critical + * sections. If there are still some readers after 10 microseconds, + * we repeatedly block for 1-millisecond time periods. This approach + * has done well in testing, so there is no need for a config parameter. + */ +#define SYNCHRONIZE_SRCU_READER_DELAY 10 + +/* * Helper function for synchronize_srcu() and synchronize_srcu_expedited(). */ static void __synchronize_srcu(struct srcu_struct *sp, void (*sync_func)(void)) @@ -207,11 +217,12 @@ static void __synchronize_srcu(struct srcu_struct *sp, void (*sync_func)(void)) * will have finished executing. We initially give readers * an arbitrarily chosen 10 microseconds to get out of their * SRCU read-side critical sections, then loop waiting 1/HZ - * seconds per iteration. + * seconds per iteration. The 10-microsecond value has done + * very well in testing. */ if (srcu_readers_active_idx(sp, idx)) - udelay(CONFIG_SRCU_SYNCHRONIZE_DELAY); + udelay(SYNCHRONIZE_SRCU_READER_DELAY); while (srcu_readers_active_idx(sp, idx)) schedule_timeout_interruptible(1); diff --git a/kernel/time/clocksource.c b/kernel/time/clocksource.c index c50a034..6519cf62 100644 --- a/kernel/time/clocksource.c +++ b/kernel/time/clocksource.c @@ -113,7 +113,7 @@ EXPORT_SYMBOL_GPL(timecounter_cyc2time); * @shift: pointer to shift variable * @from: frequency to convert from * @to: frequency to convert to - * @minsec: guaranteed runtime conversion range in seconds + * @maxsec: guaranteed runtime conversion range in seconds * * The function evaluates the shift/mult pair for the scaled math * operations of clocksources and clockevents. @@ -122,7 +122,7 @@ EXPORT_SYMBOL_GPL(timecounter_cyc2time); * NSEC_PER_SEC == 1GHz and @from is the counter frequency. For clock * event @to is the counter frequency and @from is NSEC_PER_SEC. * - * The @minsec conversion range argument controls the time frame in + * The @maxsec conversion range argument controls the time frame in * seconds which must be covered by the runtime conversion with the * calculated mult and shift factors. This guarantees that no 64bit * overflow happens when the input value of the conversion is @@ -131,7 +131,7 @@ EXPORT_SYMBOL_GPL(timecounter_cyc2time); * factors. */ void -clocks_calc_mult_shift(u32 *mult, u32 *shift, u32 from, u32 to, u32 minsec) +clocks_calc_mult_shift(u32 *mult, u32 *shift, u32 from, u32 to, u32 maxsec) { u64 tmp; u32 sft, sftacc= 32; @@ -140,7 +140,7 @@ clocks_calc_mult_shift(u32 *mult, u32 *shift, u32 from, u32 to, u32 minsec) * Calculate the shift factor which is limiting the conversion * range: */ - tmp = ((u64)minsec * from) >> 32; + tmp = ((u64)maxsec * from) >> 32; while (tmp) { tmp >>=1; sftacc--; diff --git a/kernel/time/timekeeping.c b/kernel/time/timekeeping.c index 5536aaf..d27c756 100644 --- a/kernel/time/timekeeping.c +++ b/kernel/time/timekeeping.c @@ -49,7 +49,7 @@ struct timekeeper { u32 mult; }; -struct timekeeper timekeeper; +static struct timekeeper timekeeper; /** * timekeeper_setup_internals - Set up internals to use clocksource clock. @@ -164,7 +164,7 @@ static struct timespec total_sleep_time; /* * The raw monotonic time for the CLOCK_MONOTONIC_RAW posix clock. */ -struct timespec raw_time; +static struct timespec raw_time; /* flag for if timekeeping is suspended */ int __read_mostly timekeeping_suspended; diff --git a/kernel/trace/trace_syscalls.c b/kernel/trace/trace_syscalls.c index bac752f..b706529 100644 --- a/kernel/trace/trace_syscalls.c +++ b/kernel/trace/trace_syscalls.c @@ -23,9 +23,6 @@ static int syscall_exit_register(struct ftrace_event_call *event, static int syscall_enter_define_fields(struct ftrace_event_call *call); static int syscall_exit_define_fields(struct ftrace_event_call *call); -/* All syscall exit events have the same fields */ -static LIST_HEAD(syscall_exit_fields); - static struct list_head * syscall_get_enter_fields(struct ftrace_event_call *call) { @@ -34,34 +31,28 @@ syscall_get_enter_fields(struct ftrace_event_call *call) return &entry->enter_fields; } -static struct list_head * -syscall_get_exit_fields(struct ftrace_event_call *call) -{ - return &syscall_exit_fields; -} - struct trace_event_functions enter_syscall_print_funcs = { - .trace = print_syscall_enter, + .trace = print_syscall_enter, }; struct trace_event_functions exit_syscall_print_funcs = { - .trace = print_syscall_exit, + .trace = print_syscall_exit, }; struct ftrace_event_class event_class_syscall_enter = { - .system = "syscalls", - .reg = syscall_enter_register, - .define_fields = syscall_enter_define_fields, - .get_fields = syscall_get_enter_fields, - .raw_init = init_syscall_trace, + .system = "syscalls", + .reg = syscall_enter_register, + .define_fields = syscall_enter_define_fields, + .get_fields = syscall_get_enter_fields, + .raw_init = init_syscall_trace, }; struct ftrace_event_class event_class_syscall_exit = { - .system = "syscalls", - .reg = syscall_exit_register, - .define_fields = syscall_exit_define_fields, - .get_fields = syscall_get_exit_fields, - .raw_init = init_syscall_trace, + .system = "syscalls", + .reg = syscall_exit_register, + .define_fields = syscall_exit_define_fields, + .fields = LIST_HEAD_INIT(event_class_syscall_exit.fields), + .raw_init = init_syscall_trace, }; extern unsigned long __start_syscalls_metadata[]; diff --git a/mm/internal.h b/mm/internal.h index 4c98630..6948820 100644 --- a/mm/internal.h +++ b/mm/internal.h @@ -39,15 +39,6 @@ static inline void __put_page(struct page *page) extern unsigned long highest_memmap_pfn; -#ifdef CONFIG_SMP -extern int putback_active_lru_page(struct zone *zone, struct page *page); -#else -static inline int putback_active_lru_page(struct zone *zone, struct page *page) -{ - return 0; -} -#endif - /* * in mm/vmscan.c: */ diff --git a/mm/memory_hotplug.c b/mm/memory_hotplug.c index e92f047..321fc74 100644 --- a/mm/memory_hotplug.c +++ b/mm/memory_hotplug.c @@ -409,6 +409,7 @@ int online_pages(unsigned long pfn, unsigned long nr_pages) int ret; struct memory_notify arg; + lock_memory_hotplug(); arg.start_pfn = pfn; arg.nr_pages = nr_pages; arg.status_change_nid = -1; @@ -421,6 +422,7 @@ int online_pages(unsigned long pfn, unsigned long nr_pages) ret = notifier_to_errno(ret); if (ret) { memory_notify(MEM_CANCEL_ONLINE, &arg); + unlock_memory_hotplug(); return ret; } /* @@ -445,6 +447,7 @@ int online_pages(unsigned long pfn, unsigned long nr_pages) printk(KERN_DEBUG "online_pages %lx at %lx failed\n", nr_pages, pfn); memory_notify(MEM_CANCEL_ONLINE, &arg); + unlock_memory_hotplug(); return ret; } @@ -469,6 +472,7 @@ int online_pages(unsigned long pfn, unsigned long nr_pages) if (onlined_pages) memory_notify(MEM_ONLINE, &arg); + unlock_memory_hotplug(); return 0; } diff --git a/mm/pgtable-generic.c b/mm/pgtable-generic.c index d030548..0369f5b 100644 --- a/mm/pgtable-generic.c +++ b/mm/pgtable-generic.c @@ -92,32 +92,29 @@ pte_t ptep_clear_flush(struct vm_area_struct *vma, unsigned long address, #endif #ifndef __HAVE_ARCH_PMDP_CLEAR_FLUSH +#ifdef CONFIG_TRANSPARENT_HUGEPAGE pmd_t pmdp_clear_flush(struct vm_area_struct *vma, unsigned long address, pmd_t *pmdp) { pmd_t pmd; -#ifndef CONFIG_TRANSPARENT_HUGEPAGE - BUG(); -#endif /* CONFIG_TRANSPARENT_HUGEPAGE */ VM_BUG_ON(address & ~HPAGE_PMD_MASK); pmd = pmdp_get_and_clear(vma->vm_mm, address, pmdp); flush_tlb_range(vma, address, address + HPAGE_PMD_SIZE); return pmd; } +#endif /* CONFIG_TRANSPARENT_HUGEPAGE */ #endif #ifndef __HAVE_ARCH_PMDP_SPLITTING_FLUSH +#ifdef CONFIG_TRANSPARENT_HUGEPAGE pmd_t pmdp_splitting_flush(struct vm_area_struct *vma, unsigned long address, pmd_t *pmdp) { -#ifdef CONFIG_TRANSPARENT_HUGEPAGE pmd_t pmd = pmd_mksplitting(*pmdp); VM_BUG_ON(address & ~HPAGE_PMD_MASK); set_pmd_at(vma->vm_mm, address, pmdp, pmd); /* tlb flush only to serialize against gup-fast */ flush_tlb_range(vma, address, address + HPAGE_PMD_SIZE); -#else /* CONFIG_TRANSPARENT_HUGEPAGE */ - BUG(); -#endif /* CONFIG_TRANSPARENT_HUGEPAGE */ } +#endif /* CONFIG_TRANSPARENT_HUGEPAGE */ #endif @@ -284,7 +284,7 @@ struct kmem_list3 { * Need this for bootstrapping a per node allocator. */ #define NUM_INIT_LISTS (3 * MAX_NUMNODES) -struct kmem_list3 __initdata initkmem_list3[NUM_INIT_LISTS]; +static struct kmem_list3 __initdata initkmem_list3[NUM_INIT_LISTS]; #define CACHE_CACHE 0 #define SIZE_AC MAX_NUMNODES #define SIZE_L3 (2 * MAX_NUMNODES) @@ -4053,7 +4053,7 @@ static int enable_cpucache(struct kmem_cache *cachep, gfp_t gfp) * necessary. Note that the l3 listlock also protects the array_cache * if drain_array() is used on the shared array. */ -void drain_array(struct kmem_cache *cachep, struct kmem_list3 *l3, +static void drain_array(struct kmem_cache *cachep, struct kmem_list3 *l3, struct array_cache *ac, int force, int node) { int tofree; @@ -4317,7 +4317,7 @@ static const struct seq_operations slabinfo_op = { * @count: data length * @ppos: unused */ -ssize_t slabinfo_write(struct file *file, const char __user * buffer, +static ssize_t slabinfo_write(struct file *file, const char __user *buffer, size_t count, loff_t *ppos) { char kbuf[MAX_SLABINFO_WRITE + 1], *tmp; @@ -3797,7 +3797,7 @@ static ssize_t show_slab_objects(struct kmem_cache *s, } } - down_read(&slub_lock); + lock_memory_hotplug(); #ifdef CONFIG_SLUB_DEBUG if (flags & SO_ALL) { for_each_node_state(node, N_NORMAL_MEMORY) { @@ -3838,7 +3838,7 @@ static ssize_t show_slab_objects(struct kmem_cache *s, x += sprintf(buf + x, " N%d=%lu", node, nodes[node]); #endif - up_read(&slub_lock); + unlock_memory_hotplug(); kfree(nodes); return x + sprintf(buf + x, "\n"); } @@ -178,13 +178,15 @@ void put_pages_list(struct list_head *pages) } EXPORT_SYMBOL(put_pages_list); -static void pagevec_lru_move_fn(struct pagevec *pvec, - void (*move_fn)(struct page *page, void *arg), - void *arg) +/* + * pagevec_move_tail() must be called with IRQ disabled. + * Otherwise this may cause nasty races. + */ +static void pagevec_move_tail(struct pagevec *pvec) { int i; + int pgmoved = 0; struct zone *zone = NULL; - unsigned long flags = 0; for (i = 0; i < pagevec_count(pvec); i++) { struct page *page = pvec->pages[i]; @@ -192,41 +194,21 @@ static void pagevec_lru_move_fn(struct pagevec *pvec, if (pagezone != zone) { if (zone) - spin_unlock_irqrestore(&zone->lru_lock, flags); + spin_unlock(&zone->lru_lock); zone = pagezone; - spin_lock_irqsave(&zone->lru_lock, flags); + spin_lock(&zone->lru_lock); + } + if (PageLRU(page) && !PageActive(page) && !PageUnevictable(page)) { + int lru = page_lru_base_type(page); + list_move_tail(&page->lru, &zone->lru[lru].list); + pgmoved++; } - - (*move_fn)(page, arg); } if (zone) - spin_unlock_irqrestore(&zone->lru_lock, flags); - release_pages(pvec->pages, pagevec_count(pvec), pvec->cold); - pagevec_reinit(pvec); -} - -static void pagevec_move_tail_fn(struct page *page, void *arg) -{ - int *pgmoved = arg; - struct zone *zone = page_zone(page); - - if (PageLRU(page) && !PageActive(page) && !PageUnevictable(page)) { - int lru = page_lru_base_type(page); - list_move_tail(&page->lru, &zone->lru[lru].list); - (*pgmoved)++; - } -} - -/* - * pagevec_move_tail() must be called with IRQ disabled. - * Otherwise this may cause nasty races. - */ -static void pagevec_move_tail(struct pagevec *pvec) -{ - int pgmoved = 0; - - pagevec_lru_move_fn(pvec, pagevec_move_tail_fn, &pgmoved); + spin_unlock(&zone->lru_lock); __count_vm_events(PGROTATED, pgmoved); + release_pages(pvec->pages, pvec->nr, pvec->cold); + pagevec_reinit(pvec); } /* @@ -234,7 +216,7 @@ static void pagevec_move_tail(struct pagevec *pvec) * reclaim. If it still appears to be reclaimable, move it to the tail of the * inactive list. */ -void rotate_reclaimable_page(struct page *page) +void rotate_reclaimable_page(struct page *page) { if (!PageLocked(page) && !PageDirty(page) && !PageActive(page) && !PageUnevictable(page) && PageLRU(page)) { @@ -271,94 +253,27 @@ static void update_page_reclaim_stat(struct zone *zone, struct page *page, } /* - * A page will go to active list either by activate_page or putback_lru_page. - * In the activate_page case, the page hasn't active bit set. The page might - * not in LRU list because it's isolated before it gets a chance to be moved to - * active list. The window is small because pagevec just stores several pages. - * For such case, we do nothing for such page. - * In the putback_lru_page case, the page isn't in lru list but has active - * bit set + * FIXME: speed this up? */ -static void __activate_page(struct page *page, void *arg) +void activate_page(struct page *page) { struct zone *zone = page_zone(page); - int file = page_is_file_cache(page); - int lru = page_lru_base_type(page); - bool putback = !PageLRU(page); - - /* The page is isolated before it's moved to active list */ - if (!PageLRU(page) && !PageActive(page)) - return; - if ((PageLRU(page) && PageActive(page)) || PageUnevictable(page)) - return; - - if (!putback) - del_page_from_lru_list(zone, page, lru); - else - SetPageLRU(page); - - SetPageActive(page); - lru += LRU_ACTIVE; - add_page_to_lru_list(zone, page, lru); - - if (putback) - return; - __count_vm_event(PGACTIVATE); - update_page_reclaim_stat(zone, page, file, 1); -} -#ifdef CONFIG_SMP -static DEFINE_PER_CPU(struct pagevec, activate_page_pvecs); - -static void activate_page_drain(int cpu) -{ - struct pagevec *pvec = &per_cpu(activate_page_pvecs, cpu); - - if (pagevec_count(pvec)) - pagevec_lru_move_fn(pvec, __activate_page, NULL); -} - -void activate_page(struct page *page) -{ + spin_lock_irq(&zone->lru_lock); if (PageLRU(page) && !PageActive(page) && !PageUnevictable(page)) { - struct pagevec *pvec = &get_cpu_var(activate_page_pvecs); - - page_cache_get(page); - if (!pagevec_add(pvec, page)) - pagevec_lru_move_fn(pvec, __activate_page, NULL); - put_cpu_var(activate_page_pvecs); - } -} + int file = page_is_file_cache(page); + int lru = page_lru_base_type(page); + del_page_from_lru_list(zone, page, lru); -/* Caller should hold zone->lru_lock */ -int putback_active_lru_page(struct zone *zone, struct page *page) -{ - struct pagevec *pvec = &get_cpu_var(activate_page_pvecs); + SetPageActive(page); + lru += LRU_ACTIVE; + add_page_to_lru_list(zone, page, lru); + __count_vm_event(PGACTIVATE); - if (!pagevec_add(pvec, page)) { - spin_unlock_irq(&zone->lru_lock); - pagevec_lru_move_fn(pvec, __activate_page, NULL); - spin_lock_irq(&zone->lru_lock); + update_page_reclaim_stat(zone, page, file, 1); } - put_cpu_var(activate_page_pvecs); - return 1; -} - -#else -static inline void activate_page_drain(int cpu) -{ -} - -void activate_page(struct page *page) -{ - struct zone *zone = page_zone(page); - - spin_lock_irq(&zone->lru_lock); - if (PageLRU(page) && !PageActive(page) && !PageUnevictable(page)) - __activate_page(page, NULL); spin_unlock_irq(&zone->lru_lock); } -#endif /* * Mark a page as having seen activity. @@ -457,7 +372,6 @@ static void drain_cpu_pagevecs(int cpu) pagevec_move_tail(pvec); local_irq_restore(flags); } - activate_page_drain(cpu); } void lru_add_drain(void) @@ -602,33 +516,44 @@ void lru_add_page_tail(struct zone* zone, } } -static void ____pagevec_lru_add_fn(struct page *page, void *arg) -{ - enum lru_list lru = (enum lru_list)arg; - struct zone *zone = page_zone(page); - int file = is_file_lru(lru); - int active = is_active_lru(lru); - - VM_BUG_ON(PageActive(page)); - VM_BUG_ON(PageUnevictable(page)); - VM_BUG_ON(PageLRU(page)); - - SetPageLRU(page); - if (active) - SetPageActive(page); - update_page_reclaim_stat(zone, page, file, active); - add_page_to_lru_list(zone, page, lru); -} - /* * Add the passed pages to the LRU, then drop the caller's refcount * on them. Reinitialises the caller's pagevec. */ void ____pagevec_lru_add(struct pagevec *pvec, enum lru_list lru) { + int i; + struct zone *zone = NULL; + VM_BUG_ON(is_unevictable_lru(lru)); - pagevec_lru_move_fn(pvec, ____pagevec_lru_add_fn, (void *)lru); + for (i = 0; i < pagevec_count(pvec); i++) { + struct page *page = pvec->pages[i]; + struct zone *pagezone = page_zone(page); + int file; + int active; + + if (pagezone != zone) { + if (zone) + spin_unlock_irq(&zone->lru_lock); + zone = pagezone; + spin_lock_irq(&zone->lru_lock); + } + VM_BUG_ON(PageActive(page)); + VM_BUG_ON(PageUnevictable(page)); + VM_BUG_ON(PageLRU(page)); + SetPageLRU(page); + active = is_active_lru(lru); + file = is_file_lru(lru); + if (active) + SetPageActive(page); + update_page_reclaim_stat(zone, page, file, active); + add_page_to_lru_list(zone, page, lru); + } + if (zone) + spin_unlock_irq(&zone->lru_lock); + release_pages(pvec->pages, pvec->nr, pvec->cold); + pagevec_reinit(pvec); } EXPORT_SYMBOL(____pagevec_lru_add); diff --git a/mm/vmscan.c b/mm/vmscan.c index 99999a9..47a5096 100644 --- a/mm/vmscan.c +++ b/mm/vmscan.c @@ -1271,16 +1271,14 @@ putback_lru_pages(struct zone *zone, struct scan_control *sc, spin_lock_irq(&zone->lru_lock); continue; } + SetPageLRU(page); lru = page_lru(page); + add_page_to_lru_list(zone, page, lru); if (is_active_lru(lru)) { int file = is_file_lru(lru); int numpages = hpage_nr_pages(page); reclaim_stat->recent_rotated[file] += numpages; - if (putback_active_lru_page(zone, page)) - continue; } - SetPageLRU(page); - add_page_to_lru_list(zone, page, lru); if (!pagevec_add(&pvec, page)) { spin_unlock_irq(&zone->lru_lock); __pagevec_release(&pvec); diff --git a/sound/pci/ac97/ac97_codec.c b/sound/pci/ac97/ac97_codec.c index 0fc614c..cb62d17 100644 --- a/sound/pci/ac97/ac97_codec.c +++ b/sound/pci/ac97/ac97_codec.c @@ -1961,7 +1961,7 @@ static int snd_ac97_dev_disconnect(struct snd_device *device) } /* build_ops to do nothing */ -static struct snd_ac97_build_ops null_build_ops; +static const struct snd_ac97_build_ops null_build_ops; #ifdef CONFIG_SND_AC97_POWER_SAVE static void do_update_power(struct work_struct *work) diff --git a/sound/pci/ac97/ac97_patch.c b/sound/pci/ac97/ac97_patch.c index e68c98e..bf47574 100644 --- a/sound/pci/ac97/ac97_patch.c +++ b/sound/pci/ac97/ac97_patch.c @@ -371,7 +371,7 @@ static int patch_yamaha_ymf743_build_spdif(struct snd_ac97 *ac97) return 0; } -static struct snd_ac97_build_ops patch_yamaha_ymf743_ops = { +static const struct snd_ac97_build_ops patch_yamaha_ymf743_ops = { .build_spdif = patch_yamaha_ymf743_build_spdif, .build_3d = patch_yamaha_ymf7x3_3d, }; @@ -455,7 +455,7 @@ static int patch_yamaha_ymf753_post_spdif(struct snd_ac97 * ac97) return 0; } -static struct snd_ac97_build_ops patch_yamaha_ymf753_ops = { +static const struct snd_ac97_build_ops patch_yamaha_ymf753_ops = { .build_3d = patch_yamaha_ymf7x3_3d, .build_post_spdif = patch_yamaha_ymf753_post_spdif }; @@ -502,7 +502,7 @@ static int patch_wolfson_wm9703_specific(struct snd_ac97 * ac97) return 0; } -static struct snd_ac97_build_ops patch_wolfson_wm9703_ops = { +static const struct snd_ac97_build_ops patch_wolfson_wm9703_ops = { .build_specific = patch_wolfson_wm9703_specific, }; @@ -533,7 +533,7 @@ static int patch_wolfson_wm9704_specific(struct snd_ac97 * ac97) return 0; } -static struct snd_ac97_build_ops patch_wolfson_wm9704_ops = { +static const struct snd_ac97_build_ops patch_wolfson_wm9704_ops = { .build_specific = patch_wolfson_wm9704_specific, }; @@ -677,7 +677,7 @@ static int patch_wolfson_wm9711_specific(struct snd_ac97 * ac97) return 0; } -static struct snd_ac97_build_ops patch_wolfson_wm9711_ops = { +static const struct snd_ac97_build_ops patch_wolfson_wm9711_ops = { .build_specific = patch_wolfson_wm9711_specific, }; @@ -871,7 +871,7 @@ static void patch_wolfson_wm9713_resume (struct snd_ac97 * ac97) } #endif -static struct snd_ac97_build_ops patch_wolfson_wm9713_ops = { +static const struct snd_ac97_build_ops patch_wolfson_wm9713_ops = { .build_specific = patch_wolfson_wm9713_specific, .build_3d = patch_wolfson_wm9713_3d, #ifdef CONFIG_PM @@ -976,7 +976,7 @@ static int patch_sigmatel_stac97xx_specific(struct snd_ac97 * ac97) return 0; } -static struct snd_ac97_build_ops patch_sigmatel_stac9700_ops = { +static const struct snd_ac97_build_ops patch_sigmatel_stac9700_ops = { .build_3d = patch_sigmatel_stac9700_3d, .build_specific = patch_sigmatel_stac97xx_specific }; @@ -1023,7 +1023,7 @@ static int patch_sigmatel_stac9708_specific(struct snd_ac97 *ac97) return patch_sigmatel_stac97xx_specific(ac97); } -static struct snd_ac97_build_ops patch_sigmatel_stac9708_ops = { +static const struct snd_ac97_build_ops patch_sigmatel_stac9708_ops = { .build_3d = patch_sigmatel_stac9708_3d, .build_specific = patch_sigmatel_stac9708_specific }; @@ -1252,7 +1252,7 @@ static int patch_sigmatel_stac9758_specific(struct snd_ac97 *ac97) return 0; } -static struct snd_ac97_build_ops patch_sigmatel_stac9758_ops = { +static const struct snd_ac97_build_ops patch_sigmatel_stac9758_ops = { .build_3d = patch_sigmatel_stac9700_3d, .build_specific = patch_sigmatel_stac9758_specific }; @@ -1327,7 +1327,7 @@ static int patch_cirrus_build_spdif(struct snd_ac97 * ac97) return 0; } -static struct snd_ac97_build_ops patch_cirrus_ops = { +static const struct snd_ac97_build_ops patch_cirrus_ops = { .build_spdif = patch_cirrus_build_spdif }; @@ -1384,7 +1384,7 @@ static int patch_conexant_build_spdif(struct snd_ac97 * ac97) return 0; } -static struct snd_ac97_build_ops patch_conexant_ops = { +static const struct snd_ac97_build_ops patch_conexant_ops = { .build_spdif = patch_conexant_build_spdif }; @@ -1560,7 +1560,7 @@ static void patch_ad1881_chained(struct snd_ac97 * ac97, int unchained_idx, int } } -static struct snd_ac97_build_ops patch_ad1881_build_ops = { +static const struct snd_ac97_build_ops patch_ad1881_build_ops = { #ifdef CONFIG_PM .resume = ad18xx_resume #endif @@ -1647,7 +1647,7 @@ static int patch_ad1885_specific(struct snd_ac97 * ac97) return 0; } -static struct snd_ac97_build_ops patch_ad1885_build_ops = { +static const struct snd_ac97_build_ops patch_ad1885_build_ops = { .build_specific = &patch_ad1885_specific, #ifdef CONFIG_PM .resume = ad18xx_resume @@ -1674,7 +1674,7 @@ static int patch_ad1886_specific(struct snd_ac97 * ac97) return 0; } -static struct snd_ac97_build_ops patch_ad1886_build_ops = { +static const struct snd_ac97_build_ops patch_ad1886_build_ops = { .build_specific = &patch_ad1886_specific, #ifdef CONFIG_PM .resume = ad18xx_resume @@ -1881,7 +1881,7 @@ static int patch_ad1981a_specific(struct snd_ac97 * ac97) ARRAY_SIZE(snd_ac97_ad1981x_jack_sense)); } -static struct snd_ac97_build_ops patch_ad1981a_build_ops = { +static const struct snd_ac97_build_ops patch_ad1981a_build_ops = { .build_post_spdif = patch_ad198x_post_spdif, .build_specific = patch_ad1981a_specific, #ifdef CONFIG_PM @@ -1936,7 +1936,7 @@ static int patch_ad1981b_specific(struct snd_ac97 *ac97) ARRAY_SIZE(snd_ac97_ad1981x_jack_sense)); } -static struct snd_ac97_build_ops patch_ad1981b_build_ops = { +static const struct snd_ac97_build_ops patch_ad1981b_build_ops = { .build_post_spdif = patch_ad198x_post_spdif, .build_specific = patch_ad1981b_specific, #ifdef CONFIG_PM @@ -2075,7 +2075,7 @@ static int patch_ad1888_specific(struct snd_ac97 *ac97) return patch_build_controls(ac97, snd_ac97_ad1888_controls, ARRAY_SIZE(snd_ac97_ad1888_controls)); } -static struct snd_ac97_build_ops patch_ad1888_build_ops = { +static const struct snd_ac97_build_ops patch_ad1888_build_ops = { .build_post_spdif = patch_ad198x_post_spdif, .build_specific = patch_ad1888_specific, #ifdef CONFIG_PM @@ -2124,7 +2124,7 @@ static int patch_ad1980_specific(struct snd_ac97 *ac97) return patch_build_controls(ac97, &snd_ac97_ad198x_2cmic, 1); } -static struct snd_ac97_build_ops patch_ad1980_build_ops = { +static const struct snd_ac97_build_ops patch_ad1980_build_ops = { .build_post_spdif = patch_ad198x_post_spdif, .build_specific = patch_ad1980_specific, #ifdef CONFIG_PM @@ -2239,7 +2239,7 @@ static int patch_ad1985_specific(struct snd_ac97 *ac97) ARRAY_SIZE(snd_ac97_ad1985_controls)); } -static struct snd_ac97_build_ops patch_ad1985_build_ops = { +static const struct snd_ac97_build_ops patch_ad1985_build_ops = { .build_post_spdif = patch_ad198x_post_spdif, .build_specific = patch_ad1985_specific, #ifdef CONFIG_PM @@ -2531,7 +2531,7 @@ static int patch_ad1986_specific(struct snd_ac97 *ac97) ARRAY_SIZE(snd_ac97_ad1985_controls)); } -static struct snd_ac97_build_ops patch_ad1986_build_ops = { +static const struct snd_ac97_build_ops patch_ad1986_build_ops = { .build_post_spdif = patch_ad198x_post_spdif, .build_specific = patch_ad1986_specific, #ifdef CONFIG_PM @@ -2636,7 +2636,7 @@ static int patch_alc650_specific(struct snd_ac97 * ac97) return 0; } -static struct snd_ac97_build_ops patch_alc650_ops = { +static const struct snd_ac97_build_ops patch_alc650_ops = { .build_specific = patch_alc650_specific, .update_jacks = alc650_update_jacks }; @@ -2788,7 +2788,7 @@ static int patch_alc655_specific(struct snd_ac97 * ac97) return 0; } -static struct snd_ac97_build_ops patch_alc655_ops = { +static const struct snd_ac97_build_ops patch_alc655_ops = { .build_specific = patch_alc655_specific, .update_jacks = alc655_update_jacks }; @@ -2900,7 +2900,7 @@ static int patch_alc850_specific(struct snd_ac97 *ac97) return 0; } -static struct snd_ac97_build_ops patch_alc850_ops = { +static const struct snd_ac97_build_ops patch_alc850_ops = { .build_specific = patch_alc850_specific, .update_jacks = alc850_update_jacks }; @@ -2962,7 +2962,7 @@ static int patch_cm9738_specific(struct snd_ac97 * ac97) return patch_build_controls(ac97, snd_ac97_cm9738_controls, ARRAY_SIZE(snd_ac97_cm9738_controls)); } -static struct snd_ac97_build_ops patch_cm9738_ops = { +static const struct snd_ac97_build_ops patch_cm9738_ops = { .build_specific = patch_cm9738_specific, .update_jacks = cm9738_update_jacks }; @@ -3053,7 +3053,7 @@ static int patch_cm9739_post_spdif(struct snd_ac97 * ac97) return patch_build_controls(ac97, snd_ac97_cm9739_controls_spdif, ARRAY_SIZE(snd_ac97_cm9739_controls_spdif)); } -static struct snd_ac97_build_ops patch_cm9739_ops = { +static const struct snd_ac97_build_ops patch_cm9739_ops = { .build_specific = patch_cm9739_specific, .build_post_spdif = patch_cm9739_post_spdif, .update_jacks = cm9739_update_jacks @@ -3227,7 +3227,7 @@ static int patch_cm9761_specific(struct snd_ac97 * ac97) return patch_build_controls(ac97, snd_ac97_cm9761_controls, ARRAY_SIZE(snd_ac97_cm9761_controls)); } -static struct snd_ac97_build_ops patch_cm9761_ops = { +static const struct snd_ac97_build_ops patch_cm9761_ops = { .build_specific = patch_cm9761_specific, .build_post_spdif = patch_cm9761_post_spdif, .update_jacks = cm9761_update_jacks @@ -3323,7 +3323,7 @@ static int patch_cm9780_specific(struct snd_ac97 *ac97) return patch_build_controls(ac97, cm9780_controls, ARRAY_SIZE(cm9780_controls)); } -static struct snd_ac97_build_ops patch_cm9780_ops = { +static const struct snd_ac97_build_ops patch_cm9780_ops = { .build_specific = patch_cm9780_specific, .build_post_spdif = patch_cm9761_post_spdif /* identical with CM9761 */ }; @@ -3443,7 +3443,7 @@ static int patch_vt1616_specific(struct snd_ac97 * ac97) return 0; } -static struct snd_ac97_build_ops patch_vt1616_ops = { +static const struct snd_ac97_build_ops patch_vt1616_ops = { .build_specific = patch_vt1616_specific }; @@ -3797,7 +3797,7 @@ static int patch_it2646_specific(struct snd_ac97 * ac97) return 0; } -static struct snd_ac97_build_ops patch_it2646_ops = { +static const struct snd_ac97_build_ops patch_it2646_ops = { .build_specific = patch_it2646_specific, .update_jacks = it2646_update_jacks }; @@ -3831,7 +3831,7 @@ static int patch_si3036_specific(struct snd_ac97 * ac97) return 0; } -static struct snd_ac97_build_ops patch_si3036_ops = { +static const struct snd_ac97_build_ops patch_si3036_ops = { .build_specific = patch_si3036_specific, }; @@ -3898,7 +3898,7 @@ static int patch_ucb1400_specific(struct snd_ac97 * ac97) return 0; } -static struct snd_ac97_build_ops patch_ucb1400_ops = { +static const struct snd_ac97_build_ops patch_ucb1400_ops = { .build_specific = patch_ucb1400_specific, }; diff --git a/sound/pci/au88x0/au88x0_pcm.c b/sound/pci/au88x0/au88x0_pcm.c index b9d2f20..5439d66 100644 --- a/sound/pci/au88x0/au88x0_pcm.c +++ b/sound/pci/au88x0/au88x0_pcm.c @@ -42,11 +42,7 @@ static struct snd_pcm_hardware snd_vortex_playback_hw_adb = { .rate_min = 5000, .rate_max = 48000, .channels_min = 1, -#ifdef CHIP_AU8830 - .channels_max = 4, -#else .channels_max = 2, -#endif .buffer_bytes_max = 0x10000, .period_bytes_min = 0x1, .period_bytes_max = 0x1000, @@ -115,6 +111,17 @@ static struct snd_pcm_hardware snd_vortex_playback_hw_wt = { .periods_max = 64, }; #endif +#ifdef CHIP_AU8830 +static unsigned int au8830_channels[3] = { + 1, 2, 4, +}; + +static struct snd_pcm_hw_constraint_list hw_constraints_au8830_channels = { + .count = ARRAY_SIZE(au8830_channels), + .list = au8830_channels, + .mask = 0, +}; +#endif /* open callback */ static int snd_vortex_pcm_open(struct snd_pcm_substream *substream) { @@ -156,6 +163,15 @@ static int snd_vortex_pcm_open(struct snd_pcm_substream *substream) if (VORTEX_PCM_TYPE(substream->pcm) == VORTEX_PCM_ADB || VORTEX_PCM_TYPE(substream->pcm) == VORTEX_PCM_I2S) runtime->hw = snd_vortex_playback_hw_adb; +#ifdef CHIP_AU8830 + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK && + VORTEX_PCM_TYPE(substream->pcm) == VORTEX_PCM_ADB) { + runtime->hw.channels_max = 4; + snd_pcm_hw_constraint_list(runtime, 0, + SNDRV_PCM_HW_PARAM_CHANNELS, + &hw_constraints_au8830_channels); + } +#endif substream->runtime->private_data = NULL; } #ifndef CHIP_AU8810 diff --git a/sound/pci/hda/hda_codec.c b/sound/pci/hda/hda_codec.c index 05e5ec8..ae5c5d5e 100644 --- a/sound/pci/hda/hda_codec.c +++ b/sound/pci/hda/hda_codec.c @@ -2134,10 +2134,10 @@ int snd_hda_codec_reset(struct hda_codec *codec) * This function returns zero if successful or a negative error code. */ int snd_hda_add_vmaster(struct hda_codec *codec, char *name, - unsigned int *tlv, const char **slaves) + unsigned int *tlv, const char * const *slaves) { struct snd_kcontrol *kctl; - const char **s; + const char * const *s; int err; for (s = slaves; *s && !snd_hda_find_mixer_ctl(codec, *s); s++) @@ -3689,7 +3689,7 @@ EXPORT_SYMBOL_HDA(snd_hda_build_pcms); * If no entries are matching, the function returns a negative value. */ int snd_hda_check_board_config(struct hda_codec *codec, - int num_configs, const char **models, + int num_configs, const char * const *models, const struct snd_pci_quirk *tbl) { if (codec->modelname && models) { @@ -3753,7 +3753,7 @@ EXPORT_SYMBOL_HDA(snd_hda_check_board_config); * If no entries are matching, the function returns a negative value. */ int snd_hda_check_board_codec_sid_config(struct hda_codec *codec, - int num_configs, const char **models, + int num_configs, const char * const *models, const struct snd_pci_quirk *tbl) { const struct snd_pci_quirk *q; @@ -4690,7 +4690,7 @@ const char *hda_get_input_pin_label(struct hda_codec *codec, hda_nid_t pin, int check_location) { unsigned int def_conf; - static const char *mic_names[] = { + static const char * const mic_names[] = { "Internal Mic", "Dock Mic", "Mic", "Front Mic", "Rear Mic", }; int attr; diff --git a/sound/pci/hda/hda_generic.c b/sound/pci/hda/hda_generic.c index fb0582f8..a63c54d 100644 --- a/sound/pci/hda/hda_generic.c +++ b/sound/pci/hda/hda_generic.c @@ -762,7 +762,8 @@ static int check_existing_control(struct hda_codec *codec, const char *type, con /* * build output mixer controls */ -static int create_output_mixers(struct hda_codec *codec, const char **names) +static int create_output_mixers(struct hda_codec *codec, + const char * const *names) { struct hda_gspec *spec = codec->spec; int i, err; @@ -780,8 +781,8 @@ static int create_output_mixers(struct hda_codec *codec, const char **names) static int build_output_controls(struct hda_codec *codec) { struct hda_gspec *spec = codec->spec; - static const char *types_speaker[] = { "Speaker", "Headphone" }; - static const char *types_line[] = { "Front", "Headphone" }; + static const char * const types_speaker[] = { "Speaker", "Headphone" }; + static const char * const types_line[] = { "Front", "Headphone" }; switch (spec->pcm_vol_nodes) { case 1: diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c index d3d18be..2e91a99 100644 --- a/sound/pci/hda/hda_intel.c +++ b/sound/pci/hda/hda_intel.c @@ -2809,6 +2809,8 @@ static DEFINE_PCI_DEVICE_TABLE(azx_ids) = { #endif /* Vortex86MX */ { PCI_DEVICE(0x17f3, 0x3010), .driver_data = AZX_DRIVER_GENERIC }, + /* VMware HDAudio */ + { PCI_DEVICE(0x15ad, 0x1977), .driver_data = AZX_DRIVER_GENERIC }, /* AMD/ATI Generic, PCI class code and Vendor ID for HD Audio */ { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_ANY_ID), .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8, diff --git a/sound/pci/hda/hda_local.h b/sound/pci/hda/hda_local.h index 46bbefe..3ab5e7a 100644 --- a/sound/pci/hda/hda_local.h +++ b/sound/pci/hda/hda_local.h @@ -140,7 +140,7 @@ void snd_hda_set_vmaster_tlv(struct hda_codec *codec, hda_nid_t nid, int dir, struct snd_kcontrol *snd_hda_find_mixer_ctl(struct hda_codec *codec, const char *name); int snd_hda_add_vmaster(struct hda_codec *codec, char *name, - unsigned int *tlv, const char **slaves); + unsigned int *tlv, const char * const *slaves); int snd_hda_codec_reset(struct hda_codec *codec); /* amp value bits */ @@ -341,10 +341,10 @@ void snd_print_pcm_bits(int pcm, char *buf, int buflen); * Misc */ int snd_hda_check_board_config(struct hda_codec *codec, int num_configs, - const char **modelnames, + const char * const *modelnames, const struct snd_pci_quirk *pci_list); int snd_hda_check_board_codec_sid_config(struct hda_codec *codec, - int num_configs, const char **models, + int num_configs, const char * const *models, const struct snd_pci_quirk *tbl); int snd_hda_add_new_ctls(struct hda_codec *codec, struct snd_kcontrol_new *knew); diff --git a/sound/pci/hda/hda_proc.c b/sound/pci/hda/hda_proc.c index f025200..bfe74c2 100644 --- a/sound/pci/hda/hda_proc.c +++ b/sound/pci/hda/hda_proc.c @@ -418,7 +418,7 @@ static void print_digital_conv(struct snd_info_buffer *buffer, static const char *get_pwr_state(u32 state) { - static const char *buf[4] = { + static const char * const buf[4] = { "D0", "D1", "D2", "D3" }; if (state < 4) diff --git a/sound/pci/hda/patch_analog.c b/sound/pci/hda/patch_analog.c index 4678067..8dabab7 100644 --- a/sound/pci/hda/patch_analog.c +++ b/sound/pci/hda/patch_analog.c @@ -46,6 +46,9 @@ struct ad198x_spec { unsigned int cur_eapd; unsigned int need_dac_fix; + hda_nid_t *alt_dac_nid; + struct hda_pcm_stream *stream_analog_alt_playback; + /* capture */ unsigned int num_adc_nids; hda_nid_t *adc_nids; @@ -81,8 +84,8 @@ struct ad198x_spec { #endif /* for virtual master */ hda_nid_t vmaster_nid; - const char **slave_vols; - const char **slave_sws; + const char * const *slave_vols; + const char * const *slave_sws; }; /* @@ -130,7 +133,7 @@ static int ad198x_init(struct hda_codec *codec) return 0; } -static const char *ad_slave_vols[] = { +static const char * const ad_slave_vols[] = { "Front Playback Volume", "Surround Playback Volume", "Center Playback Volume", @@ -143,7 +146,7 @@ static const char *ad_slave_vols[] = { NULL }; -static const char *ad_slave_sws[] = { +static const char * const ad_slave_sws[] = { "Front Playback Switch", "Surround Playback Switch", "Center Playback Switch", @@ -156,6 +159,25 @@ static const char *ad_slave_sws[] = { NULL }; +static const char * const ad1988_6stack_fp_slave_vols[] = { + "Front Playback Volume", + "Surround Playback Volume", + "Center Playback Volume", + "LFE Playback Volume", + "Side Playback Volume", + "IEC958 Playback Volume", + NULL +}; + +static const char * const ad1988_6stack_fp_slave_sws[] = { + "Front Playback Switch", + "Surround Playback Switch", + "Center Playback Switch", + "LFE Playback Switch", + "Side Playback Switch", + "IEC958 Playback Switch", + NULL +}; static void ad198x_free_kctls(struct hda_codec *codec); #ifdef CONFIG_SND_HDA_INPUT_BEEP @@ -309,6 +331,38 @@ static int ad198x_playback_pcm_cleanup(struct hda_pcm_stream *hinfo, return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout); } +static int ad198x_alt_playback_pcm_prepare(struct hda_pcm_stream *hinfo, + struct hda_codec *codec, + unsigned int stream_tag, + unsigned int format, + struct snd_pcm_substream *substream) +{ + struct ad198x_spec *spec = codec->spec; + snd_hda_codec_setup_stream(codec, spec->alt_dac_nid[0], stream_tag, + 0, format); + return 0; +} + +static int ad198x_alt_playback_pcm_cleanup(struct hda_pcm_stream *hinfo, + struct hda_codec *codec, + struct snd_pcm_substream *substream) +{ + struct ad198x_spec *spec = codec->spec; + snd_hda_codec_cleanup_stream(codec, spec->alt_dac_nid[0]); + return 0; +} + +static struct hda_pcm_stream ad198x_pcm_analog_alt_playback = { + .substreams = 1, + .channels_min = 2, + .channels_max = 2, + /* NID is set in ad198x_build_pcms */ + .ops = { + .prepare = ad198x_alt_playback_pcm_prepare, + .cleanup = ad198x_alt_playback_pcm_cleanup + }, +}; + /* * Digital out */ @@ -446,6 +500,17 @@ static int ad198x_build_pcms(struct hda_codec *codec) } } + if (spec->alt_dac_nid && spec->stream_analog_alt_playback) { + codec->num_pcms++; + info = spec->pcm_rec + 2; + info->name = "AD198x Headphone"; + info->pcm_type = HDA_PCM_TYPE_AUDIO; + info->stream[SNDRV_PCM_STREAM_PLAYBACK] = + *spec->stream_analog_alt_playback; + info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = + spec->alt_dac_nid[0]; + } + return 0; } @@ -1069,7 +1134,7 @@ enum { AD1986A_MODELS }; -static const char *ad1986a_models[AD1986A_MODELS] = { +static const char * const ad1986a_models[AD1986A_MODELS] = { [AD1986A_6STACK] = "6stack", [AD1986A_3STACK] = "3stack", [AD1986A_LAPTOP] = "laptop", @@ -1813,7 +1878,7 @@ enum { AD1981_MODELS }; -static const char *ad1981_models[AD1981_MODELS] = { +static const char * const ad1981_models[AD1981_MODELS] = { [AD1981_HP] = "hp", [AD1981_THINKPAD] = "thinkpad", [AD1981_BASIC] = "basic", @@ -2015,6 +2080,7 @@ static int patch_ad1981(struct hda_codec *codec) enum { AD1988_6STACK, AD1988_6STACK_DIG, + AD1988_6STACK_DIG_FP, AD1988_3STACK, AD1988_3STACK_DIG, AD1988_LAPTOP, @@ -2047,6 +2113,10 @@ static hda_nid_t ad1988_6stack_dac_nids_rev2[4] = { 0x04, 0x05, 0x0a, 0x06 }; +static hda_nid_t ad1988_alt_dac_nid[1] = { + 0x03 +}; + static hda_nid_t ad1988_3stack_dac_nids_rev2[3] = { 0x04, 0x0a, 0x06 }; @@ -2166,6 +2236,35 @@ static struct snd_kcontrol_new ad1988_6stack_mixers2[] = { { } /* end */ }; +static struct snd_kcontrol_new ad1988_6stack_fp_mixers[] = { + HDA_CODEC_VOLUME("Headphone Playback Volume", 0x03, 0x0, HDA_OUTPUT), + + HDA_BIND_MUTE("Front Playback Switch", 0x29, 2, HDA_INPUT), + HDA_BIND_MUTE("Surround Playback Switch", 0x2a, 2, HDA_INPUT), + HDA_BIND_MUTE_MONO("Center Playback Switch", 0x27, 1, 2, HDA_INPUT), + HDA_BIND_MUTE_MONO("LFE Playback Switch", 0x27, 2, 2, HDA_INPUT), + HDA_BIND_MUTE("Side Playback Switch", 0x28, 2, HDA_INPUT), + HDA_BIND_MUTE("Headphone Playback Switch", 0x22, 2, HDA_INPUT), + HDA_BIND_MUTE("Mono Playback Switch", 0x1e, 2, HDA_INPUT), + + HDA_CODEC_VOLUME("CD Playback Volume", 0x20, 0x6, HDA_INPUT), + HDA_CODEC_MUTE("CD Playback Switch", 0x20, 0x6, HDA_INPUT), + HDA_CODEC_VOLUME("Front Mic Playback Volume", 0x20, 0x0, HDA_INPUT), + HDA_CODEC_MUTE("Front Mic Playback Switch", 0x20, 0x0, HDA_INPUT), + HDA_CODEC_VOLUME("Line Playback Volume", 0x20, 0x1, HDA_INPUT), + HDA_CODEC_MUTE("Line Playback Switch", 0x20, 0x1, HDA_INPUT), + HDA_CODEC_VOLUME("Mic Playback Volume", 0x20, 0x4, HDA_INPUT), + HDA_CODEC_MUTE("Mic Playback Switch", 0x20, 0x4, HDA_INPUT), + + HDA_CODEC_VOLUME("Analog Mix Playback Volume", 0x21, 0x0, HDA_OUTPUT), + HDA_CODEC_MUTE("Analog Mix Playback Switch", 0x21, 0x0, HDA_OUTPUT), + + HDA_CODEC_VOLUME("Front Mic Boost Volume", 0x39, 0x0, HDA_OUTPUT), + HDA_CODEC_VOLUME("Mic Boost Volume", 0x3c, 0x0, HDA_OUTPUT), + + { } /* end */ +}; + /* 3-stack mode */ static struct snd_kcontrol_new ad1988_3stack_mixers1[] = { HDA_CODEC_VOLUME("Front Playback Volume", 0x04, 0x0, HDA_OUTPUT), @@ -2445,6 +2544,68 @@ static struct hda_verb ad1988_6stack_init_verbs[] = { { } }; +static struct hda_verb ad1988_6stack_fp_init_verbs[] = { + /* Front, Surround, CLFE, side DAC; unmute as default */ + {0x04, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, + {0x06, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, + {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, + {0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, + /* Headphone; unmute as default */ + {0x03, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, + /* Port-A front headphon path */ + {0x37, AC_VERB_SET_CONNECT_SEL, 0x00}, /* DAC0:03h */ + {0x22, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, + {0x22, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(1)}, + {0x11, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, + {0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP}, + /* Port-D line-out path */ + {0x29, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, + {0x29, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(1)}, + {0x12, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, + {0x12, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT}, + /* Port-F surround path */ + {0x2a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, + {0x2a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(1)}, + {0x16, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, + {0x16, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT}, + /* Port-G CLFE path */ + {0x27, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, + {0x27, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(1)}, + {0x24, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, + {0x24, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT}, + /* Port-H side path */ + {0x28, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, + {0x28, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(1)}, + {0x25, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, + {0x25, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT}, + /* Mono out path */ + {0x36, AC_VERB_SET_CONNECT_SEL, 0x1}, /* DAC1:04h */ + {0x1e, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, + {0x1e, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(1)}, + {0x13, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT}, + {0x13, AC_VERB_SET_AMP_GAIN_MUTE, 0xb01f}, /* unmute, 0dB */ + /* Port-B front mic-in path */ + {0x14, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, + {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80}, + {0x39, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_ZERO}, + /* Port-C line-in path */ + {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, + {0x15, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN}, + {0x3a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_ZERO}, + {0x33, AC_VERB_SET_CONNECT_SEL, 0x0}, + /* Port-E mic-in path */ + {0x17, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, + {0x17, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80}, + {0x3c, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_ZERO}, + {0x34, AC_VERB_SET_CONNECT_SEL, 0x0}, + /* Analog CD Input */ + {0x18, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN}, + /* Analog Mix output amp */ + {0x21, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE | 0x1f}, /* 0dB */ + + { } +}; + static struct hda_verb ad1988_capture_init_verbs[] = { /* mute analog mix */ {0x20, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, @@ -2792,7 +2953,9 @@ static int ad1988_auto_create_multi_out_ctls(struct ad198x_spec *spec, const struct auto_pin_cfg *cfg) { char name[32]; - static const char *chname[4] = { "Front", "Surround", NULL /*CLFE*/, "Side" }; + static const char * const chname[4] = { + "Front", "Surround", NULL /*CLFE*/, "Side" + }; hda_nid_t nid; int i, err; @@ -3074,13 +3237,13 @@ static int ad1988_auto_init(struct hda_codec *codec) return 0; } - /* */ -static const char *ad1988_models[AD1988_MODEL_LAST] = { +static const char * const ad1988_models[AD1988_MODEL_LAST] = { [AD1988_6STACK] = "6stack", [AD1988_6STACK_DIG] = "6stack-dig", + [AD1988_6STACK_DIG_FP] = "6stack-dig-fp", [AD1988_3STACK] = "3stack", [AD1988_3STACK_DIG] = "3stack-dig", [AD1988_LAPTOP] = "laptop", @@ -3140,6 +3303,7 @@ static int patch_ad1988(struct hda_codec *codec) switch (board_config) { case AD1988_6STACK: case AD1988_6STACK_DIG: + case AD1988_6STACK_DIG_FP: spec->multiout.max_channels = 8; spec->multiout.num_dacs = 4; if (is_rev2(codec)) @@ -3152,10 +3316,22 @@ static int patch_ad1988(struct hda_codec *codec) spec->mixers[0] = ad1988_6stack_mixers1_rev2; else spec->mixers[0] = ad1988_6stack_mixers1; - spec->mixers[1] = ad1988_6stack_mixers2; + if (board_config == AD1988_6STACK_DIG_FP) { + spec->mixers[1] = ad1988_6stack_fp_mixers; + spec->slave_vols = ad1988_6stack_fp_slave_vols; + spec->slave_sws = ad1988_6stack_fp_slave_sws; + spec->alt_dac_nid = ad1988_alt_dac_nid; + spec->stream_analog_alt_playback = + &ad198x_pcm_analog_alt_playback; + } else + spec->mixers[1] = ad1988_6stack_mixers2; spec->num_init_verbs = 1; - spec->init_verbs[0] = ad1988_6stack_init_verbs; - if (board_config == AD1988_6STACK_DIG) { + if (board_config == AD1988_6STACK_DIG_FP) + spec->init_verbs[0] = ad1988_6stack_fp_init_verbs; + else + spec->init_verbs[0] = ad1988_6stack_init_verbs; + if ((board_config == AD1988_6STACK_DIG) || + (board_config == AD1988_6STACK_DIG_FP)) { spec->multiout.dig_out_nid = AD1988_SPDIF_OUT; spec->dig_in_nid = AD1988_SPDIF_IN; } @@ -3399,7 +3575,7 @@ static struct hda_amp_list ad1884_loopbacks[] = { }; #endif -static const char *ad1884_slave_vols[] = { +static const char * const ad1884_slave_vols[] = { "PCM Playback Volume", "Mic Playback Volume", "Mono Playback Volume", @@ -3637,7 +3813,7 @@ enum { AD1984_MODELS }; -static const char *ad1984_models[AD1984_MODELS] = { +static const char * const ad1984_models[AD1984_MODELS] = { [AD1984_BASIC] = "basic", [AD1984_THINKPAD] = "thinkpad", [AD1984_DELL_DESKTOP] = "dell_desktop", @@ -4308,7 +4484,7 @@ enum { AD1884A_MODELS }; -static const char *ad1884a_models[AD1884A_MODELS] = { +static const char * const ad1884a_models[AD1884A_MODELS] = { [AD1884A_DESKTOP] = "desktop", [AD1884A_LAPTOP] = "laptop", [AD1884A_MOBILE] = "mobile", @@ -4696,7 +4872,7 @@ enum { AD1882_MODELS }; -static const char *ad1882_models[AD1986A_MODELS] = { +static const char * const ad1882_models[AD1986A_MODELS] = { [AD1882_3STACK] = "3stack", [AD1882_6STACK] = "6stack", }; diff --git a/sound/pci/hda/patch_cirrus.c b/sound/pci/hda/patch_cirrus.c index 18af38e..a07b031 100644 --- a/sound/pci/hda/patch_cirrus.c +++ b/sound/pci/hda/patch_cirrus.c @@ -490,7 +490,7 @@ static int parse_digital_input(struct hda_codec *codec) * create mixer controls */ -static const char *dir_sfx[2] = { "Playback", "Capture" }; +static const char * const dir_sfx[2] = { "Playback", "Capture" }; static int add_mute(struct hda_codec *codec, const char *name, int index, unsigned int pval, int dir, struct snd_kcontrol **kctlp) @@ -1156,7 +1156,7 @@ static int cs_parse_auto_config(struct hda_codec *codec) return 0; } -static const char *cs420x_models[CS420X_MODELS] = { +static const char * const cs420x_models[CS420X_MODELS] = { [CS420X_MBP53] = "mbp53", [CS420X_MBP55] = "mbp55", [CS420X_IMAC27] = "imac27", diff --git a/sound/pci/hda/patch_cmedia.c b/sound/pci/hda/patch_cmedia.c index ff60908..1f8bbcd 100644 --- a/sound/pci/hda/patch_cmedia.c +++ b/sound/pci/hda/patch_cmedia.c @@ -608,7 +608,7 @@ static void cmi9880_free(struct hda_codec *codec) /* */ -static const char *cmi9880_models[CMI_MODELS] = { +static const char * const cmi9880_models[CMI_MODELS] = { [CMI_MINIMAL] = "minimal", [CMI_MIN_FP] = "min_fp", [CMI_FULL] = "full", diff --git a/sound/pci/hda/patch_conexant.c b/sound/pci/hda/patch_conexant.c index e96581f..9bb030a 100644 --- a/sound/pci/hda/patch_conexant.c +++ b/sound/pci/hda/patch_conexant.c @@ -537,13 +537,13 @@ static struct snd_kcontrol_new cxt_beep_mixer[] = { }; #endif -static const char *slave_vols[] = { +static const char * const slave_vols[] = { "Headphone Playback Volume", "Speaker Playback Volume", NULL }; -static const char *slave_sws[] = { +static const char * const slave_sws[] = { "Headphone Playback Switch", "Speaker Playback Switch", NULL @@ -1134,7 +1134,7 @@ enum { CXT5045_MODELS }; -static const char *cxt5045_models[CXT5045_MODELS] = { +static const char * const cxt5045_models[CXT5045_MODELS] = { [CXT5045_LAPTOP_HPSENSE] = "laptop-hpsense", [CXT5045_LAPTOP_MICSENSE] = "laptop-micsense", [CXT5045_LAPTOP_HPMICSENSE] = "laptop-hpmicsense", @@ -1579,7 +1579,7 @@ enum { CXT5047_MODELS }; -static const char *cxt5047_models[CXT5047_MODELS] = { +static const char * const cxt5047_models[CXT5047_MODELS] = { [CXT5047_LAPTOP] = "laptop", [CXT5047_LAPTOP_HP] = "laptop-hp", [CXT5047_LAPTOP_EAPD] = "laptop-eapd", @@ -1995,7 +1995,7 @@ enum { CXT5051_MODELS }; -static const char *cxt5051_models[CXT5051_MODELS] = { +static const char *const cxt5051_models[CXT5051_MODELS] = { [CXT5051_LAPTOP] = "laptop", [CXT5051_HP] = "hp", [CXT5051_HP_DV6736] = "hp-dv6736", @@ -3084,7 +3084,7 @@ enum { CXT5066_MODELS }; -static const char *cxt5066_models[CXT5066_MODELS] = { +static const char * const cxt5066_models[CXT5066_MODELS] = { [CXT5066_LAPTOP] = "laptop", [CXT5066_DELL_LAPTOP] = "dell-laptop", [CXT5066_OLPC_XO_1_5] = "olpc-xo-1_5", @@ -3746,7 +3746,7 @@ static int cx_auto_build_output_controls(struct hda_codec *codec) struct conexant_spec *spec = codec->spec; int i, err; int num_line = 0, num_hp = 0, num_spk = 0; - static const char *texts[3] = { "Front", "Surround", "CLFE" }; + static const char * const texts[3] = { "Front", "Surround", "CLFE" }; if (spec->dac_info_filled == 1) return cx_auto_add_pb_volume(codec, spec->dac_info[0].dac, diff --git a/sound/pci/hda/patch_hdmi.c b/sound/pci/hda/patch_hdmi.c index f29b97b..2d5b83f 100644 --- a/sound/pci/hda/patch_hdmi.c +++ b/sound/pci/hda/patch_hdmi.c @@ -817,6 +817,7 @@ static int hdmi_pcm_open(struct hda_pcm_stream *hinfo, struct hdmi_spec *spec = codec->spec; struct hdmi_eld *eld; struct hda_pcm_stream *codec_pars; + struct snd_pcm_runtime *runtime = substream->runtime; unsigned int idx; for (idx = 0; idx < spec->num_cvts; idx++) @@ -844,6 +845,14 @@ static int hdmi_pcm_open(struct hda_pcm_stream *hinfo, hinfo->formats = codec_pars->formats; hinfo->maxbps = codec_pars->maxbps; } + /* store the updated parameters */ + runtime->hw.channels_min = hinfo->channels_min; + runtime->hw.channels_max = hinfo->channels_max; + runtime->hw.formats = hinfo->formats; + runtime->hw.rates = hinfo->rates; + + snd_pcm_hw_constraint_step(substream->runtime, 0, + SNDRV_PCM_HW_PARAM_CHANNELS, 2); return 0; } @@ -1238,6 +1247,9 @@ static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo, snd_pcm_hw_constraint_list(substream->runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, hw_constraints_channels); + } else { + snd_pcm_hw_constraint_step(substream->runtime, 0, + SNDRV_PCM_HW_PARAM_CHANNELS, 2); } return snd_hda_multi_out_dig_open(codec, &spec->multiout); diff --git a/sound/pci/hda/patch_realtek.c b/sound/pci/hda/patch_realtek.c index 51c08ed..269dbff 100644 --- a/sound/pci/hda/patch_realtek.c +++ b/sound/pci/hda/patch_realtek.c @@ -303,6 +303,8 @@ struct alc_customize_define { unsigned int fixup:1; /* Means that this sku is set by driver, not read from hw */ }; +struct alc_fixup; + struct alc_spec { /* codec parameterization */ struct snd_kcontrol_new *mixers[5]; /* mixer arrays */ @@ -404,6 +406,11 @@ struct alc_spec { /* for PLL fix */ hda_nid_t pll_nid; unsigned int pll_coef_idx, pll_coef_bit; + + /* fix-up list */ + int fixup_id; + const struct alc_fixup *fixup_list; + const char *fixup_name; }; /* @@ -1683,88 +1690,131 @@ struct alc_model_fixup { }; struct alc_fixup { - unsigned int sku; - const struct alc_pincfg *pins; - const struct hda_verb *verbs; - void (*func)(struct hda_codec *codec, const struct alc_fixup *fix, - int pre_init); + int type; + bool chained; + int chain_id; + union { + unsigned int sku; + const struct alc_pincfg *pins; + const struct hda_verb *verbs; + void (*func)(struct hda_codec *codec, + const struct alc_fixup *fix, + int action); + } v; }; -static void __alc_pick_fixup(struct hda_codec *codec, - const struct alc_fixup *fix, - const char *modelname, - int pre_init) +enum { + ALC_FIXUP_INVALID, + ALC_FIXUP_SKU, + ALC_FIXUP_PINS, + ALC_FIXUP_VERBS, + ALC_FIXUP_FUNC, +}; + +enum { + ALC_FIXUP_ACT_PRE_PROBE, + ALC_FIXUP_ACT_PROBE, + ALC_FIXUP_ACT_INIT, +}; + +static void alc_apply_fixup(struct hda_codec *codec, int action) { - const struct alc_pincfg *cfg; - struct alc_spec *spec; + struct alc_spec *spec = codec->spec; + int id = spec->fixup_id; + const char *modelname = spec->fixup_name; + int depth = 0; - cfg = fix->pins; - if (pre_init && fix->sku) { -#ifdef CONFIG_SND_DEBUG_VERBOSE - snd_printdd(KERN_INFO "hda_codec: %s: Apply sku override for %s\n", - codec->chip_name, modelname); -#endif - spec = codec->spec; - spec->cdefine.sku_cfg = fix->sku; - spec->cdefine.fixup = 1; - } - if (pre_init && cfg) { -#ifdef CONFIG_SND_DEBUG_VERBOSE - snd_printdd(KERN_INFO "hda_codec: %s: Apply pincfg for %s\n", - codec->chip_name, modelname); -#endif - for (; cfg->nid; cfg++) - snd_hda_codec_set_pincfg(codec, cfg->nid, cfg->val); - } - if (!pre_init && fix->verbs) { -#ifdef CONFIG_SND_DEBUG_VERBOSE - snd_printdd(KERN_INFO "hda_codec: %s: Apply fix-verbs for %s\n", - codec->chip_name, modelname); -#endif - add_verb(codec->spec, fix->verbs); - } - if (fix->func) { -#ifdef CONFIG_SND_DEBUG_VERBOSE - snd_printdd(KERN_INFO "hda_codec: %s: Apply fix-func for %s\n", - codec->chip_name, modelname); -#endif - fix->func(codec, fix, pre_init); + if (!spec->fixup_list) + return; + + while (id >= 0) { + const struct alc_fixup *fix = spec->fixup_list + id; + const struct alc_pincfg *cfg; + + switch (fix->type) { + case ALC_FIXUP_SKU: + if (action != ALC_FIXUP_ACT_PRE_PROBE || !fix->v.sku) + break;; + snd_printdd(KERN_INFO "hda_codec: %s: " + "Apply sku override for %s\n", + codec->chip_name, modelname); + spec->cdefine.sku_cfg = fix->v.sku; + spec->cdefine.fixup = 1; + break; + case ALC_FIXUP_PINS: + cfg = fix->v.pins; + if (action != ALC_FIXUP_ACT_PRE_PROBE || !cfg) + break; + snd_printdd(KERN_INFO "hda_codec: %s: " + "Apply pincfg for %s\n", + codec->chip_name, modelname); + for (; cfg->nid; cfg++) + snd_hda_codec_set_pincfg(codec, cfg->nid, + cfg->val); + break; + case ALC_FIXUP_VERBS: + if (action != ALC_FIXUP_ACT_PROBE || !fix->v.verbs) + break; + snd_printdd(KERN_INFO "hda_codec: %s: " + "Apply fix-verbs for %s\n", + codec->chip_name, modelname); + add_verb(codec->spec, fix->v.verbs); + break; + case ALC_FIXUP_FUNC: + if (!fix->v.func) + break; + snd_printdd(KERN_INFO "hda_codec: %s: " + "Apply fix-func for %s\n", + codec->chip_name, modelname); + fix->v.func(codec, fix, action); + break; + default: + snd_printk(KERN_ERR "hda_codec: %s: " + "Invalid fixup type %d\n", + codec->chip_name, fix->type); + break; + } + if (!fix[id].chained) + break; + if (++depth > 10) + break; + id = fix[id].chain_id; } } static void alc_pick_fixup(struct hda_codec *codec, - const struct snd_pci_quirk *quirk, - const struct alc_fixup *fix, - int pre_init) + const struct alc_model_fixup *models, + const struct snd_pci_quirk *quirk, + const struct alc_fixup *fixlist) { - quirk = snd_pci_quirk_lookup(codec->bus->pci, quirk); - if (quirk) { - fix += quirk->value; -#ifdef CONFIG_SND_DEBUG_VERBOSE - __alc_pick_fixup(codec, fix, quirk->name, pre_init); -#else - __alc_pick_fixup(codec, fix, NULL, pre_init); -#endif - } -} + struct alc_spec *spec = codec->spec; + int id = -1; + const char *name = NULL; -static void alc_pick_fixup_model(struct hda_codec *codec, - const struct alc_model_fixup *models, - const struct snd_pci_quirk *quirk, - const struct alc_fixup *fix, - int pre_init) -{ if (codec->modelname && models) { while (models->name) { if (!strcmp(codec->modelname, models->name)) { - fix += models->id; + id = models->id; + name = models->name; break; } models++; } - __alc_pick_fixup(codec, fix, codec->modelname, pre_init); - } else { - alc_pick_fixup(codec, quirk, fix, pre_init); + } + if (id < 0) { + quirk = snd_pci_quirk_lookup(codec->bus->pci, quirk); + if (quirk) { + id = quirk->value; +#ifdef CONFIG_SND_DEBUG_VERBOSE + name = quirk->name; +#endif + } + } + + spec->fixup_id = id; + if (id >= 0) { + spec->fixup_list = fixlist; + spec->fixup_name = name; } } @@ -2866,7 +2916,7 @@ static struct snd_kcontrol_new alc880_uniwill_p53_mixer[] = { /* * slave controls for virtual master */ -static const char *alc_slave_vols[] = { +static const char * const alc_slave_vols[] = { "Front Playback Volume", "Surround Playback Volume", "Center Playback Volume", @@ -2880,7 +2930,7 @@ static const char *alc_slave_vols[] = { NULL, }; -static const char *alc_slave_sws[] = { +static const char * const alc_slave_sws[] = { "Front Playback Switch", "Surround Playback Switch", "Center Playback Switch", @@ -3861,6 +3911,8 @@ static int alc_init(struct hda_codec *codec) if (spec->init_hook) spec->init_hook(codec); + alc_apply_fixup(codec, ALC_FIXUP_ACT_INIT); + hda_call_check_power_status(codec, 0x01); return 0; } @@ -4559,7 +4611,7 @@ static struct hda_verb alc880_test_init_verbs[] = { /* */ -static const char *alc880_models[ALC880_MODEL_LAST] = { +static const char * const alc880_models[ALC880_MODEL_LAST] = { [ALC880_3ST] = "3stack", [ALC880_TCL_S700] = "tcl", [ALC880_3ST_DIG] = "3stack-digout", @@ -5092,7 +5144,7 @@ static const char *alc_get_line_out_pfx(const struct auto_pin_cfg *cfg, static int alc880_auto_create_multi_out_ctls(struct alc_spec *spec, const struct auto_pin_cfg *cfg) { - static const char *chname[4] = { + static const char * const chname[4] = { "Front", "Surround", NULL /*CLFE*/, "Side" }; const char *pfx = alc_get_line_out_pfx(cfg, false); @@ -7090,7 +7142,8 @@ enum { static const struct alc_fixup alc260_fixups[] = { [PINFIX_HP_DC5750] = { - .pins = (const struct alc_pincfg[]) { + .type = ALC_FIXUP_PINS, + .v.pins = (const struct alc_pincfg[]) { { 0x11, 0x90130110 }, /* speaker */ { } } @@ -7105,7 +7158,7 @@ static struct snd_pci_quirk alc260_fixup_tbl[] = { /* * ALC260 configurations */ -static const char *alc260_models[ALC260_MODEL_LAST] = { +static const char * const alc260_models[ALC260_MODEL_LAST] = { [ALC260_BASIC] = "basic", [ALC260_HP] = "hp", [ALC260_HP_3013] = "hp-3013", @@ -7301,8 +7354,10 @@ static int patch_alc260(struct hda_codec *codec) board_config = ALC260_AUTO; } - if (board_config == ALC260_AUTO) - alc_pick_fixup(codec, alc260_fixup_tbl, alc260_fixups, 1); + if (board_config == ALC260_AUTO) { + alc_pick_fixup(codec, NULL, alc260_fixup_tbl, alc260_fixups); + alc_apply_fixup(codec, ALC_FIXUP_ACT_PRE_PROBE); + } if (board_config == ALC260_AUTO) { /* automatic parse from the BIOS config */ @@ -7350,8 +7405,7 @@ static int patch_alc260(struct hda_codec *codec) set_capture_mixer(codec); set_beep_amp(spec, 0x07, 0x05, HDA_INPUT); - if (board_config == ALC260_AUTO) - alc_pick_fixup(codec, alc260_fixup_tbl, alc260_fixups, 0); + alc_apply_fixup(codec, ALC_FIXUP_ACT_PROBE); spec->vmaster_nid = 0x08; @@ -9727,7 +9781,7 @@ static hda_nid_t alc1200_slave_dig_outs[] = { /* * configuration and preset */ -static const char *alc882_models[ALC882_MODEL_LAST] = { +static const char * const alc882_models[ALC882_MODEL_LAST] = { [ALC882_3ST_DIG] = "3stack-dig", [ALC882_6ST_DIG] = "6stack-dig", [ALC882_ARIMA] = "arima", @@ -10678,7 +10732,8 @@ enum { static const struct alc_fixup alc882_fixups[] = { [PINFIX_ABIT_AW9D_MAX] = { - .pins = (const struct alc_pincfg[]) { + .type = ALC_FIXUP_PINS, + .v.pins = (const struct alc_pincfg[]) { { 0x15, 0x01080104 }, /* side */ { 0x16, 0x01011012 }, /* rear */ { 0x17, 0x01016011 }, /* clfe */ @@ -10686,13 +10741,15 @@ static const struct alc_fixup alc882_fixups[] = { } }, [PINFIX_PB_M5210] = { - .verbs = (const struct hda_verb[]) { + .type = ALC_FIXUP_VERBS, + .v.verbs = (const struct hda_verb[]) { { 0x19, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF50 }, {} } }, [PINFIX_ACER_ASPIRE_7736] = { - .sku = ALC_FIXUP_SKU_IGNORE, + .type = ALC_FIXUP_SKU, + .v.sku = ALC_FIXUP_SKU_IGNORE, }, }; @@ -10984,8 +11041,10 @@ static int patch_alc882(struct hda_codec *codec) board_config = ALC882_AUTO; } - if (board_config == ALC882_AUTO) - alc_pick_fixup(codec, alc882_fixup_tbl, alc882_fixups, 1); + if (board_config == ALC882_AUTO) { + alc_pick_fixup(codec, NULL, alc882_fixup_tbl, alc882_fixups); + alc_apply_fixup(codec, ALC_FIXUP_ACT_PRE_PROBE); + } alc_auto_parse_customize_define(codec); @@ -11061,8 +11120,7 @@ static int patch_alc882(struct hda_codec *codec) if (has_cdefine_beep(codec)) set_beep_amp(spec, 0x0b, 0x05, HDA_INPUT); - if (board_config == ALC882_AUTO) - alc_pick_fixup(codec, alc882_fixup_tbl, alc882_fixups, 0); + alc_apply_fixup(codec, ALC_FIXUP_ACT_PROBE); spec->vmaster_nid = 0x0c; @@ -12452,19 +12510,14 @@ enum { static const struct alc_fixup alc262_fixups[] = { [PINFIX_FSC_H270] = { - .pins = (const struct alc_pincfg[]) { + .type = ALC_FIXUP_PINS, + .v.pins = (const struct alc_pincfg[]) { { 0x14, 0x99130110 }, /* speaker */ { 0x15, 0x0221142f }, /* front HP */ { 0x1b, 0x0121141f }, /* rear HP */ { } } }, - [PINFIX_PB_M5210] = { - .verbs = (const struct hda_verb[]) { - { 0x19, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF50 }, - {} - } - }, }; static struct snd_pci_quirk alc262_fixup_tbl[] = { @@ -12554,7 +12607,7 @@ static void alc262_auto_init(struct hda_codec *codec) /* * configuration and preset */ -static const char *alc262_models[ALC262_MODEL_LAST] = { +static const char * const alc262_models[ALC262_MODEL_LAST] = { [ALC262_BASIC] = "basic", [ALC262_HIPPO] = "hippo", [ALC262_HIPPO_1] = "hippo_1", @@ -12895,8 +12948,10 @@ static int patch_alc262(struct hda_codec *codec) board_config = ALC262_AUTO; } - if (board_config == ALC262_AUTO) - alc_pick_fixup(codec, alc262_fixup_tbl, alc262_fixups, 1); + if (board_config == ALC262_AUTO) { + alc_pick_fixup(codec, NULL, alc262_fixup_tbl, alc262_fixups); + alc_apply_fixup(codec, ALC_FIXUP_ACT_PRE_PROBE); + } if (board_config == ALC262_AUTO) { /* automatic parse from the BIOS config */ @@ -12966,8 +13021,7 @@ static int patch_alc262(struct hda_codec *codec) if (!spec->no_analog && has_cdefine_beep(codec)) set_beep_amp(spec, 0x0b, 0x05, HDA_INPUT); - if (board_config == ALC262_AUTO) - alc_pick_fixup(codec, alc262_fixup_tbl, alc262_fixups, 0); + alc_apply_fixup(codec, ALC_FIXUP_ACT_PROBE); spec->vmaster_nid = 0x0c; @@ -13741,7 +13795,7 @@ static void alc268_auto_init(struct hda_codec *codec) /* * configuration and preset */ -static const char *alc268_models[ALC268_MODEL_LAST] = { +static const char * const alc268_models[ALC268_MODEL_LAST] = { [ALC267_QUANTA_IL1] = "quanta-il1", [ALC268_3ST] = "3stack", [ALC268_TOSHIBA] = "toshiba", @@ -14822,17 +14876,19 @@ static int alc269_resume(struct hda_codec *codec) #endif /* SND_HDA_NEEDS_RESUME */ static void alc269_fixup_hweq(struct hda_codec *codec, - const struct alc_fixup *fix, int pre_init) + const struct alc_fixup *fix, int action) { int coef; + if (action != ALC_FIXUP_ACT_INIT) + return; coef = alc_read_coef_idx(codec, 0x1e); alc_write_coef_idx(codec, 0x1e, coef | 0x80); } enum { ALC269_FIXUP_SONY_VAIO, - ALC275_FIX_SONY_VAIO_GPIO2, + ALC275_FIXUP_SONY_VAIO_GPIO2, ALC269_FIXUP_DELL_M101Z, ALC269_FIXUP_SKU_IGNORE, ALC269_FIXUP_ASUS_G73JW, @@ -14842,22 +14898,26 @@ enum { static const struct alc_fixup alc269_fixups[] = { [ALC269_FIXUP_SONY_VAIO] = { - .verbs = (const struct hda_verb[]) { + .type = ALC_FIXUP_VERBS, + .v.verbs = (const struct hda_verb[]) { {0x19, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREFGRD}, {} } }, - [ALC275_FIX_SONY_VAIO_GPIO2] = { - .verbs = (const struct hda_verb[]) { + [ALC275_FIXUP_SONY_VAIO_GPIO2] = { + .type = ALC_FIXUP_VERBS, + .v.verbs = (const struct hda_verb[]) { {0x01, AC_VERB_SET_GPIO_MASK, 0x04}, {0x01, AC_VERB_SET_GPIO_DIRECTION, 0x04}, {0x01, AC_VERB_SET_GPIO_DATA, 0x00}, - {0x19, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREFGRD}, { } - } + }, + .chained = true, + .chain_id = ALC269_FIXUP_SONY_VAIO }, [ALC269_FIXUP_DELL_M101Z] = { - .verbs = (const struct hda_verb[]) { + .type = ALC_FIXUP_VERBS, + .v.verbs = (const struct hda_verb[]) { /* Enables internal speaker */ {0x20, AC_VERB_SET_COEF_INDEX, 13}, {0x20, AC_VERB_SET_PROC_COEF, 0x4040}, @@ -14865,34 +14925,33 @@ static const struct alc_fixup alc269_fixups[] = { } }, [ALC269_FIXUP_SKU_IGNORE] = { - .sku = ALC_FIXUP_SKU_IGNORE, + .type = ALC_FIXUP_SKU, + .v.sku = ALC_FIXUP_SKU_IGNORE, }, [ALC269_FIXUP_ASUS_G73JW] = { - .pins = (const struct alc_pincfg[]) { + .type = ALC_FIXUP_PINS, + .v.pins = (const struct alc_pincfg[]) { { 0x17, 0x99130111 }, /* subwoofer */ { } } }, [ALC269_FIXUP_LENOVO_EAPD] = { - .verbs = (const struct hda_verb[]) { + .type = ALC_FIXUP_VERBS, + .v.verbs = (const struct hda_verb[]) { {0x14, AC_VERB_SET_EAPD_BTLENABLE, 0}, {} } }, [ALC275_FIXUP_SONY_HWEQ] = { - .func = alc269_fixup_hweq, - .verbs = (const struct hda_verb[]) { - {0x01, AC_VERB_SET_GPIO_MASK, 0x04}, - {0x01, AC_VERB_SET_GPIO_DIRECTION, 0x04}, - {0x01, AC_VERB_SET_GPIO_DATA, 0x00}, - {0x19, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREFGRD}, - { } - } + .type = ALC_FIXUP_FUNC, + .v.func = alc269_fixup_hweq, + .chained = true, + .chain_id = ALC275_FIXUP_SONY_VAIO_GPIO2 } }; static struct snd_pci_quirk alc269_fixup_tbl[] = { - SND_PCI_QUIRK(0x104d, 0x9073, "Sony VAIO", ALC275_FIX_SONY_VAIO_GPIO2), + SND_PCI_QUIRK(0x104d, 0x9073, "Sony VAIO", ALC275_FIXUP_SONY_VAIO_GPIO2), SND_PCI_QUIRK(0x104d, 0x907b, "Sony VAIO", ALC275_FIXUP_SONY_HWEQ), SND_PCI_QUIRK(0x104d, 0x9084, "Sony VAIO", ALC275_FIXUP_SONY_HWEQ), SND_PCI_QUIRK_VENDOR(0x104d, "Sony VAIO", ALC269_FIXUP_SONY_VAIO), @@ -14908,7 +14967,7 @@ static struct snd_pci_quirk alc269_fixup_tbl[] = { /* * configuration and preset */ -static const char *alc269_models[ALC269_MODEL_LAST] = { +static const char * const alc269_models[ALC269_MODEL_LAST] = { [ALC269_BASIC] = "basic", [ALC269_QUANTA_FL1] = "quanta", [ALC269_AMIC] = "laptop-amic", @@ -15184,8 +15243,10 @@ static int patch_alc269(struct hda_codec *codec) board_config = ALC269_AUTO; } - if (board_config == ALC269_AUTO) - alc_pick_fixup(codec, alc269_fixup_tbl, alc269_fixups, 1); + if (board_config == ALC269_AUTO) { + alc_pick_fixup(codec, NULL, alc269_fixup_tbl, alc269_fixups); + alc_apply_fixup(codec, ALC_FIXUP_ACT_PRE_PROBE); + } if (board_config == ALC269_AUTO) { /* automatic parse from the BIOS config */ @@ -15246,8 +15307,7 @@ static int patch_alc269(struct hda_codec *codec) if (has_cdefine_beep(codec)) set_beep_amp(spec, 0x0b, 0x04, HDA_INPUT); - if (board_config == ALC269_AUTO) - alc_pick_fixup(codec, alc269_fixup_tbl, alc269_fixups, 0); + alc_apply_fixup(codec, ALC_FIXUP_ACT_PROBE); spec->vmaster_nid = 0x02; @@ -15950,7 +16010,7 @@ static int alc861_auto_create_multi_out_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg) { struct alc_spec *spec = codec->spec; - static const char *chname[4] = { + static const char * const chname[4] = { "Front", "Surround", NULL /*CLFE*/, "Side" }; const char *pfx = alc_get_line_out_pfx(cfg, true); @@ -16156,7 +16216,7 @@ static struct hda_amp_list alc861_loopbacks[] = { /* * configuration and preset */ -static const char *alc861_models[ALC861_MODEL_LAST] = { +static const char * const alc861_models[ALC861_MODEL_LAST] = { [ALC861_3ST] = "3stack", [ALC660_3ST] = "3stack-660", [ALC861_3ST_DIG] = "3stack-dig", @@ -16306,7 +16366,8 @@ enum { static const struct alc_fixup alc861_fixups[] = { [PINFIX_FSC_AMILO_PI1505] = { - .pins = (const struct alc_pincfg[]) { + .type = ALC_FIXUP_PINS, + .v.pins = (const struct alc_pincfg[]) { { 0x0b, 0x0221101f }, /* HP */ { 0x0f, 0x90170310 }, /* speaker */ { } @@ -16341,8 +16402,10 @@ static int patch_alc861(struct hda_codec *codec) board_config = ALC861_AUTO; } - if (board_config == ALC861_AUTO) - alc_pick_fixup(codec, alc861_fixup_tbl, alc861_fixups, 1); + if (board_config == ALC861_AUTO) { + alc_pick_fixup(codec, NULL, alc861_fixup_tbl, alc861_fixups); + alc_apply_fixup(codec, ALC_FIXUP_ACT_PRE_PROBE); + } if (board_config == ALC861_AUTO) { /* automatic parse from the BIOS config */ @@ -16379,8 +16442,7 @@ static int patch_alc861(struct hda_codec *codec) spec->vmaster_nid = 0x03; - if (board_config == ALC861_AUTO) - alc_pick_fixup(codec, alc861_fixup_tbl, alc861_fixups, 0); + alc_apply_fixup(codec, ALC_FIXUP_ACT_PROBE); codec->patch_ops = alc_patch_ops; if (board_config == ALC861_AUTO) { @@ -16857,7 +16919,7 @@ static void alc861vd_dallas_setup(struct hda_codec *codec) /* * configuration and preset */ -static const char *alc861vd_models[ALC861VD_MODEL_LAST] = { +static const char * const alc861vd_models[ALC861VD_MODEL_LAST] = { [ALC660VD_3ST] = "3stack-660", [ALC660VD_3ST_DIG] = "3stack-660-digout", [ALC660VD_ASUS_V1S] = "asus-v1s", @@ -17077,7 +17139,9 @@ static void alc861vd_auto_init_analog_input(struct hda_codec *codec) static int alc861vd_auto_create_multi_out_ctls(struct alc_spec *spec, const struct auto_pin_cfg *cfg) { - static const char *chname[4] = {"Front", "Surround", "CLFE", "Side"}; + static const char * const chname[4] = { + "Front", "Surround", "CLFE", "Side" + }; const char *pfx = alc_get_line_out_pfx(cfg, true); hda_nid_t nid_v, nid_s; int i, err; @@ -17262,7 +17326,8 @@ enum { /* reset GPIO1 */ static const struct alc_fixup alc861vd_fixups[] = { [ALC660VD_FIX_ASUS_GPIO1] = { - .verbs = (const struct hda_verb[]) { + .type = ALC_FIXUP_VERBS, + .v.verbs = (const struct hda_verb[]) { {0x01, AC_VERB_SET_GPIO_MASK, 0x03}, {0x01, AC_VERB_SET_GPIO_DIRECTION, 0x01}, {0x01, AC_VERB_SET_GPIO_DATA, 0x01}, @@ -17297,8 +17362,10 @@ static int patch_alc861vd(struct hda_codec *codec) board_config = ALC861VD_AUTO; } - if (board_config == ALC861VD_AUTO) - alc_pick_fixup(codec, alc861vd_fixup_tbl, alc861vd_fixups, 1); + if (board_config == ALC861VD_AUTO) { + alc_pick_fixup(codec, NULL, alc861vd_fixup_tbl, alc861vd_fixups); + alc_apply_fixup(codec, ALC_FIXUP_ACT_PRE_PROBE); + } if (board_config == ALC861VD_AUTO) { /* automatic parse from the BIOS config */ @@ -17346,8 +17413,7 @@ static int patch_alc861vd(struct hda_codec *codec) spec->vmaster_nid = 0x02; - if (board_config == ALC861VD_AUTO) - alc_pick_fixup(codec, alc861vd_fixup_tbl, alc861vd_fixups, 0); + alc_apply_fixup(codec, ALC_FIXUP_ACT_PROBE); codec->patch_ops = alc_patch_ops; @@ -18630,7 +18696,7 @@ static struct snd_kcontrol_new alc272_nc10_mixer[] = { /* * configuration and preset */ -static const char *alc662_models[ALC662_MODEL_LAST] = { +static const char * const alc662_models[ALC662_MODEL_LAST] = { [ALC662_3ST_2ch_DIG] = "3stack-dig", [ALC662_3ST_6ch_DIG] = "3stack-6ch-dig", [ALC662_3ST_6ch] = "3stack-6ch", @@ -19145,7 +19211,7 @@ static int alc662_auto_create_multi_out_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg) { struct alc_spec *spec = codec->spec; - static const char *chname[4] = { + static const char * const chname[4] = { "Front", "Surround", NULL /*CLFE*/, "Side" }; const char *pfx = alc_get_line_out_pfx(cfg, true); @@ -19378,7 +19444,10 @@ static void alc662_auto_init(struct hda_codec *codec) } static void alc272_fixup_mario(struct hda_codec *codec, - const struct alc_fixup *fix, int pre_init) { + const struct alc_fixup *fix, int action) +{ + if (action != ALC_FIXUP_ACT_PROBE) + return; if (snd_hda_override_amp_caps(codec, 0x2, HDA_OUTPUT, (0x3b << AC_AMPCAP_OFFSET_SHIFT) | (0x3b << AC_AMPCAP_NUM_STEPS_SHIFT) | @@ -19396,19 +19465,22 @@ enum { static const struct alc_fixup alc662_fixups[] = { [ALC662_FIXUP_ASPIRE] = { - .pins = (const struct alc_pincfg[]) { + .type = ALC_FIXUP_PINS, + .v.pins = (const struct alc_pincfg[]) { { 0x15, 0x99130112 }, /* subwoofer */ { } } }, [ALC662_FIXUP_IDEAPAD] = { - .pins = (const struct alc_pincfg[]) { + .type = ALC_FIXUP_PINS, + .v.pins = (const struct alc_pincfg[]) { { 0x17, 0x99130112 }, /* subwoofer */ { } } }, [ALC272_FIXUP_MARIO] = { - .func = alc272_fixup_mario, + .type = ALC_FIXUP_FUNC, + .v.func = alc272_fixup_mario, } }; @@ -19462,7 +19534,9 @@ static int patch_alc662(struct hda_codec *codec) } if (board_config == ALC662_AUTO) { - alc_pick_fixup(codec, alc662_fixup_tbl, alc662_fixups, 1); + alc_pick_fixup(codec, alc662_fixup_models, + alc662_fixup_tbl, alc662_fixups); + alc_apply_fixup(codec, ALC_FIXUP_ACT_PRE_PROBE); /* automatic parse from the BIOS config */ err = alc662_parse_auto_config(codec); if (err < 0) { @@ -19520,12 +19594,11 @@ static int patch_alc662(struct hda_codec *codec) } spec->vmaster_nid = 0x02; + alc_apply_fixup(codec, ALC_FIXUP_ACT_PROBE); + codec->patch_ops = alc_patch_ops; - if (board_config == ALC662_AUTO) { + if (board_config == ALC662_AUTO) spec->init_hook = alc662_auto_init; - alc_pick_fixup_model(codec, alc662_fixup_models, - alc662_fixup_tbl, alc662_fixups, 0); - } alc_init_jacks(codec); @@ -19913,7 +19986,7 @@ static void alc680_auto_init(struct hda_codec *codec) /* * configuration and preset */ -static const char *alc680_models[ALC680_MODEL_LAST] = { +static const char * const alc680_models[ALC680_MODEL_LAST] = { [ALC680_BASE] = "base", [ALC680_AUTO] = "auto", }; diff --git a/sound/pci/hda/patch_sigmatel.c b/sound/pci/hda/patch_sigmatel.c index 4ab019d..9ea48b4 100644 --- a/sound/pci/hda/patch_sigmatel.c +++ b/sound/pci/hda/patch_sigmatel.c @@ -266,7 +266,7 @@ struct sigmatel_spec { struct sigmatel_mic_route int_mic; struct sigmatel_mic_route dock_mic; - const char **spdif_labels; + const char * const *spdif_labels; hda_nid_t dig_in_nid; hda_nid_t mono_nid; @@ -524,7 +524,7 @@ static unsigned long stac927x_capsws[] = { HDA_COMPOSE_AMP_VAL(0x1d, 3, 0, HDA_OUTPUT), }; -static const char *stac927x_spdif_labels[5] = { +static const char * const stac927x_spdif_labels[5] = { "Digital Playback", "ADAT", "Analog Mux 1", "Analog Mux 2", "Analog Mux 3" }; @@ -1062,7 +1062,7 @@ static struct snd_kcontrol_new stac_smux_mixer = { .put = stac92xx_smux_enum_put, }; -static const char *slave_vols[] = { +static const char * const slave_vols[] = { "Front Playback Volume", "Surround Playback Volume", "Center Playback Volume", @@ -1073,7 +1073,7 @@ static const char *slave_vols[] = { NULL }; -static const char *slave_sws[] = { +static const char * const slave_sws[] = { "Front Playback Switch", "Surround Playback Switch", "Center Playback Switch", @@ -1354,7 +1354,7 @@ static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = { [STAC_9200_PANASONIC] = ref9200_pin_configs, }; -static const char *stac9200_models[STAC_9200_MODELS] = { +static const char * const stac9200_models[STAC_9200_MODELS] = { [STAC_AUTO] = "auto", [STAC_REF] = "ref", [STAC_9200_OQO] = "oqo", @@ -1500,7 +1500,7 @@ static unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = { [STAC_M6] = stac925xM6_pin_configs, }; -static const char *stac925x_models[STAC_925x_MODELS] = { +static const char * const stac925x_models[STAC_925x_MODELS] = { [STAC_925x_AUTO] = "auto", [STAC_REF] = "ref", [STAC_M1] = "m1", @@ -1574,7 +1574,7 @@ static unsigned int *stac92hd73xx_brd_tbl[STAC_92HD73XX_MODELS] = { [STAC_92HD73XX_INTEL] = intel_dg45id_pin_configs, }; -static const char *stac92hd73xx_models[STAC_92HD73XX_MODELS] = { +static const char * const stac92hd73xx_models[STAC_92HD73XX_MODELS] = { [STAC_92HD73XX_AUTO] = "auto", [STAC_92HD73XX_NO_JD] = "no-jd", [STAC_92HD73XX_REF] = "ref", @@ -1660,7 +1660,7 @@ static unsigned int *stac92hd83xxx_brd_tbl[STAC_92HD83XXX_MODELS] = { [STAC_HP_DV7_4000] = hp_dv7_4000_pin_configs, }; -static const char *stac92hd83xxx_models[STAC_92HD83XXX_MODELS] = { +static const char * const stac92hd83xxx_models[STAC_92HD83XXX_MODELS] = { [STAC_92HD83XXX_AUTO] = "auto", [STAC_92HD83XXX_REF] = "ref", [STAC_92HD83XXX_PWR_REF] = "mic-ref", @@ -1722,7 +1722,7 @@ static unsigned int *stac92hd71bxx_brd_tbl[STAC_92HD71BXX_MODELS] = { [STAC_HP_DV4_1222NR] = NULL, }; -static const char *stac92hd71bxx_models[STAC_92HD71BXX_MODELS] = { +static const char * const stac92hd71bxx_models[STAC_92HD71BXX_MODELS] = { [STAC_92HD71BXX_AUTO] = "auto", [STAC_92HD71BXX_REF] = "ref", [STAC_DELL_M4_1] = "dell-m4-1", @@ -1915,7 +1915,7 @@ static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = { [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs, }; -static const char *stac922x_models[STAC_922X_MODELS] = { +static const char * const stac922x_models[STAC_922X_MODELS] = { [STAC_922X_AUTO] = "auto", [STAC_D945_REF] = "ref", [STAC_D945GTP5] = "5stack", @@ -2077,7 +2077,7 @@ static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = { [STAC_927X_VOLKNOB] = NULL, }; -static const char *stac927x_models[STAC_927X_MODELS] = { +static const char * const stac927x_models[STAC_927X_MODELS] = { [STAC_927X_AUTO] = "auto", [STAC_D965_REF_NO_JD] = "ref-no-jd", [STAC_D965_REF] = "ref", @@ -2180,7 +2180,7 @@ static unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = { [STAC_9205_EAPD] = NULL, }; -static const char *stac9205_models[STAC_9205_MODELS] = { +static const char * const stac9205_models[STAC_9205_MODELS] = { [STAC_9205_AUTO] = "auto", [STAC_9205_REF] = "ref", [STAC_9205_DELL_M42] = "dell-m42", @@ -3123,7 +3123,7 @@ static int create_multi_out_ctls(struct hda_codec *codec, int num_outs, int type) { struct sigmatel_spec *spec = codec->spec; - static const char *chname[4] = { + static const char * const chname[4] = { "Front", "Surround", NULL /*CLFE*/, "Side" }; hda_nid_t nid; @@ -3256,7 +3256,7 @@ static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec, } /* labels for mono mux outputs */ -static const char *stac92xx_mono_labels[4] = { +static const char * const stac92xx_mono_labels[4] = { "DAC0", "DAC1", "Mixer", "DAC2" }; @@ -3380,7 +3380,7 @@ static int stac92xx_auto_create_mux_input_ctls(struct hda_codec *codec) return 0; }; -static const char *stac92xx_spdif_labels[3] = { +static const char * const stac92xx_spdif_labels[3] = { "Digital Playback", "Analog Mux 1", "Analog Mux 2", }; @@ -3388,7 +3388,7 @@ static int stac92xx_auto_create_spdif_mux_ctls(struct hda_codec *codec) { struct sigmatel_spec *spec = codec->spec; struct hda_input_mux *spdif_mux = &spec->private_smux; - const char **labels = spec->spdif_labels; + const char * const *labels = spec->spdif_labels; int i, num_cons; hda_nid_t con_lst[HDA_MAX_NUM_INPUTS]; @@ -3409,7 +3409,7 @@ static int stac92xx_auto_create_spdif_mux_ctls(struct hda_codec *codec) } /* labels for dmic mux inputs */ -static const char *stac92xx_dmic_labels[5] = { +static const char * const stac92xx_dmic_labels[5] = { "Analog Inputs", "Digital Mic 1", "Digital Mic 2", "Digital Mic 3", "Digital Mic 4" }; @@ -5333,7 +5333,7 @@ again: return 0; } -static int stac92hd83xxx_set_system_btl_amp(struct hda_codec *codec) +static int hp_bnb2011_with_dock(struct hda_codec *codec) { if (codec->vendor_id != 0x111d7605 && codec->vendor_id != 0x111d76d1) @@ -5348,10 +5348,6 @@ static int stac92hd83xxx_set_system_btl_amp(struct hda_codec *codec) case 0x103c161d: case 0x103c161e: case 0x103c161f: - case 0x103c1620: - case 0x103c1621: - case 0x103c1622: - case 0x103c1623: case 0x103c162a: case 0x103c162b: @@ -5360,41 +5356,9 @@ static int stac92hd83xxx_set_system_btl_amp(struct hda_codec *codec) case 0x103c1631: case 0x103c1633: - + case 0x103c1634: case 0x103c1635: - case 0x103c164f: - - case 0x103c1676: - case 0x103c1677: - case 0x103c1678: - case 0x103c1679: - case 0x103c167a: - case 0x103c167b: - case 0x103c167c: - case 0x103c167d: - case 0x103c167e: - case 0x103c167f: - case 0x103c1680: - case 0x103c1681: - case 0x103c1682: - case 0x103c1683: - case 0x103c1684: - case 0x103c1685: - case 0x103c1686: - case 0x103c1687: - case 0x103c1688: - case 0x103c1689: - case 0x103c168a: - case 0x103c168b: - case 0x103c168c: - case 0x103c168d: - case 0x103c168e: - case 0x103c168f: - case 0x103c1690: - case 0x103c1691: - case 0x103c1692: - case 0x103c3587: case 0x103c3588: case 0x103c3589: @@ -5402,9 +5366,9 @@ static int stac92hd83xxx_set_system_btl_amp(struct hda_codec *codec) case 0x103c3667: case 0x103c3668: - /* set BTL amp level to 13.43dB for louder speaker output */ - return snd_hda_codec_write_cache(codec, codec->afg, 0, - 0x7F4, 0x14); + case 0x103c3669: + + return 1; } return 0; } @@ -5420,6 +5384,11 @@ static int patch_stac92hd83xxx(struct hda_codec *codec) if (spec == NULL) return -ENOMEM; + if (hp_bnb2011_with_dock(codec)) { + snd_hda_codec_set_pincfg(codec, 0xa, 0x2101201f); + snd_hda_codec_set_pincfg(codec, 0xf, 0x2181205e); + } + /* reset pin power-down; Windows may leave these bits after reboot */ snd_hda_codec_write_cache(codec, codec->afg, 0, 0x7EC, 0); snd_hda_codec_write_cache(codec, codec->afg, 0, 0x7ED, 0); @@ -5546,8 +5515,6 @@ again: AC_VERB_SET_CONNECT_SEL, num_dacs); } - stac92hd83xxx_set_system_btl_amp(codec); - codec->proc_widget_hook = stac92hd_proc_hook; return 0; @@ -6270,7 +6237,7 @@ static unsigned int stac9872_vaio_pin_configs[9] = { 0x90a7013e }; -static const char *stac9872_models[STAC_9872_MODELS] = { +static const char * const stac9872_models[STAC_9872_MODELS] = { [STAC_9872_AUTO] = "auto", [STAC_9872_VAIO] = "vaio", }; diff --git a/sound/pci/hda/patch_via.c b/sound/pci/hda/patch_via.c index 7f4852a..a76c326 100644 --- a/sound/pci/hda/patch_via.c +++ b/sound/pci/hda/patch_via.c @@ -2281,7 +2281,9 @@ static int vt1708_auto_create_multi_out_ctls(struct via_spec *spec, const struct auto_pin_cfg *cfg) { char name[32]; - static const char *chname[4] = { "Front", "Surround", "C/LFE", "Side" }; + static const char * const chname[4] = { + "Front", "Surround", "C/LFE", "Side" + }; hda_nid_t nid, nid_vol, nid_vols[] = {0x17, 0x19, 0x1a, 0x1b}; int i, err; @@ -2370,7 +2372,7 @@ static void create_hp_imux(struct via_spec *spec) { int i; struct hda_input_mux *imux = &spec->private_imux[1]; - static const char *texts[] = { "OFF", "ON", NULL}; + static const char * const texts[] = { "OFF", "ON", NULL}; /* for hp mode select */ for (i = 0; texts[i]; i++) @@ -2890,7 +2892,9 @@ static int vt1709_auto_create_multi_out_ctls(struct via_spec *spec, const struct auto_pin_cfg *cfg) { char name[32]; - static const char *chname[4] = { "Front", "Surround", "C/LFE", "Side" }; + static const char * const chname[4] = { + "Front", "Surround", "C/LFE", "Side" + }; hda_nid_t nid, nid_vol, nid_vols[] = {0x18, 0x1a, 0x1b, 0x29}; int i, err; @@ -3433,7 +3437,9 @@ static int vt1708B_auto_create_multi_out_ctls(struct via_spec *spec, const struct auto_pin_cfg *cfg) { char name[32]; - static const char *chname[4] = { "Front", "Surround", "C/LFE", "Side" }; + static const char * const chname[4] = { + "Front", "Surround", "C/LFE", "Side" + }; hda_nid_t nid_vols[] = {0x16, 0x18, 0x26, 0x27}; hda_nid_t nid, nid_vol = 0; int i, err; @@ -3861,7 +3867,9 @@ static int vt1708S_auto_create_multi_out_ctls(struct via_spec *spec, const struct auto_pin_cfg *cfg) { char name[32]; - static const char *chname[4] = { "Front", "Surround", "C/LFE", "Side" }; + static const char * const chname[4] = { + "Front", "Surround", "C/LFE", "Side" + }; hda_nid_t nid_vols[] = {0x10, 0x11, 0x24, 0x25}; hda_nid_t nid_mutes[] = {0x1C, 0x18, 0x26, 0x27}; hda_nid_t nid, nid_vol, nid_mute; @@ -4304,7 +4312,7 @@ static int vt1702_auto_create_hp_ctls(struct via_spec *spec, hda_nid_t pin) { int err, i; struct hda_input_mux *imux; - static const char *texts[] = { "ON", "OFF", NULL}; + static const char * const texts[] = { "ON", "OFF", NULL}; if (!pin) return 0; spec->multiout.hp_nid = 0x1D; @@ -4615,7 +4623,9 @@ static int vt1718S_auto_create_multi_out_ctls(struct via_spec *spec, const struct auto_pin_cfg *cfg) { char name[32]; - static const char *chname[4] = { "Front", "Surround", "C/LFE", "Side" }; + static const char * const chname[4] = { + "Front", "Surround", "C/LFE", "Side" + }; hda_nid_t nid_vols[] = {0x8, 0x9, 0xa, 0xb}; hda_nid_t nid_mutes[] = {0x24, 0x25, 0x26, 0x27}; hda_nid_t nid, nid_vol, nid_mute = 0; @@ -5064,7 +5074,9 @@ static int vt1716S_auto_create_multi_out_ctls(struct via_spec *spec, const struct auto_pin_cfg *cfg) { char name[32]; - static const char *chname[3] = { "Front", "Surround", "C/LFE" }; + static const char * const chname[3] = { + "Front", "Surround", "C/LFE" + }; hda_nid_t nid_vols[] = {0x10, 0x11, 0x25}; hda_nid_t nid_mutes[] = {0x1C, 0x18, 0x27}; hda_nid_t nid, nid_vol, nid_mute; diff --git a/sound/pci/oxygen/xonar_dg.c b/sound/pci/oxygen/xonar_dg.c index e4de0b8..e1fa602 100644 --- a/sound/pci/oxygen/xonar_dg.c +++ b/sound/pci/oxygen/xonar_dg.c @@ -75,7 +75,7 @@ static void cs4245_write(struct oxygen *chip, unsigned int reg, u8 value) OXYGEN_SPI_CEN_LATCH_CLOCK_HI, CS4245_SPI_ADDRESS | CS4245_SPI_WRITE | - (value << 8) | reg); + (reg << 8) | value); data->cs4245_regs[reg] = value; } diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig index 883a312..c48b23c 100644 --- a/sound/soc/codecs/Kconfig +++ b/sound/soc/codecs/Kconfig @@ -44,7 +44,7 @@ config SND_SOC_ALL_CODECS select SND_SOC_TWL6040 if TWL4030_CORE select SND_SOC_UDA134X select SND_SOC_UDA1380 if I2C - select SND_SOC_WL1273 if WL1273_CORE + select SND_SOC_WL1273 if RADIO_WL1273 select SND_SOC_WM2000 if I2C select SND_SOC_WM8350 if MFD_WM8350 select SND_SOC_WM8400 if MFD_WM8400 diff --git a/sound/soc/codecs/wl1273.c b/sound/soc/codecs/wl1273.c index d3ffa2f..861b28f 100644 --- a/sound/soc/codecs/wl1273.c +++ b/sound/soc/codecs/wl1273.c @@ -42,7 +42,7 @@ struct wl1273_priv { static int snd_wl1273_fm_set_i2s_mode(struct wl1273_core *core, int rate, int width) { - struct device *dev = &core->i2c_dev->dev; + struct device *dev = &core->client->dev; int r = 0; u16 mode; @@ -123,13 +123,13 @@ static int snd_wl1273_fm_set_i2s_mode(struct wl1273_core *core, dev_dbg(dev, "mode: 0x%04x\n", mode); if (core->i2s_mode != mode) { - r = wl1273_fm_write_cmd(core, WL1273_I2S_MODE_CONFIG_SET, mode); + r = core->write(core, WL1273_I2S_MODE_CONFIG_SET, mode); if (r) goto out; core->i2s_mode = mode; - r = wl1273_fm_write_cmd(core, WL1273_AUDIO_ENABLE, - WL1273_AUDIO_ENABLE_I2S); + r = core->write(core, WL1273_AUDIO_ENABLE, + WL1273_AUDIO_ENABLE_I2S); if (r) goto out; } @@ -142,8 +142,7 @@ out: static int snd_wl1273_fm_set_channel_number(struct wl1273_core *core, int channel_number) { - struct i2c_client *client = core->i2c_dev; - struct device *dev = &client->dev; + struct device *dev = &core->client->dev; int r = 0; dev_dbg(dev, "%s\n", __func__); @@ -154,17 +153,13 @@ static int snd_wl1273_fm_set_channel_number(struct wl1273_core *core, goto out; if (channel_number == 1 && core->mode == WL1273_MODE_RX) - r = wl1273_fm_write_cmd(core, WL1273_MOST_MODE_SET, - WL1273_RX_MONO); + r = core->write(core, WL1273_MOST_MODE_SET, WL1273_RX_MONO); else if (channel_number == 1 && core->mode == WL1273_MODE_TX) - r = wl1273_fm_write_cmd(core, WL1273_MONO_SET, - WL1273_TX_MONO); + r = core->write(core, WL1273_MONO_SET, WL1273_TX_MONO); else if (channel_number == 2 && core->mode == WL1273_MODE_RX) - r = wl1273_fm_write_cmd(core, WL1273_MOST_MODE_SET, - WL1273_RX_STEREO); + r = core->write(core, WL1273_MOST_MODE_SET, WL1273_RX_STEREO); else if (channel_number == 2 && core->mode == WL1273_MODE_TX) - r = wl1273_fm_write_cmd(core, WL1273_MONO_SET, - WL1273_TX_STEREO); + r = core->write(core, WL1273_MONO_SET, WL1273_TX_STEREO); else r = -EINVAL; out: @@ -237,7 +232,7 @@ static int snd_wl1273_fm_audio_put(struct snd_kcontrol *kcontrol, if (wl1273->core->audio_mode == val) return 0; - r = wl1273_fm_set_audio(wl1273->core, val); + r = wl1273->core->set_audio(wl1273->core, val); if (r < 0) return r; @@ -272,8 +267,8 @@ static int snd_wl1273_fm_volume_put(struct snd_kcontrol *kcontrol, dev_dbg(codec->dev, "%s: enter.\n", __func__); - r = wl1273_fm_set_volume(wl1273->core, - ucontrol->value.integer.value[0]); + r = wl1273->core->set_volume(wl1273->core, + ucontrol->value.integer.value[0]); if (r) return r; diff --git a/sound/soc/codecs/wl1273.h b/sound/soc/codecs/wl1273.h index 14ed027..43ec7e6 100644 --- a/sound/soc/codecs/wl1273.h +++ b/sound/soc/codecs/wl1273.h @@ -25,77 +25,6 @@ #ifndef __WL1273_CODEC_H__ #define __WL1273_CODEC_H__ -/* I2S protocol, left channel first, data width 16 bits */ -#define WL1273_PCM_DEF_MODE 0x00 - -/* Rx */ -#define WL1273_AUDIO_ENABLE_I2S (1 << 0) -#define WL1273_AUDIO_ENABLE_ANALOG (1 << 1) - -/* Tx */ -#define WL1273_AUDIO_IO_SET_ANALOG 0 -#define WL1273_AUDIO_IO_SET_I2S 1 - -#define WL1273_POWER_SET_OFF 0 -#define WL1273_POWER_SET_FM (1 << 0) -#define WL1273_POWER_SET_RDS (1 << 1) -#define WL1273_POWER_SET_RETENTION (1 << 4) - -#define WL1273_PUPD_SET_OFF 0x00 -#define WL1273_PUPD_SET_ON 0x01 -#define WL1273_PUPD_SET_RETENTION 0x10 - -/* I2S mode */ -#define WL1273_IS2_WIDTH_32 0x0 -#define WL1273_IS2_WIDTH_40 0x1 -#define WL1273_IS2_WIDTH_22_23 0x2 -#define WL1273_IS2_WIDTH_23_22 0x3 -#define WL1273_IS2_WIDTH_48 0x4 -#define WL1273_IS2_WIDTH_50 0x5 -#define WL1273_IS2_WIDTH_60 0x6 -#define WL1273_IS2_WIDTH_64 0x7 -#define WL1273_IS2_WIDTH_80 0x8 -#define WL1273_IS2_WIDTH_96 0x9 -#define WL1273_IS2_WIDTH_128 0xa -#define WL1273_IS2_WIDTH 0xf - -#define WL1273_IS2_FORMAT_STD (0x0 << 4) -#define WL1273_IS2_FORMAT_LEFT (0x1 << 4) -#define WL1273_IS2_FORMAT_RIGHT (0x2 << 4) -#define WL1273_IS2_FORMAT_USER (0x3 << 4) - -#define WL1273_IS2_MASTER (0x0 << 6) -#define WL1273_IS2_SLAVEW (0x1 << 6) - -#define WL1273_IS2_TRI_AFTER_SENDING (0x0 << 7) -#define WL1273_IS2_TRI_ALWAYS_ACTIVE (0x1 << 7) - -#define WL1273_IS2_SDOWS_RR (0x0 << 8) -#define WL1273_IS2_SDOWS_RF (0x1 << 8) -#define WL1273_IS2_SDOWS_FR (0x2 << 8) -#define WL1273_IS2_SDOWS_FF (0x3 << 8) - -#define WL1273_IS2_TRI_OPT (0x0 << 10) -#define WL1273_IS2_TRI_ALWAYS (0x1 << 10) - -#define WL1273_IS2_RATE_48K (0x0 << 12) -#define WL1273_IS2_RATE_44_1K (0x1 << 12) -#define WL1273_IS2_RATE_32K (0x2 << 12) -#define WL1273_IS2_RATE_22_05K (0x4 << 12) -#define WL1273_IS2_RATE_16K (0x5 << 12) -#define WL1273_IS2_RATE_12K (0x8 << 12) -#define WL1273_IS2_RATE_11_025 (0x9 << 12) -#define WL1273_IS2_RATE_8K (0xa << 12) -#define WL1273_IS2_RATE (0xf << 12) - -#define WL1273_I2S_DEF_MODE (WL1273_IS2_WIDTH_32 | \ - WL1273_IS2_FORMAT_STD | \ - WL1273_IS2_MASTER | \ - WL1273_IS2_TRI_AFTER_SENDING | \ - WL1273_IS2_SDOWS_RR | \ - WL1273_IS2_TRI_OPT | \ - WL1273_IS2_RATE_48K) - int wl1273_get_format(struct snd_soc_codec *codec, unsigned int *fmt); #endif /* End of __WL1273_CODEC_H__ */ diff --git a/sound/soc/codecs/wm8990.c b/sound/soc/codecs/wm8990.c index 5c87a63..100aeee 100644 --- a/sound/soc/codecs/wm8990.c +++ b/sound/soc/codecs/wm8990.c @@ -1183,7 +1183,7 @@ static int wm8990_set_bias_level(struct snd_soc_codec *codec, WM8990_VMIDTOG); /* Delay to allow output caps to discharge */ - msleep(msecs_to_jiffies(300)); + msleep(300); /* Disable VMIDTOG */ snd_soc_write(codec, WM8990_ANTIPOP2, WM8990_SOFTST | @@ -1195,17 +1195,17 @@ static int wm8990_set_bias_level(struct snd_soc_codec *codec, /* Enable outputs */ snd_soc_write(codec, WM8990_POWER_MANAGEMENT_1, 0x1b00); - msleep(msecs_to_jiffies(50)); + msleep(50); /* Enable VMID at 2x50k */ snd_soc_write(codec, WM8990_POWER_MANAGEMENT_1, 0x1f02); - msleep(msecs_to_jiffies(100)); + msleep(100); /* Enable VREF */ snd_soc_write(codec, WM8990_POWER_MANAGEMENT_1, 0x1f03); - msleep(msecs_to_jiffies(600)); + msleep(600); /* Enable BUFIOEN */ snd_soc_write(codec, WM8990_ANTIPOP2, WM8990_SOFTST | @@ -1250,7 +1250,7 @@ static int wm8990_set_bias_level(struct snd_soc_codec *codec, /* Disable VMID */ snd_soc_write(codec, WM8990_POWER_MANAGEMENT_1, 0x1f01); - msleep(msecs_to_jiffies(300)); + msleep(300); /* Enable all output discharge bits */ snd_soc_write(codec, WM8990_ANTIPOP1, WM8990_DIS_LLINE | diff --git a/sound/soc/ep93xx/ep93xx-i2s.c b/sound/soc/ep93xx/ep93xx-i2s.c index 9ac93f6..fff579a 100644 --- a/sound/soc/ep93xx/ep93xx-i2s.c +++ b/sound/soc/ep93xx/ep93xx-i2s.c @@ -267,14 +267,16 @@ static int ep93xx_i2s_hw_params(struct snd_pcm_substream *substream, ep93xx_i2s_write_reg(info, EP93XX_I2S_RXWRDLEN, word_len); /* - * Calculate the sdiv (bit clock) and lrdiv (left/right clock) values. - * If the lrclk is pulse length is larger than the word size, then the - * bit clock will be gated for the unused bits. + * EP93xx I2S module can be setup so SCLK / LRCLK value can be + * 32, 64, 128. MCLK / SCLK value can be 2 and 4. + * We set LRCLK equal to `rate' and minimum SCLK / LRCLK + * value is 64, because our sample size is 32 bit * 2 channels. + * I2S standard permits us to transmit more bits than + * the codec uses. */ - div = (clk_get_rate(info->mclk) / params_rate(params)) * - params_channels(params); + div = clk_get_rate(info->mclk) / params_rate(params); for (sdiv = 2; sdiv <= 4; sdiv += 2) - for (lrdiv = 32; lrdiv <= 128; lrdiv <<= 1) + for (lrdiv = 64; lrdiv <= 128; lrdiv <<= 1) if (sdiv * lrdiv == div) { found = 1; goto out; @@ -341,9 +343,7 @@ static struct snd_soc_dai_ops ep93xx_i2s_dai_ops = { .set_fmt = ep93xx_i2s_set_dai_fmt, }; -#define EP93XX_I2S_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \ - SNDRV_PCM_FMTBIT_S24_LE | \ - SNDRV_PCM_FMTBIT_S32_LE) +#define EP93XX_I2S_FORMATS (SNDRV_PCM_FMTBIT_S32_LE) static struct snd_soc_dai_driver ep93xx_i2s_dai = { .symmetric_rates= 1, diff --git a/tools/perf/Documentation/perf-record.txt b/tools/perf/Documentation/perf-record.txt index 52462ae..e032716 100644 --- a/tools/perf/Documentation/perf-record.txt +++ b/tools/perf/Documentation/perf-record.txt @@ -61,6 +61,9 @@ OPTIONS -r:: --realtime=:: Collect data with this RT SCHED_FIFO priority. +-D:: +--no-delay:: + Collect data without buffering. -A:: --append:: Append to the output file to do incremental profiling. diff --git a/tools/perf/builtin-record.c b/tools/perf/builtin-record.c index 7069bd3..fcd29e8 100644 --- a/tools/perf/builtin-record.c +++ b/tools/perf/builtin-record.c @@ -49,6 +49,7 @@ static int pipe_output = 0; static const char *output_name = "perf.data"; static int group = 0; static int realtime_prio = 0; +static bool nodelay = false; static bool raw_samples = false; static bool sample_id_all_avail = true; static bool system_wide = false; @@ -307,6 +308,11 @@ static void create_counter(struct perf_evsel *evsel, int cpu) attr->sample_type |= PERF_SAMPLE_CPU; } + if (nodelay) { + attr->watermark = 0; + attr->wakeup_events = 1; + } + attr->mmap = track; attr->comm = track; attr->inherit = !no_inherit; @@ -331,9 +337,6 @@ try_again: else if (err == ENODEV && cpu_list) { die("No such device - did you specify" " an out-of-range profile CPU?\n"); - } else if (err == ENOENT) { - die("%s event is not supported. ", - event_name(evsel)); } else if (err == EINVAL && sample_id_all_avail) { /* * Old kernel, no attr->sample_id_type_all field @@ -480,6 +483,7 @@ static void atexit_header(void) process_buildids(); perf_header__write(&session->header, output, true); perf_session__delete(session); + perf_evsel_list__delete(); symbol__exit(); } } @@ -845,6 +849,8 @@ const struct option record_options[] = { "record events on existing thread id"), OPT_INTEGER('r', "realtime", &realtime_prio, "collect data with this RT SCHED_FIFO priority"), + OPT_BOOLEAN('D', "no-delay", &nodelay, + "collect data without buffering"), OPT_BOOLEAN('R', "raw-samples", &raw_samples, "collect raw sample records from all opened counters"), OPT_BOOLEAN('a', "all-cpus", &system_wide, @@ -930,6 +936,8 @@ int cmd_record(int argc, const char **argv, const char *prefix __used) list_for_each_entry(pos, &evsel_list, node) { if (perf_evsel__alloc_fd(pos, cpus->nr, threads->nr) < 0) goto out_free_fd; + if (perf_header__push_event(pos->attr.config, event_name(pos))) + goto out_free_fd; } event_array = malloc((sizeof(struct pollfd) * MAX_NR_CPUS * MAX_COUNTERS * threads->nr)); diff --git a/tools/perf/builtin-sched.c b/tools/perf/builtin-sched.c index abd4b84..29e7ffd8 100644 --- a/tools/perf/builtin-sched.c +++ b/tools/perf/builtin-sched.c @@ -1843,15 +1843,15 @@ static const char *record_args[] = { "-f", "-m", "1024", "-c", "1", - "-e", "sched:sched_switch:r", - "-e", "sched:sched_stat_wait:r", - "-e", "sched:sched_stat_sleep:r", - "-e", "sched:sched_stat_iowait:r", - "-e", "sched:sched_stat_runtime:r", - "-e", "sched:sched_process_exit:r", - "-e", "sched:sched_process_fork:r", - "-e", "sched:sched_wakeup:r", - "-e", "sched:sched_migrate_task:r", + "-e", "sched:sched_switch", + "-e", "sched:sched_stat_wait", + "-e", "sched:sched_stat_sleep", + "-e", "sched:sched_stat_iowait", + "-e", "sched:sched_stat_runtime", + "-e", "sched:sched_process_exit", + "-e", "sched:sched_process_fork", + "-e", "sched:sched_wakeup", + "-e", "sched:sched_migrate_task", }; static int __cmd_record(int argc, const char **argv) diff --git a/tools/perf/builtin-stat.c b/tools/perf/builtin-stat.c index c385a63..0ff11d9 100644 --- a/tools/perf/builtin-stat.c +++ b/tools/perf/builtin-stat.c @@ -743,6 +743,7 @@ int cmd_stat(int argc, const char **argv, const char *prefix __used) out_free_fd: list_for_each_entry(pos, &evsel_list, node) perf_evsel__free_stat_priv(pos); + perf_evsel_list__delete(); out: thread_map__delete(threads); threads = NULL; diff --git a/tools/perf/builtin-top.c b/tools/perf/builtin-top.c index 6ce4042..05344c6 100644 --- a/tools/perf/builtin-top.c +++ b/tools/perf/builtin-top.c @@ -1247,8 +1247,6 @@ try_again: die("Permission error - are you root?\n" "\t Consider tweaking" " /proc/sys/kernel/perf_event_paranoid.\n"); - if (err == ENOENT) - die("%s event is not supported. ", event_name(evsel)); /* * If it's cycles then fall back to hrtimer * based cpu-clock-tick sw counter, which @@ -1473,6 +1471,8 @@ int cmd_top(int argc, const char **argv, const char *prefix __used) pos->attr.sample_period = default_interval; } + sym_evsel = list_entry(evsel_list.next, struct perf_evsel, node); + symbol_conf.priv_size = (sizeof(struct sym_entry) + (nr_counters + 1) * sizeof(unsigned long)); @@ -1490,6 +1490,7 @@ int cmd_top(int argc, const char **argv, const char *prefix __used) out_free_fd: list_for_each_entry(pos, &evsel_list, node) perf_evsel__free_mmap(pos); + perf_evsel_list__delete(); return status; } diff --git a/tools/perf/perf.c b/tools/perf/perf.c index 5b1ecd6..595d0f4 100644 --- a/tools/perf/perf.c +++ b/tools/perf/perf.c @@ -286,8 +286,6 @@ static int run_builtin(struct cmd_struct *p, int argc, const char **argv) status = p->fn(argc, argv, prefix); exit_browser(status); - perf_evsel_list__delete(); - if (status) return status & 0xff; diff --git a/tools/perf/util/parse-events.c b/tools/perf/util/parse-events.c index 5cb6f4b..bc2732e 100644 --- a/tools/perf/util/parse-events.c +++ b/tools/perf/util/parse-events.c @@ -490,32 +490,6 @@ parse_multiple_tracepoint_event(char *sys_name, const char *evt_exp, return EVT_HANDLED_ALL; } -static int store_event_type(const char *orgname) -{ - char filename[PATH_MAX], *c; - FILE *file; - int id, n; - - sprintf(filename, "%s/", debugfs_path); - strncat(filename, orgname, strlen(orgname)); - strcat(filename, "/id"); - - c = strchr(filename, ':'); - if (c) - *c = '/'; - - file = fopen(filename, "r"); - if (!file) - return 0; - n = fscanf(file, "%i", &id); - fclose(file); - if (n < 1) { - pr_err("cannot store event ID\n"); - return -EINVAL; - } - return perf_header__push_event(id, orgname); -} - static enum event_result parse_tracepoint_event(const char **strp, struct perf_event_attr *attr) { @@ -555,13 +529,10 @@ static enum event_result parse_tracepoint_event(const char **strp, if (evt_length >= MAX_EVENT_LENGTH) return EVT_FAILED; if (strpbrk(evt_name, "*?")) { - *strp += strlen(sys_name) + evt_length; + *strp += strlen(sys_name) + evt_length + 1; /* 1 == the ':' */ return parse_multiple_tracepoint_event(sys_name, evt_name, flags); } else { - if (store_event_type(evt_name) < 0) - return EVT_FAILED; - return parse_single_tracepoint_event(sys_name, evt_name, evt_length, attr, strp); } |
