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-rw-r--r--arch/arm/Kconfig2
-rw-r--r--arch/arm/mm/tlb-v6.S1
-rw-r--r--include/asm-arm/tlbflush.h6
3 files changed, 8 insertions, 1 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 15dc1a0..9f80fa5 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -78,7 +78,7 @@ menu "System Type"
choice
prompt "ARM system type"
- default ARCH_RPC
+ default ARCH_VERSATILE
config ARCH_CLPS7500
bool "Cirrus-CL-PS7500FE"
diff --git a/arch/arm/mm/tlb-v6.S b/arch/arm/mm/tlb-v6.S
index 6f76b89..fd6adde 100644
--- a/arch/arm/mm/tlb-v6.S
+++ b/arch/arm/mm/tlb-v6.S
@@ -80,6 +80,7 @@ ENTRY(v6wbi_flush_kern_tlb_range)
add r0, r0, #PAGE_SZ
cmp r0, r1
blo 1b
+ mcr p15, 0, r2, c7, c10, 4 @ data synchronization barrier
mov pc, lr
.section ".text.init", #alloc, #execinstr
diff --git a/include/asm-arm/tlbflush.h b/include/asm-arm/tlbflush.h
index 9387a5e..0c2acc9 100644
--- a/include/asm-arm/tlbflush.h
+++ b/include/asm-arm/tlbflush.h
@@ -340,6 +340,12 @@ static inline void local_flush_tlb_kernel_page(unsigned long kaddr)
asm("mcr%? p15, 0, %0, c8, c6, 1" : : "r" (kaddr));
if (tlb_flag(TLB_V6_I_PAGE))
asm("mcr%? p15, 0, %0, c8, c5, 1" : : "r" (kaddr));
+
+ /* The ARM ARM states that the completion of a TLB maintenance
+ * operation is only guaranteed by a DSB instruction
+ */
+ if (tlb_flag(TLB_V6_U_PAGE | TLB_V6_D_PAGE | TLB_V6_I_PAGE))
+ asm("mcr%? p15, 0, %0, c7, c10, 4" : : "r" (zero));
}
/*
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