diff options
43 files changed, 326 insertions, 184 deletions
diff --git a/arch/arm/include/asm/unistd.h b/arch/arm/include/asm/unistd.h index 0106184..94cc58e 100644 --- a/arch/arm/include/asm/unistd.h +++ b/arch/arm/include/asm/unistd.h @@ -387,6 +387,8 @@ #define __NR_dup3 (__NR_SYSCALL_BASE+358) #define __NR_pipe2 (__NR_SYSCALL_BASE+359) #define __NR_inotify_init1 (__NR_SYSCALL_BASE+360) +#define __NR_preadv (__NR_SYSCALL_BASE+361) +#define __NR_pwritev (__NR_SYSCALL_BASE+362) /* * The following SWIs are ARM private. diff --git a/arch/arm/kernel/calls.S b/arch/arm/kernel/calls.S index 9ca8d13f..1680e9e 100644 --- a/arch/arm/kernel/calls.S +++ b/arch/arm/kernel/calls.S @@ -370,6 +370,8 @@ CALL(sys_dup3) CALL(sys_pipe2) /* 360 */ CALL(sys_inotify_init1) + CALL(sys_preadv) + CALL(sys_pwritev) #ifndef syscalls_counted .equ syscalls_padding, ((NR_syscalls + 3) & ~3) - NR_syscalls #define syscalls_counted diff --git a/arch/arm/mach-imx/include/mach/gpio.h b/arch/arm/mach-imx/include/mach/gpio.h index 502d5aa..6c2942f 100644 --- a/arch/arm/mach-imx/include/mach/gpio.h +++ b/arch/arm/mach-imx/include/mach/gpio.h @@ -1,6 +1,7 @@ #ifndef _IMX_GPIO_H #include <linux/kernel.h> +#include <mach/hardware.h> #include <mach/imx-regs.h> #define IMX_GPIO_ALLOC_MODE_NORMAL 0 diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c index 16dc9ea..eeb0024 100644 --- a/arch/arm/mach-kirkwood/common.c +++ b/arch/arm/mach-kirkwood/common.c @@ -23,6 +23,7 @@ #include <asm/mach/map.h> #include <asm/mach/time.h> #include <mach/kirkwood.h> +#include <mach/bridge-regs.h> #include <plat/cache-feroceon-l2.h> #include <plat/ehci-orion.h> #include <plat/mvsdio.h> diff --git a/arch/arm/mach-kirkwood/include/mach/bridge-regs.h b/arch/arm/mach-kirkwood/include/mach/bridge-regs.h new file mode 100644 index 0000000..4f7029f --- /dev/null +++ b/arch/arm/mach-kirkwood/include/mach/bridge-regs.h @@ -0,0 +1,42 @@ +/* + * arch/arm/mach-kirkwood/include/mach/bridge-regs.h + * + * Mbus-L to Mbus Bridge Registers + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef __ASM_ARCH_BRIDGE_REGS_H +#define __ASM_ARCH_BRIDGE_REGS_H + +#include <mach/kirkwood.h> + +#define CPU_CONTROL (BRIDGE_VIRT_BASE | 0x0104) +#define CPU_RESET 0x00000002 + +#define RSTOUTn_MASK (BRIDGE_VIRT_BASE | 0x0108) +#define SOFT_RESET_OUT_EN 0x00000004 + +#define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE | 0x010c) +#define SOFT_RESET 0x00000001 + +#define BRIDGE_CAUSE (BRIDGE_VIRT_BASE | 0x0110) +#define BRIDGE_MASK (BRIDGE_VIRT_BASE | 0x0114) +#define BRIDGE_INT_TIMER0 0x0002 +#define BRIDGE_INT_TIMER1 0x0004 +#define BRIDGE_INT_TIMER1_CLR (~0x0004) + +#define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0200) +#define IRQ_CAUSE_LOW_OFF 0x0000 +#define IRQ_MASK_LOW_OFF 0x0004 +#define IRQ_CAUSE_HIGH_OFF 0x0010 +#define IRQ_MASK_HIGH_OFF 0x0014 + +#define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0300) + +#define L2_CONFIG_REG (BRIDGE_VIRT_BASE | 0x0128) +#define L2_WRITETHROUGH 0x00000010 + +#endif diff --git a/arch/arm/mach-kirkwood/include/mach/debug-macro.S b/arch/arm/mach-kirkwood/include/mach/debug-macro.S index c0cc5b5..a4a55c1 100644 --- a/arch/arm/mach-kirkwood/include/mach/debug-macro.S +++ b/arch/arm/mach-kirkwood/include/mach/debug-macro.S @@ -6,7 +6,7 @@ * published by the Free Software Foundation. */ -#include <mach/kirkwood.h> +#include <mach/bridge-regs.h> .macro addruart,rx mrc p15, 0, \rx, c1, c0 diff --git a/arch/arm/mach-kirkwood/include/mach/entry-macro.S b/arch/arm/mach-kirkwood/include/mach/entry-macro.S index 83e0cba..8939d36 100644 --- a/arch/arm/mach-kirkwood/include/mach/entry-macro.S +++ b/arch/arm/mach-kirkwood/include/mach/entry-macro.S @@ -8,7 +8,7 @@ * warranty of any kind, whether express or implied. */ -#include <mach/kirkwood.h> +#include <mach/bridge-regs.h> .macro disable_fiq .endm diff --git a/arch/arm/mach-kirkwood/include/mach/kirkwood.h b/arch/arm/mach-kirkwood/include/mach/kirkwood.h index 38c9868..b3e1395 100644 --- a/arch/arm/mach-kirkwood/include/mach/kirkwood.h +++ b/arch/arm/mach-kirkwood/include/mach/kirkwood.h @@ -44,44 +44,6 @@ #define KIRKWOOD_PCIE_MEM_SIZE SZ_128M /* - * MBUS bridge registers. - */ -#define BRIDGE_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x20000) -#define CPU_CONTROL (BRIDGE_VIRT_BASE | 0x0104) -#define CPU_RESET 0x00000002 -#define RSTOUTn_MASK (BRIDGE_VIRT_BASE | 0x0108) -#define SOFT_RESET_OUT_EN 0x00000004 -#define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE | 0x010c) -#define SOFT_RESET 0x00000001 -#define BRIDGE_CAUSE (BRIDGE_VIRT_BASE | 0x0110) -#define BRIDGE_MASK (BRIDGE_VIRT_BASE | 0x0114) -#define BRIDGE_INT_TIMER0 0x0002 -#define BRIDGE_INT_TIMER1 0x0004 -#define BRIDGE_INT_TIMER1_CLR (~0x0004) -#define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0200) -#define IRQ_CAUSE_LOW_OFF 0x0000 -#define IRQ_MASK_LOW_OFF 0x0004 -#define IRQ_CAUSE_HIGH_OFF 0x0010 -#define IRQ_MASK_HIGH_OFF 0x0014 -#define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0300) -#define L2_CONFIG_REG (BRIDGE_VIRT_BASE | 0x0128) -#define L2_WRITETHROUGH 0x00000010 - -/* - * Supported devices and revisions. - */ -#define MV88F6281_DEV_ID 0x6281 -#define MV88F6281_REV_Z0 0 -#define MV88F6281_REV_A0 2 - -#define MV88F6192_DEV_ID 0x6192 -#define MV88F6192_REV_Z0 0 -#define MV88F6192_REV_A0 2 - -#define MV88F6180_DEV_ID 0x6180 -#define MV88F6180_REV_A0 2 - -/* * Register Map */ #define DDR_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x00000) @@ -99,6 +61,8 @@ #define UART1_PHYS_BASE (DEV_BUS_PHYS_BASE | 0x2100) #define UART1_VIRT_BASE (DEV_BUS_VIRT_BASE | 0x2100) +#define BRIDGE_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x20000) + #define PCIE_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x40000) #define USB_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x50000) @@ -119,5 +83,18 @@ #define SDIO_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x90000) +/* + * Supported devices and revisions. + */ +#define MV88F6281_DEV_ID 0x6281 +#define MV88F6281_REV_Z0 0 +#define MV88F6281_REV_A0 2 + +#define MV88F6192_DEV_ID 0x6192 +#define MV88F6192_REV_Z0 0 +#define MV88F6192_REV_A0 2 + +#define MV88F6180_DEV_ID 0x6180 +#define MV88F6180_REV_A0 2 #endif diff --git a/arch/arm/mach-kirkwood/include/mach/system.h b/arch/arm/mach-kirkwood/include/mach/system.h index 23a1914..7568e95 100644 --- a/arch/arm/mach-kirkwood/include/mach/system.h +++ b/arch/arm/mach-kirkwood/include/mach/system.h @@ -9,8 +9,7 @@ #ifndef __ASM_ARCH_SYSTEM_H #define __ASM_ARCH_SYSTEM_H -#include <mach/hardware.h> -#include <mach/kirkwood.h> +#include <mach/bridge-regs.h> static inline void arch_idle(void) { diff --git a/arch/arm/mach-kirkwood/irq.c b/arch/arm/mach-kirkwood/irq.c index 06083b2..28020ab 100644 --- a/arch/arm/mach-kirkwood/irq.c +++ b/arch/arm/mach-kirkwood/irq.c @@ -12,6 +12,7 @@ #include <linux/init.h> #include <linux/irq.h> #include <linux/io.h> +#include <mach/bridge-regs.h> #include <plat/irq.h> #include <asm/gpio.h> #include "common.h" diff --git a/arch/arm/mach-loki/addr-map.c b/arch/arm/mach-loki/addr-map.c index 0332d8f..b9537c9 100644 --- a/arch/arm/mach-loki/addr-map.c +++ b/arch/arm/mach-loki/addr-map.c @@ -38,6 +38,7 @@ /* * CPU Address Decode Windows registers */ +#define BRIDGE_REG(x) (BRIDGE_VIRT_BASE | (x)) #define CPU_WIN_CTRL(n) BRIDGE_REG(0x000 | ((n) << 4)) #define CPU_WIN_BASE(n) BRIDGE_REG(0x004 | ((n) << 4)) #define CPU_WIN_REMAP_LO(n) BRIDGE_REG(0x008 | ((n) << 4)) diff --git a/arch/arm/mach-loki/include/mach/bridge-regs.h b/arch/arm/mach-loki/include/mach/bridge-regs.h new file mode 100644 index 0000000..a3fabf7 --- /dev/null +++ b/arch/arm/mach-loki/include/mach/bridge-regs.h @@ -0,0 +1,33 @@ +/* + * arch/arm/mach-loki/include/mach/bridge-regs.h + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef __ASM_ARCH_BRIDGE_REGS_H +#define __ASM_ARCH_BRIDGE_REGS_H + +#include <mach/loki.h> + +#define RSTOUTn_MASK (BRIDGE_VIRT_BASE | 0x0108) +#define SOFT_RESET_OUT_EN 0x00000004 + +#define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE | 0x010c) +#define SOFT_RESET 0x00000001 + +#define BRIDGE_CAUSE (BRIDGE_VIRT_BASE | 0x0110) + +#define BRIDGE_MASK (BRIDGE_VIRT_BASE | 0x0114) +#define BRIDGE_INT_TIMER0 0x0002 +#define BRIDGE_INT_TIMER1 0x0004 +#define BRIDGE_INT_TIMER1_CLR 0x0004 + +#define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0200) +#define IRQ_CAUSE_OFF 0x0000 +#define IRQ_MASK_OFF 0x0004 + +#define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0300) + +#endif diff --git a/arch/arm/mach-loki/include/mach/entry-macro.S b/arch/arm/mach-loki/include/mach/entry-macro.S index 332af38..bc917ed 100644 --- a/arch/arm/mach-loki/include/mach/entry-macro.S +++ b/arch/arm/mach-loki/include/mach/entry-macro.S @@ -8,7 +8,7 @@ * warranty of any kind, whether express or implied. */ -#include <mach/loki.h> +#include <mach/bridge-regs.h> .macro disable_fiq .endm diff --git a/arch/arm/mach-loki/include/mach/loki.h b/arch/arm/mach-loki/include/mach/loki.h index c00af6b..bfca7c2 100644 --- a/arch/arm/mach-loki/include/mach/loki.h +++ b/arch/arm/mach-loki/include/mach/loki.h @@ -58,20 +58,6 @@ #define UART1_VIRT_BASE (DEV_BUS_VIRT_BASE | 0x2100) #define BRIDGE_VIRT_BASE (LOKI_REGS_VIRT_BASE | 0x20000) -#define BRIDGE_REG(x) (BRIDGE_VIRT_BASE | (x)) -#define RSTOUTn_MASK (BRIDGE_VIRT_BASE | 0x0108) -#define SOFT_RESET_OUT_EN 0x00000004 -#define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE | 0x010c) -#define SOFT_RESET 0x00000001 -#define BRIDGE_CAUSE (BRIDGE_VIRT_BASE | 0x0110) -#define BRIDGE_MASK (BRIDGE_VIRT_BASE | 0x0114) -#define BRIDGE_INT_TIMER0 0x0002 -#define BRIDGE_INT_TIMER1 0x0004 -#define BRIDGE_INT_TIMER1_CLR 0x0004 -#define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0200) -#define IRQ_CAUSE_OFF 0x0000 -#define IRQ_MASK_OFF 0x0004 -#define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0300) #define PCIE0_VIRT_BASE (LOKI_REGS_VIRT_BASE | 0x30000) diff --git a/arch/arm/mach-loki/include/mach/system.h b/arch/arm/mach-loki/include/mach/system.h index c1de36f..7189519 100644 --- a/arch/arm/mach-loki/include/mach/system.h +++ b/arch/arm/mach-loki/include/mach/system.h @@ -9,8 +9,7 @@ #ifndef __ASM_ARCH_SYSTEM_H #define __ASM_ARCH_SYSTEM_H -#include <mach/hardware.h> -#include <mach/loki.h> +#include <mach/bridge-regs.h> static inline void arch_idle(void) { diff --git a/arch/arm/mach-loki/irq.c b/arch/arm/mach-loki/irq.c index e1f9733..76b211b 100644 --- a/arch/arm/mach-loki/irq.c +++ b/arch/arm/mach-loki/irq.c @@ -12,6 +12,7 @@ #include <linux/init.h> #include <linux/irq.h> #include <linux/io.h> +#include <mach/bridge-regs.h> #include <plat/irq.h> #include "common.h" diff --git a/arch/arm/mach-mv78xx0/common.c b/arch/arm/mach-mv78xx0/common.c index a575daa..9ba5950 100644 --- a/arch/arm/mach-mv78xx0/common.c +++ b/arch/arm/mach-mv78xx0/common.c @@ -20,6 +20,7 @@ #include <asm/mach/map.h> #include <asm/mach/time.h> #include <mach/mv78xx0.h> +#include <mach/bridge-regs.h> #include <plat/cache-feroceon-l2.h> #include <plat/ehci-orion.h> #include <plat/orion_nand.h> diff --git a/arch/arm/mach-mv78xx0/include/mach/bridge-regs.h b/arch/arm/mach-mv78xx0/include/mach/bridge-regs.h new file mode 100644 index 0000000..2d14c4f --- /dev/null +++ b/arch/arm/mach-mv78xx0/include/mach/bridge-regs.h @@ -0,0 +1,39 @@ +/* + * arch/arm/mach-mv78xx0/include/mach/bridge-regs.h + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef __ASM_ARCH_BRIDGE_REGS_H +#define __ASM_ARCH_BRIDGE_REGS_H + +#include <mach/mv78xx0.h> + +#define CPU_CONTROL (BRIDGE_VIRT_BASE | 0x0104) +#define L2_WRITETHROUGH 0x00020000 + +#define RSTOUTn_MASK (BRIDGE_VIRT_BASE | 0x0108) +#define SOFT_RESET_OUT_EN 0x00000004 + +#define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE | 0x010c) +#define SOFT_RESET 0x00000001 + +#define BRIDGE_CAUSE (BRIDGE_VIRT_BASE | 0x0110) +#define BRIDGE_MASK (BRIDGE_VIRT_BASE | 0x0114) +#define BRIDGE_INT_TIMER0 0x0002 +#define BRIDGE_INT_TIMER1 0x0004 +#define BRIDGE_INT_TIMER1_CLR (~0x0004) + +#define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0200) +#define IRQ_CAUSE_ERR_OFF 0x0000 +#define IRQ_CAUSE_LOW_OFF 0x0004 +#define IRQ_CAUSE_HIGH_OFF 0x0008 +#define IRQ_MASK_ERR_OFF 0x000c +#define IRQ_MASK_LOW_OFF 0x0010 +#define IRQ_MASK_HIGH_OFF 0x0014 + +#define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0300) + +#endif diff --git a/arch/arm/mach-mv78xx0/include/mach/entry-macro.S b/arch/arm/mach-mv78xx0/include/mach/entry-macro.S index fbfb269..66ae2d2 100644 --- a/arch/arm/mach-mv78xx0/include/mach/entry-macro.S +++ b/arch/arm/mach-mv78xx0/include/mach/entry-macro.S @@ -8,7 +8,7 @@ * warranty of any kind, whether express or implied. */ -#include <mach/mv78xx0.h> +#include <mach/bridge-regs.h> .macro disable_fiq .endm diff --git a/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h b/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h index 582cffc..d715b92 100644 --- a/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h +++ b/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h @@ -59,37 +59,6 @@ * Core-specific peripheral registers. */ #define BRIDGE_VIRT_BASE (MV78XX0_CORE_REGS_VIRT_BASE) -#define CPU_CONTROL (BRIDGE_VIRT_BASE | 0x0104) -#define L2_WRITETHROUGH 0x00020000 -#define RSTOUTn_MASK (BRIDGE_VIRT_BASE | 0x0108) -#define SOFT_RESET_OUT_EN 0x00000004 -#define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE | 0x010c) -#define SOFT_RESET 0x00000001 -#define BRIDGE_CAUSE (BRIDGE_VIRT_BASE | 0x0110) -#define BRIDGE_MASK (BRIDGE_VIRT_BASE | 0x0114) -#define BRIDGE_INT_TIMER0 0x0002 -#define BRIDGE_INT_TIMER1 0x0004 -#define BRIDGE_INT_TIMER1_CLR (~0x0004) -#define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0200) -#define IRQ_CAUSE_ERR_OFF 0x0000 -#define IRQ_CAUSE_LOW_OFF 0x0004 -#define IRQ_CAUSE_HIGH_OFF 0x0008 -#define IRQ_MASK_ERR_OFF 0x000c -#define IRQ_MASK_LOW_OFF 0x0010 -#define IRQ_MASK_HIGH_OFF 0x0014 -#define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0300) - -/* - * Supported devices and revisions. - */ -#define MV78X00_Z0_DEV_ID 0x6381 -#define MV78X00_REV_Z0 1 - -#define MV78100_DEV_ID 0x7810 -#define MV78100_REV_A0 1 - -#define MV78200_DEV_ID 0x7820 -#define MV78200_REV_A0 1 /* * Register Map @@ -135,5 +104,16 @@ #define SATA_PHYS_BASE (MV78XX0_REGS_PHYS_BASE | 0xa0000) +/* + * Supported devices and revisions. + */ +#define MV78X00_Z0_DEV_ID 0x6381 +#define MV78X00_REV_Z0 1 + +#define MV78100_DEV_ID 0x7810 +#define MV78100_REV_A0 1 + +#define MV78200_DEV_ID 0x7820 +#define MV78200_REV_A0 1 #endif diff --git a/arch/arm/mach-mv78xx0/include/mach/system.h b/arch/arm/mach-mv78xx0/include/mach/system.h index 1d6350b..66e7ce4 100644 --- a/arch/arm/mach-mv78xx0/include/mach/system.h +++ b/arch/arm/mach-mv78xx0/include/mach/system.h @@ -9,8 +9,7 @@ #ifndef __ASM_ARCH_SYSTEM_H #define __ASM_ARCH_SYSTEM_H -#include <mach/hardware.h> -#include <mach/mv78xx0.h> +#include <mach/bridge-regs.h> static inline void arch_idle(void) { diff --git a/arch/arm/mach-mv78xx0/irq.c b/arch/arm/mach-mv78xx0/irq.c index 30b7e4b..f289b0e 100644 --- a/arch/arm/mach-mv78xx0/irq.c +++ b/arch/arm/mach-mv78xx0/irq.c @@ -13,7 +13,7 @@ #include <linux/pci.h> #include <linux/irq.h> #include <asm/gpio.h> -#include <mach/mv78xx0.h> +#include <mach/bridge-regs.h> #include <plat/irq.h> #include "common.h" diff --git a/arch/arm/mach-orion5x/addr-map.c b/arch/arm/mach-orion5x/addr-map.c index 719957e..c14d121 100644 --- a/arch/arm/mach-orion5x/addr-map.c +++ b/arch/arm/mach-orion5x/addr-map.c @@ -57,12 +57,14 @@ /* * Helpers to get DDR bank info */ +#define ORION5X_DDR_REG(x) (ORION5X_DDR_VIRT_BASE | (x)) #define DDR_BASE_CS(n) ORION5X_DDR_REG(0x1500 + ((n) << 3)) #define DDR_SIZE_CS(n) ORION5X_DDR_REG(0x1504 + ((n) << 3)) /* * CPU Address Decode Windows registers */ +#define ORION5X_BRIDGE_REG(x) (ORION5X_BRIDGE_VIRT_BASE | (x)) #define CPU_WIN_CTRL(n) ORION5X_BRIDGE_REG(0x000 | ((n) << 4)) #define CPU_WIN_BASE(n) ORION5X_BRIDGE_REG(0x004 | ((n) << 4)) #define CPU_WIN_REMAP_LO(n) ORION5X_BRIDGE_REG(0x008 | ((n) << 4)) diff --git a/arch/arm/mach-orion5x/include/mach/bridge-regs.h b/arch/arm/mach-orion5x/include/mach/bridge-regs.h new file mode 100644 index 0000000..be896e5 --- /dev/null +++ b/arch/arm/mach-orion5x/include/mach/bridge-regs.h @@ -0,0 +1,41 @@ +/* + * arch/arm/mach-orion5x/include/mach/bridge-regs.h + * + * Orion CPU Bridge Registers + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef __ASM_ARCH_BRIDGE_REGS_H +#define __ASM_ARCH_BRIDGE_REGS_H + +#include <mach/orion5x.h> + +#define CPU_CONF (ORION5X_BRIDGE_VIRT_BASE | 0x100) + +#define CPU_CTRL (ORION5X_BRIDGE_VIRT_BASE | 0x104) + +#define CPU_RESET_MASK (ORION5X_BRIDGE_VIRT_BASE | 0x108) +#define WDT_RESET 0x0002 + +#define CPU_SOFT_RESET (ORION5X_BRIDGE_VIRT_BASE | 0x10c) + +#define POWER_MNG_CTRL_REG (ORION5X_BRIDGE_VIRT_BASE | 0x11C) + +#define BRIDGE_CAUSE (ORION5X_BRIDGE_VIRT_BASE | 0x110) +#define WDT_INT_REQ 0x0008 + +#define BRIDGE_MASK (ORION5X_BRIDGE_VIRT_BASE | 0x114) +#define BRIDGE_INT_TIMER0 0x0002 +#define BRIDGE_INT_TIMER1 0x0004 +#define BRIDGE_INT_TIMER1_CLR (~0x0004) + +#define MAIN_IRQ_CAUSE (ORION5X_BRIDGE_VIRT_BASE | 0x200) + +#define MAIN_IRQ_MASK (ORION5X_BRIDGE_VIRT_BASE | 0x204) + +#define TIMER_VIRT_BASE (ORION5X_BRIDGE_VIRT_BASE | 0x300) + +#endif diff --git a/arch/arm/mach-orion5x/include/mach/entry-macro.S b/arch/arm/mach-orion5x/include/mach/entry-macro.S index 4351937..d658992 100644 --- a/arch/arm/mach-orion5x/include/mach/entry-macro.S +++ b/arch/arm/mach-orion5x/include/mach/entry-macro.S @@ -8,7 +8,7 @@ * warranty of any kind, whether express or implied. */ -#include <mach/orion5x.h> +#include <mach/bridge-regs.h> .macro disable_fiq .endm diff --git a/arch/arm/mach-orion5x/include/mach/orion5x.h b/arch/arm/mach-orion5x/include/mach/orion5x.h index 67bda31..377a773 100644 --- a/arch/arm/mach-orion5x/include/mach/orion5x.h +++ b/arch/arm/mach-orion5x/include/mach/orion5x.h @@ -61,30 +61,10 @@ #define ORION5X_PCI_MEM_SIZE SZ_128M /******************************************************************************* - * Supported Devices & Revisions - ******************************************************************************/ -/* Orion-1 (88F5181) and Orion-VoIP (88F5181L) */ -#define MV88F5181_DEV_ID 0x5181 -#define MV88F5181_REV_B1 3 -#define MV88F5181L_REV_A0 8 -#define MV88F5181L_REV_A1 9 -/* Orion-NAS (88F5182) */ -#define MV88F5182_DEV_ID 0x5182 -#define MV88F5182_REV_A2 2 -/* Orion-2 (88F5281) */ -#define MV88F5281_DEV_ID 0x5281 -#define MV88F5281_REV_D0 4 -#define MV88F5281_REV_D1 5 -#define MV88F5281_REV_D2 6 -/* Orion-1-90 (88F6183) */ -#define MV88F6183_DEV_ID 0x6183 -#define MV88F6183_REV_B0 3 - -/******************************************************************************* * Orion Registers Map ******************************************************************************/ + #define ORION5X_DDR_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x00000) -#define ORION5X_DDR_REG(x) (ORION5X_DDR_VIRT_BASE | (x)) #define ORION5X_DEV_BUS_PHYS_BASE (ORION5X_REGS_PHYS_BASE | 0x10000) #define ORION5X_DEV_BUS_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x10000) @@ -97,34 +77,25 @@ #define UART1_VIRT_BASE (ORION5X_DEV_BUS_VIRT_BASE | 0x2100) #define ORION5X_BRIDGE_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x20000) -#define ORION5X_BRIDGE_REG(x) (ORION5X_BRIDGE_VIRT_BASE | (x)) -#define TIMER_VIRT_BASE (ORION5X_BRIDGE_VIRT_BASE | 0x300) #define ORION5X_PCI_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x30000) -#define ORION5X_PCI_REG(x) (ORION5X_PCI_VIRT_BASE | (x)) #define ORION5X_PCIE_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x40000) -#define ORION5X_PCIE_REG(x) (ORION5X_PCIE_VIRT_BASE | (x)) #define ORION5X_USB0_PHYS_BASE (ORION5X_REGS_PHYS_BASE | 0x50000) #define ORION5X_USB0_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x50000) -#define ORION5X_USB0_REG(x) (ORION5X_USB0_VIRT_BASE | (x)) #define ORION5X_XOR_PHYS_BASE (ORION5X_REGS_PHYS_BASE | 0x60900) #define ORION5X_XOR_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x60900) -#define ORION5X_XOR_REG(x) (ORION5X_XOR_VIRT_BASE | (x)) #define ORION5X_ETH_PHYS_BASE (ORION5X_REGS_PHYS_BASE | 0x70000) #define ORION5X_ETH_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x70000) -#define ORION5X_ETH_REG(x) (ORION5X_ETH_VIRT_BASE | (x)) #define ORION5X_SATA_PHYS_BASE (ORION5X_REGS_PHYS_BASE | 0x80000) #define ORION5X_SATA_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x80000) -#define ORION5X_SATA_REG(x) (ORION5X_SATA_VIRT_BASE | (x)) #define ORION5X_USB1_PHYS_BASE (ORION5X_REGS_PHYS_BASE | 0xa0000) #define ORION5X_USB1_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0xa0000) -#define ORION5X_USB1_REG(x) (ORION5X_USB1_VIRT_BASE | (x)) /******************************************************************************* * Device Bus Registers @@ -142,23 +113,24 @@ #define DEV_BUS_INT_CAUSE ORION5X_DEV_BUS_REG(0x4d0) #define DEV_BUS_INT_MASK ORION5X_DEV_BUS_REG(0x4d4) -/*************************************************************************** - * Orion CPU Bridge Registers - **************************************************************************/ -#define CPU_CONF ORION5X_BRIDGE_REG(0x100) -#define CPU_CTRL ORION5X_BRIDGE_REG(0x104) -#define CPU_RESET_MASK ORION5X_BRIDGE_REG(0x108) -#define WDT_RESET 0x0002 -#define CPU_SOFT_RESET ORION5X_BRIDGE_REG(0x10c) -#define POWER_MNG_CTRL_REG ORION5X_BRIDGE_REG(0x11C) -#define BRIDGE_CAUSE ORION5X_BRIDGE_REG(0x110) -#define WDT_INT_REQ 0x0008 -#define BRIDGE_MASK ORION5X_BRIDGE_REG(0x114) -#define BRIDGE_INT_TIMER0 0x0002 -#define BRIDGE_INT_TIMER1 0x0004 -#define BRIDGE_INT_TIMER1_CLR (~0x0004) -#define MAIN_IRQ_CAUSE ORION5X_BRIDGE_REG(0x200) -#define MAIN_IRQ_MASK ORION5X_BRIDGE_REG(0x204) - +/******************************************************************************* + * Supported Devices & Revisions + ******************************************************************************/ +/* Orion-1 (88F5181) and Orion-VoIP (88F5181L) */ +#define MV88F5181_DEV_ID 0x5181 +#define MV88F5181_REV_B1 3 +#define MV88F5181L_REV_A0 8 +#define MV88F5181L_REV_A1 9 +/* Orion-NAS (88F5182) */ +#define MV88F5182_DEV_ID 0x5182 +#define MV88F5182_REV_A2 2 +/* Orion-2 (88F5281) */ +#define MV88F5281_DEV_ID 0x5281 +#define MV88F5281_REV_D0 4 +#define MV88F5281_REV_D1 5 +#define MV88F5281_REV_D2 6 +/* Orion-1-90 (88F6183) */ +#define MV88F6183_DEV_ID 0x6183 +#define MV88F6183_REV_B0 3 #endif diff --git a/arch/arm/mach-orion5x/include/mach/system.h b/arch/arm/mach-orion5x/include/mach/system.h index 9b8db1d..e912490 100644 --- a/arch/arm/mach-orion5x/include/mach/system.h +++ b/arch/arm/mach-orion5x/include/mach/system.h @@ -11,8 +11,7 @@ #ifndef __ASM_ARCH_SYSTEM_H #define __ASM_ARCH_SYSTEM_H -#include <mach/hardware.h> -#include <mach/orion5x.h> +#include <mach/bridge-regs.h> static inline void arch_idle(void) { diff --git a/arch/arm/mach-orion5x/irq.c b/arch/arm/mach-orion5x/irq.c index e03f7b4..d7512b9 100644 --- a/arch/arm/mach-orion5x/irq.c +++ b/arch/arm/mach-orion5x/irq.c @@ -15,7 +15,7 @@ #include <linux/irq.h> #include <linux/io.h> #include <asm/gpio.h> -#include <mach/orion5x.h> +#include <mach/bridge-regs.h> #include <plat/irq.h> #include "common.h" diff --git a/arch/arm/mach-orion5x/mss2-setup.c b/arch/arm/mach-orion5x/mss2-setup.c index 68acca9..41e6d50 100644 --- a/arch/arm/mach-orion5x/mss2-setup.c +++ b/arch/arm/mach-orion5x/mss2-setup.c @@ -26,6 +26,7 @@ #include <asm/mach/arch.h> #include <asm/mach/pci.h> #include <mach/orion5x.h> +#include <mach/bridge-regs.h> #include "common.h" #include "mpp.h" diff --git a/arch/arm/mach-orion5x/pci.c b/arch/arm/mach-orion5x/pci.c index d0a785a..36dc541 100644 --- a/arch/arm/mach-orion5x/pci.c +++ b/arch/arm/mach-orion5x/pci.c @@ -196,6 +196,7 @@ static int __init pcie_setup(struct pci_sys_data *sys) /***************************************************************************** * PCI controller ****************************************************************************/ +#define ORION5X_PCI_REG(x) (ORION5X_PCI_VIRT_BASE | (x)) #define PCI_MODE ORION5X_PCI_REG(0xd00) #define PCI_CMD ORION5X_PCI_REG(0xc00) #define PCI_P2P_CONF ORION5X_PCI_REG(0x1d14) diff --git a/arch/arm/mach-pxa/include/mach/audio.h b/arch/arm/mach-pxa/include/mach/audio.h index f82f96d..16eb025 100644 --- a/arch/arm/mach-pxa/include/mach/audio.h +++ b/arch/arm/mach-pxa/include/mach/audio.h @@ -4,12 +4,22 @@ #include <sound/core.h> #include <sound/pcm.h> +/* + * @reset_gpio: AC97 reset gpio (normally gpio113 or gpio95) + * a -1 value means no gpio will be used for reset + + * reset_gpio should only be specified for pxa27x CPUs where a silicon + * bug prevents correct operation of the reset line. If not specified, + * the default behaviour on these CPUs is to consider gpio 113 as the + * AC97 reset line, which is the default on most boards. + */ typedef struct { int (*startup)(struct snd_pcm_substream *, void *); void (*shutdown)(struct snd_pcm_substream *, void *); void (*suspend)(void *); void (*resume)(void *); void *priv; + int reset_gpio; } pxa2xx_audio_ops_t; extern void pxa_set_ac97_info(pxa2xx_audio_ops_t *ops); diff --git a/arch/arm/mach-pxa/include/mach/palmasoc.h b/arch/arm/mach-pxa/include/mach/palmasoc.h index 6c4b1f7..58afb30 100644 --- a/arch/arm/mach-pxa/include/mach/palmasoc.h +++ b/arch/arm/mach-pxa/include/mach/palmasoc.h @@ -1,13 +1,8 @@ #ifndef _INCLUDE_PALMASOC_H_ #define _INCLUDE_PALMASOC_H_ + struct palm27x_asoc_info { int jack_gpio; }; -#ifdef CONFIG_SND_PXA2XX_SOC_PALM27X -void __init palm27x_asoc_set_pdata(struct palm27x_asoc_info *data); -#else -static inline void palm27x_asoc_set_pdata(struct palm27x_asoc_info *data) {} -#endif - #endif diff --git a/arch/arm/mach-pxa/mioa701.c b/arch/arm/mach-pxa/mioa701.c index 9203b06..ff8052c 100644 --- a/arch/arm/mach-pxa/mioa701.c +++ b/arch/arm/mach-pxa/mioa701.c @@ -742,6 +742,10 @@ struct i2c_pxa_platform_data i2c_pdata = { .fast_mode = 1, }; +static pxa2xx_audio_ops_t mioa701_ac97_info = { + .reset_gpio = 95, +}; + /* * Mio global */ @@ -815,7 +819,7 @@ static void __init mioa701_machine_init(void) pxa_set_keypad_info(&mioa701_keypad_info); wm97xx_bat_set_pdata(&mioa701_battery_data); pxa_set_udc_info(&mioa701_udc_info); - pxa_set_ac97_info(NULL); + pxa_set_ac97_info(&mioa701_ac97_info); pm_power_off = mioa701_poweroff; arm_pm_restart = mioa701_restart; platform_add_devices(devices, ARRAY_SIZE(devices)); diff --git a/arch/arm/mach-pxa/palmld.c b/arch/arm/mach-pxa/palmld.c index ecf5910..1cec180 100644 --- a/arch/arm/mach-pxa/palmld.c +++ b/arch/arm/mach-pxa/palmld.c @@ -477,10 +477,22 @@ static struct wm97xx_batt_info wm97xx_batt_pdata = { /****************************************************************************** * aSoC audio ******************************************************************************/ -static struct palm27x_asoc_info palm27x_asoc_pdata = { +static struct palm27x_asoc_info palmld_asoc_pdata = { .jack_gpio = GPIO_NR_PALMLD_EARPHONE_DETECT, }; +static pxa2xx_audio_ops_t palmld_ac97_pdata = { + .reset_gpio = 95, +}; + +static struct platform_device palmld_asoc = { + .name = "palm27x-asoc", + .id = -1, + .dev = { + .platform_data = &palmld_asoc_pdata, + }, +}; + /****************************************************************************** * Framebuffer ******************************************************************************/ @@ -544,6 +556,7 @@ static struct platform_device *devices[] __initdata = { &palmld_backlight, &palmld_leds, &power_supply, + &palmld_asoc, }; static struct map_desc palmld_io_desc[] __initdata = { @@ -573,11 +586,10 @@ static void __init palmld_init(void) set_pxa_fb_info(&palmld_lcd_screen); pxa_set_mci_info(&palmld_mci_platform_data); - pxa_set_ac97_info(NULL); + pxa_set_ac97_info(&palmld_ac97_pdata); pxa_set_ficp_info(&palmld_ficp_platform_data); pxa_set_keypad_info(&palmld_keypad_platform_data); wm97xx_bat_set_pdata(&wm97xx_batt_pdata); - palm27x_asoc_set_pdata(&palm27x_asoc_pdata); platform_add_devices(devices, ARRAY_SIZE(devices)); } diff --git a/arch/arm/mach-pxa/palmt5.c b/arch/arm/mach-pxa/palmt5.c index d7f8106..3066236 100644 --- a/arch/arm/mach-pxa/palmt5.c +++ b/arch/arm/mach-pxa/palmt5.c @@ -420,10 +420,22 @@ static struct wm97xx_batt_info wm97xx_batt_pdata = { /****************************************************************************** * aSoC audio ******************************************************************************/ -static struct palm27x_asoc_info palm27x_asoc_pdata = { +static struct palm27x_asoc_info palmt5_asoc_pdata = { .jack_gpio = GPIO_NR_PALMT5_EARPHONE_DETECT, }; +static pxa2xx_audio_ops_t palmt5_ac97_pdata = { + .reset_gpio = 95, +}; + +static struct platform_device palmt5_asoc = { + .name = "palm27x-asoc", + .id = -1, + .dev = { + .platform_data = &palmt5_asoc_pdata, + }, +}; + /****************************************************************************** * Framebuffer ******************************************************************************/ @@ -486,6 +498,7 @@ static struct platform_device *devices[] __initdata = { #endif &palmt5_backlight, &power_supply, + &palmt5_asoc, }; /* setup udc GPIOs initial state */ @@ -504,12 +517,11 @@ static void __init palmt5_init(void) set_pxa_fb_info(&palmt5_lcd_screen); pxa_set_mci_info(&palmt5_mci_platform_data); palmt5_udc_init(); + pxa_set_ac97_info(&palmt5_ac97_pdata); pxa_set_udc_info(&palmt5_udc_info); - pxa_set_ac97_info(NULL); pxa_set_ficp_info(&palmt5_ficp_platform_data); pxa_set_keypad_info(&palmt5_keypad_platform_data); wm97xx_bat_set_pdata(&wm97xx_batt_pdata); - palm27x_asoc_set_pdata(&palm27x_asoc_pdata); platform_add_devices(devices, ARRAY_SIZE(devices)); } diff --git a/arch/arm/mach-pxa/palmtx.c b/arch/arm/mach-pxa/palmtx.c index 14393d0..e2d44b1 100644 --- a/arch/arm/mach-pxa/palmtx.c +++ b/arch/arm/mach-pxa/palmtx.c @@ -40,6 +40,7 @@ #include <mach/irda.h> #include <mach/pxa27x_keypad.h> #include <mach/udc.h> +#include <mach/palmasoc.h> #include "generic.h" #include "devices.h" @@ -434,6 +435,25 @@ static struct wm97xx_batt_info wm97xx_batt_pdata = { }; /****************************************************************************** + * aSoC audio + ******************************************************************************/ +static struct palm27x_asoc_info palmtx_asoc_pdata = { + .jack_gpio = GPIO_NR_PALMTX_EARPHONE_DETECT, +}; + +static pxa2xx_audio_ops_t palmtx_ac97_pdata = { + .reset_gpio = 95, +}; + +static struct platform_device palmtx_asoc = { + .name = "palm27x-asoc", + .id = -1, + .dev = { + .platform_data = &palmtx_asoc_pdata, + }, +}; + +/****************************************************************************** * Framebuffer ******************************************************************************/ static struct pxafb_mode_info palmtx_lcd_modes[] = { @@ -495,6 +515,7 @@ static struct platform_device *devices[] __initdata = { #endif &palmtx_backlight, &power_supply, + &palmtx_asoc, }; static struct map_desc palmtx_io_desc[] __initdata = { @@ -529,8 +550,8 @@ static void __init palmtx_init(void) set_pxa_fb_info(&palmtx_lcd_screen); pxa_set_mci_info(&palmtx_mci_platform_data); palmtx_udc_init(); + pxa_set_ac97_info(&palmtx_ac97_pdata); pxa_set_udc_info(&palmtx_udc_info); - pxa_set_ac97_info(NULL); pxa_set_ficp_info(&palmtx_ficp_platform_data); pxa_set_keypad_info(&palmtx_keypad_platform_data); wm97xx_bat_set_pdata(&wm97xx_batt_pdata); diff --git a/arch/arm/mach-pxa/pcm990-baseboard.c b/arch/arm/mach-pxa/pcm990-baseboard.c index 6112740..6c12b5a 100644 --- a/arch/arm/mach-pxa/pcm990-baseboard.c +++ b/arch/arm/mach-pxa/pcm990-baseboard.c @@ -377,7 +377,7 @@ struct pxacamera_platform_data pcm990_pxacamera_platform_data = { #include <linux/i2c/pca953x.h> static struct pca953x_platform_data pca9536_data = { - .gpio_base = NR_BUILTIN_GPIO + 1, + .gpio_base = NR_BUILTIN_GPIO, }; static int gpio_bus_switch; @@ -405,9 +405,9 @@ static unsigned long pcm990_camera_query_bus_param(struct soc_camera_link *link) int ret; if (!gpio_bus_switch) { - ret = gpio_request(NR_BUILTIN_GPIO + 1, "camera"); + ret = gpio_request(NR_BUILTIN_GPIO, "camera"); if (!ret) { - gpio_bus_switch = NR_BUILTIN_GPIO + 1; + gpio_bus_switch = NR_BUILTIN_GPIO; gpio_direction_output(gpio_bus_switch, 0); } else gpio_bus_switch = -EINVAL; diff --git a/arch/arm/plat-orion/time.c b/arch/arm/plat-orion/time.c index 2faf9db..de8a001 100644 --- a/arch/arm/plat-orion/time.c +++ b/arch/arm/plat-orion/time.c @@ -16,7 +16,7 @@ #include <linux/interrupt.h> #include <linux/irq.h> #include <asm/mach/time.h> -#include <mach/hardware.h> +#include <mach/bridge-regs.h> /* * Number of timer ticks per jiffy. diff --git a/drivers/pcmcia/pxa2xx_sharpsl.c b/drivers/pcmcia/pxa2xx_sharpsl.c index 1cd02f5..bc43f78 100644 --- a/drivers/pcmcia/pxa2xx_sharpsl.c +++ b/drivers/pcmcia/pxa2xx_sharpsl.c @@ -255,6 +255,9 @@ static int __init sharpsl_pcmcia_init(void) { int ret; + if (!platform_scoop_config) + return -ENODEV; + sharpsl_pcmcia_ops.nr = platform_scoop_config->num_devs; sharpsl_pcmcia_device = platform_device_alloc("pxa2xx-pcmcia", -1); diff --git a/drivers/watchdog/orion5x_wdt.c b/drivers/watchdog/orion5x_wdt.c index 7529616..2cde568 100644 --- a/drivers/watchdog/orion5x_wdt.c +++ b/drivers/watchdog/orion5x_wdt.c @@ -22,6 +22,7 @@ #include <linux/uaccess.h> #include <linux/io.h> #include <linux/spinlock.h> +#include <mach/bridge-regs.h> #include <plat/orion5x_wdt.h> /* diff --git a/include/sound/pxa2xx-lib.h b/include/sound/pxa2xx-lib.h index 2c894b6..2fd3d25 100644 --- a/include/sound/pxa2xx-lib.h +++ b/include/sound/pxa2xx-lib.h @@ -42,19 +42,4 @@ extern int pxa2xx_ac97_hw_resume(void); extern int pxa2xx_ac97_hw_probe(struct platform_device *dev); extern void pxa2xx_ac97_hw_remove(struct platform_device *dev); -/* AC97 platform_data */ -/** - * struct pxa2xx_ac97_platform_data - pxa ac97 platform data - * @reset_gpio: AC97 reset gpio (normally gpio113 or gpio95) - * a -1 value means no gpio will be used for reset - * - * Platform data should only be specified for pxa27x CPUs where a silicon bug - * prevents correct operation of the reset line. If not specified, the default - * behaviour is to consider gpio 113 as the AC97 reset line, which is the - * default on most boards. - */ -struct pxa2xx_ac97_platform_data { - int reset_gpio; -}; - #endif diff --git a/sound/arm/pxa2xx-ac97-lib.c b/sound/arm/pxa2xx-ac97-lib.c index 0afd1a8..a2c12d10 100644 --- a/sound/arm/pxa2xx-ac97-lib.c +++ b/sound/arm/pxa2xx-ac97-lib.c @@ -364,7 +364,7 @@ EXPORT_SYMBOL_GPL(pxa2xx_ac97_hw_resume); int __devinit pxa2xx_ac97_hw_probe(struct platform_device *dev) { int ret; - struct pxa2xx_ac97_platform_data *pdata = dev->dev.platform_data; + pxa2xx_audio_ops_t *pdata = dev->dev.platform_data; if (pdata) { switch (pdata->reset_gpio) { diff --git a/sound/soc/pxa/palm27x.c b/sound/soc/pxa/palm27x.c index 48a73f6..44fcc4e 100644 --- a/sound/soc/pxa/palm27x.c +++ b/sound/soc/pxa/palm27x.c @@ -200,7 +200,7 @@ static struct snd_soc_device palm27x_snd_devdata = { static struct platform_device *palm27x_snd_device; -static int __init palm27x_asoc_init(void) +static int palm27x_asoc_probe(struct platform_device *pdev) { int ret; @@ -208,6 +208,10 @@ static int __init palm27x_asoc_init(void) machine_is_palmld())) return -ENODEV; + if (pdev->dev.platform_data) + palm27x_ep_gpio = ((struct palm27x_asoc_info *) + (pdev->dev.platform_data))->jack_gpio; + ret = gpio_request(palm27x_ep_gpio, "Headphone Jack"); if (ret) return ret; @@ -245,16 +249,31 @@ err_alloc: return ret; } -static void __exit palm27x_asoc_exit(void) +static int __devexit palm27x_asoc_remove(struct platform_device *pdev) { free_irq(gpio_to_irq(palm27x_ep_gpio), NULL); gpio_free(palm27x_ep_gpio); platform_device_unregister(palm27x_snd_device); + return 0; } -void __init palm27x_asoc_set_pdata(struct palm27x_asoc_info *data) +static struct platform_driver palm27x_wm9712_driver = { + .probe = palm27x_asoc_probe, + .remove = __devexit_p(palm27x_asoc_remove), + .driver = { + .name = "palm27x-asoc", + .owner = THIS_MODULE, + }, +}; + +static int __init palm27x_asoc_init(void) +{ + return platform_driver_register(&palm27x_wm9712_driver); +} + +static void __exit palm27x_asoc_exit(void) { - palm27x_ep_gpio = data->jack_gpio; + platform_driver_unregister(&palm27x_wm9712_driver); } module_init(palm27x_asoc_init); |
