diff options
| -rw-r--r-- | Documentation/arm/Sharp-LH/IOBarrier | 2 | ||||
| -rw-r--r-- | drivers/mtd/devices/doc2000.c | 2 | ||||
| -rw-r--r-- | include/asm-arm/arch-versatile/irqs.h | 4 |
3 files changed, 4 insertions, 4 deletions
diff --git a/Documentation/arm/Sharp-LH/IOBarrier b/Documentation/arm/Sharp-LH/IOBarrier index c0d8853..2e953e2 100644 --- a/Documentation/arm/Sharp-LH/IOBarrier +++ b/Documentation/arm/Sharp-LH/IOBarrier @@ -32,7 +32,7 @@ BARRIER IO before the access to the SMC chip because the AEN latch only needs occurs after the SMC IO write cycle. The routines that implement this work-around make an additional concession which is to disable interrupts during the IO sequence. Other hardware devices -(the LogicPD CPLD) have registers in the same the physical memory +(the LogicPD CPLD) have registers in the same physical memory region as the SMC chip. An interrupt might allow an access to one of those registers while SMC IO is being performed. diff --git a/drivers/mtd/devices/doc2000.c b/drivers/mtd/devices/doc2000.c index c73e96b..90acf57 100644 --- a/drivers/mtd/devices/doc2000.c +++ b/drivers/mtd/devices/doc2000.c @@ -376,7 +376,7 @@ static int DoC_IdentChip(struct DiskOnChip *doc, int floor, int chip) * hardware restriction. */ if (doc->mfr) { if (doc->mfr == mfr && doc->id == id) - return 1; /* This is another the same the first */ + return 1; /* This is the same as the first */ else printk(KERN_WARNING "Flash chip at floor %d, chip %d is different:\n", diff --git a/include/asm-arm/arch-versatile/irqs.h b/include/asm-arm/arch-versatile/irqs.h index 745aa84..f7263b9 100644 --- a/include/asm-arm/arch-versatile/irqs.h +++ b/include/asm-arm/arch-versatile/irqs.h @@ -22,7 +22,7 @@ #include <asm/arch/platform.h> /* - * IRQ interrupts definitions are the same the INT definitions + * IRQ interrupts definitions are the same as the INT definitions * held within platform.h */ #define IRQ_VIC_START 0 @@ -94,7 +94,7 @@ #define IRQMASK_VICSOURCE31 INTMASK_VICSOURCE31 /* - * FIQ interrupts definitions are the same the INT definitions. + * FIQ interrupts definitions are the same as the INT definitions. */ #define FIQ_WDOGINT INT_WDOGINT #define FIQ_SOFTINT INT_SOFTINT |
