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-rw-r--r--arch/arm/mach-mvebu/coherency.c6
-rw-r--r--arch/arm/mach-mvebu/coherency_ll.S22
-rw-r--r--arch/arm/mach-mvebu/headsmp.S9
3 files changed, 23 insertions, 14 deletions
diff --git a/arch/arm/mach-mvebu/coherency.c b/arch/arm/mach-mvebu/coherency.c
index 489edd1..615dc0b 100644
--- a/arch/arm/mach-mvebu/coherency.c
+++ b/arch/arm/mach-mvebu/coherency.c
@@ -35,7 +35,7 @@
#include "coherency.h"
unsigned long coherency_phys_base;
-static void __iomem *coherency_base;
+void __iomem *coherency_base;
static void __iomem *coherency_cpu_base;
/* Coherency fabric registers */
@@ -61,7 +61,7 @@ static struct of_device_id of_coherency_table[] = {
};
/* Function defined in coherency_ll.S */
-int ll_set_cpu_coherent(void __iomem *base_addr, unsigned int hw_cpu_id);
+int ll_set_cpu_coherent(unsigned int hw_cpu_id);
int set_cpu_coherent(unsigned int hw_cpu_id, int smp_group_id)
{
@@ -71,7 +71,7 @@ int set_cpu_coherent(unsigned int hw_cpu_id, int smp_group_id)
return 1;
}
- return ll_set_cpu_coherent(coherency_base, hw_cpu_id);
+ return ll_set_cpu_coherent(hw_cpu_id);
}
/*
diff --git a/arch/arm/mach-mvebu/coherency_ll.S b/arch/arm/mach-mvebu/coherency_ll.S
index ee7598f..1f2bcd4 100644
--- a/arch/arm/mach-mvebu/coherency_ll.S
+++ b/arch/arm/mach-mvebu/coherency_ll.S
@@ -21,13 +21,27 @@
#define ARMADA_XP_CFB_CFG_REG_OFFSET 0x4
#include <asm/assembler.h>
+#include <asm/cp15.h>
.text
/*
- * r0: Coherency fabric base register address
- * r1: HW CPU id
+ * r0: HW CPU id
*/
ENTRY(ll_set_cpu_coherent)
+ mrc p15, 0, r1, c1, c0, 0
+ tst r1, #CR_M @ Check MMU bit enabled
+ bne 1f
+
+ /* use physical address of the coherency register*/
+ adr r0, 3f
+ ldr r3, [r0]
+ ldr r0, [r0, r3]
+ b 2f
+1:
+ /* use virtual address of the coherency register*/
+ ldr r0, =coherency_base
+ ldr r0, [r0]
+2:
/* Create bit by cpu index */
mov r3, #(1 << 24)
lsl r1, r3, r1
@@ -56,3 +70,7 @@ ARM_BE8(rev r1, r1)
mov r0, #0
mov pc, lr
ENDPROC(ll_set_cpu_coherent)
+
+ .align 2
+3:
+ .long coherency_phys_base - .
diff --git a/arch/arm/mach-mvebu/headsmp.S b/arch/arm/mach-mvebu/headsmp.S
index 3dd80df..f30bc8d 100644
--- a/arch/arm/mach-mvebu/headsmp.S
+++ b/arch/arm/mach-mvebu/headsmp.S
@@ -31,11 +31,6 @@
ENTRY(armada_xp_secondary_startup)
ARM_BE8(setend be ) @ go BE8 if entered LE
- /* Get coherency fabric base physical address */
- adr r0, 1f
- ldr r1, [r0]
- ldr r0, [r0, r1]
-
/* Read CPU id */
mrc p15, 0, r1, c0, c0, 5
and r1, r1, #0xF
@@ -45,7 +40,3 @@ ENTRY(armada_xp_secondary_startup)
b secondary_startup
ENDPROC(armada_xp_secondary_startup)
-
- .align 2
-1:
- .long coherency_phys_base - .
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