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-rw-r--r--arch/arm/mach-exynos/pmu.c2
-rw-r--r--arch/arm/mach-exynos/regs-pmu.h9
2 files changed, 2 insertions, 9 deletions
diff --git a/arch/arm/mach-exynos/pmu.c b/arch/arm/mach-exynos/pmu.c
index 28b7a72..628ae09 100644
--- a/arch/arm/mach-exynos/pmu.c
+++ b/arch/arm/mach-exynos/pmu.c
@@ -15,6 +15,8 @@
#include <linux/platform_device.h>
#include <linux/delay.h>
+#include <asm/cputype.h>
+
#include "exynos-pmu.h"
#include "regs-pmu.h"
diff --git a/arch/arm/mach-exynos/regs-pmu.h b/arch/arm/mach-exynos/regs-pmu.h
index fba9068..5e4f4c2 100644
--- a/arch/arm/mach-exynos/regs-pmu.h
+++ b/arch/arm/mach-exynos/regs-pmu.h
@@ -484,15 +484,6 @@
#define EXYNOS5420_SWRESET_KFC_SEL 0x3
-#include <asm/cputype.h>
-#define MAX_CPUS_IN_CLUSTER 4
-
-static inline unsigned int exynos_pmu_cpunr(unsigned int mpidr)
-{
- return ((MPIDR_AFFINITY_LEVEL(mpidr, 1) * MAX_CPUS_IN_CLUSTER)
- + MPIDR_AFFINITY_LEVEL(mpidr, 0));
-}
-
/* Only for EXYNOS5420 */
#define EXYNOS5420_ISP_ARM_OPTION 0x2488
#define EXYNOS5420_L2RSTDISABLE_VALUE BIT(3)
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