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-rw-r--r--arch/arm/mach-pxa/include/mach/pxa3xx-regs.h1
-rw-r--r--arch/arm/mach-pxa/pxa3xx.c2
-rw-r--r--drivers/mtd/nand/pxa3xx_nand.c4
3 files changed, 5 insertions, 2 deletions
diff --git a/arch/arm/mach-pxa/include/mach/pxa3xx-regs.h b/arch/arm/mach-pxa/include/mach/pxa3xx-regs.h
index 207ecb4..f4d48d2 100644
--- a/arch/arm/mach-pxa/include/mach/pxa3xx-regs.h
+++ b/arch/arm/mach-pxa/include/mach/pxa3xx-regs.h
@@ -131,6 +131,7 @@
#define AICSR __REG(0x41340008) /* Application Subsystem Interrupt Control/Status Register */
#define CKENA __REG(0x4134000C) /* A Clock Enable Register */
#define CKENB __REG(0x41340010) /* B Clock Enable Register */
+#define CKENC __REG(0x41340024) /* C Clock Enable Register */
#define AC97_DIV __REG(0x41340014) /* AC97 clock divisor value register */
#define ACCR_XPDIS (1 << 31) /* Core PLL Output Disable */
diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c
index 4a9d04a..ff9c957 100644
--- a/arch/arm/mach-pxa/pxa3xx.c
+++ b/arch/arm/mach-pxa/pxa3xx.c
@@ -402,11 +402,13 @@ void __init pxa3xx_init_irq(void)
pxa_init_irq(56, pxa3xx_set_wake);
}
+#ifdef CONFIG_OF
void __init pxa3xx_dt_init_irq(void)
{
__pxa3xx_init_irq();
pxa_dt_irq_init(pxa3xx_set_wake);
}
+#endif /* CONFIG_OF */
static struct map_desc pxa3xx_io_desc[] __initdata = {
{ /* Mem Ctl */
diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c
index b0319d8..d944d6e 100644
--- a/drivers/mtd/nand/pxa3xx_nand.c
+++ b/drivers/mtd/nand/pxa3xx_nand.c
@@ -1034,7 +1034,7 @@ static int alloc_nand_resource(struct platform_device *pdev)
struct pxa3xx_nand_platform_data *pdata;
struct pxa3xx_nand_info *info;
struct pxa3xx_nand_host *host;
- struct nand_chip *chip;
+ struct nand_chip *chip = NULL;
struct mtd_info *mtd;
struct resource *r;
int ret, irq, cs;
@@ -1244,7 +1244,7 @@ static int pxa3xx_nand_probe_dt(struct platform_device *pdev)
return 0;
}
#else
-static inline int pxa3xx_nand_probe_dt(struct platform_device *)
+static inline int pxa3xx_nand_probe_dt(struct platform_device *pdev)
{
return 0;
}
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