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-rw-r--r--arch/powerpc/platforms/powernv/pci-ioda.c16
-rw-r--r--arch/powerpc/platforms/powernv/pci.h3
2 files changed, 19 insertions, 0 deletions
diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c b/arch/powerpc/platforms/powernv/pci-ioda.c
index 5bd0eb6..bcb3bfc 100644
--- a/arch/powerpc/platforms/powernv/pci-ioda.c
+++ b/arch/powerpc/platforms/powernv/pci-ioda.c
@@ -3873,11 +3873,13 @@ static void __init pnv_pci_init_ioda_phb(struct device_node *np,
struct resource r;
const __be64 *prop64;
const __be32 *prop32;
+ struct property *prop;
int len;
unsigned int segno;
u64 phb_id;
void *aux;
long rc;
+ u32 val;
if (!of_device_is_available(np))
return;
@@ -4016,6 +4018,20 @@ static void __init pnv_pci_init_ioda_phb(struct device_node *np,
}
phb->ioda.pe_array = aux + pemap_off;
+ phb->ioda.max_tce_order = 0;
+ // Get TCE order from the DT. If it's not present, assume P8
+ if (!of_get_property(np, "ibm,supported-tce-sizes", NULL)) {
+ phb->ioda.max_tce_order = 28; // assume P8 256mb TCEs
+ } else {
+ of_property_for_each_u32(np, "ibm,supported-tce-sizes", prop,
+ prop32, val) {
+ if (val > phb->ioda.max_tce_order)
+ phb->ioda.max_tce_order = val;
+ }
+ pr_debug("PHB%llx Found max TCE order of %d bits\n",
+ phb->opal_id, phb->ioda.max_tce_order);
+ }
+
/*
* Choose PE number for root bus, which shouldn't have
* M64 resources consumed by its child devices. To pick
diff --git a/arch/powerpc/platforms/powernv/pci.h b/arch/powerpc/platforms/powernv/pci.h
index eada4b6..c9952de 100644
--- a/arch/powerpc/platforms/powernv/pci.h
+++ b/arch/powerpc/platforms/powernv/pci.h
@@ -173,6 +173,9 @@ struct pnv_phb {
struct list_head pe_list;
struct mutex pe_list_mutex;
+ /* Largest supported TCE order bits */
+ uint8_t max_tce_order;
+
/* Reverse map of PEs, indexed by {bus, devfn} */
unsigned int pe_rmap[0x10000];
} ioda;
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