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authorCasey Leedom <leedom@chelsio.com>2011-01-10 13:53:43 -0800
committerDavid S. Miller <davem@davemloft.net>2011-01-10 13:53:43 -0800
commit80ce3f67e75ffa14ad99b26457a7e9558b8b001a (patch)
tree41c409c5f2bca580b3a9305307927461cab91450 /usr
parentb11a25aaeccc29d5090d1ce9776af20e3ee99ab9 (diff)
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cxgb4vf: fix mailbox data/control coherency domain race
For the VFs, the Mailbox Data "registers" are actually backed by T4's "MA" interface rather than PL Registers (as is the case for the PFs). Because these are in different coherency domains, the write to the VF's PL-register-backed Mailbox Control can race in front of the writes to the MA-backed VF Mailbox Data "registers". So we need to do a read-back on at least one byte of the VF Mailbox Data registers before doing the write to the VF Mailbox Control register. Signed-off-by: Casey Leedom <leedom@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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