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authorZhigang Lu <zlu@tilera.com>2014-02-11 11:03:48 +0800
committerChris Metcalf <cmetcalf@tilera.com>2014-03-07 11:19:49 -0500
commit620830b6954913647b7c7f68920cf48eddf6ad92 (patch)
treea726f15a685c7f2fbc4e36c2edf776fbb80118b1 /tools/perf/perf.h
parent8d61dd7d3e374eb52a174ab04169b04e3d9d729f (diff)
downloadop-kernel-dev-620830b6954913647b7c7f68920cf48eddf6ad92.zip
op-kernel-dev-620830b6954913647b7c7f68920cf48eddf6ad92.tar.gz
perf tools: Allow building for tile
Tested by building perf: - Cross-compiled for tile on x86_64 - Built natively on tile Signed-off-by: Zhigang Lu <zlu@tilera.com> Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
Diffstat (limited to 'tools/perf/perf.h')
-rw-r--r--tools/perf/perf.h8
1 files changed, 8 insertions, 0 deletions
diff --git a/tools/perf/perf.h b/tools/perf/perf.h
index e84fa26..75caf68 100644
--- a/tools/perf/perf.h
+++ b/tools/perf/perf.h
@@ -139,6 +139,14 @@
#define CPUINFO_PROC "core ID"
#endif
+#ifdef __tile__
+#define mb() asm volatile ("mf" ::: "memory")
+#define wmb() asm volatile ("mf" ::: "memory")
+#define rmb() asm volatile ("mf" ::: "memory")
+#define cpu_relax() asm volatile ("mfspr zero, PASS" ::: "memory")
+#define CPUINFO_PROC "model name"
+#endif
+
#define barrier() asm volatile ("" ::: "memory")
#ifndef cpu_relax
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