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authorBoris BREZILLON <boris.brezillon@free-electrons.com>2014-05-15 10:55:11 +0200
committerMaxime Ripard <maxime.ripard@free-electrons.com>2014-06-11 10:25:02 +0200
commitc8a76cac19eebf65f629e3676e57743f9dfeea8f (patch)
tree3988645d9fe86f15009e324b8e0ac575d2c27d7d /sound
parentefb3184c08927c54ed984c85f69f54ff1dbd2c37 (diff)
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clk: sunxi: add PRCM (Power/Reset/Clock Management) clks support
The PRCM (Power/Reset/Clock Management) unit provides several clock devices: - AR100 clk: used to clock the Power Management co-processor - AHB0 clk: used to clock the AHB0 bus - APB0 clk and gates: used to clk peripherals connected to the APB0 bus Add support for these clks in a separate driver so that they can be probed as platform devices instead of registered during early init. This is needed to be able to probe PRCM MFD subdevices. Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Emilio López <emilio@elopez.com.ar>
Diffstat (limited to 'sound')
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