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authorTakashi Iwai <tiwai@suse.de>2009-03-18 08:04:16 +0100
committerTakashi Iwai <tiwai@suse.de>2009-03-18 08:04:16 +0100
commita232ee66e015da806936dc410684f5639035f066 (patch)
tree49e0812b995cc1d39ce8b11c272574906c67caf6 /sound
parent6af845e4eb36fb91b322aaf77ec1cab2220a48ad (diff)
parentc673ba1c23941173c16ff24c7cb34199e826c8b5 (diff)
downloadop-kernel-dev-a232ee66e015da806936dc410684f5639035f066.zip
op-kernel-dev-a232ee66e015da806936dc410684f5639035f066.tar.gz
Merge branch 'fix/hda' into for-linus
Diffstat (limited to 'sound')
-rw-r--r--sound/pci/hda/hda_intel.c39
1 files changed, 26 insertions, 13 deletions
diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c
index 5e909e0..f3b5723 100644
--- a/sound/pci/hda/hda_intel.c
+++ b/sound/pci/hda/hda_intel.c
@@ -2059,26 +2059,31 @@ static int __devinit check_position_fix(struct azx *chip, int fix)
{
const struct snd_pci_quirk *q;
- /* Check VIA HD Audio Controller exist */
- if (chip->pci->vendor == PCI_VENDOR_ID_VIA &&
- chip->pci->device == VIA_HDAC_DEVICE_ID) {
+ switch (fix) {
+ case POS_FIX_LPIB:
+ case POS_FIX_POSBUF:
+ return fix;
+ }
+
+ /* Check VIA/ATI HD Audio Controller exist */
+ switch (chip->driver_type) {
+ case AZX_DRIVER_VIA:
+ case AZX_DRIVER_ATI:
chip->via_dmapos_patch = 1;
/* Use link position directly, avoid any transfer problem. */
return POS_FIX_LPIB;
}
chip->via_dmapos_patch = 0;
- if (fix == POS_FIX_AUTO) {
- q = snd_pci_quirk_lookup(chip->pci, position_fix_list);
- if (q) {
- printk(KERN_INFO
- "hda_intel: position_fix set to %d "
- "for device %04x:%04x\n",
- q->value, q->subvendor, q->subdevice);
- return q->value;
- }
+ q = snd_pci_quirk_lookup(chip->pci, position_fix_list);
+ if (q) {
+ printk(KERN_INFO
+ "hda_intel: position_fix set to %d "
+ "for device %04x:%04x\n",
+ q->value, q->subvendor, q->subdevice);
+ return q->value;
}
- return fix;
+ return POS_FIX_AUTO;
}
/*
@@ -2210,9 +2215,17 @@ static int __devinit azx_create(struct snd_card *card, struct pci_dev *pci,
gcap = azx_readw(chip, GCAP);
snd_printdd("chipset global capabilities = 0x%x\n", gcap);
+ /* ATI chips seems buggy about 64bit DMA addresses */
+ if (chip->driver_type == AZX_DRIVER_ATI)
+ gcap &= ~0x01;
+
/* allow 64bit DMA address if supported by H/W */
if ((gcap & 0x01) && !pci_set_dma_mask(pci, DMA_64BIT_MASK))
pci_set_consistent_dma_mask(pci, DMA_64BIT_MASK);
+ else {
+ pci_set_dma_mask(pci, DMA_32BIT_MASK);
+ pci_set_consistent_dma_mask(pci, DMA_32BIT_MASK);
+ }
/* read number of streams from GCAP register instead of using
* hardcoded value
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