diff options
author | Peter Ujfalusi <peter.ujfalusi@nokia.com> | 2009-05-25 11:12:12 +0300 |
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committer | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2009-05-25 11:54:14 +0100 |
commit | f3b5d3002d5b43d277dedc1e044d02f2a40a43c5 (patch) | |
tree | 6f71f26af0f468a14940023135f5115078ca3aa1 /sound | |
parent | 5a2e9a48b1d6de35ae5efea35d117133c3eb30f2 (diff) | |
download | op-kernel-dev-f3b5d3002d5b43d277dedc1e044d02f2a40a43c5.zip op-kernel-dev-f3b5d3002d5b43d277dedc1e044d02f2a40a43c5.tar.gz |
ASoC: TWL4030: Add shadow register
Shadow, non HW register for dealing with the HandsfreeL/R
muting.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@nokia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Diffstat (limited to 'sound')
-rw-r--r-- | sound/soc/codecs/twl4030.c | 7 | ||||
-rw-r--r-- | sound/soc/codecs/twl4030.h | 7 |
2 files changed, 12 insertions, 2 deletions
diff --git a/sound/soc/codecs/twl4030.c b/sound/soc/codecs/twl4030.c index 17ddcb2..989446d 100644 --- a/sound/soc/codecs/twl4030.c +++ b/sound/soc/codecs/twl4030.c @@ -115,6 +115,7 @@ static const u8 twl4030_reg[TWL4030_CACHEREGNUM] = { 0x00, /* REG_VIBRA_PWM_SET (0x47) */ 0x00, /* REG_ANAMIC_GAIN (0x48) */ 0x00, /* REG_MISC_SET_2 (0x49) */ + 0x00, /* REG_SW_SHADOW (0x4A) - Shadow, non HW register */ }; /* codec private data */ @@ -172,7 +173,11 @@ static int twl4030_write(struct snd_soc_codec *codec, unsigned int reg, unsigned int value) { twl4030_write_reg_cache(codec, reg, value); - return twl4030_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, value, reg); + if (likely(reg < TWL4030_REG_SW_SHADOW)) + return twl4030_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, value, + reg); + else + return 0; } static void twl4030_codec_enable(struct snd_soc_codec *codec, int enable) diff --git a/sound/soc/codecs/twl4030.h b/sound/soc/codecs/twl4030.h index 48326e2..fe5f395 100644 --- a/sound/soc/codecs/twl4030.h +++ b/sound/soc/codecs/twl4030.h @@ -92,8 +92,9 @@ #define TWL4030_REG_VIBRA_PWM_SET 0x47 #define TWL4030_REG_ANAMIC_GAIN 0x48 #define TWL4030_REG_MISC_SET_2 0x49 +#define TWL4030_REG_SW_SHADOW 0x4A -#define TWL4030_CACHEREGNUM (TWL4030_REG_MISC_SET_2 + 1) +#define TWL4030_CACHEREGNUM (TWL4030_REG_SW_SHADOW + 1) /* Bitfield Definitions */ @@ -260,6 +261,10 @@ #define TWL4030_SMOOTH_ANAVOL_EN 0x02 #define TWL4030_DIGMIC_LR_SWAP_EN 0x01 +/* TWL4030_REG_SW_SHADOW (0x4A) Fields */ +#define TWL4030_HFL_EN 0x01 +#define TWL4030_HFR_EN 0x02 + #define TWL4030_DAI_HIFI 0 #define TWL4030_DAI_VOICE 1 |