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authorStephen Warren <swarren@nvidia.com>2013-12-04 11:13:01 -0700
committerStephen Warren <swarren@nvidia.com>2013-12-12 12:56:39 -0700
commitf1d6ff7939b4444079170adc2bba1f551e7f65ea (patch)
tree37d8332287b79bedcaab91d7eb1ec8402017048d /sound/soc/tegra
parenta85f06badc3cff4069f2f5112cea63cd39d99920 (diff)
downloadop-kernel-dev-f1d6ff7939b4444079170adc2bba1f551e7f65ea.zip
op-kernel-dev-f1d6ff7939b4444079170adc2bba1f551e7f65ea.tar.gz
ASoC: tegra: update module reset list for Tegra124
Tegra124 adds a number of extra modules into the configlink bus, which must be taken out of reset before the bus is used. Update the AHUB driver to know about these extra modules (the AHUB HW module hosts the configlink bus). Based-on-work-by: Arun Shamanna Lakshmi <aruns@nvidia.com> Based-on-work-by: Songhee Baek <sbaek@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Mark Brown <broonie@linaro.org> --- This patch depends on "ASoC: tegra: use reset framework" to compile, which is ack'd and slated to go through a (large) topic branch in the Tegra tree. So, we can either: a) Merge that Tegra topic branch into the ASoC tree, then apply this. Note that I haven't created the topic branch yet, since I'm still waiting for DMA dependencies to be applied. b) Apply this change to the Tegra tree too. This change isn't directly related to the changes in the Tegra tree; it just makes use of the new reset controller feature that's introduced there.
Diffstat (limited to 'sound/soc/tegra')
-rw-r--r--sound/soc/tegra/tegra30_ahub.c20
1 files changed, 16 insertions, 4 deletions
diff --git a/sound/soc/tegra/tegra30_ahub.c b/sound/soc/tegra/tegra30_ahub.c
index 342cd4f..d6f4c99 100644
--- a/sound/soc/tegra/tegra30_ahub.c
+++ b/sound/soc/tegra/tegra30_ahub.c
@@ -335,9 +335,13 @@ EXPORT_SYMBOL_GPL(tegra30_ahub_unset_rx_cif_source);
#define MOD_LIST_MASK_TEGRA30 BIT(0)
#define MOD_LIST_MASK_TEGRA114 BIT(1)
+#define MOD_LIST_MASK_TEGRA124 BIT(2)
#define MOD_LIST_MASK_TEGRA30_OR_LATER \
- (MOD_LIST_MASK_TEGRA30 | MOD_LIST_MASK_TEGRA114)
+ (MOD_LIST_MASK_TEGRA30 | MOD_LIST_MASK_TEGRA114 | \
+ MOD_LIST_MASK_TEGRA124)
+#define MOD_LIST_MASK_TEGRA114_OR_LATER \
+ (MOD_LIST_MASK_TEGRA114 | MOD_LIST_MASK_TEGRA124)
static const struct {
const char *rst_name;
@@ -352,8 +356,16 @@ static const struct {
{ "dam1", MOD_LIST_MASK_TEGRA30_OR_LATER },
{ "dam2", MOD_LIST_MASK_TEGRA30_OR_LATER },
{ "spdif", MOD_LIST_MASK_TEGRA30_OR_LATER },
- { "amx", MOD_LIST_MASK_TEGRA114 },
- { "adx", MOD_LIST_MASK_TEGRA114 },
+ { "amx", MOD_LIST_MASK_TEGRA114_OR_LATER },
+ { "adx", MOD_LIST_MASK_TEGRA114_OR_LATER },
+ { "amx1", MOD_LIST_MASK_TEGRA124 },
+ { "adx1", MOD_LIST_MASK_TEGRA124 },
+ { "afc0", MOD_LIST_MASK_TEGRA124 },
+ { "afc1", MOD_LIST_MASK_TEGRA124 },
+ { "afc2", MOD_LIST_MASK_TEGRA124 },
+ { "afc3", MOD_LIST_MASK_TEGRA124 },
+ { "afc4", MOD_LIST_MASK_TEGRA124 },
+ { "afc5", MOD_LIST_MASK_TEGRA124 },
};
#define LAST_REG(name) \
@@ -492,7 +504,7 @@ static struct tegra30_ahub_soc_data soc_data_tegra114 = {
};
static struct tegra30_ahub_soc_data soc_data_tegra124 = {
- .mod_list_mask = MOD_LIST_MASK_TEGRA114,
+ .mod_list_mask = MOD_LIST_MASK_TEGRA124,
.set_audio_cif = tegra124_ahub_set_cif,
};
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